// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2016 Facebook
 */
#include <linux/bpf.h>
#include <linux/jhash.h>
#include <linux/filter.h>
#include <linux/stacktrace.h>
#include <linux/perf_event.h>
#include <linux/elf.h>
#include <linux/pagemap.h>
#include <linux/irq_work.h>
#include "percpu_freelist.h"

#define STACK_CREATE_FLAG_MASK					\
	(BPF_F_NUMA_NODE | BPF_F_RDONLY | BPF_F_WRONLY |	\
	 BPF_F_STACK_BUILD_ID)

struct stack_map_bucket {
	struct pcpu_freelist_node fnode;
	u32 hash;
	u32 nr;
	u64 data[];
};

struct bpf_stack_map {
	struct bpf_map map;
	void *elems;
	struct pcpu_freelist freelist;
	u32 n_buckets;
	struct stack_map_bucket *buckets[];
};

/* irq_work to run up_read() for build_id lookup in nmi context */
struct stack_map_irq_work {
	struct irq_work irq_work;
	struct rw_semaphore *sem;
};

static void do_up_read(struct irq_work *entry)
{
	struct stack_map_irq_work *work;

	if (WARN_ON_ONCE(IS_ENABLED(CONFIG_PREEMPT_RT)))
		return;

	work = container_of(entry, struct stack_map_irq_work, irq_work);
	up_read_non_owner(work->sem);
	work->sem = NULL;
}

static DEFINE_PER_CPU(struct stack_map_irq_work, up_read_work);

static inline bool stack_map_use_build_id(struct bpf_map *map)
{
	return (map->map_flags & BPF_F_STACK_BUILD_ID);
}

static inline int stack_map_data_size(struct bpf_map *map)
{
	return stack_map_use_build_id(map) ?
		sizeof(struct bpf_stack_build_id) : sizeof(u64);
}

static int prealloc_elems_and_freelist(struct bpf_stack_map *smap)
{
	u32 elem_size = sizeof(struct stack_map_bucket) + smap->map.value_size;
	int err;

	smap->elems = bpf_map_area_alloc(elem_size * smap->map.max_entries,
					 smap->map.numa_node);
	if (!smap->elems)
		return -ENOMEM;

	err = pcpu_freelist_init(&smap->freelist);
	if (err)
		goto free_elems;

	pcpu_freelist_populate(&smap->freelist, smap->elems, elem_size,
			       smap->map.max_entries);
	return 0;

free_elems:
	bpf_map_area_free(smap->elems);
	return err;
}

/* Called from syscall */
static struct bpf_map *stack_map_alloc(union bpf_attr *attr)
{
	u32 value_size = attr->value_size;
	struct bpf_stack_map *smap;
	struct bpf_map_memory mem;
	u64 cost, n_buckets;
	int err;

	if (!capable(CAP_SYS_ADMIN))
		return ERR_PTR(-EPERM);

	if (attr->map_flags & ~STACK_CREATE_FLAG_MASK)
		return ERR_PTR(-EINVAL);

	/* check sanity of attributes */
	if (attr->max_entries == 0 || attr->key_size != 4 ||
	    value_size < 8 || value_size % 8)
		return ERR_PTR(-EINVAL);

	BUILD_BUG_ON(sizeof(struct bpf_stack_build_id) % sizeof(u64));
	if (attr->map_flags & BPF_F_STACK_BUILD_ID) {
		if (value_size % sizeof(struct bpf_stack_build_id) ||
		    value_size / sizeof(struct bpf_stack_build_id)
		    > sysctl_perf_event_max_stack)
			return ERR_PTR(-EINVAL);
	} else if (value_size / 8 > sysctl_perf_event_max_stack)
		return ERR_PTR(-EINVAL);

	/* hash table size must be power of 2 */
	n_buckets = roundup_pow_of_two(attr->max_entries);

	cost = n_buckets * sizeof(struct stack_map_bucket *) + sizeof(*smap);
	cost += n_buckets * (value_size + sizeof(struct stack_map_bucket));
	err = bpf_map_charge_init(&mem, cost);
	if (err)
		return ERR_PTR(err);

	smap = bpf_map_area_alloc(cost, bpf_map_attr_numa_node(attr));
	if (!smap) {
		bpf_map_charge_finish(&mem);
		return ERR_PTR(-ENOMEM);
	}

	bpf_map_init_from_attr(&smap->map, attr);
	smap->map.value_size = value_size;
	smap->n_buckets = n_buckets;

	err = get_callchain_buffers(sysctl_perf_event_max_stack);
	if (err)
		goto free_charge;

	err = prealloc_elems_and_freelist(smap);
	if (err)
		goto put_buffers;

	bpf_map_charge_move(&smap->map.memory, &mem);

	return &smap->map;

put_buffers:
	put_callchain_buffers();
free_charge:
	bpf_map_charge_finish(&mem);
	bpf_map_area_free(smap);
	return ERR_PTR(err);
}

#define BPF_BUILD_ID 3
/*
 * Parse build id from the note segment. This logic can be shared between
 * 32-bit and 64-bit system, because Elf32_Nhdr and Elf64_Nhdr are
 * identical.
 */
static inline int stack_map_parse_build_id(void *page_addr,
					   unsigned char *build_id,
					   void *note_start,
					   Elf32_Word note_size)
{
	Elf32_Word note_offs = 0, new_offs;

	/* check for overflow */
	if (note_start < page_addr || note_start + note_size < note_start)
		return -EINVAL;

	/* only supports note that fits in the first page */
	if (note_start + note_size > page_addr + PAGE_SIZE)
		return -EINVAL;

	while (note_offs + sizeof(Elf32_Nhdr) < note_size) {
		Elf32_Nhdr *nhdr = (Elf32_Nhdr *)(note_start + note_offs);

		if (nhdr->n_type == BPF_BUILD_ID &&
		    nhdr->n_namesz == sizeof("GNU") &&
		    nhdr->n_descsz > 0 &&
		    nhdr->n_descsz <= BPF_BUILD_ID_SIZE) {
			memcpy(build_id,
			       note_start + note_offs +
			       ALIGN(sizeof("GNU"), 4) + sizeof(Elf32_Nhdr),
			       nhdr->n_descsz);
			memset(build_id + nhdr->n_descsz, 0,
			       BPF_BUILD_ID_SIZE - nhdr->n_descsz);
			return 0;
		}
		new_offs = note_offs + sizeof(Elf32_Nhdr) +
			ALIGN(nhdr->n_namesz, 4) + ALIGN(nhdr->n_descsz, 4);
		if (new_offs <= note_offs)  /* overflow */
			break;
		note_offs = new_offs;
	}
	return -EINVAL;
}

/* Parse build ID from 32-bit ELF */
static int stack_map_get_build_id_32(void *page_addr,
				     unsigned char *build_id)
{
	Elf32_Ehdr *ehdr = (Elf32_Ehdr *)page_addr;
	Elf32_Phdr *phdr;
	int i;

	/* only supports phdr that fits in one page */
	if (ehdr->e_phnum >
	    (PAGE_SIZE - sizeof(Elf32_Ehdr)) / sizeof(Elf32_Phdr))
		return -EINVAL;

	phdr = (Elf32_Phdr *)(page_addr + sizeof(Elf32_Ehdr));

	for (i = 0; i < ehdr->e_phnum; ++i)
		if (phdr[i].p_type == PT_NOTE)
			return stack_map_parse_build_id(page_addr, build_id,
					page_addr + phdr[i].p_offset,
					phdr[i].p_filesz);
	return -EINVAL;
}

/* Parse build ID from 64-bit ELF */
static int stack_map_get_build_id_64(void *page_addr,
				     unsigned char *build_id)
{
	Elf64_Ehdr *ehdr = (Elf64_Ehdr *)page_addr;
	Elf64_Phdr *phdr;
	int i;

	/* only supports phdr that fits in one page */
	if (ehdr->e_phnum >
	    (PAGE_SIZE - sizeof(Elf64_Ehdr)) / sizeof(Elf64_Phdr))
		return -EINVAL;

	phdr = (Elf64_Phdr *)(page_addr + sizeof(Elf64_Ehdr));

	for (i = 0; i < ehdr->e_phnum; ++i)
		if (phdr[i].p_type == PT_NOTE)
			return stack_map_parse_build_id(page_addr, build_id,
					page_addr + phdr[i].p_offset,
					phdr[i].p_filesz);
	return -EINVAL;
}

/* Parse build ID of ELF file mapped to vma */
static int stack_map_get_build_id(struct vm_area_struct *vma,
				  unsigned char *build_id)
{
	Elf32_Ehdr *ehdr;
	struct page *page;
	void *page_addr;
	int ret;

	/* only works for page backed storage  */
	if (!vma->vm_file)
		return -EINVAL;

	page = find_get_page(vma->vm_file->f_mapping, 0);
	if (!page)
		return -EFAULT;	/* page not mapped */

	ret = -EINVAL;
	page_addr = kmap_atomic(page);
	ehdr = (Elf32_Ehdr *)page_addr;

	/* compare magic x7f "ELF" */
	if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG) != 0)
		goto out;

	/* only support executable file and shared object file */
	if (ehdr->e_type != ET_EXEC && ehdr->e_type != ET_DYN)
		goto out;

	if (ehdr->e_ident[EI_CLASS] == ELFCLASS32)
		ret = stack_map_get_build_id_32(page_addr, build_id);
	else if (ehdr->e_ident[EI_CLASS] == ELFCLASS64)
		ret = stack_map_get_build_id_64(page_addr, build_id);
out:
	kunmap_atomic(page_addr);
	put_page(page);
	return ret;
}

static void stack_map_get_build_id_offset(struct bpf_stack_build_id *id_offs,
					  u64 *ips, u32 trace_nr, bool user)
{
	int i;
	struct vm_area_struct *vma;
	bool irq_work_busy = false;
	struct stack_map_irq_work *work = NULL;

	if (irqs_disabled()) {
		if (!IS_ENABLED(CONFIG_PREEMPT_RT)) {
			work = this_cpu_ptr(&up_read_work);
			if (atomic_read(&work->irq_work.flags) & IRQ_WORK_BUSY) {
				/* cannot queue more up_read, fallback */
				irq_work_busy = true;
			}
		} else {
			/*
			 * PREEMPT_RT does not allow to trylock mmap sem in
			 * interrupt disabled context. Force the fallback code.
			 */
			irq_work_busy = true;
		}
	}

	/*
	 * We cannot do up_read() when the irq is disabled, because of
	 * risk to deadlock with rq_lock. To do build_id lookup when the
	 * irqs are disabled, we need to run up_read() in irq_work. We use
	 * a percpu variable to do the irq_work. If the irq_work is
	 * already used by another lookup, we fall back to report ips.
	 *
	 * Same fallback is used for kernel stack (!user) on a stackmap
	 * with build_id.
	 */
	if (!user || !current || !current->mm || irq_work_busy ||
	    down_read_trylock(&current->mm->mmap_sem) == 0) {
		/* cannot access current->mm, fall back to ips */
		for (i = 0; i < trace_nr; i++) {
			id_offs[i].status = BPF_STACK_BUILD_ID_IP;
			id_offs[i].ip = ips[i];
			memset(id_offs[i].build_id, 0, BPF_BUILD_ID_SIZE);
		}
		return;
	}

	for (i = 0; i < trace_nr; i++) {
		vma = find_vma(current->mm, ips[i]);
		if (!vma || stack_map_get_build_id(vma, id_offs[i].build_id)) {
			/* per entry fall back to ips */
			id_offs[i].status = BPF_STACK_BUILD_ID_IP;
			id_offs[i].ip = ips[i];
			memset(id_offs[i].build_id, 0, BPF_BUILD_ID_SIZE);
			continue;
		}
		id_offs[i].offset = (vma->vm_pgoff << PAGE_SHIFT) + ips[i]
			- vma->vm_start;
		id_offs[i].status = BPF_STACK_BUILD_ID_VALID;
	}

	if (!work) {
		up_read(&current->mm->mmap_sem);
	} else {
		work->sem = &current->mm->mmap_sem;
		irq_work_queue(&work->irq_work);
		/*
		 * The irq_work will release the mmap_sem with
		 * up_read_non_owner(). The rwsem_release() is called
		 * here to release the lock from lockdep's perspective.
		 */
		rwsem_release(&current->mm->mmap_sem.dep_map, _RET_IP_);
	}
}

BPF_CALL_3(bpf_get_stackid, struct pt_regs *, regs, struct bpf_map *, map,
	   u64, flags)
{
	struct bpf_stack_map *smap = container_of(map, struct bpf_stack_map, map);
	struct perf_callchain_entry *trace;
	struct stack_map_bucket *bucket, *new_bucket, *old_bucket;
	u32 max_depth = map->value_size / stack_map_data_size(map);
	/* stack_map_alloc() checks that max_depth <= sysctl_perf_event_max_stack */
	u32 init_nr = sysctl_perf_event_max_stack - max_depth;
	u32 skip = flags & BPF_F_SKIP_FIELD_MASK;
	u32 hash, id, trace_nr, trace_len;
	bool user = flags & BPF_F_USER_STACK;
	bool kernel = !user;
	u64 *ips;
	bool hash_matches;

	if (unlikely(flags & ~(BPF_F_SKIP_FIELD_MASK | BPF_F_USER_STACK |
			       BPF_F_FAST_STACK_CMP | BPF_F_REUSE_STACKID)))
		return -EINVAL;

	trace = get_perf_callchain(regs, init_nr, kernel, user,
				   sysctl_perf_event_max_stack, false, false);

	if (unlikely(!trace))
		/* couldn't fetch the stack trace */
		return -EFAULT;

	/* get_perf_callchain() guarantees that trace->nr >= init_nr
	 * and trace-nr <= sysctl_perf_event_max_stack, so trace_nr <= max_depth
	 */
	trace_nr = trace->nr - init_nr;

	if (trace_nr <= skip)
		/* skipping more than usable stack trace */
		return -EFAULT;

	trace_nr -= skip;
	trace_len = trace_nr * sizeof(u64);
	ips = trace->ip + skip + init_nr;
	hash = jhash2((u32 *)ips, trace_len / sizeof(u32), 0);
	id = hash & (smap->n_buckets - 1);
	bucket = READ_ONCE(smap->buckets[id]);

	hash_matches = bucket && bucket->hash == hash;
	/* fast cmp */
	if (hash_matches && flags & BPF_F_FAST_STACK_CMP)
		return id;

	if (stack_map_use_build_id(map)) {
		/* for build_id+offset, pop a bucket before slow cmp */
		new_bucket = (struct stack_map_bucket *)
			pcpu_freelist_pop(&smap->freelist);
		if (unlikely(!new_bucket))
			return -ENOMEM;
		new_bucket->nr = trace_nr;
		stack_map_get_build_id_offset(
			(struct bpf_stack_build_id *)new_bucket->data,
			ips, trace_nr, user);
		trace_len = trace_nr * sizeof(struct bpf_stack_build_id);
		if (hash_matches && bucket->nr == trace_nr &&
		    memcmp(bucket->data, new_bucket->data, trace_len) == 0) {
			pcpu_freelist_push(&smap->freelist, &new_bucket->fnode);
			return id;
		}
		if (bucket && !(flags & BPF_F_REUSE_STACKID)) {
			pcpu_freelist_push(&smap->freelist, &new_bucket->fnode);
			return -EEXIST;
		}
	} else {
		if (hash_matches && bucket->nr == trace_nr &&
		    memcmp(bucket->data, ips, trace_len) == 0)
			return id;
		if (bucket && !(flags & BPF_F_REUSE_STACKID))
			return -EEXIST;

		new_bucket = (struct stack_map_bucket *)
			pcpu_freelist_pop(&smap->freelist);
		if (unlikely(!new_bucket))
			return -ENOMEM;
		memcpy(new_bucket->data, ips, trace_len);
	}

	new_bucket->hash = hash;
	new_bucket->nr = trace_nr;

	old_bucket = xchg(&smap->buckets[id], new_bucket);
	if (old_bucket)
		pcpu_freelist_push(&smap->freelist, &old_bucket->fnode);
	return id;
}

const struct bpf_func_proto bpf_get_stackid_proto = {
	.func		= bpf_get_stackid,
	.gpl_only	= true,
	.ret_type	= RET_INTEGER,
	.arg1_type	= ARG_PTR_TO_CTX,
	.arg2_type	= ARG_CONST_MAP_PTR,
	.arg3_type	= ARG_ANYTHING,
};

BPF_CALL_4(bpf_get_stack, struct pt_regs *, regs, void *, buf, u32, size,
	   u64, flags)
{
	u32 init_nr, trace_nr, copy_len, elem_size, num_elem;
	bool user_build_id = flags & BPF_F_USER_BUILD_ID;
	u32 skip = flags & BPF_F_SKIP_FIELD_MASK;
	bool user = flags & BPF_F_USER_STACK;
	struct perf_callchain_entry *trace;
	bool kernel = !user;
	int err = -EINVAL;
	u64 *ips;

	if (unlikely(flags & ~(BPF_F_SKIP_FIELD_MASK | BPF_F_USER_STACK |
			       BPF_F_USER_BUILD_ID)))
		goto clear;
	if (kernel && user_build_id)
		goto clear;

	elem_size = (user && user_build_id) ? sizeof(struct bpf_stack_build_id)
					    : sizeof(u64);
	if (unlikely(size % elem_size))
		goto clear;

	num_elem = size / elem_size;
	if (sysctl_perf_event_max_stack < num_elem)
		init_nr = 0;
	else
		init_nr = sysctl_perf_event_max_stack - num_elem;
	trace = get_perf_callchain(regs, init_nr, kernel, user,
				   sysctl_perf_event_max_stack, false, false);
	if (unlikely(!trace))
		goto err_fault;

	trace_nr = trace->nr - init_nr;
	if (trace_nr < skip)
		goto err_fault;

	trace_nr -= skip;
	trace_nr = (trace_nr <= num_elem) ? trace_nr : num_elem;
	copy_len = trace_nr * elem_size;
	ips = trace->ip + skip + init_nr;
	if (user && user_build_id)
		stack_map_get_build_id_offset(buf, ips, trace_nr, user);
	else
		memcpy(buf, ips, copy_len);

	if (size > copy_len)
		memset(buf + copy_len, 0, size - copy_len);
	return copy_len;

err_fault:
	err = -EFAULT;
clear:
	memset(buf, 0, size);
	return err;
}

const struct bpf_func_proto bpf_get_stack_proto = {
	.func		= bpf_get_stack,
	.gpl_only	= true,
	.ret_type	= RET_INTEGER,
	.arg1_type	= ARG_PTR_TO_CTX,
	.arg2_type	= ARG_PTR_TO_UNINIT_MEM,
	.arg3_type	= ARG_CONST_SIZE_OR_ZERO,
	.arg4_type	= ARG_ANYTHING,
};

/* Called from eBPF program */
static void *stack_map_lookup_elem(struct bpf_map *map, void *key)
{
	return ERR_PTR(-EOPNOTSUPP);
}

/* Called from syscall */
int bpf_stackmap_copy(struct bpf_map *map, void *key, void *value)
{
	struct bpf_stack_map *smap = container_of(map, struct bpf_stack_map, map);
	struct stack_map_bucket *bucket, *old_bucket;
	u32 id = *(u32 *)key, trace_len;

	if (unlikely(id >= smap->n_buckets))
		return -ENOENT;

	bucket = xchg(&smap->buckets[id], NULL);
	if (!bucket)
		return -ENOENT;

	trace_len = bucket->nr * stack_map_data_size(map);
	memcpy(value, bucket->data, trace_len);
	memset(value + trace_len, 0, map->value_size - trace_len);

	old_bucket = xchg(&smap->buckets[id], bucket);
	if (old_bucket)
		pcpu_freelist_push(&smap->freelist, &old_bucket->fnode);
	return 0;
}

static int stack_map_get_next_key(struct bpf_map *map, void *key,
				  void *next_key)
{
	struct bpf_stack_map *smap = container_of(map,
						  struct bpf_stack_map, map);
	u32 id;

	WARN_ON_ONCE(!rcu_read_lock_held());

	if (!key) {
		id = 0;
	} else {
		id = *(u32 *)key;
		if (id >= smap->n_buckets || !smap->buckets[id])
			id = 0;
		else
			id++;
	}

	while (id < smap->n_buckets && !smap->buckets[id])
		id++;

	if (id >= smap->n_buckets)
		return -ENOENT;

	*(u32 *)next_key = id;
	return 0;
}

static int stack_map_update_elem(struct bpf_map *map, void *key, void *value,
				 u64 map_flags)
{
	return -EINVAL;
}

/* Called from syscall or from eBPF program */
static int stack_map_delete_elem(struct bpf_map *map, void *key)
{
	struct bpf_stack_map *smap = container_of(map, struct bpf_stack_map, map);
	struct stack_map_bucket *old_bucket;
	u32 id = *(u32 *)key;

	if (unlikely(id >= smap->n_buckets))
		return -E2BIG;

	old_bucket = xchg(&smap->buckets[id], NULL);
	if (old_bucket) {
		pcpu_freelist_push(&smap->freelist, &old_bucket->fnode);
		return 0;
	} else {
		return -ENOENT;
	}
}

/* Called when map->refcnt goes to zero, either from workqueue or from syscall */
static void stack_map_free(struct bpf_map *map)
{
	struct bpf_stack_map *smap = container_of(map, struct bpf_stack_map, map);

	/* wait for bpf programs to complete before freeing stack map */
	synchronize_rcu();

	bpf_map_area_free(smap->elems);
	pcpu_freelist_destroy(&smap->freelist);
	bpf_map_area_free(smap);
	put_callchain_buffers();
}

const struct bpf_map_ops stack_trace_map_ops = {
	.map_alloc = stack_map_alloc,
	.map_free = stack_map_free,
	.map_get_next_key = stack_map_get_next_key,
	.map_lookup_elem = stack_map_lookup_elem,
	.map_update_elem = stack_map_update_elem,
	.map_delete_elem = stack_map_delete_elem,
	.map_check_btf = map_check_no_btf,
};

static int __init stack_map_init(void)
{
	int cpu;
	struct stack_map_irq_work *work;

	for_each_possible_cpu(cpu) {
		work = per_cpu_ptr(&up_read_work, cpu);
		init_irq_work(&work->irq_work, do_up_read);
	}
	return 0;
}
subsys_initcall(stack_map_init);
100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/include/uapi/asm/svm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/svm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/include/uapi/asm/vmx.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/vmx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/lib/inat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/inat.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/lib/insn.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/insn.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/lib/x86-opcode-map.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/x86-opcode-map.txt</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/tools/gen-cpu-feature-names-x86.awk?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/tools/gen-cpu-feature-names-x86.awk</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/arch/x86/tools/gen-insn-attr-x86.awk?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/tools/gen-insn-attr-x86.awk</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bootconfig/main.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bootconfig/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/Documentation/bpftool-gen.rst?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-gen.rst</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/Documentation/bpftool-map.rst?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-map.rst</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/Documentation/bpftool-prog.rst?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-prog.rst</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/Documentation/bpftool-token.rst?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-token.rst</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/bash-completion/bpftool?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/bash-completion/bpftool</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/btf_dumper.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/btf_dumper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/cgroup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/cgroup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/common.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/common.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/feature.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/feature.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/gen.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/gen.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/link.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/link.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/main.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/main.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/main.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/main.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/map.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/prog.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/prog.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/sign.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/sign.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/token.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/token.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/bpf/bpftool/tracelog.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/tracelog.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/bpf/runqslower/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/Makefile</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/bpf/runqslower/runqslower.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.bpf.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/bpf/runqslower/runqslower.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/bpf/runqslower/runqslower.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/build/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/build/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/build/Makefile.feature?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/Makefile.feature</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/build/feature/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/build/feature/test-all.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-all.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/build/feature/test-get_cpuid.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-get_cpuid.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/build/feature/test-get_current_dir_name.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-get_current_dir_name.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/build/feature/test-libbpf-strings.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-libbpf-strings.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/build/feature/test-libslang-include-subdir.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-libslang-include-subdir.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/dma/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/dma/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/dma/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/dma/Makefile</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/dma/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/dma/config</a> (renamed from tools/testing/selftests/dma/config)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/dma/dma_map_benchmark.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/dma/dma_map_benchmark.c</a> (renamed from tools/testing/selftests/dma/dma_map_benchmark.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/check-variable-fonts.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/check-variable-fonts.py</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/checktransupdate.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/checktransupdate.py</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/documentation-file-ref-check?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/documentation-file-ref-check</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/features-refresh.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/features-refresh.sh</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/find-unused-docs.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/find-unused-docs.sh</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/gen-redirects.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/gen-redirects.py</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/gen-renames.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/gen-renames.py</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/get_abi.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/get_abi.py</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/get_feat.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/get_feat.py</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/list-arch.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/list-arch.sh</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/parse-headers.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/parse-headers.py</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/sphinx-build-wrapper?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/sphinx-build-wrapper</a></td><td class='right'>864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/sphinx-pre-install?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/sphinx-pre-install</a></td><td class='right'>1543</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 54.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 45.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/docs/test_doc_build.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/docs/test_doc_build.py</a></td><td class='right'>513</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/gpio/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/gpio/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/iio/iio_event_monitor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/iio/iio_event_monitor.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/asm-generic/bitops/__fls.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/__fls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/asm-generic/bitops/fls.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/fls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/asm-generic/bitops/fls64.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/fls64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/asm-generic/io.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/io.h</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/asm/io.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm/io.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/linux/args.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/args.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/atomic.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/atomic.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/bitmap.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/bitmap.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/bits.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/bits.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/cfi_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/cfi_types.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/compiler.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/compiler.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/gfp_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/gfp_types.h</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/interval_tree_generic.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/interval_tree_generic.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/io.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/io.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/linux/livepatch_external.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/livepatch_external.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/objtool_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/objtool_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/linux/pci_ids.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/pci_ids.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/slab.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/slab.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/static_call_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/static_call_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/linux/string.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/string.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-arm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-arm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-arm64.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-arm64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-loongarch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-loongarch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-m68k.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-m68k.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-mips.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-mips.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-powerpc.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-powerpc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-riscv.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-riscv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-s390.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-s390.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-sh.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-sh.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-sparc.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-sparc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch-x86.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-x86.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/arch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/compiler.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/compiler.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/crt.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/crt.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/dirent.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/dirent.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/getopt.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/getopt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/inttypes.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/inttypes.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/nolibc.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/nolibc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/poll.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/poll.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/stackprotector.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stackprotector.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/std.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/std.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/stdio.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stdio.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/stdlib.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stdlib.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/string.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/string.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/auxv.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/auxv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/mman.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/mman.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/random.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/random.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/reboot.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/reboot.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/select.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/select.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/timerfd.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/timerfd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/uio.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/uio.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/sys/wait.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/wait.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/time.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/time.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/types.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/nolibc/unistd.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/unistd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/asm-generic/unistd.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/asm-generic/unistd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/drm/drm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/drm/drm.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/bpf.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/genetlink.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/genetlink.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/if_addr.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/if_addr.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/kvm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/kvm.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/neighbour.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/neighbour.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/netdev.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/netdev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/netfilter.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/netfilter.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/netfilter_arp.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/netfilter_arp.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/nsfs.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/nsfs.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/perf_event.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/perf_event.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/include/uapi/linux/rtnetlink.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/rtnetlink.h</a></td><td class='right'>848</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 29.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 70.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/bpf_gen_internal.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_gen_internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/bpf_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_helpers.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/bpf_tracing.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_tracing.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/btf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/btf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/btf_dump.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf_dump.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/elf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/elf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/features.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/features.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/gen_loader.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/gen_loader.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf.map?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.map</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf_errno.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_errno.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf_internal.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_internal.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf_probes.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_probes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/libbpf_utils.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_utils.c</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/linker.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/linker.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/relo_core.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/relo_core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/ringbuf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/ringbuf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/skel_internal.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/skel_internal.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/str_error.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/str_error.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/str_error.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/str_error.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/usdt.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/usdt.bpf.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/bpf/usdt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/usdt.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/perf/cpumap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/cpumap.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/perf/include/perf/core.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/include/perf/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/perf/include/perf/event.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/include/perf/event.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/perf/mmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/mmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/__init__.py</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/abi/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/abi/__init__.py</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/abi/abi_parser.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/abi/abi_parser.py</a></td><td class='right'>628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/abi/abi_regex.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/abi/abi_regex.py</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/abi/helpers.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/abi/helpers.py</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/abi/system_symbols.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/abi/system_symbols.py</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/feat/parse_features.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/feat/parse_features.py</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/jobserver.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/jobserver.py</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/__init__.py</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/enrich_formatter.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/enrich_formatter.py</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/kdoc_files.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/kdoc_files.py</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/kdoc_item.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/kdoc_item.py</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/kdoc_output.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/kdoc_output.py</a></td><td class='right'>824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/kdoc_parser.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/kdoc_parser.py</a></td><td class='right'>1670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 58.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 41.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/kdoc_re.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/kdoc_re.py</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/latex_fonts.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/latex_fonts.py</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/parse_data_structs.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/parse_data_structs.py</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/lib/python/kdoc/python_version.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/python/kdoc/python_version.py</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/subcmd/help.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/subcmd/help.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/thermal/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/thermal/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/lib/thermal/libthermal.map?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/thermal/libthermal.map</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/mm/page_owner_sort.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/mm/page_owner_sort.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/mm/slabinfo.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/mm/slabinfo.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/generators/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/generators/__init__.py</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/generators/union.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/generators/union.py</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/sunrpc/xdrgen/xdrgen?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/xdrgen</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/Makefile.deps?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/Makefile.deps</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/lib/ynl-priv.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/lib/ynl-priv.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/lib/ynl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/lib/ynl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/cli.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/cli.py</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/ethtool.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ethtool.py</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/lib/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/__init__.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/lib/doc_generator.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/doc_generator.py</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/lib/nlspec.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/nlspec.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/lib/ynl.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/ynl.py</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/ynl_gen_c.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ynl_gen_c.py</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/pyynl/ynl_gen_rst.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ynl_gen_rst.py</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 13.2%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/samples/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/samples/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/samples/page-pool.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/page-pool.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/samples/tc-filter-add.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/tc-filter-add.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/tests/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/tests/Makefile</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/tests/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/tests/config</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/tests/test_ynl_cli.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/tests/test_ynl_cli.sh</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/tests/test_ynl_ethtool.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/tests/test_ynl_ethtool.sh</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/Makefile</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/json_writer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/json_writer.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/json_writer.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/json_writer.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/main.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/main.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/main.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/main.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/page-pool.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/page-pool.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/net/ynl/ynltool/qstats.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/ynltool/qstats.c</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/Build</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/Makefile</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/loongarch/decode.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/decode.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/loongarch/orc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/orc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/loongarch/special.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/special.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/powerpc/decode.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/powerpc/decode.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/powerpc/special.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/powerpc/special.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/x86/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/Build</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/x86/decode.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/decode.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/x86/orc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/orc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/arch/x86/special.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/special.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/builtin-check.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/builtin-check.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/builtin-klp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/builtin-klp.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/check.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/check.c</a></td><td class='right'>1571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 32.6%;'/><td class='rem' style='width: 22.5%;'/><td class='none' style='width: 45.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/disas.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/disas.c</a></td><td class='right'>1248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 43.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 56.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/elf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/elf.c</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 71.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/arch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/arch.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/builtin.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/builtin.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/check.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/check.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/checksum.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/checksum.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/checksum_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/checksum_types.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/disas.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/disas.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/elf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/elf.h</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/endianness.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/endianness.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/klp.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/klp.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/objtool.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/objtool.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/special.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/special.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/trace.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/trace.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/util.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/include/objtool/warn.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/warn.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/klp-diff.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/klp-diff.c</a></td><td class='right'>1723</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 60.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 39.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/klp-post-link.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/klp-post-link.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/noreturns.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/noreturns.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/objtool.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/objtool.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/orc_dump.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/orc_dump.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/orc_gen.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/orc_gen.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/signal.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/signal.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/special.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/special.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/sync-check.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/sync-check.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/objtool/trace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/trace.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/objtool/weak.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/weak.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/Build.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/Build.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/android.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/android.txt</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/intel-acr.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/intel-acr.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-annotate.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-annotate.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-arm-spe.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-arm-spe.txt</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-bench.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-bench.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-c2c.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-c2c.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-check.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-check.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-config.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-config.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-diff.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-diff.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-list.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-list.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-record.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-record.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-script.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-script.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-timechart.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-timechart.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf-trace.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-trace.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Documentation/perf.data-file-format.txt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf.data-file-format.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Makefile.config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Makefile.config</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/Makefile.perf?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Makefile.perf</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm/annotate/instructions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/annotate/instructions.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm/util/auxtrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/auxtrace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm/util/pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm64/annotate/instructions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/annotate/instructions.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm64/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/Build</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm64/util/arm-spe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/arm-spe.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm64/util/arm64_exception_types.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/arm64_exception_types.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/arm64/util/hisi-ptt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/hisi-ptt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/powerpc/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/powerpc/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/powerpc/util/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/powerpc/util/auxtrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/powerpc/util/auxtrace.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/s390/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/s390/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/util/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/s390/util/auxtrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/util/auxtrace.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/sh/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/sh/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/sparc/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/sparc/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/annotate/instructions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/annotate/instructions.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/entry/syscalls/syscall_32.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/entry/syscalls/syscall_64.tbl</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/tests/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/Build</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/tests/arch-tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/arch-tests.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/tests/intel-pt-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/intel-pt-test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/tests/topdown.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/topdown.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/Build</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/evsel.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/evsel.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/intel-pt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/intel-pt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/kvm-stat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/kvm-stat.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/x86/util/topdown.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/topdown.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/xtensa/entry/syscalls/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/bench.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/bench.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/evlist-open-close.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/evlist-open-close.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/find-bit-bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/find-bit-bench.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/futex.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/futex.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/futex.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/futex.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/mem-functions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-functions.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/mem-memcpy-arch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memcpy-arch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/mem-memcpy-x86-64-asm-def.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memcpy-x86-64-asm-def.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/mem-memset-arch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memset-arch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/mem-memset-x86-64-asm-def.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memset-x86-64-asm-def.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/pmu-scan.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/pmu-scan.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/bench/synthesize.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/synthesize.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-annotate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-annotate.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-bench.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-c2c.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-c2c.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-check.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-check.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-evlist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-evlist.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-inject.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-inject.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-kvm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-kvm.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-kwork.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-kwork.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-list.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-list.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-lock.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-mem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-mem.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-record.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-record.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-report.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-report.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-sched.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-sched.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-script.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-script.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 85.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-stat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-stat.c</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-timechart.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-timechart.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-top.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-top.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/builtin-trace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-trace.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/check-headers.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/check-headers.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/perf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/perf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/Build</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/common/common/legacy-hardware.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/legacy-hardware.json</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/common/common/metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/metrics.json</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/common/common/software.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/software.json</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/common/common/tool.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/tool.json</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/riscv/mapfile.csv?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/riscv/mapfile.csv</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/s390/cf_z16/transaction.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/s390/cf_z16/transaction.json</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/s390/cf_z17/transaction.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/s390/cf_z17/transaction.json</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/cache.json</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/floating-point.json</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/frontend.json</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/memory.json</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/other.json</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/pipeline.json</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlaken/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/cache.json</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/cache.json</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 83.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/frontend.json</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/memory.json</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/other.json</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/other.json</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/grandridge/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/grandridge/cache.json</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/cache.json</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/frontend.json</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/memory.json</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/other.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/cache.json</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/frontend.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/memory.json</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/other.json</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/mapfile.csv?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/mapfile.csv</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/cache.json</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/frontend.json</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/memory.json</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/other.json</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/cache.json</a></td><td class='right'>1163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 40.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 59.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/counter.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/counter.json</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/frontend.json</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/memory.json</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/other.json</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json</a></td><td class='right'>1903</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 66.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 33.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/other.json</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/cache.json</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/empty-pmu-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/empty-pmu-events.c</a></td><td class='right'>2854</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 94.9%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/jevents.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/jevents.py</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/make_legacy_cache.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/make_legacy_cache.py</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/metric.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/metric.py</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/metric_test.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/metric_test.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/pmu-events/pmu-events.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/pmu-events.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/python/ilist.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/python/ilist.py</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/scripts/perl/Perf-Trace-Util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/scripts/perl/Perf-Trace-Util/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/Build</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/builtin-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/builtin-test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/code-reading.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/code-reading.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/hwmon_pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/hwmon_pmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/kallsyms-split.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/kallsyms-split.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/keep-tracking.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/keep-tracking.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/make?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/make</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/maps.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/maps.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/mmap-basic.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/mmap-basic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/parse-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/parse-events.c</a></td><td class='right'>2078</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 38.0%;'/><td class='rem' style='width: 34.8%;'/><td class='none' style='width: 27.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/parse-metric.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/parse-metric.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/perf-record.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/perf-record.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/perf-time-to-tsc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/perf-time-to-tsc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/pfm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pfm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/pmu-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pmu-events.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/python-use.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/python-use.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/amd-ibs-swfilt.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/amd-ibs-swfilt.sh</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/attr/test-stat-default?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-default</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/attr/test-stat-detailed-1?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-1</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/attr/test-stat-detailed-2?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-2</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/attr/test-stat-detailed-3?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-3</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_probe/test_adding_kernel.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_adding_kernel.sh</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_probe/test_basic.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_basic.sh</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_probe/test_invalid_options.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_invalid_options.sh</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_probe/test_line_semantics.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_line_semantics.sh</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_report/setup.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_report/setup.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/base_report/test_basic.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_report/test_basic.sh</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/buildid.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/buildid.sh</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/c2c.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/c2c.sh</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/common/init.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/common/init.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/coresight/thread_loop/thread_loop.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/thread_loop/thread_loop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/evlist.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/evlist.sh</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/jitdump-python.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/jitdump-python.sh</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/kallsyms.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/kallsyms.sh</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/kvm.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/kvm.sh</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/lib/perf_json_output_lint.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lib/perf_json_output_lint.py</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/lib/stat_output.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lib/stat_output.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/lock_contention.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lock_contention.sh</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/python-use.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/python-use.sh</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/record.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/record.sh</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/record_lbr.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/record_lbr.sh</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/record_weak_term.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/record_weak_term.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/script_dlfilter.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/script_dlfilter.sh</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat+csv_output.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+csv_output.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat+event_uniquifying.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+event_uniquifying.sh</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat+json_output.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+json_output.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat+shadow_stat.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+shadow_stat.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat+std_output.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+std_output.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat_all_metricgroups.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat_all_metricgroups.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/stat_all_metrics.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat_all_metrics.sh</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/test_bpf_metadata.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/test_bpf_metadata.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/test_brstack.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/test_brstack.sh</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/test_event_open_fallback.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/test_event_open_fallback.sh</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/timechart.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/timechart.sh</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/top.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/top.sh</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/shell/trace_btf_enum.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/trace_btf_enum.sh</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/switch-tracking.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/switch-tracking.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/tests.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/tests.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/workloads/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/workloads/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/workloads/thloop.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/workloads/thloop.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/tests/workloads/traploop.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/workloads/traploop.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/trace/beauty/include/linux/socket.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/linux/socket.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/trace/beauty/include/uapi/linux/fcntl.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/fcntl.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/trace/beauty/include/uapi/linux/fs.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/fs.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/trace/beauty/include/uapi/linux/prctl.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/prctl.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/trace/beauty/include/uapi/linux/vhost.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/vhost.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/ui/browsers/annotate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/browsers/annotate.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/ui/browsers/hists.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/browsers/hists.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/ui/hist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/hist.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/ui/libslang.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/libslang.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/Build</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/addr2line.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/addr2line.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/addr2line.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/addr2line.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/annotate-data.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate-data.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/annotate-data.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate-data.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/annotate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/annotate.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe-decoder/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/arm-spe.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/auxtrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/auxtrace.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/auxtrace.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/auxtrace.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-event.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-event.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-filter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-filter.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-filter.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-filter.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-trace-summary.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-trace-summary.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-utils.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-utils.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf-utils.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-utils.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_counter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_counter.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_counter_cgroup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter_cgroup.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_ftrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_ftrace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_lock_contention.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_lock_contention.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_map.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_off_cpu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_off_cpu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_skel/bperf_cgroup.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/bperf_cgroup.bpf.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_skel/bperf_cgroup.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/bperf_cgroup.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_skel/kwork_top.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/kwork_top.bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/bpf_skel/sample_filter.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/sample_filter.bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/build-id.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/build-id.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/callchain.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/callchain.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/callchain.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/callchain.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/capstone.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/capstone.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/capstone.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/capstone.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/cgroup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cgroup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/config.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/config.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/cpumap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cpumap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/cs-etm-decoder/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm-decoder/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm-decoder/cs-etm-decoder.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/cs-etm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/debuginfo.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/debuginfo.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/disasm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 21.6%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/disasm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/perf/util/disasm_bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm_bpf.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/perf/util/disasm_bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm_bpf.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/drm_pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/drm_pmu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/dso.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dso.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/dso.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dso.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/dwarf-aux.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dwarf-aux.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/dwarf-aux.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dwarf-aux.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/env.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/env.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/env.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/env.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/event.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/event.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/event.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/event.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evlist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evlist.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evlist.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evlist.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evsel.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evsel.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evsel_config.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel_config.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evsel_fprintf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel_fprintf.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/evswitch.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evswitch.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/expr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/expr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/genelf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/genelf.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/perf/util/get_current_dir_name.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/get_current_dir_name.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/perf/util/get_current_dir_name.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/get_current_dir_name.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/header.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/header.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/header.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/header.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/hisi-ptt-decoder/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hisi-ptt-decoder/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/hist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hist.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/hist.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hist.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/hwmon_pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hwmon_pmu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/hwmon_pmu.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hwmon_pmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/include/linux/linkage.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/include/linux/linkage.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/intel-bts.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-bts.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/intel-pt-decoder/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt-decoder/Build</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/intel-pt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/intel-tpebs.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-tpebs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/jitdump.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/jitdump.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/kvm-stat.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/kvm-stat.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/libbfd.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/libbfd.c</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/libbfd.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/libbfd.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/llvm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/llvm.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/llvm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/llvm.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/lzma.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/lzma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/machine.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/machine.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/map.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/map.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/map.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/maps.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/maps.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/mem-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mem-events.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/metricgroup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/metricgroup.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/metricgroup.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/metricgroup.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/mmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mmap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/mutex.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mutex.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/mutex.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mutex.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/namespaces.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/namespaces.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/parse-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.c</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/parse-events.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/parse-events.l?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.l</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/parse-events.y?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.y</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/perf_api_probe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/perf_api_probe.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/perf_event_attr_fprintf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/perf_event_attr_fprintf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/pfm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pfm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pmu.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/pmu.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pmu.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/powerpc-vpadtl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/powerpc-vpadtl.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/perf/util/powerpc-vpadtl.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/powerpc-vpadtl.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/print-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print-events.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/print-events.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print-events.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/print_insn.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print_insn.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/probe-event.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/probe-event.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/python.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/python.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/s390-sample-raw.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/s390-sample-raw.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/sample.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/sample.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/scripting-engines/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/scripting-engines/Build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/session.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/session.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/session.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/session.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/setup.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/setup.py</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/srcline.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/srcline.c</a></td><td class='right'>772</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 26.0%;'/><td class='none' style='width: 73.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/srcline.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/srcline.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/stat-display.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat-display.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/stat-shadow.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat-shadow.c</a></td><td class='right'>547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 16.8%;'/><td class='none' style='width: 80.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/stat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/stat.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/symbol-elf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol-elf.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/symbol-minimal.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol-minimal.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/symbol.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/synthetic-events.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/synthetic-events.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/synthetic-events.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/synthetic-events.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/tool.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/tool.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/tool_pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool_pmu.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/tool_pmu.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool_pmu.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/tp_pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tp_pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/trace.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/trace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/perf/util/zlib.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/zlib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/os_specific/service_layers/oslinuxtbl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/acpi/tools/acpidump/apdump.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/acpidump/apdump.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/acpi/tools/acpidump/apfiles.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/acpidump/apfiles.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/acpi/tools/pfrut/pfrut.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/pfrut/pfrut.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/Makefile</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/lib/cpuidle.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/lib/cpuidle.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/lib/cpupower.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/lib/cpupower.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/man/cpupower-set.1?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/man/cpupower-set.1</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/utils/cpufreq-info.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/cpufreq-info.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/utils/cpupower-set.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/cpupower-set.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/utils/helpers/helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/helpers/helpers.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/cpupower/utils/helpers/misc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/helpers/misc.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/intel-speed-select/isst-config.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/intel-speed-select/isst-config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/intel-speed-select/isst-core-tpmi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/intel-speed-select/isst-core-tpmi.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/turbostat/turbostat.8?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/turbostat/turbostat.8</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/turbostat/turbostat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/turbostat/turbostat.c</a></td><td class='right'>1209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.4%;'/><td class='rem' style='width: 21.0%;'/><td class='none' style='width: 57.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/x86_energy_perf_policy/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/bpf_arena_common.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/bpf_arena_common.bpf.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/bpf_arena_common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/bpf_arena_common.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/common.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/common.bpf.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/common.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/compat.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/compat.bpf.h</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/compat.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/compat.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/user_exit_info.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/user_exit_info.bpf.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/user_exit_info.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/user_exit_info.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/include/scx/user_exit_info_common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/user_exit_info_common.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_central.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_central.bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_central.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_central.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_cpu0.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_cpu0.bpf.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_cpu0.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_cpu0.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_flatcg.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_flatcg.bpf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_flatcg.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_flatcg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_qmap.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_qmap.bpf.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_qmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_qmap.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/sched_ext/scx_simple.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_simple.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/scripts/syscall.tbl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/scripts/syscall.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/Kbuild?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/Kbuild</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/cxl_core_exports.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/cxl_core_exports.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/exports.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/exports.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/Kbuild?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/cxl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/cxl.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/cxl_translate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/cxl_translate.c</a></td><td class='right'>445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/mem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mem.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/mock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mock.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/cxl/test/mock.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mock.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/ktest/config-bisect.pl?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/ktest/config-bisect.pl</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/configs/arch_uml.config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/configs/arch_uml.config</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/kunit.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/kunit.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/kunit_parser.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/kunit_parser.py</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/qemu_configs/mips.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/qemu_configs/mips.py</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/qemu_configs/mips64.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/qemu_configs/mips64.py</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/qemu_configs/mips64el.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/qemu_configs/mips64el.py</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/qemu_configs/mipsel.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/qemu_configs/mipsel.py</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/kunit/test_data/test_is_test_passed-kselftest.log?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/test_data/test_is_test_passed-kselftest.log</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/nvdimm/test/ndtest.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/nvdimm/test/ndtest.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/nvdimm/test/nfit.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/nvdimm/test/nfit.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/radix-tree/idr-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/radix-tree/idr-test.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/radix-tree/maple.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/radix-tree/maple.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 17.1%;'/><td class='none' style='width: 81.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/scatterlist/linux/mm.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/scatterlist/linux/mm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/acct/acct_syscall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/acct/acct_syscall.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/alsa/conf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/conf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/alsa/mixer-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/mixer-test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/alsa/pcm-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/pcm-test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/alsa/test-pcmtest-driver.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/test-pcmtest-driver.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/alsa/utimer-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/utimer-test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/abi/hwcap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/hwcap.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/abi/ptrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/abi/syscall-abi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/syscall-abi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/abi/tpidr2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/tpidr2.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/bti/assembler.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/bti/assembler.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/fp-ptrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/fp-ptrace.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/fp-stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/fp-stress.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/kernel-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/kernel-test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/sve-probe-vls.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/sve-probe-vls.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/sve-ptrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/sve-ptrace.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/vec-syscfg.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/vec-syscfg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/za-ptrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/za-ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/zt-ptrace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/zt-ptrace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/fp/zt-test.S?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/zt-test.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/gcs/gcs-locking.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/gcs-locking.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/gcs/gcs-stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/gcs-stress.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/pauth/pac.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/pauth/pac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/arm64/tags/tags_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/tags/tags_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/Makefile</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bench.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/bench.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bench.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/benchs/bench_sockmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/bench_sockmap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/run_bench_trigger.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/bpf_util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bpf_util.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/cgroup_helpers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/cgroup_helpers.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/cgroup_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/cgroup_helpers.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config.aarch64?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.aarch64</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config.ppc64el?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.ppc64el</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config.riscv64?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.riscv64</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config.s390x?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.s390x</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/config.x86_64?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.x86_64</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/network_helpers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/network_helpers.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/network_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/network_helpers.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/align.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/align.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/arena_strsearch.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/arena_strsearch.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/arg_parsing.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/arg_parsing.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/atomics.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/atomics.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/attach_probe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/attach_probe.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/bpf_cookie.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_gotox.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/bpf_gotox.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/btf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/btf_dump.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf_dump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/btf_split.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf_split.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/check_mtu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/check_mtu.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/cls_redirect.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cls_redirect.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/dynptr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/dynptr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/fd_array.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fd_array.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/fentry_fexit.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fentry_fexit.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/fentry_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fentry_test.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/fexit_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fexit_test.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/file_reader.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/file_reader.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/free_timer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/free_timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/htab_update.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/htab_update.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/kernel_flag.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kernel_flag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/map_excl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/map_excl.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/module_attach.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/module_attach.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/mptcp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/mptcp.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/perf_branches.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/perf_branches.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/pinning_htab.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/pinning_htab.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/reg_bounds.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/reg_bounds.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/res_spin_lock.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/ringbuf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/ringbuf.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/select_reuseport.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/select_reuseport.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/send_signal.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/send_signal.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/sha256.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/sha256.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/socket_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/socket_helpers.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/spin_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/spin_lock.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/stream.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stream.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/string_kfuncs.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/string_kfuncs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/task_local_data.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/task_local_data.h</a></td><td class='right'>386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/task_work_stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/task_work_stress.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_bpf_smc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_bpf_smc.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_lsm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_lsm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_struct_ops_id_ops_mapping.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_struct_ops_id_ops_mapping.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_task_local_data.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_task_local_data.c</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_task_work.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_task_work.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_tc_edt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_tc_edt.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_tc_tunnel.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_tc_tunnel.c</a></td><td class='right'>714</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_tunnel.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_tunnel.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_veristat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_veristat.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_xsk.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_xsk.c</a></td><td class='right'>2596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 91.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 9.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/test_xsk.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/test_xsk.h</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/timer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/timer.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/timer_crash.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/timer_crash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/timer_lockup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/timer_lockup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/timer_mim.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/timer_mim.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/tracing_struct.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/tracing_struct.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/uprobe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/uprobe.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/uprobe_syscall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/uprobe_syscall.c</a></td><td class='right'>484</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/usdt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/usdt.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/verifier.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/verifier.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/wq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/wq.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_context_test_run.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/xdp_context_test_run.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_devmap_attach.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/xdp_devmap_attach.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_pull_data.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/xdp_pull_data.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/prog_tests/xsk.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/xsk.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/arena_atomics.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/arena_atomics.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/arena_spin_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/arena_spin_lock.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/arena_strsearch.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/arena_strsearch.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_cc_cubic.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_cc_cubic.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_cubic.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_cubic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_dctcp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_dctcp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_gotox.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_gotox.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_iter_setsockopt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_iter_setsockopt.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_iter_tcp4.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_iter_tcp4.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_iter_tcp6.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_iter_tcp6.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_iter_udp4.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_iter_udp4.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_iter_udp6.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_iter_udp6.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_misc.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_misc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_smc.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_smc.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_test_utils.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_test_utils.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/bpf_tracing_net.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/bpf_tracing_net.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/cgroup_read_xattr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/cgroup_read_xattr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/cgrp_kfunc_success.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/cgrp_kfunc_success.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/connect4_prog.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/connect4_prog.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/crypto_sanity.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/crypto_sanity.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/dynptr_fail.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/dynptr_fail.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/dynptr_success.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/dynptr_success.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/exceptions_assert.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/exceptions_assert.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/file_reader.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/file_reader.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/file_reader_fail.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/file_reader_fail.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/freplace_connect_v4_prog.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/freplace_connect_v4_prog.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/htab_update.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/htab_update.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/ip_check_defrag.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/ip_check_defrag.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/iters_looping.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/iters_looping.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/iters_state_safety.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/iters_state_safety.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/iters_task_failure.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/iters_task_failure.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/iters_testmod.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/iters_testmod.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/iters_testmod_seq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/iters_testmod_seq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/kprobe_write_ctx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/kprobe_write_ctx.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/linked_list_fail.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/linked_list_fail.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/livepatch_trampoline.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/livepatch_trampoline.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/loop1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/loop1.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/loop2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/loop2.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/loop3.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/loop3.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/loop6.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/loop6.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/lpm_trie.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/lpm_trie.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/lpm_trie_bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/lpm_trie_bench.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/lpm_trie_map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/lpm_trie_map.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/lsm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/lsm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/lsm_tailcall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/lsm_tailcall.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/map_excl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/map_excl.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/mem_rdonly_untrusted.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/mem_rdonly_untrusted.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/mptcp_sockmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/mptcp_sockmap.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/mptcp_subflow.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/mptcp_subflow.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/rbtree_search.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/rbtree_search.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/rcu_read_lock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/rcu_read_lock.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/refcounted_kptr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/refcounted_kptr.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/ringbuf_bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/ringbuf_bench.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/sk_bypass_prot_mem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/sk_bypass_prot_mem.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/stacktrace_ips.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/stacktrace_ips.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/stacktrace_map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/stacktrace_map.c</a> (renamed from tools/testing/selftests/bpf/progs/test_stacktrace_map.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/stream.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/stream.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/stream_fail.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/stream_fail.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/string_kfuncs_failure1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/string_kfuncs_failure1.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/string_kfuncs_failure2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/string_kfuncs_failure2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/string_kfuncs_success.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/string_kfuncs_success.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/strobemeta.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/strobemeta.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/struct_ops_id_ops_mapping1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/struct_ops_id_ops_mapping1.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/struct_ops_id_ops_mapping2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/struct_ops_id_ops_mapping2.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/struct_ops_kptr_return.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/struct_ops_kptr_return.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/struct_ops_refcounted.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/struct_ops_refcounted.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy1.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy3.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy_fentry.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tailcall_bpf2bpf_hierarchy_fentry.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/task_local_data.bpf.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/task_local_data.bpf.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/task_work.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/task_work.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/task_work_fail.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/task_work_fail.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/task_work_stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/task_work_stress.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tcp_ca_write_sk_pacing.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tcp_ca_write_sk_pacing.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_check_mtu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_check_mtu.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_cls_redirect.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_cls_redirect.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_cls_redirect_dynptr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_cls_redirect_dynptr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_overhead.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_overhead.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_perf_branches.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_perf_branches.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_pinning_devmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_pinning_devmap.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_pinning_htab.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_pinning_htab.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_ringbuf_overwrite.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_ringbuf_overwrite.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_task_local_data.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_task_local_data.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_tc_edt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_tc_edt.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_tc_tunnel.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_tc_tunnel.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_tcp_hdr_options.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_tcp_hdr_options.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_tcpnotify_kern.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_tcpnotify_kern.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_uprobe.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_uprobe.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_usdt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_usdt.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_xdp_devmap_tailcall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_xdp_devmap_tailcall.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_xdp_meta.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_xdp_meta.c</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 77.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/test_xdp_pull_data.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/test_xdp_pull_data.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/timer_interrupt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/timer_interrupt.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/tracing_struct.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/tracing_struct.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/trigger_bench.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/trigger_bench.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/uprobe_syscall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/uprobe_syscall.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/uprobe_syscall_executed.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/uprobe_syscall_executed.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/uretprobe_stack.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/uretprobe_stack.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_arena_large.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_arena_large.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_async_cb_context.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_async_cb_context.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_bounds.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_bounds.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_bpf_fastcall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_bpf_fastcall.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_ctx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_ctx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_direct_packet_access.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_direct_packet_access.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_global_ptr_args.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_global_ptr_args.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_gotox.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_gotox.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_ldsx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_ldsx.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_live_stack.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_live_stack.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_loops1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_loops1.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_lsm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_lsm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_map_ptr.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_map_ptr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_may_goto_1.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_may_goto_1.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_mul.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_mul.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_netfilter_ctx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_netfilter_ctx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_precision.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_precision.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_scalar_ids.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_scalar_ids.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_sock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_sock.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_spill_fill.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_spill_fill.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_subprog_precision.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_subprog_precision.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_value_illegal_alu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_value_illegal_alu.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_var_off.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_var_off.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/verifier_vfs_accept.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/verifier_vfs_accept.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/wq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/wq.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/progs/wq_failures.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/progs/wq_failures.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_bpftool_build.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_bpftool_build.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_kmods/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_kmods/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_kmods/bpf_test_rqspinlock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_kmods/bpf_test_rqspinlock.c</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_kmods/bpf_testmod.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_kmods/bpf_testmod.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_kmods/bpf_testmod.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_kmods/bpf_testmod.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_kmods/bpf_testmod_kfunc.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_kmods/bpf_testmod_kfunc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_lirc_mode2_user.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_lirc_mode2_user.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_loader.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_loader.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_maps.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_maps.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_progs.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_progs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_progs.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_progs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_sockmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_sockmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_tag.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_tag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_tc_edt.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_tc_edt.sh</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_tc_tunnel.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_tc_tunnel.sh</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.2%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_tcpnotify_user.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_tcpnotify_user.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/test_xsk.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/test_xsk.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/testing_helpers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/testing_helpers.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/testing_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/testing_helpers.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/trace_helpers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/trace_helpers.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/trace_helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/trace_helpers.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/usdt.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/usdt.h</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/verifier/bpf_st_mem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/verifier/bpf_st_mem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/verifier/calls.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/verifier/calls.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/verify_sig_setup.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/verify_sig_setup.sh</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/veristat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/veristat.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/xdping.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/xdping.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/xsk.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/xsk.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/xskxceiver.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/xskxceiver.c</a></td><td class='right'>2526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 87.2%;'/><td class='none' style='width: 11.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/bpf/xskxceiver.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/xskxceiver.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/breakpoints/breakpoint_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/breakpoints/breakpoint_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/breakpoints/breakpoint_test_arm64.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/breakpoints/breakpoint_test_arm64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/breakpoints/step_after_suspend_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/breakpoints/step_after_suspend_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cachestat/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cachestat/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cachestat/test_cachestat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cachestat/test_cachestat.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/capabilities/test_execve.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/capabilities/test_execve.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/capabilities/validate_cap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/capabilities/validate_cap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/lib/cgroup_util.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/lib/cgroup_util.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/lib/include/cgroup_util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/lib/include/cgroup_util.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_core.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_cpu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_cpu.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_cpuset.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_cpuset.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_freezer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_freezer.c</a></td><td class='right'>672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 76.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_hugetlb_memcg.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_hugetlb_memcg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_kill.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_kill.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_kmem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_kmem.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_memcontrol.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_memcontrol.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_pids.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_pids.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/cgroup/test_zswap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/cgroup/test_zswap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/clone3/clone3.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/clone3/clone3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/clone3/clone3_clear_sighand.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/clone3/clone3_clear_sighand.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/clone3/clone3_selftests.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/clone3/clone3_selftests.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/clone3/clone3_set_tid.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/clone3/clone3_set_tid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/connector/proc_filter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/connector/proc_filter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/core/close_range_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/core/close_range_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/core/unshare_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/core/unshare_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/.gitignore</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/coredump_socket_protocol_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/coredump_socket_protocol_test.c</a></td><td class='right'>1568</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 54.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 45.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/coredump_socket_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/coredump_socket_test.c</a></td><td class='right'>742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/coredump_test.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/coredump_test.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/coredump_test_helpers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/coredump_test_helpers.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/coredump/stackdump_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/coredump/stackdump_test.c</a></td><td class='right'>1667</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 58.3%;'/><td class='none' style='width: 41.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/_damon_sysfs.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/_damon_sysfs.py</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/access_memory_even.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/access_memory_even.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/drgn_dump_damon_status.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/drgn_dump_damon_status.py</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/sysfs.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/sysfs.py</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/damon/sysfs_no_op_commit_break.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/damon/sysfs_no_op_commit_break.py</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/dma/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/dma/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/dmabuf-heaps/dmabuf-heap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/dmabuf-heaps/dmabuf-heap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/dma-buf/udmabuf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/dma-buf/udmabuf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_ipsec_offload.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_ipsec_offload.sh</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_lacp_prio.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_lacp_prio.sh</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_macvlan_ipvlan.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_macvlan_ipvlan.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_options.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_options.sh</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_passive_lacp.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_passive_lacp.sh</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_topo_2d1c.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_topo_2d1c.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/bond_topo_3d1c.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/bond_topo_3d1c.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/config</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/bonding/netcons_over_bonding.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/bonding/netcons_over_bonding.sh</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/config</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/dsa/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/dsa/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/gro.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/gro.c</a> (renamed from tools/testing/selftests/net/gro.c)</td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/gro.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/gro.py</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hds.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hds.py</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/config</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/csum.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/csum.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/devlink_rate_tc_bw.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/devlink_rate_tc_bw.py</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/devmem.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/devmem.py</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/lib/py/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/lib/py/__init__.py</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/ncdevmem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/ncdevmem.c</a></td><td class='right'>856</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.0%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 70.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/nic_timestamp.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/nic_timestamp.py</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/pp_alloc_fail.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/pp_alloc_fail.py</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/rss_ctx.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/rss_ctx.py</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/rss_flow_label.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/rss_flow_label.py</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/toeplitz.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/toeplitz.c</a> (renamed from tools/testing/selftests/net/toeplitz.c)</td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/toeplitz.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/toeplitz.py</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/hw/tso.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/hw/tso.py</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/lib/py/__init__.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/lib/py/__init__.py</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/lib/py/env.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/lib/py/env.py</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/lib/py/load.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/lib/py/load.py</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/lib/sh/lib_netcons.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/lib/sh/lib_netcons.sh</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/mlxsw/devlink_trap_policer.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/mlxsw/devlink_trap_policer.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/mlxsw/qos_ets_strict.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/mlxsw/qos_ets_strict.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/mlxsw/qos_max_descriptors.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/mlxsw/qos_max_descriptors.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/mlxsw/qos_mc_aware.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/mlxsw/qos_mc_aware.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/mlxsw/sch_red_core.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/mlxsw/sch_red_core.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/napi_threaded.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/napi_threaded.py</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netcons_basic.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netcons_basic.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netcons_cmdline.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netcons_cmdline.sh</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netcons_overflow.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netcons_overflow.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netcons_torture.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netcons_torture.sh</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netdevsim/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netdevsim/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netdevsim/devlink.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netdevsim/devlink.sh</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/netdevsim/ethtool-ring.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/netdevsim/ethtool-ring.sh</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/psp.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/psp.py</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/psp_responder.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/psp_responder.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/ring_reconfig.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/ring_reconfig.py</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/stats.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/stats.py</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/team/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/team/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/team/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/team/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/team/options.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/team/options.sh</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/virtio_net/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/virtio_net/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/net/xdp.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/net/xdp.py</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/ntsync/ntsync.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/ntsync/ntsync.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/drivers/s390x/uvdevice/test_uvdevice.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/drivers/s390x/uvdevice/test_uvdevice.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/check-exec.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/check-exec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/execveat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/execveat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/load_address.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/load_address.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/non-regular.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/non-regular.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/null-argv.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/null-argv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/exec/recursion-depth.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/exec/recursion-depth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/fchmodat2/fchmodat2_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/fchmodat2/fchmodat2_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filelock/ofdlocks.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filelock/ofdlocks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/anon_inode_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/anon_inode_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/binderfs/binderfs_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/binderfs/binderfs_test.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/devpts_pts.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/devpts_pts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/epoll/epoll_wakeup_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/epoll/epoll_wakeup_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/eventfd/eventfd_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/eventfd/eventfd_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/fclog.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/fclog.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/file_stressor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/file_stressor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/fuse/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/fuse/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/fuse/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/fuse/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/fuse/fuse_mnt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/fuse/fuse_mnt.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/fuse/fusectl_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/fuse/fusectl_test.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/kernfs_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/kernfs_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/mount-notify/mount-notify_test_ns.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/mount-notify/mount-notify_test_ns.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/nsfs/iterate_mntns.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/nsfs/iterate_mntns.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/overlayfs/dev_in_maps.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/overlayfs/dev_in_maps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/overlayfs/set_layers_via_fds.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/overlayfs/set_layers_via_fds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/statmount/listmount_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/statmount/listmount_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/statmount/statmount_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/statmount/statmount_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/statmount/statmount_test_ns.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/statmount/statmount_test_ns.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/filesystems/utils.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/filesystems/utils.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/ftracetest?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/ftracetest</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/00basic/mount_options.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/00basic/mount_options.tc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/00basic/trace_marker_raw.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/00basic/trace_marker_raw.tc</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/dynevent/add_remove_fprobe.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/dynevent/add_remove_fprobe.tc</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/dynevent/enable_disable_tprobe.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/dynevent/enable_disable_tprobe.tc</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/filter/event-filter-function.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/filter/event-filter-function.tc</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ftrace/test.d/functions?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ftrace/test.d/functions</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_numa.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_numa.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_numa_mpol.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_numa_mpol.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_priv_hash.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_priv_hash.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_requeue.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_requeue.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_requeue_pi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_requeue_pi.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_wait_uninitialized_heap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_wait_uninitialized_heap.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_wait_wouldblock.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_wait_wouldblock.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/futex_waitv.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/futex_waitv.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/futex/functional/run.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/futex/functional/run.sh</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/hid/vmtest.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/hid/vmtest.sh</a></td><td class='right'>668</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 8.6%;'/><td class='none' style='width: 76.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/intel_pstate/aperf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/intel_pstate/aperf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/iommu/iommufd.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/iommu/iommufd.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/iommu/iommufd_fail_nth.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/iommu/iommufd_fail_nth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/iommu/iommufd_utils.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/iommu/iommufd_utils.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ipc/msgque.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ipc/msgque.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ir/ir_loopback.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ir/ir_loopback.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kcmp/kcmp_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kcmp/kcmp_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kho/init.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kho/init.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kho/vmtest.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kho/vmtest.sh</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kselftest_harness/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kselftest_harness/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kselftest_harness/harness-selftest.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kselftest_harness/harness-selftest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/Makefile.kvm?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/Makefile.kvm</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/access_tracking_perf_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/access_tracking_perf_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/aarch32_id_regs.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/aarch32_id_regs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/arch_timer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/arch_timer.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/at.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/at.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/debug-exceptions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/debug-exceptions.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/external_aborts.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/external_aborts.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/get-reg-list.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/get-reg-list.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/hello_el2.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/hello_el2.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/hypercalls.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/hypercalls.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/kvm-uuid.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/kvm-uuid.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/no-vgic-v3.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/no-vgic-v3.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/page_fault_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/page_fault_test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/psci_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/psci_test.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/sea_to_user.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/sea_to_user.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/set_id_regs.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/set_id_regs.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/smccc_filter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/smccc_filter.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/vgic_init.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/vgic_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/vgic_irq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/vgic_irq.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/vgic_lpi_stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/vgic_lpi_stress.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/arm64/vpmu_counter_access.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/arm64/vpmu_counter_access.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/dirty_log_perf_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/dirty_log_perf_test.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/dirty_log_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/dirty_log_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/get-reg-list.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/get-reg-list.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/guest_memfd_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/guest_memfd_test.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 87.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/arch_timer.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/arch_timer.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/gic.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/gic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/gic_v3_its.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/gic_v3_its.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/processor.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/processor.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/arm64/vgic.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/arm64/vgic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/kvm_syscalls.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/kvm_syscalls.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/kvm_util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/kvm_util.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/loongarch/arch_timer.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/loongarch/arch_timer.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/loongarch/processor.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/loongarch/processor.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/numaif.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/numaif.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/riscv/processor.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/riscv/processor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/test_util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/test_util.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/x86/pmu.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/x86/pmu.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/x86/processor.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/x86/processor.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/include/x86/vmx.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/include/x86/vmx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/irqfd_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/irqfd_test.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/kvm_binary_stats_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/kvm_binary_stats_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/gic.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/gic.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/gic_private.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/gic_private.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/gic_v3.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/gic_v3.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/gic_v3_its.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/gic_v3_its.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/processor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/processor.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/arm64/vgic.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/arm64/vgic.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/kvm_util.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/kvm_util.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/loongarch/exception.S?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/loongarch/exception.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/loongarch/processor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/loongarch/processor.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/s390/processor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/s390/processor.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/test_util.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/test_util.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/x86/memstress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/x86/memstress.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/x86/pmu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/x86/pmu.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/x86/processor.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/x86/processor.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/lib/x86/vmx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/lib/x86/vmx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/loongarch/arch_timer.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/loongarch/arch_timer.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/memslot_modification_stress_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/memslot_modification_stress_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/memslot_perf_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/memslot_perf_test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/mmu_stress_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/mmu_stress_test.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/pre_fault_memory_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/pre_fault_memory_test.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/riscv/get-reg-list.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/riscv/get-reg-list.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/s390/cmma_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/s390/cmma_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/s390/cpumodel_subfuncs_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/s390/cpumodel_subfuncs_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/s390/ucontrol_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/s390/ucontrol_test.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/s390/user_operexec.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/s390/user_operexec.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/set_memory_region_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/set_memory_region_test.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/steal_time.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/steal_time.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/fastops_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/fastops_test.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/hyperv_cpuid.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/hyperv_cpuid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/hyperv_features.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/hyperv_features.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/hyperv_ipi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/hyperv_ipi.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/hyperv_tlb_flush.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/hyperv_tlb_flush.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/monitor_mwait_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/monitor_mwait_test.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/msrs_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/msrs_test.c</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/nested_close_kvm_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/nested_close_kvm_test.c</a> (renamed from tools/testing/selftests/kvm/x86/vmx_close_while_nested_test.c)</td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/nested_invalid_cr3_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/nested_invalid_cr3_test.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/nested_tsc_adjust_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/nested_tsc_adjust_test.c</a> (renamed from tools/testing/selftests/kvm/x86/vmx_tsc_adjust_test.c)</td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/nested_tsc_scaling_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/nested_tsc_scaling_test.c</a> (renamed from tools/testing/selftests/kvm/x86/vmx_nested_tsc_scaling_test.c)</td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/pmu_counters_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/pmu_counters_test.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/pmu_event_filter_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/pmu_event_filter_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/private_mem_conversions_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/private_mem_conversions_test.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/sev_smoke_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/sev_smoke_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/state_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/state_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/userspace_io_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/userspace_io_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/vmx_dirty_log_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/vmx_dirty_log_test.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/vmx_nested_la57_state_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/vmx_nested_la57_state_test.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/vmx_pmu_caps_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/vmx_pmu_caps_test.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/xapic_ipi_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/xapic_ipi_test.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/xapic_state_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/xapic_state_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/kvm/x86/xcr0_cpuid_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/kvm/x86/xcr0_cpuid_test.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/landlock/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/landlock/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/landlock/common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/landlock/common.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/landlock/fs_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/landlock/fs_test.c</a></td><td class='right'>1474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 51.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 48.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/liveupdate/do_kexec.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/liveupdate/do_kexec.sh</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/lsm/lsm_get_self_attr_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/lsm/lsm_get_self_attr_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/lsm/lsm_list_modules_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/lsm/lsm_list_modules_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/media_tests/media_device_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/media_tests/media_device_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/membarrier/membarrier_test_impl.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/membarrier/membarrier_test_impl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mincore/mincore_selftest.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mincore/mincore_selftest.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/compaction_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/compaction_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/cow.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/cow.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/droppable.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/droppable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/guard-regions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/guard-regions.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/gup_longterm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/gup_longterm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/gup_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/gup_test.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hmm-tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hmm-tests.c</a></td><td class='right'>926</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 67.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugepage-mmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugepage-mmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugepage-mremap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugepage-mremap.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb-madvise.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb-madvise.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb-read-hwpoison.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb-read-hwpoison.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb-soft-offline.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb-soft-offline.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb_dio.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb_dio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb_fault_after_madv.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb_fault_after_madv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/hugetlb_madv_vs_map.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/hugetlb_madv_vs_map.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/khugepaged.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/khugepaged.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/ksm_functional_tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/ksm_functional_tests.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/ksm_tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/ksm_tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/madv_populate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/madv_populate.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/map_fixed_noreplace.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/map_fixed_noreplace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/map_hugetlb.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/map_hugetlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/map_populate.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/map_populate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mdwe_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mdwe_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/memfd_secret.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/memfd_secret.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/merge.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/merge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/migration.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/migration.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mkdirty.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mkdirty.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mlock-random-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mlock-random-test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mlock2-tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mlock2-tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mrelease_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mrelease_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mremap_dontunmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mremap_dontunmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mremap_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mremap_test.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/mseal_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/mseal_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/on-fault-limit.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/on-fault-limit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/pagemap_ioctl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/pagemap_ioctl.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/pfnmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/pfnmap.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/pkey-helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/pkey-helpers.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/pkey_sighandler_tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/pkey_sighandler_tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/prctl_thp_disable.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/prctl_thp_disable.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/process_madv.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/process_madv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/protection_keys.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/protection_keys.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/rmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/rmap.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/run_vmtests.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/run_vmtests.sh</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/soft-dirty.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/soft-dirty.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/split_huge_page_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/split_huge_page_test.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 83.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/test_vmalloc.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/test_vmalloc.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/thp_settings.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/thp_settings.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/thp_settings.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/thp_settings.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/thuge-gen.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/thuge-gen.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/transhuge-stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/transhuge-stress.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/uffd-common.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/uffd-common.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/uffd-common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/uffd-common.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/uffd-stress.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/uffd-stress.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/uffd-unit-tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/uffd-unit-tests.c</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 9.6%;'/><td class='none' style='width: 79.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/uffd-wp-mremap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/uffd-wp-mremap.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/va_high_addr_switch.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/va_high_addr_switch.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/va_high_addr_switch.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/va_high_addr_switch.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/virtual_address_range.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/virtual_address_range.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/vm_util.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/vm_util.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mm/vm_util.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mm/vm_util.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mount_setattr/mount_setattr_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mount_setattr/mount_setattr_test.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/move_mount_set_group/move_mount_set_group_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/move_mount_set_group/move_mount_set_group_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mqueue/mq_open_tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mqueue/mq_open_tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mqueue/mq_perf_tests.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mqueue/mq_perf_tests.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/mseal_system_mappings/sysmap_is_sealed.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/mseal_system_mappings/sysmap_is_sealed.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/.gitignore</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/config</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/cred_change_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/cred_change_test.c</a></td><td class='right'>814</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/file_handle_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/file_handle_test.c</a></td><td class='right'>1429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 50.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 49.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/init_ino_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/init_ino_test.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/listns_efault_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/listns_efault_test.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/listns_pagination_bug.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/listns_pagination_bug.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/listns_permissions_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/listns_permissions_test.c</a></td><td class='right'>759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/listns_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/listns_test.c</a></td><td class='right'>679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/ns_active_ref_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/ns_active_ref_test.c</a></td><td class='right'>2672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 93.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 6.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/namespaces/nsid_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/namespaces/nsid_test.c</a></td><td class='right'>981</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 34.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 65.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/af_unix/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/af_unix/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/af_unix/diag_uid.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/af_unix/diag_uid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/af_unix/msg_oob.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/af_unix/msg_oob.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/af_unix/scm_inq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/af_unix/scm_inq.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/af_unix/unix_connreset.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/af_unix/unix_connreset.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/arp_ndisc_evict_nocarrier.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/arp_ndisc_evict_nocarrier.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/bareudp.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/bareudp.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/bind_bhash.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/bind_bhash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/bind_wildcard.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/bind_wildcard.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/bpf_offload.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/bpf_offload.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/broadcast_ether_dst.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/broadcast_ether_dst.sh</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/busy_poll_test.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/busy_poll_test.sh</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/busy_poller.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/busy_poller.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/can/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/can/config</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/can/test_raw_filter.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/can/test_raw_filter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/cmsg_sender.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/cmsg_sender.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/config</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/fcnal-ipv4.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/fcnal-ipv4.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/fcnal-ipv6.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/fcnal-ipv6.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/bridge_activity_notify.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/bridge_activity_notify.sh</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/bridge_fdb_local_vlan_0.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/bridge_fdb_local_vlan_0.sh</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/bridge_mdb.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/bridge_mdb.sh</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/config</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/custom_multipath_hash.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/custom_multipath_hash.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/gre_custom_multipath_hash.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/gre_custom_multipath_hash.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/ip6_forward_instats_vrf.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/ip6_forward_instats_vrf.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/ip6gre_custom_multipath_hash.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/ip6gre_custom_multipath_hash.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/lib.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/lib.sh</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/lib_sh_test.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/lib_sh_test.sh</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/local_termination.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/local_termination.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/mirror_gre_bridge_1q_lag.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/mirror_gre_bridge_1q_lag.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/mirror_gre_vlan_bridge_1q.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/router.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/router.sh</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/sch_ets_core.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/sch_ets_core.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/sch_red.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/sch_red.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/sch_tbf_core.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/sch_tbf_core.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/vxlan_bridge_1q_mc_ul.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/vxlan_bridge_1q_mc_ul.sh</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/forwarding/vxlan_reserved.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/forwarding/vxlan_reserved.sh</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/gro.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/gro.sh</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/hsr/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/hsr/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/hsr/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/hsr/config</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/io_uring_zerocopy_tx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/io_uring_zerocopy_tx.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ip_local_port_range.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ip_local_port_range.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ipsec.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ipsec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ipv6_fragmentation.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ipv6_fragmentation.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/lib/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/lib/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/lib/ksft_setup_loopback.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/lib/ksft_setup_loopback.sh</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/diag.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/diag.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_connect.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_connect.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_connect.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_connect.sh</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_inq.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_inq.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_join.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_join.sh</a></td><td class='right'>582</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 79.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_lib.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_lib.sh</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_sockopt.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_sockopt.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/mptcp_sockopt.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/mptcp_sockopt.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/pm_netlink.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/pm_netlink.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/pm_nl_ctl.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/pm_nl_ctl.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/simult_flows.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/simult_flows.sh</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/mptcp/userspace_pm.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/mptcp/userspace_pm.sh</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/Makefile</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/config</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/conntrack_clash.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/conntrack_clash.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/conntrack_dump_flush.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/conntrack_dump_flush.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/conntrack_resize.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/conntrack_resize.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/nf_nat_edemux.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/nf_nat_edemux.sh</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/nft_concat_range.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/nft_concat_range.sh</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/nft_fib.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/nft_fib.sh</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/nft_flowtable.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/nft_flowtable.sh</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/nft_nat.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/nft_nat.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/sctp_collision.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/sctp_collision.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netfilter/udpclash.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netfilter/udpclash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/netlink-dumps.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/netlink-dumps.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/openvswitch/openvswitch.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/openvswitch/openvswitch.sh</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/openvswitch/ovs-dpctl.py?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/openvswitch/ovs-dpctl.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ovpn/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ovpn/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ovpn/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ovpn/config</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ovpn/ovpn-cli.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ovpn/ovpn-cli.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/config</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/defaults.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/defaults.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/ksft_runner.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/ksft_runner.sh</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_close_no_rst.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_close_no_rst.pkt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-cookie-not-reqd.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-cookie-not-reqd.pkt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-no-setsockopt.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-no-setsockopt.pkt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-non-tfo-listener.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-non-tfo-listener.pkt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-pure-syn-data.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-pure-syn-data.pkt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-rw.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-rw.pkt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-zero-payload.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_basic-zero-payload.pkt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_client-ack-dropped-then-recovery-ms-timestamps.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_client-ack-dropped-then-recovery-ms-timestamps.pkt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_experimental_option.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_experimental_option.pkt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_fin-close-socket.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_fin-close-socket.pkt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_icmp-before-accept.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_icmp-before-accept.pkt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-after-accept.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-after-accept.pkt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-before-accept.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-before-accept.pkt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-close-with-unread-data.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-close-with-unread-data.pkt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-non-tfo-socket.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_reset-non-tfo-socket.pkt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_sockopt-fastopen-key.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_sockopt-fastopen-key.pkt</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-listener-closed.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-listener-closed.pkt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-reconnect.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-reconnect.pkt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-unread-data-closed.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_fastopen_server_trigger-rst-unread-data-closed.pkt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_rto_synack_rto_max.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_rto_synack_rto_max.pkt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_syscall_bad_arg_sendmsg-empty-iov.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_syscall_bad_arg_sendmsg-empty-iov.pkt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_user_timeout_user-timeout-probe.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_user_timeout_user-timeout-probe.pkt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_basic.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_basic.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_batch.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_batch.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_client.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_client.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_closed.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_closed.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_edge.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_edge.pkt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_exclusive.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_exclusive.pkt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_oneshot.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_epoll_oneshot.pkt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_fastopen-client.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_fastopen-client.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_fastopen-server.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_fastopen-server.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_maxfrags.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_maxfrags.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/packetdrill/tcp_zerocopy_small.pkt?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/packetdrill/tcp_zerocopy_small.pkt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/pmtu.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/pmtu.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/proc_net_pktgen.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/proc_net_pktgen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/psock_fanout.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/psock_fanout.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/psock_lib.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/psock_lib.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/psock_tpacket.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/psock_tpacket.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/rds/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/rds/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/reuseaddr_ports_exhausted.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/reuseaddr_ports_exhausted.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/reuseport_bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/reuseport_bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/reuseport_bpf_numa.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/reuseport_bpf_numa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/route_hint.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/route_hint.sh</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/rps_default_mask.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/rps_default_mask.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/rtnetlink.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/rtnetlink.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/rxtimestamp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/rxtimestamp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/sctp_hello.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/sctp_hello.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/sctp_vrf.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/sctp_vrf.sh</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/setup_loopback.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/setup_loopback.sh</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/setup_veth.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/setup_veth.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/sk_so_peek_off.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/sk_so_peek_off.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/so_incoming_cpu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/so_incoming_cpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/so_txtime.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/so_txtime.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/socket.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/socket.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tcp_ao/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tcp_ao/config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tcp_ao/lib/setup.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tcp_ao/lib/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tcp_fastopen_backup_key.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tcp_fastopen_backup_key.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tcp_port_share.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tcp_port_share.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/test_bridge_backup_port.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/test_bridge_backup_port.sh</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/test_vxlan_fdb_changelink.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/test_vxlan_fdb_changelink.sh</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/test_vxlan_nh.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/test_vxlan_nh.sh</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tfo_passive.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tfo_passive.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tls.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tls.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/toeplitz.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/toeplitz.sh</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/toeplitz_client.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/toeplitz_client.sh</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/traceroute.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/traceroute.sh</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 80.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/tun.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/tun.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/txtimestamp.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/txtimestamp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/udpgso_bench_tx.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/udpgso_bench_tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/vlan_bridge_binding.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/vlan_bridge_binding.sh</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/net/ynl.mk?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/net/ynl.mk</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/nolibc/Makefile.nolibc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/nolibc/Makefile.nolibc</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/nolibc/nolibc-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/nolibc/nolibc-test.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/nolibc/run-tests.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/nolibc/run-tests.sh</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/openat2/helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/openat2/helpers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/openat2/openat2_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/openat2/openat2_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/openat2/rename_attack_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/openat2/rename_attack_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/openat2/resolve_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/openat2/resolve_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pci_endpoint/pci_endpoint_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pci_endpoint/pci_endpoint_test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/perf_events/mmap.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/perf_events/mmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/perf_events/remove_on_exec.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/perf_events/remove_on_exec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/perf_events/sigtrap_threads.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/perf_events/sigtrap_threads.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/perf_events/watermark_signal.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/perf_events/watermark_signal.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pid_namespace/pid_max.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pid_namespace/pid_max.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pid_namespace/regression_enomem.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pid_namespace/regression_enomem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_bind_mount.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_bind_mount.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_fdinfo_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_fdinfo_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_file_handle_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_file_handle_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_getfd_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_getfd_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_info_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_info_test.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_open_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_open_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_poll_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_poll_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_setattr_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_setattr_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_setns_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_setns_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_wait.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_wait.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/pidfd/pidfd_xattr_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/pidfd/pidfd_xattr_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/powerpc/include/instructions.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/powerpc/include/instructions.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/prctl/set-anon-vma-name-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/prctl/set-anon-vma-name-test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/prctl/set-process-name.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/prctl/set-process-name.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/proc-maps-race.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/proc-maps-race.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/proc-net-dev-lseek.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/proc-net-dev-lseek.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/proc-pid-vm.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/proc-pid-vm.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/proc/proc-pidns.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/proc/proc-pidns.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ptrace/get_set_sud.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ptrace/get_set_sud.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ptrace/get_syscall_info.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ptrace/get_syscall_info.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ptrace/set_syscall_info.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ptrace/set_syscall_info.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ptrace/vmaccess.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ptrace/vmaccess.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/rcutorture/bin/jitter.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/rcutorture/bin/jitter.sh</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/rcutorture/bin/kvm-again.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/rcutorture/bin/kvm-again.sh</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/rcutorture/bin/kvm-series.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/rcutorture/bin/kvm-series.sh</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/rcutorture/bin/kvm.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/rcutorture/bin/kvm.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/rcutorture/bin/torture.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/rcutorture/bin/torture.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/seccomp/seccomp_bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/seccomp/seccomp_bpf.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/change_skew.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/change_skew.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/clocksource-switch.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/clocksource-switch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/freq-step.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/freq-step.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/inconsistency-check.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/inconsistency-check.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/leap-a-day.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/leap-a-day.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/leapcrash.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/leapcrash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/mqueue-lat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/mqueue-lat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/nanosleep.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/nanosleep.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/nsleep-lat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/nsleep-lat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/posix_timers.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/posix_timers.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/raw_skew.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/raw_skew.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/rtcpie.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/rtcpie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/set-2038.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/set-2038.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/set-tai.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/set-tai.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/timers/set-tz.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/timers/set-tz.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ublk/test_stress_04.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ublk/test_stress_04.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ublk/test_stress_05.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ublk/test_stress_05.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/ublk/utils.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/ublk/utils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/uevent/uevent_filtering.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/uevent/uevent_filtering.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/user_events/abi_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/user_events/abi_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/user_events/dyn_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/user_events/dyn_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/user_events/ftrace_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/user_events/ftrace_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/user_events/perf_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/user_events/perf_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/user_events/user_events_selftests.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/user_events/user_events_selftests.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_call.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_call.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_config.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_config.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_abi.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_abi.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_chacha.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_chacha.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_clock_getres.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_clock_getres.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_correctness.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_correctness.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_getcpu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_getcpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_getrandom.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_getrandom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vDSO/vdso_test_gettimeofday.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vDSO/vdso_test_gettimeofday.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/.gitignore</a> (renamed from tools/bpf/runqslower/.gitignore)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/settings?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/settings</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/test.d/functions?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/test.d/functions</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/test.d/rv_monitor_enable_disable.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/test.d/rv_monitor_enable_disable.tc</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/test.d/rv_monitor_reactor.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/test.d/rv_monitor_reactor.tc</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/test.d/rv_monitors_available.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/test.d/rv_monitors_available.tc</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/test.d/rv_wwnr_printk.tc?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/test.d/rv_wwnr_printk.tc</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/verification/verificationtest-ktap?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/verification/verificationtest-ktap</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/.gitignore?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/.gitignore</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/Makefile?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/drivers/dsa/registers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/drivers/dsa/registers.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/drivers/ioat/hw.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/drivers/ioat/hw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/drivers/ioat/registers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/drivers/ioat/registers.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio/assert.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio/assert.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio/iommu.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio/iommu.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio/iova_allocator.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio/iova_allocator.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio/vfio_pci_device.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio/vfio_pci_device.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/include/libvfio/vfio_pci_driver.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/include/libvfio/vfio_pci_driver.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/iommu.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/iommu.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/iova_allocator.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/iova_allocator.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/libvfio.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/libvfio.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/libvfio.mk?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/libvfio.mk</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/vfio_pci_device.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/vfio_pci_device.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/lib/vfio_pci_driver.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/lib/vfio_pci_driver.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/scripts/cleanup.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/scripts/cleanup.sh</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/scripts/lib.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/scripts/lib.sh</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/scripts/run.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/scripts/run.sh</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/scripts/setup.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/scripts/setup.sh</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/vfio_dma_mapping_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/vfio_dma_mapping_test.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/vfio_iommufd_setup_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/vfio_iommufd_setup_test.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/vfio_pci_device_init_perf_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/vfio_pci_device_init_perf_test.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/vfio_pci_device_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/vfio_pci_device_test.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vfio/vfio_pci_driver_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vfio/vfio_pci_driver_test.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/vsock/vmtest.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/vsock/vmtest.sh</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/watchdog/watchdog-test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/watchdog/watchdog-test.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/wireguard/qemu/kernel.config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/wireguard/qemu/kernel.config</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/corrupt_xstate_header.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/corrupt_xstate_header.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/helpers.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/helpers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/lam.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/lam.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/syscall_numbering.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/syscall_numbering.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/test_mremap_vdso.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/test_mremap_vdso.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/test_vsyscall.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/test_vsyscall.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/x86/xstate.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/x86/xstate.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/selftests/zram/README?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/zram/README</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/linux.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/linux.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/linux/idr.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/linux/idr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/linux/maple_tree.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/linux/maple_tree.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/maple-shared.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/maple-shared.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/maple-shim.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/maple-shim.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/shared/shared.mk?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/shared/shared.mk</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/tools/testing/vma/linux/atomic.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/vma/linux/atomic.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/vma/vma.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/vma/vma.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/vma/vma_internal.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/vma/vma_internal.h</a></td><td class='right'>933</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.4%;'/><td class='rem' style='width: 10.3%;'/><td class='none' style='width: 67.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/vsock/util.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/vsock/util.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/testing/vsock/vsock_test.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/vsock/vsock_test.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/thermal/thermal-engine/thermal-engine.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/thermal/thermal-engine/thermal-engine.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/latency/Makefile.config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/latency/Makefile.config</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/latency/latency-collector.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/latency/latency-collector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/Makefile.config?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/Makefile.config</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/Makefile.rtla?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/Makefile.rtla</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/Build?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/actions.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/actions.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/actions.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/actions.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/common.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/common.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/common.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/common.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/osnoise.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/osnoise.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/osnoise.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/osnoise.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/osnoise_hist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/osnoise_hist.c</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 10.9%;'/><td class='none' style='width: 83.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/osnoise_top.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/osnoise_top.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 9.4%;'/><td class='none' style='width: 86.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat.bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat.bpf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat_bpf.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat_bpf.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat_hist.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat_hist.c</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 19.2%;'/><td class='none' style='width: 73.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat_top.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat_top.c</a></td><td class='right'>678</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 18.3%;'/><td class='none' style='width: 76.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/timerlat_u.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/timerlat_u.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/trace.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/trace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/utils.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/utils.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/src/utils.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/src/utils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/tests/engine.sh?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/tests/engine.sh</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/tests/osnoise.t?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/tests/osnoise.t</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/tracing/rtla/tests/timerlat.t?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/tracing/rtla/tests/timerlat.t</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/usb/usbip/src/usbipd.c?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/usb/usbip/src/usbipd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/virtio/linux/compiler.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/virtio/linux/compiler.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/tools/virtio/linux/kmsan.h?id2=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/virtio/linux/kmsan.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>1880 files changed, 121127 insertions, 29420 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/tools/Makefile b/tools/Makefile<br/>index c31cbbd12c45..cb40961a740f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/Makefile</a></div><div class='hunk'>@@ -14,6 +14,7 @@ help:</div><div class='ctx'> 	@echo '  counter                - counter tools'</div><div class='ctx'> 	@echo '  cpupower               - a tool for all things x86 CPU power'</div><div class='ctx'> 	@echo '  debugging              - tools for debugging'</div><div class='add'>+	@echo '  dma                    - tools for DMA mapping'</div><div class='ctx'> 	@echo '  firewire               - the userspace part of nosy, an IEEE-1394 traffic sniffer'</div><div class='ctx'> 	@echo '  firmware               - Firmware tools'</div><div class='ctx'> 	@echo '  freefall               - laptop accelerometer program for disk protection'</div><div class='hunk'>@@ -69,7 +70,7 @@ acpi: FORCE</div><div class='ctx'> cpupower: FORCE</div><div class='ctx'> 	$(call descend,power/$@)</div><div class='ctx'> </div><div class='del'>-counter firewire hv guest bootconfig spi usb virtio mm bpf iio gpio objtool leds wmi firmware debugging tracing: FORCE</div><div class='add'>+counter dma firewire hv guest bootconfig spi usb virtio mm bpf iio gpio objtool leds wmi firmware debugging tracing: FORCE</div><div class='ctx'> 	$(call descend,$@)</div><div class='ctx'> </div><div class='ctx'> bpf/%: FORCE</div><div class='hunk'>@@ -122,7 +123,7 @@ kvm_stat: FORCE</div><div class='ctx'> ynl: FORCE</div><div class='ctx'> 	$(call descend,net/ynl)</div><div class='ctx'> </div><div class='del'>-all: acpi counter cpupower gpio hv firewire \</div><div class='add'>+all: acpi counter cpupower dma gpio hv firewire \</div><div class='ctx'> 		perf selftests bootconfig spi turbostat usb \</div><div class='ctx'> 		virtio mm bpf x86_energy_perf_policy \</div><div class='ctx'> 		tmon freefall iio objtool kvm_stat wmi \</div><div class='hunk'>@@ -134,7 +135,7 @@ acpi_install:</div><div class='ctx'> cpupower_install:</div><div class='ctx'> 	$(call descend,power/$(@:_install=),install)</div><div class='ctx'> </div><div class='del'>-counter_install firewire_install gpio_install hv_install iio_install perf_install bootconfig_install spi_install usb_install virtio_install mm_install bpf_install objtool_install wmi_install debugging_install tracing_install:</div><div class='add'>+counter_install dma_install firewire_install gpio_install hv_install iio_install perf_install bootconfig_install spi_install usb_install virtio_install mm_install bpf_install objtool_install wmi_install debugging_install tracing_install:</div><div class='ctx'> 	$(call descend,$(@:_install=),install)</div><div class='ctx'> </div><div class='ctx'> selftests_install:</div><div class='hunk'>@@ -164,7 +165,7 @@ kvm_stat_install:</div><div class='ctx'> ynl_install:</div><div class='ctx'> 	$(call descend,net/$(@:_install=),install)</div><div class='ctx'> </div><div class='del'>-install: acpi_install counter_install cpupower_install gpio_install \</div><div class='add'>+install: acpi_install counter_install cpupower_install dma_install gpio_install \</div><div class='ctx'> 		hv_install firewire_install iio_install \</div><div class='ctx'> 		perf_install selftests_install turbostat_install usb_install \</div><div class='ctx'> 		virtio_install mm_install bpf_install x86_energy_perf_policy_install \</div><div class='hunk'>@@ -178,7 +179,7 @@ acpi_clean:</div><div class='ctx'> cpupower_clean:</div><div class='ctx'> 	$(call descend,power/cpupower,clean)</div><div class='ctx'> </div><div class='del'>-counter_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean mm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean firmware_clean debugging_clean tracing_clean:</div><div class='add'>+counter_clean dma_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean mm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean firmware_clean debugging_clean tracing_clean:</div><div class='ctx'> 	$(call descend,$(@:_clean=),clean)</div><div class='ctx'> </div><div class='ctx'> libapi_clean:</div><div class='hunk'>@@ -224,7 +225,7 @@ build_clean:</div><div class='ctx'> ynl_clean:</div><div class='ctx'> 	$(call descend,net/$(@:_clean=),clean)</div><div class='ctx'> </div><div class='del'>-clean: acpi_clean counter_clean cpupower_clean hv_clean firewire_clean \</div><div class='add'>+clean: acpi_clean counter_clean cpupower_clean dma_clean hv_clean firewire_clean \</div><div class='ctx'> 		perf_clean selftests_clean turbostat_clean bootconfig_clean spi_clean usb_clean virtio_clean \</div><div class='ctx'> 		mm_clean bpf_clean iio_clean x86_energy_perf_policy_clean tmon_clean \</div><div class='ctx'> 		freefall_clean build_clean libbpf_clean libsubcmd_clean \</div><div class='head'>diff --git a/tools/accounting/delaytop.c b/tools/accounting/delaytop.c<br/>index 9afb1ffc00ba..72cc500b44b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/accounting/delaytop.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/accounting/delaytop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/accounting/delaytop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/accounting/delaytop.c</a></div><div class='hunk'>@@ -42,14 +42,13 @@</div><div class='ctx'> #include &lt;linux/genetlink.h&gt;</div><div class='ctx'> #include &lt;linux/taskstats.h&gt;</div><div class='ctx'> #include &lt;linux/cgroupstats.h&gt;</div><div class='add'>+#include &lt;stddef.h&gt;</div><div class='ctx'> </div><div class='del'>-#define PSI_CPU_SOME "/proc/pressure/cpu"</div><div class='del'>-#define PSI_CPU_FULL	"/proc/pressure/cpu"</div><div class='del'>-#define PSI_MEMORY_SOME "/proc/pressure/memory"</div><div class='del'>-#define PSI_MEMORY_FULL "/proc/pressure/memory"</div><div class='del'>-#define PSI_IO_SOME "/proc/pressure/io"</div><div class='del'>-#define PSI_IO_FULL "/proc/pressure/io"</div><div class='del'>-#define PSI_IRQ_FULL	"/proc/pressure/irq"</div><div class='add'>+#define PSI_PATH	"/proc/pressure"</div><div class='add'>+#define PSI_CPU_PATH	"/proc/pressure/cpu"</div><div class='add'>+#define PSI_MEMORY_PATH	"/proc/pressure/memory"</div><div class='add'>+#define PSI_IO_PATH	"/proc/pressure/io"</div><div class='add'>+#define PSI_IRQ_PATH	"/proc/pressure/irq"</div><div class='ctx'> </div><div class='ctx'> #define NLA_NEXT(na)			((struct nlattr *)((char *)(na) + NLA_ALIGN((na)-&gt;nla_len)))</div><div class='ctx'> #define NLA_DATA(na)			((void *)((char *)(na) + NLA_HDRLEN))</div><div class='hunk'>@@ -61,24 +60,28 @@</div><div class='ctx'> #define TASK_COMM_LEN	16</div><div class='ctx'> #define MAX_MSG_SIZE	1024</div><div class='ctx'> #define MAX_TASKS		1000</div><div class='add'>+#define MAX_BUF_LEN		256</div><div class='ctx'> #define SET_TASK_STAT(task_count, field) tasks[task_count].field = stats.field</div><div class='ctx'> #define BOOL_FPRINT(stream, fmt, ...) \</div><div class='ctx'> ({ \</div><div class='ctx'> 	int ret = fprintf(stream, fmt, ##__VA_ARGS__); \</div><div class='ctx'> 	ret &gt;= 0; \</div><div class='ctx'> })</div><div class='add'>+#define TASK_AVG(task, field) average_ms((task).field##_delay_total, (task).field##_count)</div><div class='ctx'> #define PSI_LINE_FORMAT "%-12s %6.1f%%/%6.1f%%/%6.1f%%/%8llu(ms)\n"</div><div class='del'>-</div><div class='del'>-/* Program settings structure */</div><div class='del'>-struct config {</div><div class='del'>-	int delay;				/* Update interval in seconds */</div><div class='del'>-	int iterations;			/* Number of iterations, 0 == infinite */</div><div class='del'>-	int max_processes;		/* Maximum number of processes to show */</div><div class='del'>-	char sort_field;		/* Field to sort by */</div><div class='del'>-	int output_one_time;	/* Output once and exit */</div><div class='del'>-	int monitor_pid;		/* Monitor specific PID */</div><div class='del'>-	char *container_path;	/* Path to container cgroup */</div><div class='del'>-};</div><div class='add'>+#define DELAY_FMT_DEFAULT "%8.2f %8.2f %8.2f %8.2f\n"</div><div class='add'>+#define DELAY_FMT_MEMVERBOSE "%8.2f %8.2f %8.2f %8.2f %8.2f %8.2f\n"</div><div class='add'>+#define SORT_FIELD(name, cmd, modes) \</div><div class='add'>+	{#name, #cmd, \</div><div class='add'>+	offsetof(struct task_info, name##_delay_total), \</div><div class='add'>+	offsetof(struct task_info, name##_count), \</div><div class='add'>+	modes}</div><div class='add'>+#define END_FIELD {NULL, 0, 0}</div><div class='add'>+</div><div class='add'>+/* Display mode types */</div><div class='add'>+#define MODE_TYPE_ALL	(0xFFFFFFFF)</div><div class='add'>+#define MODE_DEFAULT	(1 &lt;&lt; 0)</div><div class='add'>+#define MODE_MEMVERBOSE	(1 &lt;&lt; 1)</div><div class='ctx'> </div><div class='ctx'> /* PSI statistics structure */</div><div class='ctx'> struct psi_stats {</div><div class='hunk'>@@ -119,6 +122,8 @@ struct task_info {</div><div class='ctx'> 	unsigned long long wpcopy_delay_total;</div><div class='ctx'> 	unsigned long long irq_count;</div><div class='ctx'> 	unsigned long long irq_delay_total;</div><div class='add'>+	unsigned long long mem_count;</div><div class='add'>+	unsigned long long mem_delay_total;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Container statistics structure */</div><div class='hunk'>@@ -130,6 +135,27 @@ struct container_stats {</div><div class='ctx'> 	int nr_io_wait;			/* Number of processes in IO wait */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Delay field structure */</div><div class='add'>+struct field_desc {</div><div class='add'>+	const char *name;	/* Field name for cmdline argument */</div><div class='add'>+	const char *cmd_char;	/* Interactive command */</div><div class='add'>+	unsigned long total_offset; /* Offset of total delay in task_info */</div><div class='add'>+	unsigned long count_offset; /* Offset of count in task_info */</div><div class='add'>+	size_t supported_modes; /* Supported display modes */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Program settings structure */</div><div class='add'>+struct config {</div><div class='add'>+	int delay;				/* Update interval in seconds */</div><div class='add'>+	int iterations;			/* Number of iterations, 0 == infinite */</div><div class='add'>+	int max_processes;		/* Maximum number of processes to show */</div><div class='add'>+	int output_one_time;	/* Output once and exit */</div><div class='add'>+	int monitor_pid;		/* Monitor specific PID */</div><div class='add'>+	char *container_path;	/* Path to container cgroup */</div><div class='add'>+	const struct field_desc *sort_field;	/* Current sort field */</div><div class='add'>+	size_t display_mode;	/* Current display mode */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Global variables */</div><div class='ctx'> static struct config cfg;</div><div class='ctx'> static struct psi_stats psi;</div><div class='hunk'>@@ -137,6 +163,19 @@ static struct task_info tasks[MAX_TASKS];</div><div class='ctx'> static int task_count;</div><div class='ctx'> static int running = 1;</div><div class='ctx'> static struct container_stats container_stats;</div><div class='add'>+static const struct field_desc sort_fields[] = {</div><div class='add'>+	SORT_FIELD(cpu,		c,	MODE_DEFAULT),</div><div class='add'>+	SORT_FIELD(blkio,	i,	MODE_DEFAULT),</div><div class='add'>+	SORT_FIELD(irq,		q,	MODE_DEFAULT),</div><div class='add'>+	SORT_FIELD(mem,		m,	MODE_DEFAULT | MODE_MEMVERBOSE),</div><div class='add'>+	SORT_FIELD(swapin,	s,	MODE_MEMVERBOSE),</div><div class='add'>+	SORT_FIELD(freepages,	r,	MODE_MEMVERBOSE),</div><div class='add'>+	SORT_FIELD(thrashing,	t,	MODE_MEMVERBOSE),</div><div class='add'>+	SORT_FIELD(compact,	p,	MODE_MEMVERBOSE),</div><div class='add'>+	SORT_FIELD(wpcopy,	w,	MODE_MEMVERBOSE),</div><div class='add'>+	END_FIELD</div><div class='add'>+};</div><div class='add'>+static int sort_selected;</div><div class='ctx'> </div><div class='ctx'> /* Netlink socket variables */</div><div class='ctx'> static int nl_sd = -1;</div><div class='hunk'>@@ -158,18 +197,75 @@ static void disable_raw_mode(void)</div><div class='ctx'> 	tcsetattr(STDIN_FILENO, TCSAFLUSH, &amp;orig_termios);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Find field descriptor by command line */</div><div class='add'>+static const struct field_desc *get_field_by_cmd_char(char ch)</div><div class='add'>+{</div><div class='add'>+	const struct field_desc *field;</div><div class='add'>+</div><div class='add'>+	for (field = sort_fields; field-&gt;name != NULL; field++) {</div><div class='add'>+		if (field-&gt;cmd_char[0] == ch)</div><div class='add'>+			return field;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Find field descriptor by name with string comparison */</div><div class='add'>+static const struct field_desc *get_field_by_name(const char *name)</div><div class='add'>+{</div><div class='add'>+	const struct field_desc *field;</div><div class='add'>+	size_t field_len;</div><div class='add'>+</div><div class='add'>+	for (field = sort_fields; field-&gt;name != NULL; field++) {</div><div class='add'>+		field_len = strlen(field-&gt;name);</div><div class='add'>+		if (field_len != strlen(name))</div><div class='add'>+			continue;</div><div class='add'>+		if (strncmp(field-&gt;name, name, field_len) == 0)</div><div class='add'>+			return field;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Find display name for a field descriptor */</div><div class='add'>+static const char *get_name_by_field(const struct field_desc *field)</div><div class='add'>+{</div><div class='add'>+	return field ? field-&gt;name : "UNKNOWN";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Generate string of available field names */</div><div class='add'>+static void display_available_fields(size_t mode)</div><div class='add'>+{</div><div class='add'>+	const struct field_desc *field;</div><div class='add'>+	char buf[MAX_BUF_LEN];</div><div class='add'>+</div><div class='add'>+	buf[0] = '\0';</div><div class='add'>+</div><div class='add'>+	for (field = sort_fields; field-&gt;name != NULL; field++) {</div><div class='add'>+		if (!(field-&gt;supported_modes &amp; mode))</div><div class='add'>+			continue;</div><div class='add'>+		strncat(buf, "|", MAX_BUF_LEN - strlen(buf) - 1);</div><div class='add'>+		strncat(buf, field-&gt;name, MAX_BUF_LEN - strlen(buf) - 1);</div><div class='add'>+		buf[MAX_BUF_LEN - 1] = '\0';</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stderr, "Available fields: %s\n", buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Display usage information and command line options */</div><div class='ctx'> static void usage(void)</div><div class='ctx'> {</div><div class='ctx'> 	printf("Usage: delaytop [Options]\n"</div><div class='ctx'> 	"Options:\n"</div><div class='del'>-	"  -h, --help				Show this help message and exit\n"</div><div class='del'>-	"  -d, --delay=SECONDS	  Set refresh interval (default: 2 seconds, min: 1)\n"</div><div class='del'>-	"  -n, --iterations=COUNT	Set number of updates (default: 0 = infinite)\n"</div><div class='del'>-	"  -P, --processes=NUMBER	Set maximum number of processes to show (default: 20, max: 1000)\n"</div><div class='del'>-	"  -o, --once				Display once and exit\n"</div><div class='del'>-	"  -p, --pid=PID			Monitor only the specified PID\n"</div><div class='del'>-	"  -C, --container=PATH	 Monitor the container at specified cgroup path\n");</div><div class='add'>+	"  -h, --help               Show this help message and exit\n"</div><div class='add'>+	"  -d, --delay=SECONDS      Set refresh interval (default: 2 seconds, min: 1)\n"</div><div class='add'>+	"  -n, --iterations=COUNT   Set number of updates (default: 0 = infinite)\n"</div><div class='add'>+	"  -P, --processes=NUMBER   Set maximum number of processes to show (default: 20, max: 1000)\n"</div><div class='add'>+	"  -o, --once               Display once and exit\n"</div><div class='add'>+	"  -p, --pid=PID            Monitor only the specified PID\n"</div><div class='add'>+	"  -C, --container=PATH     Monitor the container at specified cgroup path\n"</div><div class='add'>+	"  -s, --sort=FIELD         Sort by delay field (default: cpu)\n"</div><div class='add'>+	"  -M, --memverbose         Display memory detailed information\n");</div><div class='ctx'> 	exit(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -177,6 +273,7 @@ static void usage(void)</div><div class='ctx'> static void parse_args(int argc, char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	int c;</div><div class='add'>+	const struct field_desc *field;</div><div class='ctx'> 	struct option long_options[] = {</div><div class='ctx'> 		{"help", no_argument, 0, 'h'},</div><div class='ctx'> 		{"delay", required_argument, 0, 'd'},</div><div class='hunk'>@@ -184,7 +281,9 @@ static void parse_args(int argc, char **argv)</div><div class='ctx'> 		{"pid", required_argument, 0, 'p'},</div><div class='ctx'> 		{"once", no_argument, 0, 'o'},</div><div class='ctx'> 		{"processes", required_argument, 0, 'P'},</div><div class='add'>+		{"sort", required_argument, 0, 's'},</div><div class='ctx'> 		{"container", required_argument, 0, 'C'},</div><div class='add'>+		{"memverbose", no_argument, 0, 'M'},</div><div class='ctx'> 		{0, 0, 0, 0}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -192,15 +291,16 @@ static void parse_args(int argc, char **argv)</div><div class='ctx'> 	cfg.delay = 2;</div><div class='ctx'> 	cfg.iterations = 0;</div><div class='ctx'> 	cfg.max_processes = 20;</div><div class='del'>-	cfg.sort_field = 'c';	/* Default sort by CPU delay */</div><div class='add'>+	cfg.sort_field = &amp;sort_fields[0];	/* Default sorted by CPU delay */</div><div class='ctx'> 	cfg.output_one_time = 0;</div><div class='ctx'> 	cfg.monitor_pid = 0;	/* 0 means monitor all PIDs */</div><div class='ctx'> 	cfg.container_path = NULL;</div><div class='add'>+	cfg.display_mode = MODE_DEFAULT;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		int option_index = 0;</div><div class='ctx'> </div><div class='del'>-		c = getopt_long(argc, argv, "hd:n:p:oP:C:", long_options, &amp;option_index);</div><div class='add'>+		c = getopt_long(argc, argv, "hd:n:p:oP:C:s:M", long_options, &amp;option_index);</div><div class='ctx'> 		if (c == -1)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +347,26 @@ static void parse_args(int argc, char **argv)</div><div class='ctx'> 		case 'C':</div><div class='ctx'> 			cfg.container_path = strdup(optarg);</div><div class='ctx'> 			break;</div><div class='add'>+		case 's':</div><div class='add'>+			if (strlen(optarg) == 0) {</div><div class='add'>+				fprintf(stderr, "Error: empty sort field\n");</div><div class='add'>+				exit(1);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			field = get_field_by_name(optarg);</div><div class='add'>+			/* Show available fields if invalid option provided */</div><div class='add'>+			if (!field) {</div><div class='add'>+				fprintf(stderr, "Error: invalid sort field '%s'\n", optarg);</div><div class='add'>+				display_available_fields(MODE_TYPE_ALL);</div><div class='add'>+				exit(1);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			cfg.sort_field = field;</div><div class='add'>+			break;</div><div class='add'>+		case 'M':</div><div class='add'>+			cfg.display_mode = MODE_MEMVERBOSE;</div><div class='add'>+			cfg.sort_field = get_field_by_name("mem");</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			fprintf(stderr, "Try 'delaytop --help' for more information.\n");</div><div class='ctx'> 			exit(1);</div><div class='hunk'>@@ -254,6 +374,25 @@ static void parse_args(int argc, char **argv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Calculate average delay in milliseconds for overall memory */</div><div class='add'>+static void set_mem_delay_total(struct task_info *t)</div><div class='add'>+{</div><div class='add'>+	t-&gt;mem_delay_total = t-&gt;swapin_delay_total +</div><div class='add'>+		t-&gt;freepages_delay_total +</div><div class='add'>+		t-&gt;thrashing_delay_total +</div><div class='add'>+		t-&gt;compact_delay_total +</div><div class='add'>+		t-&gt;wpcopy_delay_total;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_mem_count(struct task_info *t)</div><div class='add'>+{</div><div class='add'>+	t-&gt;mem_count = t-&gt;swapin_count +</div><div class='add'>+		t-&gt;freepages_count +</div><div class='add'>+		t-&gt;thrashing_count +</div><div class='add'>+		t-&gt;compact_count +</div><div class='add'>+		t-&gt;wpcopy_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Create a raw netlink socket and bind */</div><div class='ctx'> static int create_nl_socket(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -358,87 +497,134 @@ static int get_family_id(int sd)</div><div class='ctx'> 	return id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void read_psi_stats(void)</div><div class='add'>+static int read_psi_stats(void)</div><div class='ctx'> {</div><div class='ctx'> 	FILE *fp;</div><div class='ctx'> 	char line[256];</div><div class='ctx'> 	int ret = 0;</div><div class='add'>+	int error_count = 0;</div><div class='add'>+</div><div class='add'>+	/* Check if PSI path exists */</div><div class='add'>+	if (access(PSI_PATH, F_OK) != 0) {</div><div class='add'>+		fprintf(stderr, "Error: PSI interface not found at %s\n", PSI_PATH);</div><div class='add'>+		fprintf(stderr, "Please ensure your kernel supports PSI (Pressure Stall Information)\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Zero all fields */</div><div class='ctx'> 	memset(&amp;psi, 0, sizeof(psi));</div><div class='add'>+</div><div class='ctx'> 	/* CPU pressure */</div><div class='del'>-	fp = fopen(PSI_CPU_SOME, "r");</div><div class='add'>+	fp = fopen(PSI_CPU_PATH, "r");</div><div class='ctx'> 	if (fp) {</div><div class='ctx'> 		while (fgets(line, sizeof(line), fp)) {</div><div class='ctx'> 			if (strncmp(line, "some", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "some avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 							&amp;psi.cpu_some_avg10, &amp;psi.cpu_some_avg60,</div><div class='ctx'> 							&amp;psi.cpu_some_avg300, &amp;psi.cpu_some_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse CPU some PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			} else if (strncmp(line, "full", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "full avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.cpu_full_avg10, &amp;psi.cpu_full_avg60,</div><div class='ctx'> 						&amp;psi.cpu_full_avg300, &amp;psi.cpu_full_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse CPU full PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		fclose(fp);</div><div class='add'>+	} else {</div><div class='add'>+		fprintf(stderr, "Warning: Failed to open %s\n", PSI_CPU_PATH);</div><div class='add'>+		error_count++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* Memory pressure */</div><div class='del'>-	fp = fopen(PSI_MEMORY_SOME, "r");</div><div class='add'>+	fp = fopen(PSI_MEMORY_PATH, "r");</div><div class='ctx'> 	if (fp) {</div><div class='ctx'> 		while (fgets(line, sizeof(line), fp)) {</div><div class='ctx'> 			if (strncmp(line, "some", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "some avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.memory_some_avg10, &amp;psi.memory_some_avg60,</div><div class='ctx'> 						&amp;psi.memory_some_avg300, &amp;psi.memory_some_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse Memory some PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			} else if (strncmp(line, "full", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "full avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.memory_full_avg10, &amp;psi.memory_full_avg60,</div><div class='ctx'> 						&amp;psi.memory_full_avg300, &amp;psi.memory_full_total);</div><div class='del'>-			}</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse Memory full PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		fclose(fp);</div><div class='add'>+	} else {</div><div class='add'>+		fprintf(stderr, "Warning: Failed to open %s\n", PSI_MEMORY_PATH);</div><div class='add'>+		error_count++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* IO pressure */</div><div class='del'>-	fp = fopen(PSI_IO_SOME, "r");</div><div class='add'>+	fp = fopen(PSI_IO_PATH, "r");</div><div class='ctx'> 	if (fp) {</div><div class='ctx'> 		while (fgets(line, sizeof(line), fp)) {</div><div class='ctx'> 			if (strncmp(line, "some", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "some avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.io_some_avg10, &amp;psi.io_some_avg60,</div><div class='ctx'> 						&amp;psi.io_some_avg300, &amp;psi.io_some_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse IO some PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			} else if (strncmp(line, "full", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "full avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.io_full_avg10, &amp;psi.io_full_avg60,</div><div class='ctx'> 						&amp;psi.io_full_avg300, &amp;psi.io_full_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse IO full PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		fclose(fp);</div><div class='add'>+	} else {</div><div class='add'>+		fprintf(stderr, "Warning: Failed to open %s\n", PSI_IO_PATH);</div><div class='add'>+		error_count++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* IRQ pressure (only full) */</div><div class='del'>-	fp = fopen(PSI_IRQ_FULL, "r");</div><div class='add'>+	fp = fopen(PSI_IRQ_PATH, "r");</div><div class='ctx'> 	if (fp) {</div><div class='ctx'> 		while (fgets(line, sizeof(line), fp)) {</div><div class='ctx'> 			if (strncmp(line, "full", 4) == 0) {</div><div class='ctx'> 				ret = sscanf(line, "full avg10=%lf avg60=%lf avg300=%lf total=%llu",</div><div class='ctx'> 						&amp;psi.irq_full_avg10, &amp;psi.irq_full_avg60,</div><div class='ctx'> 						&amp;psi.irq_full_avg300, &amp;psi.irq_full_total);</div><div class='del'>-				if (ret != 4)</div><div class='add'>+				if (ret != 4) {</div><div class='ctx'> 					fprintf(stderr, "Failed to parse IRQ full PSI data\n");</div><div class='add'>+					error_count++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		fclose(fp);</div><div class='add'>+	} else {</div><div class='add'>+		fprintf(stderr, "Warning: Failed to open %s\n", PSI_IRQ_PATH);</div><div class='add'>+		error_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Return error count: 0 means success, &gt;0 means warnings, -1 means fatal error */</div><div class='add'>+	if (error_count &gt; 0) {</div><div class='add'>+		fprintf(stderr, "PSI stats reading completed with %d warnings\n", error_count);</div><div class='add'>+		return error_count;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int read_comm(int pid, char *comm_buf, size_t buf_size)</div><div class='hunk'>@@ -527,6 +713,8 @@ static void fetch_and_fill_task_info(int pid, const char *comm)</div><div class='ctx'> 						SET_TASK_STAT(task_count, wpcopy_delay_total);</div><div class='ctx'> 						SET_TASK_STAT(task_count, irq_count);</div><div class='ctx'> 						SET_TASK_STAT(task_count, irq_delay_total);</div><div class='add'>+						set_mem_count(&amp;tasks[task_count]);</div><div class='add'>+						set_mem_delay_total(&amp;tasks[task_count]);</div><div class='ctx'> 						task_count++;</div><div class='ctx'> 					}</div><div class='ctx'> 					break;</div><div class='hunk'>@@ -587,19 +775,23 @@ static int compare_tasks(const void *a, const void *b)</div><div class='ctx'> {</div><div class='ctx'> 	const struct task_info *t1 = (const struct task_info *)a;</div><div class='ctx'> 	const struct task_info *t2 = (const struct task_info *)b;</div><div class='add'>+	unsigned long long total1;</div><div class='add'>+	unsigned long long total2;</div><div class='add'>+	unsigned long count1;</div><div class='add'>+	unsigned long count2;</div><div class='ctx'> 	double avg1, avg2;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.sort_field) {</div><div class='del'>-	case 'c': /* CPU */</div><div class='del'>-		avg1 = average_ms(t1-&gt;cpu_delay_total, t1-&gt;cpu_count);</div><div class='del'>-		avg2 = average_ms(t2-&gt;cpu_delay_total, t2-&gt;cpu_count);</div><div class='del'>-		if (avg1 != avg2)</div><div class='del'>-			return avg2 &gt; avg1 ? 1 : -1;</div><div class='del'>-		return t2-&gt;cpu_delay_total &gt; t1-&gt;cpu_delay_total ? 1 : -1;</div><div class='add'>+	total1 = *(unsigned long long *)((char *)t1 + cfg.sort_field-&gt;total_offset);</div><div class='add'>+	total2 = *(unsigned long long *)((char *)t2 + cfg.sort_field-&gt;total_offset);</div><div class='add'>+	count1 = *(unsigned long *)((char *)t1 + cfg.sort_field-&gt;count_offset);</div><div class='add'>+	count2 = *(unsigned long *)((char *)t2 + cfg.sort_field-&gt;count_offset);</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		return t2-&gt;cpu_delay_total &gt; t1-&gt;cpu_delay_total ? 1 : -1;</div><div class='del'>-	}</div><div class='add'>+	avg1 = average_ms(total1, count1);</div><div class='add'>+	avg2 = average_ms(total2, count2);</div><div class='add'>+	if (avg1 != avg2)</div><div class='add'>+		return avg2 &gt; avg1 ? 1 : -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Sort tasks by selected field */</div><div class='hunk'>@@ -673,7 +865,7 @@ static void get_container_stats(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Display results to stdout or log file */</div><div class='del'>-static void display_results(void)</div><div class='add'>+static void display_results(int psi_ret)</div><div class='ctx'> {</div><div class='ctx'> 	time_t now = time(NULL);</div><div class='ctx'> 	struct tm *tm_now = localtime(&amp;now);</div><div class='hunk'>@@ -686,49 +878,53 @@ static void display_results(void)</div><div class='ctx'> 	suc &amp;= BOOL_FPRINT(out, "\033[H\033[J");</div><div class='ctx'> </div><div class='ctx'> 	/* PSI output (one-line, no cat style) */</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "System Pressure Information: (avg10/avg60/avg300/total)\n");</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"CPU some:",</div><div class='del'>-		psi.cpu_some_avg10,</div><div class='del'>-		psi.cpu_some_avg60,</div><div class='del'>-		psi.cpu_some_avg300,</div><div class='del'>-		psi.cpu_some_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"CPU full:",</div><div class='del'>-		psi.cpu_full_avg10,</div><div class='del'>-		psi.cpu_full_avg60,</div><div class='del'>-		psi.cpu_full_avg300,</div><div class='del'>-		psi.cpu_full_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"Memory full:",</div><div class='del'>-		psi.memory_full_avg10,</div><div class='del'>-		psi.memory_full_avg60,</div><div class='del'>-		psi.memory_full_avg300,</div><div class='del'>-		psi.memory_full_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"Memory some:",</div><div class='del'>-		psi.memory_some_avg10,</div><div class='del'>-		psi.memory_some_avg60,</div><div class='del'>-		psi.memory_some_avg300,</div><div class='del'>-		psi.memory_some_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"IO full:",</div><div class='del'>-		psi.io_full_avg10,</div><div class='del'>-		psi.io_full_avg60,</div><div class='del'>-		psi.io_full_avg300,</div><div class='del'>-		psi.io_full_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"IO some:",</div><div class='del'>-		psi.io_some_avg10,</div><div class='del'>-		psi.io_some_avg60,</div><div class='del'>-		psi.io_some_avg300,</div><div class='del'>-		psi.io_some_total / 1000);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='del'>-		"IRQ full:",</div><div class='del'>-		psi.irq_full_avg10,</div><div class='del'>-		psi.irq_full_avg60,</div><div class='del'>-		psi.irq_full_avg300,</div><div class='del'>-		psi.irq_full_total / 1000);</div><div class='add'>+	suc &amp;= BOOL_FPRINT(out, "System Pressure Information: (avg10/avg60vg300/total)\n");</div><div class='add'>+	if (psi_ret) {</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "  PSI not found: check if psi=1 enabled in cmdline\n");</div><div class='add'>+	} else {</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"CPU some:",</div><div class='add'>+			psi.cpu_some_avg10,</div><div class='add'>+			psi.cpu_some_avg60,</div><div class='add'>+			psi.cpu_some_avg300,</div><div class='add'>+			psi.cpu_some_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"CPU full:",</div><div class='add'>+			psi.cpu_full_avg10,</div><div class='add'>+			psi.cpu_full_avg60,</div><div class='add'>+			psi.cpu_full_avg300,</div><div class='add'>+			psi.cpu_full_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"Memory full:",</div><div class='add'>+			psi.memory_full_avg10,</div><div class='add'>+			psi.memory_full_avg60,</div><div class='add'>+			psi.memory_full_avg300,</div><div class='add'>+			psi.memory_full_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"Memory some:",</div><div class='add'>+			psi.memory_some_avg10,</div><div class='add'>+			psi.memory_some_avg60,</div><div class='add'>+			psi.memory_some_avg300,</div><div class='add'>+			psi.memory_some_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"IO full:",</div><div class='add'>+			psi.io_full_avg10,</div><div class='add'>+			psi.io_full_avg60,</div><div class='add'>+			psi.io_full_avg300,</div><div class='add'>+			psi.io_full_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"IO some:",</div><div class='add'>+			psi.io_some_avg10,</div><div class='add'>+			psi.io_some_avg60,</div><div class='add'>+			psi.io_some_avg300,</div><div class='add'>+			psi.io_some_total / 1000);</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, PSI_LINE_FORMAT,</div><div class='add'>+			"IRQ full:",</div><div class='add'>+			psi.irq_full_avg10,</div><div class='add'>+			psi.irq_full_avg60,</div><div class='add'>+			psi.irq_full_avg300,</div><div class='add'>+			psi.irq_full_total / 1000);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (cfg.container_path) {</div><div class='ctx'> 		suc &amp;= BOOL_FPRINT(out, "Container Information (%s):\n", cfg.container_path);</div><div class='hunk'>@@ -738,29 +934,59 @@ static void display_results(void)</div><div class='ctx'> 			container_stats.nr_stopped, container_stats.nr_uninterruptible,</div><div class='ctx'> 			container_stats.nr_io_wait);</div><div class='ctx'> 	}</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "Top %d processes (sorted by CPU delay):\n",</div><div class='del'>-			cfg.max_processes);</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "%5s  %5s  %-17s", "PID", "TGID", "COMMAND");</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "%7s %7s %7s %7s %7s %7s %7s %7s\n",</div><div class='del'>-		"CPU(ms)", "IO(ms)", "SWAP(ms)", "RCL(ms)",</div><div class='del'>-		"THR(ms)", "CMP(ms)", "WP(ms)", "IRQ(ms)");</div><div class='ctx'> </div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "-----------------------------------------------");</div><div class='del'>-	suc &amp;= BOOL_FPRINT(out, "----------------------------------------------\n");</div><div class='add'>+	/* Interacive command */</div><div class='add'>+	suc &amp;= BOOL_FPRINT(out, "[o]sort [M]memverbose [q]quit\n");</div><div class='add'>+	if (sort_selected) {</div><div class='add'>+		if (cfg.display_mode == MODE_MEMVERBOSE)</div><div class='add'>+			suc &amp;= BOOL_FPRINT(out,</div><div class='add'>+				"sort selection: [m]MEM [r]RCL [t]THR [p]CMP [w]WP\n");</div><div class='add'>+		else</div><div class='add'>+			suc &amp;= BOOL_FPRINT(out,</div><div class='add'>+				"sort selection: [c]CPU [i]IO [m]MEM [q]IRQ\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Task delay output */</div><div class='add'>+	suc &amp;= BOOL_FPRINT(out, "Top %d processes (sorted by %s delay):\n",</div><div class='add'>+			cfg.max_processes, get_name_by_field(cfg.sort_field));</div><div class='add'>+</div><div class='add'>+	suc &amp;= BOOL_FPRINT(out, "%8s  %8s  %-17s", "PID", "TGID", "COMMAND");</div><div class='add'>+	if (cfg.display_mode == MODE_MEMVERBOSE) {</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "%8s %8s %8s %8s %8s %8s\n",</div><div class='add'>+			"MEM(ms)", "SWAP(ms)", "RCL(ms)",</div><div class='add'>+			"THR(ms)", "CMP(ms)", "WP(ms)");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "-----------------------");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "-----------------------");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "-----------------------");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "---------------------\n");</div><div class='add'>+	} else {</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "%8s %8s %8s %8s\n",</div><div class='add'>+			"CPU(ms)", "IO(ms)", "IRQ(ms)", "MEM(ms)");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "-----------------------");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "-----------------------");</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "--------------------------\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	count = task_count &lt; cfg.max_processes ? task_count : cfg.max_processes;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		suc &amp;= BOOL_FPRINT(out, "%5d  %5d  %-15s",</div><div class='add'>+		suc &amp;= BOOL_FPRINT(out, "%8d  %8d  %-15s",</div><div class='ctx'> 			tasks[i].pid, tasks[i].tgid, tasks[i].command);</div><div class='del'>-		suc &amp;= BOOL_FPRINT(out, "%7.2f %7.2f %7.2f %7.2f %7.2f %7.2f %7.2f %7.2f\n",</div><div class='del'>-			average_ms(tasks[i].cpu_delay_total, tasks[i].cpu_count),</div><div class='del'>-			average_ms(tasks[i].blkio_delay_total, tasks[i].blkio_count),</div><div class='del'>-			average_ms(tasks[i].swapin_delay_total, tasks[i].swapin_count),</div><div class='del'>-			average_ms(tasks[i].freepages_delay_total, tasks[i].freepages_count),</div><div class='del'>-			average_ms(tasks[i].thrashing_delay_total, tasks[i].thrashing_count),</div><div class='del'>-			average_ms(tasks[i].compact_delay_total, tasks[i].compact_count),</div><div class='del'>-			average_ms(tasks[i].wpcopy_delay_total, tasks[i].wpcopy_count),</div><div class='del'>-			average_ms(tasks[i].irq_delay_total, tasks[i].irq_count));</div><div class='add'>+		if (cfg.display_mode == MODE_MEMVERBOSE) {</div><div class='add'>+			suc &amp;= BOOL_FPRINT(out, DELAY_FMT_MEMVERBOSE,</div><div class='add'>+				TASK_AVG(tasks[i], mem),</div><div class='add'>+				TASK_AVG(tasks[i], swapin),</div><div class='add'>+				TASK_AVG(tasks[i], freepages),</div><div class='add'>+				TASK_AVG(tasks[i], thrashing),</div><div class='add'>+				TASK_AVG(tasks[i], compact),</div><div class='add'>+				TASK_AVG(tasks[i], wpcopy));</div><div class='add'>+		} else {</div><div class='add'>+			suc &amp;= BOOL_FPRINT(out, DELAY_FMT_DEFAULT,</div><div class='add'>+				TASK_AVG(tasks[i], cpu),</div><div class='add'>+				TASK_AVG(tasks[i], blkio),</div><div class='add'>+				TASK_AVG(tasks[i], irq),</div><div class='add'>+				TASK_AVG(tasks[i], mem));</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	suc &amp;= BOOL_FPRINT(out, "\n");</div><div class='hunk'>@@ -769,11 +995,79 @@ static void display_results(void)</div><div class='ctx'> 		perror("Error writing to output");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Check for keyboard input with timeout based on cfg.delay */</div><div class='add'>+static char check_for_keypress(void)</div><div class='add'>+{</div><div class='add'>+	struct timeval tv = {cfg.delay, 0};</div><div class='add'>+	fd_set readfds;</div><div class='add'>+	char ch = 0;</div><div class='add'>+</div><div class='add'>+	FD_ZERO(&amp;readfds);</div><div class='add'>+	FD_SET(STDIN_FILENO, &amp;readfds);</div><div class='add'>+	int r = select(STDIN_FILENO + 1, &amp;readfds, NULL, NULL, &amp;tv);</div><div class='add'>+</div><div class='add'>+	if (r &gt; 0 &amp;&amp; FD_ISSET(STDIN_FILENO, &amp;readfds)) {</div><div class='add'>+		read(STDIN_FILENO, &amp;ch, 1);</div><div class='add'>+		return ch;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MAX_MODE_SIZE 2</div><div class='add'>+static void toggle_display_mode(void)</div><div class='add'>+{</div><div class='add'>+	static const size_t modes[MAX_MODE_SIZE] = {MODE_DEFAULT, MODE_MEMVERBOSE};</div><div class='add'>+	static size_t cur_index;</div><div class='add'>+</div><div class='add'>+	cur_index = (cur_index + 1) % MAX_MODE_SIZE;</div><div class='add'>+	cfg.display_mode = modes[cur_index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Handle keyboard input: sorting selection, mode toggle, or quit */</div><div class='add'>+static void handle_keypress(char ch, int *running)</div><div class='add'>+{</div><div class='add'>+	const struct field_desc *field;</div><div class='add'>+</div><div class='add'>+	/* Change sort field */</div><div class='add'>+	if (sort_selected) {</div><div class='add'>+		field = get_field_by_cmd_char(ch);</div><div class='add'>+		if (field &amp;&amp; (field-&gt;supported_modes &amp; cfg.display_mode))</div><div class='add'>+			cfg.sort_field = field;</div><div class='add'>+</div><div class='add'>+		sort_selected = 0;</div><div class='add'>+	/* Handle mode changes or quit */</div><div class='add'>+	} else {</div><div class='add'>+		switch (ch) {</div><div class='add'>+		case 'o':</div><div class='add'>+			sort_selected = 1;</div><div class='add'>+			break;</div><div class='add'>+		case 'M':</div><div class='add'>+			toggle_display_mode();</div><div class='add'>+			for (field = sort_fields; field-&gt;name != NULL; field++) {</div><div class='add'>+				if (field-&gt;supported_modes &amp; cfg.display_mode) {</div><div class='add'>+					cfg.sort_field = field;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 'q':</div><div class='add'>+		case 'Q':</div><div class='add'>+			*running = 0;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Main function */</div><div class='ctx'> int main(int argc, char **argv)</div><div class='ctx'> {</div><div class='add'>+	const struct field_desc *field;</div><div class='ctx'> 	int iterations = 0;</div><div class='del'>-	int use_q_quit = 0;</div><div class='add'>+	int psi_ret = 0;</div><div class='add'>+	char keypress;</div><div class='ctx'> </div><div class='ctx'> 	/* Parse command line arguments */</div><div class='ctx'> 	parse_args(argc, argv);</div><div class='hunk'>@@ -793,17 +1087,24 @@ int main(int argc, char **argv)</div><div class='ctx'> 		exit(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cfg.output_one_time) {</div><div class='del'>-		use_q_quit = 1;</div><div class='del'>-		enable_raw_mode();</div><div class='del'>-		printf("Press 'q' to quit.\n");</div><div class='del'>-		fflush(stdout);</div><div class='del'>-	}</div><div class='add'>+	/* Set terminal to non-canonical mode for interaction */</div><div class='add'>+	enable_raw_mode();</div><div class='ctx'> </div><div class='ctx'> 	/* Main loop */</div><div class='ctx'> 	while (running) {</div><div class='add'>+		/* Auto-switch sort field when not matching display mode */</div><div class='add'>+		if (!(cfg.sort_field-&gt;supported_modes &amp; cfg.display_mode)) {</div><div class='add'>+			for (field = sort_fields; field-&gt;name != NULL; field++) {</div><div class='add'>+				if (field-&gt;supported_modes &amp; cfg.display_mode) {</div><div class='add'>+					cfg.sort_field = field;</div><div class='add'>+					printf("Auto-switched sort field to: %s\n", field-&gt;name);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Read PSI statistics */</div><div class='del'>-		read_psi_stats();</div><div class='add'>+		psi_ret = read_psi_stats();</div><div class='ctx'> </div><div class='ctx'> 		/* Get container stats if container path provided */</div><div class='ctx'> 		if (cfg.container_path)</div><div class='hunk'>@@ -816,7 +1117,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 		sort_tasks();</div><div class='ctx'> </div><div class='ctx'> 		/* Display results to stdout or log file */</div><div class='del'>-		display_results();</div><div class='add'>+		display_results(psi_ret);</div><div class='ctx'> </div><div class='ctx'> 		/* Check for iterations */</div><div class='ctx'> 		if (cfg.iterations &gt; 0 &amp;&amp; ++iterations &gt;= cfg.iterations)</div><div class='hunk'>@@ -826,32 +1127,14 @@ int main(int argc, char **argv)</div><div class='ctx'> 		if (cfg.output_one_time)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		/* Check for 'q' key to quit */</div><div class='del'>-		if (use_q_quit) {</div><div class='del'>-			struct timeval tv = {cfg.delay, 0};</div><div class='del'>-			fd_set readfds;</div><div class='del'>-</div><div class='del'>-			FD_ZERO(&amp;readfds);</div><div class='del'>-			FD_SET(STDIN_FILENO, &amp;readfds);</div><div class='del'>-			int r = select(STDIN_FILENO+1, &amp;readfds, NULL, NULL, &amp;tv);</div><div class='del'>-</div><div class='del'>-			if (r &gt; 0 &amp;&amp; FD_ISSET(STDIN_FILENO, &amp;readfds)) {</div><div class='del'>-				char ch = 0;</div><div class='del'>-</div><div class='del'>-				read(STDIN_FILENO, &amp;ch, 1);</div><div class='del'>-				if (ch == 'q' || ch == 'Q') {</div><div class='del'>-					running = 0;</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			sleep(cfg.delay);</div><div class='del'>-		}</div><div class='add'>+		/* Keypress for interactive usage */</div><div class='add'>+		keypress = check_for_keypress();</div><div class='add'>+		if (keypress)</div><div class='add'>+			handle_keypress(keypress, &amp;running);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Restore terminal mode */</div><div class='del'>-	if (use_q_quit)</div><div class='del'>-		disable_raw_mode();</div><div class='add'>+	disable_raw_mode();</div><div class='ctx'> </div><div class='ctx'> 	/* Cleanup */</div><div class='ctx'> 	close(nl_sd);</div><div class='head'>diff --git a/tools/arch/arm/include/uapi/asm/kvm.h b/tools/arch/arm/include/uapi/asm/kvm.h<br/>deleted file mode 100644<br/>index d5dd96902817..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm/include/uapi/asm/kvm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm/include/uapi/asm/kvm.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,315 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2012 - Virtual Open Systems and Columbia University</div><div class='del'>- * Author: Christoffer Dall &lt;c.dall@virtualopensystems.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ARM_KVM_H__</div><div class='del'>-#define __ARM_KVM_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/psci.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-</div><div class='del'>-#define __KVM_HAVE_GUEST_DEBUG</div><div class='del'>-#define __KVM_HAVE_IRQ_LINE</div><div class='del'>-#define __KVM_HAVE_READONLY_MEM</div><div class='del'>-#define __KVM_HAVE_VCPU_EVENTS</div><div class='del'>-</div><div class='del'>-#define KVM_COALESCED_MMIO_PAGE_OFFSET 1</div><div class='del'>-</div><div class='del'>-#define KVM_REG_SIZE(id)						\</div><div class='del'>-	(1U &lt;&lt; (((id) &amp; KVM_REG_SIZE_MASK) &gt;&gt; KVM_REG_SIZE_SHIFT))</div><div class='del'>-</div><div class='del'>-/* Valid for svc_regs, abt_regs, und_regs, irq_regs in struct kvm_regs */</div><div class='del'>-#define KVM_ARM_SVC_sp		svc_regs[0]</div><div class='del'>-#define KVM_ARM_SVC_lr		svc_regs[1]</div><div class='del'>-#define KVM_ARM_SVC_spsr	svc_regs[2]</div><div class='del'>-#define KVM_ARM_ABT_sp		abt_regs[0]</div><div class='del'>-#define KVM_ARM_ABT_lr		abt_regs[1]</div><div class='del'>-#define KVM_ARM_ABT_spsr	abt_regs[2]</div><div class='del'>-#define KVM_ARM_UND_sp		und_regs[0]</div><div class='del'>-#define KVM_ARM_UND_lr		und_regs[1]</div><div class='del'>-#define KVM_ARM_UND_spsr	und_regs[2]</div><div class='del'>-#define KVM_ARM_IRQ_sp		irq_regs[0]</div><div class='del'>-#define KVM_ARM_IRQ_lr		irq_regs[1]</div><div class='del'>-#define KVM_ARM_IRQ_spsr	irq_regs[2]</div><div class='del'>-</div><div class='del'>-/* Valid only for fiq_regs in struct kvm_regs */</div><div class='del'>-#define KVM_ARM_FIQ_r8		fiq_regs[0]</div><div class='del'>-#define KVM_ARM_FIQ_r9		fiq_regs[1]</div><div class='del'>-#define KVM_ARM_FIQ_r10		fiq_regs[2]</div><div class='del'>-#define KVM_ARM_FIQ_fp		fiq_regs[3]</div><div class='del'>-#define KVM_ARM_FIQ_ip		fiq_regs[4]</div><div class='del'>-#define KVM_ARM_FIQ_sp		fiq_regs[5]</div><div class='del'>-#define KVM_ARM_FIQ_lr		fiq_regs[6]</div><div class='del'>-#define KVM_ARM_FIQ_spsr	fiq_regs[7]</div><div class='del'>-</div><div class='del'>-struct kvm_regs {</div><div class='del'>-	struct pt_regs usr_regs;	/* R0_usr - R14_usr, PC, CPSR */</div><div class='del'>-	unsigned long svc_regs[3];	/* SP_svc, LR_svc, SPSR_svc */</div><div class='del'>-	unsigned long abt_regs[3];	/* SP_abt, LR_abt, SPSR_abt */</div><div class='del'>-	unsigned long und_regs[3];	/* SP_und, LR_und, SPSR_und */</div><div class='del'>-	unsigned long irq_regs[3];	/* SP_irq, LR_irq, SPSR_irq */</div><div class='del'>-	unsigned long fiq_regs[8];	/* R8_fiq - R14_fiq, SPSR_fiq */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Supported Processor Types */</div><div class='del'>-#define KVM_ARM_TARGET_CORTEX_A15	0</div><div class='del'>-#define KVM_ARM_TARGET_CORTEX_A7	1</div><div class='del'>-#define KVM_ARM_NUM_TARGETS		2</div><div class='del'>-</div><div class='del'>-/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */</div><div class='del'>-#define KVM_ARM_DEVICE_TYPE_SHIFT	0</div><div class='del'>-#define KVM_ARM_DEVICE_TYPE_MASK	(0xffff &lt;&lt; KVM_ARM_DEVICE_TYPE_SHIFT)</div><div class='del'>-#define KVM_ARM_DEVICE_ID_SHIFT		16</div><div class='del'>-#define KVM_ARM_DEVICE_ID_MASK		(0xffff &lt;&lt; KVM_ARM_DEVICE_ID_SHIFT)</div><div class='del'>-</div><div class='del'>-/* Supported device IDs */</div><div class='del'>-#define KVM_ARM_DEVICE_VGIC_V2		0</div><div class='del'>-</div><div class='del'>-/* Supported VGIC address types  */</div><div class='del'>-#define KVM_VGIC_V2_ADDR_TYPE_DIST	0</div><div class='del'>-#define KVM_VGIC_V2_ADDR_TYPE_CPU	1</div><div class='del'>-</div><div class='del'>-#define KVM_VGIC_V2_DIST_SIZE		0x1000</div><div class='del'>-#define KVM_VGIC_V2_CPU_SIZE		0x2000</div><div class='del'>-</div><div class='del'>-/* Supported VGICv3 address types  */</div><div class='del'>-#define KVM_VGIC_V3_ADDR_TYPE_DIST	2</div><div class='del'>-#define KVM_VGIC_V3_ADDR_TYPE_REDIST	3</div><div class='del'>-#define KVM_VGIC_ITS_ADDR_TYPE		4</div><div class='del'>-#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION	5</div><div class='del'>-</div><div class='del'>-#define KVM_VGIC_V3_DIST_SIZE		SZ_64K</div><div class='del'>-#define KVM_VGIC_V3_REDIST_SIZE		(2 * SZ_64K)</div><div class='del'>-#define KVM_VGIC_V3_ITS_SIZE		(2 * SZ_64K)</div><div class='del'>-</div><div class='del'>-#define KVM_ARM_VCPU_POWER_OFF		0 /* CPU is started in OFF state */</div><div class='del'>-#define KVM_ARM_VCPU_PSCI_0_2		1 /* CPU uses PSCI v0.2 */</div><div class='del'>-</div><div class='del'>-struct kvm_vcpu_init {</div><div class='del'>-	__u32 target;</div><div class='del'>-	__u32 features[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_sregs {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_fpu {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_guest_debug_arch {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_debug_exit_arch {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_sync_regs {</div><div class='del'>-	/* Used with KVM_CAP_ARM_USER_IRQ */</div><div class='del'>-	__u64 device_irq_level;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvm_arch_memory_slot {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* for KVM_GET/SET_VCPU_EVENTS */</div><div class='del'>-struct kvm_vcpu_events {</div><div class='del'>-	struct {</div><div class='del'>-		__u8 serror_pending;</div><div class='del'>-		__u8 serror_has_esr;</div><div class='del'>-		__u8 ext_dabt_pending;</div><div class='del'>-		/* Align it to 8 bytes */</div><div class='del'>-		__u8 pad[5];</div><div class='del'>-		__u64 serror_esr;</div><div class='del'>-	} exception;</div><div class='del'>-	__u32 reserved[12];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* If you need to interpret the index values, here is the key: */</div><div class='del'>-#define KVM_REG_ARM_COPROC_MASK		0x000000000FFF0000</div><div class='del'>-#define KVM_REG_ARM_COPROC_SHIFT	16</div><div class='del'>-#define KVM_REG_ARM_32_OPC2_MASK	0x0000000000000007</div><div class='del'>-#define KVM_REG_ARM_32_OPC2_SHIFT	0</div><div class='del'>-#define KVM_REG_ARM_OPC1_MASK		0x0000000000000078</div><div class='del'>-#define KVM_REG_ARM_OPC1_SHIFT		3</div><div class='del'>-#define KVM_REG_ARM_CRM_MASK		0x0000000000000780</div><div class='del'>-#define KVM_REG_ARM_CRM_SHIFT		7</div><div class='del'>-#define KVM_REG_ARM_32_CRN_MASK		0x0000000000007800</div><div class='del'>-#define KVM_REG_ARM_32_CRN_SHIFT	11</div><div class='del'>-/*</div><div class='del'>- * For KVM currently all guest registers are nonsecure, but we reserve a bit</div><div class='del'>- * in the encoding to distinguish secure from nonsecure for AArch32 system</div><div class='del'>- * registers that are banked by security. This is 1 for the secure banked</div><div class='del'>- * register, and 0 for the nonsecure banked register or if the register is</div><div class='del'>- * not banked by security.</div><div class='del'>- */</div><div class='del'>-#define KVM_REG_ARM_SECURE_MASK	0x0000000010000000</div><div class='del'>-#define KVM_REG_ARM_SECURE_SHIFT	28</div><div class='del'>-</div><div class='del'>-#define ARM_CP15_REG_SHIFT_MASK(x,n) \</div><div class='del'>-	(((x) &lt;&lt; KVM_REG_ARM_ ## n ## _SHIFT) &amp; KVM_REG_ARM_ ## n ## _MASK)</div><div class='del'>-</div><div class='del'>-#define __ARM_CP15_REG(op1,crn,crm,op2) \</div><div class='del'>-	(KVM_REG_ARM | (15 &lt;&lt; KVM_REG_ARM_COPROC_SHIFT) | \</div><div class='del'>-	ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \</div><div class='del'>-	ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \</div><div class='del'>-	ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \</div><div class='del'>-	ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))</div><div class='del'>-</div><div class='del'>-#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32)</div><div class='del'>-</div><div class='del'>-#define __ARM_CP15_REG64(op1,crm) \</div><div class='del'>-	(__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)</div><div class='del'>-#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__)</div><div class='del'>-</div><div class='del'>-/* PL1 Physical Timer Registers */</div><div class='del'>-#define KVM_REG_ARM_PTIMER_CTL		ARM_CP15_REG32(0, 14, 2, 1)</div><div class='del'>-#define KVM_REG_ARM_PTIMER_CNT		ARM_CP15_REG64(0, 14)</div><div class='del'>-#define KVM_REG_ARM_PTIMER_CVAL		ARM_CP15_REG64(2, 14)</div><div class='del'>-</div><div class='del'>-/* Virtual Timer Registers */</div><div class='del'>-#define KVM_REG_ARM_TIMER_CTL		ARM_CP15_REG32(0, 14, 3, 1)</div><div class='del'>-#define KVM_REG_ARM_TIMER_CNT		ARM_CP15_REG64(1, 14)</div><div class='del'>-#define KVM_REG_ARM_TIMER_CVAL		ARM_CP15_REG64(3, 14)</div><div class='del'>-</div><div class='del'>-/* Normal registers are mapped as coprocessor 16. */</div><div class='del'>-#define KVM_REG_ARM_CORE		(0x0010 &lt;&lt; KVM_REG_ARM_COPROC_SHIFT)</div><div class='del'>-#define KVM_REG_ARM_CORE_REG(name)	(offsetof(struct kvm_regs, name) / 4)</div><div class='del'>-</div><div class='del'>-/* Some registers need more space to represent values. */</div><div class='del'>-#define KVM_REG_ARM_DEMUX		(0x0011 &lt;&lt; KVM_REG_ARM_COPROC_SHIFT)</div><div class='del'>-#define KVM_REG_ARM_DEMUX_ID_MASK	0x000000000000FF00</div><div class='del'>-#define KVM_REG_ARM_DEMUX_ID_SHIFT	8</div><div class='del'>-#define KVM_REG_ARM_DEMUX_ID_CCSIDR	(0x00 &lt;&lt; KVM_REG_ARM_DEMUX_ID_SHIFT)</div><div class='del'>-#define KVM_REG_ARM_DEMUX_VAL_MASK	0x00000000000000FF</div><div class='del'>-#define KVM_REG_ARM_DEMUX_VAL_SHIFT	0</div><div class='del'>-</div><div class='del'>-/* VFP registers: we could overload CP10 like ARM does, but that's ugly. */</div><div class='del'>-#define KVM_REG_ARM_VFP			(0x0012 &lt;&lt; KVM_REG_ARM_COPROC_SHIFT)</div><div class='del'>-#define KVM_REG_ARM_VFP_MASK		0x000000000000FFFF</div><div class='del'>-#define KVM_REG_ARM_VFP_BASE_REG	0x0</div><div class='del'>-#define KVM_REG_ARM_VFP_FPSID		0x1000</div><div class='del'>-#define KVM_REG_ARM_VFP_FPSCR		0x1001</div><div class='del'>-#define KVM_REG_ARM_VFP_MVFR1		0x1006</div><div class='del'>-#define KVM_REG_ARM_VFP_MVFR0		0x1007</div><div class='del'>-#define KVM_REG_ARM_VFP_FPEXC		0x1008</div><div class='del'>-#define KVM_REG_ARM_VFP_FPINST		0x1009</div><div class='del'>-#define KVM_REG_ARM_VFP_FPINST2		0x100A</div><div class='del'>-</div><div class='del'>-/* KVM-as-firmware specific pseudo-registers */</div><div class='del'>-#define KVM_REG_ARM_FW			(0x0014 &lt;&lt; KVM_REG_ARM_COPROC_SHIFT)</div><div class='del'>-#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM | KVM_REG_SIZE_U64 | \</div><div class='del'>-					 KVM_REG_ARM_FW | ((r) &amp; 0xffff))</div><div class='del'>-#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1	KVM_REG_ARM_FW_REG(1)</div><div class='del'>-	/* Higher values mean better protection. */</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL		0</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL		1</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED	2</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2	KVM_REG_ARM_FW_REG(2)</div><div class='del'>-	/* Higher values mean better protection. */</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL		0</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN		1</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL		2</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED	3</div><div class='del'>-#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED	(1U &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-/* Device Control API: ARM VGIC */</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_ADDR	0</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS	2</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_CPUID_SHIFT	32</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_CPUID_MASK	(0xffULL &lt;&lt; KVM_DEV_ARM_VGIC_CPUID_SHIFT)</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \</div><div class='del'>-			(0xffffffffULL &lt;&lt; KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_OFFSET_SHIFT	0</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_OFFSET_MASK	(0xffffffffULL &lt;&lt; KVM_DEV_ARM_VGIC_OFFSET_SHIFT)</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS	3</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_CTRL       4</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO  7</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS	8</div><div class='del'>-#define KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ	9</div><div class='del'>-#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT	10</div><div class='del'>-#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \</div><div class='del'>-			(0x3fffffULL &lt;&lt; KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)</div><div class='del'>-#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff</div><div class='del'>-#define VGIC_LEVEL_INFO_LINE_LEVEL	0</div><div class='del'>-</div><div class='del'>-/* Device Control API on vcpu fd */</div><div class='del'>-#define KVM_ARM_VCPU_PMU_V3_CTRL	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_IRQ	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_INIT	1</div><div class='del'>-#define KVM_ARM_VCPU_TIMER_CTRL		1</div><div class='del'>-#define   KVM_ARM_VCPU_TIMER_IRQ_VTIMER		0</div><div class='del'>-#define   KVM_ARM_VCPU_TIMER_IRQ_PTIMER		1</div><div class='del'>-</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_CTRL_INIT		0</div><div class='del'>-#define   KVM_DEV_ARM_ITS_SAVE_TABLES		1</div><div class='del'>-#define   KVM_DEV_ARM_ITS_RESTORE_TABLES	2</div><div class='del'>-#define   KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES	3</div><div class='del'>-#define   KVM_DEV_ARM_ITS_CTRL_RESET		4</div><div class='del'>-</div><div class='del'>-/* KVM_IRQ_LINE irq field index values */</div><div class='del'>-#define KVM_ARM_IRQ_VCPU2_SHIFT		28</div><div class='del'>-#define KVM_ARM_IRQ_VCPU2_MASK		0xf</div><div class='del'>-#define KVM_ARM_IRQ_TYPE_SHIFT		24</div><div class='del'>-#define KVM_ARM_IRQ_TYPE_MASK		0xf</div><div class='del'>-#define KVM_ARM_IRQ_VCPU_SHIFT		16</div><div class='del'>-#define KVM_ARM_IRQ_VCPU_MASK		0xff</div><div class='del'>-#define KVM_ARM_IRQ_NUM_SHIFT		0</div><div class='del'>-#define KVM_ARM_IRQ_NUM_MASK		0xffff</div><div class='del'>-</div><div class='del'>-/* irq_type field */</div><div class='del'>-#define KVM_ARM_IRQ_TYPE_CPU		0</div><div class='del'>-#define KVM_ARM_IRQ_TYPE_SPI		1</div><div class='del'>-#define KVM_ARM_IRQ_TYPE_PPI		2</div><div class='del'>-</div><div class='del'>-/* out-of-kernel GIC cpu interrupt injection irq_number field */</div><div class='del'>-#define KVM_ARM_IRQ_CPU_IRQ		0</div><div class='del'>-#define KVM_ARM_IRQ_CPU_FIQ		1</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This used to hold the highest supported SPI, but it is now obsolete</div><div class='del'>- * and only here to provide source code level compatibility with older</div><div class='del'>- * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS.</div><div class='del'>- */</div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-#define KVM_ARM_IRQ_GIC_MAX		127</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* One single KVM irqchip, ie. the VGIC */</div><div class='del'>-#define KVM_NR_IRQCHIPS          1</div><div class='del'>-</div><div class='del'>-/* PSCI interface */</div><div class='del'>-#define KVM_PSCI_FN_BASE		0x95c1ba5e</div><div class='del'>-#define KVM_PSCI_FN(n)			(KVM_PSCI_FN_BASE + (n))</div><div class='del'>-</div><div class='del'>-#define KVM_PSCI_FN_CPU_SUSPEND		KVM_PSCI_FN(0)</div><div class='del'>-#define KVM_PSCI_FN_CPU_OFF		KVM_PSCI_FN(1)</div><div class='del'>-#define KVM_PSCI_FN_CPU_ON		KVM_PSCI_FN(2)</div><div class='del'>-#define KVM_PSCI_FN_MIGRATE		KVM_PSCI_FN(3)</div><div class='del'>-</div><div class='del'>-#define KVM_PSCI_RET_SUCCESS		PSCI_RET_SUCCESS</div><div class='del'>-#define KVM_PSCI_RET_NI			PSCI_RET_NOT_SUPPORTED</div><div class='del'>-#define KVM_PSCI_RET_INVAL		PSCI_RET_INVALID_PARAMS</div><div class='del'>-#define KVM_PSCI_RET_DENIED		PSCI_RET_DENIED</div><div class='del'>-</div><div class='del'>-#endif /* __ARM_KVM_H__ */</div><div class='head'>diff --git a/tools/arch/arm64/include/asm/cputype.h b/tools/arch/arm64/include/asm/cputype.h<br/>index 9a5d85cfd1fb..f898c47e551f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/cputype.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm64/include/asm/cputype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/cputype.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/arm64/include/asm/cputype.h</a></div><div class='hunk'>@@ -75,11 +75,13 @@</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A76		0xD0B</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_N1	0xD0C</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A77		0xD0D</div><div class='add'>+#define ARM_CPU_PART_CORTEX_A76AE	0xD0E</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_V1	0xD40</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78		0xD41</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78AE	0xD42</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X1		0xD44</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A510	0xD46</div><div class='add'>+#define ARM_CPU_PART_CORTEX_X1C		0xD4C</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A520	0xD80</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A710	0xD47</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A715	0xD4D</div><div class='hunk'>@@ -94,6 +96,7 @@</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_V3	0xD84</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X925	0xD85</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A725	0xD87</div><div class='add'>+#define ARM_CPU_PART_CORTEX_A720AE	0xD89</div><div class='ctx'> #define ARM_CPU_PART_NEOVERSE_N3	0xD8E</div><div class='ctx'> </div><div class='ctx'> #define APM_CPU_PART_XGENE		0x000</div><div class='hunk'>@@ -119,9 +122,11 @@</div><div class='ctx'> #define QCOM_CPU_PART_KRYO		0x200</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_2XX_GOLD	0x800</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_2XX_SILVER	0x801</div><div class='add'>+#define QCOM_CPU_PART_KRYO_3XX_GOLD	0x802</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_3XX_SILVER	0x803</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_4XX_GOLD	0x804</div><div class='ctx'> #define QCOM_CPU_PART_KRYO_4XX_SILVER	0x805</div><div class='add'>+#define QCOM_CPU_PART_ORYON_X1		0x001</div><div class='ctx'> </div><div class='ctx'> #define NVIDIA_CPU_PART_DENVER		0x003</div><div class='ctx'> #define NVIDIA_CPU_PART_CARMEL		0x004</div><div class='hunk'>@@ -129,6 +134,7 @@</div><div class='ctx'> #define FUJITSU_CPU_PART_A64FX		0x001</div><div class='ctx'> </div><div class='ctx'> #define HISI_CPU_PART_TSV110		0xD01</div><div class='add'>+#define HISI_CPU_PART_HIP09			0xD02</div><div class='ctx'> #define HISI_CPU_PART_HIP12		0xD06</div><div class='ctx'> </div><div class='ctx'> #define APPLE_CPU_PART_M1_ICESTORM	0x022</div><div class='hunk'>@@ -159,11 +165,13 @@</div><div class='ctx'> #define MIDR_CORTEX_A76	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)</div><div class='ctx'> #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)</div><div class='ctx'> #define MIDR_CORTEX_A77	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)</div><div class='add'>+#define MIDR_CORTEX_A76AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76AE)</div><div class='ctx'> #define MIDR_NEOVERSE_V1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)</div><div class='ctx'> #define MIDR_CORTEX_A78	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)</div><div class='ctx'> #define MIDR_CORTEX_A78AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)</div><div class='ctx'> #define MIDR_CORTEX_X1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)</div><div class='ctx'> #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)</div><div class='add'>+#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C)</div><div class='ctx'> #define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)</div><div class='ctx'> #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)</div><div class='ctx'> #define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)</div><div class='hunk'>@@ -178,6 +186,7 @@</div><div class='ctx'> #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)</div><div class='ctx'> #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)</div><div class='ctx'> #define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)</div><div class='add'>+#define MIDR_CORTEX_A720AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720AE)</div><div class='ctx'> #define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)</div><div class='ctx'> #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)</div><div class='ctx'> #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)</div><div class='hunk'>@@ -196,13 +205,26 @@</div><div class='ctx'> #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)</div><div class='ctx'> #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER)</div><div class='add'>+#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)</div><div class='ctx'> #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)</div><div class='ctx'> #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)</div><div class='add'>+#define MIDR_QCOM_ORYON_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_ORYON_X1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * NOTES:</div><div class='add'>+ * - Qualcomm Kryo 5XX Prime / Gold ID themselves as MIDR_CORTEX_A77</div><div class='add'>+ * - Qualcomm Kryo 5XX Silver IDs itself as MIDR_QCOM_KRYO_4XX_SILVER</div><div class='add'>+ * - Qualcomm Kryo 6XX Prime IDs itself as MIDR_CORTEX_X1</div><div class='add'>+ * - Qualcomm Kryo 6XX Gold IDs itself as ARM_CPU_PART_CORTEX_A78</div><div class='add'>+ * - Qualcomm Kryo 6XX Silver IDs itself as MIDR_CORTEX_A55</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> #define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)</div><div class='ctx'> #define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)</div><div class='ctx'> #define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)</div><div class='ctx'> #define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)</div><div class='add'>+#define MIDR_HISI_HIP09 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP09)</div><div class='ctx'> #define MIDR_HISI_HIP12 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP12)</div><div class='ctx'> #define MIDR_APPLE_M1_ICESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM)</div><div class='ctx'> #define MIDR_APPLE_M1_FIRESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM)</div><div class='hunk'>@@ -225,7 +247,7 @@</div><div class='ctx'> #define MIDR_FUJITSU_ERRATUM_010001_MASK	(~MIDR_CPU_VAR_REV(1, 0))</div><div class='ctx'> #define TCR_CLEAR_FUJITSU_ERRATUM_010001	(TCR_NFD1 | TCR_NFD0)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +313,14 @@ static inline u32 __attribute_const__ read_cpuid_id(void)</div><div class='ctx'> 	return read_cpuid(MIDR_EL1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct target_impl_cpu {</div><div class='add'>+	u64 midr;</div><div class='add'>+	u64 revidr;</div><div class='add'>+	u64 aidr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool cpu_errata_set_target_impl(u64 num, void *impl_cpus);</div><div class='add'>+</div><div class='ctx'> static inline u64 __attribute_const__ read_cpuid_mpidr(void)</div><div class='ctx'> {</div><div class='ctx'> 	return read_cpuid(MPIDR_EL1);</div><div class='hunk'>@@ -310,6 +340,6 @@ static inline u32 __attribute_const__ read_cpuid_cachetype(void)</div><div class='ctx'> {</div><div class='ctx'> 	return read_cpuid(CTR_EL0);</div><div class='ctx'> }</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/arch/arm64/include/asm/esr.h b/tools/arch/arm64/include/asm/esr.h<br/>index bd592ca81571..f3c6403e5ef2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/esr.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm64/include/asm/esr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/esr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/arm64/include/asm/esr.h</a></div><div class='hunk'>@@ -141,6 +141,8 @@</div><div class='ctx'> #define ESR_ELx_SF 		(UL(1) &lt;&lt; ESR_ELx_SF_SHIFT)</div><div class='ctx'> #define ESR_ELx_AR_SHIFT	(14)</div><div class='ctx'> #define ESR_ELx_AR 		(UL(1) &lt;&lt; ESR_ELx_AR_SHIFT)</div><div class='add'>+#define ESR_ELx_VNCR_SHIFT	(13)</div><div class='add'>+#define ESR_ELx_VNCR		(UL(1) &lt;&lt; ESR_ELx_VNCR_SHIFT)</div><div class='ctx'> #define ESR_ELx_CM_SHIFT	(8)</div><div class='ctx'> #define ESR_ELx_CM 		(UL(1) &lt;&lt; ESR_ELx_CM_SHIFT)</div><div class='ctx'> </div><div class='hunk'>@@ -385,7 +387,7 @@</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_SRCREG(esr)	(((esr) &amp; (UL(0x1f) &lt;&lt; 5)) &gt;&gt; 5)</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_SIZEREG(esr)	(((esr) &amp; (UL(0x1f) &lt;&lt; 0)) &gt;&gt; 0)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long esr_brk_comment(unsigned long esr)</div><div class='hunk'>@@ -450,6 +452,6 @@ static inline bool esr_iss_is_eretab(unsigned long esr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const char *esr_get_class_string(unsigned long esr);</div><div class='del'>-#endif /* __ASSEMBLY */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ESR_H */</div><div class='head'>diff --git a/tools/arch/arm64/include/asm/gpr-num.h b/tools/arch/arm64/include/asm/gpr-num.h<br/>index 05da4a7c5788..a114e4f8209b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/gpr-num.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm64/include/asm/gpr-num.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/gpr-num.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/arm64/include/asm/gpr-num.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_GPR_NUM_H</div><div class='ctx'> #define __ASM_GPR_NUM_H</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> 	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30</div><div class='ctx'> 	.equ	.L__gpr_num_x\num, \num</div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> 	.equ	.L__gpr_num_xzr, 31</div><div class='ctx'> 	.equ	.L__gpr_num_wzr, 31</div><div class='ctx'> </div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='add'>+#else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #define __DEFINE_ASM_GPR_NUMS					\</div><div class='ctx'> "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n" \</div><div class='hunk'>@@ -21,6 +21,6 @@</div><div class='ctx'> "	.equ	.L__gpr_num_xzr, 31\n"				\</div><div class='ctx'> "	.equ	.L__gpr_num_wzr, 31\n"</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_GPR_NUM_H */</div><div class='head'>diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h<br/>index 690b6ebd118f..178b7322bf04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/sysreg.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm64/include/asm/sysreg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/asm/sysreg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/arm64/include/asm/sysreg.h</a></div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_BROKEN_GAS_INST</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> // The space separator is omitted so that __emit_inst(x) can be parsed as</div><div class='ctx'> // either an assembler directive or an assembler macro argument.</div><div class='ctx'> #define __emit_inst(x)			.inst(x)</div><div class='hunk'>@@ -70,11 +70,11 @@</div><div class='ctx'> 					 (((x) &gt;&gt; 24) &amp; 0x000000ff))</div><div class='ctx'> #endif	/* CONFIG_CPU_BIG_ENDIAN */</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define __emit_inst(x)			.long __INSTR_BSWAP(x)</div><div class='del'>-#else  /* __ASSEMBLY__ */</div><div class='add'>+#else  /* __ASSEMBLER__ */</div><div class='ctx'> #define __emit_inst(x)			".long " __stringify(__INSTR_BSWAP(x)) "\n\t"</div><div class='del'>-#endif	/* __ASSEMBLY__ */</div><div class='add'>+#endif	/* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif	/* CONFIG_BROKEN_GAS_INST */</div><div class='ctx'> </div><div class='hunk'>@@ -1078,12 +1078,7 @@</div><div class='ctx'> #define GCS_CAP(x)	((((unsigned long)x) &amp; GCS_CAP_ADDR_MASK) | \</div><div class='ctx'> 					       GCS_CAP_VALID_TOKEN)</div><div class='ctx'> </div><div class='del'>-#define ARM64_FEATURE_FIELD_BITS	4</div><div class='del'>-</div><div class='del'>-/* Defined for compatibility only, do not add new users. */</div><div class='del'>-#define ARM64_FEATURE_MASK(x)	(x##_MASK)</div><div class='del'>-</div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> 	.macro	mrs_s, rt, sreg</div><div class='ctx'> 	 __emit_inst(0xd5200000|(\sreg)|(.L__gpr_num_\rt))</div><div class='head'>diff --git a/tools/arch/arm64/include/uapi/asm/kvm.h b/tools/arch/arm64/include/uapi/asm/kvm.h<br/>index ed5f3892674c..a792a599b9d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/uapi/asm/kvm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/arm64/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/arm64/include/uapi/asm/kvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/arm64/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #define KVM_SPSR_FIQ	4</div><div class='ctx'> #define KVM_NR_SPSR	5</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> #include &lt;linux/psci.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='head'>diff --git a/tools/arch/loongarch/include/asm/inst.h b/tools/arch/loongarch/include/asm/inst.h<br/>index c25b5853181d..d68fad63c8b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/loongarch/include/asm/inst.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/loongarch/include/asm/inst.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/loongarch/include/asm/inst.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/loongarch/include/asm/inst.h</a></div><div class='hunk'>@@ -51,6 +51,10 @@ enum reg2i16_op {</div><div class='ctx'> 	bgeu_op		= 0x1b,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum reg3_op {</div><div class='add'>+	amswapw_op	= 0x70c0,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct reg0i15_format {</div><div class='ctx'> 	unsigned int immediate : 15;</div><div class='ctx'> 	unsigned int opcode : 17;</div><div class='hunk'>@@ -96,6 +100,13 @@ struct reg2i16_format {</div><div class='ctx'> 	unsigned int opcode : 6;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct reg3_format {</div><div class='add'>+	unsigned int rd : 5;</div><div class='add'>+	unsigned int rj : 5;</div><div class='add'>+	unsigned int rk : 5;</div><div class='add'>+	unsigned int opcode : 17;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> union loongarch_instruction {</div><div class='ctx'> 	unsigned int word;</div><div class='ctx'> 	struct reg0i15_format	reg0i15_format;</div><div class='hunk'>@@ -105,6 +116,7 @@ union loongarch_instruction {</div><div class='ctx'> 	struct reg2i12_format	reg2i12_format;</div><div class='ctx'> 	struct reg2i14_format	reg2i14_format;</div><div class='ctx'> 	struct reg2i16_format	reg2i16_format;</div><div class='add'>+	struct reg3_format	reg3_format;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LOONGARCH_INSN_SIZE	sizeof(union loongarch_instruction)</div><div class='head'>diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h<br/>index eaeda001784e..077c5437f521 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/powerpc/include/uapi/asm/kvm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/powerpc/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/powerpc/include/uapi/asm/kvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/powerpc/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -1,18 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='ctx'> /*</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- *</div><div class='ctx'>  * Copyright IBM Corp. 2007</div><div class='ctx'>  *</div><div class='ctx'>  * Authors: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;</div><div class='head'>diff --git a/tools/arch/riscv/include/asm/csr.h b/tools/arch/riscv/include/asm/csr.h<br/>index 0dfc09254f99..21d8cee04638 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/riscv/include/asm/csr.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/riscv/include/asm/csr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/riscv/include/asm/csr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/riscv/include/asm/csr.h</a></div><div class='hunk'>@@ -167,7 +167,8 @@</div><div class='ctx'> #define VSIP_TO_HVIP_SHIFT	(IRQ_VS_SOFT - IRQ_S_SOFT)</div><div class='ctx'> #define VSIP_VALID_MASK		((_AC(1, UL) &lt;&lt; IRQ_S_SOFT) | \</div><div class='ctx'> 				 (_AC(1, UL) &lt;&lt; IRQ_S_TIMER) | \</div><div class='del'>-				 (_AC(1, UL) &lt;&lt; IRQ_S_EXT))</div><div class='add'>+				 (_AC(1, UL) &lt;&lt; IRQ_S_EXT) | \</div><div class='add'>+				 (_AC(1, UL) &lt;&lt; IRQ_PMU_OVF))</div><div class='ctx'> </div><div class='ctx'> /* AIA CSR bits */</div><div class='ctx'> #define TOPI_IID_SHIFT		16</div><div class='hunk'>@@ -280,7 +281,7 @@</div><div class='ctx'> #define CSR_HPMCOUNTER30H	0xc9e</div><div class='ctx'> #define CSR_HPMCOUNTER31H	0xc9f</div><div class='ctx'> </div><div class='del'>-#define CSR_SSCOUNTOVF		0xda0</div><div class='add'>+#define CSR_SCOUNTOVF		0xda0</div><div class='ctx'> </div><div class='ctx'> #define CSR_SSTATUS		0x100</div><div class='ctx'> #define CSR_SIE			0x104</div><div class='hunk'>@@ -468,13 +469,13 @@</div><div class='ctx'> #define IE_TIE		(_AC(0x1, UL) &lt;&lt; RV_IRQ_TIMER)</div><div class='ctx'> #define IE_EIE		(_AC(0x1, UL) &lt;&lt; RV_IRQ_EXT)</div><div class='ctx'> </div><div class='del'>-#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='ctx'> #define __ASM_STR(x)    x</div><div class='ctx'> #else</div><div class='ctx'> #define __ASM_STR(x)    #x</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define csr_swap(csr, val)					\</div><div class='ctx'> ({								\</div><div class='hunk'>@@ -536,6 +537,6 @@</div><div class='ctx'> 			      : "memory");			\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_RISCV_CSR_H */</div><div class='head'>diff --git a/tools/arch/riscv/include/asm/vdso/processor.h b/tools/arch/riscv/include/asm/vdso/processor.h<br/>index 662aca039848..0665b117f30f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/riscv/include/asm/vdso/processor.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/riscv/include/asm/vdso/processor.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/riscv/include/asm/vdso/processor.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/riscv/include/asm/vdso/processor.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #ifndef __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> #define __ASM_VDSO_PROCESSOR_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/barrier.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -27,6 +27,6 @@ static inline void cpu_relax(void)</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_VDSO_PROCESSOR_H */</div><div class='head'>diff --git a/tools/arch/s390/include/uapi/asm/bitsperlong.h b/tools/arch/s390/include/uapi/asm/bitsperlong.h<br/>index d2bb620119bf..a226a1686a53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/s390/include/uapi/asm/bitsperlong.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/s390/include/uapi/asm/bitsperlong.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/s390/include/uapi/asm/bitsperlong.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/s390/include/uapi/asm/bitsperlong.h</a></div><div class='hunk'>@@ -2,11 +2,7 @@</div><div class='ctx'> #ifndef __ASM_S390_BITSPERLONG_H</div><div class='ctx'> #define __ASM_S390_BITSPERLONG_H</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='del'>-#define __BITS_PER_LONG 32</div><div class='del'>-#else</div><div class='ctx'> #define __BITS_PER_LONG 64</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bitsperlong.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/arch/s390/include/uapi/asm/kvm_perf.h b/tools/arch/s390/include/uapi/asm/kvm_perf.h<br/>deleted file mode 100644<br/>index 84606b8cc49e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/s390/include/uapi/asm/kvm_perf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/s390/include/uapi/asm/kvm_perf.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='del'>-/*</div><div class='del'>- * Definitions for perf-kvm on s390</div><div class='del'>- *</div><div class='del'>- * Copyright 2014 IBM Corp.</div><div class='del'>- * Author(s): Alexander Yarygin &lt;yarygin@linux.vnet.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_KVM_PERF_S390_H</div><div class='del'>-#define __LINUX_KVM_PERF_S390_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sie.h&gt;</div><div class='del'>-</div><div class='del'>-#define DECODE_STR_LEN 40</div><div class='del'>-</div><div class='del'>-#define VCPU_ID "id"</div><div class='del'>-</div><div class='del'>-#define KVM_ENTRY_TRACE "kvm:kvm_s390_sie_enter"</div><div class='del'>-#define KVM_EXIT_TRACE "kvm:kvm_s390_sie_exit"</div><div class='del'>-#define KVM_EXIT_REASON "icptcode"</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/tools/arch/x86/include/asm/asm.h b/tools/arch/x86/include/asm/asm.h<br/>index dbe39b44256b..6e1b357c374b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/asm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/asm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/asm.h</a></div><div class='hunk'>@@ -108,18 +108,6 @@</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Macros to generate condition code outputs from inline assembly,</div><div class='del'>- * The output operand must be type "bool".</div><div class='del'>- */</div><div class='del'>-#ifdef __GCC_ASM_FLAG_OUTPUTS__</div><div class='del'>-# define CC_SET(c) "\n\t/* output condition code " #c "*/\n"</div><div class='del'>-# define CC_OUT(c) "=@cc" #c</div><div class='del'>-#else</div><div class='del'>-# define CC_SET(c) "\n\tset" #c " %[_cc_" #c "]\n"</div><div class='del'>-# define CC_OUT(c) [_cc_ ## c] "=qm"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> /* Exception table entry */</div><div class='head'>diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h<br/>index ee176236c2be..ccc01ad6ff7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/cpufeatures.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/asm/cpufeatures.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/cpufeatures.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/cpufeatures.h</a></div><div class='hunk'>@@ -218,6 +218,7 @@</div><div class='ctx'> #define X86_FEATURE_FLEXPRIORITY	( 8*32+ 1) /* "flexpriority" Intel FlexPriority */</div><div class='ctx'> #define X86_FEATURE_EPT			( 8*32+ 2) /* "ept" Intel Extended Page Table */</div><div class='ctx'> #define X86_FEATURE_VPID		( 8*32+ 3) /* "vpid" Intel Virtual Processor ID */</div><div class='add'>+#define X86_FEATURE_COHERENCY_SFW_NO	( 8*32+ 4) /* SNP cache coherency software work around not needed */</div><div class='ctx'> </div><div class='ctx'> #define X86_FEATURE_VMMCALL		( 8*32+15) /* "vmmcall" Prefer VMMCALL to VMCALL */</div><div class='ctx'> #define X86_FEATURE_XENPV		( 8*32+16) /* Xen paravirtual guest */</div><div class='hunk'>@@ -319,7 +320,7 @@</div><div class='ctx'> #define X86_FEATURE_FSRS		(12*32+11) /* Fast short REP STOSB */</div><div class='ctx'> #define X86_FEATURE_FSRC		(12*32+12) /* Fast short REP {CMPSB,SCASB} */</div><div class='ctx'> #define X86_FEATURE_FRED		(12*32+17) /* "fred" Flexible Return and Event Delivery */</div><div class='del'>-#define X86_FEATURE_LKGS		(12*32+18) /* Load "kernel" (userspace) GS */</div><div class='add'>+#define X86_FEATURE_LKGS		(12*32+18) /* Like MOV_GS except MSR_KERNEL_GS_BASE = GS.base */</div><div class='ctx'> #define X86_FEATURE_WRMSRNS		(12*32+19) /* Non-serializing WRMSR */</div><div class='ctx'> #define X86_FEATURE_AMX_FP16		(12*32+21) /* AMX fp16 Support */</div><div class='ctx'> #define X86_FEATURE_AVX_IFMA            (12*32+23) /* Support for VPMADD52[H,L]UQ */</div><div class='hunk'>@@ -406,9 +407,12 @@</div><div class='ctx'> #define X86_FEATURE_ENQCMD		(16*32+29) /* "enqcmd" ENQCMD and ENQCMDS instructions */</div><div class='ctx'> #define X86_FEATURE_SGX_LC		(16*32+30) /* "sgx_lc" Software Guard Extensions Launch Control */</div><div class='ctx'> </div><div class='del'>-/* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */</div><div class='add'>+/*</div><div class='add'>+ * Linux-defined word for use with scattered/synthetic bits.</div><div class='add'>+ */</div><div class='ctx'> #define X86_FEATURE_OVERFLOW_RECOV	(17*32+ 0) /* "overflow_recov" MCA overflow recovery support */</div><div class='ctx'> #define X86_FEATURE_SUCCOR		(17*32+ 1) /* "succor" Uncorrectable error containment and recovery */</div><div class='add'>+</div><div class='ctx'> #define X86_FEATURE_SMCA		(17*32+ 3) /* "smca" Scalable MCA */</div><div class='ctx'> </div><div class='ctx'> /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */</div><div class='hunk'>@@ -443,6 +447,7 @@</div><div class='ctx'> #define X86_FEATURE_VM_PAGE_FLUSH	(19*32+ 2) /* VM Page Flush MSR is supported */</div><div class='ctx'> #define X86_FEATURE_SEV_ES		(19*32+ 3) /* "sev_es" Secure Encrypted Virtualization - Encrypted State */</div><div class='ctx'> #define X86_FEATURE_SEV_SNP		(19*32+ 4) /* "sev_snp" Secure Encrypted Virtualization - Secure Nested Paging */</div><div class='add'>+#define X86_FEATURE_SNP_SECURE_TSC	(19*32+ 8) /* SEV-SNP Secure TSC */</div><div class='ctx'> #define X86_FEATURE_V_TSC_AUX		(19*32+ 9) /* Virtual TSC_AUX */</div><div class='ctx'> #define X86_FEATURE_SME_COHERENT	(19*32+10) /* hardware-enforced cache coherency */</div><div class='ctx'> #define X86_FEATURE_DEBUG_SWAP		(19*32+14) /* "debug_swap" SEV-ES full debug state swap support */</div><div class='hunk'>@@ -456,10 +461,14 @@</div><div class='ctx'> #define X86_FEATURE_NO_NESTED_DATA_BP	(20*32+ 0) /* No Nested Data Breakpoints */</div><div class='ctx'> #define X86_FEATURE_WRMSR_XX_BASE_NS	(20*32+ 1) /* WRMSR to {FS,GS,KERNEL_GS}_BASE is non-serializing */</div><div class='ctx'> #define X86_FEATURE_LFENCE_RDTSC	(20*32+ 2) /* LFENCE always serializing / synchronizes RDTSC */</div><div class='add'>+#define X86_FEATURE_VERW_CLEAR		(20*32+ 5) /* The memory form of VERW mitigates TSA */</div><div class='ctx'> #define X86_FEATURE_NULL_SEL_CLR_BASE	(20*32+ 6) /* Null Selector Clears Base */</div><div class='add'>+</div><div class='ctx'> #define X86_FEATURE_AUTOIBRS		(20*32+ 8) /* Automatic IBRS */</div><div class='ctx'> #define X86_FEATURE_NO_SMM_CTL_MSR	(20*32+ 9) /* SMM_CTL MSR is not present */</div><div class='ctx'> </div><div class='add'>+#define X86_FEATURE_GP_ON_USER_CPUID	(20*32+17) /* User CPUID faulting */</div><div class='add'>+</div><div class='ctx'> #define X86_FEATURE_PREFETCHI		(20*32+20) /* Prefetch Data/Instruction to Cache Level */</div><div class='ctx'> #define X86_FEATURE_SBPB		(20*32+27) /* Selective Branch Prediction Barrier */</div><div class='ctx'> #define X86_FEATURE_IBPB_BRTYPE		(20*32+28) /* MSR_PRED_CMD[IBPB] flushes all branch type predictions */</div><div class='hunk'>@@ -487,6 +496,12 @@</div><div class='ctx'> #define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */</div><div class='ctx'> #define X86_FEATURE_APX			(21*32+ 9) /* Advanced Performance Extensions */</div><div class='ctx'> #define X86_FEATURE_INDIRECT_THUNK_ITS	(21*32+10) /* Use thunk for indirect branches in lower half of cacheline */</div><div class='add'>+#define X86_FEATURE_TSA_SQ_NO		(21*32+11) /* AMD CPU not vulnerable to TSA-SQ */</div><div class='add'>+#define X86_FEATURE_TSA_L1_NO		(21*32+12) /* AMD CPU not vulnerable to TSA-L1 */</div><div class='add'>+#define X86_FEATURE_CLEAR_CPU_BUF_VM	(21*32+13) /* Clear CPU buffers using VERW before VMRUN */</div><div class='add'>+#define X86_FEATURE_IBPB_EXIT_TO_USER	(21*32+14) /* Use IBPB on exit-to-userspace, see VMSCAPE bug */</div><div class='add'>+#define X86_FEATURE_ABMC		(21*32+15) /* Assignable Bandwidth Monitoring Counters */</div><div class='add'>+#define X86_FEATURE_MSR_IMM		(21*32+16) /* MSR immediate form instructions */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * BUG word(s)</div><div class='hunk'>@@ -542,5 +557,6 @@</div><div class='ctx'> #define X86_BUG_OLD_MICROCODE		X86_BUG( 1*32+ 6) /* "old_microcode" CPU has old microcode, it is surely vulnerable to something */</div><div class='ctx'> #define X86_BUG_ITS			X86_BUG( 1*32+ 7) /* "its" CPU is affected by Indirect Target Selection */</div><div class='ctx'> #define X86_BUG_ITS_NATIVE_ONLY		X86_BUG( 1*32+ 8) /* "its_native_only" CPU is affected by ITS, VMX is not affected */</div><div class='del'>-</div><div class='add'>+#define X86_BUG_TSA			X86_BUG( 1*32+ 9) /* "tsa" CPU is affected by Transient Scheduler Attacks */</div><div class='add'>+#define X86_BUG_VMSCAPE			X86_BUG( 1*32+10) /* "vmscape" CPU is affected by VMSCAPE attacks from guests */</div><div class='ctx'> #endif /* _ASM_X86_CPUFEATURES_H */</div><div class='head'>diff --git a/tools/arch/x86/include/asm/inat.h b/tools/arch/x86/include/asm/inat.h<br/>index 183aa662b165..099e926595bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/inat.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/asm/inat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/inat.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/inat.h</a></div><div class='hunk'>@@ -37,6 +37,8 @@</div><div class='ctx'> #define INAT_PFX_EVEX	15	/* EVEX prefix */</div><div class='ctx'> /* x86-64 REX2 prefix */</div><div class='ctx'> #define INAT_PFX_REX2	16	/* 0xD5 */</div><div class='add'>+/* AMD XOP prefix */</div><div class='add'>+#define INAT_PFX_XOP	17	/* 0x8F */</div><div class='ctx'> </div><div class='ctx'> #define INAT_LSTPFX_MAX	3</div><div class='ctx'> #define INAT_LGCPFX_MAX	11</div><div class='hunk'>@@ -77,6 +79,7 @@</div><div class='ctx'> #define INAT_MOFFSET	(1 &lt;&lt; (INAT_FLAG_OFFS + 3))</div><div class='ctx'> #define INAT_VARIANT	(1 &lt;&lt; (INAT_FLAG_OFFS + 4))</div><div class='ctx'> #define INAT_VEXOK	(1 &lt;&lt; (INAT_FLAG_OFFS + 5))</div><div class='add'>+#define INAT_XOPOK	INAT_VEXOK</div><div class='ctx'> #define INAT_VEXONLY	(1 &lt;&lt; (INAT_FLAG_OFFS + 6))</div><div class='ctx'> #define INAT_EVEXONLY	(1 &lt;&lt; (INAT_FLAG_OFFS + 7))</div><div class='ctx'> #define INAT_NO_REX2	(1 &lt;&lt; (INAT_FLAG_OFFS + 8))</div><div class='hunk'>@@ -111,6 +114,8 @@ extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm,</div><div class='ctx'> extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode,</div><div class='ctx'> 					  insn_byte_t vex_m,</div><div class='ctx'> 					  insn_byte_t vex_pp);</div><div class='add'>+extern insn_attr_t inat_get_xop_attribute(insn_byte_t opcode,</div><div class='add'>+					  insn_byte_t map_select);</div><div class='ctx'> </div><div class='ctx'> /* Attribute checking functions */</div><div class='ctx'> static inline int inat_is_legacy_prefix(insn_attr_t attr)</div><div class='hunk'>@@ -164,6 +169,11 @@ static inline int inat_is_vex3_prefix(insn_attr_t attr)</div><div class='ctx'> 	return (attr &amp; INAT_PFX_MASK) == INAT_PFX_VEX3;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int inat_is_xop_prefix(insn_attr_t attr)</div><div class='add'>+{</div><div class='add'>+	return (attr &amp; INAT_PFX_MASK) == INAT_PFX_XOP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int inat_is_escape(insn_attr_t attr)</div><div class='ctx'> {</div><div class='ctx'> 	return attr &amp; INAT_ESC_MASK;</div><div class='hunk'>@@ -229,6 +239,11 @@ static inline int inat_accept_vex(insn_attr_t attr)</div><div class='ctx'> 	return attr &amp; INAT_VEXOK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int inat_accept_xop(insn_attr_t attr)</div><div class='add'>+{</div><div class='add'>+	return attr &amp; INAT_XOPOK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int inat_must_vex(insn_attr_t attr)</div><div class='ctx'> {</div><div class='ctx'> 	return attr &amp; (INAT_VEXONLY | INAT_EVEXONLY);</div><div class='head'>diff --git a/tools/arch/x86/include/asm/insn.h b/tools/arch/x86/include/asm/insn.h<br/>index 0e5abd896ad4..8f10f2943370 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/insn.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/asm/insn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/insn.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/insn.h</a></div><div class='hunk'>@@ -71,7 +71,10 @@ struct insn {</div><div class='ctx'> 					 * prefixes.bytes[3]: last prefix</div><div class='ctx'> 					 */</div><div class='ctx'> 	struct insn_field rex_prefix;	/* REX prefix */</div><div class='del'>-	struct insn_field vex_prefix;	/* VEX prefix */</div><div class='add'>+	union {</div><div class='add'>+		struct insn_field vex_prefix;	/* VEX prefix */</div><div class='add'>+		struct insn_field xop_prefix;	/* XOP prefix */</div><div class='add'>+	};</div><div class='ctx'> 	struct insn_field opcode;	/*</div><div class='ctx'> 					 * opcode.bytes[0]: opcode1</div><div class='ctx'> 					 * opcode.bytes[1]: opcode2</div><div class='hunk'>@@ -135,6 +138,17 @@ struct insn {</div><div class='ctx'> #define X86_VEX_V(vex)	(((vex) &amp; 0x78) &gt;&gt; 3)	/* VEX3 Byte2, VEX2 Byte1 */</div><div class='ctx'> #define X86_VEX_P(vex)	((vex) &amp; 0x03)		/* VEX3 Byte2, VEX2 Byte1 */</div><div class='ctx'> #define X86_VEX_M_MAX	0x1f			/* VEX3.M Maximum value */</div><div class='add'>+/* XOP bit fields */</div><div class='add'>+#define X86_XOP_R(xop)	((xop) &amp; 0x80)	/* XOP Byte2 */</div><div class='add'>+#define X86_XOP_X(xop)	((xop) &amp; 0x40)	/* XOP Byte2 */</div><div class='add'>+#define X86_XOP_B(xop)	((xop) &amp; 0x20)	/* XOP Byte2 */</div><div class='add'>+#define X86_XOP_M(xop)	((xop) &amp; 0x1f)	/* XOP Byte2 */</div><div class='add'>+#define X86_XOP_W(xop)	((xop) &amp; 0x80)	/* XOP Byte3 */</div><div class='add'>+#define X86_XOP_V(xop)	((xop) &amp; 0x78)	/* XOP Byte3 */</div><div class='add'>+#define X86_XOP_L(xop)	((xop) &amp; 0x04)	/* XOP Byte3 */</div><div class='add'>+#define X86_XOP_P(xop)	((xop) &amp; 0x03)	/* XOP Byte3 */</div><div class='add'>+#define X86_XOP_M_MIN	0x08	/* Min of XOP.M */</div><div class='add'>+#define X86_XOP_M_MAX	0x1f	/* Max of XOP.M */</div><div class='ctx'> </div><div class='ctx'> extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);</div><div class='ctx'> extern int insn_get_prefixes(struct insn *insn);</div><div class='hunk'>@@ -178,7 +192,7 @@ static inline insn_byte_t insn_rex2_m_bit(struct insn *insn)</div><div class='ctx'> 	return X86_REX2_M(insn-&gt;rex_prefix.bytes[1]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int insn_is_avx(struct insn *insn)</div><div class='add'>+static inline int insn_is_avx_or_xop(struct insn *insn)</div><div class='ctx'> {</div><div class='ctx'> 	if (!insn-&gt;prefixes.got)</div><div class='ctx'> 		insn_get_prefixes(insn);</div><div class='hunk'>@@ -192,6 +206,22 @@ static inline int insn_is_evex(struct insn *insn)</div><div class='ctx'> 	return (insn-&gt;vex_prefix.nbytes == 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* If we already know this is AVX/XOP encoded */</div><div class='add'>+static inline int avx_insn_is_xop(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	insn_attr_t attr = inat_get_opcode_attribute(insn-&gt;vex_prefix.bytes[0]);</div><div class='add'>+</div><div class='add'>+	return inat_is_xop_prefix(attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int insn_is_xop(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	if (!insn_is_avx_or_xop(insn))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return avx_insn_is_xop(insn);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int insn_has_emulate_prefix(struct insn *insn)</div><div class='ctx'> {</div><div class='ctx'> 	return !!insn-&gt;emulate_prefix_size;</div><div class='hunk'>@@ -222,11 +252,26 @@ static inline insn_byte_t insn_vex_w_bit(struct insn *insn)</div><div class='ctx'> 	return X86_VEX_W(insn-&gt;vex_prefix.bytes[2]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline insn_byte_t insn_xop_map_bits(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	if (insn-&gt;xop_prefix.nbytes &lt; 3)	/* XOP is 3 bytes */</div><div class='add'>+		return 0;</div><div class='add'>+	return X86_XOP_M(insn-&gt;xop_prefix.bytes[1]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline insn_byte_t insn_xop_p_bits(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	return X86_XOP_P(insn-&gt;vex_prefix.bytes[2]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Get the last prefix id from last prefix or VEX prefix */</div><div class='ctx'> static inline int insn_last_prefix_id(struct insn *insn)</div><div class='ctx'> {</div><div class='del'>-	if (insn_is_avx(insn))</div><div class='add'>+	if (insn_is_avx_or_xop(insn)) {</div><div class='add'>+		if (avx_insn_is_xop(insn))</div><div class='add'>+			return insn_xop_p_bits(insn);</div><div class='ctx'> 		return insn_vex_p_bits(insn);	/* VEX_p is a SIMD prefix id */</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (insn-&gt;prefixes.bytes[3])</div><div class='ctx'> 		return inat_get_last_prefix_id(insn-&gt;prefixes.bytes[3]);</div><div class='hunk'>@@ -267,7 +312,6 @@ static inline int insn_offset_immediate(struct insn *insn)</div><div class='ctx'> /**</div><div class='ctx'>  * for_each_insn_prefix() -- Iterate prefixes in the instruction</div><div class='ctx'>  * @insn: Pointer to struct insn.</div><div class='del'>- * @idx:  Index storage.</div><div class='ctx'>  * @prefix: Prefix byte.</div><div class='ctx'>  *</div><div class='ctx'>  * Iterate prefix bytes of given @insn. Each prefix byte is stored in @prefix</div><div class='hunk'>@@ -276,8 +320,8 @@ static inline int insn_offset_immediate(struct insn *insn)</div><div class='ctx'>  * Since prefixes.nbytes can be bigger than 4 if some prefixes</div><div class='ctx'>  * are repeated, it cannot be used for looping over the prefixes.</div><div class='ctx'>  */</div><div class='del'>-#define for_each_insn_prefix(insn, idx, prefix)	\</div><div class='del'>-	for (idx = 0; idx &lt; ARRAY_SIZE(insn-&gt;prefixes.bytes) &amp;&amp; (prefix = insn-&gt;prefixes.bytes[idx]) != 0; idx++)</div><div class='add'>+#define for_each_insn_prefix(insn, prefix)	\</div><div class='add'>+	for (int idx = 0; idx &lt; ARRAY_SIZE(insn-&gt;prefixes.bytes) &amp;&amp; (prefix = insn-&gt;prefixes.bytes[idx]) != 0; idx++)</div><div class='ctx'> </div><div class='ctx'> #define POP_SS_OPCODE 0x1f</div><div class='ctx'> #define MOV_SREG_OPCODE 0x8e</div><div class='head'>diff --git a/tools/arch/x86/include/asm/io.h b/tools/arch/x86/include/asm/io.h<br/>new file mode 100644<br/>index 000000000000..ecad61a3ea52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/io.h</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _TOOLS_ASM_X86_IO_H</div><div class='add'>+#define _TOOLS_ASM_X86_IO_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "special_insns.h"</div><div class='add'>+</div><div class='add'>+#define build_mmio_read(name, size, type, reg, barrier) \</div><div class='add'>+static inline type name(const volatile void __iomem *addr) \</div><div class='add'>+{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \</div><div class='add'>+:"m" (*(volatile type __force *)addr) barrier); return ret; }</div><div class='add'>+</div><div class='add'>+#define build_mmio_write(name, size, type, reg, barrier) \</div><div class='add'>+static inline void name(type val, volatile void __iomem *addr) \</div><div class='add'>+{ asm volatile("mov" size " %0,%1": :reg (val), \</div><div class='add'>+"m" (*(volatile type __force *)addr) barrier); }</div><div class='add'>+</div><div class='add'>+build_mmio_read(readb, "b", unsigned char, "=q", :"memory")</div><div class='add'>+build_mmio_read(readw, "w", unsigned short, "=r", :"memory")</div><div class='add'>+build_mmio_read(readl, "l", unsigned int, "=r", :"memory")</div><div class='add'>+</div><div class='add'>+build_mmio_read(__readb, "b", unsigned char, "=q", )</div><div class='add'>+build_mmio_read(__readw, "w", unsigned short, "=r", )</div><div class='add'>+build_mmio_read(__readl, "l", unsigned int, "=r", )</div><div class='add'>+</div><div class='add'>+build_mmio_write(writeb, "b", unsigned char, "q", :"memory")</div><div class='add'>+build_mmio_write(writew, "w", unsigned short, "r", :"memory")</div><div class='add'>+build_mmio_write(writel, "l", unsigned int, "r", :"memory")</div><div class='add'>+</div><div class='add'>+build_mmio_write(__writeb, "b", unsigned char, "q", )</div><div class='add'>+build_mmio_write(__writew, "w", unsigned short, "r", )</div><div class='add'>+build_mmio_write(__writel, "l", unsigned int, "r", )</div><div class='add'>+</div><div class='add'>+#define readb readb</div><div class='add'>+#define readw readw</div><div class='add'>+#define readl readl</div><div class='add'>+#define readb_relaxed(a) __readb(a)</div><div class='add'>+#define readw_relaxed(a) __readw(a)</div><div class='add'>+#define readl_relaxed(a) __readl(a)</div><div class='add'>+#define __raw_readb __readb</div><div class='add'>+#define __raw_readw __readw</div><div class='add'>+#define __raw_readl __readl</div><div class='add'>+</div><div class='add'>+#define writeb writeb</div><div class='add'>+#define writew writew</div><div class='add'>+#define writel writel</div><div class='add'>+#define writeb_relaxed(v, a) __writeb(v, a)</div><div class='add'>+#define writew_relaxed(v, a) __writew(v, a)</div><div class='add'>+#define writel_relaxed(v, a) __writel(v, a)</div><div class='add'>+#define __raw_writeb __writeb</div><div class='add'>+#define __raw_writew __writew</div><div class='add'>+#define __raw_writel __writel</div><div class='add'>+</div><div class='add'>+#ifdef __x86_64__</div><div class='add'>+</div><div class='add'>+build_mmio_read(readq, "q", u64, "=r", :"memory")</div><div class='add'>+build_mmio_read(__readq, "q", u64, "=r", )</div><div class='add'>+build_mmio_write(writeq, "q", u64, "r", :"memory")</div><div class='add'>+build_mmio_write(__writeq, "q", u64, "r", )</div><div class='add'>+</div><div class='add'>+#define readq_relaxed(a)	__readq(a)</div><div class='add'>+#define writeq_relaxed(v, a)	__writeq(v, a)</div><div class='add'>+</div><div class='add'>+#define __raw_readq		__readq</div><div class='add'>+#define __raw_writeq		__writeq</div><div class='add'>+</div><div class='add'>+/* Let people know that we have them */</div><div class='add'>+#define readq			readq</div><div class='add'>+#define writeq			writeq</div><div class='add'>+</div><div class='add'>+#endif /* __x86_64__ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/io.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iosubmit_cmds512 - copy data to single MMIO location, in 512-bit units</div><div class='add'>+ * @dst: destination, in MMIO space (must be 512-bit aligned)</div><div class='add'>+ * @src: source</div><div class='add'>+ * @count: number of 512 bits quantities to submit</div><div class='add'>+ *</div><div class='add'>+ * Submit data from kernel space to MMIO space, in units of 512 bits at a</div><div class='add'>+ * time.  Order of access is not guaranteed, nor is a memory barrier</div><div class='add'>+ * performed afterwards.</div><div class='add'>+ *</div><div class='add'>+ * Warning: Do not use this helper unless your driver has checked that the CPU</div><div class='add'>+ * instruction is supported on the platform.</div><div class='add'>+ */</div><div class='add'>+static inline void iosubmit_cmds512(void __iomem *dst, const void *src,</div><div class='add'>+				    size_t count)</div><div class='add'>+{</div><div class='add'>+	const u8 *from = src;</div><div class='add'>+	const u8 *end = from + count * 64;</div><div class='add'>+</div><div class='add'>+	while (from &lt; end) {</div><div class='add'>+		movdir64b(dst, from);</div><div class='add'>+		from += 64;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _TOOLS_ASM_X86_IO_H */</div><div class='head'>diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h<br/>index 5cfb5d74dd5f..9e1720d73244 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/msr-index.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/asm/msr-index.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/msr-index.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/msr-index.h</a></div><div class='hunk'>@@ -315,12 +315,17 @@</div><div class='ctx'> #define PERF_CAP_PT_IDX			16</div><div class='ctx'> </div><div class='ctx'> #define MSR_PEBS_LD_LAT_THRESHOLD	0x000003f6</div><div class='del'>-#define PERF_CAP_PEBS_TRAP             BIT_ULL(6)</div><div class='del'>-#define PERF_CAP_ARCH_REG              BIT_ULL(7)</div><div class='del'>-#define PERF_CAP_PEBS_FORMAT           0xf00</div><div class='del'>-#define PERF_CAP_PEBS_BASELINE         BIT_ULL(14)</div><div class='del'>-#define PERF_CAP_PEBS_MASK	(PERF_CAP_PEBS_TRAP | PERF_CAP_ARCH_REG | \</div><div class='del'>-				 PERF_CAP_PEBS_FORMAT | PERF_CAP_PEBS_BASELINE)</div><div class='add'>+</div><div class='add'>+#define PERF_CAP_LBR_FMT		0x3f</div><div class='add'>+#define PERF_CAP_PEBS_TRAP		BIT_ULL(6)</div><div class='add'>+#define PERF_CAP_ARCH_REG		BIT_ULL(7)</div><div class='add'>+#define PERF_CAP_PEBS_FORMAT		0xf00</div><div class='add'>+#define PERF_CAP_FW_WRITES		BIT_ULL(13)</div><div class='add'>+#define PERF_CAP_PEBS_BASELINE		BIT_ULL(14)</div><div class='add'>+#define PERF_CAP_PEBS_TIMING_INFO	BIT_ULL(17)</div><div class='add'>+#define PERF_CAP_PEBS_MASK		(PERF_CAP_PEBS_TRAP | PERF_CAP_ARCH_REG | \</div><div class='add'>+					 PERF_CAP_PEBS_FORMAT | PERF_CAP_PEBS_BASELINE | \</div><div class='add'>+					 PERF_CAP_PEBS_TIMING_INFO)</div><div class='ctx'> </div><div class='ctx'> #define MSR_IA32_RTIT_CTL		0x00000570</div><div class='ctx'> #define RTIT_CTL_TRACEEN		BIT(0)</div><div class='hunk'>@@ -419,6 +424,7 @@</div><div class='ctx'> #define DEBUGCTLMSR_FREEZE_PERFMON_ON_PMI	(1UL &lt;&lt; 12)</div><div class='ctx'> #define DEBUGCTLMSR_FREEZE_IN_SMM_BIT	14</div><div class='ctx'> #define DEBUGCTLMSR_FREEZE_IN_SMM	(1UL &lt;&lt; DEBUGCTLMSR_FREEZE_IN_SMM_BIT)</div><div class='add'>+#define DEBUGCTLMSR_RTM_DEBUG		BIT(15)</div><div class='ctx'> </div><div class='ctx'> #define MSR_PEBS_FRONTEND		0x000003f7</div><div class='ctx'> </div><div class='hunk'>@@ -630,6 +636,11 @@</div><div class='ctx'> #define MSR_AMD_PPIN			0xc00102f1</div><div class='ctx'> #define MSR_AMD64_CPUID_FN_7		0xc0011002</div><div class='ctx'> #define MSR_AMD64_CPUID_FN_1		0xc0011004</div><div class='add'>+</div><div class='add'>+#define MSR_AMD64_CPUID_EXT_FEAT	0xc0011005</div><div class='add'>+#define MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT_BIT	54</div><div class='add'>+#define MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT	BIT_ULL(MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT_BIT)</div><div class='add'>+</div><div class='ctx'> #define MSR_AMD64_LS_CFG		0xc0011020</div><div class='ctx'> #define MSR_AMD64_DC_CFG		0xc0011022</div><div class='ctx'> #define MSR_AMD64_TW_CFG		0xc0011023</div><div class='hunk'>@@ -698,8 +709,15 @@</div><div class='ctx'> #define MSR_AMD64_SNP_VMSA_REG_PROT	BIT_ULL(MSR_AMD64_SNP_VMSA_REG_PROT_BIT)</div><div class='ctx'> #define MSR_AMD64_SNP_SMT_PROT_BIT	17</div><div class='ctx'> #define MSR_AMD64_SNP_SMT_PROT		BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)</div><div class='del'>-#define MSR_AMD64_SNP_RESV_BIT		18</div><div class='add'>+#define MSR_AMD64_SNP_SECURE_AVIC_BIT	18</div><div class='add'>+#define MSR_AMD64_SNP_SECURE_AVIC	BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)</div><div class='add'>+#define MSR_AMD64_SNP_RESV_BIT		19</div><div class='ctx'> #define MSR_AMD64_SNP_RESERVED_MASK	GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)</div><div class='add'>+#define MSR_AMD64_SAVIC_CONTROL		0xc0010138</div><div class='add'>+#define MSR_AMD64_SAVIC_EN_BIT		0</div><div class='add'>+#define MSR_AMD64_SAVIC_EN		BIT_ULL(MSR_AMD64_SAVIC_EN_BIT)</div><div class='add'>+#define MSR_AMD64_SAVIC_ALLOWEDNMI_BIT	1</div><div class='add'>+#define MSR_AMD64_SAVIC_ALLOWEDNMI	BIT_ULL(MSR_AMD64_SAVIC_ALLOWEDNMI_BIT)</div><div class='ctx'> #define MSR_AMD64_RMP_BASE		0xc0010132</div><div class='ctx'> #define MSR_AMD64_RMP_END		0xc0010133</div><div class='ctx'> #define MSR_AMD64_RMP_CFG		0xc0010136</div><div class='hunk'>@@ -732,6 +750,12 @@</div><div class='ctx'> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS	0xc0000300</div><div class='ctx'> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL		0xc0000301</div><div class='ctx'> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR	0xc0000302</div><div class='add'>+#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET	0xc0000303</div><div class='add'>+</div><div class='add'>+/* AMD Hardware Feedback Support MSRs */</div><div class='add'>+#define MSR_AMD_WORKLOAD_CLASS_CONFIG		0xc0000500</div><div class='add'>+#define MSR_AMD_WORKLOAD_CLASS_ID		0xc0000501</div><div class='add'>+#define MSR_AMD_WORKLOAD_HRST			0xc0000502</div><div class='ctx'> </div><div class='ctx'> /* AMD Last Branch Record MSRs */</div><div class='ctx'> #define MSR_AMD64_LBR_SELECT			0xc000010e</div><div class='hunk'>@@ -831,6 +855,7 @@</div><div class='ctx'> #define MSR_K7_HWCR_SMMLOCK		BIT_ULL(MSR_K7_HWCR_SMMLOCK_BIT)</div><div class='ctx'> #define MSR_K7_HWCR_IRPERF_EN_BIT	30</div><div class='ctx'> #define MSR_K7_HWCR_IRPERF_EN		BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)</div><div class='add'>+#define MSR_K7_HWCR_CPUID_USER_DIS_BIT	35</div><div class='ctx'> #define MSR_K7_FID_VID_CTL		0xc0010041</div><div class='ctx'> #define MSR_K7_FID_VID_STATUS		0xc0010042</div><div class='ctx'> #define MSR_K7_HWCR_CPB_DIS_BIT		25</div><div class='hunk'>@@ -1216,6 +1241,8 @@</div><div class='ctx'> /* - AMD: */</div><div class='ctx'> #define MSR_IA32_MBA_BW_BASE		0xc0000200</div><div class='ctx'> #define MSR_IA32_SMBA_BW_BASE		0xc0000280</div><div class='add'>+#define MSR_IA32_L3_QOS_ABMC_CFG	0xc00003fd</div><div class='add'>+#define MSR_IA32_L3_QOS_EXT_CFG		0xc00003ff</div><div class='ctx'> #define MSR_IA32_EVT_CFG_BASE		0xc0000400</div><div class='ctx'> </div><div class='ctx'> /* AMD-V MSRs */</div><div class='head'>diff --git a/tools/arch/x86/include/asm/special_insns.h b/tools/arch/x86/include/asm/special_insns.h<br/>new file mode 100644<br/>index 000000000000..04af42a99c38<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/asm/special_insns.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/asm/special_insns.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _TOOLS_ASM_X86_SPECIAL_INSNS_H</div><div class='add'>+#define _TOOLS_ASM_X86_SPECIAL_INSNS_H</div><div class='add'>+</div><div class='add'>+/* The dst parameter must be 64-bytes aligned */</div><div class='add'>+static inline void movdir64b(void *dst, const void *src)</div><div class='add'>+{</div><div class='add'>+	const struct { char _[64]; } *__src = src;</div><div class='add'>+	struct { char _[64]; } *__dst = dst;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MOVDIR64B %(rdx), rax.</div><div class='add'>+	 *</div><div class='add'>+	 * Both __src and __dst must be memory constraints in order to tell the</div><div class='add'>+	 * compiler that no other memory accesses should be reordered around</div><div class='add'>+	 * this one.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, both must be supplied as lvalues because this tells</div><div class='add'>+	 * the compiler what the object is (its size) the instruction accesses.</div><div class='add'>+	 * I.e., not the pointers but what they point to, thus the deref'ing '*'.</div><div class='add'>+	 */</div><div class='add'>+	asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"</div><div class='add'>+		     : "+m" (*__dst)</div><div class='add'>+		     :  "m" (*__src), "a" (__dst), "d" (__src));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _TOOLS_ASM_X86_SPECIAL_INSNS_H */</div><div class='head'>diff --git a/tools/arch/x86/include/uapi/asm/kvm.h b/tools/arch/x86/include/uapi/asm/kvm.h<br/>index 6f3499507c5e..d420c9c066d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/kvm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/kvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -35,6 +35,11 @@</div><div class='ctx'> #define MC_VECTOR 18</div><div class='ctx'> #define XM_VECTOR 19</div><div class='ctx'> #define VE_VECTOR 20</div><div class='add'>+#define CP_VECTOR 21</div><div class='add'>+</div><div class='add'>+#define HV_VECTOR 28</div><div class='add'>+#define VC_VECTOR 29</div><div class='add'>+#define SX_VECTOR 30</div><div class='ctx'> </div><div class='ctx'> /* Select x86 specific features in &lt;linux/kvm.h&gt; */</div><div class='ctx'> #define __KVM_HAVE_PIT</div><div class='hunk'>@@ -411,6 +416,35 @@ struct kvm_xcrs {</div><div class='ctx'> 	__u64 padding[16];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define KVM_X86_REG_TYPE_MSR		2</div><div class='add'>+#define KVM_X86_REG_TYPE_KVM		3</div><div class='add'>+</div><div class='add'>+#define KVM_X86_KVM_REG_SIZE(reg)						\</div><div class='add'>+({										\</div><div class='add'>+	reg == KVM_REG_GUEST_SSP ? KVM_REG_SIZE_U64 : 0;			\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define KVM_X86_REG_TYPE_SIZE(type, reg)					\</div><div class='add'>+({										\</div><div class='add'>+	__u64 type_size = (__u64)type &lt;&lt; 32;					\</div><div class='add'>+										\</div><div class='add'>+	type_size |= type == KVM_X86_REG_TYPE_MSR ? KVM_REG_SIZE_U64 :		\</div><div class='add'>+		     type == KVM_X86_REG_TYPE_KVM ? KVM_X86_KVM_REG_SIZE(reg) :	\</div><div class='add'>+		     0;								\</div><div class='add'>+	type_size;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define KVM_X86_REG_ID(type, index)				\</div><div class='add'>+	(KVM_REG_X86 | KVM_X86_REG_TYPE_SIZE(type, index) | index)</div><div class='add'>+</div><div class='add'>+#define KVM_X86_REG_MSR(index)					\</div><div class='add'>+	KVM_X86_REG_ID(KVM_X86_REG_TYPE_MSR, index)</div><div class='add'>+#define KVM_X86_REG_KVM(index)					\</div><div class='add'>+	KVM_X86_REG_ID(KVM_X86_REG_TYPE_KVM, index)</div><div class='add'>+</div><div class='add'>+/* KVM-defined registers starting from 0 */</div><div class='add'>+#define KVM_REG_GUEST_SSP	0</div><div class='add'>+</div><div class='ctx'> #define KVM_SYNC_X86_REGS      (1UL &lt;&lt; 0)</div><div class='ctx'> #define KVM_SYNC_X86_SREGS     (1UL &lt;&lt; 1)</div><div class='ctx'> #define KVM_SYNC_X86_EVENTS    (1UL &lt;&lt; 2)</div><div class='hunk'>@@ -965,7 +999,13 @@ struct kvm_tdx_cmd {</div><div class='ctx'> struct kvm_tdx_capabilities {</div><div class='ctx'> 	__u64 supported_attrs;</div><div class='ctx'> 	__u64 supported_xfam;</div><div class='del'>-	__u64 reserved[254];</div><div class='add'>+</div><div class='add'>+	__u64 kernel_tdvmcallinfo_1_r11;</div><div class='add'>+	__u64 user_tdvmcallinfo_1_r11;</div><div class='add'>+	__u64 kernel_tdvmcallinfo_1_r12;</div><div class='add'>+	__u64 user_tdvmcallinfo_1_r12;</div><div class='add'>+</div><div class='add'>+	__u64 reserved[250];</div><div class='ctx'> </div><div class='ctx'> 	/* Configurable CPUID bits for userspace */</div><div class='ctx'> 	struct kvm_cpuid2 cpuid;</div><div class='head'>diff --git a/tools/arch/x86/include/uapi/asm/kvm_perf.h b/tools/arch/x86/include/uapi/asm/kvm_perf.h<br/>deleted file mode 100644<br/>index 125cf5cdf6c5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/kvm_perf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/kvm_perf.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='del'>-#ifndef _ASM_X86_KVM_PERF_H</div><div class='del'>-#define _ASM_X86_KVM_PERF_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/svm.h&gt;</div><div class='del'>-#include &lt;asm/vmx.h&gt;</div><div class='del'>-#include &lt;asm/kvm.h&gt;</div><div class='del'>-</div><div class='del'>-#define DECODE_STR_LEN 20</div><div class='del'>-</div><div class='del'>-#define VCPU_ID "vcpu_id"</div><div class='del'>-</div><div class='del'>-#define KVM_ENTRY_TRACE "kvm:kvm_entry"</div><div class='del'>-#define KVM_EXIT_TRACE "kvm:kvm_exit"</div><div class='del'>-#define KVM_EXIT_REASON "exit_reason"</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_KVM_PERF_H */</div><div class='head'>diff --git a/tools/arch/x86/include/uapi/asm/svm.h b/tools/arch/x86/include/uapi/asm/svm.h<br/>index 9c640a521a67..650e3256ea7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/svm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/svm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/svm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/uapi/asm/svm.h</a></div><div class='hunk'>@@ -118,6 +118,10 @@</div><div class='ctx'> #define SVM_VMGEXIT_AP_CREATE			1</div><div class='ctx'> #define SVM_VMGEXIT_AP_DESTROY			2</div><div class='ctx'> #define SVM_VMGEXIT_SNP_RUN_VMPL		0x80000018</div><div class='add'>+#define SVM_VMGEXIT_SAVIC			0x8000001a</div><div class='add'>+#define SVM_VMGEXIT_SAVIC_REGISTER_GPA		0</div><div class='add'>+#define SVM_VMGEXIT_SAVIC_UNREGISTER_GPA	1</div><div class='add'>+#define SVM_VMGEXIT_SAVIC_SELF_GPA		~0ULL</div><div class='ctx'> #define SVM_VMGEXIT_HV_FEATURES			0x8000fffd</div><div class='ctx'> #define SVM_VMGEXIT_TERM_REQUEST		0x8000fffe</div><div class='ctx'> #define SVM_VMGEXIT_TERM_REASON(reason_set, reason_code)	\</div><div class='head'>diff --git a/tools/arch/x86/include/uapi/asm/vmx.h b/tools/arch/x86/include/uapi/asm/vmx.h<br/>index f0f4a4cf84a7..1baa86dfe029 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/vmx.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/include/uapi/asm/vmx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/include/uapi/asm/vmx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/include/uapi/asm/vmx.h</a></div><div class='hunk'>@@ -93,7 +93,10 @@</div><div class='ctx'> #define EXIT_REASON_TPAUSE              68</div><div class='ctx'> #define EXIT_REASON_BUS_LOCK            74</div><div class='ctx'> #define EXIT_REASON_NOTIFY              75</div><div class='add'>+#define EXIT_REASON_SEAMCALL            76</div><div class='ctx'> #define EXIT_REASON_TDCALL              77</div><div class='add'>+#define EXIT_REASON_MSR_READ_IMM        84</div><div class='add'>+#define EXIT_REASON_MSR_WRITE_IMM       85</div><div class='ctx'> </div><div class='ctx'> #define VMX_EXIT_REASONS \</div><div class='ctx'> 	{ EXIT_REASON_EXCEPTION_NMI,         "EXCEPTION_NMI" }, \</div><div class='hunk'>@@ -158,7 +161,9 @@</div><div class='ctx'> 	{ EXIT_REASON_TPAUSE,                "TPAUSE" }, \</div><div class='ctx'> 	{ EXIT_REASON_BUS_LOCK,              "BUS_LOCK" }, \</div><div class='ctx'> 	{ EXIT_REASON_NOTIFY,                "NOTIFY" }, \</div><div class='del'>-	{ EXIT_REASON_TDCALL,                "TDCALL" }</div><div class='add'>+	{ EXIT_REASON_TDCALL,                "TDCALL" }, \</div><div class='add'>+	{ EXIT_REASON_MSR_READ_IMM,          "MSR_READ_IMM" }, \</div><div class='add'>+	{ EXIT_REASON_MSR_WRITE_IMM,         "MSR_WRITE_IMM" }</div><div class='ctx'> </div><div class='ctx'> #define VMX_EXIT_REASON_FLAGS \</div><div class='ctx'> 	{ VMX_EXIT_REASONS_FAILED_VMENTRY,	"FAILED_VMENTRY" }</div><div class='head'>diff --git a/tools/arch/x86/lib/inat.c b/tools/arch/x86/lib/inat.c<br/>index dfbcc6405941..ffcb0e27453b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/inat.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/inat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/inat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/lib/inat.c</a></div><div class='hunk'>@@ -81,3 +81,16 @@ insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m,</div><div class='ctx'> 	return table[opcode];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+insn_attr_t inat_get_xop_attribute(insn_byte_t opcode, insn_byte_t map_select)</div><div class='add'>+{</div><div class='add'>+	const insn_attr_t *table;</div><div class='add'>+</div><div class='add'>+	if (map_select &lt; X86_XOP_M_MIN || map_select &gt; X86_XOP_M_MAX)</div><div class='add'>+		return 0;</div><div class='add'>+	map_select -= X86_XOP_M_MIN;</div><div class='add'>+	/* At first, this checks the master table */</div><div class='add'>+	table = inat_xop_tables[map_select];</div><div class='add'>+	if (!table)</div><div class='add'>+		return 0;</div><div class='add'>+	return table[opcode];</div><div class='add'>+}</div><div class='head'>diff --git a/tools/arch/x86/lib/insn.c b/tools/arch/x86/lib/insn.c<br/>index bce69c6bfa69..1d1c57c74d1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/insn.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/insn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/insn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/lib/insn.c</a></div><div class='hunk'>@@ -200,12 +200,15 @@ found:</div><div class='ctx'> 	}</div><div class='ctx'> 	insn-&gt;rex_prefix.got = 1;</div><div class='ctx'> </div><div class='del'>-	/* Decode VEX prefix */</div><div class='add'>+	/* Decode VEX/XOP prefix */</div><div class='ctx'> 	b = peek_next(insn_byte_t, insn);</div><div class='del'>-	attr = inat_get_opcode_attribute(b);</div><div class='del'>-	if (inat_is_vex_prefix(attr)) {</div><div class='add'>+	if (inat_is_vex_prefix(attr) || inat_is_xop_prefix(attr)) {</div><div class='ctx'> 		insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1);</div><div class='del'>-		if (!insn-&gt;x86_64) {</div><div class='add'>+</div><div class='add'>+		if (inat_is_xop_prefix(attr) &amp;&amp; X86_MODRM_REG(b2) == 0) {</div><div class='add'>+			/* Grp1A.0 is always POP Ev */</div><div class='add'>+			goto vex_end;</div><div class='add'>+		} else if (!insn-&gt;x86_64) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * In 32-bits mode, if the [7:6] bits (mod bits of</div><div class='ctx'> 			 * ModRM) on the second byte are not 11b, it is</div><div class='hunk'>@@ -226,13 +229,13 @@ found:</div><div class='ctx'> 			if (insn-&gt;x86_64 &amp;&amp; X86_VEX_W(b2))</div><div class='ctx'> 				/* VEX.W overrides opnd_size */</div><div class='ctx'> 				insn-&gt;opnd_bytes = 8;</div><div class='del'>-		} else if (inat_is_vex3_prefix(attr)) {</div><div class='add'>+		} else if (inat_is_vex3_prefix(attr) || inat_is_xop_prefix(attr)) {</div><div class='ctx'> 			b2 = peek_nbyte_next(insn_byte_t, insn, 2);</div><div class='ctx'> 			insn_set_byte(&amp;insn-&gt;vex_prefix, 2, b2);</div><div class='ctx'> 			insn-&gt;vex_prefix.nbytes = 3;</div><div class='ctx'> 			insn-&gt;next_byte += 3;</div><div class='ctx'> 			if (insn-&gt;x86_64 &amp;&amp; X86_VEX_W(b2))</div><div class='del'>-				/* VEX.W overrides opnd_size */</div><div class='add'>+				/* VEX.W/XOP.W overrides opnd_size */</div><div class='ctx'> 				insn-&gt;opnd_bytes = 8;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -288,9 +291,22 @@ int insn_get_opcode(struct insn *insn)</div><div class='ctx'> 	insn_set_byte(opcode, 0, op);</div><div class='ctx'> 	opcode-&gt;nbytes = 1;</div><div class='ctx'> </div><div class='del'>-	/* Check if there is VEX prefix or not */</div><div class='del'>-	if (insn_is_avx(insn)) {</div><div class='add'>+	/* Check if there is VEX/XOP prefix or not */</div><div class='add'>+	if (insn_is_avx_or_xop(insn)) {</div><div class='ctx'> 		insn_byte_t m, p;</div><div class='add'>+</div><div class='add'>+		/* XOP prefix has different encoding */</div><div class='add'>+		if (unlikely(avx_insn_is_xop(insn))) {</div><div class='add'>+			m = insn_xop_map_bits(insn);</div><div class='add'>+			insn-&gt;attr = inat_get_xop_attribute(op, m);</div><div class='add'>+			if (!inat_accept_xop(insn-&gt;attr)) {</div><div class='add'>+				insn-&gt;attr = 0;</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			/* XOP has only 1 byte for opcode */</div><div class='add'>+			goto end;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		m = insn_vex_m_bits(insn);</div><div class='ctx'> 		p = insn_vex_p_bits(insn);</div><div class='ctx'> 		insn-&gt;attr = inat_get_avx_attribute(op, m, p);</div><div class='hunk'>@@ -383,7 +399,8 @@ int insn_get_modrm(struct insn *insn)</div><div class='ctx'> 			pfx_id = insn_last_prefix_id(insn);</div><div class='ctx'> 			insn-&gt;attr = inat_get_group_attribute(mod, pfx_id,</div><div class='ctx'> 							      insn-&gt;attr);</div><div class='del'>-			if (insn_is_avx(insn) &amp;&amp; !inat_accept_vex(insn-&gt;attr)) {</div><div class='add'>+			if (insn_is_avx_or_xop(insn) &amp;&amp; !inat_accept_vex(insn-&gt;attr) &amp;&amp;</div><div class='add'>+			    !inat_accept_xop(insn-&gt;attr)) {</div><div class='ctx'> 				/* Bad insn */</div><div class='ctx'> 				insn-&gt;attr = 0;</div><div class='ctx'> 				return -EINVAL;</div><div class='head'>diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt<br/>index 262f7ca1fb95..2a4e69ecc2de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/x86-opcode-map.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/lib/x86-opcode-map.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/lib/x86-opcode-map.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/lib/x86-opcode-map.txt</a></div><div class='hunk'>@@ -27,6 +27,11 @@</div><div class='ctx'> #  (evo): this opcode is changed by EVEX prefix (EVEX opcode)</div><div class='ctx'> #  (v): this opcode requires VEX prefix.</div><div class='ctx'> #  (v1): this opcode only supports 128bit VEX.</div><div class='add'>+#  (xop): this opcode accepts XOP prefix.</div><div class='add'>+#</div><div class='add'>+# XOP Superscripts</div><div class='add'>+#  (W=0): this opcode requires XOP.W == 0</div><div class='add'>+#  (W=1): this opcode requires XOP.W == 1</div><div class='ctx'> #</div><div class='ctx'> # Last Prefix Superscripts</div><div class='ctx'> #  - (66): the last prefix is 0x66</div><div class='hunk'>@@ -194,7 +199,7 @@ AVXcode:</div><div class='ctx'> 8c: MOV Ev,Sw</div><div class='ctx'> 8d: LEA Gv,M</div><div class='ctx'> 8e: MOV Sw,Ew</div><div class='del'>-8f: Grp1A (1A) | POP Ev (d64)</div><div class='add'>+8f: Grp1A (1A) | POP Ev (d64) | XOP (Prefix)</div><div class='ctx'> # 0x90 - 0x9f</div><div class='ctx'> 90: NOP | PAUSE (F3) | XCHG r8,rAX</div><div class='ctx'> 91: XCHG rCX/r9,rAX</div><div class='hunk'>@@ -1106,6 +1111,84 @@ AVXcode: 7</div><div class='ctx'> f8: URDMSR Rq,Id (F2),(v1),(11B) | UWRMSR Id,Rq (F3),(v1),(11B)</div><div class='ctx'> EndTable</div><div class='ctx'> </div><div class='add'>+# From AMD64 Architecture Programmer's Manual Vol3, Appendix A.1.5</div><div class='add'>+Table: XOP map 8h</div><div class='add'>+Referrer:</div><div class='add'>+XOPcode: 0</div><div class='add'>+85: VPMACSSWW Vo,Ho,Wo,Lo</div><div class='add'>+86: VPMACSSWD Vo,Ho,Wo,Lo</div><div class='add'>+87: VPMACSSDQL Vo,Ho,Wo,Lo</div><div class='add'>+8e: VPMACSSDD Vo,Ho,Wo,Lo</div><div class='add'>+8f: VPMACSSDQH Vo,Ho,Wo,Lo</div><div class='add'>+95: VPMACSWW Vo,Ho,Wo,Lo</div><div class='add'>+96: VPMACSWD Vo,Ho,Wo,Lo</div><div class='add'>+97: VPMACSDQL Vo,Ho,Wo,Lo</div><div class='add'>+9e: VPMACSDD Vo,Ho,Wo,Lo</div><div class='add'>+9f: VPMACSDQH Vo,Ho,Wo,Lo</div><div class='add'>+a2: VPCMOV Vx,Hx,Wx,Lx (W=0) | VPCMOV Vx,Hx,Lx,Wx (W=1)</div><div class='add'>+a3: VPPERM Vo,Ho,Wo,Lo (W=0) | VPPERM Vo,Ho,Lo,Wo (W=1)</div><div class='add'>+a6: VPMADCSSWD Vo,Ho,Wo,Lo</div><div class='add'>+b6: VPMADCSWD Vo,Ho,Wo,Lo</div><div class='add'>+c0: VPROTB Vo,Wo,Ib</div><div class='add'>+c1: VPROTW Vo,Wo,Ib</div><div class='add'>+c2: VPROTD Vo,Wo,Ib</div><div class='add'>+c3: VPROTQ Vo,Wo,Ib</div><div class='add'>+cc: VPCOMccB Vo,Ho,Wo,Ib</div><div class='add'>+cd: VPCOMccW Vo,Ho,Wo,Ib</div><div class='add'>+ce: VPCOMccD Vo,Ho,Wo,Ib</div><div class='add'>+cf: VPCOMccQ Vo,Ho,Wo,Ib</div><div class='add'>+ec: VPCOMccUB Vo,Ho,Wo,Ib</div><div class='add'>+ed: VPCOMccUW Vo,Ho,Wo,Ib</div><div class='add'>+ee: VPCOMccUD Vo,Ho,Wo,Ib</div><div class='add'>+ef: VPCOMccUQ Vo,Ho,Wo,Ib</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='add'>+Table: XOP map 9h</div><div class='add'>+Referrer:</div><div class='add'>+XOPcode: 1</div><div class='add'>+01: GrpXOP1</div><div class='add'>+02: GrpXOP2</div><div class='add'>+12: GrpXOP3</div><div class='add'>+80: VFRCZPS Vx,Wx</div><div class='add'>+81: VFRCZPD Vx,Wx</div><div class='add'>+82: VFRCZSS Vq,Wss</div><div class='add'>+83: VFRCZSD Vq,Wsd</div><div class='add'>+90: VPROTB Vo,Wo,Ho (W=0) | VPROTB Vo,Ho,Wo (W=1)</div><div class='add'>+91: VPROTW Vo,Wo,Ho (W=0) | VPROTB Vo,Ho,Wo (W=1)</div><div class='add'>+92: VPROTD Vo,Wo,Ho (W=0) | VPROTB Vo,Ho,Wo (W=1)</div><div class='add'>+93: VPROTQ Vo,Wo,Ho (W=0) | VPROTB Vo,Ho,Wo (W=1)</div><div class='add'>+94: VPSHLB Vo,Wo,Ho (W=0) | VPSHLB Vo,Ho,Wo (W=1)</div><div class='add'>+95: VPSHLW Vo,Wo,Ho (W=0) | VPSHLW Vo,Ho,Wo (W=1)</div><div class='add'>+96: VPSHLD Vo,Wo,Ho (W=0) | VPSHLD Vo,Ho,Wo (W=1)</div><div class='add'>+97: VPSHLQ Vo,Wo,Ho (W=0) | VPSHLQ Vo,Ho,Wo (W=1)</div><div class='add'>+98: VPSHAB Vo,Wo,Ho (W=0) | VPSHAB Vo,Ho,Wo (W=1)</div><div class='add'>+99: VPSHAW Vo,Wo,Ho (W=0) | VPSHAW Vo,Ho,Wo (W=1)</div><div class='add'>+9a: VPSHAD Vo,Wo,Ho (W=0) | VPSHAD Vo,Ho,Wo (W=1)</div><div class='add'>+9b: VPSHAQ Vo,Wo,Ho (W=0) | VPSHAQ Vo,Ho,Wo (W=1)</div><div class='add'>+c1: VPHADDBW Vo,Wo</div><div class='add'>+c2: VPHADDBD Vo,Wo</div><div class='add'>+c3: VPHADDBQ Vo,Wo</div><div class='add'>+c6: VPHADDWD Vo,Wo</div><div class='add'>+c7: VPHADDWQ Vo,Wo</div><div class='add'>+cb: VPHADDDQ Vo,Wo</div><div class='add'>+d1: VPHADDUBWD Vo,Wo</div><div class='add'>+d2: VPHADDUBD Vo,Wo</div><div class='add'>+d3: VPHADDUBQ Vo,Wo</div><div class='add'>+d6: VPHADDUWD Vo,Wo</div><div class='add'>+d7: VPHADDUWQ Vo,Wo</div><div class='add'>+db: VPHADDUDQ Vo,Wo</div><div class='add'>+e1: VPHSUBBW Vo,Wo</div><div class='add'>+e2: VPHSUBWD Vo,Wo</div><div class='add'>+e3: VPHSUBDQ Vo,Wo</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='add'>+Table: XOP map Ah</div><div class='add'>+Referrer:</div><div class='add'>+XOPcode: 2</div><div class='add'>+10: BEXTR Gy,Ey,Id</div><div class='add'>+12: GrpXOP4</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='ctx'> GrpTable: Grp1</div><div class='ctx'> 0: ADD</div><div class='ctx'> 1: OR</div><div class='hunk'>@@ -1320,3 +1403,29 @@ GrpTable: GrpRNG</div><div class='ctx'> 4: xcrypt-cfb</div><div class='ctx'> 5: xcrypt-ofb</div><div class='ctx'> EndTable</div><div class='add'>+</div><div class='add'>+# GrpXOP1-4 is shown in AMD APM Vol.3 Appendix A as XOP group #1-4</div><div class='add'>+GrpTable: GrpXOP1</div><div class='add'>+1: BLCFILL By,Ey (xop)</div><div class='add'>+2: BLSFILL By,Ey (xop)</div><div class='add'>+3: BLCS By,Ey (xop)</div><div class='add'>+4: TZMSK By,Ey (xop)</div><div class='add'>+5: BLCIC By,Ey (xop)</div><div class='add'>+6: BLSIC By,Ey (xop)</div><div class='add'>+7: T1MSKC By,Ey (xop)</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='add'>+GrpTable: GrpXOP2</div><div class='add'>+1: BLCMSK By,Ey (xop)</div><div class='add'>+6: BLCI By,Ey (xop)</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='add'>+GrpTable: GrpXOP3</div><div class='add'>+0: LLWPCB Ry (xop)</div><div class='add'>+1: SLWPCB Ry (xop)</div><div class='add'>+EndTable</div><div class='add'>+</div><div class='add'>+GrpTable: GrpXOP4</div><div class='add'>+0: LWPINS By,Ed,Id (xop)</div><div class='add'>+1: LWPVAL By,Ed,Id (xop)</div><div class='add'>+EndTable</div><div class='head'>diff --git a/tools/arch/x86/tools/gen-cpu-feature-names-x86.awk b/tools/arch/x86/tools/gen-cpu-feature-names-x86.awk<br/>new file mode 100644<br/>index 000000000000..cc4c7a3e6c2e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/tools/gen-cpu-feature-names-x86.awk?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/tools/gen-cpu-feature-names-x86.awk</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+#!/bin/awk -f</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Copyright (c) 2025, Oracle and/or its affiliates.</div><div class='add'>+#</div><div class='add'>+# Usage: awk -f gen-cpu-feature-names-x86.awk cpufeatures.h &gt; cpu-feature-names.c</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+BEGIN {</div><div class='add'>+	print "/* cpu feature name array generated from cpufeatures.h */"</div><div class='add'>+	print "/* Do not change this code. */"</div><div class='add'>+	print</div><div class='add'>+	print "static const char *cpu_feature_names[(NCAPINTS+NBUGINTS)*32] = {"</div><div class='add'>+</div><div class='add'>+	value_expr = "\\([0-9*+ ]+\\)"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/^#define X86_FEATURE_/ {</div><div class='add'>+	if (match($0, value_expr)) {</div><div class='add'>+		value = substr($0, RSTART + 1, RLENGTH - 2)</div><div class='add'>+		print "\t[" value "] = \"" $2 "\","</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/^#define X86_BUG_/ {</div><div class='add'>+	if (match($0, value_expr)) {</div><div class='add'>+		value = substr($0, RSTART + 1, RLENGTH - 2)</div><div class='add'>+		print "\t[NCAPINTS*32+(" value ")] = \"" $2 "\","</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+END {</div><div class='add'>+	print "};"</div><div class='add'>+}</div><div class='head'>diff --git a/tools/arch/x86/tools/gen-insn-attr-x86.awk b/tools/arch/x86/tools/gen-insn-attr-x86.awk<br/>index 2c19d7fc8a85..7ea1b75e59b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/tools/gen-insn-attr-x86.awk?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/arch/x86/tools/gen-insn-attr-x86.awk</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/arch/x86/tools/gen-insn-attr-x86.awk?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/arch/x86/tools/gen-insn-attr-x86.awk</a></div><div class='hunk'>@@ -21,6 +21,7 @@ function clear_vars() {</div><div class='ctx'> 	eid = -1 # escape id</div><div class='ctx'> 	gid = -1 # group id</div><div class='ctx'> 	aid = -1 # AVX id</div><div class='add'>+	xopid = -1 # XOP id</div><div class='ctx'> 	tname = ""</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -39,9 +40,11 @@ BEGIN {</div><div class='ctx'> 	ggid = 1</div><div class='ctx'> 	geid = 1</div><div class='ctx'> 	gaid = 0</div><div class='add'>+	gxopid = 0</div><div class='ctx'> 	delete etable</div><div class='ctx'> 	delete gtable</div><div class='ctx'> 	delete atable</div><div class='add'>+	delete xoptable</div><div class='ctx'> </div><div class='ctx'> 	opnd_expr = "^[A-Za-z/]"</div><div class='ctx'> 	ext_expr = "^\\("</div><div class='hunk'>@@ -61,6 +64,7 @@ BEGIN {</div><div class='ctx'> 	imm_flag["Ob"] = "INAT_MOFFSET"</div><div class='ctx'> 	imm_flag["Ov"] = "INAT_MOFFSET"</div><div class='ctx'> 	imm_flag["Lx"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)"</div><div class='add'>+	imm_flag["Lo"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)"</div><div class='ctx'> </div><div class='ctx'> 	modrm_expr = "^([CDEGMNPQRSUVW/][a-z]+|NTA|T[012])"</div><div class='ctx'> 	force64_expr = "\\([df]64\\)"</div><div class='hunk'>@@ -87,6 +91,8 @@ BEGIN {</div><div class='ctx'> 	evexonly_expr = "\\(ev\\)"</div><div class='ctx'> 	# (es) is the same as (ev) but also "SCALABLE" i.e. W and pp determine operand size</div><div class='ctx'> 	evex_scalable_expr = "\\(es\\)"</div><div class='add'>+	# All opcodes in XOP table or with (xop) superscript accept XOP prefix</div><div class='add'>+	xopok_expr = "\\(xop\\)"</div><div class='ctx'> </div><div class='ctx'> 	prefix_expr = "\\(Prefix\\)"</div><div class='ctx'> 	prefix_num["Operand-Size"] = "INAT_PFX_OPNDSZ"</div><div class='hunk'>@@ -106,6 +112,7 @@ BEGIN {</div><div class='ctx'> 	prefix_num["VEX+2byte"] = "INAT_PFX_VEX3"</div><div class='ctx'> 	prefix_num["EVEX"] = "INAT_PFX_EVEX"</div><div class='ctx'> 	prefix_num["REX2"] = "INAT_PFX_REX2"</div><div class='add'>+	prefix_num["XOP"] = "INAT_PFX_XOP"</div><div class='ctx'> </div><div class='ctx'> 	clear_vars()</div><div class='ctx'> }</div><div class='hunk'>@@ -147,6 +154,7 @@ function array_size(arr,   i,c) {</div><div class='ctx'> 	if (NF != 1) {</div><div class='ctx'> 		# AVX/escape opcode table</div><div class='ctx'> 		aid = $2</div><div class='add'>+		xopid = -1</div><div class='ctx'> 		if (gaid &lt;= aid)</div><div class='ctx'> 			gaid = aid + 1</div><div class='ctx'> 		if (tname == "")	# AVX only opcode table</div><div class='hunk'>@@ -156,6 +164,20 @@ function array_size(arr,   i,c) {</div><div class='ctx'> 		tname = "inat_primary_table"</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/^XOPcode:/ {</div><div class='add'>+	if (NF != 1) {</div><div class='add'>+		# XOP opcode table</div><div class='add'>+		xopid = $2</div><div class='add'>+		aid = -1</div><div class='add'>+		if (gxopid &lt;= xopid)</div><div class='add'>+			gxopid = xopid + 1</div><div class='add'>+		if (tname == "")	# XOP only opcode table</div><div class='add'>+			tname = sprintf("inat_xop_table_%d", $2)</div><div class='add'>+	}</div><div class='add'>+	if (xopid == -1 &amp;&amp; eid == -1)	# primary opcode table</div><div class='add'>+		tname = "inat_primary_table"</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /^GrpTable:/ {</div><div class='ctx'> 	print "/* " $0 " */"</div><div class='ctx'> 	if (!($2 in group))</div><div class='hunk'>@@ -206,6 +228,8 @@ function print_table(tbl,name,fmt,n)</div><div class='ctx'> 			etable[eid,0] = tname</div><div class='ctx'> 			if (aid &gt;= 0)</div><div class='ctx'> 				atable[aid,0] = tname</div><div class='add'>+			else if (xopid &gt;= 0)</div><div class='add'>+				xoptable[xopid] = tname</div><div class='ctx'> 		}</div><div class='ctx'> 		if (array_size(lptable1) != 0) {</div><div class='ctx'> 			print_table(lptable1,tname "_1[INAT_OPCODE_TABLE_SIZE]",</div><div class='hunk'>@@ -347,6 +371,8 @@ function convert_operands(count,opnd,       i,j,imm,mod)</div><div class='ctx'> 			flags = add_flags(flags, "INAT_VEXOK | INAT_VEXONLY")</div><div class='ctx'> 		else if (match(ext, vexok_expr) || match(opcode, vexok_opcode_expr))</div><div class='ctx'> 			flags = add_flags(flags, "INAT_VEXOK")</div><div class='add'>+		else if (match(ext, xopok_expr) || xopid &gt;= 0)</div><div class='add'>+			flags = add_flags(flags, "INAT_XOPOK")</div><div class='ctx'> </div><div class='ctx'> 		# check prefixes</div><div class='ctx'> 		if (match(ext, prefix_expr)) {</div><div class='hunk'>@@ -413,6 +439,14 @@ END {</div><div class='ctx'> 				print "	["i"]["j"] = "atable[i,j]","</div><div class='ctx'> 	print "};\n"</div><div class='ctx'> </div><div class='add'>+	print "/* XOP opcode map array */"</div><div class='add'>+	print "const insn_attr_t * const inat_xop_tables[X86_XOP_M_MAX - X86_XOP_M_MIN + 1]" \</div><div class='add'>+	      " = {"</div><div class='add'>+	for (i = 0; i &lt; gxopid; i++)</div><div class='add'>+		if (xoptable[i])</div><div class='add'>+			print "	["i"] = "xoptable[i]","</div><div class='add'>+	print "};"</div><div class='add'>+</div><div class='ctx'> 	print "#else /* !__BOOT_COMPRESSED */\n"</div><div class='ctx'> </div><div class='ctx'> 	print "/* Escape opcode map array */"</div><div class='hunk'>@@ -430,6 +464,10 @@ END {</div><div class='ctx'> 	      "[INAT_LSTPFX_MAX + 1];"</div><div class='ctx'> 	print ""</div><div class='ctx'> </div><div class='add'>+	print "/* XOP opcode map array */"</div><div class='add'>+	print "static const insn_attr_t *inat_xop_tables[X86_XOP_M_MAX - X86_XOP_M_MIN + 1];"</div><div class='add'>+	print ""</div><div class='add'>+</div><div class='ctx'> 	print "static void inat_init_tables(void)"</div><div class='ctx'> 	print "{"</div><div class='ctx'> </div><div class='hunk'>@@ -455,6 +493,12 @@ END {</div><div class='ctx'> 			if (atable[i,j])</div><div class='ctx'> 				print "\tinat_avx_tables["i"]["j"] = "atable[i,j]";"</div><div class='ctx'> </div><div class='add'>+	print ""</div><div class='add'>+	print "\t/* Print XOP opcode map array */"</div><div class='add'>+	for (i = 0; i &lt; gxopid; i++)</div><div class='add'>+		if (xoptable[i])</div><div class='add'>+			print "\tinat_xop_tables["i"] = "xoptable[i]";"</div><div class='add'>+</div><div class='ctx'> 	print "}"</div><div class='ctx'> 	print "#endif"</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/bootconfig/main.c b/tools/bootconfig/main.c<br/>index 57c669d2aa90..55d59ed507d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bootconfig/main.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bootconfig/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bootconfig/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bootconfig/main.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static int load_xbc_from_initrd(int fd, char **buf)</div><div class='ctx'> 	if (stat.st_size &lt; BOOTCONFIG_FOOTER_SIZE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (lseek(fd, -BOOTCONFIG_MAGIC_LEN, SEEK_END) &lt; 0)</div><div class='add'>+	if (lseek(fd, -(off_t)BOOTCONFIG_MAGIC_LEN, SEEK_END) &lt; 0)</div><div class='ctx'> 		return pr_errno("Failed to lseek for magic", -errno);</div><div class='ctx'> </div><div class='ctx'> 	if (read(fd, magic, BOOTCONFIG_MAGIC_LEN) &lt; 0)</div><div class='hunk'>@@ -203,7 +203,7 @@ static int load_xbc_from_initrd(int fd, char **buf)</div><div class='ctx'> 	if (memcmp(magic, BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_LEN) != 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (lseek(fd, -BOOTCONFIG_FOOTER_SIZE, SEEK_END) &lt; 0)</div><div class='add'>+	if (lseek(fd, -(off_t)BOOTCONFIG_FOOTER_SIZE, SEEK_END) &lt; 0)</div><div class='ctx'> 		return pr_errno("Failed to lseek for size", -errno);</div><div class='ctx'> </div><div class='ctx'> 	if (read(fd, &amp;size, sizeof(uint32_t)) &lt; 0)</div><div class='head'>diff --git a/tools/bpf/Makefile b/tools/bpf/Makefile<br/>index 062bbd6cd048..fd2585af1252 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/Makefile</a></div><div class='hunk'>@@ -32,7 +32,7 @@ FEATURE_TESTS = libbfd disassembler-four-args disassembler-init-styled</div><div class='ctx'> FEATURE_DISPLAY = libbfd</div><div class='ctx'> </div><div class='ctx'> check_feat := 1</div><div class='del'>-NON_CHECK_FEAT_TARGETS := clean bpftool_clean runqslower_clean resolve_btfids_clean</div><div class='add'>+NON_CHECK_FEAT_TARGETS := clean bpftool_clean resolve_btfids_clean</div><div class='ctx'> ifdef MAKECMDGOALS</div><div class='ctx'> ifeq ($(filter-out $(NON_CHECK_FEAT_TARGETS),$(MAKECMDGOALS)),)</div><div class='ctx'>   check_feat := 0</div><div class='hunk'>@@ -70,7 +70,7 @@ $(OUTPUT)%.lex.o: $(OUTPUT)%.lex.c</div><div class='ctx'> </div><div class='ctx'> PROGS = $(OUTPUT)bpf_jit_disasm $(OUTPUT)bpf_dbg $(OUTPUT)bpf_asm</div><div class='ctx'> </div><div class='del'>-all: $(PROGS) bpftool runqslower</div><div class='add'>+all: $(PROGS) bpftool</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)bpf_jit_disasm: CFLAGS += -DPACKAGE='bpf_jit_disasm'</div><div class='ctx'> $(OUTPUT)bpf_jit_disasm: $(OUTPUT)bpf_jit_disasm.o</div><div class='hunk'>@@ -86,7 +86,7 @@ $(OUTPUT)bpf_exp.lex.c: $(OUTPUT)bpf_exp.yacc.c</div><div class='ctx'> $(OUTPUT)bpf_exp.yacc.o: $(OUTPUT)bpf_exp.yacc.c</div><div class='ctx'> $(OUTPUT)bpf_exp.lex.o: $(OUTPUT)bpf_exp.lex.c</div><div class='ctx'> </div><div class='del'>-clean: bpftool_clean runqslower_clean resolve_btfids_clean</div><div class='add'>+clean: bpftool_clean resolve_btfids_clean</div><div class='ctx'> 	$(call QUIET_CLEAN, bpf-progs)</div><div class='ctx'> 	$(Q)$(RM) -r -- $(OUTPUT)*.o $(OUTPUT)bpf_jit_disasm $(OUTPUT)bpf_dbg \</div><div class='ctx'> 	       $(OUTPUT)bpf_asm $(OUTPUT)bpf_exp.yacc.* $(OUTPUT)bpf_exp.lex.*</div><div class='hunk'>@@ -112,12 +112,6 @@ bpftool_install:</div><div class='ctx'> bpftool_clean:</div><div class='ctx'> 	$(call descend,bpftool,clean)</div><div class='ctx'> </div><div class='del'>-runqslower:</div><div class='del'>-	$(call descend,runqslower)</div><div class='del'>-</div><div class='del'>-runqslower_clean:</div><div class='del'>-	$(call descend,runqslower,clean)</div><div class='del'>-</div><div class='ctx'> resolve_btfids:</div><div class='ctx'> 	$(call descend,resolve_btfids)</div><div class='ctx'> </div><div class='hunk'>@@ -125,5 +119,4 @@ resolve_btfids_clean:</div><div class='ctx'> 	$(call descend,resolve_btfids,clean)</div><div class='ctx'> </div><div class='ctx'> .PHONY: all install clean bpftool bpftool_install bpftool_clean \</div><div class='del'>-	runqslower runqslower_clean \</div><div class='ctx'> 	resolve_btfids resolve_btfids_clean</div><div class='head'>diff --git a/tools/bpf/bpftool/Documentation/bpftool-gen.rst b/tools/bpf/bpftool/Documentation/bpftool-gen.rst<br/>index ca860fd97d8d..d0a36f442db7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-gen.rst?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-gen.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-gen.rst?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/Documentation/bpftool-gen.rst</a></div><div class='hunk'>@@ -16,7 +16,7 @@ SYNOPSIS</div><div class='ctx'> </div><div class='ctx'> **bpftool** [*OPTIONS*] **gen** *COMMAND*</div><div class='ctx'> </div><div class='del'>-*OPTIONS* := { |COMMON_OPTIONS| | { **-L** | **--use-loader** } }</div><div class='add'>+*OPTIONS* := { |COMMON_OPTIONS| | { **-L** | **--use-loader** } | [ { **-S** | **--sign** } {**-k** &lt;private_key.pem&gt;} **-i** &lt;certificate.x509&gt; ] }</div><div class='ctx'> </div><div class='ctx'> *COMMAND* := { **object** | **skeleton** | **help** }</div><div class='ctx'> </div><div class='hunk'>@@ -186,6 +186,17 @@ OPTIONS</div><div class='ctx'>     skeleton). A light skeleton contains a loader eBPF program. It does not use</div><div class='ctx'>     the majority of the libbpf infrastructure, and does not need libelf.</div><div class='ctx'> </div><div class='add'>+-S, --sign</div><div class='add'>+    For skeletons, generate a signed skeleton. This option must be used with</div><div class='add'>+    **-k** and **-i**. Using this flag implicitly enables **--use-loader**.</div><div class='add'>+</div><div class='add'>+-k &lt;private_key.pem&gt;</div><div class='add'>+    Path to the private key file in PEM format, required for signing.</div><div class='add'>+</div><div class='add'>+-i &lt;certificate.x509&gt;</div><div class='add'>+    Path to the X.509 certificate file in PEM or DER format, required for</div><div class='add'>+    signing.</div><div class='add'>+</div><div class='ctx'> EXAMPLES</div><div class='ctx'> ========</div><div class='ctx'> **$ cat example1.bpf.c**</div><div class='head'>diff --git a/tools/bpf/bpftool/Documentation/bpftool-map.rst b/tools/bpf/bpftool/Documentation/bpftool-map.rst<br/>index 252e4c538edb..1af3305ea2b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-map.rst?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-map.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-map.rst?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/Documentation/bpftool-map.rst</a></div><div class='hunk'>@@ -55,7 +55,8 @@ MAP COMMANDS</div><div class='ctx'> |     | **devmap** | **devmap_hash** | **sockmap** | **cpumap** | **xskmap** | **sockhash**</div><div class='ctx'> |     | **cgroup_storage** | **reuseport_sockarray** | **percpu_cgroup_storage**</div><div class='ctx'> |     | **queue** | **stack** | **sk_storage** | **struct_ops** | **ringbuf** | **inode_storage**</div><div class='del'>-|     | **task_storage** | **bloom_filter** | **user_ringbuf** | **cgrp_storage** | **arena** }</div><div class='add'>+|     | **task_storage** | **bloom_filter** | **user_ringbuf** | **cgrp_storage** | **arena**</div><div class='add'>+|     | **insn_array** }</div><div class='ctx'> </div><div class='ctx'> DESCRIPTION</div><div class='ctx'> ===========</div><div class='head'>diff --git a/tools/bpf/bpftool/Documentation/bpftool-prog.rst b/tools/bpf/bpftool/Documentation/bpftool-prog.rst<br/>index f69fd92df8d8..35aeeaf5f711 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-prog.rst?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Documentation/bpftool-prog.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-prog.rst?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/Documentation/bpftool-prog.rst</a></div><div class='hunk'>@@ -18,7 +18,7 @@ SYNOPSIS</div><div class='ctx'> </div><div class='ctx'> *OPTIONS* := { |COMMON_OPTIONS| |</div><div class='ctx'> { **-f** | **--bpffs** } | { **-m** | **--mapcompat** } | { **-n** | **--nomount** } |</div><div class='del'>-{ **-L** | **--use-loader** } }</div><div class='add'>+{ **-L** | **--use-loader** } | [ { **-S** | **--sign** } **-k** &lt;private_key.pem&gt; **-i** &lt;certificate.x509&gt; ] }</div><div class='ctx'> </div><div class='ctx'> *COMMANDS* :=</div><div class='ctx'> { **show** | **list** | **dump xlated** | **dump jited** | **pin** | **load** |</div><div class='hunk'>@@ -182,7 +182,7 @@ bpftool prog tracelog</div><div class='ctx'> </div><div class='ctx'> bpftool prog tracelog { stdout | stderr } *PROG*</div><div class='ctx'>     Dump the BPF stream of the program. BPF programs can write to these streams</div><div class='del'>-    at runtime with the **bpf_stream_vprintk**\ () kfunc. The kernel may write</div><div class='add'>+    at runtime with the **bpf_stream_vprintk_impl**\ () kfunc. The kernel may write</div><div class='ctx'>     error messages to the standard error stream. This facility should be used</div><div class='ctx'>     only for debugging purposes.</div><div class='ctx'> </div><div class='hunk'>@@ -248,6 +248,18 @@ OPTIONS</div><div class='ctx'>     creating the maps, and loading the programs (see **bpftool prog tracelog**</div><div class='ctx'>     as a way to dump those messages).</div><div class='ctx'> </div><div class='add'>+-S, --sign</div><div class='add'>+    Enable signing of the BPF program before loading. This option must be</div><div class='add'>+    used with **-k** and **-i**. Using this flag implicitly enables</div><div class='add'>+    **--use-loader**.</div><div class='add'>+</div><div class='add'>+-k &lt;private_key.pem&gt;</div><div class='add'>+    Path to the private key file in PEM format, required when signing.</div><div class='add'>+</div><div class='add'>+-i &lt;certificate.x509&gt;</div><div class='add'>+    Path to the X.509 certificate file in PEM or DER format, required when</div><div class='add'>+    signing.</div><div class='add'>+</div><div class='ctx'> EXAMPLES</div><div class='ctx'> ========</div><div class='ctx'> **# bpftool prog show**</div><div class='head'>diff --git a/tools/bpf/bpftool/Documentation/bpftool-token.rst b/tools/bpf/bpftool/Documentation/bpftool-token.rst<br/>new file mode 100644<br/>index 000000000000..d082c499cfe3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Documentation/bpftool-token.rst?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/Documentation/bpftool-token.rst</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+================</div><div class='add'>+bpftool-token</div><div class='add'>+================</div><div class='add'>+-------------------------------------------------------------------------------</div><div class='add'>+tool for inspection and simple manipulation of eBPF tokens</div><div class='add'>+-------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+:Manual section: 8</div><div class='add'>+</div><div class='add'>+.. include:: substitutions.rst</div><div class='add'>+</div><div class='add'>+SYNOPSIS</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+**bpftool** [*OPTIONS*] **token** *COMMAND*</div><div class='add'>+</div><div class='add'>+*OPTIONS* := { |COMMON_OPTIONS| }</div><div class='add'>+</div><div class='add'>+*COMMANDS* := { **show** | **list** | **help** }</div><div class='add'>+</div><div class='add'>+TOKEN COMMANDS</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+| **bpftool** **token** { **show** | **list** }</div><div class='add'>+| **bpftool** **token help**</div><div class='add'>+|</div><div class='add'>+</div><div class='add'>+DESCRIPTION</div><div class='add'>+===========</div><div class='add'>+bpftool token { show | list }</div><div class='add'>+    List BPF token information for each *bpffs* mount point containing token</div><div class='add'>+    information on the system. Information include mount point path, allowed</div><div class='add'>+    **bpf**\ () system call commands, maps, programs, and attach types for the</div><div class='add'>+    token.</div><div class='add'>+</div><div class='add'>+bpftool prog help</div><div class='add'>+    Print short help message.</div><div class='add'>+</div><div class='add'>+OPTIONS</div><div class='add'>+========</div><div class='add'>+.. include:: common_options.rst</div><div class='add'>+</div><div class='add'>+EXAMPLES</div><div class='add'>+========</div><div class='add'>+|</div><div class='add'>+| **# mkdir -p /sys/fs/bpf/token**</div><div class='add'>+| **# mount -t bpf bpffs /sys/fs/bpf/token** \</div><div class='add'>+|         **-o delegate_cmds=prog_load:map_create** \</div><div class='add'>+|         **-o delegate_progs=kprobe** \</div><div class='add'>+|         **-o delegate_attachs=xdp**</div><div class='add'>+| **# bpftool token list**</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    token_info  /sys/fs/bpf/token</div><div class='add'>+            allowed_cmds:</div><div class='add'>+              map_create          prog_load</div><div class='add'>+            allowed_maps:</div><div class='add'>+            allowed_progs:</div><div class='add'>+              kprobe</div><div class='add'>+            allowed_attachs:</div><div class='add'>+              xdp</div><div class='head'>diff --git a/tools/bpf/bpftool/Makefile b/tools/bpf/bpftool/Makefile<br/>index 9e9a5f006cd2..586d1b2595d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/Makefile</a></div><div class='hunk'>@@ -130,8 +130,8 @@ include $(FEATURES_DUMP)</div><div class='ctx'> endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-LIBS = $(LIBBPF) -lelf -lz</div><div class='del'>-LIBS_BOOTSTRAP = $(LIBBPF_BOOTSTRAP) -lelf -lz</div><div class='add'>+LIBS = $(LIBBPF) -lelf -lz -lcrypto</div><div class='add'>+LIBS_BOOTSTRAP = $(LIBBPF_BOOTSTRAP) -lelf -lz -lcrypto</div><div class='ctx'> </div><div class='ctx'> ifeq ($(feature-libelf-zstd),1)</div><div class='ctx'> LIBS += -lzstd</div><div class='hunk'>@@ -194,7 +194,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> BPFTOOL_BOOTSTRAP := $(BOOTSTRAP_OUTPUT)bpftool</div><div class='ctx'> </div><div class='del'>-BOOTSTRAP_OBJS = $(addprefix $(BOOTSTRAP_OUTPUT),main.o common.o json_writer.o gen.o btf.o)</div><div class='add'>+BOOTSTRAP_OBJS = $(addprefix $(BOOTSTRAP_OUTPUT),main.o common.o json_writer.o gen.o btf.o sign.o)</div><div class='ctx'> $(BOOTSTRAP_OBJS): $(LIBBPF_BOOTSTRAP)</div><div class='ctx'> </div><div class='ctx'> OBJS = $(patsubst %.c,$(OUTPUT)%.o,$(SRCS)) $(OUTPUT)disasm.o</div><div class='head'>diff --git a/tools/bpf/bpftool/bash-completion/bpftool b/tools/bpf/bpftool/bash-completion/bpftool<br/>index a759ba24471d..53bcfeb1a76e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/bash-completion/bpftool?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/bash-completion/bpftool</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/bash-completion/bpftool?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/bash-completion/bpftool</a></div><div class='hunk'>@@ -262,7 +262,7 @@ _bpftool()</div><div class='ctx'>     # Deal with options</div><div class='ctx'>     if [[ ${words[cword]} == -* ]]; then</div><div class='ctx'>         local c='--version --json --pretty --bpffs --mapcompat --debug \</div><div class='del'>-            --use-loader --base-btf'</div><div class='add'>+            --use-loader --base-btf --sign -i -k'</div><div class='ctx'>         COMPREPLY=( $( compgen -W "$c" -- "$cur" ) )</div><div class='ctx'>         return 0</div><div class='ctx'>     fi</div><div class='hunk'>@@ -283,7 +283,7 @@ _bpftool()</div><div class='ctx'>             _sysfs_get_netdevs</div><div class='ctx'>             return 0</div><div class='ctx'>             ;;</div><div class='del'>-        file|pinned|-B|--base-btf)</div><div class='add'>+        file|pinned|-B|--base-btf|-i|-k)</div><div class='ctx'>             _filedir</div><div class='ctx'>             return 0</div><div class='ctx'>             ;;</div><div class='hunk'>@@ -296,13 +296,21 @@ _bpftool()</div><div class='ctx'>     # Remove all options so completions don't have to deal with them.</div><div class='ctx'>     local i pprev</div><div class='ctx'>     for (( i=1; i &lt; ${#words[@]}; )); do</div><div class='del'>-        if [[ ${words[i]::1} == - ]] &amp;&amp;</div><div class='del'>-            [[ ${words[i]} != "-B" ]] &amp;&amp; [[ ${words[i]} != "--base-btf" ]]; then</div><div class='del'>-            words=( "${words[@]:0:i}" "${words[@]:i+1}" )</div><div class='del'>-            [[ $i -le $cword ]] &amp;&amp; cword=$(( cword - 1 ))</div><div class='del'>-        else</div><div class='del'>-            i=$(( ++i ))</div><div class='del'>-        fi</div><div class='add'>+        case ${words[i]} in</div><div class='add'>+            # Remove option and its argument</div><div class='add'>+            -B|--base-btf|-i|-k)</div><div class='add'>+                words=( "${words[@]:0:i}" "${words[@]:i+2}" )</div><div class='add'>+                [[ $i -le $(($cword + 1)) ]] &amp;&amp; cword=$(( cword - 2 ))</div><div class='add'>+                ;;</div><div class='add'>+            # No argument, remove option only</div><div class='add'>+            -*)</div><div class='add'>+                words=( "${words[@]:0:i}" "${words[@]:i+1}" )</div><div class='add'>+                [[ $i -le $cword ]] &amp;&amp; cword=$(( cword - 1 ))</div><div class='add'>+                ;;</div><div class='add'>+            *)</div><div class='add'>+                i=$(( ++i ))</div><div class='add'>+                ;;</div><div class='add'>+        esac</div><div class='ctx'>     done</div><div class='ctx'>     cur=${words[cword]}</div><div class='ctx'>     prev=${words[cword - 1]}</div><div class='hunk'>@@ -1215,6 +1223,17 @@ _bpftool()</div><div class='ctx'>                     ;;</div><div class='ctx'>             esac</div><div class='ctx'>             ;;</div><div class='add'>+        token)</div><div class='add'>+            case $command in</div><div class='add'>+               show|list)</div><div class='add'>+                   return 0</div><div class='add'>+                   ;;</div><div class='add'>+               *)</div><div class='add'>+                   [[ $prev == $object ]] &amp;&amp; \</div><div class='add'>+                       COMPREPLY=( $( compgen -W 'help show list' -- "$cur" ) )</div><div class='add'>+                   ;;</div><div class='add'>+            esac</div><div class='add'>+            ;;</div><div class='ctx'>     esac</div><div class='ctx'> } &amp;&amp;</div><div class='ctx'> complete -F _bpftool bpftool</div><div class='head'>diff --git a/tools/bpf/bpftool/btf_dumper.c b/tools/bpf/bpftool/btf_dumper.c<br/>index 4e896d8a2416..def297e879f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/btf_dumper.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/btf_dumper.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/btf_dumper.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/btf_dumper.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@ static int dump_prog_id_as_func_ptr(const struct btf_dumper *d,</div><div class='ctx'> 	__u32 info_len = sizeof(info);</div><div class='ctx'> 	const char *prog_name = NULL;</div><div class='ctx'> 	struct btf *prog_btf = NULL;</div><div class='del'>-	struct bpf_func_info finfo;</div><div class='add'>+	struct bpf_func_info finfo = {};</div><div class='ctx'> 	__u32 finfo_rec_size;</div><div class='ctx'> 	char prog_str[1024];</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -590,7 +590,7 @@ static int btf_dumper_do_type(const struct btf_dumper *d, __u32 type_id,</div><div class='ctx'> 	case BTF_KIND_DATASEC:</div><div class='ctx'> 		return btf_dumper_datasec(d, type_id, data);</div><div class='ctx'> 	default:</div><div class='del'>-		jsonw_printf(d-&gt;jw, "(unsupported-kind");</div><div class='add'>+		jsonw_printf(d-&gt;jw, "(unsupported-kind)");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/bpf/bpftool/cgroup.c b/tools/bpf/bpftool/cgroup.c<br/>index 944ebe21a216..ec356deb27c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/cgroup.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/cgroup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/cgroup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/cgroup.c</a></div><div class='hunk'>@@ -2,6 +2,10 @@</div><div class='ctx'> // Copyright (C) 2017 Facebook</div><div class='ctx'> // Author: Roman Gushchin &lt;guro@fb.com&gt;</div><div class='ctx'> </div><div class='add'>+#undef GCC_VERSION</div><div class='add'>+#ifndef _GNU_SOURCE</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#endif</div><div class='ctx'> #define _XOPEN_SOURCE 500</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='head'>diff --git a/tools/bpf/bpftool/common.c b/tools/bpf/bpftool/common.c<br/>index b07317d2842f..e8daf963ecef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/common.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/common.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;sys/resource.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;sys/vfs.h&gt;</div><div class='add'>+#include &lt;sys/utsname.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/limits.h&gt;</div><div class='hunk'>@@ -31,6 +32,7 @@</div><div class='ctx'> #include &lt;bpf/hashmap.h&gt;</div><div class='ctx'> #include &lt;bpf/libbpf.h&gt; /* libbpf_num_possible_cpus */</div><div class='ctx'> #include &lt;bpf/btf.h&gt;</div><div class='add'>+#include &lt;zlib.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1208,3 +1210,94 @@ int pathname_concat(char *buf, int buf_sz, const char *path,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static bool read_next_kernel_config_option(gzFile file, char *buf, size_t n,</div><div class='add'>+					   char **value)</div><div class='add'>+{</div><div class='add'>+	char *sep;</div><div class='add'>+</div><div class='add'>+	while (gzgets(file, buf, n)) {</div><div class='add'>+		if (strncmp(buf, "CONFIG_", 7))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		sep = strchr(buf, '=');</div><div class='add'>+		if (!sep)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Trim ending '\n' */</div><div class='add'>+		buf[strlen(buf) - 1] = '\0';</div><div class='add'>+</div><div class='add'>+		/* Split on '=' and ensure that a value is present. */</div><div class='add'>+		*sep = '\0';</div><div class='add'>+		if (!sep[1])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		*value = sep + 1;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int read_kernel_config(const struct kernel_config_option *requested_options,</div><div class='add'>+		       size_t num_options, char **out_values,</div><div class='add'>+		       const char *define_prefix)</div><div class='add'>+{</div><div class='add'>+	struct utsname utsn;</div><div class='add'>+	char path[PATH_MAX];</div><div class='add'>+	gzFile file = NULL;</div><div class='add'>+	char buf[4096];</div><div class='add'>+	char *value;</div><div class='add'>+	size_t i;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!requested_options || !out_values || num_options == 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!uname(&amp;utsn)) {</div><div class='add'>+		snprintf(path, sizeof(path), "/boot/config-%s", utsn.release);</div><div class='add'>+</div><div class='add'>+		/* gzopen also accepts uncompressed files. */</div><div class='add'>+		file = gzopen(path, "r");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!file) {</div><div class='add'>+		/* Some distributions build with CONFIG_IKCONFIG=y and put the</div><div class='add'>+		 * config file at /proc/config.gz.</div><div class='add'>+		 */</div><div class='add'>+		file = gzopen("/proc/config.gz", "r");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!file) {</div><div class='add'>+		p_info("skipping kernel config, can't open file: %s",</div><div class='add'>+			strerror(errno));</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gzgets(file, buf, sizeof(buf)) || !gzgets(file, buf, sizeof(buf))) {</div><div class='add'>+		p_info("skipping kernel config, can't read from file: %s",</div><div class='add'>+			strerror(errno));</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto end_parse;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (strcmp(buf, "# Automatically generated file; DO NOT EDIT.\n")) {</div><div class='add'>+		p_info("skipping kernel config, can't find correct file");</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto end_parse;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (read_next_kernel_config_option(file, buf, sizeof(buf), &amp;value)) {</div><div class='add'>+		for (i = 0; i &lt; num_options; i++) {</div><div class='add'>+			if ((define_prefix &amp;&amp; !requested_options[i].macro_dump) ||</div><div class='add'>+			     out_values[i] || strcmp(buf, requested_options[i].name))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			out_values[i] = strdup(value);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end_parse:</div><div class='add'>+	gzclose(file);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/bpf/bpftool/feature.c b/tools/bpf/bpftool/feature.c<br/>index 24fecdf8e430..0f6070a0c8e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/feature.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/feature.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/feature.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/feature.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #ifdef USE_LIBCAP</div><div class='ctx'> #include &lt;sys/capability.h&gt;</div><div class='ctx'> #endif</div><div class='del'>-#include &lt;sys/utsname.h&gt;</div><div class='ctx'> #include &lt;sys/vfs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='hunk'>@@ -18,7 +17,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;bpf/bpf.h&gt;</div><div class='ctx'> #include &lt;bpf/libbpf.h&gt;</div><div class='del'>-#include &lt;zlib.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='hunk'>@@ -327,40 +325,9 @@ static void probe_jit_limit(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool read_next_kernel_config_option(gzFile file, char *buf, size_t n,</div><div class='del'>-					   char **value)</div><div class='del'>-{</div><div class='del'>-	char *sep;</div><div class='del'>-</div><div class='del'>-	while (gzgets(file, buf, n)) {</div><div class='del'>-		if (strncmp(buf, "CONFIG_", 7))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		sep = strchr(buf, '=');</div><div class='del'>-		if (!sep)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Trim ending '\n' */</div><div class='del'>-		buf[strlen(buf) - 1] = '\0';</div><div class='del'>-</div><div class='del'>-		/* Split on '=' and ensure that a value is present. */</div><div class='del'>-		*sep = '\0';</div><div class='del'>-		if (!sep[1])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		*value = sep + 1;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void probe_kernel_image_config(const char *define_prefix)</div><div class='ctx'> {</div><div class='del'>-	static const struct {</div><div class='del'>-		const char * const name;</div><div class='del'>-		bool macro_dump;</div><div class='del'>-	} options[] = {</div><div class='add'>+	struct kernel_config_option options[] = {</div><div class='ctx'> 		/* Enable BPF */</div><div class='ctx'> 		{ "CONFIG_BPF", },</div><div class='ctx'> 		/* Enable bpf() syscall */</div><div class='hunk'>@@ -435,52 +402,11 @@ static void probe_kernel_image_config(const char *define_prefix)</div><div class='ctx'> 		{ "CONFIG_HZ", true, }</div><div class='ctx'> 	};</div><div class='ctx'> 	char *values[ARRAY_SIZE(options)] = { };</div><div class='del'>-	struct utsname utsn;</div><div class='del'>-	char path[PATH_MAX];</div><div class='del'>-	gzFile file = NULL;</div><div class='del'>-	char buf[4096];</div><div class='del'>-	char *value;</div><div class='ctx'> 	size_t i;</div><div class='ctx'> </div><div class='del'>-	if (!uname(&amp;utsn)) {</div><div class='del'>-		snprintf(path, sizeof(path), "/boot/config-%s", utsn.release);</div><div class='del'>-</div><div class='del'>-		/* gzopen also accepts uncompressed files. */</div><div class='del'>-		file = gzopen(path, "r");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!file) {</div><div class='del'>-		/* Some distributions build with CONFIG_IKCONFIG=y and put the</div><div class='del'>-		 * config file at /proc/config.gz.</div><div class='del'>-		 */</div><div class='del'>-		file = gzopen("/proc/config.gz", "r");</div><div class='del'>-	}</div><div class='del'>-	if (!file) {</div><div class='del'>-		p_info("skipping kernel config, can't open file: %s",</div><div class='del'>-		       strerror(errno));</div><div class='del'>-		goto end_parse;</div><div class='del'>-	}</div><div class='del'>-	/* Sanity checks */</div><div class='del'>-	if (!gzgets(file, buf, sizeof(buf)) ||</div><div class='del'>-	    !gzgets(file, buf, sizeof(buf))) {</div><div class='del'>-		p_info("skipping kernel config, can't read from file: %s",</div><div class='del'>-		       strerror(errno));</div><div class='del'>-		goto end_parse;</div><div class='del'>-	}</div><div class='del'>-	if (strcmp(buf, "# Automatically generated file; DO NOT EDIT.\n")) {</div><div class='del'>-		p_info("skipping kernel config, can't find correct file");</div><div class='del'>-		goto end_parse;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (read_next_kernel_config_option(file, buf, sizeof(buf), &amp;value)) {</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(options); i++) {</div><div class='del'>-			if ((define_prefix &amp;&amp; !options[i].macro_dump) ||</div><div class='del'>-			    values[i] || strcmp(buf, options[i].name))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			values[i] = strdup(value);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (read_kernel_config(options, ARRAY_SIZE(options), values,</div><div class='add'>+			       define_prefix))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(options); i++) {</div><div class='ctx'> 		if (define_prefix &amp;&amp; !options[i].macro_dump)</div><div class='hunk'>@@ -488,10 +414,6 @@ static void probe_kernel_image_config(const char *define_prefix)</div><div class='ctx'> 		print_kernel_option(options[i].name, values[i], define_prefix);</div><div class='ctx'> 		free(values[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-end_parse:</div><div class='del'>-	if (file)</div><div class='del'>-		gzclose(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool probe_bpf_syscall(const char *define_prefix)</div><div class='head'>diff --git a/tools/bpf/bpftool/gen.c b/tools/bpf/bpftool/gen.c<br/>index 67a60114368f..993c7d9484a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/gen.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/gen.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/gen.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/gen.c</a></div><div class='hunk'>@@ -688,10 +688,17 @@ static void codegen_destroy(struct bpf_object *obj, const char *obj_name)</div><div class='ctx'> static int gen_trace(struct bpf_object *obj, const char *obj_name, const char *header_guard)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_LIBBPF_OPTS(gen_loader_opts, opts);</div><div class='add'>+	struct bpf_load_and_run_opts sopts = {};</div><div class='add'>+	char sig_buf[MAX_SIG_SIZE];</div><div class='add'>+	__u8 prog_sha[SHA256_DIGEST_LENGTH];</div><div class='ctx'> 	struct bpf_map *map;</div><div class='add'>+</div><div class='ctx'> 	char ident[256];</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='add'>+	if (sign_progs)</div><div class='add'>+		opts.gen_hash = true;</div><div class='add'>+</div><div class='ctx'> 	err = bpf_object__gen_loader(obj, &amp;opts);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -701,6 +708,7 @@ static int gen_trace(struct bpf_object *obj, const char *obj_name, const char *h</div><div class='ctx'> 		p_err("failed to load object file");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* If there was no error during load then gen_loader_opts</div><div class='ctx'> 	 * are populated with the loader program.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -780,8 +788,52 @@ static int gen_trace(struct bpf_object *obj, const char *obj_name, const char *h</div><div class='ctx'> 	print_hex(opts.insns, opts.insns_sz);</div><div class='ctx'> 	codegen("\</div><div class='ctx'> 		\n\</div><div class='del'>-		\";							    \n\</div><div class='del'>-									    \n\</div><div class='add'>+		\";\n");</div><div class='add'>+</div><div class='add'>+	if (sign_progs) {</div><div class='add'>+		sopts.insns = opts.insns;</div><div class='add'>+		sopts.insns_sz = opts.insns_sz;</div><div class='add'>+		sopts.excl_prog_hash = prog_sha;</div><div class='add'>+		sopts.excl_prog_hash_sz = sizeof(prog_sha);</div><div class='add'>+		sopts.signature = sig_buf;</div><div class='add'>+		sopts.signature_sz = MAX_SIG_SIZE;</div><div class='add'>+</div><div class='add'>+		err = bpftool_prog_sign(&amp;sopts);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			p_err("failed to sign program");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+			static const char opts_sig[] __attribute__((__aligned__(8))) = \"\\\n\</div><div class='add'>+		");</div><div class='add'>+		print_hex((const void *)sig_buf, sopts.signature_sz);</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+		\";\n");</div><div class='add'>+</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+			static const char opts_excl_hash[] __attribute__((__aligned__(8))) = \"\\\n\</div><div class='add'>+		");</div><div class='add'>+		print_hex((const void *)prog_sha, sizeof(prog_sha));</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+		\";\n");</div><div class='add'>+</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+			opts.signature = (void *)opts_sig;			\n\</div><div class='add'>+			opts.signature_sz = sizeof(opts_sig) - 1;		\n\</div><div class='add'>+			opts.excl_prog_hash = (void *)opts_excl_hash;		\n\</div><div class='add'>+			opts.excl_prog_hash_sz = sizeof(opts_excl_hash) - 1;	\n\</div><div class='add'>+			opts.keyring_id = skel-&gt;keyring_id;			\n\</div><div class='add'>+		");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	codegen("\</div><div class='add'>+		\n\</div><div class='ctx'> 			opts.ctx = (struct bpf_loader_ctx *)skel;	    \n\</div><div class='ctx'> 			opts.data_sz = sizeof(opts_data) - 1;		    \n\</div><div class='ctx'> 			opts.data = (void *)opts_data;			    \n\</div><div class='hunk'>@@ -1240,7 +1292,7 @@ static int do_skeleton(int argc, char **argv)</div><div class='ctx'> 		err = -errno;</div><div class='ctx'> 		libbpf_strerror(err, err_buf, sizeof(err_buf));</div><div class='ctx'> 		p_err("failed to open BPF object file: %s", err_buf);</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_obj;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bpf_object__for_each_map(map, obj) {</div><div class='hunk'>@@ -1355,6 +1407,13 @@ static int do_skeleton(int argc, char **argv)</div><div class='ctx'> 		printf("\t} links;\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (sign_progs) {</div><div class='add'>+		codegen("\</div><div class='add'>+		\n\</div><div class='add'>+			__s32 keyring_id;				   \n\</div><div class='add'>+		");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (btf) {</div><div class='ctx'> 		err = codegen_datasecs(obj, obj_name);</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -1552,6 +1611,7 @@ static int do_skeleton(int argc, char **argv)</div><div class='ctx'> 	err = 0;</div><div class='ctx'> out:</div><div class='ctx'> 	bpf_object__close(obj);</div><div class='add'>+out_obj:</div><div class='ctx'> 	if (obj_data)</div><div class='ctx'> 		munmap(obj_data, mmap_sz);</div><div class='ctx'> 	close(fd);</div><div class='hunk'>@@ -1930,7 +1990,7 @@ static int do_help(int argc, char **argv)</div><div class='ctx'> 		"       %1$s %2$s help\n"</div><div class='ctx'> 		"\n"</div><div class='ctx'> 		"       " HELP_SPEC_OPTIONS " |\n"</div><div class='del'>-		"                    {-L|--use-loader} }\n"</div><div class='add'>+		"                    {-L|--use-loader} | [ {-S|--sign } {-k} &lt;private_key.pem&gt; {-i} &lt;certificate.x509&gt; ]}\n"</div><div class='ctx'> 		"",</div><div class='ctx'> 		bin_name, "gen");</div><div class='ctx'> </div><div class='head'>diff --git a/tools/bpf/bpftool/link.c b/tools/bpf/bpftool/link.c<br/>index a773e05d5ade..bdcd717b0348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/link.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/link.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/link.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/link.c</a></div><div class='hunk'>@@ -282,11 +282,52 @@ get_addr_cookie_array(__u64 *addrs, __u64 *cookies, __u32 count)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_x86_ibt_enabled(void)</div><div class='add'>+{</div><div class='add'>+#if defined(__x86_64__)</div><div class='add'>+	struct kernel_config_option options[] = {</div><div class='add'>+		{ "CONFIG_X86_KERNEL_IBT", },</div><div class='add'>+	};</div><div class='add'>+	char *values[ARRAY_SIZE(options)] = { };</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	if (read_kernel_config(options, ARRAY_SIZE(options), values, NULL))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ret = !!values[0];</div><div class='add'>+	free(values[0]);</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return false;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+symbol_matches_target(__u64 sym_addr, __u64 target_addr, bool is_ibt_enabled)</div><div class='add'>+{</div><div class='add'>+	if (sym_addr == target_addr)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * On x86_64 architectures with CET (Control-flow Enforcement Technology),</div><div class='add'>+	 * function entry points have a 4-byte 'endbr' instruction prefix.</div><div class='add'>+	 * This causes kprobe hooks to target the address *after* 'endbr'</div><div class='add'>+	 * (symbol address + 4), preserving the CET instruction.</div><div class='add'>+	 * Here we check if the symbol address matches the hook target address</div><div class='add'>+	 * minus 4, indicating a CET-enabled function entry point.</div><div class='add'>+	 */</div><div class='add'>+	if (is_ibt_enabled &amp;&amp; sym_addr == target_addr - 4)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> show_kprobe_multi_json(struct bpf_link_info *info, json_writer_t *wtr)</div><div class='ctx'> {</div><div class='ctx'> 	struct addr_cookie *data;</div><div class='ctx'> 	__u32 i, j = 0;</div><div class='add'>+	bool is_ibt_enabled;</div><div class='ctx'> </div><div class='ctx'> 	jsonw_bool_field(json_wtr, "retprobe",</div><div class='ctx'> 			 info-&gt;kprobe_multi.flags &amp; BPF_F_KPROBE_MULTI_RETURN);</div><div class='hunk'>@@ -306,11 +347,13 @@ show_kprobe_multi_json(struct bpf_link_info *info, json_writer_t *wtr)</div><div class='ctx'> 	if (!dd.sym_count)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='add'>+	is_ibt_enabled = is_x86_ibt_enabled();</div><div class='ctx'> 	for (i = 0; i &lt; dd.sym_count; i++) {</div><div class='del'>-		if (dd.sym_mapping[i].address != data[j].addr)</div><div class='add'>+		if (!symbol_matches_target(dd.sym_mapping[i].address,</div><div class='add'>+					   data[j].addr, is_ibt_enabled))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		jsonw_start_object(json_wtr);</div><div class='del'>-		jsonw_uint_field(json_wtr, "addr", dd.sym_mapping[i].address);</div><div class='add'>+		jsonw_uint_field(json_wtr, "addr", (unsigned long)data[j].addr);</div><div class='ctx'> 		jsonw_string_field(json_wtr, "func", dd.sym_mapping[i].name);</div><div class='ctx'> 		/* Print null if it is vmlinux */</div><div class='ctx'> 		if (dd.sym_mapping[i].module[0] == '\0') {</div><div class='hunk'>@@ -719,6 +762,7 @@ static void show_kprobe_multi_plain(struct bpf_link_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct addr_cookie *data;</div><div class='ctx'> 	__u32 i, j = 0;</div><div class='add'>+	bool is_ibt_enabled;</div><div class='ctx'> </div><div class='ctx'> 	if (!info-&gt;kprobe_multi.count)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -742,12 +786,14 @@ static void show_kprobe_multi_plain(struct bpf_link_info *info)</div><div class='ctx'> 	if (!dd.sym_count)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='add'>+	is_ibt_enabled = is_x86_ibt_enabled();</div><div class='ctx'> 	printf("\n\t%-16s %-16s %s", "addr", "cookie", "func [module]");</div><div class='ctx'> 	for (i = 0; i &lt; dd.sym_count; i++) {</div><div class='del'>-		if (dd.sym_mapping[i].address != data[j].addr)</div><div class='add'>+		if (!symbol_matches_target(dd.sym_mapping[i].address,</div><div class='add'>+					   data[j].addr, is_ibt_enabled))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		printf("\n\t%016lx %-16llx %s",</div><div class='del'>-		       dd.sym_mapping[i].address, data[j].cookie, dd.sym_mapping[i].name);</div><div class='add'>+		       (unsigned long)data[j].addr, data[j].cookie, dd.sym_mapping[i].name);</div><div class='ctx'> 		if (dd.sym_mapping[i].module[0] != '\0')</div><div class='ctx'> 			printf(" [%s]  ", dd.sym_mapping[i].module);</div><div class='ctx'> 		else</div><div class='head'>diff --git a/tools/bpf/bpftool/main.c b/tools/bpf/bpftool/main.c<br/>index 2b7f2bd3a7db..a829a6a49037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/main.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/main.c</a></div><div class='hunk'>@@ -33,6 +33,9 @@ bool relaxed_maps;</div><div class='ctx'> bool use_loader;</div><div class='ctx'> struct btf *base_btf;</div><div class='ctx'> struct hashmap *refs_table;</div><div class='add'>+bool sign_progs;</div><div class='add'>+const char *private_key_path;</div><div class='add'>+const char *cert_path;</div><div class='ctx'> </div><div class='ctx'> static void __noreturn clean_and_exit(int i)</div><div class='ctx'> {</div><div class='hunk'>@@ -61,7 +64,7 @@ static int do_help(int argc, char **argv)</div><div class='ctx'> 		"       %s batch file FILE\n"</div><div class='ctx'> 		"       %s version\n"</div><div class='ctx'> 		"\n"</div><div class='del'>-		"       OBJECT := { prog | map | link | cgroup | perf | net | feature | btf | gen | struct_ops | iter }\n"</div><div class='add'>+		"       OBJECT := { prog | map | link | cgroup | perf | net | feature | btf | gen | struct_ops | iter | token }\n"</div><div class='ctx'> 		"       " HELP_SPEC_OPTIONS " |\n"</div><div class='ctx'> 		"                    {-V|--version} }\n"</div><div class='ctx'> 		"",</div><div class='hunk'>@@ -87,6 +90,7 @@ static const struct cmd commands[] = {</div><div class='ctx'> 	{ "gen",	do_gen },</div><div class='ctx'> 	{ "struct_ops",	do_struct_ops },</div><div class='ctx'> 	{ "iter",	do_iter },</div><div class='add'>+	{ "token",	do_token },</div><div class='ctx'> 	{ "version",	do_version },</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='hunk'>@@ -447,6 +451,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 		{ "nomount",	no_argument,	NULL,	'n' },</div><div class='ctx'> 		{ "debug",	no_argument,	NULL,	'd' },</div><div class='ctx'> 		{ "use-loader",	no_argument,	NULL,	'L' },</div><div class='add'>+		{ "sign",	no_argument,	NULL,	'S' },</div><div class='ctx'> 		{ "base-btf",	required_argument, NULL, 'B' },</div><div class='ctx'> 		{ 0 }</div><div class='ctx'> 	};</div><div class='hunk'>@@ -473,7 +478,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 	bin_name = "bpftool";</div><div class='ctx'> </div><div class='ctx'> 	opterr = 0;</div><div class='del'>-	while ((opt = getopt_long(argc, argv, "VhpjfLmndB:l",</div><div class='add'>+	while ((opt = getopt_long(argc, argv, "VhpjfLmndSi:k:B:l",</div><div class='ctx'> 				  options, NULL)) &gt;= 0) {</div><div class='ctx'> 		switch (opt) {</div><div class='ctx'> 		case 'V':</div><div class='hunk'>@@ -519,6 +524,16 @@ int main(int argc, char **argv)</div><div class='ctx'> 		case 'L':</div><div class='ctx'> 			use_loader = true;</div><div class='ctx'> 			break;</div><div class='add'>+		case 'S':</div><div class='add'>+			sign_progs = true;</div><div class='add'>+			use_loader = true;</div><div class='add'>+			break;</div><div class='add'>+		case 'k':</div><div class='add'>+			private_key_path = optarg;</div><div class='add'>+			break;</div><div class='add'>+		case 'i':</div><div class='add'>+			cert_path = optarg;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			p_err("unrecognized option '%s'", argv[optind - 1]);</div><div class='ctx'> 			if (json_output)</div><div class='hunk'>@@ -533,6 +548,16 @@ int main(int argc, char **argv)</div><div class='ctx'> 	if (argc &lt; 0)</div><div class='ctx'> 		usage();</div><div class='ctx'> </div><div class='add'>+	if (sign_progs &amp;&amp; (private_key_path == NULL || cert_path == NULL)) {</div><div class='add'>+		p_err("-i &lt;identity_x509_cert&gt; and -k &lt;private_key&gt; must be supplied with -S for signing");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sign_progs &amp;&amp; (private_key_path != NULL || cert_path != NULL)) {</div><div class='add'>+		p_err("--sign (or -S) must be explicitly passed with -i &lt;identity_x509_cert&gt; and -k &lt;private_key&gt; to sign the programs");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (version_requested)</div><div class='ctx'> 		ret = do_version(argc, argv);</div><div class='ctx'> 	else</div><div class='head'>diff --git a/tools/bpf/bpftool/main.h b/tools/bpf/bpftool/main.h<br/>index 6db704fda5c0..1130299cede0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/main.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/main.h</a></div><div class='hunk'>@@ -6,9 +6,14 @@</div><div class='ctx'> </div><div class='ctx'> /* BFD and kernel.h both define GCC_VERSION, differently */</div><div class='ctx'> #undef GCC_VERSION</div><div class='add'>+#ifndef _GNU_SOURCE</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#endif</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;bpf/skel_internal.h&gt;</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -52,6 +57,7 @@ static inline void *u64_to_ptr(__u64 ptr)</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='ctx'> #define ERR_MAX_LEN	1024</div><div class='add'>+#define MAX_SIG_SIZE	4096</div><div class='ctx'> </div><div class='ctx'> #define BPF_TAG_FMT	"%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx%02hhx"</div><div class='ctx'> </div><div class='hunk'>@@ -85,6 +91,9 @@ extern bool relaxed_maps;</div><div class='ctx'> extern bool use_loader;</div><div class='ctx'> extern struct btf *base_btf;</div><div class='ctx'> extern struct hashmap *refs_table;</div><div class='add'>+extern bool sign_progs;</div><div class='add'>+extern const char *private_key_path;</div><div class='add'>+extern const char *cert_path;</div><div class='ctx'> </div><div class='ctx'> void __printf(1, 2) p_err(const char *fmt, ...);</div><div class='ctx'> void __printf(1, 2) p_info(const char *fmt, ...);</div><div class='hunk'>@@ -166,6 +175,7 @@ int do_tracelog(int argc, char **arg) __weak;</div><div class='ctx'> int do_feature(int argc, char **argv) __weak;</div><div class='ctx'> int do_struct_ops(int argc, char **argv) __weak;</div><div class='ctx'> int do_iter(int argc, char **argv) __weak;</div><div class='add'>+int do_token(int argc, char **argv) __weak;</div><div class='ctx'> </div><div class='ctx'> int parse_u32_arg(int *argc, char ***argv, __u32 *val, const char *what);</div><div class='ctx'> int prog_parse_fd(int *argc, char ***argv);</div><div class='hunk'>@@ -274,4 +284,15 @@ int pathname_concat(char *buf, int buf_sz, const char *path,</div><div class='ctx'> /* print netfilter bpf_link info */</div><div class='ctx'> void netfilter_dump_plain(const struct bpf_link_info *info);</div><div class='ctx'> void netfilter_dump_json(const struct bpf_link_info *info, json_writer_t *wtr);</div><div class='add'>+</div><div class='add'>+struct kernel_config_option {</div><div class='add'>+	const char *name;</div><div class='add'>+	bool macro_dump;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int read_kernel_config(const struct kernel_config_option *requested_options,</div><div class='add'>+		       size_t num_options, char **out_values,</div><div class='add'>+		       const char *define_prefix);</div><div class='add'>+int bpftool_prog_sign(struct bpf_load_and_run_opts *opts);</div><div class='add'>+__u32 register_session_key(const char *key_der_path);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/bpf/bpftool/map.c b/tools/bpf/bpftool/map.c<br/>index c9de44a45778..7ebf7dbcfba4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/map.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/map.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/map.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/map.c</a></div><div class='hunk'>@@ -1477,7 +1477,8 @@ static int do_help(int argc, char **argv)</div><div class='ctx'> 		"                 devmap | devmap_hash | sockmap | cpumap | xskmap | sockhash |\n"</div><div class='ctx'> 		"                 cgroup_storage | reuseport_sockarray | percpu_cgroup_storage |\n"</div><div class='ctx'> 		"                 queue | stack | sk_storage | struct_ops | ringbuf | inode_storage |\n"</div><div class='del'>-		"                 task_storage | bloom_filter | user_ringbuf | cgrp_storage | arena }\n"</div><div class='add'>+		"                 task_storage | bloom_filter | user_ringbuf | cgrp_storage | arena |\n"</div><div class='add'>+		"                 insn_array }\n"</div><div class='ctx'> 		"       " HELP_SPEC_OPTIONS " |\n"</div><div class='ctx'> 		"                    {-f|--bpffs} | {-n|--nomount} }\n"</div><div class='ctx'> 		"",</div><div class='head'>diff --git a/tools/bpf/bpftool/prog.c b/tools/bpf/bpftool/prog.c<br/>index 9722d841abc0..6daf19809ca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/prog.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/prog.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/prog.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/prog.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;linux/keyctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;bpf/bpf.h&gt;</div><div class='ctx'> #include &lt;bpf/btf.h&gt;</div><div class='hunk'>@@ -714,7 +715,7 @@ prog_dump(struct bpf_prog_info *info, enum dump_mode mode,</div><div class='ctx'> </div><div class='ctx'> 	if (mode == DUMP_JITED) {</div><div class='ctx'> 		if (info-&gt;jited_prog_len == 0 || !info-&gt;jited_prog_insns) {</div><div class='del'>-			p_info("no instructions returned");</div><div class='add'>+			p_err("error retrieving jit dump: no instructions returned or kernel.kptr_restrict set?");</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> 		buf = u64_to_ptr(info-&gt;jited_prog_insns);</div><div class='hunk'>@@ -1930,6 +1931,8 @@ static int try_loader(struct gen_loader_opts *gen)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_load_and_run_opts opts = {};</div><div class='ctx'> 	struct bpf_loader_ctx *ctx;</div><div class='add'>+	char sig_buf[MAX_SIG_SIZE];</div><div class='add'>+	__u8 prog_sha[SHA256_DIGEST_LENGTH];</div><div class='ctx'> 	int ctx_sz = sizeof(*ctx) + 64 * max(sizeof(struct bpf_map_desc),</div><div class='ctx'> 					     sizeof(struct bpf_prog_desc));</div><div class='ctx'> 	int log_buf_sz = (1u &lt;&lt; 24) - 1;</div><div class='hunk'>@@ -1953,6 +1956,26 @@ static int try_loader(struct gen_loader_opts *gen)</div><div class='ctx'> 	opts.insns = gen-&gt;insns;</div><div class='ctx'> 	opts.insns_sz = gen-&gt;insns_sz;</div><div class='ctx'> 	fds_before = count_open_fds();</div><div class='add'>+</div><div class='add'>+	if (sign_progs) {</div><div class='add'>+		opts.excl_prog_hash = prog_sha;</div><div class='add'>+		opts.excl_prog_hash_sz = sizeof(prog_sha);</div><div class='add'>+		opts.signature = sig_buf;</div><div class='add'>+		opts.signature_sz = MAX_SIG_SIZE;</div><div class='add'>+		opts.keyring_id = KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+</div><div class='add'>+		err = bpftool_prog_sign(&amp;opts);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			p_err("failed to sign program");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = register_session_key(cert_path);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			p_err("failed to add session key");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	err = bpf_load_and_run(&amp;opts);</div><div class='ctx'> 	fd_delta = count_open_fds() - fds_before;</div><div class='ctx'> 	if (err &lt; 0 || verifier_logs) {</div><div class='hunk'>@@ -1961,6 +1984,7 @@ static int try_loader(struct gen_loader_opts *gen)</div><div class='ctx'> 			fprintf(stderr, "loader prog leaked %d FDs\n",</div><div class='ctx'> 				fd_delta);</div><div class='ctx'> 	}</div><div class='add'>+out:</div><div class='ctx'> 	free(log_buf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1988,6 +2012,9 @@ static int do_loader(int argc, char **argv)</div><div class='ctx'> 		goto err_close_obj;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (sign_progs)</div><div class='add'>+		gen.gen_hash = true;</div><div class='add'>+</div><div class='ctx'> 	err = bpf_object__gen_loader(obj, &amp;gen);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_close_obj;</div><div class='hunk'>@@ -2262,7 +2289,7 @@ static void profile_print_readings(void)</div><div class='ctx'> </div><div class='ctx'> static char *profile_target_name(int tgt_fd)</div><div class='ctx'> {</div><div class='del'>-	struct bpf_func_info func_info;</div><div class='add'>+	struct bpf_func_info func_info = {};</div><div class='ctx'> 	struct bpf_prog_info info = {};</div><div class='ctx'> 	__u32 info_len = sizeof(info);</div><div class='ctx'> 	const struct btf_type *t;</div><div class='hunk'>@@ -2562,7 +2589,7 @@ static int do_help(int argc, char **argv)</div><div class='ctx'> 		"       METRIC := { cycles | instructions | l1d_loads | llc_misses | itlb_misses | dtlb_misses }\n"</div><div class='ctx'> 		"       " HELP_SPEC_OPTIONS " |\n"</div><div class='ctx'> 		"                    {-f|--bpffs} | {-m|--mapcompat} | {-n|--nomount} |\n"</div><div class='del'>-		"                    {-L|--use-loader} }\n"</div><div class='add'>+		"                    {-L|--use-loader} | [ {-S|--sign } {-k} &lt;private_key.pem&gt; {-i} &lt;certificate.x509&gt; ] \n"</div><div class='ctx'> 		"",</div><div class='ctx'> 		bin_name, argv[-2]);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/bpf/bpftool/sign.c b/tools/bpf/bpftool/sign.c<br/>new file mode 100644<br/>index 000000000000..f9b742f4bb10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/sign.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/sign.c</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Google LLC.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _GNU_SOURCE</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#endif</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;stdint.h&gt;</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;getopt.h&gt;</div><div class='add'>+#include &lt;err.h&gt;</div><div class='add'>+#include &lt;openssl/opensslv.h&gt;</div><div class='add'>+#include &lt;openssl/bio.h&gt;</div><div class='add'>+#include &lt;openssl/evp.h&gt;</div><div class='add'>+#include &lt;openssl/pem.h&gt;</div><div class='add'>+#include &lt;openssl/err.h&gt;</div><div class='add'>+#include &lt;openssl/cms.h&gt;</div><div class='add'>+#include &lt;linux/keyctl.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;bpf/skel_internal.h&gt;</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+#define OPEN_SSL_ERR_BUF_LEN 256</div><div class='add'>+</div><div class='add'>+/* Use deprecated in 3.0 ERR_get_error_line_data for openssl &lt; 3 */</div><div class='add'>+#if !defined(OPENSSL_VERSION_MAJOR) || (OPENSSL_VERSION_MAJOR &lt; 3)</div><div class='add'>+#define ERR_get_error_all(file, line, func, data, flags) \</div><div class='add'>+	ERR_get_error_line_data(file, line, data, flags)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void display_openssl_errors(int l)</div><div class='add'>+{</div><div class='add'>+	char buf[OPEN_SSL_ERR_BUF_LEN];</div><div class='add'>+	const char *file;</div><div class='add'>+	const char *data;</div><div class='add'>+	unsigned long e;</div><div class='add'>+	int flags;</div><div class='add'>+	int line;</div><div class='add'>+</div><div class='add'>+	while ((e = ERR_get_error_all(&amp;file, &amp;line, NULL, &amp;data, &amp;flags))) {</div><div class='add'>+		ERR_error_string_n(e, buf, sizeof(buf));</div><div class='add'>+		if (data &amp;&amp; (flags &amp; ERR_TXT_STRING)) {</div><div class='add'>+			p_err("OpenSSL %s: %s:%d: %s", buf, file, line, data);</div><div class='add'>+		} else {</div><div class='add'>+			p_err("OpenSSL %s: %s:%d", buf, file, line);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DISPLAY_OSSL_ERR(cond)				 \</div><div class='add'>+	do {						 \</div><div class='add'>+		bool __cond = (cond);			 \</div><div class='add'>+		if (__cond &amp;&amp; ERR_peek_error())		 \</div><div class='add'>+			display_openssl_errors(__LINE__);\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+static EVP_PKEY *read_private_key(const char *pkey_path)</div><div class='add'>+{</div><div class='add'>+	EVP_PKEY *private_key = NULL;</div><div class='add'>+	BIO *b;</div><div class='add'>+</div><div class='add'>+	b = BIO_new_file(pkey_path, "rb");</div><div class='add'>+	private_key = PEM_read_bio_PrivateKey(b, NULL, NULL, NULL);</div><div class='add'>+	BIO_free(b);</div><div class='add'>+	DISPLAY_OSSL_ERR(!private_key);</div><div class='add'>+	return private_key;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static X509 *read_x509(const char *x509_name)</div><div class='add'>+{</div><div class='add'>+	unsigned char buf[2];</div><div class='add'>+	X509 *x509 = NULL;</div><div class='add'>+	BIO *b;</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	b = BIO_new_file(x509_name, "rb");</div><div class='add'>+	if (!b)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* Look at the first two bytes of the file to determine the encoding */</div><div class='add'>+	n = BIO_read(b, buf, 2);</div><div class='add'>+	if (n != 2)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (BIO_reset(b) != 0)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (buf[0] == 0x30 &amp;&amp; buf[1] &gt;= 0x81 &amp;&amp; buf[1] &lt;= 0x84)</div><div class='add'>+		/* Assume raw DER encoded X.509 */</div><div class='add'>+		x509 = d2i_X509_bio(b, NULL);</div><div class='add'>+	else</div><div class='add'>+		/* Assume PEM encoded X.509 */</div><div class='add'>+		x509 = PEM_read_bio_X509(b, NULL, NULL, NULL);</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	BIO_free(b);</div><div class='add'>+	DISPLAY_OSSL_ERR(!x509);</div><div class='add'>+	return x509;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__u32 register_session_key(const char *key_der_path)</div><div class='add'>+{</div><div class='add'>+	unsigned char *der_buf = NULL;</div><div class='add'>+	X509 *x509 = NULL;</div><div class='add'>+	int key_id = -1;</div><div class='add'>+	int der_len;</div><div class='add'>+</div><div class='add'>+	if (!key_der_path)</div><div class='add'>+		return key_id;</div><div class='add'>+	x509 = read_x509(key_der_path);</div><div class='add'>+	if (!x509)</div><div class='add'>+		goto cleanup;</div><div class='add'>+	der_len = i2d_X509(x509, &amp;der_buf);</div><div class='add'>+	if (der_len &lt; 0)</div><div class='add'>+		goto cleanup;</div><div class='add'>+	key_id = syscall(__NR_add_key, "asymmetric", key_der_path, der_buf,</div><div class='add'>+			     (size_t)der_len, KEY_SPEC_SESSION_KEYRING);</div><div class='add'>+cleanup:</div><div class='add'>+	X509_free(x509);</div><div class='add'>+	OPENSSL_free(der_buf);</div><div class='add'>+	DISPLAY_OSSL_ERR(key_id == -1);</div><div class='add'>+	return key_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bpftool_prog_sign(struct bpf_load_and_run_opts *opts)</div><div class='add'>+{</div><div class='add'>+	BIO *bd_in = NULL, *bd_out = NULL;</div><div class='add'>+	EVP_PKEY *private_key = NULL;</div><div class='add'>+	CMS_ContentInfo *cms = NULL;</div><div class='add'>+	long actual_sig_len = 0;</div><div class='add'>+	X509 *x509 = NULL;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	bd_in = BIO_new_mem_buf(opts-&gt;insns, opts-&gt;insns_sz);</div><div class='add'>+	if (!bd_in) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	private_key = read_private_key(private_key_path);</div><div class='add'>+	if (!private_key) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	x509 = read_x509(cert_path);</div><div class='add'>+	if (!x509) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cms = CMS_sign(NULL, NULL, NULL, NULL,</div><div class='add'>+		       CMS_NOCERTS | CMS_PARTIAL | CMS_BINARY | CMS_DETACHED |</div><div class='add'>+			       CMS_STREAM);</div><div class='add'>+	if (!cms) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!CMS_add1_signer(cms, x509, private_key, EVP_sha256(),</div><div class='add'>+			     CMS_NOCERTS | CMS_BINARY | CMS_NOSMIMECAP |</div><div class='add'>+			     CMS_USE_KEYID | CMS_NOATTR)) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CMS_final(cms, bd_in, NULL, CMS_NOCERTS | CMS_BINARY) != 1) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	EVP_Digest(opts-&gt;insns, opts-&gt;insns_sz, opts-&gt;excl_prog_hash,</div><div class='add'>+		   &amp;opts-&gt;excl_prog_hash_sz, EVP_sha256(), NULL);</div><div class='add'>+</div><div class='add'>+		bd_out = BIO_new(BIO_s_mem());</div><div class='add'>+	if (!bd_out) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!i2d_CMS_bio_stream(bd_out, cms, NULL, 0)) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	actual_sig_len = BIO_get_mem_data(bd_out, NULL);</div><div class='add'>+	if (actual_sig_len &lt;= 0) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((size_t)actual_sig_len &gt; opts-&gt;signature_sz) {</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (BIO_read(bd_out, opts-&gt;signature, actual_sig_len) != actual_sig_len) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opts-&gt;signature_sz = actual_sig_len;</div><div class='add'>+cleanup:</div><div class='add'>+	BIO_free(bd_out);</div><div class='add'>+	CMS_ContentInfo_free(cms);</div><div class='add'>+	X509_free(x509);</div><div class='add'>+	EVP_PKEY_free(private_key);</div><div class='add'>+	BIO_free(bd_in);</div><div class='add'>+	DISPLAY_OSSL_ERR(err &lt; 0);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/bpf/bpftool/token.c b/tools/bpf/bpftool/token.c<br/>new file mode 100644<br/>index 000000000000..c08f34b9d51b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/token.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/token.c</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/* Copyright (C) 2025 Didi Technology Co., Tao Chen */</div><div class='add'>+</div><div class='add'>+#ifndef _GNU_SOURCE</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#endif</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;mntent.h&gt;</div><div class='add'>+#include &lt;sys/types.h&gt;</div><div class='add'>+#include &lt;sys/stat.h&gt;</div><div class='add'>+</div><div class='add'>+#include "json_writer.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+#define MOUNTS_FILE "/proc/mounts"</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	const char *header;</div><div class='add'>+	const char *key;</div><div class='add'>+} sets[] = {</div><div class='add'>+	{"allowed_cmds", "delegate_cmds"},</div><div class='add'>+	{"allowed_maps", "delegate_maps"},</div><div class='add'>+	{"allowed_progs", "delegate_progs"},</div><div class='add'>+	{"allowed_attachs", "delegate_attachs"},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool has_delegate_options(const char *mnt_ops)</div><div class='add'>+{</div><div class='add'>+	return strstr(mnt_ops, "delegate_cmds") ||</div><div class='add'>+	       strstr(mnt_ops, "delegate_maps") ||</div><div class='add'>+	       strstr(mnt_ops, "delegate_progs") ||</div><div class='add'>+	       strstr(mnt_ops, "delegate_attachs");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *get_delegate_value(char *opts, const char *key)</div><div class='add'>+{</div><div class='add'>+	char *token, *rest, *ret = NULL;</div><div class='add'>+</div><div class='add'>+	if (!opts)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (token = strtok_r(opts, ",", &amp;rest); token;</div><div class='add'>+			token = strtok_r(NULL, ",", &amp;rest)) {</div><div class='add'>+		if (strncmp(token, key, strlen(key)) == 0 &amp;&amp;</div><div class='add'>+		    token[strlen(key)] == '=') {</div><div class='add'>+			ret = token + strlen(key) + 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_items_per_line(char *input, int items_per_line)</div><div class='add'>+{</div><div class='add'>+	char *str, *rest;</div><div class='add'>+	int cnt = 0;</div><div class='add'>+</div><div class='add'>+	if (!input)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (str = strtok_r(input, ":", &amp;rest); str;</div><div class='add'>+			str = strtok_r(NULL, ":", &amp;rest)) {</div><div class='add'>+		if (cnt % items_per_line == 0)</div><div class='add'>+			printf("\n\t  ");</div><div class='add'>+</div><div class='add'>+		printf("%-20s", str);</div><div class='add'>+		cnt++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ITEMS_PER_LINE 4</div><div class='add'>+static void show_token_info_plain(struct mntent *mntent)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	printf("token_info  %s", mntent-&gt;mnt_dir);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sets); i++) {</div><div class='add'>+		char *opts, *value;</div><div class='add'>+</div><div class='add'>+		printf("\n\t%s:", sets[i].header);</div><div class='add'>+		opts = strdup(mntent-&gt;mnt_opts);</div><div class='add'>+		value = get_delegate_value(opts, sets[i].key);</div><div class='add'>+		print_items_per_line(value, ITEMS_PER_LINE);</div><div class='add'>+		free(opts);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	printf("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void split_json_array_str(char *input)</div><div class='add'>+{</div><div class='add'>+	char *str, *rest;</div><div class='add'>+</div><div class='add'>+	if (!input) {</div><div class='add'>+		jsonw_start_array(json_wtr);</div><div class='add'>+		jsonw_end_array(json_wtr);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_start_array(json_wtr);</div><div class='add'>+	for (str = strtok_r(input, ":", &amp;rest); str;</div><div class='add'>+			str = strtok_r(NULL, ":", &amp;rest)) {</div><div class='add'>+		jsonw_string(json_wtr, str);</div><div class='add'>+	}</div><div class='add'>+	jsonw_end_array(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void show_token_info_json(struct mntent *mntent)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	jsonw_start_object(json_wtr);</div><div class='add'>+	jsonw_string_field(json_wtr, "token_info", mntent-&gt;mnt_dir);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sets); i++) {</div><div class='add'>+		char *opts, *value;</div><div class='add'>+</div><div class='add'>+		jsonw_name(json_wtr, sets[i].header);</div><div class='add'>+		opts = strdup(mntent-&gt;mnt_opts);</div><div class='add'>+		value = get_delegate_value(opts, sets[i].key);</div><div class='add'>+		split_json_array_str(value);</div><div class='add'>+		free(opts);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_end_object(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __show_token_info(struct mntent *mntent)</div><div class='add'>+{</div><div class='add'>+	if (json_output)</div><div class='add'>+		show_token_info_json(mntent);</div><div class='add'>+	else</div><div class='add'>+		show_token_info_plain(mntent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int show_token_info(void)</div><div class='add'>+{</div><div class='add'>+	FILE *fp;</div><div class='add'>+	struct mntent *ent;</div><div class='add'>+</div><div class='add'>+	fp = setmntent(MOUNTS_FILE, "r");</div><div class='add'>+	if (!fp) {</div><div class='add'>+		p_err("Failed to open: %s", MOUNTS_FILE);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_start_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	while ((ent = getmntent(fp)) != NULL) {</div><div class='add'>+		if (strncmp(ent-&gt;mnt_type, "bpf", 3) == 0) {</div><div class='add'>+			if (has_delegate_options(ent-&gt;mnt_opts))</div><div class='add'>+				__show_token_info(ent);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_end_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	endmntent(fp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_show(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	if (argc)</div><div class='add'>+		return BAD_ARG();</div><div class='add'>+</div><div class='add'>+	return show_token_info();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_help(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_null(json_wtr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stderr,</div><div class='add'>+		"Usage: %1$s %2$s { show | list }\n"</div><div class='add'>+		"       %1$s %2$s help\n"</div><div class='add'>+		"       " HELP_SPEC_OPTIONS " }\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"",</div><div class='add'>+		bin_name, argv[-2]);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cmd cmds[] = {</div><div class='add'>+	{ "show",	do_show },</div><div class='add'>+	{ "list",	do_show },</div><div class='add'>+	{ "help",	do_help },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int do_token(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	return cmd_select(cmds, argc, argv, do_help);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/bpf/bpftool/tracelog.c b/tools/bpf/bpftool/tracelog.c<br/>index 31d806e3bdaa..573a8d99f009 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/tracelog.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/bpftool/tracelog.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/bpf/bpftool/tracelog.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/bpf/bpftool/tracelog.c</a></div><div class='hunk'>@@ -57,10 +57,8 @@ find_tracefs_mnt_single(unsigned long magic, char *mnt, const char *mntpt)</div><div class='ctx'> static bool get_tracefs_pipe(char *mnt)</div><div class='ctx'> {</div><div class='ctx'> 	static const char * const known_mnts[] = {</div><div class='del'>-		"/sys/kernel/debug/tracing",</div><div class='ctx'> 		"/sys/kernel/tracing",</div><div class='del'>-		"/tracing",</div><div class='del'>-		"/trace",</div><div class='add'>+		"/sys/kernel/debug/tracing",</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *pipe_name = "/trace_pipe";</div><div class='ctx'> 	const char *fstype = "tracefs";</div><div class='hunk'>@@ -95,12 +93,7 @@ static bool get_tracefs_pipe(char *mnt)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	p_info("could not find tracefs, attempting to mount it now");</div><div class='del'>-	/* Most of the time, tracefs is automatically mounted by debugfs at</div><div class='del'>-	 * /sys/kernel/debug/tracing when we try to access it. If we could not</div><div class='del'>-	 * find it, it is likely that debugfs is not mounted. Let's give one</div><div class='del'>-	 * attempt at mounting just tracefs at /sys/kernel/tracing.</div><div class='del'>-	 */</div><div class='del'>-	strcpy(mnt, known_mnts[1]);</div><div class='add'>+	strcpy(mnt, known_mnts[0]);</div><div class='ctx'> 	if (mount_tracefs(mnt))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/bpf/runqslower/Makefile b/tools/bpf/runqslower/Makefile<br/>deleted file mode 100644<br/>index 78a436c4072e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/runqslower/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,91 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='del'>-include ../../scripts/Makefile.include</div><div class='del'>-</div><div class='del'>-OUTPUT ?= $(abspath .output)/</div><div class='del'>-</div><div class='del'>-BPFTOOL_OUTPUT := $(OUTPUT)bpftool/</div><div class='del'>-DEFAULT_BPFTOOL := $(BPFTOOL_OUTPUT)bootstrap/bpftool</div><div class='del'>-BPFTOOL ?= $(DEFAULT_BPFTOOL)</div><div class='del'>-BPF_TARGET_ENDIAN ?= --target=bpf</div><div class='del'>-LIBBPF_SRC := $(abspath ../../lib/bpf)</div><div class='del'>-BPFOBJ_OUTPUT := $(OUTPUT)libbpf/</div><div class='del'>-BPFOBJ := $(BPFOBJ_OUTPUT)libbpf.a</div><div class='del'>-BPF_DESTDIR := $(BPFOBJ_OUTPUT)</div><div class='del'>-BPF_INCLUDE := $(BPF_DESTDIR)/include</div><div class='del'>-INCLUDES := -I$(OUTPUT) -I$(BPF_INCLUDE) -I$(abspath ../../include/uapi)</div><div class='del'>-CFLAGS := -g -Wall $(CLANG_CROSS_FLAGS)</div><div class='del'>-CFLAGS += $(EXTRA_CFLAGS)</div><div class='del'>-LDFLAGS += $(EXTRA_LDFLAGS)</div><div class='del'>-LDLIBS += -lelf -lz</div><div class='del'>-</div><div class='del'>-# Try to detect best kernel BTF source</div><div class='del'>-KERNEL_REL := $(shell uname -r)</div><div class='del'>-VMLINUX_BTF_PATHS := $(if $(O),$(O)/vmlinux)		\</div><div class='del'>-	$(if $(KBUILD_OUTPUT),$(KBUILD_OUTPUT)/vmlinux) \</div><div class='del'>-	../../../vmlinux /sys/kernel/btf/vmlinux	\</div><div class='del'>-	/boot/vmlinux-$(KERNEL_REL)</div><div class='del'>-VMLINUX_BTF_PATH := $(or $(VMLINUX_BTF),$(firstword			       \</div><div class='del'>-					  $(wildcard $(VMLINUX_BTF_PATHS))))</div><div class='del'>-</div><div class='del'>-ifneq ($(V),1)</div><div class='del'>-MAKEFLAGS += --no-print-directory</div><div class='del'>-submake_extras := feature_display=0</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-.DELETE_ON_ERROR:</div><div class='del'>-</div><div class='del'>-.PHONY: all clean runqslower libbpf_hdrs</div><div class='del'>-all: runqslower</div><div class='del'>-</div><div class='del'>-runqslower: $(OUTPUT)/runqslower</div><div class='del'>-</div><div class='del'>-clean:</div><div class='del'>-	$(call QUIET_CLEAN, runqslower)</div><div class='del'>-	$(Q)$(RM) -r $(BPFOBJ_OUTPUT) $(BPFTOOL_OUTPUT)</div><div class='del'>-	$(Q)$(RM) $(OUTPUT)*.o $(OUTPUT)*.d</div><div class='del'>-	$(Q)$(RM) $(OUTPUT)*.skel.h $(OUTPUT)vmlinux.h</div><div class='del'>-	$(Q)$(RM) $(OUTPUT)runqslower</div><div class='del'>-	$(Q)$(RM) -r .output</div><div class='del'>-</div><div class='del'>-libbpf_hdrs: $(BPFOBJ)</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/runqslower: $(OUTPUT)/runqslower.o $(BPFOBJ)</div><div class='del'>-	$(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $@</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/runqslower.o: runqslower.h $(OUTPUT)/runqslower.skel.h	      \</div><div class='del'>-			$(OUTPUT)/runqslower.bpf.o | libbpf_hdrs</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/runqslower.bpf.o: $(OUTPUT)/vmlinux.h runqslower.h | libbpf_hdrs</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/%.skel.h: $(OUTPUT)/%.bpf.o | $(BPFTOOL)</div><div class='del'>-	$(QUIET_GEN)$(BPFTOOL) gen skeleton $&lt; &gt; $@</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/%.bpf.o: %.bpf.c $(BPFOBJ) | $(OUTPUT)</div><div class='del'>-	$(QUIET_GEN)$(CLANG) -g -O2 $(BPF_TARGET_ENDIAN) $(INCLUDES)	      \</div><div class='del'>-		 -c $(filter %.c,$^) -o $@ &amp;&amp;				      \</div><div class='del'>-	$(LLVM_STRIP) -g $@</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/%.o: %.c | $(OUTPUT)</div><div class='del'>-	$(QUIET_CC)$(CC) $(CFLAGS) $(INCLUDES) -c $(filter %.c,$^) -o $@</div><div class='del'>-</div><div class='del'>-$(OUTPUT) $(BPFOBJ_OUTPUT) $(BPFTOOL_OUTPUT):</div><div class='del'>-	$(QUIET_MKDIR)mkdir -p $@</div><div class='del'>-</div><div class='del'>-$(OUTPUT)/vmlinux.h: $(VMLINUX_BTF_PATH) | $(OUTPUT) $(BPFTOOL)</div><div class='del'>-ifeq ($(VMLINUX_H),)</div><div class='del'>-	$(Q)if [ ! -e "$(VMLINUX_BTF_PATH)" ] ; then \</div><div class='del'>-		echo "Couldn't find kernel BTF; set VMLINUX_BTF to"	       \</div><div class='del'>-			"specify its location." &gt;&amp;2;			       \</div><div class='del'>-		exit 1;\</div><div class='del'>-	fi</div><div class='del'>-	$(QUIET_GEN)$(BPFTOOL) btf dump file $(VMLINUX_BTF_PATH) format c &gt; $@</div><div class='del'>-else</div><div class='del'>-	$(Q)cp "$(VMLINUX_H)" $@</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-$(BPFOBJ): $(wildcard $(LIBBPF_SRC)/*.[ch] $(LIBBPF_SRC)/Makefile) | $(BPFOBJ_OUTPUT)</div><div class='del'>-	$(Q)$(MAKE) $(submake_extras) -C $(LIBBPF_SRC) OUTPUT=$(BPFOBJ_OUTPUT) \</div><div class='del'>-		    DESTDIR=$(BPFOBJ_OUTPUT) prefix= $(abspath $@) install_headers</div><div class='del'>-</div><div class='del'>-$(DEFAULT_BPFTOOL): | $(BPFTOOL_OUTPUT)</div><div class='del'>-	$(Q)$(MAKE) $(submake_extras) -C ../bpftool OUTPUT=$(BPFTOOL_OUTPUT) bootstrap</div><div class='head'>diff --git a/tools/bpf/runqslower/runqslower.bpf.c b/tools/bpf/runqslower/runqslower.bpf.c<br/>deleted file mode 100644<br/>index fced54a3adf6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/runqslower/runqslower.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.bpf.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,106 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-// Copyright (c) 2019 Facebook</div><div class='del'>-#include "vmlinux.h"</div><div class='del'>-#include &lt;bpf/bpf_helpers.h&gt;</div><div class='del'>-#include "runqslower.h"</div><div class='del'>-</div><div class='del'>-#define TASK_RUNNING 0</div><div class='del'>-#define BPF_F_CURRENT_CPU 0xffffffffULL</div><div class='del'>-</div><div class='del'>-const volatile __u64 min_us = 0;</div><div class='del'>-const volatile pid_t targ_pid = 0;</div><div class='del'>-</div><div class='del'>-struct {</div><div class='del'>-	__uint(type, BPF_MAP_TYPE_TASK_STORAGE);</div><div class='del'>-	__uint(map_flags, BPF_F_NO_PREALLOC);</div><div class='del'>-	__type(key, int);</div><div class='del'>-	__type(value, u64);</div><div class='del'>-} start SEC(".maps");</div><div class='del'>-</div><div class='del'>-struct {</div><div class='del'>-	__uint(type, BPF_MAP_TYPE_PERF_EVENT_ARRAY);</div><div class='del'>-	__uint(key_size, sizeof(u32));</div><div class='del'>-	__uint(value_size, sizeof(u32));</div><div class='del'>-} events SEC(".maps");</div><div class='del'>-</div><div class='del'>-/* record enqueue timestamp */</div><div class='del'>-__always_inline</div><div class='del'>-static int trace_enqueue(struct task_struct *t)</div><div class='del'>-{</div><div class='del'>-	u32 pid = t-&gt;pid;</div><div class='del'>-	u64 *ptr;</div><div class='del'>-</div><div class='del'>-	if (!pid || (targ_pid &amp;&amp; targ_pid != pid))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ptr = bpf_task_storage_get(&amp;start, t, 0,</div><div class='del'>-				   BPF_LOCAL_STORAGE_GET_F_CREATE);</div><div class='del'>-	if (!ptr)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	*ptr = bpf_ktime_get_ns();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SEC("tp_btf/sched_wakeup")</div><div class='del'>-int handle__sched_wakeup(u64 *ctx)</div><div class='del'>-{</div><div class='del'>-	/* TP_PROTO(struct task_struct *p) */</div><div class='del'>-	struct task_struct *p = (void *)ctx[0];</div><div class='del'>-</div><div class='del'>-	return trace_enqueue(p);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SEC("tp_btf/sched_wakeup_new")</div><div class='del'>-int handle__sched_wakeup_new(u64 *ctx)</div><div class='del'>-{</div><div class='del'>-	/* TP_PROTO(struct task_struct *p) */</div><div class='del'>-	struct task_struct *p = (void *)ctx[0];</div><div class='del'>-</div><div class='del'>-	return trace_enqueue(p);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SEC("tp_btf/sched_switch")</div><div class='del'>-int handle__sched_switch(u64 *ctx)</div><div class='del'>-{</div><div class='del'>-	/* TP_PROTO(bool preempt, struct task_struct *prev,</div><div class='del'>-	 *	    struct task_struct *next)</div><div class='del'>-	 */</div><div class='del'>-	struct task_struct *prev = (struct task_struct *)ctx[1];</div><div class='del'>-	struct task_struct *next = (struct task_struct *)ctx[2];</div><div class='del'>-	struct runq_event event = {};</div><div class='del'>-	u64 *tsp, delta_us;</div><div class='del'>-	u32 pid;</div><div class='del'>-</div><div class='del'>-	/* ivcsw: treat like an enqueue event and store timestamp */</div><div class='del'>-	if (prev-&gt;__state == TASK_RUNNING)</div><div class='del'>-		trace_enqueue(prev);</div><div class='del'>-</div><div class='del'>-	pid = next-&gt;pid;</div><div class='del'>-</div><div class='del'>-	/* For pid mismatch, save a bpf_task_storage_get */</div><div class='del'>-	if (!pid || (targ_pid &amp;&amp; targ_pid != pid))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* fetch timestamp and calculate delta */</div><div class='del'>-	tsp = bpf_task_storage_get(&amp;start, next, 0, 0);</div><div class='del'>-	if (!tsp)</div><div class='del'>-		return 0;   /* missed enqueue */</div><div class='del'>-</div><div class='del'>-	delta_us = (bpf_ktime_get_ns() - *tsp) / 1000;</div><div class='del'>-	if (min_us &amp;&amp; delta_us &lt;= min_us)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	event.pid = pid;</div><div class='del'>-	event.delta_us = delta_us;</div><div class='del'>-	bpf_get_current_comm(&amp;event.task, sizeof(event.task));</div><div class='del'>-</div><div class='del'>-	/* output */</div><div class='del'>-	bpf_perf_event_output(ctx, &amp;events, BPF_F_CURRENT_CPU,</div><div class='del'>-			      &amp;event, sizeof(event));</div><div class='del'>-</div><div class='del'>-	bpf_task_storage_delete(&amp;start, next);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-char LICENSE[] SEC("license") = "GPL";</div><div class='head'>diff --git a/tools/bpf/runqslower/runqslower.c b/tools/bpf/runqslower/runqslower.c<br/>deleted file mode 100644<br/>index 83c5993a139a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/runqslower/runqslower.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,171 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='del'>-// Copyright (c) 2019 Facebook</div><div class='del'>-#include &lt;argp.h&gt;</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-#include &lt;time.h&gt;</div><div class='del'>-#include &lt;bpf/libbpf.h&gt;</div><div class='del'>-#include &lt;bpf/bpf.h&gt;</div><div class='del'>-#include "runqslower.h"</div><div class='del'>-#include "runqslower.skel.h"</div><div class='del'>-</div><div class='del'>-struct env {</div><div class='del'>-	pid_t pid;</div><div class='del'>-	__u64 min_us;</div><div class='del'>-	bool verbose;</div><div class='del'>-} env = {</div><div class='del'>-	.min_us = 10000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const char *argp_program_version = "runqslower 0.1";</div><div class='del'>-const char *argp_program_bug_address = "&lt;bpf@vger.kernel.org&gt;";</div><div class='del'>-const char argp_program_doc[] =</div><div class='del'>-"runqslower    Trace long process scheduling delays.\n"</div><div class='del'>-"              For Linux, uses eBPF, BPF CO-RE, libbpf, BTF.\n"</div><div class='del'>-"\n"</div><div class='del'>-"This script traces high scheduling delays between tasks being\n"</div><div class='del'>-"ready to run and them running on CPU after that.\n"</div><div class='del'>-"\n"</div><div class='del'>-"USAGE: runqslower [-p PID] [min_us]\n"</div><div class='del'>-"\n"</div><div class='del'>-"EXAMPLES:\n"</div><div class='del'>-"    runqslower         # trace run queue latency higher than 10000 us (default)\n"</div><div class='del'>-"    runqslower 1000    # trace run queue latency higher than 1000 us\n"</div><div class='del'>-"    runqslower -p 123  # trace pid 123 only\n";</div><div class='del'>-</div><div class='del'>-static const struct argp_option opts[] = {</div><div class='del'>-	{ "pid", 'p', "PID", 0, "Process PID to trace"},</div><div class='del'>-	{ "verbose", 'v', NULL, 0, "Verbose debug output" },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static error_t parse_arg(int key, char *arg, struct argp_state *state)</div><div class='del'>-{</div><div class='del'>-	static int pos_args;</div><div class='del'>-	int pid;</div><div class='del'>-	long long min_us;</div><div class='del'>-</div><div class='del'>-	switch (key) {</div><div class='del'>-	case 'v':</div><div class='del'>-		env.verbose = true;</div><div class='del'>-		break;</div><div class='del'>-	case 'p':</div><div class='del'>-		errno = 0;</div><div class='del'>-		pid = strtol(arg, NULL, 10);</div><div class='del'>-		if (errno || pid &lt;= 0) {</div><div class='del'>-			fprintf(stderr, "Invalid PID: %s\n", arg);</div><div class='del'>-			argp_usage(state);</div><div class='del'>-		}</div><div class='del'>-		env.pid = pid;</div><div class='del'>-		break;</div><div class='del'>-	case ARGP_KEY_ARG:</div><div class='del'>-		if (pos_args++) {</div><div class='del'>-			fprintf(stderr,</div><div class='del'>-				"Unrecognized positional argument: %s\n", arg);</div><div class='del'>-			argp_usage(state);</div><div class='del'>-		}</div><div class='del'>-		errno = 0;</div><div class='del'>-		min_us = strtoll(arg, NULL, 10);</div><div class='del'>-		if (errno || min_us &lt;= 0) {</div><div class='del'>-			fprintf(stderr, "Invalid delay (in us): %s\n", arg);</div><div class='del'>-			argp_usage(state);</div><div class='del'>-		}</div><div class='del'>-		env.min_us = min_us;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return ARGP_ERR_UNKNOWN;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int libbpf_print_fn(enum libbpf_print_level level,</div><div class='del'>-		    const char *format, va_list args)</div><div class='del'>-{</div><div class='del'>-	if (level == LIBBPF_DEBUG &amp;&amp; !env.verbose)</div><div class='del'>-		return 0;</div><div class='del'>-	return vfprintf(stderr, format, args);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void handle_event(void *ctx, int cpu, void *data, __u32 data_sz)</div><div class='del'>-{</div><div class='del'>-	const struct runq_event *e = data;</div><div class='del'>-	struct tm *tm;</div><div class='del'>-	char ts[32];</div><div class='del'>-	time_t t;</div><div class='del'>-</div><div class='del'>-	time(&amp;t);</div><div class='del'>-	tm = localtime(&amp;t);</div><div class='del'>-	strftime(ts, sizeof(ts), "%H:%M:%S", tm);</div><div class='del'>-	printf("%-8s %-16s %-6d %14llu\n", ts, e-&gt;task, e-&gt;pid, e-&gt;delta_us);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void handle_lost_events(void *ctx, int cpu, __u64 lost_cnt)</div><div class='del'>-{</div><div class='del'>-	printf("Lost %llu events on CPU #%d!\n", lost_cnt, cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int main(int argc, char **argv)</div><div class='del'>-{</div><div class='del'>-	static const struct argp argp = {</div><div class='del'>-		.options = opts,</div><div class='del'>-		.parser = parse_arg,</div><div class='del'>-		.doc = argp_program_doc,</div><div class='del'>-	};</div><div class='del'>-	struct perf_buffer *pb = NULL;</div><div class='del'>-	struct runqslower_bpf *obj;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = argp_parse(&amp;argp, argc, argv, 0, NULL, NULL);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	libbpf_set_print(libbpf_print_fn);</div><div class='del'>-</div><div class='del'>-	/* Use libbpf 1.0 API mode */</div><div class='del'>-	libbpf_set_strict_mode(LIBBPF_STRICT_ALL);</div><div class='del'>-</div><div class='del'>-	obj = runqslower_bpf__open();</div><div class='del'>-	if (!obj) {</div><div class='del'>-		fprintf(stderr, "failed to open and/or load BPF object\n");</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* initialize global data (filtering options) */</div><div class='del'>-	obj-&gt;rodata-&gt;targ_pid = env.pid;</div><div class='del'>-	obj-&gt;rodata-&gt;min_us = env.min_us;</div><div class='del'>-</div><div class='del'>-	err = runqslower_bpf__load(obj);</div><div class='del'>-	if (err) {</div><div class='del'>-		fprintf(stderr, "failed to load BPF object: %d\n", err);</div><div class='del'>-		goto cleanup;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = runqslower_bpf__attach(obj);</div><div class='del'>-	if (err) {</div><div class='del'>-		fprintf(stderr, "failed to attach BPF programs\n");</div><div class='del'>-		goto cleanup;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printf("Tracing run queue latency higher than %llu us\n", env.min_us);</div><div class='del'>-	printf("%-8s %-16s %-6s %14s\n", "TIME", "COMM", "PID", "LAT(us)");</div><div class='del'>-</div><div class='del'>-	pb = perf_buffer__new(bpf_map__fd(obj-&gt;maps.events), 64,</div><div class='del'>-			      handle_event, handle_lost_events, NULL, NULL);</div><div class='del'>-	err = libbpf_get_error(pb);</div><div class='del'>-	if (err) {</div><div class='del'>-		pb = NULL;</div><div class='del'>-		fprintf(stderr, "failed to open perf buffer: %d\n", err);</div><div class='del'>-		goto cleanup;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while ((err = perf_buffer__poll(pb, 100)) &gt;= 0)</div><div class='del'>-		;</div><div class='del'>-	printf("Error polling perf buffer: %d\n", err);</div><div class='del'>-</div><div class='del'>-cleanup:</div><div class='del'>-	perf_buffer__free(pb);</div><div class='del'>-	runqslower_bpf__destroy(obj);</div><div class='del'>-</div><div class='del'>-	return err != 0;</div><div class='del'>-}</div><div class='head'>diff --git a/tools/bpf/runqslower/runqslower.h b/tools/bpf/runqslower/runqslower.h<br/>deleted file mode 100644<br/>index 4f70f07200c2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/bpf/runqslower/runqslower.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/bpf/runqslower/runqslower.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */</div><div class='del'>-#ifndef __RUNQSLOWER_H</div><div class='del'>-#define __RUNQSLOWER_H</div><div class='del'>-</div><div class='del'>-#define TASK_COMM_LEN 16</div><div class='del'>-</div><div class='del'>-struct runq_event {</div><div class='del'>-	char task[TASK_COMM_LEN];</div><div class='del'>-	__u64 delta_us;</div><div class='del'>-	pid_t pid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif /* __RUNQSLOWER_H */</div><div class='head'>diff --git a/tools/build/Build b/tools/build/Build<br/>new file mode 100644<br/>index 000000000000..1c7e598e9f59<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/build/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/build/Build</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+hostprogs	:= fixdep</div><div class='add'>+fixdep-y	:= fixdep.o</div><div class='head'>diff --git a/tools/build/Makefile b/tools/build/Makefile<br/>index 63ef21878761..3a5a3808ab2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/build/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/build/Makefile</a></div><div class='hunk'>@@ -37,5 +37,22 @@ ifneq ($(wildcard $(TMP_O)),)</div><div class='ctx'> 	$(Q)$(MAKE) -C feature OUTPUT=$(TMP_O) clean &gt;/dev/null</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)fixdep: $(srctree)/tools/build/fixdep.c</div><div class='del'>-	$(QUIET_CC)$(HOSTCC) $(KBUILD_HOSTCFLAGS) $(KBUILD_HOSTLDFLAGS) -o $@ $&lt;</div><div class='add'>+FIXDEP		:= $(OUTPUT)fixdep</div><div class='add'>+FIXDEP_IN	:= $(OUTPUT)fixdep-in.o</div><div class='add'>+</div><div class='add'>+# To track fixdep's dependencies properly, fixdep needs to run on itself.</div><div class='add'>+# Build it twice the first time.</div><div class='add'>+$(FIXDEP_IN): FORCE</div><div class='add'>+	$(Q)if [ ! -f $(FIXDEP) ]; then						\</div><div class='add'>+		$(MAKE) $(build)=fixdep HOSTCFLAGS="$(KBUILD_HOSTCFLAGS)";	\</div><div class='add'>+		rm -f $(FIXDEP).o;						\</div><div class='add'>+	fi</div><div class='add'>+	$(Q)$(MAKE) $(build)=fixdep HOSTCFLAGS="$(KBUILD_HOSTCFLAGS)"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+$(FIXDEP): $(FIXDEP_IN)</div><div class='add'>+	$(QUIET_LINK)$(HOSTCC) $(FIXDEP_IN) $(KBUILD_HOSTLDFLAGS) -o $@</div><div class='add'>+</div><div class='add'>+FORCE:</div><div class='add'>+</div><div class='add'>+.PHONY: FORCE</div><div class='head'>diff --git a/tools/build/Makefile.feature b/tools/build/Makefile.feature<br/>index 649c5ab8e8f2..a7f030fc5e83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/Makefile.feature?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/Makefile.feature</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/build/Makefile.feature?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/build/Makefile.feature</a></div><div class='hunk'>@@ -68,7 +68,6 @@ FEATURE_TESTS_BASIC :=                  \</div><div class='ctx'>         libdw                           \</div><div class='ctx'>         eventfd                         \</div><div class='ctx'>         fortify-source                  \</div><div class='del'>-        get_current_dir_name            \</div><div class='ctx'>         gettid				\</div><div class='ctx'>         glibc                           \</div><div class='ctx'>         libbfd                          \</div><div class='hunk'>@@ -80,11 +79,9 @@ FEATURE_TESTS_BASIC :=                  \</div><div class='ctx'>         libelf-zstd                     \</div><div class='ctx'>         libnuma                         \</div><div class='ctx'>         numa_num_possible_cpus          \</div><div class='del'>-        libperl                         \</div><div class='ctx'>         libpython                       \</div><div class='ctx'>         libslang                        \</div><div class='ctx'>         libtraceevent                   \</div><div class='del'>-        libtracefs                      \</div><div class='ctx'>         libcpupower                     \</div><div class='ctx'>         pthread-attr-setaffinity-np     \</div><div class='ctx'>         pthread-barrier     		\</div><div class='hunk'>@@ -93,7 +90,6 @@ FEATURE_TESTS_BASIC :=                  \</div><div class='ctx'>         timerfd                         \</div><div class='ctx'>         zlib                            \</div><div class='ctx'>         lzma                            \</div><div class='del'>-        get_cpuid                       \</div><div class='ctx'>         bpf                             \</div><div class='ctx'>         scandirat			\</div><div class='ctx'>         sched_getcpu			\</div><div class='hunk'>@@ -121,11 +117,11 @@ FEATURE_TESTS_EXTRA :=                  \</div><div class='ctx'>          libbfd-liberty                 \</div><div class='ctx'>          libbfd-liberty-z               \</div><div class='ctx'>          libopencsd                     \</div><div class='add'>+         libperl                        \</div><div class='ctx'>          cxx                            \</div><div class='ctx'>          llvm                           \</div><div class='ctx'>          clang                          \</div><div class='ctx'>          libbpf                         \</div><div class='del'>-         libbpf-strings                 \</div><div class='ctx'>          libpfm4                        \</div><div class='ctx'>          libdebuginfod			\</div><div class='ctx'>          clang-bpf-co-re		\</div><div class='hunk'>@@ -144,13 +140,11 @@ FEATURE_DISPLAY ?=              \</div><div class='ctx'>          libelf                 \</div><div class='ctx'>          libnuma                \</div><div class='ctx'>          numa_num_possible_cpus \</div><div class='del'>-         libperl                \</div><div class='ctx'>          libpython              \</div><div class='ctx'>          libcapstone            \</div><div class='ctx'>          llvm-perf              \</div><div class='ctx'>          zlib                   \</div><div class='ctx'>          lzma                   \</div><div class='del'>-         get_cpuid              \</div><div class='ctx'>          bpf			\</div><div class='ctx'>          libaio			\</div><div class='ctx'>          libzstd</div><div class='hunk'>@@ -319,5 +313,7 @@ endef</div><div class='ctx'> </div><div class='ctx'> ifeq ($(FEATURE_DISPLAY_DEFERRED),)</div><div class='ctx'>   $(call feature_display_entries)</div><div class='del'>-  $(info )</div><div class='add'>+  ifeq ($(feature_display),1)</div><div class='add'>+    $(info )</div><div class='add'>+  endif</div><div class='ctx'> endif</div><div class='head'>diff --git a/tools/build/feature/Makefile b/tools/build/feature/Makefile<br/>index b41a42818d8a..87a5a908d6fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/build/feature/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/build/feature/Makefile</a></div><div class='hunk'>@@ -8,7 +8,6 @@ FILES=                                          \</div><div class='ctx'>          test-libdw.bin                         \</div><div class='ctx'>          test-eventfd.bin                       \</div><div class='ctx'>          test-fortify-source.bin                \</div><div class='del'>-         test-get_current_dir_name.bin          \</div><div class='ctx'>          test-glibc.bin                         \</div><div class='ctx'>          test-gtk2.bin                          \</div><div class='ctx'>          test-gtk2-infobar.bin                  \</div><div class='hunk'>@@ -34,7 +33,6 @@ FILES=                                          \</div><div class='ctx'>          test-libperl.bin                       \</div><div class='ctx'>          test-libpython.bin                     \</div><div class='ctx'>          test-libslang.bin                      \</div><div class='del'>-         test-libslang-include-subdir.bin       \</div><div class='ctx'>          test-libtraceevent.bin                 \</div><div class='ctx'>          test-libcpupower.bin                   \</div><div class='ctx'>          test-libtracefs.bin                    \</div><div class='hunk'>@@ -58,8 +56,6 @@ FILES=                                          \</div><div class='ctx'>          test-lzma.bin                          \</div><div class='ctx'>          test-bpf.bin                           \</div><div class='ctx'>          test-libbpf.bin                        \</div><div class='del'>-         test-libbpf-strings.bin                \</div><div class='del'>-         test-get_cpuid.bin                     \</div><div class='ctx'>          test-sdt.bin                           \</div><div class='ctx'>          test-cxx.bin                           \</div><div class='ctx'>          test-gettid.bin			\</div><div class='hunk'>@@ -94,7 +90,7 @@ else</div><div class='ctx'>   # paths are used instead.</div><div class='ctx'>   ifdef CROSS_COMPILE</div><div class='ctx'>     ifeq ($(PKG_CONFIG_LIBDIR)$(PKG_CONFIG_PATH)$(PKG_CONFIG_SYSROOT_DIR),)</div><div class='del'>-      CROSS_ARCH = $(shell $(CC) -dumpmachine)</div><div class='add'>+      CROSS_ARCH = $(notdir $(CROSS_COMPILE:%-=%))</div><div class='ctx'>       PKG_CONFIG_LIBDIR := /usr/local/$(CROSS_ARCH)/lib/pkgconfig/</div><div class='ctx'>       PKG_CONFIG_LIBDIR := $(PKG_CONFIG_LIBDIR):/usr/local/lib/$(CROSS_ARCH)/pkgconfig/</div><div class='ctx'>       PKG_CONFIG_LIBDIR := $(PKG_CONFIG_LIBDIR):/usr/lib/$(CROSS_ARCH)/pkgconfig/</div><div class='hunk'>@@ -110,7 +106,7 @@ all: $(FILES)</div><div class='ctx'> __BUILD = $(CC) $(CFLAGS) -MD -Wall -Werror -o $@ $(patsubst %.bin,%.c,$(@F)) $(LDFLAGS)</div><div class='ctx'>   BUILD = $(__BUILD) &gt; $(@:.bin=.make.output) 2&gt;&amp;1</div><div class='ctx'>   BUILD_BFD = $(BUILD) -DPACKAGE='"perf"' -lbfd -ldl</div><div class='del'>-  BUILD_ALL = $(BUILD) -fstack-protector-all -O2 -D_FORTIFY_SOURCE=2 -ldw -lelf -lnuma -lelf -lslang $(FLAGS_PERL_EMBED) $(FLAGS_PYTHON_EMBED) -DPACKAGE='"perf"' -lbfd -ldl -lz -llzma -lzstd</div><div class='add'>+  BUILD_ALL = $(BUILD) -fstack-protector-all -O2 -D_FORTIFY_SOURCE=2 -ldw -lelf -lnuma -lelf -lslang $(FLAGS_PERL_EMBED) $(FLAGS_PYTHON_EMBED) -ldl -lz -llzma -lzstd</div><div class='ctx'> </div><div class='ctx'> __BUILDXX = $(CXX) $(CXXFLAGS) -MD -Wall -Werror -o $@ $(patsubst %.bin,%.cpp,$(@F)) $(LDFLAGS)</div><div class='ctx'>   BUILDXX = $(__BUILDXX) &gt; $(@:.bin=.make.output) 2&gt;&amp;1</div><div class='hunk'>@@ -118,7 +114,7 @@ __BUILDXX = $(CXX) $(CXXFLAGS) -MD -Wall -Werror -o $@ $(patsubst %.bin,%.cpp,$(</div><div class='ctx'> ###############################</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-all.bin:</div><div class='del'>-	$(BUILD_ALL) || $(BUILD_ALL) -lopcodes -liberty</div><div class='add'>+	$(BUILD_ALL)</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-hello.bin:</div><div class='ctx'> 	$(BUILD)</div><div class='hunk'>@@ -147,9 +143,6 @@ $(OUTPUT)test-libelf.bin:</div><div class='ctx'> $(OUTPUT)test-eventfd.bin:</div><div class='ctx'> 	$(BUILD)</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)test-get_current_dir_name.bin:</div><div class='del'>-	$(BUILD)</div><div class='del'>-</div><div class='ctx'> $(OUTPUT)test-glibc.bin:</div><div class='ctx'> 	$(BUILD)</div><div class='ctx'> </div><div class='hunk'>@@ -234,9 +227,6 @@ $(OUTPUT)test-libunwind-debug-frame-aarch64.bin:</div><div class='ctx'> $(OUTPUT)test-libslang.bin:</div><div class='ctx'> 	$(BUILD) -lslang</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)test-libslang-include-subdir.bin:</div><div class='del'>-	$(BUILD) -lslang</div><div class='del'>-</div><div class='ctx'> $(OUTPUT)test-libtraceevent.bin:</div><div class='ctx'> 	$(BUILD) -ltraceevent</div><div class='ctx'> </div><div class='hunk'>@@ -316,10 +306,10 @@ $(OUTPUT)test-libcapstone.bin:</div><div class='ctx'> 	$(BUILD) # -lcapstone provided by $(FEATURE_CHECK_LDFLAGS-libcapstone)</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-compile-32.bin:</div><div class='del'>-	$(CC) -m32 -o $@ test-compile.c</div><div class='add'>+	$(CC) -m32 -Wall -Werror -o $@ test-compile.c</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-compile-x32.bin:</div><div class='del'>-	$(CC) -mx32 -o $@ test-compile.c</div><div class='add'>+	$(CC) -mx32 -Wall -Werror -o $@ test-compile.c</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-zlib.bin:</div><div class='ctx'> 	$(BUILD) -lz</div><div class='hunk'>@@ -327,18 +317,12 @@ $(OUTPUT)test-zlib.bin:</div><div class='ctx'> $(OUTPUT)test-lzma.bin:</div><div class='ctx'> 	$(BUILD) -llzma</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)test-get_cpuid.bin:</div><div class='del'>-	$(BUILD)</div><div class='del'>-</div><div class='ctx'> $(OUTPUT)test-bpf.bin:</div><div class='ctx'> 	$(BUILD)</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)test-libbpf.bin:</div><div class='ctx'> 	$(BUILD) -lbpf</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)test-libbpf-strings.bin:</div><div class='del'>-	$(BUILD)</div><div class='del'>-</div><div class='ctx'> $(OUTPUT)test-sdt.bin:</div><div class='ctx'> 	$(BUILD)</div><div class='ctx'> </div><div class='head'>diff --git a/tools/build/feature/test-all.c b/tools/build/feature/test-all.c<br/>index 4419fb4710bd..eb346160d0ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-all.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-all.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-all.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/build/feature/test-all.c</a></div><div class='hunk'>@@ -7,17 +7,13 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Quirk: Python and Perl headers cannot be in arbitrary places, so keep</div><div class='del'>- * these 3 testcases at the top:</div><div class='add'>+ * Quirk: Python headers cannot be in arbitrary places, so keep this testcase at</div><div class='add'>+ * the top:</div><div class='ctx'>  */</div><div class='ctx'> #define main main_test_libpython</div><div class='ctx'> # include "test-libpython.c"</div><div class='ctx'> #undef main</div><div class='ctx'> </div><div class='del'>-#define main main_test_libperl</div><div class='del'>-# include "test-libperl.c"</div><div class='del'>-#undef main</div><div class='del'>-</div><div class='ctx'> #define main main_test_hello</div><div class='ctx'> # include "test-hello.c"</div><div class='ctx'> #undef main</div><div class='hunk'>@@ -26,10 +22,6 @@</div><div class='ctx'> # include "test-libelf.c"</div><div class='ctx'> #undef main</div><div class='ctx'> </div><div class='del'>-#define main main_test_get_current_dir_name</div><div class='del'>-# include "test-get_current_dir_name.c"</div><div class='del'>-#undef main</div><div class='del'>-</div><div class='ctx'> #define main main_test_gettid</div><div class='ctx'> # include "test-gettid.c"</div><div class='ctx'> #undef main</div><div class='hunk'>@@ -122,10 +114,6 @@</div><div class='ctx'> # include "test-lzma.c"</div><div class='ctx'> #undef main</div><div class='ctx'> </div><div class='del'>-#define main main_test_get_cpuid</div><div class='del'>-# include "test-get_cpuid.c"</div><div class='del'>-#undef main</div><div class='del'>-</div><div class='ctx'> #define main main_test_bpf</div><div class='ctx'> # include "test-bpf.c"</div><div class='ctx'> #undef main</div><div class='hunk'>@@ -154,17 +142,11 @@</div><div class='ctx'> # include "test-libtraceevent.c"</div><div class='ctx'> #undef main</div><div class='ctx'> </div><div class='del'>-#define main main_test_libtracefs</div><div class='del'>-# include "test-libtracefs.c"</div><div class='del'>-#undef main</div><div class='del'>-</div><div class='ctx'> int main(int argc, char *argv[])</div><div class='ctx'> {</div><div class='ctx'> 	main_test_libpython();</div><div class='del'>-	main_test_libperl();</div><div class='ctx'> 	main_test_hello();</div><div class='ctx'> 	main_test_libelf();</div><div class='del'>-	main_test_get_current_dir_name();</div><div class='ctx'> 	main_test_gettid();</div><div class='ctx'> 	main_test_glibc();</div><div class='ctx'> 	main_test_libdw();</div><div class='hunk'>@@ -182,7 +164,6 @@ int main(int argc, char *argv[])</div><div class='ctx'> 	main_test_pthread_attr_setaffinity_np();</div><div class='ctx'> 	main_test_pthread_barrier();</div><div class='ctx'> 	main_test_lzma();</div><div class='del'>-	main_test_get_cpuid();</div><div class='ctx'> 	main_test_bpf();</div><div class='ctx'> 	main_test_scandirat();</div><div class='ctx'> 	main_test_sched_getcpu();</div><div class='hunk'>@@ -192,7 +173,6 @@ int main(int argc, char *argv[])</div><div class='ctx'> 	main_test_reallocarray();</div><div class='ctx'> 	main_test_libzstd();</div><div class='ctx'> 	main_test_libtraceevent();</div><div class='del'>-	main_test_libtracefs();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/build/feature/test-get_cpuid.c b/tools/build/feature/test-get_cpuid.c<br/>deleted file mode 100644<br/>index bb4f065f28a6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-get_cpuid.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-get_cpuid.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;cpuid.h&gt;</div><div class='del'>-</div><div class='del'>-int main(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;</div><div class='del'>-	return __get_cpuid(0x15, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-}</div><div class='head'>diff --git a/tools/build/feature/test-get_current_dir_name.c b/tools/build/feature/test-get_current_dir_name.c<br/>deleted file mode 100644<br/>index c3c201691b4f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-get_current_dir_name.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-get_current_dir_name.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#define _GNU_SOURCE</div><div class='del'>-#include &lt;unistd.h&gt;</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-</div><div class='del'>-int main(void)</div><div class='del'>-{</div><div class='del'>-	free(get_current_dir_name());</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#undef _GNU_SOURCE</div><div class='head'>diff --git a/tools/build/feature/test-libbpf-strings.c b/tools/build/feature/test-libbpf-strings.c<br/>deleted file mode 100644<br/>index 83e6c45f5c85..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-libbpf-strings.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-libbpf-strings.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;bpf/btf.h&gt;</div><div class='del'>-</div><div class='del'>-int main(void)</div><div class='del'>-{</div><div class='del'>-	struct btf_dump_type_data_opts opts;</div><div class='del'>-</div><div class='del'>-	opts.emit_strings = 0;</div><div class='del'>-	return opts.emit_strings;</div><div class='del'>-}</div><div class='head'>diff --git a/tools/build/feature/test-libslang-include-subdir.c b/tools/build/feature/test-libslang-include-subdir.c<br/>deleted file mode 100644<br/>index 3ea47ec7590e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/build/feature/test-libslang-include-subdir.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/build/feature/test-libslang-include-subdir.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;slang/slang.h&gt;</div><div class='del'>-</div><div class='del'>-int main(void)</div><div class='del'>-{</div><div class='del'>-	return SLsmg_init_smg();</div><div class='del'>-}</div><div class='head'>diff --git a/tools/dma/.gitignore b/tools/dma/.gitignore<br/>new file mode 100644<br/>index 000000000000..94b68cf4147b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/dma/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/dma/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+dma_map_benchmark</div><div class='add'>+include/linux/map_benchmark.h</div><div class='head'>diff --git a/tools/dma/Makefile b/tools/dma/Makefile<br/>new file mode 100644<br/>index 000000000000..e4abf37bf020<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/dma/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/dma/Makefile</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+include ../scripts/Makefile.include</div><div class='add'>+</div><div class='add'>+bindir ?= /usr/bin</div><div class='add'>+</div><div class='add'>+# This will work when dma is built in tools env. where srctree</div><div class='add'>+# isn't set and when invoked from selftests build, where srctree</div><div class='add'>+# is set to ".". building_out_of_srctree is undefined for in srctree</div><div class='add'>+# builds</div><div class='add'>+ifndef building_out_of_srctree</div><div class='add'>+srctree := $(patsubst %/,%,$(dir $(CURDIR)))</div><div class='add'>+srctree := $(patsubst %/,%,$(dir $(srctree)))</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+# Do not use make's built-in rules</div><div class='add'>+# (this improves performance and avoids hard-to-debug behaviour);</div><div class='add'>+MAKEFLAGS += -r</div><div class='add'>+</div><div class='add'>+override CFLAGS += -O2 -Wall -g -D_GNU_SOURCE -I$(OUTPUT)include</div><div class='add'>+</div><div class='add'>+ALL_TARGETS := dma_map_benchmark</div><div class='add'>+ALL_PROGRAMS := $(patsubst %,$(OUTPUT)%,$(ALL_TARGETS))</div><div class='add'>+</div><div class='add'>+all: $(ALL_PROGRAMS)</div><div class='add'>+</div><div class='add'>+export srctree OUTPUT CC LD CFLAGS</div><div class='add'>+include $(srctree)/tools/build/Makefile.include</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# We need the following to be outside of kernel tree</div><div class='add'>+#</div><div class='add'>+$(OUTPUT)include/linux/map_benchmark.h: ../../include/uapi/linux/map_benchmark.h</div><div class='add'>+	mkdir -p $(OUTPUT)include/linux 2&gt;&amp;1 || true</div><div class='add'>+	ln -sf $(CURDIR)/../../include/uapi/linux/map_benchmark.h $@</div><div class='add'>+</div><div class='add'>+prepare: $(OUTPUT)include/linux/map_benchmark.h</div><div class='add'>+</div><div class='add'>+FORCE:</div><div class='add'>+</div><div class='add'>+DMA_MAP_BENCHMARK = dma_map_benchmark</div><div class='add'>+$(DMA_MAP_BENCHMARK): prepare FORCE</div><div class='add'>+	$(CC) $(CFLAGS) $(DMA_MAP_BENCHMARK).c -o $(DMA_MAP_BENCHMARK)</div><div class='add'>+</div><div class='add'>+clean:</div><div class='add'>+	rm -f $(ALL_PROGRAMS)</div><div class='add'>+	rm -rf $(OUTPUT)include</div><div class='add'>+	find $(or $(OUTPUT),.) -name '*.o' -delete -o -name '\.*.d' -delete -o -name '\.*.cmd' -delete</div><div class='add'>+</div><div class='add'>+install: $(ALL_PROGRAMS)</div><div class='add'>+	install -d -m 755 $(DESTDIR)$(bindir);		\</div><div class='add'>+	for program in $(ALL_PROGRAMS); do		\</div><div class='add'>+		install $$program $(DESTDIR)$(bindir);	\</div><div class='add'>+	done</div><div class='add'>+</div><div class='add'>+.PHONY: all install clean prepare FORCE</div><div class='head'>diff --git a/tools/testing/selftests/dma/config b/tools/dma/config<br/>index 6102ee3c43cd..6102ee3c43cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/dma/config?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/dma/config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/dma/config?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/dma/config</a></div><div class='head'>diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/dma/dma_map_benchmark.c<br/>index b12f1f9babf8..dd0ed528e6df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/dma/dma_map_benchmark.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/dma/dma_map_benchmark.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/dma/dma_map_benchmark.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/dma/dma_map_benchmark.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/ioctl.h&gt;</div><div class='ctx'> #include &lt;sys/mman.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/map_benchmark.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define NSEC_PER_MSEC	1000000L</div><div class='hunk'>@@ -118,7 +117,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	printf("dma mapping benchmark: threads:%d seconds:%d node:%d dir:%s granule: %d\n",</div><div class='del'>-			threads, seconds, node, dir[directions], granule);</div><div class='add'>+			threads, seconds, node, directions[dir], granule);</div><div class='ctx'> 	printf("average map latency(us):%.1f standard deviation:%.1f\n",</div><div class='ctx'> 			map.avg_map_100ns/10.0, map.map_stddev/10.0);</div><div class='ctx'> 	printf("average unmap latency(us):%.1f standard deviation:%.1f\n",</div><div class='head'>diff --git a/tools/docs/check-variable-fonts.py b/tools/docs/check-variable-fonts.py<br/>new file mode 100755<br/>index 000000000000..958d5a745724<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/check-variable-fonts.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/check-variable-fonts.py</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+# Copyright (C) Akira Yokosawa, 2024</div><div class='add'>+#</div><div class='add'>+# Ported to Python by (c) Mauro Carvalho Chehab, 2025</div><div class='add'>+#</div><div class='add'>+# pylint: disable=C0103</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Detect problematic Noto CJK variable fonts.</div><div class='add'>+</div><div class='add'>+or more details, see .../tools/lib/python/kdoc/latex_fonts.py.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import sys</div><div class='add'>+import os.path</div><div class='add'>+</div><div class='add'>+src_dir = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+sys.path.insert(0, os.path.join(src_dir, '../lib/python'))</div><div class='add'>+</div><div class='add'>+from kdoc.latex_fonts import LatexFontChecker</div><div class='add'>+</div><div class='add'>+checker = LatexFontChecker()</div><div class='add'>+</div><div class='add'>+parser=argparse.ArgumentParser(description=checker.description(),</div><div class='add'>+                               formatter_class=argparse.RawTextHelpFormatter)</div><div class='add'>+parser.add_argument("--deny-vf",</div><div class='add'>+                    help="XDG_CONFIG_HOME dir containing fontconfig/fonts.conf file")</div><div class='add'>+</div><div class='add'>+args=parser.parse_args()</div><div class='add'>+</div><div class='add'>+msg = LatexFontChecker(args.deny_vf).check()</div><div class='add'>+if msg:</div><div class='add'>+    print(msg)</div><div class='add'>+</div><div class='add'>+sys.exit(1)</div><div class='head'>diff --git a/tools/docs/checktransupdate.py b/tools/docs/checktransupdate.py<br/>new file mode 100755<br/>index 000000000000..e894652369a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/checktransupdate.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/checktransupdate.py</a></div><div class='hunk'>@@ -0,0 +1,307 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+This script helps track the translation status of the documentation</div><div class='add'>+in different locales, e.g., zh_CN. More specially, it uses `git log`</div><div class='add'>+commit to find the latest english commit from the translation commit</div><div class='add'>+(order by author date) and the latest english commits from HEAD. If</div><div class='add'>+differences occur, report the file and commits that need to be updated.</div><div class='add'>+</div><div class='add'>+The usage is as follows:</div><div class='add'>+- tools/docs/checktransupdate.py -l zh_CN</div><div class='add'>+This will print all the files that need to be updated or translated in the zh_CN locale.</div><div class='add'>+- tools/docs/checktransupdate.py Documentation/translations/zh_CN/dev-tools/testing-overview.rst</div><div class='add'>+This will only print the status of the specified file.</div><div class='add'>+</div><div class='add'>+The output is something like:</div><div class='add'>+Documentation/dev-tools/kfence.rst</div><div class='add'>+No translation in the locale of zh_CN</div><div class='add'>+</div><div class='add'>+Documentation/translations/zh_CN/dev-tools/testing-overview.rst</div><div class='add'>+commit 42fb9cfd5b18 ("Documentation: dev-tools: Add link to RV docs")</div><div class='add'>+1 commits needs resolving in total</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import time</div><div class='add'>+import logging</div><div class='add'>+from argparse import ArgumentParser, ArgumentTypeError, BooleanOptionalAction</div><div class='add'>+from datetime import datetime</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_origin_path(file_path):</div><div class='add'>+    """Get the origin path from the translation path"""</div><div class='add'>+    paths = file_path.split("/")</div><div class='add'>+    tidx = paths.index("translations")</div><div class='add'>+    opaths = paths[:tidx]</div><div class='add'>+    opaths += paths[tidx + 2 :]</div><div class='add'>+    return "/".join(opaths)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_latest_commit_from(file_path, commit):</div><div class='add'>+    """Get the latest commit from the specified commit for the specified file"""</div><div class='add'>+    command = f"git log --pretty=format:%H%n%aD%n%cD%n%n%B {commit} -1 -- {file_path}"</div><div class='add'>+    logging.debug(command)</div><div class='add'>+    pipe = os.popen(command)</div><div class='add'>+    result = pipe.read()</div><div class='add'>+    result = result.split("\n")</div><div class='add'>+    if len(result) &lt;= 1:</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    logging.debug("Result: %s", result[0])</div><div class='add'>+</div><div class='add'>+    return {</div><div class='add'>+        "hash": result[0],</div><div class='add'>+        "author_date": datetime.strptime(result[1], "%a, %d %b %Y %H:%M:%S %z"),</div><div class='add'>+        "commit_date": datetime.strptime(result[2], "%a, %d %b %Y %H:%M:%S %z"),</div><div class='add'>+        "message": result[4:],</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_origin_from_trans(origin_path, t_from_head):</div><div class='add'>+    """Get the latest origin commit from the translation commit"""</div><div class='add'>+    o_from_t = get_latest_commit_from(origin_path, t_from_head["hash"])</div><div class='add'>+    while o_from_t is not None and o_from_t["author_date"] &gt; t_from_head["author_date"]:</div><div class='add'>+        o_from_t = get_latest_commit_from(origin_path, o_from_t["hash"] + "^")</div><div class='add'>+    if o_from_t is not None:</div><div class='add'>+        logging.debug("tracked origin commit id: %s", o_from_t["hash"])</div><div class='add'>+    return o_from_t</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_origin_from_trans_smartly(origin_path, t_from_head):</div><div class='add'>+    """Get the latest origin commit from the formatted translation commit:</div><div class='add'>+    (1) update to commit HASH (TITLE)</div><div class='add'>+    (2) Update the translation through commit HASH (TITLE)</div><div class='add'>+    """</div><div class='add'>+    # catch flag for 12-bit commit hash</div><div class='add'>+    HASH = r'([0-9a-f]{12})'</div><div class='add'>+    # pattern 1: contains "update to commit HASH"</div><div class='add'>+    pat_update_to = re.compile(rf'update to commit {HASH}')</div><div class='add'>+    # pattern 2: contains "Update the translation through commit HASH"</div><div class='add'>+    pat_update_translation = re.compile(rf'Update the translation through commit {HASH}')</div><div class='add'>+</div><div class='add'>+    origin_commit_hash = None</div><div class='add'>+    for line in t_from_head["message"]:</div><div class='add'>+        # check if the line matches the first pattern</div><div class='add'>+        match = pat_update_to.search(line)</div><div class='add'>+        if match:</div><div class='add'>+            origin_commit_hash = match.group(1)</div><div class='add'>+            break</div><div class='add'>+        # check if the line matches the second pattern</div><div class='add'>+        match = pat_update_translation.search(line)</div><div class='add'>+        if match:</div><div class='add'>+            origin_commit_hash = match.group(1)</div><div class='add'>+            break</div><div class='add'>+    if origin_commit_hash is None:</div><div class='add'>+        return None</div><div class='add'>+    o_from_t = get_latest_commit_from(origin_path, origin_commit_hash)</div><div class='add'>+    if o_from_t is not None:</div><div class='add'>+        logging.debug("tracked origin commit id: %s", o_from_t["hash"])</div><div class='add'>+    return o_from_t</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_commits_count_between(opath, commit1, commit2):</div><div class='add'>+    """Get the commits count between two commits for the specified file"""</div><div class='add'>+    command = f"git log --pretty=format:%H {commit1}...{commit2} -- {opath}"</div><div class='add'>+    logging.debug(command)</div><div class='add'>+    pipe = os.popen(command)</div><div class='add'>+    result = pipe.read().split("\n")</div><div class='add'>+    # filter out empty lines</div><div class='add'>+    result = list(filter(lambda x: x != "", result))</div><div class='add'>+    return result</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def pretty_output(commit):</div><div class='add'>+    """Pretty print the commit message"""</div><div class='add'>+    command = f"git log --pretty='format:%h (\"%s\")' -1 {commit}"</div><div class='add'>+    logging.debug(command)</div><div class='add'>+    pipe = os.popen(command)</div><div class='add'>+    return pipe.read()</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def valid_commit(commit):</div><div class='add'>+    """Check if the commit is valid or not"""</div><div class='add'>+    msg = pretty_output(commit)</div><div class='add'>+    return "Merge tag" not in msg</div><div class='add'>+</div><div class='add'>+def check_per_file(file_path):</div><div class='add'>+    """Check the translation status for the specified file"""</div><div class='add'>+    opath = get_origin_path(file_path)</div><div class='add'>+</div><div class='add'>+    if not os.path.isfile(opath):</div><div class='add'>+        logging.error("Cannot find the origin path for {file_path}")</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    o_from_head = get_latest_commit_from(opath, "HEAD")</div><div class='add'>+    t_from_head = get_latest_commit_from(file_path, "HEAD")</div><div class='add'>+</div><div class='add'>+    if o_from_head is None or t_from_head is None:</div><div class='add'>+        logging.error("Cannot find the latest commit for %s", file_path)</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    o_from_t = get_origin_from_trans_smartly(opath, t_from_head)</div><div class='add'>+    # notice, o_from_t from get_*_smartly() is always more accurate than from get_*()</div><div class='add'>+    if o_from_t is None:</div><div class='add'>+        o_from_t = get_origin_from_trans(opath, t_from_head)</div><div class='add'>+</div><div class='add'>+    if o_from_t is None:</div><div class='add'>+        logging.error("Error: Cannot find the latest origin commit for %s", file_path)</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    if o_from_head["hash"] == o_from_t["hash"]:</div><div class='add'>+        logging.debug("No update needed for %s", file_path)</div><div class='add'>+    else:</div><div class='add'>+        logging.info(file_path)</div><div class='add'>+        commits = get_commits_count_between(</div><div class='add'>+            opath, o_from_t["hash"], o_from_head["hash"]</div><div class='add'>+        )</div><div class='add'>+        count = 0</div><div class='add'>+        for commit in commits:</div><div class='add'>+            if valid_commit(commit):</div><div class='add'>+                logging.info("commit %s", pretty_output(commit))</div><div class='add'>+                count += 1</div><div class='add'>+        logging.info("%d commits needs resolving in total\n", count)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def valid_locales(locale):</div><div class='add'>+    """Check if the locale is valid or not"""</div><div class='add'>+    script_path = os.path.dirname(os.path.abspath(__file__))</div><div class='add'>+    linux_path = os.path.join(script_path, "../..")</div><div class='add'>+    if not os.path.isdir(f"{linux_path}/Documentation/translations/{locale}"):</div><div class='add'>+        raise ArgumentTypeError("Invalid locale: {locale}")</div><div class='add'>+    return locale</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def list_files_with_excluding_folders(folder, exclude_folders, include_suffix):</div><div class='add'>+    """List all files with the specified suffix in the folder and its subfolders"""</div><div class='add'>+    files = []</div><div class='add'>+    stack = [folder]</div><div class='add'>+</div><div class='add'>+    while stack:</div><div class='add'>+        pwd = stack.pop()</div><div class='add'>+        # filter out the exclude folders</div><div class='add'>+        if os.path.basename(pwd) in exclude_folders:</div><div class='add'>+            continue</div><div class='add'>+        # list all files and folders</div><div class='add'>+        for item in os.listdir(pwd):</div><div class='add'>+            ab_item = os.path.join(pwd, item)</div><div class='add'>+            if os.path.isdir(ab_item):</div><div class='add'>+                stack.append(ab_item)</div><div class='add'>+            else:</div><div class='add'>+                if ab_item.endswith(include_suffix):</div><div class='add'>+                    files.append(ab_item)</div><div class='add'>+</div><div class='add'>+    return files</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class DmesgFormatter(logging.Formatter):</div><div class='add'>+    """Custom dmesg logging formatter"""</div><div class='add'>+    def format(self, record):</div><div class='add'>+        timestamp = time.time()</div><div class='add'>+        formatted_time = f"[{timestamp:&gt;10.6f}]"</div><div class='add'>+        log_message = f"{formatted_time} {record.getMessage()}"</div><div class='add'>+        return log_message</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def config_logging(log_level, log_file="checktransupdate.log"):</div><div class='add'>+    """configure logging based on the log level"""</div><div class='add'>+    # set up the root logger</div><div class='add'>+    logger = logging.getLogger()</div><div class='add'>+    logger.setLevel(log_level)</div><div class='add'>+</div><div class='add'>+    # Create console handler</div><div class='add'>+    console_handler = logging.StreamHandler()</div><div class='add'>+    console_handler.setLevel(log_level)</div><div class='add'>+</div><div class='add'>+    # Create file handler</div><div class='add'>+    file_handler = logging.FileHandler(log_file)</div><div class='add'>+    file_handler.setLevel(log_level)</div><div class='add'>+</div><div class='add'>+    # Create formatter and add it to the handlers</div><div class='add'>+    formatter = DmesgFormatter()</div><div class='add'>+    console_handler.setFormatter(formatter)</div><div class='add'>+    file_handler.setFormatter(formatter)</div><div class='add'>+</div><div class='add'>+    # Add the handler to the logger</div><div class='add'>+    logger.addHandler(console_handler)</div><div class='add'>+    logger.addHandler(file_handler)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """Main function of the script"""</div><div class='add'>+    script_path = os.path.dirname(os.path.abspath(__file__))</div><div class='add'>+    linux_path = os.path.join(script_path, "../..")</div><div class='add'>+</div><div class='add'>+    parser = ArgumentParser(description="Check the translation update")</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "-l",</div><div class='add'>+        "--locale",</div><div class='add'>+        default="zh_CN",</div><div class='add'>+        type=valid_locales,</div><div class='add'>+        help="Locale to check when files are not specified",</div><div class='add'>+    )</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "--print-missing-translations",</div><div class='add'>+        action=BooleanOptionalAction,</div><div class='add'>+        default=True,</div><div class='add'>+        help="Print files that do not have translations",</div><div class='add'>+    )</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        '--log',</div><div class='add'>+        default='INFO',</div><div class='add'>+        choices=['DEBUG', 'INFO', 'WARNING', 'ERROR', 'CRITICAL'],</div><div class='add'>+        help='Set the logging level')</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        '--logfile',</div><div class='add'>+        default='checktransupdate.log',</div><div class='add'>+        help='Set the logging file (default: checktransupdate.log)')</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "files", nargs="*", help="Files to check, if not specified, check all files"</div><div class='add'>+    )</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    # Configure logging based on the --log argument</div><div class='add'>+    log_level = getattr(logging, args.log.upper(), logging.INFO)</div><div class='add'>+    config_logging(log_level)</div><div class='add'>+</div><div class='add'>+    # Get files related to linux path</div><div class='add'>+    files = args.files</div><div class='add'>+    if len(files) == 0:</div><div class='add'>+        offical_files = list_files_with_excluding_folders(</div><div class='add'>+            os.path.join(linux_path, "Documentation"), ["translations", "output"], "rst"</div><div class='add'>+        )</div><div class='add'>+</div><div class='add'>+        for file in offical_files:</div><div class='add'>+            # split the path into parts</div><div class='add'>+            path_parts = file.split(os.sep)</div><div class='add'>+            # find the index of the "Documentation" directory</div><div class='add'>+            kindex = path_parts.index("Documentation")</div><div class='add'>+            # insert the translations and locale after the Documentation directory</div><div class='add'>+            new_path_parts = path_parts[:kindex + 1] + ["translations", args.locale] \</div><div class='add'>+                           + path_parts[kindex + 1 :]</div><div class='add'>+            # join the path parts back together</div><div class='add'>+            new_file = os.sep.join(new_path_parts)</div><div class='add'>+            if os.path.isfile(new_file):</div><div class='add'>+                files.append(new_file)</div><div class='add'>+            else:</div><div class='add'>+                if args.print_missing_translations:</div><div class='add'>+                    logging.info(os.path.relpath(os.path.abspath(file), linux_path))</div><div class='add'>+                    logging.info("No translation in the locale of %s\n", args.locale)</div><div class='add'>+</div><div class='add'>+    files = list(map(lambda x: os.path.relpath(os.path.abspath(x), linux_path), files))</div><div class='add'>+</div><div class='add'>+    # cd to linux root directory</div><div class='add'>+    os.chdir(linux_path)</div><div class='add'>+</div><div class='add'>+    for file in files:</div><div class='add'>+        check_per_file(file)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/documentation-file-ref-check b/tools/docs/documentation-file-ref-check<br/>new file mode 100755<br/>index 000000000000..0cad42f6943b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/documentation-file-ref-check?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/documentation-file-ref-check</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+#!/usr/bin/env perl</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Treewide grep for references to files under Documentation, and report</div><div class='add'>+# non-existing files in stderr.</div><div class='add'>+</div><div class='add'>+use warnings;</div><div class='add'>+use strict;</div><div class='add'>+use Getopt::Long qw(:config no_auto_abbrev);</div><div class='add'>+</div><div class='add'>+# NOTE: only add things here when the file was gone, but the text wants</div><div class='add'>+# to mention a past documentation file, for example, to give credits for</div><div class='add'>+# the original work.</div><div class='add'>+my %false_positives = (</div><div class='add'>+	"Documentation/scsi/scsi_mid_low_api.rst" =&gt; "Documentation/Configure.help",</div><div class='add'>+	"drivers/vhost/vhost.c" =&gt; "Documentation/virtual/lguest/lguest.c",</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+my $scriptname = $0;</div><div class='add'>+$scriptname =~ s,tools/docs/([^/]+/),$1,;</div><div class='add'>+</div><div class='add'>+# Parse arguments</div><div class='add'>+my $help = 0;</div><div class='add'>+my $fix = 0;</div><div class='add'>+my $warn = 0;</div><div class='add'>+</div><div class='add'>+if (! -e ".git") {</div><div class='add'>+	printf "Warning: can't check if file exists, as this is not a git tree\n";</div><div class='add'>+	exit 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+GetOptions(</div><div class='add'>+	'fix' =&gt; \$fix,</div><div class='add'>+	'warn' =&gt; \$warn,</div><div class='add'>+	'h|help|usage' =&gt; \$help,</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+if ($help != 0) {</div><div class='add'>+    print "$scriptname [--help] [--fix]\n";</div><div class='add'>+    exit -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+# Step 1: find broken references</div><div class='add'>+print "Finding broken references. This may take a while...  " if ($fix);</div><div class='add'>+</div><div class='add'>+my %broken_ref;</div><div class='add'>+</div><div class='add'>+my $doc_fix = 0;</div><div class='add'>+</div><div class='add'>+open IN, "git grep ':doc:\`' Documentation/|"</div><div class='add'>+     or die "Failed to run git grep";</div><div class='add'>+while (&lt;IN&gt;) {</div><div class='add'>+	next if (!m,^([^:]+):.*\:doc\:\`([^\`]+)\`,);</div><div class='add'>+	next if (m,sphinx/,);</div><div class='add'>+</div><div class='add'>+	my $file = $1;</div><div class='add'>+	my $d = $1;</div><div class='add'>+	my $doc_ref = $2;</div><div class='add'>+</div><div class='add'>+	my $f = $doc_ref;</div><div class='add'>+</div><div class='add'>+	$d =~ s,(.*/).*,$1,;</div><div class='add'>+	$f =~ s,.*\&lt;([^\&gt;]+)\&gt;,$1,;</div><div class='add'>+</div><div class='add'>+	if ($f =~ m,^/,) {</div><div class='add'>+		$f = "$f.rst";</div><div class='add'>+		$f =~ s,^/,Documentation/,;</div><div class='add'>+	} else {</div><div class='add'>+		$f = "$d$f.rst";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	next if (grep -e, glob("$f"));</div><div class='add'>+</div><div class='add'>+	if ($fix &amp;&amp; !$doc_fix) {</div><div class='add'>+		print STDERR "\nWARNING: Currently, can't fix broken :doc:`` fields\n";</div><div class='add'>+	}</div><div class='add'>+	$doc_fix++;</div><div class='add'>+</div><div class='add'>+	print STDERR "$file: :doc:`$doc_ref`\n";</div><div class='add'>+}</div><div class='add'>+close IN;</div><div class='add'>+</div><div class='add'>+open IN, "git grep 'Documentation/'|"</div><div class='add'>+     or die "Failed to run git grep";</div><div class='add'>+while (&lt;IN&gt;) {</div><div class='add'>+	next if (!m/^([^:]+):(.*)/);</div><div class='add'>+</div><div class='add'>+	my $f = $1;</div><div class='add'>+	my $ln = $2;</div><div class='add'>+</div><div class='add'>+	# On linux-next, discard the Next/ directory</div><div class='add'>+	next if ($f =~ m,^Next/,);</div><div class='add'>+</div><div class='add'>+	# Makefiles and scripts contain nasty expressions to parse docs</div><div class='add'>+	next if ($f =~ m/Makefile/ || $f =~ m/\.(sh|py|pl|~|rej|org|orig)$/);</div><div class='add'>+</div><div class='add'>+	# It doesn't make sense to parse hidden files</div><div class='add'>+	next if ($f =~ m#/\.#);</div><div class='add'>+</div><div class='add'>+	# Skip this script</div><div class='add'>+	next if ($f eq $scriptname);</div><div class='add'>+</div><div class='add'>+	# Ignore the dir where documentation will be built</div><div class='add'>+	next if ($ln =~ m,\b(\S*)Documentation/output,);</div><div class='add'>+</div><div class='add'>+	if ($ln =~ m,\b(\S*)(Documentation/[A-Za-z0-9\_\.\,\~/\*\[\]\?+-]*)(.*),) {</div><div class='add'>+		my $prefix = $1;</div><div class='add'>+		my $ref = $2;</div><div class='add'>+		my $base = $2;</div><div class='add'>+		my $extra = $3;</div><div class='add'>+</div><div class='add'>+		# some file references are like:</div><div class='add'>+		# /usr/src/linux/Documentation/DMA-{API,mapping}.txt</div><div class='add'>+		# For now, ignore them</div><div class='add'>+		next if ($extra =~ m/^{/);</div><div class='add'>+</div><div class='add'>+		# Remove footnotes at the end like:</div><div class='add'>+		# Documentation/devicetree/dt-object-internal.txt[1]</div><div class='add'>+		$ref =~ s/(txt|rst)\[\d+]$/$1/;</div><div class='add'>+</div><div class='add'>+		# Remove ending ']' without any '['</div><div class='add'>+		$ref =~ s/\].*// if (!($ref =~ m/\[/));</div><div class='add'>+</div><div class='add'>+		# Remove puntuation marks at the end</div><div class='add'>+		$ref =~ s/[\,\.]+$//;</div><div class='add'>+</div><div class='add'>+		my $fulref = "$prefix$ref";</div><div class='add'>+</div><div class='add'>+		$fulref =~ s/^(\&lt;file|ref)://;</div><div class='add'>+		$fulref =~ s/^[\'\`]+//;</div><div class='add'>+		$fulref =~ s,^\$\(.*\)/,,;</div><div class='add'>+		$base =~ s,.*/,,;</div><div class='add'>+</div><div class='add'>+		# Remove URL false-positives</div><div class='add'>+		next if ($fulref =~ m/^http/);</div><div class='add'>+</div><div class='add'>+		# Remove sched-pelt false-positive</div><div class='add'>+		next if ($fulref =~ m,^Documentation/scheduler/sched-pelt$,);</div><div class='add'>+</div><div class='add'>+		# Discard some build examples from Documentation/target/tcm_mod_builder.rst</div><div class='add'>+		next if ($fulref =~ m,mnt/sdb/lio-core-2.6.git/Documentation/target,);</div><div class='add'>+</div><div class='add'>+		# Check if exists, evaluating wildcards</div><div class='add'>+		next if (grep -e, glob("$ref $fulref"));</div><div class='add'>+</div><div class='add'>+		# Accept relative Documentation patches for tools/</div><div class='add'>+		if ($f =~ m/tools/) {</div><div class='add'>+			my $path = $f;</div><div class='add'>+			$path =~ s,(.*)/.*,$1,;</div><div class='add'>+			$path =~ s,testing/selftests/bpf,bpf/bpftool,;</div><div class='add'>+			next if (grep -e, glob("$path/$ref $path/../$ref $path/$fulref"));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		# Discard known false-positives</div><div class='add'>+		if (defined($false_positives{$f})) {</div><div class='add'>+			next if ($false_positives{$f} eq $fulref);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ($fix) {</div><div class='add'>+			if (!($ref =~ m/(scripts|Kconfig|Kbuild)/)) {</div><div class='add'>+				$broken_ref{$ref}++;</div><div class='add'>+			}</div><div class='add'>+		} elsif ($warn) {</div><div class='add'>+			print STDERR "Warning: $f references a file that doesn't exist: $fulref\n";</div><div class='add'>+		} else {</div><div class='add'>+			print STDERR "$f: $fulref\n";</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+close IN;</div><div class='add'>+</div><div class='add'>+exit 0 if (!$fix);</div><div class='add'>+</div><div class='add'>+# Step 2: Seek for file name alternatives</div><div class='add'>+print "Auto-fixing broken references. Please double-check the results\n";</div><div class='add'>+</div><div class='add'>+foreach my $ref (keys %broken_ref) {</div><div class='add'>+	my $new =$ref;</div><div class='add'>+</div><div class='add'>+	my $basedir = ".";</div><div class='add'>+	# On translations, only seek inside the translations directory</div><div class='add'>+	$basedir  = $1 if ($ref =~ m,(Documentation/translations/[^/]+),);</div><div class='add'>+</div><div class='add'>+	# get just the basename</div><div class='add'>+	$new =~ s,.*/,,;</div><div class='add'>+</div><div class='add'>+	my $f="";</div><div class='add'>+</div><div class='add'>+	# usual reason for breakage: DT file moved around</div><div class='add'>+	if ($ref =~ /devicetree/) {</div><div class='add'>+		# usual reason for breakage: DT file renamed to .yaml</div><div class='add'>+		if (!$f) {</div><div class='add'>+			my $new_ref = $ref;</div><div class='add'>+			$new_ref =~ s/\.txt$/.yaml/;</div><div class='add'>+			$f=$new_ref if (-f $new_ref);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!$f) {</div><div class='add'>+			my $search = $new;</div><div class='add'>+			$search =~ s,^.*/,,;</div><div class='add'>+			$f = qx(find Documentation/devicetree/ -iname "*$search*") if ($search);</div><div class='add'>+			if (!$f) {</div><div class='add'>+				# Manufacturer name may have changed</div><div class='add'>+				$search =~ s/^.*,//;</div><div class='add'>+				$f = qx(find Documentation/devicetree/ -iname "*$search*") if ($search);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	# usual reason for breakage: file renamed to .rst</div><div class='add'>+	if (!$f) {</div><div class='add'>+		$new =~ s/\.txt$/.rst/;</div><div class='add'>+		$f=qx(find $basedir -iname $new) if ($new);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	# usual reason for breakage: use dash or underline</div><div class='add'>+	if (!$f) {</div><div class='add'>+		$new =~ s/[-_]/[-_]/g;</div><div class='add'>+		$f=qx(find $basedir -iname $new) if ($new);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	# Wild guess: seek for the same name on another place</div><div class='add'>+	if (!$f) {</div><div class='add'>+		$f = qx(find $basedir -iname $new) if ($new);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	my @find = split /\s+/, $f;</div><div class='add'>+</div><div class='add'>+	if (!$f) {</div><div class='add'>+		print STDERR "ERROR: Didn't find a replacement for $ref\n";</div><div class='add'>+	} elsif (scalar(@find) &gt; 1) {</div><div class='add'>+		print STDERR "WARNING: Won't auto-replace, as found multiple files close to $ref:\n";</div><div class='add'>+		foreach my $j (@find) {</div><div class='add'>+			$j =~ s,^./,,;</div><div class='add'>+			print STDERR "    $j\n";</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		$f = $find[0];</div><div class='add'>+		$f =~ s,^./,,;</div><div class='add'>+		print "INFO: Replacing $ref to $f\n";</div><div class='add'>+		foreach my $j (qx(git grep -l $ref)) {</div><div class='add'>+			qx(sed "s\@$ref\@$f\@g" -i $j);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/tools/docs/features-refresh.sh b/tools/docs/features-refresh.sh<br/>new file mode 100755<br/>index 000000000000..c2288124e94a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/features-refresh.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/features-refresh.sh</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+#</div><div class='add'>+# Small script that refreshes the kernel feature support status in place.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+for F_FILE in Documentation/features/*/*/arch-support.txt; do</div><div class='add'>+	F=$(grep "^#         Kconfig:" "$F_FILE" | cut -c26-)</div><div class='add'>+</div><div class='add'>+	#</div><div class='add'>+	# Each feature F is identified by a pair (O, K), where 'O' can</div><div class='add'>+	# be either the empty string (for 'nop') or "not" (the logical</div><div class='add'>+	# negation operator '!'); other operators are not supported.</div><div class='add'>+	#</div><div class='add'>+	O=""</div><div class='add'>+	K=$F</div><div class='add'>+	if [[ "$F" == !* ]]; then</div><div class='add'>+		O="not"</div><div class='add'>+		K=$(echo $F | sed -e 's/^!//g')</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	#</div><div class='add'>+	# F := (O, K) is 'valid' iff there is a Kconfig file (for some</div><div class='add'>+	# arch) which contains K.</div><div class='add'>+	#</div><div class='add'>+	# Notice that this definition entails an 'asymmetry' between</div><div class='add'>+	# the case 'O = ""' and the case 'O = "not"'. E.g., F may be</div><div class='add'>+	# _invalid_ if:</div><div class='add'>+	#</div><div class='add'>+	# [case 'O = ""']</div><div class='add'>+	#   1) no arch provides support for F,</div><div class='add'>+	#   2) K does not exist (e.g., it was renamed/mis-typed);</div><div class='add'>+	#</div><div class='add'>+	# [case 'O = "not"']</div><div class='add'>+	#   3) all archs provide support for F,</div><div class='add'>+	#   4) as in (2).</div><div class='add'>+	#</div><div class='add'>+	# The rationale for adopting this definition (and, thus, for</div><div class='add'>+	# keeping the asymmetry) is:</div><div class='add'>+	#</div><div class='add'>+	#       We want to be able to 'detect' (2) (or (4)).</div><div class='add'>+	#</div><div class='add'>+	# (1) and (3) may further warn the developers about the fact</div><div class='add'>+	# that K can be removed.</div><div class='add'>+	#</div><div class='add'>+	F_VALID="false"</div><div class='add'>+	for ARCH_DIR in arch/*/; do</div><div class='add'>+		K_FILES=$(find $ARCH_DIR -name "Kconfig*")</div><div class='add'>+		K_GREP=$(grep "$K" $K_FILES)</div><div class='add'>+		if [ ! -z "$K_GREP" ]; then</div><div class='add'>+			F_VALID="true"</div><div class='add'>+			break</div><div class='add'>+		fi</div><div class='add'>+	done</div><div class='add'>+	if [ "$F_VALID" = "false" ]; then</div><div class='add'>+		printf "WARNING: '%s' is not a valid Kconfig\n" "$F"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	T_FILE="$F_FILE.tmp"</div><div class='add'>+	grep "^#" $F_FILE &gt; $T_FILE</div><div class='add'>+	echo "    -----------------------" &gt;&gt; $T_FILE</div><div class='add'>+	echo "    |         arch |status|" &gt;&gt; $T_FILE</div><div class='add'>+	echo "    -----------------------" &gt;&gt; $T_FILE</div><div class='add'>+	for ARCH_DIR in arch/*/; do</div><div class='add'>+		ARCH=$(echo $ARCH_DIR | sed -e 's/^arch//g' | sed -e 's/\///g')</div><div class='add'>+		K_FILES=$(find $ARCH_DIR -name "Kconfig*")</div><div class='add'>+		K_GREP=$(grep "$K" $K_FILES)</div><div class='add'>+		#</div><div class='add'>+		# Arch support status values for (O, K) are updated according</div><div class='add'>+		# to the following rules.</div><div class='add'>+		#</div><div class='add'>+		#   - ("", K) is 'supported by a given arch', if there is a</div><div class='add'>+		#     Kconfig file for that arch which contains K;</div><div class='add'>+		#</div><div class='add'>+		#   - ("not", K) is 'supported by a given arch', if there is</div><div class='add'>+		#     no Kconfig file for that arch which contains K;</div><div class='add'>+		#</div><div class='add'>+		#   - otherwise: preserve the previous status value (if any),</div><div class='add'>+		#                default to 'not yet supported'.</div><div class='add'>+		#</div><div class='add'>+		# Notice that, according these rules, invalid features may be</div><div class='add'>+		# updated/modified.</div><div class='add'>+		#</div><div class='add'>+		if [ "$O" = "" ] &amp;&amp; [ ! -z "$K_GREP" ]; then</div><div class='add'>+			printf "    |%12s: |  ok  |\n" "$ARCH" &gt;&gt; $T_FILE</div><div class='add'>+		elif [ "$O" = "not" ] &amp;&amp; [ -z "$K_GREP" ]; then</div><div class='add'>+			printf "    |%12s: |  ok  |\n" "$ARCH" &gt;&gt; $T_FILE</div><div class='add'>+		else</div><div class='add'>+			S=$(grep -v "^#" "$F_FILE" | grep " $ARCH:")</div><div class='add'>+			if [ ! -z "$S" ]; then</div><div class='add'>+				echo "$S" &gt;&gt; $T_FILE</div><div class='add'>+			else</div><div class='add'>+				printf "    |%12s: | TODO |\n" "$ARCH" \</div><div class='add'>+					&gt;&gt; $T_FILE</div><div class='add'>+			fi</div><div class='add'>+		fi</div><div class='add'>+	done</div><div class='add'>+	echo "    -----------------------" &gt;&gt; $T_FILE</div><div class='add'>+	mv $T_FILE $F_FILE</div><div class='add'>+done</div><div class='head'>diff --git a/tools/docs/find-unused-docs.sh b/tools/docs/find-unused-docs.sh<br/>new file mode 100755<br/>index 000000000000..05552dbda5bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/find-unused-docs.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/find-unused-docs.sh</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# (c) 2017, Jonathan Corbet &lt;corbet@lwn.net&gt;</div><div class='add'>+#           sayli karnik &lt;karniksayli1995@gmail.com&gt;</div><div class='add'>+#</div><div class='add'>+# This script detects files with kernel-doc comments for exported functions</div><div class='add'>+# that are not included in documentation.</div><div class='add'>+#</div><div class='add'>+# usage: Run 'tools/docs/find-unused-docs.sh directory' from top level of kernel</div><div class='add'>+# 	 tree.</div><div class='add'>+#</div><div class='add'>+# example: $tools/docs/find-unused-docs.sh drivers/scsi</div><div class='add'>+#</div><div class='add'>+# Licensed under the terms of the GNU GPL License</div><div class='add'>+</div><div class='add'>+if ! [ -d "Documentation" ]; then</div><div class='add'>+	echo "Run from top level of kernel tree"</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+if [ "$#" -ne 1 ]; then</div><div class='add'>+	echo "Usage: tools/docs/find-unused-docs.sh directory"</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+if ! [ -d "$1" ]; then</div><div class='add'>+	echo "Directory $1 doesn't exist"</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+cd "$( dirname "${BASH_SOURCE[0]}" )"</div><div class='add'>+cd ..</div><div class='add'>+</div><div class='add'>+cd Documentation/</div><div class='add'>+</div><div class='add'>+echo "The following files contain kerneldoc comments for exported functions \</div><div class='add'>+that are not used in the formatted documentation"</div><div class='add'>+</div><div class='add'>+# FILES INCLUDED</div><div class='add'>+</div><div class='add'>+files_included=($(grep -rHR ".. kernel-doc" --include \*.rst | cut -d " " -f 3))</div><div class='add'>+</div><div class='add'>+declare -A FILES_INCLUDED</div><div class='add'>+</div><div class='add'>+for each in "${files_included[@]}"; do</div><div class='add'>+	FILES_INCLUDED[$each]="$each"</div><div class='add'>+	done</div><div class='add'>+</div><div class='add'>+cd ..</div><div class='add'>+</div><div class='add'>+# FILES NOT INCLUDED</div><div class='add'>+</div><div class='add'>+for file in `find $1 -name '*.c'`; do</div><div class='add'>+</div><div class='add'>+	if [[ ${FILES_INCLUDED[$file]+_} ]]; then</div><div class='add'>+	continue;</div><div class='add'>+	fi</div><div class='add'>+	str=$(PYTHONDONTWRITEBYTECODE=1 scripts/kernel-doc -export "$file" 2&gt;/dev/null)</div><div class='add'>+	if [[ -n "$str" ]]; then</div><div class='add'>+	echo "$file"</div><div class='add'>+	fi</div><div class='add'>+	done</div><div class='add'>+</div><div class='head'>diff --git a/tools/docs/gen-redirects.py b/tools/docs/gen-redirects.py<br/>new file mode 100755<br/>index 000000000000..6a6ebf6f42dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/gen-redirects.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/gen-redirects.py</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+#! /usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Copyright © 2025, Oracle and/or its affiliates.</div><div class='add'>+# Author: Vegard Nossum &lt;vegard.nossum@oracle.com&gt;</div><div class='add'>+</div><div class='add'>+"""Generate HTML redirects for renamed Documentation/**.rst files using</div><div class='add'>+the output of tools/docs/gen-renames.py.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+    tools/docs/gen-redirects.py --output Documentation/output/ &lt; Documentation/.renames.txt</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import os</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+parser = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)</div><div class='add'>+parser.add_argument('-o', '--output', help='output directory')</div><div class='add'>+</div><div class='add'>+args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+for line in sys.stdin:</div><div class='add'>+    line = line.rstrip('\n')</div><div class='add'>+</div><div class='add'>+    old_name, new_name = line.split(' ', 2)</div><div class='add'>+</div><div class='add'>+    old_html_path = os.path.join(args.output, old_name + '.html')</div><div class='add'>+    new_html_path = os.path.join(args.output, new_name + '.html')</div><div class='add'>+</div><div class='add'>+    if not os.path.exists(new_html_path):</div><div class='add'>+        print(f"warning: target does not exist: {new_html_path} (redirect from {old_html_path})")</div><div class='add'>+        continue</div><div class='add'>+</div><div class='add'>+    old_html_dir = os.path.dirname(old_html_path)</div><div class='add'>+    if not os.path.exists(old_html_dir):</div><div class='add'>+        os.makedirs(old_html_dir)</div><div class='add'>+</div><div class='add'>+    relpath = os.path.relpath(new_name, os.path.dirname(old_name)) + '.html'</div><div class='add'>+</div><div class='add'>+    with open(old_html_path, 'w') as f:</div><div class='add'>+        print(f"""\</div><div class='add'>+&lt;!DOCTYPE html&gt;</div><div class='add'>+</div><div class='add'>+&lt;html lang="en"&gt;</div><div class='add'>+&lt;head&gt;</div><div class='add'>+    &lt;title&gt;This page has moved&lt;/title&gt;</div><div class='add'>+    &lt;meta http-equiv="refresh" content="0; url={relpath}"&gt;</div><div class='add'>+&lt;/head&gt;</div><div class='add'>+&lt;body&gt;</div><div class='add'>+&lt;p&gt;This page has moved to &lt;a href="{relpath}"&gt;{new_name}&lt;/a&gt;.&lt;/p&gt;</div><div class='add'>+&lt;/body&gt;</div><div class='add'>+&lt;/html&gt;""", file=f)</div><div class='head'>diff --git a/tools/docs/gen-renames.py b/tools/docs/gen-renames.py<br/>new file mode 100755<br/>index 000000000000..8cb3b2157d83<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/gen-renames.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/gen-renames.py</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+#! /usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Copyright © 2025, Oracle and/or its affiliates.</div><div class='add'>+# Author: Vegard Nossum &lt;vegard.nossum@oracle.com&gt;</div><div class='add'>+</div><div class='add'>+"""Trawl repository history for renames of Documentation/**.rst files.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+    tools/docs/gen-renames.py --rev HEAD &gt; Documentation/.renames.txt</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import itertools</div><div class='add'>+import os</div><div class='add'>+import subprocess</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+parser = argparse.ArgumentParser(description=__doc__, formatter_class=argparse.RawDescriptionHelpFormatter)</div><div class='add'>+parser.add_argument('--rev', default='HEAD', help='generate renames up to this revision')</div><div class='add'>+</div><div class='add'>+args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+def normalize(path):</div><div class='add'>+    prefix = 'Documentation/'</div><div class='add'>+    suffix = '.rst'</div><div class='add'>+</div><div class='add'>+    assert path.startswith(prefix)</div><div class='add'>+    assert path.endswith(suffix)</div><div class='add'>+</div><div class='add'>+    return path[len(prefix):-len(suffix)]</div><div class='add'>+</div><div class='add'>+class Name(object):</div><div class='add'>+    def __init__(self, name):</div><div class='add'>+        self.names = [name]</div><div class='add'>+</div><div class='add'>+    def rename(self, new_name):</div><div class='add'>+        self.names.append(new_name)</div><div class='add'>+</div><div class='add'>+names = {</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+for line in subprocess.check_output([</div><div class='add'>+    'git', 'log',</div><div class='add'>+    '--reverse',</div><div class='add'>+    '--oneline',</div><div class='add'>+    '--find-renames',</div><div class='add'>+    '--diff-filter=RD',</div><div class='add'>+    '--name-status',</div><div class='add'>+    '--format=commit %H',</div><div class='add'>+    # ~v4.8-ish is when Sphinx/.rst was added in the first place</div><div class='add'>+    f'v4.8..{args.rev}',</div><div class='add'>+    '--',</div><div class='add'>+    'Documentation/'</div><div class='add'>+], text=True).splitlines():</div><div class='add'>+    # rename</div><div class='add'>+    if line.startswith('R'):</div><div class='add'>+        _, old, new = line[1:].split('\t', 2)</div><div class='add'>+</div><div class='add'>+        if old.endswith('.rst') and new.endswith('.rst'):</div><div class='add'>+            old = normalize(old)</div><div class='add'>+            new = normalize(new)</div><div class='add'>+</div><div class='add'>+            name = names.get(old)</div><div class='add'>+            if name is None:</div><div class='add'>+                name = Name(old)</div><div class='add'>+            else:</div><div class='add'>+                del names[old]</div><div class='add'>+</div><div class='add'>+            name.rename(new)</div><div class='add'>+            names[new] = name</div><div class='add'>+</div><div class='add'>+        continue</div><div class='add'>+</div><div class='add'>+    # delete</div><div class='add'>+    if line.startswith('D'):</div><div class='add'>+        _, old = line.split('\t', 1)</div><div class='add'>+</div><div class='add'>+        if old.endswith('.rst'):</div><div class='add'>+            old = normalize(old)</div><div class='add'>+</div><div class='add'>+            # TODO: we could save added/modified files as well and propose</div><div class='add'>+            # them as alternatives</div><div class='add'>+            name = names.get(old)</div><div class='add'>+            if name is None:</div><div class='add'>+                pass</div><div class='add'>+            else:</div><div class='add'>+                del names[old]</div><div class='add'>+</div><div class='add'>+        continue</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Get the set of current files so we can sanity check that we aren't</div><div class='add'>+# redirecting any of those</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+current_files = set()</div><div class='add'>+for line in subprocess.check_output([</div><div class='add'>+    'git', 'ls-tree',</div><div class='add'>+    '-r',</div><div class='add'>+    '--name-only',</div><div class='add'>+    args.rev,</div><div class='add'>+    'Documentation/',</div><div class='add'>+], text=True).splitlines():</div><div class='add'>+    if line.endswith('.rst'):</div><div class='add'>+        current_files.add(normalize(line))</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Format/group/output result</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+result = []</div><div class='add'>+for _, v in names.items():</div><div class='add'>+    old_names = v.names[:-1]</div><div class='add'>+    new_name = v.names[-1]</div><div class='add'>+</div><div class='add'>+    for old_name in old_names:</div><div class='add'>+        if old_name == new_name:</div><div class='add'>+            # A file was renamed to its new name twice; don't redirect that</div><div class='add'>+            continue</div><div class='add'>+</div><div class='add'>+        if old_name in current_files:</div><div class='add'>+            # A file was recreated with a former name; don't redirect those</div><div class='add'>+            continue</div><div class='add'>+</div><div class='add'>+        result.append((old_name, new_name))</div><div class='add'>+</div><div class='add'>+for old_name, new_name in sorted(result):</div><div class='add'>+    print(f"{old_name} {new_name}")</div><div class='head'>diff --git a/tools/docs/get_abi.py b/tools/docs/get_abi.py<br/>new file mode 100755<br/>index 000000000000..2f0b99401f26<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/get_abi.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/get_abi.py</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# pylint: disable=R0903</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse ABI documentation and produce results from it.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import logging</div><div class='add'>+import os</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+# Import Python modules</div><div class='add'>+</div><div class='add'>+LIB_DIR = "../lib/python"</div><div class='add'>+SRC_DIR = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+</div><div class='add'>+sys.path.insert(0, os.path.join(SRC_DIR, LIB_DIR))</div><div class='add'>+</div><div class='add'>+from abi.abi_parser import AbiParser                # pylint: disable=C0413</div><div class='add'>+from abi.abi_regex import AbiRegex                  # pylint: disable=C0413</div><div class='add'>+from abi.helpers import ABI_DIR, DEBUG_HELP         # pylint: disable=C0413</div><div class='add'>+from abi.system_symbols import SystemSymbols        # pylint: disable=C0413</div><div class='add'>+</div><div class='add'>+# Command line classes</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+REST_DESC = """</div><div class='add'>+Produce output in ReST format.</div><div class='add'>+</div><div class='add'>+The output is done on two sections:</div><div class='add'>+</div><div class='add'>+- Symbols: show all parsed symbols in alphabetic order;</div><div class='add'>+- Files: cross reference the content of each file with the symbols on it.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+class AbiRest:</div><div class='add'>+    """Initialize an argparse subparser for rest output"""</div><div class='add'>+</div><div class='add'>+    def __init__(self, subparsers):</div><div class='add'>+        """Initialize argparse subparsers"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("rest",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description=REST_DESC)</div><div class='add'>+</div><div class='add'>+        parser.add_argument("--enable-lineno",  action="store_true",</div><div class='add'>+                            help="enable lineno")</div><div class='add'>+        parser.add_argument("--raw", action="store_true",</div><div class='add'>+                            help="output text as contained in the ABI files. "</div><div class='add'>+                                 "It not used, output will contain dynamically"</div><div class='add'>+                                 " generated cross references when possible.")</div><div class='add'>+        parser.add_argument("--no-file", action="store_true",</div><div class='add'>+                            help="Don't the files section")</div><div class='add'>+        parser.add_argument("--show-hints", help="Show-hints")</div><div class='add'>+</div><div class='add'>+        parser.set_defaults(func=self.run)</div><div class='add'>+</div><div class='add'>+    def run(self, args):</div><div class='add'>+        """Run subparser"""</div><div class='add'>+</div><div class='add'>+        parser = AbiParser(args.dir, debug=args.debug)</div><div class='add'>+        parser.parse_abi()</div><div class='add'>+        parser.check_issues()</div><div class='add'>+</div><div class='add'>+        for t in parser.doc(args.raw, not args.no_file):</div><div class='add'>+            if args.enable_lineno:</div><div class='add'>+                print (f".. LINENO {t[1]}#{t[2]}\n\n")</div><div class='add'>+</div><div class='add'>+            print(t[0])</div><div class='add'>+</div><div class='add'>+class AbiValidate:</div><div class='add'>+    """Initialize an argparse subparser for ABI validation"""</div><div class='add'>+</div><div class='add'>+    def __init__(self, subparsers):</div><div class='add'>+        """Initialize argparse subparsers"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("validate",</div><div class='add'>+                                       formatter_class=argparse.ArgumentDefaultsHelpFormatter,</div><div class='add'>+                                       description="list events")</div><div class='add'>+</div><div class='add'>+        parser.set_defaults(func=self.run)</div><div class='add'>+</div><div class='add'>+    def run(self, args):</div><div class='add'>+        """Run subparser"""</div><div class='add'>+</div><div class='add'>+        parser = AbiParser(args.dir, debug=args.debug)</div><div class='add'>+        parser.parse_abi()</div><div class='add'>+        parser.check_issues()</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class AbiSearch:</div><div class='add'>+    """Initialize an argparse subparser for ABI search"""</div><div class='add'>+</div><div class='add'>+    def __init__(self, subparsers):</div><div class='add'>+        """Initialize argparse subparsers"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("search",</div><div class='add'>+                                       formatter_class=argparse.ArgumentDefaultsHelpFormatter,</div><div class='add'>+                                       description="Search ABI using a regular expression")</div><div class='add'>+</div><div class='add'>+        parser.add_argument("expression",</div><div class='add'>+                            help="Case-insensitive search pattern for the ABI symbol")</div><div class='add'>+</div><div class='add'>+        parser.set_defaults(func=self.run)</div><div class='add'>+</div><div class='add'>+    def run(self, args):</div><div class='add'>+        """Run subparser"""</div><div class='add'>+</div><div class='add'>+        parser = AbiParser(args.dir, debug=args.debug)</div><div class='add'>+        parser.parse_abi()</div><div class='add'>+        parser.search_symbols(args.expression)</div><div class='add'>+</div><div class='add'>+UNDEFINED_DESC="""</div><div class='add'>+Check undefined ABIs on local machine.</div><div class='add'>+</div><div class='add'>+Read sysfs devnodes and check if the devnodes there are defined inside</div><div class='add'>+ABI documentation.</div><div class='add'>+</div><div class='add'>+The search logic tries to minimize the number of regular expressions to</div><div class='add'>+search per each symbol.</div><div class='add'>+</div><div class='add'>+By default, it runs on a single CPU, as Python support for CPU threads</div><div class='add'>+is still experimental, and multi-process runs on Python is very slow.</div><div class='add'>+</div><div class='add'>+On experimental tests, if the number of ABI symbols to search per devnode</div><div class='add'>+is contained on a limit of ~150 regular expressions, using a single CPU</div><div class='add'>+is a lot faster than using multiple processes. However, if the number of</div><div class='add'>+regular expressions to check is at the order of ~30000, using multiple</div><div class='add'>+CPUs speeds up the check.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+class AbiUndefined:</div><div class='add'>+    """</div><div class='add'>+    Initialize an argparse subparser for logic to check undefined ABI at</div><div class='add'>+    the current machine's sysfs</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, subparsers):</div><div class='add'>+        """Initialize argparse subparsers"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("undefined",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description=UNDEFINED_DESC)</div><div class='add'>+</div><div class='add'>+        parser.add_argument("-S", "--sysfs-dir", default="/sys",</div><div class='add'>+                            help="directory where sysfs is mounted")</div><div class='add'>+        parser.add_argument("-s", "--search-string",</div><div class='add'>+                            help="search string regular expression to limit symbol search")</div><div class='add'>+        parser.add_argument("-H", "--show-hints", action="store_true",</div><div class='add'>+                            help="Hints about definitions for missing ABI symbols.")</div><div class='add'>+        parser.add_argument("-j", "--jobs", "--max-workers", type=int, default=1,</div><div class='add'>+                            help="If bigger than one, enables multiprocessing.")</div><div class='add'>+        parser.add_argument("-c", "--max-chunk-size", type=int, default=50,</div><div class='add'>+                            help="Maximum number of chunk size")</div><div class='add'>+        parser.add_argument("-f", "--found", action="store_true",</div><div class='add'>+                            help="Also show found items. "</div><div class='add'>+                                 "Helpful to debug the parser."),</div><div class='add'>+        parser.add_argument("-d", "--dry-run", action="store_true",</div><div class='add'>+                            help="Don't actually search for undefined. "</div><div class='add'>+                                 "Helpful to debug the parser."),</div><div class='add'>+</div><div class='add'>+        parser.set_defaults(func=self.run)</div><div class='add'>+</div><div class='add'>+    def run(self, args):</div><div class='add'>+        """Run subparser"""</div><div class='add'>+</div><div class='add'>+        abi = AbiRegex(args.dir, debug=args.debug,</div><div class='add'>+                       search_string=args.search_string)</div><div class='add'>+</div><div class='add'>+        abi_symbols = SystemSymbols(abi=abi, hints=args.show_hints,</div><div class='add'>+                                    sysfs=args.sysfs_dir)</div><div class='add'>+</div><div class='add'>+        abi_symbols.check_undefined_symbols(dry_run=args.dry_run,</div><div class='add'>+                                            found=args.found,</div><div class='add'>+                                            max_workers=args.jobs,</div><div class='add'>+                                            chunk_size=args.max_chunk_size)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """Main program"""</div><div class='add'>+</div><div class='add'>+    parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter)</div><div class='add'>+</div><div class='add'>+    parser.add_argument("-d", "--debug", type=int, default=0, help="debug level")</div><div class='add'>+    parser.add_argument("-D", "--dir", default=ABI_DIR, help=DEBUG_HELP)</div><div class='add'>+</div><div class='add'>+    subparsers = parser.add_subparsers()</div><div class='add'>+</div><div class='add'>+    AbiRest(subparsers)</div><div class='add'>+    AbiValidate(subparsers)</div><div class='add'>+    AbiSearch(subparsers)</div><div class='add'>+    AbiUndefined(subparsers)</div><div class='add'>+</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    if args.debug:</div><div class='add'>+        level = logging.DEBUG</div><div class='add'>+    else:</div><div class='add'>+        level = logging.INFO</div><div class='add'>+</div><div class='add'>+    logging.basicConfig(level=level, format="[%(levelname)s] %(message)s")</div><div class='add'>+</div><div class='add'>+    if "func" in args:</div><div class='add'>+        args.func(args)</div><div class='add'>+    else:</div><div class='add'>+        sys.exit(f"Please specify a valid command for {sys.argv[0]}")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+# Call main method</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/get_feat.py b/tools/docs/get_feat.py<br/>new file mode 100755<br/>index 000000000000..2b5155a1f134<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/get_feat.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/get_feat.py</a></div><div class='hunk'>@@ -0,0 +1,225 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# pylint: disable=R0902,R0911,R0912,R0914,R0915</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse the Linux Feature files and produce a ReST book.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import os</div><div class='add'>+import subprocess</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from pprint import pprint</div><div class='add'>+</div><div class='add'>+LIB_DIR = "../../tools/lib/python"</div><div class='add'>+SRC_DIR = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+</div><div class='add'>+sys.path.insert(0, os.path.join(SRC_DIR, LIB_DIR))</div><div class='add'>+</div><div class='add'>+from feat.parse_features import ParseFeature                # pylint: disable=C0413</div><div class='add'>+</div><div class='add'>+SRCTREE = os.path.join(os.path.dirname(os.path.realpath(__file__)), "../..")</div><div class='add'>+DEFAULT_DIR = "Documentation/features"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class GetFeature:</div><div class='add'>+    """Helper class to parse feature parsing parameters"""</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def get_current_arch():</div><div class='add'>+        """Detects the current architecture"""</div><div class='add'>+</div><div class='add'>+        proc = subprocess.run(["uname", "-m"], check=True,</div><div class='add'>+                              capture_output=True, text=True)</div><div class='add'>+</div><div class='add'>+        arch = proc.stdout.strip()</div><div class='add'>+        if arch in ["x86_64", "i386"]:</div><div class='add'>+            arch = "x86"</div><div class='add'>+        elif arch == "s390x":</div><div class='add'>+            arch = "s390"</div><div class='add'>+</div><div class='add'>+        return arch</div><div class='add'>+</div><div class='add'>+    def run_parser(self, args):</div><div class='add'>+        """Execute the feature parser"""</div><div class='add'>+</div><div class='add'>+        feat = ParseFeature(args.directory, args.debug, args.enable_fname)</div><div class='add'>+        data = feat.parse()</div><div class='add'>+</div><div class='add'>+        if args.debug &gt; 2:</div><div class='add'>+            pprint(data)</div><div class='add'>+</div><div class='add'>+        return feat</div><div class='add'>+</div><div class='add'>+    def run_rest(self, args):</div><div class='add'>+        """</div><div class='add'>+        Generate tables in ReST format. Three types of tables are</div><div class='add'>+        supported, depending on the calling arguments:</div><div class='add'>+</div><div class='add'>+        - neither feature nor arch is passed: generates a full matrix;</div><div class='add'>+        - arch provided: generates a table of supported tables for the</div><div class='add'>+          guiven architecture, eventually filtered by feature;</div><div class='add'>+        - only feature provided: generates a table with feature details,</div><div class='add'>+          showing what architectures it is implemented.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        feat = self.run_parser(args)</div><div class='add'>+</div><div class='add'>+        if args.arch:</div><div class='add'>+            rst = feat.output_arch_table(args.arch, args.feat)</div><div class='add'>+        elif args.feat:</div><div class='add'>+            rst = feat.output_feature(args.feat)</div><div class='add'>+        else:</div><div class='add'>+            rst = feat.output_matrix()</div><div class='add'>+</div><div class='add'>+        print(rst)</div><div class='add'>+</div><div class='add'>+    def run_current(self, args):</div><div class='add'>+        """</div><div class='add'>+        Instead of using a --arch parameter, get feature for the current</div><div class='add'>+        architecture.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        args.arch = self.get_current_arch()</div><div class='add'>+</div><div class='add'>+        self.run_rest(args)</div><div class='add'>+</div><div class='add'>+    def run_list(self, args):</div><div class='add'>+        """</div><div class='add'>+        Generate a list of features for a given architecture, in a format</div><div class='add'>+        parseable by other scripts. The output format is not ReST.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not args.arch:</div><div class='add'>+            args.arch = self.get_current_arch()</div><div class='add'>+</div><div class='add'>+        feat = self.run_parser(args)</div><div class='add'>+        msg = feat.list_arch_features(args.arch, args.feat)</div><div class='add'>+</div><div class='add'>+        print(msg)</div><div class='add'>+</div><div class='add'>+    def parse_arch(self, parser):</div><div class='add'>+        """Add a --arch parsing argument"""</div><div class='add'>+</div><div class='add'>+        parser.add_argument("--arch",</div><div class='add'>+                            help="Output features for an specific"</div><div class='add'>+                                 " architecture, optionally filtering for a "</div><div class='add'>+                                 "single specific feature.")</div><div class='add'>+</div><div class='add'>+    def parse_feat(self, parser):</div><div class='add'>+        """Add a --feat parsing argument"""</div><div class='add'>+</div><div class='add'>+        parser.add_argument("--feat", "--feature",</div><div class='add'>+                            help="Output features for a single specific "</div><div class='add'>+                                  "feature.")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def current_args(self, subparsers):</div><div class='add'>+        """Implementscurrent argparse subparser"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("current",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description="Output table in ReST "</div><div class='add'>+                                                   "compatible ASCII format "</div><div class='add'>+                                                   "with features for this "</div><div class='add'>+                                                   "machine's architecture")</div><div class='add'>+</div><div class='add'>+        self.parse_feat(parser)</div><div class='add'>+        parser.set_defaults(func=self.run_current)</div><div class='add'>+</div><div class='add'>+    def rest_args(self, subparsers):</div><div class='add'>+        """Implement rest argparse subparser"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("rest",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description="Output table(s) in ReST "</div><div class='add'>+                                                   "compatible ASCII format "</div><div class='add'>+                                                   "with features in ReST "</div><div class='add'>+                                                   "markup language. The "</div><div class='add'>+                                                   "output is affected by "</div><div class='add'>+                                                   "--arch or --feat/--feature"</div><div class='add'>+                                                   " flags.")</div><div class='add'>+</div><div class='add'>+        self.parse_arch(parser)</div><div class='add'>+        self.parse_feat(parser)</div><div class='add'>+        parser.set_defaults(func=self.run_rest)</div><div class='add'>+</div><div class='add'>+    def list_args(self, subparsers):</div><div class='add'>+        """Implement list argparse subparser"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("list",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description="List features for this "</div><div class='add'>+                                                   "machine's architecture, "</div><div class='add'>+                                                   "using an easier to parse "</div><div class='add'>+                                                   "format. The output is "</div><div class='add'>+                                                   "affected by --arch flag.")</div><div class='add'>+</div><div class='add'>+        self.parse_arch(parser)</div><div class='add'>+        self.parse_feat(parser)</div><div class='add'>+        parser.set_defaults(func=self.run_list)</div><div class='add'>+</div><div class='add'>+    def validate_args(self, subparsers):</div><div class='add'>+        """Implement validate argparse subparser"""</div><div class='add'>+</div><div class='add'>+        parser = subparsers.add_parser("validate",</div><div class='add'>+                                       formatter_class=argparse.RawTextHelpFormatter,</div><div class='add'>+                                       description="Validate the contents of "</div><div class='add'>+                                                   "the files under "</div><div class='add'>+                                                   f"{DEFAULT_DIR}.")</div><div class='add'>+</div><div class='add'>+        parser.set_defaults(func=self.run_parser)</div><div class='add'>+</div><div class='add'>+    def parser(self):</div><div class='add'>+        """</div><div class='add'>+        Create an arparse with common options and several subparsers</div><div class='add'>+        """</div><div class='add'>+        parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter)</div><div class='add'>+</div><div class='add'>+        parser.add_argument("-d", "--debug", action="count", default=0,</div><div class='add'>+                            help="Put the script in verbose mode, useful for "</div><div class='add'>+                                 "debugging. Can be called multiple times, to "</div><div class='add'>+                                 "increase verbosity.")</div><div class='add'>+</div><div class='add'>+        parser.add_argument("--directory", "--dir", default=DEFAULT_DIR,</div><div class='add'>+                            help="Changes the location of the Feature files. "</div><div class='add'>+                                 f"By default, it uses the {DEFAULT_DIR} "</div><div class='add'>+                                 "directory.")</div><div class='add'>+</div><div class='add'>+        parser.add_argument("--enable-fname", action="store_true",</div><div class='add'>+                            help="Prints the file name of the feature files. "</div><div class='add'>+                                 "This can be used in order to track "</div><div class='add'>+                                 "dependencies during documentation build.")</div><div class='add'>+</div><div class='add'>+        subparsers = parser.add_subparsers()</div><div class='add'>+</div><div class='add'>+        self.current_args(subparsers)</div><div class='add'>+        self.rest_args(subparsers)</div><div class='add'>+        self.list_args(subparsers)</div><div class='add'>+        self.validate_args(subparsers)</div><div class='add'>+</div><div class='add'>+        args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+        return args</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """Main program"""</div><div class='add'>+</div><div class='add'>+    feat = GetFeature()</div><div class='add'>+</div><div class='add'>+    args = feat.parser()</div><div class='add'>+</div><div class='add'>+    if "func" in args:</div><div class='add'>+        args.func(args)</div><div class='add'>+    else:</div><div class='add'>+        sys.exit(f"Please specify a valid command for {sys.argv[0]}")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+# Call main method</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/list-arch.sh b/tools/docs/list-arch.sh<br/>new file mode 100755<br/>index 000000000000..96fe83b7058b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/list-arch.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/list-arch.sh</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Small script that visualizes the kernel feature support status</div><div class='add'>+# of an architecture.</div><div class='add'>+#</div><div class='add'>+# (If no arguments are given then it will print the host architecture's status.)</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+ARCH=${1:-$(uname -m | sed 's/x86_64/x86/' | sed 's/i386/x86/' | sed 's/s390x/s390/')}</div><div class='add'>+</div><div class='add'>+$(dirname $0)/get_feat.pl list --arch $ARCH</div><div class='head'>diff --git a/tools/docs/parse-headers.py b/tools/docs/parse-headers.py<br/>new file mode 100755<br/>index 000000000000..436acea4c6ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/parse-headers.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/parse-headers.py</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2016, 2025 by Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# pylint: disable=C0103</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Convert a C header or source file ``FILE_IN``, into a ReStructured Text</div><div class='add'>+included via ..parsed-literal block with cross-references for the</div><div class='add'>+documentation files that describe the API. It accepts an optional</div><div class='add'>+``FILE_RULES`` file to describes what elements will be either ignored or</div><div class='add'>+be pointed to a non-default reference type/name.</div><div class='add'>+</div><div class='add'>+The output is written at ``FILE_OUT``.</div><div class='add'>+</div><div class='add'>+It is capable of identifying defines, functions, structs, typedefs,</div><div class='add'>+enums and enum symbols and create cross-references for all of them.</div><div class='add'>+It is also capable of distinguish #define used for specifying a Linux</div><div class='add'>+ioctl.</div><div class='add'>+</div><div class='add'>+The optional ``FILE_RULES`` contains a set of rules like:</div><div class='add'>+</div><div class='add'>+    ignore ioctl VIDIOC_ENUM_FMT</div><div class='add'>+    replace ioctl VIDIOC_DQBUF vidioc_qbuf</div><div class='add'>+    replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det`</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse, sys</div><div class='add'>+import os.path</div><div class='add'>+</div><div class='add'>+src_dir = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+sys.path.insert(0, os.path.join(src_dir, '../lib/python'))</div><div class='add'>+from kdoc.parse_data_structs import ParseDataStructs</div><div class='add'>+from kdoc.enrich_formatter import EnrichFormatter</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """Main function"""</div><div class='add'>+    parser = argparse.ArgumentParser(description=__doc__,</div><div class='add'>+                                     formatter_class=EnrichFormatter)</div><div class='add'>+</div><div class='add'>+    parser.add_argument("-d", "--debug", action="count", default=0,</div><div class='add'>+                        help="Increase debug level. Can be used multiple times")</div><div class='add'>+    parser.add_argument("-t", "--toc", action="store_true",</div><div class='add'>+                        help="instead of a literal block, outputs a TOC table at the RST file")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("file_in", help="Input C file")</div><div class='add'>+    parser.add_argument("file_out", help="Output RST file")</div><div class='add'>+    parser.add_argument("file_rules", nargs="?",</div><div class='add'>+                        help="Exceptions file (optional)")</div><div class='add'>+</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    parser = ParseDataStructs(debug=args.debug)</div><div class='add'>+    parser.parse_file(args.file_in, args.file_rules)</div><div class='add'>+</div><div class='add'>+    parser.debug_print()</div><div class='add'>+    parser.write_output(args.file_in, args.file_out, args.toc)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/sphinx-build-wrapper b/tools/docs/sphinx-build-wrapper<br/>new file mode 100755<br/>index 000000000000..7a5fcef25429<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/sphinx-build-wrapper?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/sphinx-build-wrapper</a></div><div class='hunk'>@@ -0,0 +1,864 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (C) 2025 Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;</div><div class='add'>+#</div><div class='add'>+# pylint: disable=R0902, R0912, R0913, R0914, R0915, R0917, C0103</div><div class='add'>+#</div><div class='add'>+# Converted from docs Makefile and parallel-wrapper.sh, both under</div><div class='add'>+# GPLv2, copyrighted since 2008 by the following authors:</div><div class='add'>+#</div><div class='add'>+#    Akira Yokosawa &lt;akiyks@gmail.com&gt;</div><div class='add'>+#    Arnd Bergmann &lt;arnd@arndb.de&gt;</div><div class='add'>+#    Breno Leitao &lt;leitao@debian.org&gt;</div><div class='add'>+#    Carlos Bilbao &lt;carlos.bilbao@amd.com&gt;</div><div class='add'>+#    Dave Young &lt;dyoung@redhat.com&gt;</div><div class='add'>+#    Donald Hunter &lt;donald.hunter@gmail.com&gt;</div><div class='add'>+#    Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+#    Jani Nikula &lt;jani.nikula@intel.com&gt;</div><div class='add'>+#    Jan Stancek &lt;jstancek@redhat.com&gt;</div><div class='add'>+#    Jonathan Corbet &lt;corbet@lwn.net&gt;</div><div class='add'>+#    Joshua Clayton &lt;stillcompiling@gmail.com&gt;</div><div class='add'>+#    Kees Cook &lt;keescook@chromium.org&gt;</div><div class='add'>+#    Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</div><div class='add'>+#    Magnus Damm &lt;damm+renesas@opensource.se&gt;</div><div class='add'>+#    Masahiro Yamada &lt;masahiroy@kernel.org&gt;</div><div class='add'>+#    Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;</div><div class='add'>+#    Maxim Cournoyer &lt;maxim.cournoyer@gmail.com&gt;</div><div class='add'>+#    Peter Foley &lt;pefoley2@pefoley.com&gt;</div><div class='add'>+#    Randy Dunlap &lt;rdunlap@infradead.org&gt;</div><div class='add'>+#    Rob Herring &lt;robh@kernel.org&gt;</div><div class='add'>+#    Shuah Khan &lt;shuahkh@osg.samsung.com&gt;</div><div class='add'>+#    Thorsten Blum &lt;thorsten.blum@toblux.com&gt;</div><div class='add'>+#    Tomas Winkler &lt;tomas.winkler@intel.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Sphinx build wrapper that handles Kernel-specific business rules:</div><div class='add'>+</div><div class='add'>+- it gets the Kernel build environment vars;</div><div class='add'>+- it determines what's the best parallelism;</div><div class='add'>+- it handles SPHINXDIRS</div><div class='add'>+</div><div class='add'>+This tool ensures that MIN_PYTHON_VERSION is satisfied. If version is</div><div class='add'>+below that, it seeks for a new Python version. If found, it re-runs using</div><div class='add'>+the newer version.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import locale</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import shlex</div><div class='add'>+import shutil</div><div class='add'>+import subprocess</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from concurrent import futures</div><div class='add'>+from glob import glob</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+LIB_DIR = "../lib/python"</div><div class='add'>+SRC_DIR = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+</div><div class='add'>+sys.path.insert(0, os.path.join(SRC_DIR, LIB_DIR))</div><div class='add'>+</div><div class='add'>+from kdoc.python_version import PythonVersion</div><div class='add'>+from kdoc.latex_fonts import LatexFontChecker</div><div class='add'>+from jobserver import JobserverExec         # pylint: disable=C0413,C0411,E0401</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+#  Some constants</div><div class='add'>+#</div><div class='add'>+VENV_DEFAULT = "sphinx_latest"</div><div class='add'>+MIN_PYTHON_VERSION = PythonVersion("3.7").version</div><div class='add'>+PAPER = ["", "a4", "letter"]</div><div class='add'>+</div><div class='add'>+TARGETS = {</div><div class='add'>+    "cleandocs":     { "builder": "clean" },</div><div class='add'>+    "linkcheckdocs": { "builder": "linkcheck" },</div><div class='add'>+    "htmldocs":      { "builder": "html" },</div><div class='add'>+    "epubdocs":      { "builder": "epub",    "out_dir": "epub" },</div><div class='add'>+    "texinfodocs":   { "builder": "texinfo", "out_dir": "texinfo" },</div><div class='add'>+    "infodocs":      { "builder": "texinfo", "out_dir": "texinfo" },</div><div class='add'>+    "mandocs":       { "builder": "man",     "out_dir": "man" },</div><div class='add'>+    "latexdocs":     { "builder": "latex",   "out_dir": "latex" },</div><div class='add'>+    "pdfdocs":       { "builder": "latex",   "out_dir": "latex" },</div><div class='add'>+    "xmldocs":       { "builder": "xml",     "out_dir": "xml" },</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# SphinxBuilder class</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+class SphinxBuilder:</div><div class='add'>+    """</div><div class='add'>+    Handles a sphinx-build target, adding needed arguments to build</div><div class='add'>+    with the Kernel.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def get_path(self, path, use_cwd=False, abs_path=False):</div><div class='add'>+        """</div><div class='add'>+        Ancillary routine to handle patches the right way, as shell does.</div><div class='add'>+</div><div class='add'>+        It first expands "~" and "~user". Then, if patch is not absolute,</div><div class='add'>+        join self.srctree. Finally, if requested, convert to abspath.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        path = os.path.expanduser(path)</div><div class='add'>+        if not path.startswith("/"):</div><div class='add'>+            if use_cwd:</div><div class='add'>+                base = os.getcwd()</div><div class='add'>+            else:</div><div class='add'>+                base = self.srctree</div><div class='add'>+</div><div class='add'>+            path = os.path.join(base, path)</div><div class='add'>+</div><div class='add'>+        if abs_path:</div><div class='add'>+            return os.path.abspath(path)</div><div class='add'>+</div><div class='add'>+        return path</div><div class='add'>+</div><div class='add'>+    def check_rust(self):</div><div class='add'>+        """</div><div class='add'>+        Checks if Rust is enabled</div><div class='add'>+        """</div><div class='add'>+        self.rustdoc = False</div><div class='add'>+</div><div class='add'>+        config = os.path.join(self.srctree, ".config")</div><div class='add'>+</div><div class='add'>+        if not os.path.isfile(config):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        re_rust = re.compile(r"CONFIG_RUST=(m|y)")</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            with open(config, "r", encoding="utf-8") as fp:</div><div class='add'>+                for line in fp:</div><div class='add'>+                    if re_rust.match(line):</div><div class='add'>+                        self.rustdoc = True</div><div class='add'>+                        return</div><div class='add'>+</div><div class='add'>+        except OSError as e:</div><div class='add'>+            print(f"Failed to open {config}", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+    def get_sphinx_extra_opts(self, n_jobs):</div><div class='add'>+        """</div><div class='add'>+        Get the number of jobs to be used for docs build passed via command</div><div class='add'>+        line and desired sphinx verbosity.</div><div class='add'>+</div><div class='add'>+        The number of jobs can be on different places:</div><div class='add'>+</div><div class='add'>+        1) It can be passed via "-j" argument;</div><div class='add'>+        2) The SPHINXOPTS="-j8" env var may have "-j";</div><div class='add'>+        3) if called via GNU make, -j specifies the desired number of jobs.</div><div class='add'>+           with GNU makefile, this number is available via POSIX jobserver;</div><div class='add'>+        4) if none of the above is available, it should default to "-jauto",</div><div class='add'>+           and let sphinx decide the best value.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # SPHINXOPTS env var, if used, contains extra arguments to be used</div><div class='add'>+        # by sphinx-build time. Among them, it may contain sphinx verbosity</div><div class='add'>+        # and desired number of parallel jobs.</div><div class='add'>+        #</div><div class='add'>+        parser = argparse.ArgumentParser()</div><div class='add'>+        parser.add_argument('-j', '--jobs', type=int)</div><div class='add'>+        parser.add_argument('-q', '--quiet', action='store_true')</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Other sphinx-build arguments go as-is, so place them</div><div class='add'>+        # at self.sphinxopts, using shell parser</div><div class='add'>+        #</div><div class='add'>+        sphinxopts = shlex.split(os.environ.get("SPHINXOPTS", ""))</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Build a list of sphinx args, honoring verbosity here if specified</div><div class='add'>+        #</div><div class='add'>+</div><div class='add'>+        verbose = self.verbose</div><div class='add'>+        sphinx_args, self.sphinxopts = parser.parse_known_args(sphinxopts)</div><div class='add'>+        if sphinx_args.quiet is True:</div><div class='add'>+            verbose = False</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # If the user explicitly sets "-j" at command line, use it.</div><div class='add'>+        # Otherwise, pick it from SPHINXOPTS args</div><div class='add'>+        #</div><div class='add'>+        if n_jobs:</div><div class='add'>+            self.n_jobs = n_jobs</div><div class='add'>+        elif sphinx_args.jobs:</div><div class='add'>+            self.n_jobs = sphinx_args.jobs</div><div class='add'>+        else:</div><div class='add'>+            self.n_jobs = None</div><div class='add'>+</div><div class='add'>+        if not verbose:</div><div class='add'>+            self.sphinxopts += ["-q"]</div><div class='add'>+</div><div class='add'>+    def __init__(self, builddir, venv=None, verbose=False, n_jobs=None,</div><div class='add'>+                 interactive=None):</div><div class='add'>+        """Initialize internal variables"""</div><div class='add'>+        self.venv = venv</div><div class='add'>+        self.verbose = None</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Normal variables passed from Kernel's makefile</div><div class='add'>+        #</div><div class='add'>+        self.kernelversion = os.environ.get("KERNELVERSION", "unknown")</div><div class='add'>+        self.kernelrelease = os.environ.get("KERNELRELEASE", "unknown")</div><div class='add'>+        self.pdflatex = os.environ.get("PDFLATEX", "xelatex")</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Kernel main Makefile defines a PYTHON3 variable whose default is</div><div class='add'>+        # "python3". When set to a different value, it allows running a</div><div class='add'>+        # diferent version than the default official python3 package.</div><div class='add'>+        # Several distros package python3xx-sphinx packages with newer</div><div class='add'>+        # versions of Python and sphinx-build.</div><div class='add'>+        #</div><div class='add'>+        # Honor such variable different than default</div><div class='add'>+        #</div><div class='add'>+        self.python = os.environ.get("PYTHON3")</div><div class='add'>+        if self.python == "python3":</div><div class='add'>+            self.python = None</div><div class='add'>+</div><div class='add'>+        if not interactive:</div><div class='add'>+            self.latexopts = os.environ.get("LATEXOPTS", "-interaction=batchmode -no-shell-escape")</div><div class='add'>+        else:</div><div class='add'>+            self.latexopts = os.environ.get("LATEXOPTS", "")</div><div class='add'>+</div><div class='add'>+        if not verbose:</div><div class='add'>+            verbose = bool(os.environ.get("KBUILD_VERBOSE", "") != "")</div><div class='add'>+</div><div class='add'>+        if verbose is not None:</div><div class='add'>+            self.verbose = verbose</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Source tree directory. This needs to be at os.environ, as</div><div class='add'>+        # Sphinx extensions use it</div><div class='add'>+        #</div><div class='add'>+        self.srctree = os.environ.get("srctree")</div><div class='add'>+        if not self.srctree:</div><div class='add'>+            self.srctree = "."</div><div class='add'>+            os.environ["srctree"] = self.srctree</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Now that we can expand srctree, get other directories as well</div><div class='add'>+        #</div><div class='add'>+        self.sphinxbuild = os.environ.get("SPHINXBUILD", "sphinx-build")</div><div class='add'>+        self.kerneldoc = self.get_path(os.environ.get("KERNELDOC",</div><div class='add'>+                                                      "scripts/kernel-doc.py"))</div><div class='add'>+        self.builddir = self.get_path(builddir, use_cwd=True, abs_path=True)</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Get directory locations for LaTeX build toolchain</div><div class='add'>+        #</div><div class='add'>+        self.pdflatex_cmd = shutil.which(self.pdflatex)</div><div class='add'>+        self.latexmk_cmd = shutil.which("latexmk")</div><div class='add'>+</div><div class='add'>+        self.env = os.environ.copy()</div><div class='add'>+</div><div class='add'>+        self.get_sphinx_extra_opts(n_jobs)</div><div class='add'>+</div><div class='add'>+        self.check_rust()</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # If venv command line argument is specified, run Sphinx from venv</div><div class='add'>+        #</div><div class='add'>+        if venv:</div><div class='add'>+            bin_dir = os.path.join(venv, "bin")</div><div class='add'>+            if not os.path.isfile(os.path.join(bin_dir, "activate")):</div><div class='add'>+                sys.exit(f"Venv {venv} not found.")</div><div class='add'>+</div><div class='add'>+            # "activate" virtual env</div><div class='add'>+            self.env["PATH"] = bin_dir + ":" + self.env["PATH"]</div><div class='add'>+            self.env["VIRTUAL_ENV"] = venv</div><div class='add'>+            if "PYTHONHOME" in self.env:</div><div class='add'>+                del self.env["PYTHONHOME"]</div><div class='add'>+            print(f"Setting venv to {venv}")</div><div class='add'>+</div><div class='add'>+    def run_sphinx(self, sphinx_build, build_args, *args, **pwargs):</div><div class='add'>+        """</div><div class='add'>+        Executes sphinx-build using current python3 command.</div><div class='add'>+</div><div class='add'>+        When calling via GNU make, POSIX jobserver is used to tell how</div><div class='add'>+        many jobs are still available from a job pool. claim all remaining</div><div class='add'>+        jobs, as we don't want sphinx-build to run in parallel with other</div><div class='add'>+        jobs.</div><div class='add'>+</div><div class='add'>+        Despite that, the user may actually force a different value than</div><div class='add'>+        the number of available jobs via command line.</div><div class='add'>+</div><div class='add'>+        The "with" logic here is used to ensure that the claimed jobs will</div><div class='add'>+        be freed once subprocess finishes</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        with JobserverExec() as jobserver:</div><div class='add'>+            if jobserver.claim:</div><div class='add'>+                #</div><div class='add'>+                # when GNU make is used, claim available jobs from jobserver</div><div class='add'>+                #</div><div class='add'>+                n_jobs = str(jobserver.claim)</div><div class='add'>+            else:</div><div class='add'>+                #</div><div class='add'>+                # Otherwise, let sphinx decide by default</div><div class='add'>+                #</div><div class='add'>+                n_jobs = "auto"</div><div class='add'>+</div><div class='add'>+            #</div><div class='add'>+            # If explicitly requested via command line, override default</div><div class='add'>+            #</div><div class='add'>+            if self.n_jobs:</div><div class='add'>+                n_jobs = str(self.n_jobs)</div><div class='add'>+</div><div class='add'>+            #</div><div class='add'>+            # We can't simply call python3 sphinx-build, as OpenSUSE</div><div class='add'>+            # Tumbleweed uses an ELF binary file (/usr/bin/alts) to switch</div><div class='add'>+            # between different versions of sphinx-build. So, only call it</div><div class='add'>+            # prepending "python3.xx" when PYTHON3 variable is not default.</div><div class='add'>+            #</div><div class='add'>+            if self.python:</div><div class='add'>+                cmd = [self.python]</div><div class='add'>+            else:</div><div class='add'>+                cmd = []</div><div class='add'>+</div><div class='add'>+            cmd += [sphinx_build]</div><div class='add'>+            cmd += [f"-j{n_jobs}"]</div><div class='add'>+            cmd += build_args</div><div class='add'>+            cmd += self.sphinxopts</div><div class='add'>+</div><div class='add'>+            if self.verbose:</div><div class='add'>+                print(" ".join(cmd))</div><div class='add'>+</div><div class='add'>+            return subprocess.call(cmd, *args, **pwargs)</div><div class='add'>+</div><div class='add'>+    def handle_html(self, css, output_dir):</div><div class='add'>+        """</div><div class='add'>+        Extra steps for HTML and epub output.</div><div class='add'>+</div><div class='add'>+        For such targets, we need to ensure that CSS will be properly</div><div class='add'>+        copied to the output _static directory</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if css:</div><div class='add'>+            css = os.path.expanduser(css)</div><div class='add'>+            if not css.startswith("/"):</div><div class='add'>+                css = os.path.join(self.srctree, css)</div><div class='add'>+</div><div class='add'>+            static_dir = os.path.join(output_dir, "_static")</div><div class='add'>+            os.makedirs(static_dir, exist_ok=True)</div><div class='add'>+</div><div class='add'>+            try:</div><div class='add'>+                shutil.copy2(css, static_dir)</div><div class='add'>+            except (OSError, IOError) as e:</div><div class='add'>+                print(f"Warning: Failed to copy CSS: {e}", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        if self.rustdoc:</div><div class='add'>+            print("Building rust docs")</div><div class='add'>+            if "MAKE" in self.env:</div><div class='add'>+                cmd = [self.env["MAKE"]]</div><div class='add'>+            else:</div><div class='add'>+                cmd = ["make", "LLVM=1"]</div><div class='add'>+</div><div class='add'>+            cmd += [ "rustdoc"]</div><div class='add'>+            if self.verbose:</div><div class='add'>+                print(" ".join(cmd))</div><div class='add'>+</div><div class='add'>+            try:</div><div class='add'>+                subprocess.run(cmd, check=True)</div><div class='add'>+            except subprocess.CalledProcessError as e:</div><div class='add'>+                print(f"Ignored errors when building rustdoc: {e}. Is RUST enabled?",</div><div class='add'>+                      file=sys.stderr)</div><div class='add'>+</div><div class='add'>+    def build_pdf_file(self, latex_cmd, from_dir, path):</div><div class='add'>+        """Builds a single pdf file using latex_cmd"""</div><div class='add'>+        try:</div><div class='add'>+            subprocess.run(latex_cmd + [path],</div><div class='add'>+                            cwd=from_dir, check=True, env=self.env)</div><div class='add'>+</div><div class='add'>+            return True</div><div class='add'>+        except subprocess.CalledProcessError:</div><div class='add'>+            return False</div><div class='add'>+</div><div class='add'>+    def pdf_parallel_build(self, tex_suffix, latex_cmd, tex_files, n_jobs):</div><div class='add'>+        """Build PDF files in parallel if possible"""</div><div class='add'>+        builds = {}</div><div class='add'>+        build_failed = False</div><div class='add'>+        max_len = 0</div><div class='add'>+        has_tex = False</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # LaTeX PDF error code is almost useless for us:</div><div class='add'>+        # any warning makes it non-zero. For kernel doc builds it always return</div><div class='add'>+        # non-zero even when build succeeds. So, let's do the best next thing:</div><div class='add'>+        # Ignore build errors. At the end, check if all PDF files were built,</div><div class='add'>+        # printing a summary with the built ones and returning 0 if all of</div><div class='add'>+        # them were actually built.</div><div class='add'>+        #</div><div class='add'>+        with futures.ThreadPoolExecutor(max_workers=n_jobs) as executor:</div><div class='add'>+            jobs = {}</div><div class='add'>+</div><div class='add'>+            for from_dir, pdf_dir, entry in tex_files:</div><div class='add'>+                name = entry.name</div><div class='add'>+</div><div class='add'>+                if not name.endswith(tex_suffix):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                name = name[:-len(tex_suffix)]</div><div class='add'>+                has_tex = True</div><div class='add'>+</div><div class='add'>+                future = executor.submit(self.build_pdf_file, latex_cmd,</div><div class='add'>+                                         from_dir, entry.path)</div><div class='add'>+                jobs[future] = (from_dir, pdf_dir, name)</div><div class='add'>+</div><div class='add'>+            for future in futures.as_completed(jobs):</div><div class='add'>+                from_dir, pdf_dir, name = jobs[future]</div><div class='add'>+</div><div class='add'>+                pdf_name = name + ".pdf"</div><div class='add'>+                pdf_from = os.path.join(from_dir, pdf_name)</div><div class='add'>+                pdf_to = os.path.join(pdf_dir, pdf_name)</div><div class='add'>+                out_name = os.path.relpath(pdf_to, self.builddir)</div><div class='add'>+                max_len = max(max_len, len(out_name))</div><div class='add'>+</div><div class='add'>+                try:</div><div class='add'>+                    success = future.result()</div><div class='add'>+</div><div class='add'>+                    if success and os.path.exists(pdf_from):</div><div class='add'>+                        os.rename(pdf_from, pdf_to)</div><div class='add'>+</div><div class='add'>+                        #</div><div class='add'>+                        # if verbose, get the name of built PDF file</div><div class='add'>+                        #</div><div class='add'>+                        if self.verbose:</div><div class='add'>+                           builds[out_name] = "SUCCESS"</div><div class='add'>+                    else:</div><div class='add'>+                        builds[out_name] = "FAILED"</div><div class='add'>+                        build_failed = True</div><div class='add'>+                except futures.Error as e:</div><div class='add'>+                    builds[out_name] = f"FAILED ({repr(e)})"</div><div class='add'>+                    build_failed = True</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Handle case where no .tex files were found</div><div class='add'>+        #</div><div class='add'>+        if not has_tex:</div><div class='add'>+            out_name = "LaTeX files"</div><div class='add'>+            max_len = max(max_len, len(out_name))</div><div class='add'>+            builds[out_name] = "FAILED: no .tex files were generated"</div><div class='add'>+            build_failed = True</div><div class='add'>+</div><div class='add'>+        return builds, build_failed, max_len</div><div class='add'>+</div><div class='add'>+    def handle_pdf(self, output_dirs, deny_vf):</div><div class='add'>+        """</div><div class='add'>+        Extra steps for PDF output.</div><div class='add'>+</div><div class='add'>+        As PDF is handled via a LaTeX output, after building the .tex file,</div><div class='add'>+        a new build is needed to create the PDF output from the latex</div><div class='add'>+        directory.</div><div class='add'>+        """</div><div class='add'>+        builds = {}</div><div class='add'>+        max_len = 0</div><div class='add'>+        tex_suffix = ".tex"</div><div class='add'>+        tex_files = []</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Since early 2024, Fedora and openSUSE tumbleweed have started</div><div class='add'>+        # deploying variable-font format of "Noto CJK", causing LaTeX</div><div class='add'>+        # to break with CJK. Work around it, by denying the variable font</div><div class='add'>+        # usage during xelatex build by passing the location of a config</div><div class='add'>+        # file with a deny list.</div><div class='add'>+        #</div><div class='add'>+        # See tools/docs/lib/latex_fonts.py for more details.</div><div class='add'>+        #</div><div class='add'>+        if deny_vf:</div><div class='add'>+            deny_vf = os.path.expanduser(deny_vf)</div><div class='add'>+            if os.path.isdir(deny_vf):</div><div class='add'>+                self.env["XDG_CONFIG_HOME"] = deny_vf</div><div class='add'>+</div><div class='add'>+        for from_dir in output_dirs:</div><div class='add'>+            pdf_dir = os.path.join(from_dir, "../pdf")</div><div class='add'>+            os.makedirs(pdf_dir, exist_ok=True)</div><div class='add'>+</div><div class='add'>+            if self.latexmk_cmd:</div><div class='add'>+                latex_cmd = [self.latexmk_cmd, f"-{self.pdflatex}"]</div><div class='add'>+            else:</div><div class='add'>+                latex_cmd = [self.pdflatex]</div><div class='add'>+</div><div class='add'>+            latex_cmd.extend(shlex.split(self.latexopts))</div><div class='add'>+</div><div class='add'>+            # Get a list of tex files to process</div><div class='add'>+            with os.scandir(from_dir) as it:</div><div class='add'>+                for entry in it:</div><div class='add'>+                    if entry.name.endswith(tex_suffix):</div><div class='add'>+                        tex_files.append((from_dir, pdf_dir, entry))</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # When using make, this won't be used, as the number of jobs comes</div><div class='add'>+        # from POSIX jobserver. So, this covers the case where build comes</div><div class='add'>+        # from command line. On such case, serialize by default, except if</div><div class='add'>+        # the user explicitly sets the number of jobs.</div><div class='add'>+        #</div><div class='add'>+        n_jobs = 1</div><div class='add'>+</div><div class='add'>+        # n_jobs is either an integer or "auto". Only use it if it is a number</div><div class='add'>+        if self.n_jobs:</div><div class='add'>+            try:</div><div class='add'>+                n_jobs = int(self.n_jobs)</div><div class='add'>+            except ValueError:</div><div class='add'>+                pass</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # When using make, jobserver.claim is the number of jobs that were</div><div class='add'>+        # used with "-j" and that aren't used by other make targets</div><div class='add'>+        #</div><div class='add'>+        with JobserverExec() as jobserver:</div><div class='add'>+            n_jobs = 1</div><div class='add'>+</div><div class='add'>+            #</div><div class='add'>+            # Handle the case when a parameter is passed via command line,</div><div class='add'>+            # using it as default, if jobserver doesn't claim anything</div><div class='add'>+            #</div><div class='add'>+            if self.n_jobs:</div><div class='add'>+                try:</div><div class='add'>+                    n_jobs = int(self.n_jobs)</div><div class='add'>+                except ValueError:</div><div class='add'>+                    pass</div><div class='add'>+</div><div class='add'>+            if jobserver.claim:</div><div class='add'>+                n_jobs = jobserver.claim</div><div class='add'>+</div><div class='add'>+            builds, build_failed, max_len = self.pdf_parallel_build(tex_suffix,</div><div class='add'>+                                                                    latex_cmd,</div><div class='add'>+                                                                    tex_files,</div><div class='add'>+                                                                    n_jobs)</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # In verbose mode, print a summary with the build results per file.</div><div class='add'>+        # Otherwise, print a single line with all failures, if any.</div><div class='add'>+        # On both cases, return code 1 indicates build failures,</div><div class='add'>+        #</div><div class='add'>+        if self.verbose:</div><div class='add'>+            msg = "Summary"</div><div class='add'>+            msg += "\n" + "=" * len(msg)</div><div class='add'>+            print()</div><div class='add'>+            print(msg)</div><div class='add'>+</div><div class='add'>+            for pdf_name, pdf_file in builds.items():</div><div class='add'>+                print(f"{pdf_name:&lt;{max_len}}: {pdf_file}")</div><div class='add'>+</div><div class='add'>+            print()</div><div class='add'>+            if build_failed:</div><div class='add'>+                msg = LatexFontChecker().check()</div><div class='add'>+                if msg:</div><div class='add'>+                    print(msg)</div><div class='add'>+</div><div class='add'>+                sys.exit("Error: not all PDF files were created.")</div><div class='add'>+</div><div class='add'>+        elif build_failed:</div><div class='add'>+            n_failures = len(builds)</div><div class='add'>+            failures = ", ".join(builds.keys())</div><div class='add'>+</div><div class='add'>+            msg = LatexFontChecker().check()</div><div class='add'>+            if msg:</div><div class='add'>+                print(msg)</div><div class='add'>+</div><div class='add'>+            sys.exit(f"Error: Can't build {n_failures} PDF file(s): {failures}")</div><div class='add'>+</div><div class='add'>+    def handle_info(self, output_dirs):</div><div class='add'>+        """</div><div class='add'>+        Extra steps for Info output.</div><div class='add'>+</div><div class='add'>+        For texinfo generation, an additional make is needed from the</div><div class='add'>+        texinfo directory.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        for output_dir in output_dirs:</div><div class='add'>+            try:</div><div class='add'>+                subprocess.run(["make", "info"], cwd=output_dir, check=True)</div><div class='add'>+            except subprocess.CalledProcessError as e:</div><div class='add'>+                sys.exit(f"Error generating info docs: {e}")</div><div class='add'>+</div><div class='add'>+    def handle_man(self, kerneldoc, docs_dir, src_dir, output_dir):</div><div class='add'>+        """</div><div class='add'>+        Create man pages from kernel-doc output</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        re_kernel_doc = re.compile(r"^\.\.\s+kernel-doc::\s*(\S+)")</div><div class='add'>+        re_man = re.compile(r'^\.TH "[^"]*" (\d+) "([^"]*)"')</div><div class='add'>+</div><div class='add'>+        if docs_dir == src_dir:</div><div class='add'>+            #</div><div class='add'>+            # Pick the entire set of kernel-doc markups from the entire tree</div><div class='add'>+            #</div><div class='add'>+            kdoc_files = set([self.srctree])</div><div class='add'>+        else:</div><div class='add'>+            kdoc_files = set()</div><div class='add'>+</div><div class='add'>+            for fname in glob(os.path.join(src_dir, "**"), recursive=True):</div><div class='add'>+                if os.path.isfile(fname) and fname.endswith(".rst"):</div><div class='add'>+                    with open(fname, "r", encoding="utf-8") as in_fp:</div><div class='add'>+                        data = in_fp.read()</div><div class='add'>+</div><div class='add'>+                    for line in data.split("\n"):</div><div class='add'>+                        match = re_kernel_doc.match(line)</div><div class='add'>+                        if match:</div><div class='add'>+                            if os.path.isfile(match.group(1)):</div><div class='add'>+                                kdoc_files.add(match.group(1))</div><div class='add'>+</div><div class='add'>+        if not kdoc_files:</div><div class='add'>+                sys.exit(f"Directory {src_dir} doesn't contain kernel-doc tags")</div><div class='add'>+</div><div class='add'>+        cmd = [ kerneldoc, "-m" ] + sorted(kdoc_files)</div><div class='add'>+        try:</div><div class='add'>+            if self.verbose:</div><div class='add'>+                print(" ".join(cmd))</div><div class='add'>+</div><div class='add'>+            result = subprocess.run(cmd, stdout=subprocess.PIPE, text= True)</div><div class='add'>+</div><div class='add'>+            if result.returncode:</div><div class='add'>+                print(f"Warning: kernel-doc returned {result.returncode} warnings")</div><div class='add'>+</div><div class='add'>+        except (OSError, ValueError, subprocess.SubprocessError) as e:</div><div class='add'>+            sys.exit(f"Failed to create man pages for {src_dir}: {repr(e)}")</div><div class='add'>+</div><div class='add'>+        fp = None</div><div class='add'>+        try:</div><div class='add'>+            for line in result.stdout.split("\n"):</div><div class='add'>+                match = re_man.match(line)</div><div class='add'>+                if not match:</div><div class='add'>+                    if fp:</div><div class='add'>+                        fp.write(line + '\n')</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if fp:</div><div class='add'>+                    fp.close()</div><div class='add'>+</div><div class='add'>+                fname = f"{output_dir}/{match.group(2)}.{match.group(1)}"</div><div class='add'>+</div><div class='add'>+                if self.verbose:</div><div class='add'>+                    print(f"Creating {fname}")</div><div class='add'>+                fp = open(fname, "w", encoding="utf-8")</div><div class='add'>+                fp.write(line + '\n')</div><div class='add'>+        finally:</div><div class='add'>+            if fp:</div><div class='add'>+                fp.close()</div><div class='add'>+</div><div class='add'>+    def cleandocs(self, builder):           # pylint: disable=W0613</div><div class='add'>+        """Remove documentation output directory"""</div><div class='add'>+        shutil.rmtree(self.builddir, ignore_errors=True)</div><div class='add'>+</div><div class='add'>+    def build(self, target, sphinxdirs=None,</div><div class='add'>+              theme=None, css=None, paper=None, deny_vf=None,</div><div class='add'>+              skip_sphinx=False):</div><div class='add'>+        """</div><div class='add'>+        Build documentation using Sphinx. This is the core function of this</div><div class='add'>+        module. It prepares all arguments required by sphinx-build.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        builder = TARGETS[target]["builder"]</div><div class='add'>+        out_dir = TARGETS[target].get("out_dir", "")</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Cleandocs doesn't require sphinx-build</div><div class='add'>+        #</div><div class='add'>+        if target == "cleandocs":</div><div class='add'>+            self.cleandocs(builder)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if theme:</div><div class='add'>+            os.environ["DOCS_THEME"] = theme</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Other targets require sphinx-build, so check if it exists</div><div class='add'>+        #</div><div class='add'>+        if not skip_sphinx:</div><div class='add'>+            sphinxbuild = shutil.which(self.sphinxbuild, path=self.env["PATH"])</div><div class='add'>+            if not sphinxbuild and target != "mandocs":</div><div class='add'>+                sys.exit(f"Error: {self.sphinxbuild} not found in PATH.\n")</div><div class='add'>+</div><div class='add'>+        if target == "pdfdocs":</div><div class='add'>+            if not self.pdflatex_cmd and not self.latexmk_cmd:</div><div class='add'>+                sys.exit("Error: pdflatex or latexmk required for PDF generation")</div><div class='add'>+</div><div class='add'>+        docs_dir = os.path.abspath(os.path.join(self.srctree, "Documentation"))</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Fill in base arguments for Sphinx build</div><div class='add'>+        #</div><div class='add'>+        kerneldoc = self.kerneldoc</div><div class='add'>+        if kerneldoc.startswith(self.srctree):</div><div class='add'>+            kerneldoc = os.path.relpath(kerneldoc, self.srctree)</div><div class='add'>+</div><div class='add'>+        args = [ "-b", builder, "-c", docs_dir ]</div><div class='add'>+</div><div class='add'>+        if builder == "latex":</div><div class='add'>+            if not paper:</div><div class='add'>+                paper = PAPER[1]</div><div class='add'>+</div><div class='add'>+            args.extend(["-D", f"latex_elements.papersize={paper}paper"])</div><div class='add'>+</div><div class='add'>+        if self.rustdoc:</div><div class='add'>+            args.extend(["-t", "rustdoc"])</div><div class='add'>+</div><div class='add'>+        if not sphinxdirs:</div><div class='add'>+            sphinxdirs = os.environ.get("SPHINXDIRS", ".")</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # The sphinx-build tool has a bug: internally, it tries to set</div><div class='add'>+        # locale with locale.setlocale(locale.LC_ALL, ''). This causes a</div><div class='add'>+        # crash if language is not set. Detect and fix it.</div><div class='add'>+        #</div><div class='add'>+        try:</div><div class='add'>+            locale.setlocale(locale.LC_ALL, '')</div><div class='add'>+        except locale.Error:</div><div class='add'>+            self.env["LC_ALL"] = "C"</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # sphinxdirs can be a list or a whitespace-separated string</div><div class='add'>+        #</div><div class='add'>+        sphinxdirs_list = []</div><div class='add'>+        for sphinxdir in sphinxdirs:</div><div class='add'>+            if isinstance(sphinxdir, list):</div><div class='add'>+                sphinxdirs_list += sphinxdir</div><div class='add'>+            else:</div><div class='add'>+                sphinxdirs_list += sphinxdir.split()</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Step 1:  Build each directory in separate.</div><div class='add'>+        #</div><div class='add'>+        # This is not the best way of handling it, as cross-references between</div><div class='add'>+        # them will be broken, but this is what we've been doing since</div><div class='add'>+        # the beginning.</div><div class='add'>+        #</div><div class='add'>+        output_dirs = []</div><div class='add'>+        for sphinxdir in sphinxdirs_list:</div><div class='add'>+            src_dir = os.path.join(docs_dir, sphinxdir)</div><div class='add'>+            doctree_dir = os.path.join(self.builddir, ".doctrees")</div><div class='add'>+            output_dir = os.path.join(self.builddir, sphinxdir, out_dir)</div><div class='add'>+</div><div class='add'>+            #</div><div class='add'>+            # Make directory names canonical</div><div class='add'>+            #</div><div class='add'>+            src_dir = os.path.normpath(src_dir)</div><div class='add'>+            doctree_dir = os.path.normpath(doctree_dir)</div><div class='add'>+            output_dir = os.path.normpath(output_dir)</div><div class='add'>+</div><div class='add'>+            os.makedirs(doctree_dir, exist_ok=True)</div><div class='add'>+            os.makedirs(output_dir, exist_ok=True)</div><div class='add'>+</div><div class='add'>+            output_dirs.append(output_dir)</div><div class='add'>+</div><div class='add'>+            build_args = args + [</div><div class='add'>+                "-d", doctree_dir,</div><div class='add'>+                "-D", f"kerneldoc_bin={kerneldoc}",</div><div class='add'>+                "-D", f"version={self.kernelversion}",</div><div class='add'>+                "-D", f"release={self.kernelrelease}",</div><div class='add'>+                "-D", f"kerneldoc_srctree={self.srctree}",</div><div class='add'>+                src_dir,</div><div class='add'>+                output_dir,</div><div class='add'>+            ]</div><div class='add'>+</div><div class='add'>+            if target == "mandocs":</div><div class='add'>+                self.handle_man(kerneldoc, docs_dir, src_dir, output_dir)</div><div class='add'>+            elif not skip_sphinx:</div><div class='add'>+                try:</div><div class='add'>+                    result = self.run_sphinx(sphinxbuild, build_args,</div><div class='add'>+                                             env=self.env)</div><div class='add'>+</div><div class='add'>+                    if result:</div><div class='add'>+                        sys.exit(f"Build failed: return code: {result}")</div><div class='add'>+</div><div class='add'>+                except (OSError, ValueError, subprocess.SubprocessError) as e:</div><div class='add'>+                    sys.exit(f"Build failed: {repr(e)}")</div><div class='add'>+</div><div class='add'>+            #</div><div class='add'>+            # Ensure that each html/epub output will have needed static files</div><div class='add'>+            #</div><div class='add'>+            if target in ["htmldocs", "epubdocs"]:</div><div class='add'>+                self.handle_html(css, output_dir)</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Step 2: Some targets (PDF and info) require an extra step once</div><div class='add'>+        #         sphinx-build finishes</div><div class='add'>+        #</div><div class='add'>+        if target == "pdfdocs":</div><div class='add'>+            self.handle_pdf(output_dirs, deny_vf)</div><div class='add'>+        elif target == "infodocs":</div><div class='add'>+            self.handle_info(output_dirs)</div><div class='add'>+</div><div class='add'>+def jobs_type(value):</div><div class='add'>+    """</div><div class='add'>+    Handle valid values for -j. Accepts Sphinx "-jauto", plus a number</div><div class='add'>+    equal or bigger than one.</div><div class='add'>+    """</div><div class='add'>+    if value is None:</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    if value.lower() == 'auto':</div><div class='add'>+        return value.lower()</div><div class='add'>+</div><div class='add'>+    try:</div><div class='add'>+        if int(value) &gt;= 1:</div><div class='add'>+            return value</div><div class='add'>+</div><div class='add'>+        raise argparse.ArgumentTypeError(f"Minimum jobs is 1, got {value}")</div><div class='add'>+    except ValueError:</div><div class='add'>+        raise argparse.ArgumentTypeError(f"Must be 'auto' or positive integer, got {value}")  # pylint: disable=W0707</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """</div><div class='add'>+    Main function. The only mandatory argument is the target. If not</div><div class='add'>+    specified, the other arguments will use default values if not</div><div class='add'>+    specified at os.environ.</div><div class='add'>+    """</div><div class='add'>+    parser = argparse.ArgumentParser(description="Kernel documentation builder")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("target", choices=list(TARGETS.keys()),</div><div class='add'>+                        help="Documentation target to build")</div><div class='add'>+    parser.add_argument("--sphinxdirs", nargs="+",</div><div class='add'>+                        help="Specific directories to build")</div><div class='add'>+    parser.add_argument("--builddir", default="output",</div><div class='add'>+                        help="Sphinx configuration file")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("--theme", help="Sphinx theme to use")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("--css", help="Custom CSS file for HTML/EPUB")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("--paper", choices=PAPER, default=PAPER[0],</div><div class='add'>+                        help="Paper size for LaTeX/PDF output")</div><div class='add'>+</div><div class='add'>+    parser.add_argument('--deny-vf',</div><div class='add'>+                        help="Configuration to deny variable fonts on pdf builds")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("-v", "--verbose", action='store_true',</div><div class='add'>+                        help="place build in verbose mode")</div><div class='add'>+</div><div class='add'>+    parser.add_argument('-j', '--jobs', type=jobs_type,</div><div class='add'>+                        help="Sets number of jobs to use with sphinx-build")</div><div class='add'>+</div><div class='add'>+    parser.add_argument('-i', '--interactive', action='store_true',</div><div class='add'>+                        help="Change latex default to run in interactive mode")</div><div class='add'>+</div><div class='add'>+    parser.add_argument('-s', '--skip-sphinx-build', action='store_true',</div><div class='add'>+                        help="Skip sphinx-build step")</div><div class='add'>+</div><div class='add'>+    parser.add_argument("-V", "--venv", nargs='?', const=f'{VENV_DEFAULT}',</div><div class='add'>+                        default=None,</div><div class='add'>+                        help=f'If used, run Sphinx from a venv dir (default dir: {VENV_DEFAULT})')</div><div class='add'>+</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    PythonVersion.check_python(MIN_PYTHON_VERSION, show_alternatives=True,</div><div class='add'>+                               bail_out=True)</div><div class='add'>+</div><div class='add'>+    builder = SphinxBuilder(builddir=args.builddir, venv=args.venv,</div><div class='add'>+                            verbose=args.verbose, n_jobs=args.jobs,</div><div class='add'>+                            interactive=args.interactive)</div><div class='add'>+</div><div class='add'>+    builder.build(args.target, sphinxdirs=args.sphinxdirs,</div><div class='add'>+                  theme=args.theme, css=args.css, paper=args.paper,</div><div class='add'>+                  deny_vf=args.deny_vf,</div><div class='add'>+                  skip_sphinx=args.skip_sphinx_build)</div><div class='add'>+</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/sphinx-pre-install b/tools/docs/sphinx-pre-install<br/>new file mode 100755<br/>index 000000000000..965c9b093a41<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/sphinx-pre-install?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/sphinx-pre-install</a></div><div class='hunk'>@@ -0,0 +1,1543 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+# Copyright (c) 2017-2025 Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;</div><div class='add'>+#</div><div class='add'>+# pylint: disable=C0103,C0114,C0115,C0116,C0301,C0302</div><div class='add'>+# pylint: disable=R0902,R0904,R0911,R0912,R0914,R0915,R1705,R1710,E1121</div><div class='add'>+</div><div class='add'>+# Note: this script requires at least Python 3.6 to run.</div><div class='add'>+# Don't add changes not compatible with it, it is meant to report</div><div class='add'>+# incompatible python versions.</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Dependency checker for Sphinx documentation Kernel build.</div><div class='add'>+</div><div class='add'>+This module provides tools to check for all required dependencies needed to</div><div class='add'>+build documentation using Sphinx, including system packages, Python modules</div><div class='add'>+and LaTeX packages for PDF generation.</div><div class='add'>+</div><div class='add'>+It detect packages for a subset of Linux distributions used by Kernel</div><div class='add'>+maintainers, showing hints and missing dependencies.</div><div class='add'>+</div><div class='add'>+The main class SphinxDependencyChecker handles the dependency checking logic</div><div class='add'>+and provides recommendations for installing missing packages. It supports both</div><div class='add'>+system package installations and  Python virtual environments. By default,</div><div class='add'>+system pacage install is recommended.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import locale</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import subprocess</div><div class='add'>+import sys</div><div class='add'>+from glob import glob</div><div class='add'>+import os.path</div><div class='add'>+</div><div class='add'>+src_dir = os.path.dirname(os.path.realpath(__file__))</div><div class='add'>+sys.path.insert(0, os.path.join(src_dir, '../lib/python'))</div><div class='add'>+from kdoc.python_version import PythonVersion</div><div class='add'>+</div><div class='add'>+RECOMMENDED_VERSION = PythonVersion("3.4.3").version</div><div class='add'>+MIN_PYTHON_VERSION = PythonVersion("3.7").version</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class DepManager:</div><div class='add'>+    """</div><div class='add'>+    Manage package dependencies. There are three types of dependencies:</div><div class='add'>+</div><div class='add'>+    - System: dependencies required for docs build;</div><div class='add'>+    - Python: python dependencies for a native distro Sphinx install;</div><div class='add'>+    - PDF: dependencies needed by PDF builds.</div><div class='add'>+</div><div class='add'>+    Each dependency can be mandatory or optional. Not installing an optional</div><div class='add'>+    dependency won't break the build, but will cause degradation at the</div><div class='add'>+    docs output.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # Internal types of dependencies. Don't use them outside DepManager class.</div><div class='add'>+    _SYS_TYPE = 0</div><div class='add'>+    _PHY_TYPE = 1</div><div class='add'>+    _PDF_TYPE = 2</div><div class='add'>+</div><div class='add'>+    # Dependencies visible outside the class.</div><div class='add'>+    # The keys are tuple with: (type, is_mandatory flag).</div><div class='add'>+    #</div><div class='add'>+    # Currently we're not using all optional dep types. Yet, we'll keep all</div><div class='add'>+    # possible combinations here. They're not many, and that makes easier</div><div class='add'>+    # if later needed and for the name() method below</div><div class='add'>+</div><div class='add'>+    SYSTEM_MANDATORY = (_SYS_TYPE, True)</div><div class='add'>+    PYTHON_MANDATORY = (_PHY_TYPE, True)</div><div class='add'>+    PDF_MANDATORY = (_PDF_TYPE, True)</div><div class='add'>+</div><div class='add'>+    SYSTEM_OPTIONAL = (_SYS_TYPE, False)</div><div class='add'>+    PYTHON_OPTIONAL = (_PHY_TYPE, False)</div><div class='add'>+    PDF_OPTIONAL = (_PDF_TYPE, True)</div><div class='add'>+</div><div class='add'>+    def __init__(self, pdf):</div><div class='add'>+        """</div><div class='add'>+        Initialize internal vars:</div><div class='add'>+</div><div class='add'>+        - missing: missing dependencies list, containing a distro-independent</div><div class='add'>+                   name for a missing dependency and its type.</div><div class='add'>+        - missing_pkg: ancillary dict containing missing dependencies in</div><div class='add'>+                       distro namespace, organized by type.</div><div class='add'>+        - need: total number of needed dependencies. Never cleaned.</div><div class='add'>+        - optional: total number of optional dependencies. Never cleaned.</div><div class='add'>+        - pdf: Is PDF support enabled?</div><div class='add'>+        """</div><div class='add'>+        self.missing = {}</div><div class='add'>+        self.missing_pkg = {}</div><div class='add'>+        self.need = 0</div><div class='add'>+        self.optional = 0</div><div class='add'>+        self.pdf = pdf</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def name(dtype):</div><div class='add'>+        """</div><div class='add'>+        Ancillary routine to output a warn/error message reporting</div><div class='add'>+        missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        if dtype[0] == DepManager._SYS_TYPE:</div><div class='add'>+            msg = "build"</div><div class='add'>+        elif dtype[0] == DepManager._PHY_TYPE:</div><div class='add'>+            msg = "Python"</div><div class='add'>+        else:</div><div class='add'>+            msg = "PDF"</div><div class='add'>+</div><div class='add'>+        if dtype[1]:</div><div class='add'>+            return f"ERROR: {msg} mandatory deps missing"</div><div class='add'>+        else:</div><div class='add'>+            return f"Warning: {msg} optional deps missing"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def is_optional(dtype):</div><div class='add'>+        """Ancillary routine to report if a dependency is optional"""</div><div class='add'>+        return not dtype[1]</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def is_pdf(dtype):</div><div class='add'>+        """Ancillary routine to report if a dependency is for PDF generation"""</div><div class='add'>+        if dtype[0] == DepManager._PDF_TYPE:</div><div class='add'>+            return True</div><div class='add'>+</div><div class='add'>+        return False</div><div class='add'>+</div><div class='add'>+    def add_package(self, package, dtype):</div><div class='add'>+        """</div><div class='add'>+        Add a package at the self.missing() dictionary.</div><div class='add'>+        Doesn't update missing_pkg.</div><div class='add'>+        """</div><div class='add'>+        is_optional = DepManager.is_optional(dtype)</div><div class='add'>+        self.missing[package] = dtype</div><div class='add'>+        if is_optional:</div><div class='add'>+            self.optional += 1</div><div class='add'>+        else:</div><div class='add'>+            self.need += 1</div><div class='add'>+</div><div class='add'>+    def del_package(self, package):</div><div class='add'>+        """</div><div class='add'>+        Remove a package at the self.missing() dictionary.</div><div class='add'>+        Doesn't update missing_pkg.</div><div class='add'>+        """</div><div class='add'>+        if package in self.missing:</div><div class='add'>+            del self.missing[package]</div><div class='add'>+</div><div class='add'>+    def clear_deps(self):</div><div class='add'>+        """</div><div class='add'>+        Clear dependencies without changing needed/optional.</div><div class='add'>+</div><div class='add'>+        This is an ackward way to have a separate section to recommend</div><div class='add'>+        a package after system main dependencies.</div><div class='add'>+</div><div class='add'>+        TODO: rework the logic to prevent needing it.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.missing = {}</div><div class='add'>+        self.missing_pkg = {}</div><div class='add'>+</div><div class='add'>+    def check_missing(self, progs):</div><div class='add'>+        """</div><div class='add'>+        Update self.missing_pkg, using progs dict to convert from the</div><div class='add'>+        agnostic package name to distro-specific one.</div><div class='add'>+</div><div class='add'>+        Returns an string with the packages to be installed, sorted and</div><div class='add'>+        with eventual duplicates removed.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.missing_pkg = {}</div><div class='add'>+</div><div class='add'>+        for prog, dtype in sorted(self.missing.items()):</div><div class='add'>+            # At least on some LTS distros like CentOS 7, texlive doesn't</div><div class='add'>+            # provide all packages we need. When such distros are</div><div class='add'>+            # detected, we have to disable PDF output.</div><div class='add'>+            #</div><div class='add'>+            # So, we need to ignore the packages that distros would</div><div class='add'>+            # need for LaTeX to work</div><div class='add'>+            if DepManager.is_pdf(dtype) and not self.pdf:</div><div class='add'>+                self.optional -= 1</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if not dtype in self.missing_pkg:</div><div class='add'>+                self.missing_pkg[dtype] = []</div><div class='add'>+</div><div class='add'>+            self.missing_pkg[dtype].append(progs.get(prog, prog))</div><div class='add'>+</div><div class='add'>+        install = []</div><div class='add'>+        for dtype, pkgs in self.missing_pkg.items():</div><div class='add'>+            install += pkgs</div><div class='add'>+</div><div class='add'>+        return " ".join(sorted(set(install)))</div><div class='add'>+</div><div class='add'>+    def warn_install(self):</div><div class='add'>+        """</div><div class='add'>+        Emit warnings/errors related to missing packages.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        output_msg = ""</div><div class='add'>+</div><div class='add'>+        for dtype in sorted(self.missing_pkg.keys()):</div><div class='add'>+            progs = " ".join(sorted(set(self.missing_pkg[dtype])))</div><div class='add'>+</div><div class='add'>+            try:</div><div class='add'>+                name = DepManager.name(dtype)</div><div class='add'>+                output_msg += f'{name}:\t{progs}\n'</div><div class='add'>+            except KeyError:</div><div class='add'>+                raise KeyError(f"ERROR!!!: invalid dtype for {progs}: {dtype}")</div><div class='add'>+</div><div class='add'>+        if output_msg:</div><div class='add'>+            print(f"\n{output_msg}")</div><div class='add'>+</div><div class='add'>+class AncillaryMethods:</div><div class='add'>+    """</div><div class='add'>+    Ancillary methods that checks for missing dependencies for different</div><div class='add'>+    types of types, like binaries, python modules, rpm deps, etc.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def which(prog):</div><div class='add'>+        """</div><div class='add'>+        Our own implementation of which(). We could instead use</div><div class='add'>+        shutil.which(), but this function is simple enough.</div><div class='add'>+        Probably faster to use this implementation than to import shutil.</div><div class='add'>+        """</div><div class='add'>+        for path in os.environ.get("PATH", "").split(":"):</div><div class='add'>+            full_path = os.path.join(path, prog)</div><div class='add'>+            if os.access(full_path, os.X_OK):</div><div class='add'>+                return full_path</div><div class='add'>+</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def run(*args, **kwargs):</div><div class='add'>+        """</div><div class='add'>+        Excecute a command, hiding its output by default.</div><div class='add'>+        Preserve compatibility with older Python versions.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        capture_output = kwargs.pop('capture_output', False)</div><div class='add'>+</div><div class='add'>+        if capture_output:</div><div class='add'>+            if 'stdout' not in kwargs:</div><div class='add'>+                kwargs['stdout'] = subprocess.PIPE</div><div class='add'>+            if 'stderr' not in kwargs:</div><div class='add'>+                kwargs['stderr'] = subprocess.PIPE</div><div class='add'>+        else:</div><div class='add'>+            if 'stdout' not in kwargs:</div><div class='add'>+                kwargs['stdout'] = subprocess.DEVNULL</div><div class='add'>+            if 'stderr' not in kwargs:</div><div class='add'>+                kwargs['stderr'] = subprocess.DEVNULL</div><div class='add'>+</div><div class='add'>+        # Don't break with older Python versions</div><div class='add'>+        if 'text' in kwargs and sys.version_info &lt; (3, 7):</div><div class='add'>+            kwargs['universal_newlines'] = kwargs.pop('text')</div><div class='add'>+</div><div class='add'>+        return subprocess.run(*args, **kwargs)</div><div class='add'>+</div><div class='add'>+class MissingCheckers(AncillaryMethods):</div><div class='add'>+    """</div><div class='add'>+    Contains some ancillary checkers for different types of binaries and</div><div class='add'>+    package managers.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, args, texlive):</div><div class='add'>+        """</div><div class='add'>+        Initialize its internal variables</div><div class='add'>+        """</div><div class='add'>+        self.pdf = args.pdf</div><div class='add'>+        self.virtualenv = args.virtualenv</div><div class='add'>+        self.version_check = args.version_check</div><div class='add'>+        self.texlive = texlive</div><div class='add'>+</div><div class='add'>+        self.min_version = (0, 0, 0)</div><div class='add'>+        self.cur_version = (0, 0, 0)</div><div class='add'>+</div><div class='add'>+        self.deps = DepManager(self.pdf)</div><div class='add'>+</div><div class='add'>+        self.need_symlink = 0</div><div class='add'>+        self.need_sphinx = 0</div><div class='add'>+</div><div class='add'>+        self.verbose_warn_install = 1</div><div class='add'>+</div><div class='add'>+        self.virtenv_dir = ""</div><div class='add'>+        self.install = ""</div><div class='add'>+        self.python_cmd = ""</div><div class='add'>+</div><div class='add'>+        self.virtenv_prefix = ["sphinx_", "Sphinx_" ]</div><div class='add'>+</div><div class='add'>+    def check_missing_file(self, files, package, dtype):</div><div class='add'>+        """</div><div class='add'>+        Does the file exists? If not, add it to missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        for f in files:</div><div class='add'>+            if os.path.exists(f):</div><div class='add'>+                return</div><div class='add'>+        self.deps.add_package(package, dtype)</div><div class='add'>+</div><div class='add'>+    def check_program(self, prog, dtype):</div><div class='add'>+        """</div><div class='add'>+        Does the program exists and it is at the PATH?</div><div class='add'>+        If not, add it to missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        found = self.which(prog)</div><div class='add'>+        if found:</div><div class='add'>+            return found</div><div class='add'>+</div><div class='add'>+        self.deps.add_package(prog, dtype)</div><div class='add'>+</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    def check_perl_module(self, prog, dtype):</div><div class='add'>+        """</div><div class='add'>+        Does perl have a dependency? Is it available?</div><div class='add'>+        If not, add it to missing dependencies.</div><div class='add'>+</div><div class='add'>+        Right now, we still need Perl for doc build, as it is required</div><div class='add'>+        by some tools called at docs or kernel build time, like:</div><div class='add'>+</div><div class='add'>+            tools/docs/documentation-file-ref-check</div><div class='add'>+</div><div class='add'>+        Also, checkpatch is on Perl.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # While testing with lxc download template, one of the</div><div class='add'>+        # distros (Oracle) didn't have perl - nor even an option to install</div><div class='add'>+        # before installing oraclelinux-release-el9 package.</div><div class='add'>+        #</div><div class='add'>+        # Check it before running an error. If perl is not there,</div><div class='add'>+        # add it as a mandatory package, as some parts of the doc builder</div><div class='add'>+        # needs it.</div><div class='add'>+        if not self.which("perl"):</div><div class='add'>+            self.deps.add_package("perl", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+            self.deps.add_package(prog, dtype)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            self.run(["perl", f"-M{prog}", "-e", "1"], check=True)</div><div class='add'>+        except subprocess.CalledProcessError:</div><div class='add'>+            self.deps.add_package(prog, dtype)</div><div class='add'>+</div><div class='add'>+    def check_python_module(self, module, is_optional=False):</div><div class='add'>+        """</div><div class='add'>+        Does a python module exists outside venv? If not, add it to missing</div><div class='add'>+        dependencies.</div><div class='add'>+        """</div><div class='add'>+        if is_optional:</div><div class='add'>+            dtype = DepManager.PYTHON_OPTIONAL</div><div class='add'>+        else:</div><div class='add'>+            dtype = DepManager.PYTHON_MANDATORY</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            self.run([self.python_cmd, "-c", f"import {module}"], check=True)</div><div class='add'>+        except subprocess.CalledProcessError:</div><div class='add'>+            self.deps.add_package(module, dtype)</div><div class='add'>+</div><div class='add'>+    def check_rpm_missing(self, pkgs, dtype):</div><div class='add'>+        """</div><div class='add'>+        Does a rpm package exists? If not, add it to missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        for prog in pkgs:</div><div class='add'>+            try:</div><div class='add'>+                self.run(["rpm", "-q", prog], check=True)</div><div class='add'>+            except subprocess.CalledProcessError:</div><div class='add'>+                self.deps.add_package(prog, dtype)</div><div class='add'>+</div><div class='add'>+    def check_pacman_missing(self, pkgs, dtype):</div><div class='add'>+        """</div><div class='add'>+        Does a pacman package exists? If not, add it to missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        for prog in pkgs:</div><div class='add'>+            try:</div><div class='add'>+                self.run(["pacman", "-Q", prog], check=True)</div><div class='add'>+            except subprocess.CalledProcessError:</div><div class='add'>+                self.deps.add_package(prog, dtype)</div><div class='add'>+</div><div class='add'>+    def check_missing_tex(self, is_optional=False):</div><div class='add'>+        """</div><div class='add'>+        Does a LaTeX package exists? If not, add it to missing dependencies.</div><div class='add'>+        """</div><div class='add'>+        if is_optional:</div><div class='add'>+            dtype = DepManager.PDF_OPTIONAL</div><div class='add'>+        else:</div><div class='add'>+            dtype = DepManager.PDF_MANDATORY</div><div class='add'>+</div><div class='add'>+        kpsewhich = self.which("kpsewhich")</div><div class='add'>+        for prog, package in self.texlive.items():</div><div class='add'>+</div><div class='add'>+            # If kpsewhich is not there, just add it to deps</div><div class='add'>+            if not kpsewhich:</div><div class='add'>+                self.deps.add_package(package, dtype)</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            # Check if the package is needed</div><div class='add'>+            try:</div><div class='add'>+                result = self.run(</div><div class='add'>+                    [kpsewhich, prog], stdout=subprocess.PIPE, text=True, check=True</div><div class='add'>+                )</div><div class='add'>+</div><div class='add'>+                # Didn't find. Add it</div><div class='add'>+                if not result.stdout.strip():</div><div class='add'>+                    self.deps.add_package(package, dtype)</div><div class='add'>+</div><div class='add'>+            except subprocess.CalledProcessError:</div><div class='add'>+                # kpsewhich returned an error. Add it, just in case</div><div class='add'>+                self.deps.add_package(package, dtype)</div><div class='add'>+</div><div class='add'>+    def get_sphinx_fname(self):</div><div class='add'>+        """</div><div class='add'>+        Gets the binary filename for sphinx-build.</div><div class='add'>+        """</div><div class='add'>+        if "SPHINXBUILD" in os.environ:</div><div class='add'>+            return os.environ["SPHINXBUILD"]</div><div class='add'>+</div><div class='add'>+        fname = "sphinx-build"</div><div class='add'>+        if self.which(fname):</div><div class='add'>+            return fname</div><div class='add'>+</div><div class='add'>+        fname = "sphinx-build-3"</div><div class='add'>+        if self.which(fname):</div><div class='add'>+            self.need_symlink = 1</div><div class='add'>+            return fname</div><div class='add'>+</div><div class='add'>+        return ""</div><div class='add'>+</div><div class='add'>+    def get_sphinx_version(self, cmd):</div><div class='add'>+        """</div><div class='add'>+        Gets sphinx-build version.</div><div class='add'>+        """</div><div class='add'>+        env = os.environ.copy()</div><div class='add'>+</div><div class='add'>+        # The sphinx-build tool has a bug: internally, it tries to set</div><div class='add'>+        # locale with locale.setlocale(locale.LC_ALL, ''). This causes a</div><div class='add'>+        # crash if language is not set. Detect and fix it.</div><div class='add'>+        try:</div><div class='add'>+            locale.setlocale(locale.LC_ALL, '')</div><div class='add'>+        except Exception:</div><div class='add'>+            env["LC_ALL"] = "C"</div><div class='add'>+            env["LANG"] = "C"</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            result = self.run([cmd, "--version"], env=env,</div><div class='add'>+                              stdout=subprocess.PIPE,</div><div class='add'>+                              stderr=subprocess.STDOUT,</div><div class='add'>+                              text=True, check=True)</div><div class='add'>+        except (subprocess.CalledProcessError, FileNotFoundError):</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        for line in result.stdout.split("\n"):</div><div class='add'>+            match = re.match(r"^sphinx-build\s+([\d\.]+)(?:\+(?:/[\da-f]+)|b\d+)?\s*$", line)</div><div class='add'>+            if match:</div><div class='add'>+                return PythonVersion.parse_version(match.group(1))</div><div class='add'>+</div><div class='add'>+            match = re.match(r"^Sphinx.*\s+([\d\.]+)\s*$", line)</div><div class='add'>+            if match:</div><div class='add'>+                return PythonVersion.parse_version(match.group(1))</div><div class='add'>+</div><div class='add'>+    def check_sphinx(self, conf):</div><div class='add'>+        """</div><div class='add'>+        Checks Sphinx minimal requirements</div><div class='add'>+        """</div><div class='add'>+        try:</div><div class='add'>+            with open(conf, "r", encoding="utf-8") as f:</div><div class='add'>+                for line in f:</div><div class='add'>+                    match = re.match(r"^\s*needs_sphinx\s*=\s*[\'\"]([\d\.]+)[\'\"]", line)</div><div class='add'>+                    if match:</div><div class='add'>+                        self.min_version = PythonVersion.parse_version(match.group(1))</div><div class='add'>+                        break</div><div class='add'>+        except IOError:</div><div class='add'>+            sys.exit(f"Can't open {conf}")</div><div class='add'>+</div><div class='add'>+        if not self.min_version:</div><div class='add'>+            sys.exit(f"Can't get needs_sphinx version from {conf}")</div><div class='add'>+</div><div class='add'>+        self.virtenv_dir = self.virtenv_prefix[0] + "latest"</div><div class='add'>+</div><div class='add'>+        sphinx = self.get_sphinx_fname()</div><div class='add'>+        if not sphinx:</div><div class='add'>+            self.need_sphinx = 1</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        self.cur_version = self.get_sphinx_version(sphinx)</div><div class='add'>+        if not self.cur_version:</div><div class='add'>+            sys.exit(f"{sphinx} didn't return its version")</div><div class='add'>+</div><div class='add'>+        if self.cur_version &lt; self.min_version:</div><div class='add'>+            curver = PythonVersion.ver_str(self.cur_version)</div><div class='add'>+            minver = PythonVersion.ver_str(self.min_version)</div><div class='add'>+</div><div class='add'>+            print(f"ERROR: Sphinx version is {curver}. It should be &gt;= {minver}")</div><div class='add'>+            self.need_sphinx = 1</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # On version check mode, just assume Sphinx has all mandatory deps</div><div class='add'>+        if self.version_check and self.cur_version &gt;= RECOMMENDED_VERSION:</div><div class='add'>+            sys.exit(0)</div><div class='add'>+</div><div class='add'>+    def catcheck(self, filename):</div><div class='add'>+        """</div><div class='add'>+        Reads a file if it exists, returning as string.</div><div class='add'>+        If not found, returns an empty string.</div><div class='add'>+        """</div><div class='add'>+        if os.path.exists(filename):</div><div class='add'>+            with open(filename, "r", encoding="utf-8") as f:</div><div class='add'>+                return f.read().strip()</div><div class='add'>+        return ""</div><div class='add'>+</div><div class='add'>+    def get_system_release(self):</div><div class='add'>+        """</div><div class='add'>+        Determine the system type. There's no unique way that would work</div><div class='add'>+        with all distros with a minimal package install. So, several</div><div class='add'>+        methods are used here.</div><div class='add'>+</div><div class='add'>+        By default, it will use lsb_release function. If not available, it will</div><div class='add'>+        fail back to reading the known different places where the distro name</div><div class='add'>+        is stored.</div><div class='add'>+</div><div class='add'>+        Several modern distros now have /etc/os-release, which usually have</div><div class='add'>+        a decent coverage.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        system_release = ""</div><div class='add'>+</div><div class='add'>+        if self.which("lsb_release"):</div><div class='add'>+            result = self.run(["lsb_release", "-d"], capture_output=True, text=True)</div><div class='add'>+            system_release = result.stdout.replace("Description:", "").strip()</div><div class='add'>+</div><div class='add'>+        release_files = [</div><div class='add'>+            "/etc/system-release",</div><div class='add'>+            "/etc/redhat-release",</div><div class='add'>+            "/etc/lsb-release",</div><div class='add'>+            "/etc/gentoo-release",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        if not system_release:</div><div class='add'>+            for f in release_files:</div><div class='add'>+                system_release = self.catcheck(f)</div><div class='add'>+                if system_release:</div><div class='add'>+                    break</div><div class='add'>+</div><div class='add'>+        # This seems more common than LSB these days</div><div class='add'>+        if not system_release:</div><div class='add'>+            os_var = {}</div><div class='add'>+            try:</div><div class='add'>+                with open("/etc/os-release", "r", encoding="utf-8") as f:</div><div class='add'>+                    for line in f:</div><div class='add'>+                        match = re.match(r"^([\w\d\_]+)=\"?([^\"]*)\"?\n", line)</div><div class='add'>+                        if match:</div><div class='add'>+                            os_var[match.group(1)] = match.group(2)</div><div class='add'>+</div><div class='add'>+                system_release = os_var.get("NAME", "")</div><div class='add'>+                if "VERSION_ID" in os_var:</div><div class='add'>+                    system_release += " " + os_var["VERSION_ID"]</div><div class='add'>+                elif "VERSION" in os_var:</div><div class='add'>+                    system_release += " " + os_var["VERSION"]</div><div class='add'>+            except IOError:</div><div class='add'>+                pass</div><div class='add'>+</div><div class='add'>+        if not system_release:</div><div class='add'>+            system_release = self.catcheck("/etc/issue")</div><div class='add'>+</div><div class='add'>+        system_release = system_release.strip()</div><div class='add'>+</div><div class='add'>+        return system_release</div><div class='add'>+</div><div class='add'>+class SphinxDependencyChecker(MissingCheckers):</div><div class='add'>+    """</div><div class='add'>+    Main class for checking Sphinx documentation build dependencies.</div><div class='add'>+</div><div class='add'>+    - Check for missing system packages;</div><div class='add'>+    - Check for missing Python modules;</div><div class='add'>+    - Check for missing LaTeX packages needed by PDF generation;</div><div class='add'>+    - Propose Sphinx install via Python Virtual environment;</div><div class='add'>+    - Propose Sphinx install via distro-specific package install.</div><div class='add'>+    """</div><div class='add'>+    def __init__(self, args):</div><div class='add'>+        """Initialize checker variables"""</div><div class='add'>+</div><div class='add'>+        # List of required texlive packages on Fedora and OpenSuse</div><div class='add'>+        texlive = {</div><div class='add'>+            "amsfonts.sty":       "texlive-amsfonts",</div><div class='add'>+            "amsmath.sty":        "texlive-amsmath",</div><div class='add'>+            "amssymb.sty":        "texlive-amsfonts",</div><div class='add'>+            "amsthm.sty":         "texlive-amscls",</div><div class='add'>+            "anyfontsize.sty":    "texlive-anyfontsize",</div><div class='add'>+            "atbegshi.sty":       "texlive-oberdiek",</div><div class='add'>+            "bm.sty":             "texlive-tools",</div><div class='add'>+            "capt-of.sty":        "texlive-capt-of",</div><div class='add'>+            "cmap.sty":           "texlive-cmap",</div><div class='add'>+            "ctexhook.sty":       "texlive-ctex",</div><div class='add'>+            "ecrm1000.tfm":       "texlive-ec",</div><div class='add'>+            "eqparbox.sty":       "texlive-eqparbox",</div><div class='add'>+            "eu1enc.def":         "texlive-euenc",</div><div class='add'>+            "fancybox.sty":       "texlive-fancybox",</div><div class='add'>+            "fancyvrb.sty":       "texlive-fancyvrb",</div><div class='add'>+            "float.sty":          "texlive-float",</div><div class='add'>+            "fncychap.sty":       "texlive-fncychap",</div><div class='add'>+            "footnote.sty":       "texlive-mdwtools",</div><div class='add'>+            "framed.sty":         "texlive-framed",</div><div class='add'>+            "luatex85.sty":       "texlive-luatex85",</div><div class='add'>+            "multirow.sty":       "texlive-multirow",</div><div class='add'>+            "needspace.sty":      "texlive-needspace",</div><div class='add'>+            "palatino.sty":       "texlive-psnfss",</div><div class='add'>+            "parskip.sty":        "texlive-parskip",</div><div class='add'>+            "polyglossia.sty":    "texlive-polyglossia",</div><div class='add'>+            "tabulary.sty":       "texlive-tabulary",</div><div class='add'>+            "threeparttable.sty": "texlive-threeparttable",</div><div class='add'>+            "titlesec.sty":       "texlive-titlesec",</div><div class='add'>+            "ucs.sty":            "texlive-ucs",</div><div class='add'>+            "upquote.sty":        "texlive-upquote",</div><div class='add'>+            "wrapfig.sty":        "texlive-wrapfig",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        super().__init__(args, texlive)</div><div class='add'>+</div><div class='add'>+        self.need_pip = False</div><div class='add'>+        self.rec_sphinx_upgrade = 0</div><div class='add'>+</div><div class='add'>+        self.system_release = self.get_system_release()</div><div class='add'>+        self.activate_cmd = ""</div><div class='add'>+</div><div class='add'>+        # Some distros may not have a Sphinx shipped package compatible with</div><div class='add'>+        # our minimal requirements</div><div class='add'>+        self.package_supported = True</div><div class='add'>+</div><div class='add'>+        # Recommend a new python version</div><div class='add'>+        self.recommend_python = None</div><div class='add'>+</div><div class='add'>+        # Certain hints are meant to be shown only once</div><div class='add'>+        self.distro_msg = None</div><div class='add'>+</div><div class='add'>+        self.latest_avail_ver = (0, 0, 0)</div><div class='add'>+        self.venv_ver = (0, 0, 0)</div><div class='add'>+</div><div class='add'>+        prefix = os.environ.get("srctree", ".") + "/"</div><div class='add'>+</div><div class='add'>+        self.conf = prefix + "Documentation/conf.py"</div><div class='add'>+        self.requirement_file = prefix + "Documentation/sphinx/requirements.txt"</div><div class='add'>+</div><div class='add'>+    def get_install_progs(self, progs, cmd, extra=None):</div><div class='add'>+        """</div><div class='add'>+        Check for missing dependencies using the provided program mapping.</div><div class='add'>+</div><div class='add'>+        The actual distro-specific programs are mapped via progs argument.</div><div class='add'>+        """</div><div class='add'>+        install = self.deps.check_missing(progs)</div><div class='add'>+</div><div class='add'>+        if self.verbose_warn_install:</div><div class='add'>+            self.deps.warn_install()</div><div class='add'>+</div><div class='add'>+        if not install:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if cmd:</div><div class='add'>+            if self.verbose_warn_install:</div><div class='add'>+                msg = "You should run:"</div><div class='add'>+            else:</div><div class='add'>+                msg = ""</div><div class='add'>+</div><div class='add'>+            if extra:</div><div class='add'>+                msg += "\n\t" + extra.replace("\n", "\n\t")</div><div class='add'>+</div><div class='add'>+            return(msg + "\n\tsudo " + cmd + " " + install)</div><div class='add'>+</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Distro-specific hints methods</div><div class='add'>+    #</div><div class='add'>+</div><div class='add'>+    def give_debian_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for Debian-based distros.</div><div class='add'>+        """</div><div class='add'>+        progs = {</div><div class='add'>+            "Pod::Usage":    "perl-modules",</div><div class='add'>+            "convert":       "imagemagick",</div><div class='add'>+            "dot":           "graphviz",</div><div class='add'>+            "ensurepip":     "python3-venv",</div><div class='add'>+            "python-sphinx": "python3-sphinx",</div><div class='add'>+            "rsvg-convert":  "librsvg2-bin",</div><div class='add'>+            "virtualenv":    "virtualenv",</div><div class='add'>+            "xelatex":       "texlive-xetex",</div><div class='add'>+            "yaml":          "python3-yaml",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            pdf_pkgs = {</div><div class='add'>+                "fonts-dejavu": [</div><div class='add'>+                    "/usr/share/fonts/truetype/dejavu/DejaVuSans.ttf",</div><div class='add'>+                ],</div><div class='add'>+                "fonts-noto-cjk": [</div><div class='add'>+                    "/usr/share/fonts/noto-cjk/NotoSansCJK-Regular.ttc",</div><div class='add'>+                    "/usr/share/fonts/opentype/noto/NotoSansCJK-Regular.ttc",</div><div class='add'>+                    "/usr/share/fonts/opentype/noto/NotoSerifCJK-Regular.ttc",</div><div class='add'>+                ],</div><div class='add'>+                "tex-gyre": [</div><div class='add'>+                    "/usr/share/texmf/tex/latex/tex-gyre/tgtermes.sty"</div><div class='add'>+                ],</div><div class='add'>+                "texlive-fonts-recommended": [</div><div class='add'>+                    "/usr/share/texlive/texmf-dist/fonts/tfm/adobe/zapfding/pzdr.tfm",</div><div class='add'>+                ],</div><div class='add'>+                "texlive-lang-chinese": [</div><div class='add'>+                    "/usr/share/texlive/texmf-dist/tex/latex/ctex/ctexhook.sty",</div><div class='add'>+                ],</div><div class='add'>+            }</div><div class='add'>+</div><div class='add'>+            for package, files in pdf_pkgs.items():</div><div class='add'>+                self.check_missing_file(files, package, DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+            self.check_program("dvipng", DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+        if not self.distro_msg:</div><div class='add'>+            self.distro_msg = \</div><div class='add'>+                "Note: ImageMagick is broken on some distros, affecting PDF output. For more details:\n" \</div><div class='add'>+                "\thttps://askubuntu.com/questions/1158894/imagemagick-still-broken-using-with-usr-bin-convert"</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, "apt-get install")</div><div class='add'>+</div><div class='add'>+    def give_redhat_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for RedHat-based distros</div><div class='add'>+        (Fedora, RHEL and RHEL-based variants).</div><div class='add'>+        """</div><div class='add'>+        progs = {</div><div class='add'>+            "Pod::Usage":       "perl-Pod-Usage",</div><div class='add'>+            "convert":          "ImageMagick",</div><div class='add'>+            "dot":              "graphviz",</div><div class='add'>+            "python-sphinx":    "python3-sphinx",</div><div class='add'>+            "rsvg-convert":     "librsvg2-tools",</div><div class='add'>+            "virtualenv":       "python3-virtualenv",</div><div class='add'>+            "xelatex":          "texlive-xetex-bin",</div><div class='add'>+            "yaml":             "python3-pyyaml",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        fedora_tex_pkgs = [</div><div class='add'>+            "dejavu-sans-fonts",</div><div class='add'>+            "dejavu-sans-mono-fonts",</div><div class='add'>+            "dejavu-serif-fonts",</div><div class='add'>+            "texlive-collection-fontsrecommended",</div><div class='add'>+            "texlive-collection-latex",</div><div class='add'>+            "texlive-xecjk",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        fedora = False</div><div class='add'>+        rel = None</div><div class='add'>+</div><div class='add'>+        match = re.search(r"(release|Linux)\s+(\d+)", self.system_release)</div><div class='add'>+        if match:</div><div class='add'>+            rel = int(match.group(2))</div><div class='add'>+</div><div class='add'>+        if not rel:</div><div class='add'>+            print("Couldn't identify release number")</div><div class='add'>+            noto_sans_redhat = None</div><div class='add'>+            self.pdf = False</div><div class='add'>+        elif re.search("Fedora", self.system_release):</div><div class='add'>+            # Fedora 38 and upper use this CJK font</div><div class='add'>+</div><div class='add'>+            noto_sans_redhat = "google-noto-sans-cjk-fonts"</div><div class='add'>+            fedora = True</div><div class='add'>+        else:</div><div class='add'>+            # Almalinux, CentOS, RHEL, ...</div><div class='add'>+</div><div class='add'>+            # at least up to version 9 (and Fedora &lt; 38), that's the CJK font</div><div class='add'>+            noto_sans_redhat = "google-noto-sans-cjk-ttc-fonts"</div><div class='add'>+</div><div class='add'>+            progs["virtualenv"] = "python-virtualenv"</div><div class='add'>+</div><div class='add'>+            if not rel or rel &lt; 8:</div><div class='add'>+                print("ERROR: Distro not supported. Too old?")</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            # RHEL 8 uses Python 3.6, which is not compatible with</div><div class='add'>+            # the build system anymore. Suggest Python 3.11</div><div class='add'>+            if rel == 8:</div><div class='add'>+                self.check_program("python3.9", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+                progs["python3.9"] = "python39"</div><div class='add'>+                progs["yaml"] = "python39-pyyaml"</div><div class='add'>+</div><div class='add'>+                self.recommend_python = True</div><div class='add'>+</div><div class='add'>+                # There's no python39-sphinx package. Only pip is supported</div><div class='add'>+                self.package_supported = False</div><div class='add'>+</div><div class='add'>+            if not self.distro_msg:</div><div class='add'>+                self.distro_msg = \</div><div class='add'>+                    "Note: RHEL-based distros typically require extra repositories.\n" \</div><div class='add'>+                    "For most, enabling epel and crb are enough:\n" \</div><div class='add'>+                    "\tsudo dnf install -y epel-release\n" \</div><div class='add'>+                    "\tsudo dnf config-manager --set-enabled crb\n" \</div><div class='add'>+                    "Yet, some may have other required repositories. Those commands could be useful:\n" \</div><div class='add'>+                    "\tsudo dnf repolist all\n" \</div><div class='add'>+                    "\tsudo dnf repoquery --available --info &lt;pkgs&gt;\n" \</div><div class='add'>+                    "\tsudo dnf config-manager --set-enabled '*' # enable all - probably not what you want"</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            pdf_pkgs = [</div><div class='add'>+                "/usr/share/fonts/google-noto-cjk/NotoSansCJK-Regular.ttc",</div><div class='add'>+                "/usr/share/fonts/google-noto-sans-cjk-fonts/NotoSansCJK-Regular.ttc",</div><div class='add'>+            ]</div><div class='add'>+</div><div class='add'>+            self.check_missing_file(pdf_pkgs, noto_sans_redhat, DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+            self.check_rpm_missing(fedora_tex_pkgs, DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+            self.check_missing_tex(DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+            # There's no texlive-ctex on RHEL 8 repositories. This will</div><div class='add'>+            # likely affect CJK pdf build only.</div><div class='add'>+            if not fedora and rel == 8:</div><div class='add'>+                self.deps.del_package("texlive-ctex")</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, "dnf install")</div><div class='add'>+</div><div class='add'>+    def give_opensuse_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for openSUSE-based distros</div><div class='add'>+        (Leap and Tumbleweed).</div><div class='add'>+        """</div><div class='add'>+        progs = {</div><div class='add'>+            "Pod::Usage":    "perl-Pod-Usage",</div><div class='add'>+            "convert":       "ImageMagick",</div><div class='add'>+            "dot":           "graphviz",</div><div class='add'>+            "python-sphinx": "python3-sphinx",</div><div class='add'>+            "virtualenv":    "python3-virtualenv",</div><div class='add'>+            "xelatex":       "texlive-xetex-bin texlive-dejavu",</div><div class='add'>+            "yaml":          "python3-pyyaml",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        suse_tex_pkgs = [</div><div class='add'>+            "texlive-babel-english",</div><div class='add'>+            "texlive-caption",</div><div class='add'>+            "texlive-colortbl",</div><div class='add'>+            "texlive-courier",</div><div class='add'>+            "texlive-dvips",</div><div class='add'>+            "texlive-helvetic",</div><div class='add'>+            "texlive-makeindex",</div><div class='add'>+            "texlive-metafont",</div><div class='add'>+            "texlive-metapost",</div><div class='add'>+            "texlive-palatino",</div><div class='add'>+            "texlive-preview",</div><div class='add'>+            "texlive-times",</div><div class='add'>+            "texlive-zapfchan",</div><div class='add'>+            "texlive-zapfding",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        progs["latexmk"] = "texlive-latexmk-bin"</div><div class='add'>+</div><div class='add'>+        match = re.search(r"(Leap)\s+(\d+).(\d)", self.system_release)</div><div class='add'>+        if match:</div><div class='add'>+            rel = int(match.group(2))</div><div class='add'>+</div><div class='add'>+            # Leap 15.x uses Python 3.6, which is not compatible with</div><div class='add'>+            # the build system anymore. Suggest Python 3.11</div><div class='add'>+            if rel == 15:</div><div class='add'>+                if not self.which(self.python_cmd):</div><div class='add'>+                    self.check_program("python3.11", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+                    progs["python3.11"] = "python311"</div><div class='add'>+                    self.recommend_python = True</div><div class='add'>+</div><div class='add'>+                progs.update({</div><div class='add'>+                    "python-sphinx": "python311-Sphinx python311-Sphinx-latex",</div><div class='add'>+                    "virtualenv":    "python311-virtualenv",</div><div class='add'>+                    "yaml":          "python311-PyYAML",</div><div class='add'>+                })</div><div class='add'>+        else:</div><div class='add'>+            # Tumbleweed defaults to Python 3.11</div><div class='add'>+</div><div class='add'>+            progs.update({</div><div class='add'>+                "python-sphinx": "python313-Sphinx python313-Sphinx-latex",</div><div class='add'>+                "virtualenv":    "python313-virtualenv",</div><div class='add'>+                "yaml":          "python313-PyYAML",</div><div class='add'>+            })</div><div class='add'>+</div><div class='add'>+        # FIXME: add support for installing CJK fonts</div><div class='add'>+        #</div><div class='add'>+        # I tried hard, but was unable to find a way to install</div><div class='add'>+        # "Noto Sans CJK SC" on openSUSE</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            self.check_rpm_missing(suse_tex_pkgs, DepManager.PDF_MANDATORY)</div><div class='add'>+        if self.pdf:</div><div class='add'>+            self.check_missing_tex()</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, "zypper install --no-recommends")</div><div class='add'>+</div><div class='add'>+    def give_mageia_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for Mageia and OpenMandriva.</div><div class='add'>+        """</div><div class='add'>+        progs = {</div><div class='add'>+            "Pod::Usage":    "perl-Pod-Usage",</div><div class='add'>+            "convert":       "ImageMagick",</div><div class='add'>+            "dot":           "graphviz",</div><div class='add'>+            "python-sphinx": "python3-sphinx",</div><div class='add'>+            "rsvg-convert":  "librsvg2",</div><div class='add'>+            "virtualenv":    "python3-virtualenv",</div><div class='add'>+            "xelatex":       "texlive",</div><div class='add'>+            "yaml":          "python3-yaml",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        tex_pkgs = [</div><div class='add'>+            "texlive-fontsextra",</div><div class='add'>+            "texlive-fonts-asian",</div><div class='add'>+            "fonts-ttf-dejavu",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        if re.search(r"OpenMandriva", self.system_release):</div><div class='add'>+            packager_cmd = "dnf install"</div><div class='add'>+            noto_sans = "noto-sans-cjk-fonts"</div><div class='add'>+            tex_pkgs = [</div><div class='add'>+                "texlive-collection-basic",</div><div class='add'>+                "texlive-collection-langcjk",</div><div class='add'>+                "texlive-collection-fontsextra",</div><div class='add'>+                "texlive-collection-fontsrecommended"</div><div class='add'>+            ]</div><div class='add'>+</div><div class='add'>+            # Tested on OpenMandriva Lx 4.3</div><div class='add'>+            progs["convert"] = "imagemagick"</div><div class='add'>+            progs["yaml"] = "python-pyyaml"</div><div class='add'>+            progs["python-virtualenv"] = "python-virtualenv"</div><div class='add'>+            progs["python-sphinx"] = "python-sphinx"</div><div class='add'>+            progs["xelatex"] = "texlive"</div><div class='add'>+</div><div class='add'>+            self.check_program("python-virtualenv", DepManager.PYTHON_MANDATORY)</div><div class='add'>+</div><div class='add'>+            # On my tests with openMandriva LX 4.0 docker image, upgraded</div><div class='add'>+            # to 4.3, python-virtualenv package is broken: it is missing</div><div class='add'>+            # ensurepip. Without it, the alternative would be to run:</div><div class='add'>+            # python3 -m venv --without-pip ~/sphinx_latest, but running</div><div class='add'>+            # pip there won't install sphinx at venv.</div><div class='add'>+            #</div><div class='add'>+            # Add a note about that.</div><div class='add'>+</div><div class='add'>+            if not self.distro_msg:</div><div class='add'>+                self.distro_msg = \</div><div class='add'>+                    "Notes:\n"\</div><div class='add'>+                    "1. for venv, ensurepip could be broken, preventing its install method.\n" \</div><div class='add'>+                    "2. at least on OpenMandriva LX 4.3, texlive packages seem broken"</div><div class='add'>+</div><div class='add'>+        else:</div><div class='add'>+            packager_cmd = "urpmi"</div><div class='add'>+            noto_sans = "google-noto-sans-cjk-ttc-fonts"</div><div class='add'>+</div><div class='add'>+        progs["latexmk"] = "texlive-collection-basic"</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            pdf_pkgs = [</div><div class='add'>+                "/usr/share/fonts/google-noto-cjk/NotoSansCJK-Regular.ttc",</div><div class='add'>+                "/usr/share/fonts/TTF/NotoSans-Regular.ttf",</div><div class='add'>+            ]</div><div class='add'>+</div><div class='add'>+            self.check_missing_file(pdf_pkgs, noto_sans, DepManager.PDF_MANDATORY)</div><div class='add'>+            self.check_rpm_missing(tex_pkgs, DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, packager_cmd)</div><div class='add'>+</div><div class='add'>+    def give_arch_linux_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for ArchLinux.</div><div class='add'>+        """</div><div class='add'>+        progs = {</div><div class='add'>+            "convert":      "imagemagick",</div><div class='add'>+            "dot":          "graphviz",</div><div class='add'>+            "latexmk":      "texlive-core",</div><div class='add'>+            "rsvg-convert": "extra/librsvg",</div><div class='add'>+            "virtualenv":   "python-virtualenv",</div><div class='add'>+            "xelatex":      "texlive-xetex",</div><div class='add'>+            "yaml":         "python-yaml",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        archlinux_tex_pkgs = [</div><div class='add'>+            "texlive-basic",</div><div class='add'>+            "texlive-binextra",</div><div class='add'>+            "texlive-core",</div><div class='add'>+            "texlive-fontsrecommended",</div><div class='add'>+            "texlive-langchinese",</div><div class='add'>+            "texlive-langcjk",</div><div class='add'>+            "texlive-latexextra",</div><div class='add'>+            "ttf-dejavu",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            self.check_pacman_missing(archlinux_tex_pkgs,</div><div class='add'>+                                      DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+            self.check_missing_file(["/usr/share/fonts/noto-cjk/NotoSansCJK-Regular.ttc"],</div><div class='add'>+                                    "noto-fonts-cjk",</div><div class='add'>+                                    DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, "pacman -S")</div><div class='add'>+</div><div class='add'>+    def give_gentoo_hints(self):</div><div class='add'>+        """</div><div class='add'>+        Provide package installation hints for Gentoo.</div><div class='add'>+        """</div><div class='add'>+        texlive_deps = [</div><div class='add'>+            "dev-texlive/texlive-fontsrecommended",</div><div class='add'>+            "dev-texlive/texlive-latexextra",</div><div class='add'>+            "dev-texlive/texlive-xetex",</div><div class='add'>+            "media-fonts/dejavu",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        progs = {</div><div class='add'>+            "convert":       "media-gfx/imagemagick",</div><div class='add'>+            "dot":           "media-gfx/graphviz",</div><div class='add'>+            "rsvg-convert":  "gnome-base/librsvg",</div><div class='add'>+            "virtualenv":    "dev-python/virtualenv",</div><div class='add'>+            "xelatex":       " ".join(texlive_deps),</div><div class='add'>+            "yaml":          "dev-python/pyyaml",</div><div class='add'>+            "python-sphinx": "dev-python/sphinx",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            pdf_pkgs = {</div><div class='add'>+                "media-fonts/dejavu": [</div><div class='add'>+                    "/usr/share/fonts/dejavu/DejaVuSans.ttf",</div><div class='add'>+                ],</div><div class='add'>+                "media-fonts/noto-cjk": [</div><div class='add'>+                    "/usr/share/fonts/noto-cjk/NotoSansCJKsc-Regular.otf",</div><div class='add'>+                    "/usr/share/fonts/noto-cjk/NotoSerifCJK-Regular.ttc",</div><div class='add'>+                ],</div><div class='add'>+            }</div><div class='add'>+            for package, files in pdf_pkgs.items():</div><div class='add'>+                self.check_missing_file(files, package, DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+        # Handling dependencies is a nightmare, as Gentoo refuses to emerge</div><div class='add'>+        # some packages if there's no package.use file describing them.</div><div class='add'>+        # To make it worse, compilation flags shall also be present there</div><div class='add'>+        # for some packages. If USE is not perfect, error/warning messages</div><div class='add'>+        #   like those are shown:</div><div class='add'>+        #</div><div class='add'>+        #   !!! The following binary packages have been ignored due to non matching USE:</div><div class='add'>+        #</div><div class='add'>+        #    =media-gfx/graphviz-12.2.1-r1 X pdf -python_single_target_python3_13 qt6 svg</div><div class='add'>+        #    =media-gfx/graphviz-12.2.1-r1 X pdf python_single_target_python3_12 -python_single_target_python3_13 qt6 svg</div><div class='add'>+        #    =media-gfx/graphviz-12.2.1-r1 X pdf qt6 svg</div><div class='add'>+        #    =media-gfx/graphviz-12.2.1-r1 X pdf -python_single_target_python3_10 qt6 svg</div><div class='add'>+        #    =media-gfx/graphviz-12.2.1-r1 X pdf -python_single_target_python3_10 python_single_target_python3_12 -python_single_target_python3_13 qt6 svg</div><div class='add'>+        #    =media-fonts/noto-cjk-20190416 X</div><div class='add'>+        #    =app-text/texlive-core-2024-r1 X cjk -xetex</div><div class='add'>+        #    =app-text/texlive-core-2024-r1 X -xetex</div><div class='add'>+        #    =app-text/texlive-core-2024-r1 -xetex</div><div class='add'>+        #    =dev-libs/zziplib-0.13.79-r1 sdl</div><div class='add'>+        #</div><div class='add'>+        # And will ignore such packages, installing the remaining ones. That</div><div class='add'>+        # affects mostly the image extension and PDF generation.</div><div class='add'>+</div><div class='add'>+        # Package dependencies and the minimal needed args:</div><div class='add'>+        portages = {</div><div class='add'>+            "graphviz": "media-gfx/graphviz",</div><div class='add'>+            "imagemagick": "media-gfx/imagemagick",</div><div class='add'>+            "media-libs": "media-libs/harfbuzz icu",</div><div class='add'>+            "media-fonts": "media-fonts/noto-cjk",</div><div class='add'>+            "texlive": "app-text/texlive-core xetex",</div><div class='add'>+            "zziblib": "dev-libs/zziplib sdl",</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        extra_cmds = ""</div><div class='add'>+        if not self.distro_msg:</div><div class='add'>+            self.distro_msg = "Note: Gentoo requires package.use to be adjusted before emerging packages"</div><div class='add'>+</div><div class='add'>+            use_base = "/etc/portage/package.use"</div><div class='add'>+            files = glob(f"{use_base}/*")</div><div class='add'>+</div><div class='add'>+            for fname, portage in portages.items():</div><div class='add'>+                install = False</div><div class='add'>+</div><div class='add'>+                while install is False:</div><div class='add'>+                    if not files:</div><div class='add'>+                        # No files under package.usage. Install all</div><div class='add'>+                        install = True</div><div class='add'>+                        break</div><div class='add'>+</div><div class='add'>+                    args = portage.split(" ")</div><div class='add'>+</div><div class='add'>+                    name = args.pop(0)</div><div class='add'>+</div><div class='add'>+                    cmd = ["grep", "-l", "-E", rf"^{name}\b" ] + files</div><div class='add'>+                    result = self.run(cmd, stdout=subprocess.PIPE, text=True)</div><div class='add'>+                    if result.returncode or not result.stdout.strip():</div><div class='add'>+                        # File containing portage name not found</div><div class='add'>+                        install = True</div><div class='add'>+                        break</div><div class='add'>+</div><div class='add'>+                    # Ensure that needed USE flags are present</div><div class='add'>+                    if args:</div><div class='add'>+                        match_fname = result.stdout.strip()</div><div class='add'>+                        with open(match_fname, 'r', encoding='utf8',</div><div class='add'>+                                errors='backslashreplace') as fp:</div><div class='add'>+                            for line in fp:</div><div class='add'>+                                for arg in args:</div><div class='add'>+                                    if arg.startswith("-"):</div><div class='add'>+                                        continue</div><div class='add'>+</div><div class='add'>+                                if not re.search(rf"\s*{arg}\b", line):</div><div class='add'>+                                    # Needed file argument not found</div><div class='add'>+                                    install = True</div><div class='add'>+                                    break</div><div class='add'>+</div><div class='add'>+                    # Everything looks ok, don't install</div><div class='add'>+                    break</div><div class='add'>+</div><div class='add'>+                # emit a code to setup missing USE</div><div class='add'>+                if install:</div><div class='add'>+                    extra_cmds += (f"sudo su -c 'echo \"{portage}\" &gt; {use_base}/{fname}'\n")</div><div class='add'>+</div><div class='add'>+        # Now, we can use emerge and let it respect USE</div><div class='add'>+        return self.get_install_progs(progs,</div><div class='add'>+                                      "emerge --ask --changed-use --binpkg-respect-use=y",</div><div class='add'>+                                      extra_cmds)</div><div class='add'>+</div><div class='add'>+    def get_install(self):</div><div class='add'>+        """</div><div class='add'>+        OS-specific hints logic. Seeks for a hinter. If found, use it to</div><div class='add'>+        provide package-manager specific install commands.</div><div class='add'>+</div><div class='add'>+        Otherwise, outputs install instructions for the meta-packages.</div><div class='add'>+</div><div class='add'>+        Returns a string with the command to be executed to install the</div><div class='add'>+        the needed packages, if distro found. Otherwise, return just a</div><div class='add'>+        list of packages that require installation.</div><div class='add'>+        """</div><div class='add'>+        os_hints = {</div><div class='add'>+            re.compile("Red Hat Enterprise Linux"):   self.give_redhat_hints,</div><div class='add'>+            re.compile("Fedora"):                     self.give_redhat_hints,</div><div class='add'>+            re.compile("AlmaLinux"):                  self.give_redhat_hints,</div><div class='add'>+            re.compile("Amazon Linux"):               self.give_redhat_hints,</div><div class='add'>+            re.compile("CentOS"):                     self.give_redhat_hints,</div><div class='add'>+            re.compile("openEuler"):                  self.give_redhat_hints,</div><div class='add'>+            re.compile("Oracle Linux Server"):        self.give_redhat_hints,</div><div class='add'>+            re.compile("Rocky Linux"):                self.give_redhat_hints,</div><div class='add'>+            re.compile("Springdale Open Enterprise"): self.give_redhat_hints,</div><div class='add'>+</div><div class='add'>+            re.compile("Ubuntu"):                     self.give_debian_hints,</div><div class='add'>+            re.compile("Debian"):                     self.give_debian_hints,</div><div class='add'>+            re.compile("Devuan"):                     self.give_debian_hints,</div><div class='add'>+            re.compile("Kali"):                       self.give_debian_hints,</div><div class='add'>+            re.compile("Mint"):                       self.give_debian_hints,</div><div class='add'>+</div><div class='add'>+            re.compile("openSUSE"):                   self.give_opensuse_hints,</div><div class='add'>+</div><div class='add'>+            re.compile("Mageia"):                     self.give_mageia_hints,</div><div class='add'>+            re.compile("OpenMandriva"):               self.give_mageia_hints,</div><div class='add'>+</div><div class='add'>+            re.compile("Arch Linux"):                 self.give_arch_linux_hints,</div><div class='add'>+            re.compile("Gentoo"):                     self.give_gentoo_hints,</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        # If the OS is detected, use per-OS hint logic</div><div class='add'>+        for regex, os_hint in os_hints.items():</div><div class='add'>+            if regex.search(self.system_release):</div><div class='add'>+                return os_hint()</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Fall-back to generic hint code for other distros</div><div class='add'>+        # That's far from ideal, specially for LaTeX dependencies.</div><div class='add'>+        #</div><div class='add'>+        progs = {"sphinx-build": "sphinx"}</div><div class='add'>+        if self.pdf:</div><div class='add'>+            self.check_missing_tex()</div><div class='add'>+</div><div class='add'>+        self.distro_msg = \</div><div class='add'>+            f"I don't know distro {self.system_release}.\n" \</div><div class='add'>+            "So, I can't provide you a hint with the install procedure.\n" \</div><div class='add'>+            "There are likely missing dependencies."</div><div class='add'>+</div><div class='add'>+        return self.get_install_progs(progs, None)</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Common dependencies</div><div class='add'>+    #</div><div class='add'>+    def deactivate_help(self):</div><div class='add'>+        """</div><div class='add'>+        Print a helper message to disable a virtual environment.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        print("\n    If you want to exit the virtualenv, you can use:")</div><div class='add'>+        print("\tdeactivate")</div><div class='add'>+</div><div class='add'>+    def get_virtenv(self):</div><div class='add'>+        """</div><div class='add'>+        Give a hint about how to activate an already-existing virtual</div><div class='add'>+        environment containing sphinx-build.</div><div class='add'>+</div><div class='add'>+        Returns a tuble with (activate_cmd_path, sphinx_version) with</div><div class='add'>+        the newest available virtual env.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        cwd = os.getcwd()</div><div class='add'>+</div><div class='add'>+        activates = []</div><div class='add'>+</div><div class='add'>+        # Add all sphinx prefixes with possible version numbers</div><div class='add'>+        for p in self.virtenv_prefix:</div><div class='add'>+            activates += glob(f"{cwd}/{p}[0-9]*/bin/activate")</div><div class='add'>+</div><div class='add'>+        activates.sort(reverse=True, key=str.lower)</div><div class='add'>+</div><div class='add'>+        # Place sphinx_latest first, if it exists</div><div class='add'>+        for p in self.virtenv_prefix:</div><div class='add'>+            activates = glob(f"{cwd}/{p}*latest/bin/activate") + activates</div><div class='add'>+</div><div class='add'>+        ver = (0, 0, 0)</div><div class='add'>+        for f in activates:</div><div class='add'>+            # Discard too old Sphinx virtual environments</div><div class='add'>+            match = re.search(r"(\d+)\.(\d+)\.(\d+)", f)</div><div class='add'>+            if match:</div><div class='add'>+                ver = (int(match.group(1)), int(match.group(2)), int(match.group(3)))</div><div class='add'>+</div><div class='add'>+                if ver &lt; self.min_version:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+            sphinx_cmd = f.replace("activate", "sphinx-build")</div><div class='add'>+            if not os.path.isfile(sphinx_cmd):</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            ver = self.get_sphinx_version(sphinx_cmd)</div><div class='add'>+</div><div class='add'>+            if not ver:</div><div class='add'>+                venv_dir = f.replace("/bin/activate", "")</div><div class='add'>+                print(f"Warning: virtual environment {venv_dir} is not working.\n" \</div><div class='add'>+                      "Python version upgrade? Remove it with:\n\n" \</div><div class='add'>+                      "\trm -rf {venv_dir}\n\n")</div><div class='add'>+            else:</div><div class='add'>+                if self.need_sphinx and ver &gt;= self.min_version:</div><div class='add'>+                    return (f, ver)</div><div class='add'>+                elif PythonVersion.parse_version(ver) &gt; self.cur_version:</div><div class='add'>+                    return (f, ver)</div><div class='add'>+</div><div class='add'>+        return ("", ver)</div><div class='add'>+</div><div class='add'>+    def recommend_sphinx_upgrade(self):</div><div class='add'>+        """</div><div class='add'>+        Check if Sphinx needs to be upgraded.</div><div class='add'>+</div><div class='add'>+        Returns a tuple with the higest available Sphinx version if found.</div><div class='add'>+        Otherwise, returns None to indicate either that no upgrade is needed</div><div class='add'>+        or no venv was found.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # Avoid running sphinx-builds from venv if cur_version is good</div><div class='add'>+        if self.cur_version and self.cur_version &gt;= RECOMMENDED_VERSION:</div><div class='add'>+            self.latest_avail_ver = self.cur_version</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        # Get the highest version from sphinx_*/bin/sphinx-build and the</div><div class='add'>+        # corresponding command to activate the venv/virtenv</div><div class='add'>+        self.activate_cmd, self.venv_ver = self.get_virtenv()</div><div class='add'>+</div><div class='add'>+        # Store the highest version from Sphinx existing virtualenvs</div><div class='add'>+        if self.activate_cmd and self.venv_ver &gt; self.cur_version:</div><div class='add'>+            self.latest_avail_ver = self.venv_ver</div><div class='add'>+        else:</div><div class='add'>+            if self.cur_version:</div><div class='add'>+                self.latest_avail_ver = self.cur_version</div><div class='add'>+            else:</div><div class='add'>+                self.latest_avail_ver = (0, 0, 0)</div><div class='add'>+</div><div class='add'>+        # As we don't know package version of Sphinx, and there's no</div><div class='add'>+        # virtual environments, don't check if upgrades are needed</div><div class='add'>+        if not self.virtualenv:</div><div class='add'>+            if not self.latest_avail_ver:</div><div class='add'>+                return None</div><div class='add'>+</div><div class='add'>+            return self.latest_avail_ver</div><div class='add'>+</div><div class='add'>+        # Either there are already a virtual env or a new one should be created</div><div class='add'>+        self.need_pip = True</div><div class='add'>+</div><div class='add'>+        if not self.latest_avail_ver:</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        # Return if the reason is due to an upgrade or not</div><div class='add'>+        if self.latest_avail_ver != (0, 0, 0):</div><div class='add'>+            if self.latest_avail_ver &lt; RECOMMENDED_VERSION:</div><div class='add'>+                self.rec_sphinx_upgrade = 1</div><div class='add'>+</div><div class='add'>+        return self.latest_avail_ver</div><div class='add'>+</div><div class='add'>+    def recommend_package(self):</div><div class='add'>+        """</div><div class='add'>+        Recommend installing Sphinx as a distro-specific package.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        print("\n2) As a package with:")</div><div class='add'>+</div><div class='add'>+        old_need = self.deps.need</div><div class='add'>+        old_optional = self.deps.optional</div><div class='add'>+</div><div class='add'>+        self.pdf = False</div><div class='add'>+        self.deps.optional = 0</div><div class='add'>+        old_verbose = self.verbose_warn_install</div><div class='add'>+        self.verbose_warn_install = 0</div><div class='add'>+</div><div class='add'>+        self.deps.clear_deps()</div><div class='add'>+</div><div class='add'>+        self.deps.add_package("python-sphinx", DepManager.PYTHON_MANDATORY)</div><div class='add'>+</div><div class='add'>+        cmd = self.get_install()</div><div class='add'>+        if cmd:</div><div class='add'>+            print(cmd)</div><div class='add'>+</div><div class='add'>+        self.deps.need = old_need</div><div class='add'>+        self.deps.optional = old_optional</div><div class='add'>+        self.verbose_warn_install = old_verbose</div><div class='add'>+</div><div class='add'>+    def recommend_sphinx_version(self, virtualenv_cmd):</div><div class='add'>+        """</div><div class='add'>+        Provide recommendations for installing or upgrading Sphinx based</div><div class='add'>+        on current version.</div><div class='add'>+</div><div class='add'>+        The logic here is complex, as it have to deal with different versions:</div><div class='add'>+</div><div class='add'>+        - minimal supported version;</div><div class='add'>+        - minimal PDF version;</div><div class='add'>+        - recommended version.</div><div class='add'>+</div><div class='add'>+        It also needs to work fine with both distro's package and</div><div class='add'>+        venv/virtualenv</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if self.recommend_python:</div><div class='add'>+            cur_ver = sys.version_info[:3]</div><div class='add'>+            if cur_ver &lt; MIN_PYTHON_VERSION:</div><div class='add'>+                print(f"\nPython version {cur_ver} is incompatible with doc build.\n" \</div><div class='add'>+                    "Please upgrade it and re-run.\n")</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+        # Version is OK. Nothing to do.</div><div class='add'>+        if self.cur_version != (0, 0, 0) and self.cur_version &gt;= RECOMMENDED_VERSION:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if self.latest_avail_ver:</div><div class='add'>+            latest_avail_ver = PythonVersion.ver_str(self.latest_avail_ver)</div><div class='add'>+</div><div class='add'>+        if not self.need_sphinx:</div><div class='add'>+            # sphinx-build is present and its version is &gt;= $min_version</div><div class='add'>+</div><div class='add'>+            # only recommend enabling a newer virtenv version if makes sense.</div><div class='add'>+            if self.latest_avail_ver and self.latest_avail_ver &gt; self.cur_version:</div><div class='add'>+                print(f"\nYou may also use the newer Sphinx version {latest_avail_ver} with:")</div><div class='add'>+                if f"{self.virtenv_prefix}" in os.getcwd():</div><div class='add'>+                    print("\tdeactivate")</div><div class='add'>+                print(f"\t. {self.activate_cmd}")</div><div class='add'>+                self.deactivate_help()</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            if self.latest_avail_ver and self.latest_avail_ver &gt;= RECOMMENDED_VERSION:</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+        if not self.virtualenv:</div><div class='add'>+            # No sphinx either via package or via virtenv. As we can't</div><div class='add'>+            # Compare the versions here, just return, recommending the</div><div class='add'>+            # user to install it from the package distro.</div><div class='add'>+            if not self.latest_avail_ver or self.latest_avail_ver == (0, 0, 0):</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            # User doesn't want a virtenv recommendation, but he already</div><div class='add'>+            # installed one via virtenv with a newer version.</div><div class='add'>+            # So, print commands to enable it</div><div class='add'>+            if self.latest_avail_ver &gt; self.cur_version:</div><div class='add'>+                print(f"\nYou may also use the Sphinx virtualenv version {latest_avail_ver} with:")</div><div class='add'>+                if f"{self.virtenv_prefix}" in os.getcwd():</div><div class='add'>+                    print("\tdeactivate")</div><div class='add'>+                print(f"\t. {self.activate_cmd}")</div><div class='add'>+                self.deactivate_help()</div><div class='add'>+                return</div><div class='add'>+            print("\n")</div><div class='add'>+        else:</div><div class='add'>+            if self.need_sphinx:</div><div class='add'>+                self.deps.need += 1</div><div class='add'>+</div><div class='add'>+        # Suggest newer versions if current ones are too old</div><div class='add'>+        if self.latest_avail_ver and self.latest_avail_ver &gt;= self.min_version:</div><div class='add'>+            if self.latest_avail_ver &gt;= RECOMMENDED_VERSION:</div><div class='add'>+                print(f"\nNeed to activate Sphinx (version {latest_avail_ver}) on virtualenv with:")</div><div class='add'>+                print(f"\t. {self.activate_cmd}")</div><div class='add'>+                self.deactivate_help()</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            # Version is above the minimal required one, but may be</div><div class='add'>+            # below the recommended one. So, print warnings/notes</div><div class='add'>+            if self.latest_avail_ver &lt; RECOMMENDED_VERSION:</div><div class='add'>+                print(f"Warning: It is recommended at least Sphinx version {RECOMMENDED_VERSION}.")</div><div class='add'>+</div><div class='add'>+        # At this point, either it needs Sphinx or upgrade is recommended,</div><div class='add'>+        # both via pip</div><div class='add'>+</div><div class='add'>+        if self.rec_sphinx_upgrade:</div><div class='add'>+            if not self.virtualenv:</div><div class='add'>+                print("Instead of install/upgrade Python Sphinx pkg, you could use pip/pypi with:\n\n")</div><div class='add'>+            else:</div><div class='add'>+                print("To upgrade Sphinx, use:\n\n")</div><div class='add'>+        else:</div><div class='add'>+            print("\nSphinx needs to be installed either:\n1) via pip/pypi with:\n")</div><div class='add'>+</div><div class='add'>+        if not virtualenv_cmd:</div><div class='add'>+            print("   Currently not possible.\n")</div><div class='add'>+            print("   Please upgrade Python to a newer version and run this script again")</div><div class='add'>+        else:</div><div class='add'>+            print(f"\t{virtualenv_cmd} {self.virtenv_dir}")</div><div class='add'>+            print(f"\t. {self.virtenv_dir}/bin/activate")</div><div class='add'>+            print(f"\tpip install -r {self.requirement_file}")</div><div class='add'>+            self.deactivate_help()</div><div class='add'>+</div><div class='add'>+        if self.package_supported:</div><div class='add'>+            self.recommend_package()</div><div class='add'>+</div><div class='add'>+        print("\n" \</div><div class='add'>+              "   Please note that Sphinx currentlys produce false-positive\n" \</div><div class='add'>+              "   warnings when the same name is used for more than one type (functions,\n" \</div><div class='add'>+              "   structs, enums,...). This is known Sphinx bug. For more details, see:\n" \</div><div class='add'>+              "\thttps://github.com/sphinx-doc/sphinx/pull/8313")</div><div class='add'>+</div><div class='add'>+    def check_needs(self):</div><div class='add'>+        """</div><div class='add'>+        Main method that checks needed dependencies and provides</div><div class='add'>+        recommendations.</div><div class='add'>+        """</div><div class='add'>+        self.python_cmd = sys.executable</div><div class='add'>+</div><div class='add'>+        # Check if Sphinx is already accessible from current environment</div><div class='add'>+        self.check_sphinx(self.conf)</div><div class='add'>+</div><div class='add'>+        if self.system_release:</div><div class='add'>+            print(f"Detected OS: {self.system_release}.")</div><div class='add'>+        else:</div><div class='add'>+            print("Unknown OS")</div><div class='add'>+        if self.cur_version != (0, 0, 0):</div><div class='add'>+            ver = PythonVersion.ver_str(self.cur_version)</div><div class='add'>+            print(f"Sphinx version: {ver}\n")</div><div class='add'>+</div><div class='add'>+        # Check the type of virtual env, depending on Python version</div><div class='add'>+        virtualenv_cmd = None</div><div class='add'>+</div><div class='add'>+        if sys.version_info &lt; MIN_PYTHON_VERSION:</div><div class='add'>+            min_ver = ver_str(MIN_PYTHON_VERSION)</div><div class='add'>+            print(f"ERROR: at least python {min_ver} is required to build the kernel docs")</div><div class='add'>+            self.need_sphinx = 1</div><div class='add'>+</div><div class='add'>+        self.venv_ver = self.recommend_sphinx_upgrade()</div><div class='add'>+</div><div class='add'>+        if self.need_pip:</div><div class='add'>+            if sys.version_info &lt; MIN_PYTHON_VERSION:</div><div class='add'>+                self.need_pip = False</div><div class='add'>+                print("Warning: python version is not supported.")</div><div class='add'>+            else:</div><div class='add'>+                virtualenv_cmd = f"{self.python_cmd} -m venv"</div><div class='add'>+                self.check_python_module("ensurepip")</div><div class='add'>+</div><div class='add'>+        # Check for needed programs/tools</div><div class='add'>+        self.check_perl_module("Pod::Usage", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+</div><div class='add'>+        self.check_program("make", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+        self.check_program("which", DepManager.SYSTEM_MANDATORY)</div><div class='add'>+</div><div class='add'>+        self.check_program("dot", DepManager.SYSTEM_OPTIONAL)</div><div class='add'>+        self.check_program("convert", DepManager.SYSTEM_OPTIONAL)</div><div class='add'>+</div><div class='add'>+        self.check_python_module("yaml")</div><div class='add'>+</div><div class='add'>+        if self.pdf:</div><div class='add'>+            self.check_program("xelatex", DepManager.PDF_MANDATORY)</div><div class='add'>+            self.check_program("rsvg-convert", DepManager.PDF_MANDATORY)</div><div class='add'>+            self.check_program("latexmk", DepManager.PDF_MANDATORY)</div><div class='add'>+</div><div class='add'>+        # Do distro-specific checks and output distro-install commands</div><div class='add'>+        cmd = self.get_install()</div><div class='add'>+        if cmd:</div><div class='add'>+            print(cmd)</div><div class='add'>+</div><div class='add'>+        # If distro requires some special instructions, print here.</div><div class='add'>+        # Please notice that get_install() needs to be called first.</div><div class='add'>+        if self.distro_msg:</div><div class='add'>+            print("\n" + self.distro_msg)</div><div class='add'>+</div><div class='add'>+        if not self.python_cmd:</div><div class='add'>+            if self.need == 1:</div><div class='add'>+                sys.exit("Can't build as 1 mandatory dependency is missing")</div><div class='add'>+            elif self.need:</div><div class='add'>+                sys.exit(f"Can't build as {self.need} mandatory dependencies are missing")</div><div class='add'>+</div><div class='add'>+        # Check if sphinx-build is called sphinx-build-3</div><div class='add'>+        if self.need_symlink:</div><div class='add'>+            sphinx_path = self.which("sphinx-build-3")</div><div class='add'>+            if sphinx_path:</div><div class='add'>+                print(f"\tsudo ln -sf {sphinx_path} /usr/bin/sphinx-build\n")</div><div class='add'>+</div><div class='add'>+        self.recommend_sphinx_version(virtualenv_cmd)</div><div class='add'>+        print("")</div><div class='add'>+</div><div class='add'>+        if not self.deps.optional:</div><div class='add'>+            print("All optional dependencies are met.")</div><div class='add'>+</div><div class='add'>+        if self.deps.need == 1:</div><div class='add'>+            sys.exit("Can't build as 1 mandatory dependency is missing")</div><div class='add'>+        elif self.deps.need:</div><div class='add'>+            sys.exit(f"Can't build as {self.deps.need} mandatory dependencies are missing")</div><div class='add'>+</div><div class='add'>+        print("Needed package dependencies are met.")</div><div class='add'>+</div><div class='add'>+DESCRIPTION = """</div><div class='add'>+Process some flags related to Sphinx installation and documentation build.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def main():</div><div class='add'>+    """Main function"""</div><div class='add'>+    parser = argparse.ArgumentParser(description=DESCRIPTION)</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "--no-virtualenv",</div><div class='add'>+        action="store_false",</div><div class='add'>+        dest="virtualenv",</div><div class='add'>+        help="Recommend installing Sphinx instead of using a virtualenv",</div><div class='add'>+    )</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "--no-pdf",</div><div class='add'>+        action="store_false",</div><div class='add'>+        dest="pdf",</div><div class='add'>+        help="Don't check for dependencies required to build PDF docs",</div><div class='add'>+    )</div><div class='add'>+</div><div class='add'>+    parser.add_argument(</div><div class='add'>+        "--version-check",</div><div class='add'>+        action="store_true",</div><div class='add'>+        dest="version_check",</div><div class='add'>+        help="If version is compatible, don't check for missing dependencies",</div><div class='add'>+    )</div><div class='add'>+</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    checker = SphinxDependencyChecker(args)</div><div class='add'>+</div><div class='add'>+    PythonVersion.check_python(MIN_PYTHON_VERSION,</div><div class='add'>+                               bail_out=True, success_on_error=True)</div><div class='add'>+    checker.check_needs()</div><div class='add'>+</div><div class='add'>+# Call main if not used as module</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    main()</div><div class='head'>diff --git a/tools/docs/test_doc_build.py b/tools/docs/test_doc_build.py<br/>new file mode 100755<br/>index 000000000000..47b4606569f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/docs/test_doc_build.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/docs/test_doc_build.py</a></div><div class='hunk'>@@ -0,0 +1,513 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;</div><div class='add'>+#</div><div class='add'>+# pylint: disable=R0903,R0912,R0913,R0914,R0917,C0301</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Install minimal supported requirements for different Sphinx versions</div><div class='add'>+and optionally test the build.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import asyncio</div><div class='add'>+import os.path</div><div class='add'>+import shutil</div><div class='add'>+import sys</div><div class='add'>+import time</div><div class='add'>+import subprocess</div><div class='add'>+</div><div class='add'>+# Minimal python version supported by the building system.</div><div class='add'>+</div><div class='add'>+PYTHON = os.path.basename(sys.executable)</div><div class='add'>+</div><div class='add'>+min_python_bin = None</div><div class='add'>+</div><div class='add'>+for i in range(9, 13):</div><div class='add'>+    p = f"python3.{i}"</div><div class='add'>+    if shutil.which(p):</div><div class='add'>+        min_python_bin = p</div><div class='add'>+        break</div><div class='add'>+</div><div class='add'>+if not min_python_bin:</div><div class='add'>+    min_python_bin = PYTHON</div><div class='add'>+</div><div class='add'>+# Starting from 8.0, Python 3.9 is not supported anymore.</div><div class='add'>+PYTHON_VER_CHANGES = {(8, 0, 0): PYTHON}</div><div class='add'>+</div><div class='add'>+DEFAULT_VERSIONS_TO_TEST = [</div><div class='add'>+    (3, 4, 3),   # Minimal supported version</div><div class='add'>+    (5, 3, 0),   # CentOS Stream 9 / AlmaLinux 9</div><div class='add'>+    (6, 1, 1),   # Debian 12</div><div class='add'>+    (7, 2, 1),   # openSUSE Leap 15.6</div><div class='add'>+    (7, 2, 6),   # Ubuntu 24.04 LTS</div><div class='add'>+    (7, 4, 7),   # Ubuntu 24.10</div><div class='add'>+    (7, 3, 0),   # openSUSE Tumbleweed</div><div class='add'>+    (8, 1, 3),   # Fedora 42</div><div class='add'>+    (8, 2, 3)    # Latest version - covers rolling distros</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+# Sphinx versions to be installed and their incremental requirements</div><div class='add'>+SPHINX_REQUIREMENTS = {</div><div class='add'>+    # Oldest versions we support for each package required by Sphinx 3.4.3</div><div class='add'>+    (3, 4, 3): {</div><div class='add'>+        "docutils": "0.16",</div><div class='add'>+        "alabaster": "0.7.12",</div><div class='add'>+        "babel": "2.8.0",</div><div class='add'>+        "certifi": "2020.6.20",</div><div class='add'>+        "docutils": "0.16",</div><div class='add'>+        "idna": "2.10",</div><div class='add'>+        "imagesize": "1.2.0",</div><div class='add'>+        "Jinja2": "2.11.2",</div><div class='add'>+        "MarkupSafe": "1.1.1",</div><div class='add'>+        "packaging": "20.4",</div><div class='add'>+        "Pygments": "2.6.1",</div><div class='add'>+        "PyYAML": "5.1",</div><div class='add'>+        "requests": "2.24.0",</div><div class='add'>+        "snowballstemmer": "2.0.0",</div><div class='add'>+        "sphinxcontrib-applehelp": "1.0.2",</div><div class='add'>+        "sphinxcontrib-devhelp": "1.0.2",</div><div class='add'>+        "sphinxcontrib-htmlhelp": "1.0.3",</div><div class='add'>+        "sphinxcontrib-jsmath": "1.0.1",</div><div class='add'>+        "sphinxcontrib-qthelp": "1.0.3",</div><div class='add'>+        "sphinxcontrib-serializinghtml": "1.1.4",</div><div class='add'>+        "urllib3": "1.25.9",</div><div class='add'>+    },</div><div class='add'>+</div><div class='add'>+    # Update package dependencies to a more modern base. The goal here</div><div class='add'>+    # is to avoid to many incremental changes for the next entries</div><div class='add'>+    (3, 5, 0): {</div><div class='add'>+        "alabaster": "0.7.13",</div><div class='add'>+        "babel": "2.17.0",</div><div class='add'>+        "certifi": "2025.6.15",</div><div class='add'>+        "idna": "3.10",</div><div class='add'>+        "imagesize": "1.4.1",</div><div class='add'>+        "packaging": "25.0",</div><div class='add'>+        "Pygments": "2.8.1",</div><div class='add'>+        "requests": "2.32.4",</div><div class='add'>+        "snowballstemmer": "3.0.1",</div><div class='add'>+        "sphinxcontrib-applehelp": "1.0.4",</div><div class='add'>+        "sphinxcontrib-htmlhelp": "2.0.1",</div><div class='add'>+        "sphinxcontrib-serializinghtml": "1.1.5",</div><div class='add'>+        "urllib3": "2.0.0",</div><div class='add'>+    },</div><div class='add'>+</div><div class='add'>+    # Starting from here, ensure all docutils versions are covered with</div><div class='add'>+    # supported Sphinx versions. Other packages are upgraded only when</div><div class='add'>+    # required by pip</div><div class='add'>+    (4, 0, 0): {</div><div class='add'>+        "PyYAML": "5.1",</div><div class='add'>+    },</div><div class='add'>+    (4, 1, 0): {</div><div class='add'>+        "docutils": "0.17",</div><div class='add'>+        "Pygments": "2.19.1",</div><div class='add'>+        "Jinja2": "3.0.3",</div><div class='add'>+        "MarkupSafe": "2.0",</div><div class='add'>+    },</div><div class='add'>+    (4, 3, 0): {},</div><div class='add'>+    (4, 4, 0): {},</div><div class='add'>+    (4, 5, 0): {</div><div class='add'>+        "docutils": "0.17.1",</div><div class='add'>+    },</div><div class='add'>+    (5, 0, 0): {},</div><div class='add'>+    (5, 1, 0): {},</div><div class='add'>+    (5, 2, 0): {</div><div class='add'>+        "docutils": "0.18",</div><div class='add'>+        "Jinja2": "3.1.2",</div><div class='add'>+        "MarkupSafe": "2.0",</div><div class='add'>+        "PyYAML": "5.3.1",</div><div class='add'>+    },</div><div class='add'>+    (5, 3, 0): {</div><div class='add'>+        "docutils": "0.18.1",</div><div class='add'>+    },</div><div class='add'>+    (6, 0, 0): {},</div><div class='add'>+    (6, 1, 0): {},</div><div class='add'>+    (6, 2, 0): {</div><div class='add'>+        "PyYAML": "5.4.1",</div><div class='add'>+    },</div><div class='add'>+    (7, 0, 0): {},</div><div class='add'>+    (7, 1, 0): {},</div><div class='add'>+    (7, 2, 0): {</div><div class='add'>+        "docutils": "0.19",</div><div class='add'>+        "PyYAML": "6.0.1",</div><div class='add'>+        "sphinxcontrib-serializinghtml": "1.1.9",</div><div class='add'>+    },</div><div class='add'>+    (7, 2, 6): {</div><div class='add'>+        "docutils": "0.20",</div><div class='add'>+    },</div><div class='add'>+    (7, 3, 0): {</div><div class='add'>+        "alabaster": "0.7.14",</div><div class='add'>+        "PyYAML": "6.0.1",</div><div class='add'>+        "tomli": "2.0.1",</div><div class='add'>+    },</div><div class='add'>+    (7, 4, 0): {</div><div class='add'>+        "docutils": "0.20.1",</div><div class='add'>+        "PyYAML": "6.0.1",</div><div class='add'>+    },</div><div class='add'>+    (8, 0, 0): {</div><div class='add'>+        "docutils": "0.21",</div><div class='add'>+    },</div><div class='add'>+    (8, 1, 0): {</div><div class='add'>+        "docutils": "0.21.1",</div><div class='add'>+        "PyYAML": "6.0.1",</div><div class='add'>+        "sphinxcontrib-applehelp": "1.0.7",</div><div class='add'>+        "sphinxcontrib-devhelp": "1.0.6",</div><div class='add'>+        "sphinxcontrib-htmlhelp": "2.0.6",</div><div class='add'>+        "sphinxcontrib-qthelp": "1.0.6",</div><div class='add'>+    },</div><div class='add'>+    (8, 2, 0): {</div><div class='add'>+        "docutils": "0.21.2",</div><div class='add'>+        "PyYAML": "6.0.1",</div><div class='add'>+        "sphinxcontrib-serializinghtml": "1.1.9",</div><div class='add'>+    },</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class AsyncCommands:</div><div class='add'>+    """Excecute command synchronously"""</div><div class='add'>+</div><div class='add'>+    def __init__(self, fp=None):</div><div class='add'>+</div><div class='add'>+        self.stdout = None</div><div class='add'>+        self.stderr = None</div><div class='add'>+        self.output = None</div><div class='add'>+        self.fp = fp</div><div class='add'>+</div><div class='add'>+    def log(self, out, verbose, is_info=True):</div><div class='add'>+        out = out.removesuffix('\n')</div><div class='add'>+</div><div class='add'>+        if verbose:</div><div class='add'>+            if is_info:</div><div class='add'>+                print(out)</div><div class='add'>+            else:</div><div class='add'>+                print(out, file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        if self.fp:</div><div class='add'>+            self.fp.write(out + "\n")</div><div class='add'>+</div><div class='add'>+    async def _read(self, stream, verbose, is_info):</div><div class='add'>+        """Ancillary routine to capture while displaying"""</div><div class='add'>+</div><div class='add'>+        while stream is not None:</div><div class='add'>+            line = await stream.readline()</div><div class='add'>+            if line:</div><div class='add'>+                out = line.decode("utf-8", errors="backslashreplace")</div><div class='add'>+                self.log(out, verbose, is_info)</div><div class='add'>+                if is_info:</div><div class='add'>+                    self.stdout += out</div><div class='add'>+                else:</div><div class='add'>+                    self.stderr += out</div><div class='add'>+            else:</div><div class='add'>+                break</div><div class='add'>+</div><div class='add'>+    async def run(self, cmd, capture_output=False, check=False,</div><div class='add'>+                  env=None, verbose=True):</div><div class='add'>+</div><div class='add'>+        """</div><div class='add'>+        Execute an arbitrary command, handling errors.</div><div class='add'>+</div><div class='add'>+        Please notice that this class is not thread safe</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.stdout = ""</div><div class='add'>+        self.stderr = ""</div><div class='add'>+</div><div class='add'>+        self.log("$ " + " ".join(cmd), verbose)</div><div class='add'>+</div><div class='add'>+        proc = await asyncio.create_subprocess_exec(cmd[0],</div><div class='add'>+                                                    *cmd[1:],</div><div class='add'>+                                                    env=env,</div><div class='add'>+                                                    stdout=asyncio.subprocess.PIPE,</div><div class='add'>+                                                    stderr=asyncio.subprocess.PIPE)</div><div class='add'>+</div><div class='add'>+        # Handle input and output in realtime</div><div class='add'>+        await asyncio.gather(</div><div class='add'>+            self._read(proc.stdout, verbose, True),</div><div class='add'>+            self._read(proc.stderr, verbose, False),</div><div class='add'>+        )</div><div class='add'>+</div><div class='add'>+        await proc.wait()</div><div class='add'>+</div><div class='add'>+        if check and proc.returncode &gt; 0:</div><div class='add'>+            raise subprocess.CalledProcessError(returncode=proc.returncode,</div><div class='add'>+                                                cmd=" ".join(cmd),</div><div class='add'>+                                                output=self.stdout,</div><div class='add'>+                                                stderr=self.stderr)</div><div class='add'>+</div><div class='add'>+        if capture_output:</div><div class='add'>+            if proc.returncode &gt; 0:</div><div class='add'>+                self.log(f"Error {proc.returncode}", verbose=True, is_info=False)</div><div class='add'>+                return ""</div><div class='add'>+</div><div class='add'>+            return self.output</div><div class='add'>+</div><div class='add'>+        ret = subprocess.CompletedProcess(args=cmd,</div><div class='add'>+                                          returncode=proc.returncode,</div><div class='add'>+                                          stdout=self.stdout,</div><div class='add'>+                                          stderr=self.stderr)</div><div class='add'>+</div><div class='add'>+        return ret</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class SphinxVenv:</div><div class='add'>+    """</div><div class='add'>+    Installs Sphinx on one virtual env per Sphinx version with a minimal</div><div class='add'>+    set of dependencies, adjusting them to each specific version.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self):</div><div class='add'>+        """Initialize instance variables"""</div><div class='add'>+</div><div class='add'>+        self.built_time = {}</div><div class='add'>+        self.first_run = True</div><div class='add'>+</div><div class='add'>+    async def _handle_version(self, args, fp,</div><div class='add'>+                              cur_ver, cur_requirements, python_bin):</div><div class='add'>+        """Handle a single Sphinx version"""</div><div class='add'>+</div><div class='add'>+        cmd = AsyncCommands(fp)</div><div class='add'>+</div><div class='add'>+        ver = ".".join(map(str, cur_ver))</div><div class='add'>+</div><div class='add'>+        if not self.first_run and args.wait_input and args.build:</div><div class='add'>+            ret = input("Press Enter to continue or 'a' to abort: ").strip().lower()</div><div class='add'>+            if ret == "a":</div><div class='add'>+                print("Aborted.")</div><div class='add'>+                sys.exit()</div><div class='add'>+        else:</div><div class='add'>+            self.first_run = False</div><div class='add'>+</div><div class='add'>+        venv_dir = f"Sphinx_{ver}"</div><div class='add'>+        req_file = f"requirements_{ver}.txt"</div><div class='add'>+</div><div class='add'>+        cmd.log(f"\nSphinx {ver} with {python_bin}", verbose=True)</div><div class='add'>+</div><div class='add'>+        # Create venv</div><div class='add'>+        await cmd.run([python_bin, "-m", "venv", venv_dir],</div><div class='add'>+                      verbose=args.verbose, check=True)</div><div class='add'>+        pip = os.path.join(venv_dir, "bin/pip")</div><div class='add'>+</div><div class='add'>+        # Create install list</div><div class='add'>+        reqs = []</div><div class='add'>+        for pkg, verstr in cur_requirements.items():</div><div class='add'>+            reqs.append(f"{pkg}=={verstr}")</div><div class='add'>+</div><div class='add'>+        reqs.append(f"Sphinx=={ver}")</div><div class='add'>+</div><div class='add'>+        await cmd.run([pip, "install"] + reqs, check=True, verbose=args.verbose)</div><div class='add'>+</div><div class='add'>+        # Freeze environment</div><div class='add'>+        result = await cmd.run([pip, "freeze"], verbose=False, check=True)</div><div class='add'>+</div><div class='add'>+        # Pip install succeeded. Write requirements file</div><div class='add'>+        if args.req_file:</div><div class='add'>+            with open(req_file, "w", encoding="utf-8") as fp:</div><div class='add'>+                fp.write(result.stdout)</div><div class='add'>+</div><div class='add'>+        if args.build:</div><div class='add'>+            start_time = time.time()</div><div class='add'>+</div><div class='add'>+            # Prepare a venv environment</div><div class='add'>+            env = os.environ.copy()</div><div class='add'>+            bin_dir = os.path.join(venv_dir, "bin")</div><div class='add'>+            env["PATH"] = bin_dir + ":" + env["PATH"]</div><div class='add'>+            env["VIRTUAL_ENV"] = venv_dir</div><div class='add'>+            if "PYTHONHOME" in env:</div><div class='add'>+                del env["PYTHONHOME"]</div><div class='add'>+</div><div class='add'>+            # Test doc build</div><div class='add'>+            await cmd.run(["make", "cleandocs"], env=env, check=True)</div><div class='add'>+            make = ["make"]</div><div class='add'>+</div><div class='add'>+            if args.output:</div><div class='add'>+                sphinx_build = os.path.realpath(f"{bin_dir}/sphinx-build")</div><div class='add'>+                make += [f"O={args.output}", f"SPHINXBUILD={sphinx_build}"]</div><div class='add'>+</div><div class='add'>+            if args.make_args:</div><div class='add'>+                make += args.make_args</div><div class='add'>+</div><div class='add'>+            make += args.targets</div><div class='add'>+</div><div class='add'>+            if args.verbose:</div><div class='add'>+                cmd.log(f". {bin_dir}/activate", verbose=True)</div><div class='add'>+            await cmd.run(make, env=env, check=True, verbose=True)</div><div class='add'>+            if args.verbose:</div><div class='add'>+                cmd.log("deactivate", verbose=True)</div><div class='add'>+</div><div class='add'>+            end_time = time.time()</div><div class='add'>+            elapsed_time = end_time - start_time</div><div class='add'>+            hours, minutes = divmod(elapsed_time, 3600)</div><div class='add'>+            minutes, seconds = divmod(minutes, 60)</div><div class='add'>+</div><div class='add'>+            hours = int(hours)</div><div class='add'>+            minutes = int(minutes)</div><div class='add'>+            seconds = int(seconds)</div><div class='add'>+</div><div class='add'>+            self.built_time[ver] = f"{hours:02d}:{minutes:02d}:{seconds:02d}"</div><div class='add'>+</div><div class='add'>+            cmd.log(f"Finished doc build for Sphinx {ver}. Elapsed time: {self.built_time[ver]}", verbose=True)</div><div class='add'>+</div><div class='add'>+    async def run(self, args):</div><div class='add'>+        """</div><div class='add'>+        Navigate though multiple Sphinx versions, handling each of them</div><div class='add'>+        on a loop.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if args.log:</div><div class='add'>+            fp = open(args.log, "w", encoding="utf-8")</div><div class='add'>+            if not args.verbose:</div><div class='add'>+                args.verbose = False</div><div class='add'>+        else:</div><div class='add'>+            fp = None</div><div class='add'>+            if not args.verbose:</div><div class='add'>+                args.verbose = True</div><div class='add'>+</div><div class='add'>+        cur_requirements = {}</div><div class='add'>+        python_bin = min_python_bin</div><div class='add'>+</div><div class='add'>+        vers = set(SPHINX_REQUIREMENTS.keys()) | set(args.versions)</div><div class='add'>+</div><div class='add'>+        for cur_ver in sorted(vers):</div><div class='add'>+            if cur_ver in SPHINX_REQUIREMENTS:</div><div class='add'>+                new_reqs = SPHINX_REQUIREMENTS[cur_ver]</div><div class='add'>+                cur_requirements.update(new_reqs)</div><div class='add'>+</div><div class='add'>+            if cur_ver in PYTHON_VER_CHANGES:          # pylint: disable=R1715</div><div class='add'>+                python_bin = PYTHON_VER_CHANGES[cur_ver]</div><div class='add'>+</div><div class='add'>+            if cur_ver not in args.versions:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if args.min_version:</div><div class='add'>+                if cur_ver &lt; args.min_version:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+            if args.max_version:</div><div class='add'>+                if cur_ver &gt; args.max_version:</div><div class='add'>+                    break</div><div class='add'>+</div><div class='add'>+            await self._handle_version(args, fp, cur_ver, cur_requirements,</div><div class='add'>+                                       python_bin)</div><div class='add'>+</div><div class='add'>+        if args.build:</div><div class='add'>+            cmd = AsyncCommands(fp)</div><div class='add'>+            cmd.log("\nSummary:", verbose=True)</div><div class='add'>+            for ver, elapsed_time in sorted(self.built_time.items()):</div><div class='add'>+                cmd.log(f"\tSphinx {ver} elapsed time: {elapsed_time}",</div><div class='add'>+                        verbose=True)</div><div class='add'>+</div><div class='add'>+        if fp:</div><div class='add'>+            fp.close()</div><div class='add'>+</div><div class='add'>+def parse_version(ver_str):</div><div class='add'>+    """Convert a version string into a tuple."""</div><div class='add'>+</div><div class='add'>+    return tuple(map(int, ver_str.split(".")))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+DEFAULT_VERS = "    - "</div><div class='add'>+DEFAULT_VERS += "\n    - ".join(map(lambda v: f"{v[0]}.{v[1]}.{v[2]}",</div><div class='add'>+                                    DEFAULT_VERSIONS_TO_TEST))</div><div class='add'>+</div><div class='add'>+SCRIPT = os.path.relpath(__file__)</div><div class='add'>+</div><div class='add'>+DESCRIPTION = f"""</div><div class='add'>+This tool allows creating Python virtual environments for different</div><div class='add'>+Sphinx versions that are supported by the Linux Kernel build system.</div><div class='add'>+</div><div class='add'>+Besides creating the virtual environment, it can also test building</div><div class='add'>+the documentation using "make htmldocs" (and/or other doc targets).</div><div class='add'>+</div><div class='add'>+If called without "--versions" argument, it covers the versions shipped</div><div class='add'>+on major distros, plus the lowest supported version:</div><div class='add'>+</div><div class='add'>+{DEFAULT_VERS}</div><div class='add'>+</div><div class='add'>+A typical usage is to run:</div><div class='add'>+</div><div class='add'>+   {SCRIPT} -m -l sphinx_builds.log</div><div class='add'>+</div><div class='add'>+This will create one virtual env for the default version set and run</div><div class='add'>+"make htmldocs" for each version, creating a log file with the</div><div class='add'>+excecuted commands on it.</div><div class='add'>+</div><div class='add'>+NOTE: The build time can be very long, specially on old versions. Also, there</div><div class='add'>+is a known bug with Sphinx version 6.0.x: each subprocess uses a lot of</div><div class='add'>+memory. That, together with "-jauto" may cause OOM killer to cause</div><div class='add'>+failures at the doc generation. To minimize the risk, you may use the</div><div class='add'>+"-a" command line parameter to constrain the built directories and/or</div><div class='add'>+reduce the number of threads from "-jauto" to, for instance, "-j4":</div><div class='add'>+</div><div class='add'>+    {SCRIPT} -m -V 6.0.1 -a "SPHINXDIRS=process" "SPHINXOPTS='-j4'"</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+MAKE_TARGETS = [</div><div class='add'>+    "htmldocs",</div><div class='add'>+    "texinfodocs",</div><div class='add'>+    "infodocs",</div><div class='add'>+    "latexdocs",</div><div class='add'>+    "pdfdocs",</div><div class='add'>+    "epubdocs",</div><div class='add'>+    "xmldocs",</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+async def main():</div><div class='add'>+    """Main program"""</div><div class='add'>+</div><div class='add'>+    parser = argparse.ArgumentParser(description=DESCRIPTION,</div><div class='add'>+                                     formatter_class=argparse.RawDescriptionHelpFormatter)</div><div class='add'>+</div><div class='add'>+    ver_group = parser.add_argument_group("Version range options")</div><div class='add'>+</div><div class='add'>+    ver_group.add_argument('-V', '--versions', nargs="*",</div><div class='add'>+                           default=DEFAULT_VERSIONS_TO_TEST,type=parse_version,</div><div class='add'>+                           help='Sphinx versions to test')</div><div class='add'>+    ver_group.add_argument('--min-version', "--min", type=parse_version,</div><div class='add'>+                           help='Sphinx minimal version')</div><div class='add'>+    ver_group.add_argument('--max-version', "--max", type=parse_version,</div><div class='add'>+                           help='Sphinx maximum version')</div><div class='add'>+    ver_group.add_argument('-f', '--full', action='store_true',</div><div class='add'>+                           help='Add all Sphinx (major,minor) supported versions to the version range')</div><div class='add'>+</div><div class='add'>+    build_group = parser.add_argument_group("Build options")</div><div class='add'>+</div><div class='add'>+    build_group.add_argument('-b', '--build', action='store_true',</div><div class='add'>+                             help='Build documentation')</div><div class='add'>+    build_group.add_argument('-a', '--make-args', nargs="*",</div><div class='add'>+                             help='extra arguments for make, like SPHINXDIRS=netlink/specs',</div><div class='add'>+                        )</div><div class='add'>+    build_group.add_argument('-t', '--targets', nargs="+", choices=MAKE_TARGETS,</div><div class='add'>+                             default=[MAKE_TARGETS[0]],</div><div class='add'>+                             help="make build targets. Default: htmldocs.")</div><div class='add'>+    build_group.add_argument("-o", '--output',</div><div class='add'>+                             help="output directory for the make O=OUTPUT")</div><div class='add'>+</div><div class='add'>+    other_group = parser.add_argument_group("Other options")</div><div class='add'>+</div><div class='add'>+    other_group.add_argument('-r', '--req-file', action='store_true',</div><div class='add'>+                             help='write a requirements.txt file')</div><div class='add'>+    other_group.add_argument('-l', '--log',</div><div class='add'>+                             help='Log command output on a file')</div><div class='add'>+    other_group.add_argument('-v', '--verbose', action='store_true',</div><div class='add'>+                             help='Verbose all commands')</div><div class='add'>+    other_group.add_argument('-i', '--wait-input', action='store_true',</div><div class='add'>+                        help='Wait for an enter before going to the next version')</div><div class='add'>+</div><div class='add'>+    args = parser.parse_args()</div><div class='add'>+</div><div class='add'>+    if not args.make_args:</div><div class='add'>+        args.make_args = []</div><div class='add'>+</div><div class='add'>+    sphinx_versions = sorted(list(SPHINX_REQUIREMENTS.keys()))</div><div class='add'>+</div><div class='add'>+    if args.full:</div><div class='add'>+        args.versions += list(SPHINX_REQUIREMENTS.keys())</div><div class='add'>+</div><div class='add'>+    venv = SphinxVenv()</div><div class='add'>+    await venv.run(args)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+# Call main method</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    asyncio.run(main())</div><div class='head'>diff --git a/tools/gpio/Makefile b/tools/gpio/Makefile<br/>index ed565eb52275..342e056c8c66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/gpio/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/gpio/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/gpio/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/gpio/Makefile</a></div><div class='hunk'>@@ -77,7 +77,7 @@ $(OUTPUT)gpio-watch: $(GPIO_WATCH_IN)</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='ctx'> 	rm -f $(ALL_PROGRAMS)</div><div class='del'>-	rm -f $(OUTPUT)include/linux/gpio.h</div><div class='add'>+	rm -rf $(OUTPUT)include</div><div class='ctx'> 	find $(or $(OUTPUT),.) -name '*.o' -delete -o -name '\.*.d' -delete -o -name '\.*.cmd' -delete</div><div class='ctx'> </div><div class='ctx'> install: $(ALL_PROGRAMS)</div><div class='head'>diff --git a/tools/iio/iio_event_monitor.c b/tools/iio/iio_event_monitor.c<br/>index eab7b082f19d..03ca33869ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/iio/iio_event_monitor.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/iio/iio_event_monitor.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/iio/iio_event_monitor.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/iio/iio_event_monitor.c</a></div><div class='hunk'>@@ -64,6 +64,7 @@ static const char * const iio_chan_type_name_spec[] = {</div><div class='ctx'> 	[IIO_COLORTEMP] = "colortemp",</div><div class='ctx'> 	[IIO_CHROMATICITY] = "chromaticity",</div><div class='ctx'> 	[IIO_ATTENTION] = "attention",</div><div class='add'>+	[IIO_ALTCURRENT] = "altcurrent",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const iio_ev_type_text[] = {</div><div class='hunk'>@@ -140,6 +141,10 @@ static const char * const iio_modifier_names[] = {</div><div class='ctx'> 	[IIO_MOD_PITCH] = "pitch",</div><div class='ctx'> 	[IIO_MOD_YAW] = "yaw",</div><div class='ctx'> 	[IIO_MOD_ROLL] = "roll",</div><div class='add'>+	[IIO_MOD_RMS] = "rms",</div><div class='add'>+	[IIO_MOD_ACTIVE] = "active",</div><div class='add'>+	[IIO_MOD_REACTIVE] = "reactive",</div><div class='add'>+	[IIO_MOD_APPARENT] = "apparent",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool event_is_known(struct iio_event_data *event)</div><div class='hunk'>@@ -187,6 +192,7 @@ static bool event_is_known(struct iio_event_data *event)</div><div class='ctx'> 	case IIO_COLORTEMP:</div><div class='ctx'> 	case IIO_CHROMATICITY:</div><div class='ctx'> 	case IIO_ATTENTION:</div><div class='add'>+	case IIO_ALTCURRENT:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -238,6 +244,10 @@ static bool event_is_known(struct iio_event_data *event)</div><div class='ctx'> 	case IIO_MOD_PM4:</div><div class='ctx'> 	case IIO_MOD_PM10:</div><div class='ctx'> 	case IIO_MOD_O2:</div><div class='add'>+	case IIO_MOD_RMS:</div><div class='add'>+	case IIO_MOD_ACTIVE:</div><div class='add'>+	case IIO_MOD_REACTIVE:</div><div class='add'>+	case IIO_MOD_APPARENT:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/tools/include/asm-generic/bitops/__fls.h b/tools/include/asm-generic/bitops/__fls.h<br/>index e974ec932ec1..35f33780ca6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/__fls.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/__fls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/__fls.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/asm-generic/bitops/__fls.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Undefined if no set bit exists, so code should check against 0 first.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned int generic___fls(unsigned long word)</div><div class='add'>+static __always_inline __attribute_const__ unsigned int generic___fls(unsigned long word)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int num = BITS_PER_LONG - 1;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/asm-generic/bitops/fls.h b/tools/include/asm-generic/bitops/fls.h<br/>index 26f3ce1dd6e4..8eed3437edb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/fls.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/fls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/fls.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/asm-generic/bitops/fls.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'>  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static __always_inline int generic_fls(unsigned int x)</div><div class='add'>+static __always_inline __attribute_const__ int generic_fls(unsigned int x)</div><div class='ctx'> {</div><div class='ctx'> 	int r = 32;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/asm-generic/bitops/fls64.h b/tools/include/asm-generic/bitops/fls64.h<br/>index 866f2b2304ff..b5f58dd261a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/fls64.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/asm-generic/bitops/fls64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/bitops/fls64.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/asm-generic/bitops/fls64.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'>  * at position 64.</div><div class='ctx'>  */</div><div class='ctx'> #if BITS_PER_LONG == 32</div><div class='del'>-static __always_inline int fls64(__u64 x)</div><div class='add'>+static __always_inline __attribute_const__ int fls64(__u64 x)</div><div class='ctx'> {</div><div class='ctx'> 	__u32 h = x &gt;&gt; 32;</div><div class='ctx'> 	if (h)</div><div class='hunk'>@@ -24,7 +24,7 @@ static __always_inline int fls64(__u64 x)</div><div class='ctx'> 	return fls(x);</div><div class='ctx'> }</div><div class='ctx'> #elif BITS_PER_LONG == 64</div><div class='del'>-static __always_inline int fls64(__u64 x)</div><div class='add'>+static __always_inline __attribute_const__ int fls64(__u64 x)</div><div class='ctx'> {</div><div class='ctx'> 	if (x == 0)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/tools/include/asm-generic/io.h b/tools/include/asm-generic/io.h<br/>new file mode 100644<br/>index 000000000000..e5a0b07ad452<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/asm-generic/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/asm-generic/io.h</a></div><div class='hunk'>@@ -0,0 +1,482 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _TOOLS_ASM_GENERIC_IO_H</div><div class='add'>+#define _TOOLS_ASM_GENERIC_IO_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef mmiowb_set_pending</div><div class='add'>+#define mmiowb_set_pending() do { } while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __io_br</div><div class='add'>+#define __io_br()      barrier()</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* prevent prefetching of coherent DMA data ahead of a dma-complete */</div><div class='add'>+#ifndef __io_ar</div><div class='add'>+#ifdef rmb</div><div class='add'>+#define __io_ar(v)      rmb()</div><div class='add'>+#else</div><div class='add'>+#define __io_ar(v)      barrier()</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* flush writes to coherent DMA data before possibly triggering a DMA read */</div><div class='add'>+#ifndef __io_bw</div><div class='add'>+#ifdef wmb</div><div class='add'>+#define __io_bw()      wmb()</div><div class='add'>+#else</div><div class='add'>+#define __io_bw()      barrier()</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* serialize device access against a spin_unlock, usually handled there. */</div><div class='add'>+#ifndef __io_aw</div><div class='add'>+#define __io_aw()      mmiowb_set_pending()</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __io_pbw</div><div class='add'>+#define __io_pbw()     __io_bw()</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __io_paw</div><div class='add'>+#define __io_paw()     __io_aw()</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __io_pbr</div><div class='add'>+#define __io_pbr()     __io_br()</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __io_par</div><div class='add'>+#define __io_par(v)     __io_ar(v)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef _THIS_IP_</div><div class='add'>+#define _THIS_IP_ 0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr,</div><div class='add'>+				  unsigned long caller_addr, unsigned long caller_addr0) {}</div><div class='add'>+static inline void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr,</div><div class='add'>+				       unsigned long caller_addr, unsigned long caller_addr0) {}</div><div class='add'>+static inline void log_read_mmio(u8 width, const volatile void __iomem *addr,</div><div class='add'>+				 unsigned long caller_addr, unsigned long caller_addr0) {}</div><div class='add'>+static inline void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr,</div><div class='add'>+				      unsigned long caller_addr, unsigned long caller_addr0) {}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __raw_{read,write}{b,w,l,q}() access memory in native endianness.</div><div class='add'>+ *</div><div class='add'>+ * On some architectures memory mapped IO needs to be accessed differently.</div><div class='add'>+ * On the simple architectures, we just read/write the memory location</div><div class='add'>+ * directly.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __raw_readb</div><div class='add'>+#define __raw_readb __raw_readb</div><div class='add'>+static inline u8 __raw_readb(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return *(const volatile u8 __force *)addr;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_readw</div><div class='add'>+#define __raw_readw __raw_readw</div><div class='add'>+static inline u16 __raw_readw(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return *(const volatile u16 __force *)addr;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_readl</div><div class='add'>+#define __raw_readl __raw_readl</div><div class='add'>+static inline u32 __raw_readl(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return *(const volatile u32 __force *)addr;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_readq</div><div class='add'>+#define __raw_readq __raw_readq</div><div class='add'>+static inline u64 __raw_readq(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return *(const volatile u64 __force *)addr;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_writeb</div><div class='add'>+#define __raw_writeb __raw_writeb</div><div class='add'>+static inline void __raw_writeb(u8 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile u8 __force *)addr = value;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_writew</div><div class='add'>+#define __raw_writew __raw_writew</div><div class='add'>+static inline void __raw_writew(u16 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile u16 __force *)addr = value;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_writel</div><div class='add'>+#define __raw_writel __raw_writel</div><div class='add'>+static inline void __raw_writel(u32 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile u32 __force *)addr = value;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __raw_writeq</div><div class='add'>+#define __raw_writeq __raw_writeq</div><div class='add'>+static inline void __raw_writeq(u64 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	*(volatile u64 __force *)addr = value;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * {read,write}{b,w,l,q}() access little endian memory and return result in</div><div class='add'>+ * native endianness.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef readb</div><div class='add'>+#define readb readb</div><div class='add'>+static inline u8 readb(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_br();</div><div class='add'>+	val = __raw_readb(addr);</div><div class='add'>+	__io_ar(val);</div><div class='add'>+	log_post_read_mmio(val, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readw</div><div class='add'>+#define readw readw</div><div class='add'>+static inline u16 readw(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_br();</div><div class='add'>+	val = __le16_to_cpu((__le16 __force)__raw_readw(addr));</div><div class='add'>+	__io_ar(val);</div><div class='add'>+	log_post_read_mmio(val, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readl</div><div class='add'>+#define readl readl</div><div class='add'>+static inline u32 readl(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_br();</div><div class='add'>+	val = __le32_to_cpu((__le32 __force)__raw_readl(addr));</div><div class='add'>+	__io_ar(val);</div><div class='add'>+	log_post_read_mmio(val, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readq</div><div class='add'>+#define readq readq</div><div class='add'>+static inline u64 readq(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_br();</div><div class='add'>+	val = __le64_to_cpu((__le64 __force)__raw_readq(addr));</div><div class='add'>+	__io_ar(val);</div><div class='add'>+	log_post_read_mmio(val, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writeb</div><div class='add'>+#define writeb writeb</div><div class='add'>+static inline void writeb(u8 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_bw();</div><div class='add'>+	__raw_writeb(value, addr);</div><div class='add'>+	__io_aw();</div><div class='add'>+	log_post_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writew</div><div class='add'>+#define writew writew</div><div class='add'>+static inline void writew(u16 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_bw();</div><div class='add'>+	__raw_writew((u16 __force)cpu_to_le16(value), addr);</div><div class='add'>+	__io_aw();</div><div class='add'>+	log_post_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writel</div><div class='add'>+#define writel writel</div><div class='add'>+static inline void writel(u32 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_bw();</div><div class='add'>+	__raw_writel((u32 __force)__cpu_to_le32(value), addr);</div><div class='add'>+	__io_aw();</div><div class='add'>+	log_post_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writeq</div><div class='add'>+#define writeq writeq</div><div class='add'>+static inline void writeq(u64 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__io_bw();</div><div class='add'>+	__raw_writeq((u64 __force)__cpu_to_le64(value), addr);</div><div class='add'>+	__io_aw();</div><div class='add'>+	log_post_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * {read,write}{b,w,l,q}_relaxed() are like the regular version, but</div><div class='add'>+ * are not guaranteed to provide ordering against spinlocks or memory</div><div class='add'>+ * accesses.</div><div class='add'>+ */</div><div class='add'>+#ifndef readb_relaxed</div><div class='add'>+#define readb_relaxed readb_relaxed</div><div class='add'>+static inline u8 readb_relaxed(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	val = __raw_readb(addr);</div><div class='add'>+	log_post_read_mmio(val, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readw_relaxed</div><div class='add'>+#define readw_relaxed readw_relaxed</div><div class='add'>+static inline u16 readw_relaxed(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	val = __le16_to_cpu((__le16 __force)__raw_readw(addr));</div><div class='add'>+	log_post_read_mmio(val, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readl_relaxed</div><div class='add'>+#define readl_relaxed readl_relaxed</div><div class='add'>+static inline u32 readl_relaxed(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	val = __le32_to_cpu((__le32 __force)__raw_readl(addr));</div><div class='add'>+	log_post_read_mmio(val, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(readq) &amp;&amp; !defined(readq_relaxed)</div><div class='add'>+#define readq_relaxed readq_relaxed</div><div class='add'>+static inline u64 readq_relaxed(const volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	log_read_mmio(64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	val = __le64_to_cpu((__le64 __force)__raw_readq(addr));</div><div class='add'>+	log_post_read_mmio(val, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writeb_relaxed</div><div class='add'>+#define writeb_relaxed writeb_relaxed</div><div class='add'>+static inline void writeb_relaxed(u8 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__raw_writeb(value, addr);</div><div class='add'>+	log_post_write_mmio(value, 8, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writew_relaxed</div><div class='add'>+#define writew_relaxed writew_relaxed</div><div class='add'>+static inline void writew_relaxed(u16 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__raw_writew((u16 __force)cpu_to_le16(value), addr);</div><div class='add'>+	log_post_write_mmio(value, 16, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writel_relaxed</div><div class='add'>+#define writel_relaxed writel_relaxed</div><div class='add'>+static inline void writel_relaxed(u32 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__raw_writel((u32 __force)__cpu_to_le32(value), addr);</div><div class='add'>+	log_post_write_mmio(value, 32, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(writeq) &amp;&amp; !defined(writeq_relaxed)</div><div class='add'>+#define writeq_relaxed writeq_relaxed</div><div class='add'>+static inline void writeq_relaxed(u64 value, volatile void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	log_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+	__raw_writeq((u64 __force)__cpu_to_le64(value), addr);</div><div class='add'>+	log_post_write_mmio(value, 64, addr, _THIS_IP_, _RET_IP_);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * {read,write}s{b,w,l,q}() repeatedly access the same memory address in</div><div class='add'>+ * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).</div><div class='add'>+ */</div><div class='add'>+#ifndef readsb</div><div class='add'>+#define readsb readsb</div><div class='add'>+static inline void readsb(const volatile void __iomem *addr, void *buffer,</div><div class='add'>+			  unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		u8 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			u8 x = __raw_readb(addr);</div><div class='add'>+			*buf++ = x;</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readsw</div><div class='add'>+#define readsw readsw</div><div class='add'>+static inline void readsw(const volatile void __iomem *addr, void *buffer,</div><div class='add'>+			  unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		u16 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			u16 x = __raw_readw(addr);</div><div class='add'>+			*buf++ = x;</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readsl</div><div class='add'>+#define readsl readsl</div><div class='add'>+static inline void readsl(const volatile void __iomem *addr, void *buffer,</div><div class='add'>+			  unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		u32 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			u32 x = __raw_readl(addr);</div><div class='add'>+			*buf++ = x;</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef readsq</div><div class='add'>+#define readsq readsq</div><div class='add'>+static inline void readsq(const volatile void __iomem *addr, void *buffer,</div><div class='add'>+			  unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		u64 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			u64 x = __raw_readq(addr);</div><div class='add'>+			*buf++ = x;</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writesb</div><div class='add'>+#define writesb writesb</div><div class='add'>+static inline void writesb(volatile void __iomem *addr, const void *buffer,</div><div class='add'>+			   unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		const u8 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			__raw_writeb(*buf++, addr);</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writesw</div><div class='add'>+#define writesw writesw</div><div class='add'>+static inline void writesw(volatile void __iomem *addr, const void *buffer,</div><div class='add'>+			   unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		const u16 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			__raw_writew(*buf++, addr);</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writesl</div><div class='add'>+#define writesl writesl</div><div class='add'>+static inline void writesl(volatile void __iomem *addr, const void *buffer,</div><div class='add'>+			   unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		const u32 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			__raw_writel(*buf++, addr);</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef writesq</div><div class='add'>+#define writesq writesq</div><div class='add'>+static inline void writesq(volatile void __iomem *addr, const void *buffer,</div><div class='add'>+			   unsigned int count)</div><div class='add'>+{</div><div class='add'>+	if (count) {</div><div class='add'>+		const u64 *buf = buffer;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			__raw_writeq(*buf++, addr);</div><div class='add'>+		} while (--count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _TOOLS_ASM_GENERIC_IO_H */</div><div class='head'>diff --git a/tools/include/asm/io.h b/tools/include/asm/io.h<br/>new file mode 100644<br/>index 000000000000..eed5066f25c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/asm/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/asm/io.h</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _TOOLS_ASM_IO_H</div><div class='add'>+#define _TOOLS_ASM_IO_H</div><div class='add'>+</div><div class='add'>+#if defined(__i386__) || defined(__x86_64__)</div><div class='add'>+#include "../../arch/x86/include/asm/io.h"</div><div class='add'>+#else</div><div class='add'>+#include &lt;asm-generic/io.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _TOOLS_ASM_IO_H */</div><div class='head'>diff --git a/tools/include/linux/args.h b/tools/include/linux/args.h<br/>new file mode 100644<br/>index 000000000000..2e8e65d975c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/args.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/args.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef _LINUX_ARGS_H</div><div class='add'>+#define _LINUX_ARGS_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * How do these macros work?</div><div class='add'>+ *</div><div class='add'>+ * In __COUNT_ARGS() _0 to _12 are just placeholders from the start</div><div class='add'>+ * in order to make sure _n is positioned over the correct number</div><div class='add'>+ * from 12 to 0 (depending on X, which is a variadic argument list).</div><div class='add'>+ * They serve no purpose other than occupying a position. Since each</div><div class='add'>+ * macro parameter must have a distinct identifier, those identifiers</div><div class='add'>+ * are as good as any.</div><div class='add'>+ *</div><div class='add'>+ * In COUNT_ARGS() we use actual integers, so __COUNT_ARGS() returns</div><div class='add'>+ * that as _n.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* This counts to 15. Any more, it will return 16th argument. */</div><div class='add'>+#define __COUNT_ARGS(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, _15, _n, X...) _n</div><div class='add'>+#define COUNT_ARGS(X...) __COUNT_ARGS(, ##X, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)</div><div class='add'>+</div><div class='add'>+/* Concatenate two parameters, but allow them to be expanded beforehand. */</div><div class='add'>+#define __CONCAT(a, b) a ## b</div><div class='add'>+#define CONCATENATE(a, b) __CONCAT(a, b)</div><div class='add'>+</div><div class='add'>+#endif	/* _LINUX_ARGS_H */</div><div class='head'>diff --git a/tools/include/linux/atomic.h b/tools/include/linux/atomic.h<br/>index 01907b33537e..50c66ba9ada5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/atomic.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/atomic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/atomic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/atomic.h</a></div><div class='hunk'>@@ -12,4 +12,26 @@ void atomic_long_set(atomic_long_t *v, long i);</div><div class='ctx'> #define  atomic_cmpxchg_release         atomic_cmpxchg</div><div class='ctx'> #endif /* atomic_cmpxchg_relaxed */</div><div class='ctx'> </div><div class='add'>+static inline bool atomic_try_cmpxchg(atomic_t *ptr, int *oldp, int new)</div><div class='add'>+{</div><div class='add'>+	int ret, old = *oldp;</div><div class='add'>+</div><div class='add'>+	ret = atomic_cmpxchg(ptr, old, new);</div><div class='add'>+	if (ret != old)</div><div class='add'>+		*oldp = ret;</div><div class='add'>+	return ret == old;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool atomic_inc_unless_negative(atomic_t *v)</div><div class='add'>+{</div><div class='add'>+	int c = atomic_read(v);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if (unlikely(c &lt; 0))</div><div class='add'>+			return false;</div><div class='add'>+	} while (!atomic_try_cmpxchg(v, &amp;c, c + 1));</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __TOOLS_LINUX_ATOMIC_H */</div><div class='head'>diff --git a/tools/include/linux/bitmap.h b/tools/include/linux/bitmap.h<br/>index d4d300040d01..0d992245c600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/bitmap.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/bitmap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/bitmap.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/bitmap.h</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #define _TOOLS_LINUX_BITMAP_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;string.h&gt;</div><div class='add'>+#include &lt;asm-generic/bitsperlong.h&gt;</div><div class='ctx'> #include &lt;linux/align.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/find.h&gt;</div><div class='head'>diff --git a/tools/include/linux/bits.h b/tools/include/linux/bits.h<br/>index 7ad056219115..a40cc861b3a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/bits.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/bits.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/bits.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/bits.h</a></div><div class='hunk'>@@ -2,10 +2,8 @@</div><div class='ctx'> #ifndef __LINUX_BITS_H</div><div class='ctx'> #define __LINUX_BITS_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/const.h&gt;</div><div class='ctx'> #include &lt;vdso/bits.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/bits.h&gt;</div><div class='del'>-#include &lt;asm/bitsperlong.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define BIT_MASK(nr)		(UL(1) &lt;&lt; ((nr) % BITS_PER_LONG))</div><div class='ctx'> #define BIT_WORD(nr)		((nr) / BITS_PER_LONG)</div><div class='hunk'>@@ -50,10 +48,14 @@</div><div class='ctx'> 	     (type_max(t) &lt;&lt; (l) &amp;				\</div><div class='ctx'> 	      type_max(t) &gt;&gt; (BITS_PER_TYPE(t) - 1 - (h)))))</div><div class='ctx'> </div><div class='add'>+#define GENMASK(h, l)		GENMASK_TYPE(unsigned long, h, l)</div><div class='add'>+#define GENMASK_ULL(h, l)	GENMASK_TYPE(unsigned long long, h, l)</div><div class='add'>+</div><div class='ctx'> #define GENMASK_U8(h, l)	GENMASK_TYPE(u8, h, l)</div><div class='ctx'> #define GENMASK_U16(h, l)	GENMASK_TYPE(u16, h, l)</div><div class='ctx'> #define GENMASK_U32(h, l)	GENMASK_TYPE(u32, h, l)</div><div class='ctx'> #define GENMASK_U64(h, l)	GENMASK_TYPE(u64, h, l)</div><div class='add'>+#define GENMASK_U128(h, l)	GENMASK_TYPE(u128, h, l)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fixed-type variants of BIT(), with additional checks like GENMASK_TYPE(). The</div><div class='hunk'>@@ -79,28 +81,9 @@</div><div class='ctx'>  * BUILD_BUG_ON_ZERO is not available in h files included from asm files,</div><div class='ctx'>  * disable the input check if that is the case.</div><div class='ctx'>  */</div><div class='del'>-#define GENMASK_INPUT_CHECK(h, l) 0</div><div class='add'>+#define GENMASK(h, l)		__GENMASK(h, l)</div><div class='add'>+#define GENMASK_ULL(h, l)	__GENMASK_ULL(h, l)</div><div class='ctx'> </div><div class='ctx'> #endif /* !defined(__ASSEMBLY__) */</div><div class='ctx'> </div><div class='del'>-#define GENMASK(h, l) \</div><div class='del'>-	(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))</div><div class='del'>-#define GENMASK_ULL(h, l) \</div><div class='del'>-	(GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))</div><div class='del'>-</div><div class='del'>-#if !defined(__ASSEMBLY__)</div><div class='del'>-/*</div><div class='del'>- * Missing asm support</div><div class='del'>- *</div><div class='del'>- * __GENMASK_U128() depends on _BIT128() which would not work</div><div class='del'>- * in the asm code, as it shifts an 'unsigned __int128' data</div><div class='del'>- * type instead of direct representation of 128 bit constants</div><div class='del'>- * such as long and unsigned long. The fundamental problem is</div><div class='del'>- * that a 128 bit constant will get silently truncated by the</div><div class='del'>- * gcc compiler.</div><div class='del'>- */</div><div class='del'>-#define GENMASK_U128(h, l) \</div><div class='del'>-	(GENMASK_INPUT_CHECK(h, l) + __GENMASK_U128(h, l))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif	/* __LINUX_BITS_H */</div><div class='head'>diff --git a/tools/include/linux/cfi_types.h b/tools/include/linux/cfi_types.h<br/>index 6b8713675765..a86af9bc8bdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/cfi_types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/cfi_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/cfi_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/cfi_types.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CFI_CLANG</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='ctx'> /*</div><div class='ctx'>  * Use the __kcfi_typeid_&lt;function&gt; type identifier symbol to</div><div class='ctx'>  * annotate indirectly called assembly functions. The compiler emits</div><div class='hunk'>@@ -29,17 +29,40 @@</div><div class='ctx'> #define SYM_TYPED_START(name, linkage, align...)	\</div><div class='ctx'> 	SYM_TYPED_ENTRY(name, linkage, align)</div><div class='ctx'> </div><div class='del'>-#else /* CONFIG_CFI_CLANG */</div><div class='add'>+#else /* CONFIG_CFI */</div><div class='ctx'> </div><div class='ctx'> #define SYM_TYPED_START(name, linkage, align...)	\</div><div class='ctx'> 	SYM_START(name, linkage, align)</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_CFI_CLANG */</div><div class='add'>+#endif /* CONFIG_CFI */</div><div class='ctx'> </div><div class='ctx'> #ifndef SYM_TYPED_FUNC_START</div><div class='ctx'> #define SYM_TYPED_FUNC_START(name) 			\</div><div class='ctx'> 	SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#else /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CFI</div><div class='add'>+#define DEFINE_CFI_TYPE(name, func)						\</div><div class='add'>+	/*									\</div><div class='add'>+	 * Force a reference to the function so the compiler generates		\</div><div class='add'>+	 * __kcfi_typeid_&lt;func&gt;.						\</div><div class='add'>+	 */									\</div><div class='add'>+	__ADDRESSABLE(func);							\</div><div class='add'>+	/* u32 name __ro_after_init = __kcfi_typeid_&lt;func&gt; */			\</div><div class='add'>+	extern u32 name;							\</div><div class='add'>+	asm (									\</div><div class='add'>+	"	.pushsection	.data..ro_after_init,\"aw\",\%progbits	\n"	\</div><div class='add'>+	"	.type	" #name ",\%object				\n"	\</div><div class='add'>+	"	.globl	" #name "					\n"	\</div><div class='add'>+	"	.p2align	2, 0x0					\n"	\</div><div class='add'>+	#name ":							\n"	\</div><div class='add'>+	"	.4byte	__kcfi_typeid_" #func "				\n"	\</div><div class='add'>+	"	.size	" #name ", 4					\n"	\</div><div class='add'>+	"	.popsection						\n"	\</div><div class='add'>+	);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* _LINUX_CFI_TYPES_H */</div><div class='head'>diff --git a/tools/include/linux/compiler.h b/tools/include/linux/compiler.h<br/>index 33411ca0cc90..f40bd2b04c29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/compiler.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/compiler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/compiler.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/compiler.h</a></div><div class='hunk'>@@ -138,6 +138,10 @@</div><div class='ctx'> # define __force</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef __iomem</div><div class='add'>+# define __iomem</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef __weak</div><div class='ctx'> # define __weak			__attribute__((weak))</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/include/linux/gfp_types.h b/tools/include/linux/gfp_types.h<br/>index 5f9f1ed190a0..65db9349f905 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/gfp_types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/gfp_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/gfp_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/gfp_types.h</a></div><div class='hunk'>@@ -1 +1,392 @@</div><div class='del'>-#include "../../../include/linux/gfp_types.h"</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __LINUX_GFP_TYPES_H</div><div class='add'>+#define __LINUX_GFP_TYPES_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+/* The typedef is in types.h but we want the documentation here */</div><div class='add'>+#if 0</div><div class='add'>+/**</div><div class='add'>+ * typedef gfp_t - Memory allocation flags.</div><div class='add'>+ *</div><div class='add'>+ * GFP flags are commonly used throughout Linux to indicate how memory</div><div class='add'>+ * should be allocated.  The GFP acronym stands for get_free_pages(),</div><div class='add'>+ * the underlying memory allocation function.  Not every GFP flag is</div><div class='add'>+ * supported by every function which may allocate memory.  Most users</div><div class='add'>+ * will want to use a plain ``GFP_KERNEL``.</div><div class='add'>+ */</div><div class='add'>+typedef unsigned int __bitwise gfp_t;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In case of changes, please don't forget to update</div><div class='add'>+ * include/trace/events/mmflags.h and tools/perf/builtin-kmem.c</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	___GFP_DMA_BIT,</div><div class='add'>+	___GFP_HIGHMEM_BIT,</div><div class='add'>+	___GFP_DMA32_BIT,</div><div class='add'>+	___GFP_MOVABLE_BIT,</div><div class='add'>+	___GFP_RECLAIMABLE_BIT,</div><div class='add'>+	___GFP_HIGH_BIT,</div><div class='add'>+	___GFP_IO_BIT,</div><div class='add'>+	___GFP_FS_BIT,</div><div class='add'>+	___GFP_ZERO_BIT,</div><div class='add'>+	___GFP_UNUSED_BIT,	/* 0x200u unused */</div><div class='add'>+	___GFP_DIRECT_RECLAIM_BIT,</div><div class='add'>+	___GFP_KSWAPD_RECLAIM_BIT,</div><div class='add'>+	___GFP_WRITE_BIT,</div><div class='add'>+	___GFP_NOWARN_BIT,</div><div class='add'>+	___GFP_RETRY_MAYFAIL_BIT,</div><div class='add'>+	___GFP_NOFAIL_BIT,</div><div class='add'>+	___GFP_NORETRY_BIT,</div><div class='add'>+	___GFP_MEMALLOC_BIT,</div><div class='add'>+	___GFP_COMP_BIT,</div><div class='add'>+	___GFP_NOMEMALLOC_BIT,</div><div class='add'>+	___GFP_HARDWALL_BIT,</div><div class='add'>+	___GFP_THISNODE_BIT,</div><div class='add'>+	___GFP_ACCOUNT_BIT,</div><div class='add'>+	___GFP_ZEROTAGS_BIT,</div><div class='add'>+#ifdef CONFIG_KASAN_HW_TAGS</div><div class='add'>+	___GFP_SKIP_ZERO_BIT,</div><div class='add'>+	___GFP_SKIP_KASAN_BIT,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_LOCKDEP</div><div class='add'>+	___GFP_NOLOCKDEP_BIT,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SLAB_OBJ_EXT</div><div class='add'>+	___GFP_NO_OBJ_EXT_BIT,</div><div class='add'>+#endif</div><div class='add'>+	___GFP_LAST_BIT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Plain integer GFP bitmasks. Do not use this directly. */</div><div class='add'>+#define ___GFP_DMA		BIT(___GFP_DMA_BIT)</div><div class='add'>+#define ___GFP_HIGHMEM		BIT(___GFP_HIGHMEM_BIT)</div><div class='add'>+#define ___GFP_DMA32		BIT(___GFP_DMA32_BIT)</div><div class='add'>+#define ___GFP_MOVABLE		BIT(___GFP_MOVABLE_BIT)</div><div class='add'>+#define ___GFP_RECLAIMABLE	BIT(___GFP_RECLAIMABLE_BIT)</div><div class='add'>+#define ___GFP_HIGH		BIT(___GFP_HIGH_BIT)</div><div class='add'>+#define ___GFP_IO		BIT(___GFP_IO_BIT)</div><div class='add'>+#define ___GFP_FS		BIT(___GFP_FS_BIT)</div><div class='add'>+#define ___GFP_ZERO		BIT(___GFP_ZERO_BIT)</div><div class='add'>+/* 0x200u unused */</div><div class='add'>+#define ___GFP_DIRECT_RECLAIM	BIT(___GFP_DIRECT_RECLAIM_BIT)</div><div class='add'>+#define ___GFP_KSWAPD_RECLAIM	BIT(___GFP_KSWAPD_RECLAIM_BIT)</div><div class='add'>+#define ___GFP_WRITE		BIT(___GFP_WRITE_BIT)</div><div class='add'>+#define ___GFP_NOWARN		BIT(___GFP_NOWARN_BIT)</div><div class='add'>+#define ___GFP_RETRY_MAYFAIL	BIT(___GFP_RETRY_MAYFAIL_BIT)</div><div class='add'>+#define ___GFP_NOFAIL		BIT(___GFP_NOFAIL_BIT)</div><div class='add'>+#define ___GFP_NORETRY		BIT(___GFP_NORETRY_BIT)</div><div class='add'>+#define ___GFP_MEMALLOC		BIT(___GFP_MEMALLOC_BIT)</div><div class='add'>+#define ___GFP_COMP		BIT(___GFP_COMP_BIT)</div><div class='add'>+#define ___GFP_NOMEMALLOC	BIT(___GFP_NOMEMALLOC_BIT)</div><div class='add'>+#define ___GFP_HARDWALL		BIT(___GFP_HARDWALL_BIT)</div><div class='add'>+#define ___GFP_THISNODE		BIT(___GFP_THISNODE_BIT)</div><div class='add'>+#define ___GFP_ACCOUNT		BIT(___GFP_ACCOUNT_BIT)</div><div class='add'>+#define ___GFP_ZEROTAGS		BIT(___GFP_ZEROTAGS_BIT)</div><div class='add'>+#ifdef CONFIG_KASAN_HW_TAGS</div><div class='add'>+#define ___GFP_SKIP_ZERO	BIT(___GFP_SKIP_ZERO_BIT)</div><div class='add'>+#define ___GFP_SKIP_KASAN	BIT(___GFP_SKIP_KASAN_BIT)</div><div class='add'>+#else</div><div class='add'>+#define ___GFP_SKIP_ZERO	0</div><div class='add'>+#define ___GFP_SKIP_KASAN	0</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_LOCKDEP</div><div class='add'>+#define ___GFP_NOLOCKDEP	BIT(___GFP_NOLOCKDEP_BIT)</div><div class='add'>+#else</div><div class='add'>+#define ___GFP_NOLOCKDEP	0</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SLAB_OBJ_EXT</div><div class='add'>+#define ___GFP_NO_OBJ_EXT       BIT(___GFP_NO_OBJ_EXT_BIT)</div><div class='add'>+#else</div><div class='add'>+#define ___GFP_NO_OBJ_EXT       0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Physical address zone modifiers (see linux/mmzone.h - low four bits)</div><div class='add'>+ *</div><div class='add'>+ * Do not put any conditional on these. If necessary modify the definitions</div><div class='add'>+ * without the underscores and use them consistently. The definitions here may</div><div class='add'>+ * be used in bit comparisons.</div><div class='add'>+ */</div><div class='add'>+#define __GFP_DMA	((__force gfp_t)___GFP_DMA)</div><div class='add'>+#define __GFP_HIGHMEM	((__force gfp_t)___GFP_HIGHMEM)</div><div class='add'>+#define __GFP_DMA32	((__force gfp_t)___GFP_DMA32)</div><div class='add'>+#define __GFP_MOVABLE	((__force gfp_t)___GFP_MOVABLE)  /* ZONE_MOVABLE allowed */</div><div class='add'>+#define GFP_ZONEMASK	(__GFP_DMA|__GFP_HIGHMEM|__GFP_DMA32|__GFP_MOVABLE)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Page mobility and placement hints</div><div class='add'>+ *</div><div class='add'>+ * Page mobility and placement hints</div><div class='add'>+ * ---------------------------------</div><div class='add'>+ *</div><div class='add'>+ * These flags provide hints about how mobile the page is. Pages with similar</div><div class='add'>+ * mobility are placed within the same pageblocks to minimise problems due</div><div class='add'>+ * to external fragmentation.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_MOVABLE (also a zone modifier) indicates that the page can be</div><div class='add'>+ * moved by page migration during memory compaction or can be reclaimed.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_RECLAIMABLE is used for slab allocations that specify</div><div class='add'>+ * SLAB_RECLAIM_ACCOUNT and whose pages can be freed via shrinkers.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_WRITE indicates the caller intends to dirty the page. Where possible,</div><div class='add'>+ * these pages will be spread between local zones to avoid all the dirty</div><div class='add'>+ * pages being in one zone (fair zone allocation policy).</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_HARDWALL enforces the cpuset memory allocation policy.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_THISNODE forces the allocation to be satisfied from the requested</div><div class='add'>+ * node with no fallbacks or placement policy enforcements.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_ACCOUNT causes the allocation to be accounted to kmemcg.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_NO_OBJ_EXT causes slab allocation to have no object extension.</div><div class='add'>+ */</div><div class='add'>+#define __GFP_RECLAIMABLE ((__force gfp_t)___GFP_RECLAIMABLE)</div><div class='add'>+#define __GFP_WRITE	((__force gfp_t)___GFP_WRITE)</div><div class='add'>+#define __GFP_HARDWALL   ((__force gfp_t)___GFP_HARDWALL)</div><div class='add'>+#define __GFP_THISNODE	((__force gfp_t)___GFP_THISNODE)</div><div class='add'>+#define __GFP_ACCOUNT	((__force gfp_t)___GFP_ACCOUNT)</div><div class='add'>+#define __GFP_NO_OBJ_EXT   ((__force gfp_t)___GFP_NO_OBJ_EXT)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Watermark modifiers</div><div class='add'>+ *</div><div class='add'>+ * Watermark modifiers -- controls access to emergency reserves</div><div class='add'>+ * ------------------------------------------------------------</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_HIGH indicates that the caller is high-priority and that granting</div><div class='add'>+ * the request is necessary before the system can make forward progress.</div><div class='add'>+ * For example creating an IO context to clean pages and requests</div><div class='add'>+ * from atomic context.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_MEMALLOC allows access to all memory. This should only be used when</div><div class='add'>+ * the caller guarantees the allocation will allow more memory to be freed</div><div class='add'>+ * very shortly e.g. process exiting or swapping. Users either should</div><div class='add'>+ * be the MM or co-ordinating closely with the VM (e.g. swap over NFS).</div><div class='add'>+ * Users of this flag have to be extremely careful to not deplete the reserve</div><div class='add'>+ * completely and implement a throttling mechanism which controls the</div><div class='add'>+ * consumption of the reserve based on the amount of freed memory.</div><div class='add'>+ * Usage of a pre-allocated pool (e.g. mempool) should be always considered</div><div class='add'>+ * before using this flag.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_NOMEMALLOC is used to explicitly forbid access to emergency reserves.</div><div class='add'>+ * This takes precedence over the %__GFP_MEMALLOC flag if both are set.</div><div class='add'>+ */</div><div class='add'>+#define __GFP_HIGH	((__force gfp_t)___GFP_HIGH)</div><div class='add'>+#define __GFP_MEMALLOC	((__force gfp_t)___GFP_MEMALLOC)</div><div class='add'>+#define __GFP_NOMEMALLOC ((__force gfp_t)___GFP_NOMEMALLOC)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Reclaim modifiers</div><div class='add'>+ *</div><div class='add'>+ * Reclaim modifiers</div><div class='add'>+ * -----------------</div><div class='add'>+ * Please note that all the following flags are only applicable to sleepable</div><div class='add'>+ * allocations (e.g. %GFP_NOWAIT and %GFP_ATOMIC will ignore them).</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_IO can start physical IO.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_FS can call down to the low-level FS. Clearing the flag avoids the</div><div class='add'>+ * allocator recursing into the filesystem which might already be holding</div><div class='add'>+ * locks.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_DIRECT_RECLAIM indicates that the caller may enter direct reclaim.</div><div class='add'>+ * This flag can be cleared to avoid unnecessary delays when a fallback</div><div class='add'>+ * option is available.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_KSWAPD_RECLAIM indicates that the caller wants to wake kswapd when</div><div class='add'>+ * the low watermark is reached and have it reclaim pages until the high</div><div class='add'>+ * watermark is reached. A caller may wish to clear this flag when fallback</div><div class='add'>+ * options are available and the reclaim is likely to disrupt the system. The</div><div class='add'>+ * canonical example is THP allocation where a fallback is cheap but</div><div class='add'>+ * reclaim/compaction may cause indirect stalls.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_RECLAIM is shorthand to allow/forbid both direct and kswapd reclaim.</div><div class='add'>+ *</div><div class='add'>+ * The default allocator behavior depends on the request size. We have a concept</div><div class='add'>+ * of so-called costly allocations (with order &gt; %PAGE_ALLOC_COSTLY_ORDER).</div><div class='add'>+ * !costly allocations are too essential to fail so they are implicitly</div><div class='add'>+ * non-failing by default (with some exceptions like OOM victims might fail so</div><div class='add'>+ * the caller still has to check for failures) while costly requests try to be</div><div class='add'>+ * not disruptive and back off even without invoking the OOM killer.</div><div class='add'>+ * The following three modifiers might be used to override some of these</div><div class='add'>+ * implicit rules. Please note that all of them must be used along with</div><div class='add'>+ * %__GFP_DIRECT_RECLAIM flag.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_NORETRY: The VM implementation will try only very lightweight</div><div class='add'>+ * memory direct reclaim to get some memory under memory pressure (thus</div><div class='add'>+ * it can sleep). It will avoid disruptive actions like OOM killer. The</div><div class='add'>+ * caller must handle the failure which is quite likely to happen under</div><div class='add'>+ * heavy memory pressure. The flag is suitable when failure can easily be</div><div class='add'>+ * handled at small cost, such as reduced throughput.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_RETRY_MAYFAIL: The VM implementation will retry memory reclaim</div><div class='add'>+ * procedures that have previously failed if there is some indication</div><div class='add'>+ * that progress has been made elsewhere.  It can wait for other</div><div class='add'>+ * tasks to attempt high-level approaches to freeing memory such as</div><div class='add'>+ * compaction (which removes fragmentation) and page-out.</div><div class='add'>+ * There is still a definite limit to the number of retries, but it is</div><div class='add'>+ * a larger limit than with %__GFP_NORETRY.</div><div class='add'>+ * Allocations with this flag may fail, but only when there is</div><div class='add'>+ * genuinely little unused memory. While these allocations do not</div><div class='add'>+ * directly trigger the OOM killer, their failure indicates that</div><div class='add'>+ * the system is likely to need to use the OOM killer soon.  The</div><div class='add'>+ * caller must handle failure, but can reasonably do so by failing</div><div class='add'>+ * a higher-level request, or completing it only in a much less</div><div class='add'>+ * efficient manner.</div><div class='add'>+ * If the allocation does fail, and the caller is in a position to</div><div class='add'>+ * free some non-essential memory, doing so could benefit the system</div><div class='add'>+ * as a whole.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_NOFAIL: The VM implementation _must_ retry infinitely: the caller</div><div class='add'>+ * cannot handle allocation failures. The allocation could block</div><div class='add'>+ * indefinitely but will never return with failure. Testing for</div><div class='add'>+ * failure is pointless.</div><div class='add'>+ * It _must_ be blockable and used together with __GFP_DIRECT_RECLAIM.</div><div class='add'>+ * It should _never_ be used in non-sleepable contexts.</div><div class='add'>+ * New users should be evaluated carefully (and the flag should be</div><div class='add'>+ * used only when there is no reasonable failure policy) but it is</div><div class='add'>+ * definitely preferable to use the flag rather than opencode endless</div><div class='add'>+ * loop around allocator.</div><div class='add'>+ * Allocating pages from the buddy with __GFP_NOFAIL and order &gt; 1 is</div><div class='add'>+ * not supported. Please consider using kvmalloc() instead.</div><div class='add'>+ */</div><div class='add'>+#define __GFP_IO	((__force gfp_t)___GFP_IO)</div><div class='add'>+#define __GFP_FS	((__force gfp_t)___GFP_FS)</div><div class='add'>+#define __GFP_DIRECT_RECLAIM	((__force gfp_t)___GFP_DIRECT_RECLAIM) /* Caller can reclaim */</div><div class='add'>+#define __GFP_KSWAPD_RECLAIM	((__force gfp_t)___GFP_KSWAPD_RECLAIM) /* kswapd can wake */</div><div class='add'>+#define __GFP_RECLAIM ((__force gfp_t)(___GFP_DIRECT_RECLAIM|___GFP_KSWAPD_RECLAIM))</div><div class='add'>+#define __GFP_RETRY_MAYFAIL	((__force gfp_t)___GFP_RETRY_MAYFAIL)</div><div class='add'>+#define __GFP_NOFAIL	((__force gfp_t)___GFP_NOFAIL)</div><div class='add'>+#define __GFP_NORETRY	((__force gfp_t)___GFP_NORETRY)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Action modifiers</div><div class='add'>+ *</div><div class='add'>+ * Action modifiers</div><div class='add'>+ * ----------------</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_NOWARN suppresses allocation failure reports.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_COMP address compound page metadata.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_ZERO returns a zeroed page on success.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_ZEROTAGS zeroes memory tags at allocation time if the memory itself</div><div class='add'>+ * is being zeroed (either via __GFP_ZERO or via init_on_alloc, provided that</div><div class='add'>+ * __GFP_SKIP_ZERO is not set). This flag is intended for optimization: setting</div><div class='add'>+ * memory tags at the same time as zeroing memory has minimal additional</div><div class='add'>+ * performance impact.</div><div class='add'>+ *</div><div class='add'>+ * %__GFP_SKIP_KASAN makes KASAN skip unpoisoning on page allocation.</div><div class='add'>+ * Used for userspace and vmalloc pages; the latter are unpoisoned by</div><div class='add'>+ * kasan_unpoison_vmalloc instead. For userspace pages, results in</div><div class='add'>+ * poisoning being skipped as well, see should_skip_kasan_poison for</div><div class='add'>+ * details. Only effective in HW_TAGS mode.</div><div class='add'>+ */</div><div class='add'>+#define __GFP_NOWARN	((__force gfp_t)___GFP_NOWARN)</div><div class='add'>+#define __GFP_COMP	((__force gfp_t)___GFP_COMP)</div><div class='add'>+#define __GFP_ZERO	((__force gfp_t)___GFP_ZERO)</div><div class='add'>+#define __GFP_ZEROTAGS	((__force gfp_t)___GFP_ZEROTAGS)</div><div class='add'>+#define __GFP_SKIP_ZERO ((__force gfp_t)___GFP_SKIP_ZERO)</div><div class='add'>+#define __GFP_SKIP_KASAN ((__force gfp_t)___GFP_SKIP_KASAN)</div><div class='add'>+</div><div class='add'>+/* Disable lockdep for GFP context tracking */</div><div class='add'>+#define __GFP_NOLOCKDEP ((__force gfp_t)___GFP_NOLOCKDEP)</div><div class='add'>+</div><div class='add'>+/* Room for N __GFP_FOO bits */</div><div class='add'>+#define __GFP_BITS_SHIFT ___GFP_LAST_BIT</div><div class='add'>+#define __GFP_BITS_MASK ((__force gfp_t)((1 &lt;&lt; __GFP_BITS_SHIFT) - 1))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Useful GFP flag combinations</div><div class='add'>+ *</div><div class='add'>+ * Useful GFP flag combinations</div><div class='add'>+ * ----------------------------</div><div class='add'>+ *</div><div class='add'>+ * Useful GFP flag combinations that are commonly used. It is recommended</div><div class='add'>+ * that subsystems start with one of these combinations and then set/clear</div><div class='add'>+ * %__GFP_FOO flags as necessary.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_ATOMIC users can not sleep and need the allocation to succeed. A lower</div><div class='add'>+ * watermark is applied to allow access to "atomic reserves".</div><div class='add'>+ * The current implementation doesn't support NMI and few other strict</div><div class='add'>+ * non-preemptive contexts (e.g. raw_spin_lock). The same applies to %GFP_NOWAIT.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_KERNEL is typical for kernel-internal allocations. The caller requires</div><div class='add'>+ * %ZONE_NORMAL or a lower zone for direct access but can direct reclaim.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_KERNEL_ACCOUNT is the same as GFP_KERNEL, except the allocation is</div><div class='add'>+ * accounted to kmemcg.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_NOWAIT is for kernel allocations that should not stall for direct</div><div class='add'>+ * reclaim, start physical IO or use any filesystem callback.  It is very</div><div class='add'>+ * likely to fail to allocate memory, even for very small allocations.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_NOIO will use direct reclaim to discard clean pages or slab pages</div><div class='add'>+ * that do not require the starting of any physical IO.</div><div class='add'>+ * Please try to avoid using this flag directly and instead use</div><div class='add'>+ * memalloc_noio_{save,restore} to mark the whole scope which cannot</div><div class='add'>+ * perform any IO with a short explanation why. All allocation requests</div><div class='add'>+ * will inherit GFP_NOIO implicitly.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_NOFS will use direct reclaim but will not use any filesystem interfaces.</div><div class='add'>+ * Please try to avoid using this flag directly and instead use</div><div class='add'>+ * memalloc_nofs_{save,restore} to mark the whole scope which cannot/shouldn't</div><div class='add'>+ * recurse into the FS layer with a short explanation why. All allocation</div><div class='add'>+ * requests will inherit GFP_NOFS implicitly.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_USER is for userspace allocations that also need to be directly</div><div class='add'>+ * accessibly by the kernel or hardware. It is typically used by hardware</div><div class='add'>+ * for buffers that are mapped to userspace (e.g. graphics) that hardware</div><div class='add'>+ * still must DMA to. cpuset limits are enforced for these allocations.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_DMA exists for historical reasons and should be avoided where possible.</div><div class='add'>+ * The flags indicates that the caller requires that the lowest zone be</div><div class='add'>+ * used (%ZONE_DMA or 16M on x86-64). Ideally, this would be removed but</div><div class='add'>+ * it would require careful auditing as some users really require it and</div><div class='add'>+ * others use the flag to avoid lowmem reserves in %ZONE_DMA and treat the</div><div class='add'>+ * lowest zone as a type of emergency reserve.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_DMA32 is similar to %GFP_DMA except that the caller requires a 32-bit</div><div class='add'>+ * address. Note that kmalloc(..., GFP_DMA32) does not return DMA32 memory</div><div class='add'>+ * because the DMA32 kmalloc cache array is not implemented.</div><div class='add'>+ * (Reason: there is no such user in kernel).</div><div class='add'>+ *</div><div class='add'>+ * %GFP_HIGHUSER is for userspace allocations that may be mapped to userspace,</div><div class='add'>+ * do not need to be directly accessible by the kernel but that cannot</div><div class='add'>+ * move once in use. An example may be a hardware allocation that maps</div><div class='add'>+ * data directly into userspace but has no addressing limitations.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_HIGHUSER_MOVABLE is for userspace allocations that the kernel does not</div><div class='add'>+ * need direct access to but can use kmap() when access is required. They</div><div class='add'>+ * are expected to be movable via page reclaim or page migration. Typically,</div><div class='add'>+ * pages on the LRU would also be allocated with %GFP_HIGHUSER_MOVABLE.</div><div class='add'>+ *</div><div class='add'>+ * %GFP_TRANSHUGE and %GFP_TRANSHUGE_LIGHT are used for THP allocations. They</div><div class='add'>+ * are compound allocations that will generally fail quickly if memory is not</div><div class='add'>+ * available and will not wake kswapd/kcompactd on failure. The _LIGHT</div><div class='add'>+ * version does not attempt reclaim/compaction at all and is by default used</div><div class='add'>+ * in page fault path, while the non-light is used by khugepaged.</div><div class='add'>+ */</div><div class='add'>+#define GFP_ATOMIC	(__GFP_HIGH|__GFP_KSWAPD_RECLAIM)</div><div class='add'>+#define GFP_KERNEL	(__GFP_RECLAIM | __GFP_IO | __GFP_FS)</div><div class='add'>+#define GFP_KERNEL_ACCOUNT (GFP_KERNEL | __GFP_ACCOUNT)</div><div class='add'>+#define GFP_NOWAIT	(__GFP_KSWAPD_RECLAIM | __GFP_NOWARN)</div><div class='add'>+#define GFP_NOIO	(__GFP_RECLAIM)</div><div class='add'>+#define GFP_NOFS	(__GFP_RECLAIM | __GFP_IO)</div><div class='add'>+#define GFP_USER	(__GFP_RECLAIM | __GFP_IO | __GFP_FS | __GFP_HARDWALL)</div><div class='add'>+#define GFP_DMA		__GFP_DMA</div><div class='add'>+#define GFP_DMA32	__GFP_DMA32</div><div class='add'>+#define GFP_HIGHUSER	(GFP_USER | __GFP_HIGHMEM)</div><div class='add'>+#define GFP_HIGHUSER_MOVABLE	(GFP_HIGHUSER | __GFP_MOVABLE | __GFP_SKIP_KASAN)</div><div class='add'>+#define GFP_TRANSHUGE_LIGHT	((GFP_HIGHUSER_MOVABLE | __GFP_COMP | \</div><div class='add'>+			 __GFP_NOMEMALLOC | __GFP_NOWARN) &amp; ~__GFP_RECLAIM)</div><div class='add'>+#define GFP_TRANSHUGE	(GFP_TRANSHUGE_LIGHT | __GFP_DIRECT_RECLAIM)</div><div class='add'>+</div><div class='add'>+#endif /* __LINUX_GFP_TYPES_H */</div><div class='head'>diff --git a/tools/include/linux/interval_tree_generic.h b/tools/include/linux/interval_tree_generic.h<br/>index aaa8a0767aa3..c5a2fed49eb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/interval_tree_generic.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/interval_tree_generic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/interval_tree_generic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/interval_tree_generic.h</a></div><div class='hunk'>@@ -77,7 +77,7 @@ ITSTATIC void ITPREFIX ## _remove(ITSTRUCT *node,			      \</div><div class='ctx'>  *   Cond2: start &lt;= ITLAST(node)					      \</div><div class='ctx'>  */									      \</div><div class='ctx'> 									      \</div><div class='del'>-static ITSTRUCT *							      \</div><div class='add'>+ITSTATIC ITSTRUCT *							      \</div><div class='ctx'> ITPREFIX ## _subtree_search(ITSTRUCT *node, ITTYPE start, ITTYPE last)	      \</div><div class='ctx'> {									      \</div><div class='ctx'> 	while (true) {							      \</div><div class='hunk'>@@ -104,12 +104,8 @@ ITPREFIX ## _subtree_search(ITSTRUCT *node, ITTYPE start, ITTYPE last)	      \</div><div class='ctx'> 		if (ITSTART(node) &lt;= last) {		/* Cond1 */	      \</div><div class='ctx'> 			if (start &lt;= ITLAST(node))	/* Cond2 */	      \</div><div class='ctx'> 				return node;	/* node is leftmost match */  \</div><div class='del'>-			if (node-&gt;ITRB.rb_right) {			      \</div><div class='del'>-				node = rb_entry(node-&gt;ITRB.rb_right,	      \</div><div class='del'>-						ITSTRUCT, ITRB);	      \</div><div class='del'>-				if (start &lt;= node-&gt;ITSUBTREE)		      \</div><div class='del'>-					continue;			      \</div><div class='del'>-			}						      \</div><div class='add'>+			node = rb_entry(node-&gt;ITRB.rb_right, ITSTRUCT, ITRB); \</div><div class='add'>+			continue;					      \</div><div class='ctx'> 		}							      \</div><div class='ctx'> 		return NULL;	/* No match */				      \</div><div class='ctx'> 	}								      \</div><div class='head'>diff --git a/tools/include/linux/io.h b/tools/include/linux/io.h<br/>index e129871fe661..4b94b84160b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/io.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/io.h</a></div><div class='hunk'>@@ -2,4 +2,6 @@</div><div class='ctx'> #ifndef _TOOLS_IO_H</div><div class='ctx'> #define _TOOLS_IO_H</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _TOOLS_IO_H */</div><div class='head'>diff --git a/tools/include/linux/livepatch_external.h b/tools/include/linux/livepatch_external.h<br/>new file mode 100644<br/>index 000000000000..138af19b0f5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/livepatch_external.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/livepatch_external.h</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * External livepatch interfaces for patch creation tooling</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _LINUX_LIVEPATCH_EXTERNAL_H_</div><div class='add'>+#define _LINUX_LIVEPATCH_EXTERNAL_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define KLP_RELOC_SEC_PREFIX		".klp.rela."</div><div class='add'>+#define KLP_SYM_PREFIX			".klp.sym."</div><div class='add'>+</div><div class='add'>+#define __KLP_PRE_PATCH_PREFIX		__klp_pre_patch_callback_</div><div class='add'>+#define __KLP_POST_PATCH_PREFIX		__klp_post_patch_callback_</div><div class='add'>+#define __KLP_PRE_UNPATCH_PREFIX	__klp_pre_unpatch_callback_</div><div class='add'>+#define __KLP_POST_UNPATCH_PREFIX	__klp_post_unpatch_callback_</div><div class='add'>+</div><div class='add'>+#define KLP_PRE_PATCH_PREFIX		__stringify(__KLP_PRE_PATCH_PREFIX)</div><div class='add'>+#define KLP_POST_PATCH_PREFIX		__stringify(__KLP_POST_PATCH_PREFIX)</div><div class='add'>+#define KLP_PRE_UNPATCH_PREFIX		__stringify(__KLP_PRE_UNPATCH_PREFIX)</div><div class='add'>+#define KLP_POST_UNPATCH_PREFIX		__stringify(__KLP_POST_UNPATCH_PREFIX)</div><div class='add'>+</div><div class='add'>+struct klp_object;</div><div class='add'>+</div><div class='add'>+typedef int (*klp_pre_patch_t)(struct klp_object *obj);</div><div class='add'>+typedef void (*klp_post_patch_t)(struct klp_object *obj);</div><div class='add'>+typedef void (*klp_pre_unpatch_t)(struct klp_object *obj);</div><div class='add'>+typedef void (*klp_post_unpatch_t)(struct klp_object *obj);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct klp_callbacks - pre/post live-(un)patch callback structure</div><div class='add'>+ * @pre_patch:		executed before code patching</div><div class='add'>+ * @post_patch:		executed after code patching</div><div class='add'>+ * @pre_unpatch:	executed before code unpatching</div><div class='add'>+ * @post_unpatch:	executed after code unpatching</div><div class='add'>+ * @post_unpatch_enabled:	flag indicating if post-unpatch callback</div><div class='add'>+ *				should run</div><div class='add'>+ *</div><div class='add'>+ * All callbacks are optional.  Only the pre-patch callback, if provided,</div><div class='add'>+ * will be unconditionally executed.  If the parent klp_object fails to</div><div class='add'>+ * patch for any reason, including a non-zero error status returned from</div><div class='add'>+ * the pre-patch callback, no further callbacks will be executed.</div><div class='add'>+ */</div><div class='add'>+struct klp_callbacks {</div><div class='add'>+	klp_pre_patch_t		pre_patch;</div><div class='add'>+	klp_post_patch_t	post_patch;</div><div class='add'>+	klp_pre_unpatch_t	pre_unpatch;</div><div class='add'>+	klp_post_unpatch_t	post_unpatch;</div><div class='add'>+	bool post_unpatch_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'struct klp_{func,object}_ext' are compact "external" representations of</div><div class='add'>+ * 'struct klp_{func,object}'.   They are used by objtool for livepatch</div><div class='add'>+ * generation.  The structs are then read by the livepatch module and converted</div><div class='add'>+ * to the real structs before calling klp_enable_patch().</div><div class='add'>+ *</div><div class='add'>+ * TODO make these the official API for klp_enable_patch().  That should</div><div class='add'>+ * simplify livepatch's interface as well as its data structure lifetime</div><div class='add'>+ * management.</div><div class='add'>+ */</div><div class='add'>+struct klp_func_ext {</div><div class='add'>+	const char *old_name;</div><div class='add'>+	void *new_func;</div><div class='add'>+	unsigned long sympos;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct klp_object_ext {</div><div class='add'>+	const char *name;</div><div class='add'>+	struct klp_func_ext *funcs;</div><div class='add'>+	struct klp_callbacks callbacks;</div><div class='add'>+	unsigned int nr_funcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _LINUX_LIVEPATCH_EXTERNAL_H_ */</div><div class='head'>diff --git a/tools/include/linux/objtool_types.h b/tools/include/linux/objtool_types.h<br/>index df5d9fa84dba..c6def4049b1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/objtool_types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/objtool_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/objtool_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/objtool_types.h</a></div><div class='hunk'>@@ -65,5 +65,8 @@ struct unwind_hint {</div><div class='ctx'> #define ANNOTYPE_IGNORE_ALTS		6</div><div class='ctx'> #define ANNOTYPE_INTRA_FUNCTION_CALL	7</div><div class='ctx'> #define ANNOTYPE_REACHABLE		8</div><div class='add'>+#define ANNOTYPE_NOCFI			9</div><div class='add'>+</div><div class='add'>+#define ANNOTYPE_DATA_SPECIAL		1</div><div class='ctx'> </div><div class='ctx'> #endif /* _LINUX_OBJTOOL_TYPES_H */</div><div class='head'>diff --git a/tools/include/linux/pci_ids.h b/tools/include/linux/pci_ids.h<br/>new file mode 120000<br/>index 000000000000..1c9e88f41261<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/pci_ids.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/pci_ids.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+../../../include/linux/pci_ids.h
\ No newline at end of file</div><div class='head'>diff --git a/tools/include/linux/slab.h b/tools/include/linux/slab.h<br/>index c87051e2b26f..94937a699402 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/slab.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/slab.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/slab.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/slab.h</a></div><div class='hunk'>@@ -4,11 +4,31 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;pthread.h&gt;</div><div class='ctx'> </div><div class='del'>-#define SLAB_PANIC 2</div><div class='ctx'> #define SLAB_RECLAIM_ACCOUNT    0x00020000UL            /* Objects are reclaimable */</div><div class='ctx'> </div><div class='ctx'> #define kzalloc_node(size, flags, node) kmalloc(size, flags)</div><div class='add'>+enum _slab_flag_bits {</div><div class='add'>+	_SLAB_KMALLOC,</div><div class='add'>+	_SLAB_HWCACHE_ALIGN,</div><div class='add'>+	_SLAB_PANIC,</div><div class='add'>+	_SLAB_TYPESAFE_BY_RCU,</div><div class='add'>+	_SLAB_ACCOUNT,</div><div class='add'>+	_SLAB_FLAGS_LAST_BIT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __SLAB_FLAG_BIT(nr)	((unsigned int __force)(1U &lt;&lt; (nr)))</div><div class='add'>+#define __SLAB_FLAG_UNUSED	((unsigned int __force)(0U))</div><div class='add'>+</div><div class='add'>+#define SLAB_HWCACHE_ALIGN	__SLAB_FLAG_BIT(_SLAB_HWCACHE_ALIGN)</div><div class='add'>+#define SLAB_PANIC		__SLAB_FLAG_BIT(_SLAB_PANIC)</div><div class='add'>+#define SLAB_TYPESAFE_BY_RCU	__SLAB_FLAG_BIT(_SLAB_TYPESAFE_BY_RCU)</div><div class='add'>+#ifdef CONFIG_MEMCG</div><div class='add'>+# define SLAB_ACCOUNT		__SLAB_FLAG_BIT(_SLAB_ACCOUNT)</div><div class='add'>+#else</div><div class='add'>+# define SLAB_ACCOUNT		__SLAB_FLAG_UNUSED</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void *kmalloc(size_t size, gfp_t gfp);</div><div class='ctx'> void kfree(void *p);</div><div class='hunk'>@@ -23,6 +43,98 @@ enum slab_state {</div><div class='ctx'> 	FULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kmem_cache {</div><div class='add'>+	pthread_mutex_t lock;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int align;</div><div class='add'>+	unsigned int sheaf_capacity;</div><div class='add'>+	int nr_objs;</div><div class='add'>+	void *objs;</div><div class='add'>+	void (*ctor)(void *);</div><div class='add'>+	bool non_kernel_enabled;</div><div class='add'>+	unsigned int non_kernel;</div><div class='add'>+	unsigned long nr_allocated;</div><div class='add'>+	unsigned long nr_tallocated;</div><div class='add'>+	bool exec_callback;</div><div class='add'>+	void (*callback)(void *);</div><div class='add'>+	void *private;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kmem_cache_args {</div><div class='add'>+	/**</div><div class='add'>+	 * @align: The required alignment for the objects.</div><div class='add'>+	 *</div><div class='add'>+	 * %0 means no specific alignment is requested.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int align;</div><div class='add'>+	/**</div><div class='add'>+	 * @sheaf_capacity: The maximum size of the sheaf.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int sheaf_capacity;</div><div class='add'>+	/**</div><div class='add'>+	 * @useroffset: Usercopy region offset.</div><div class='add'>+	 *</div><div class='add'>+	 * %0 is a valid offset, when @usersize is non-%0</div><div class='add'>+	 */</div><div class='add'>+	unsigned int useroffset;</div><div class='add'>+	/**</div><div class='add'>+	 * @usersize: Usercopy region size.</div><div class='add'>+	 *</div><div class='add'>+	 * %0 means no usercopy region is specified.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int usersize;</div><div class='add'>+	/**</div><div class='add'>+	 * @freeptr_offset: Custom offset for the free pointer</div><div class='add'>+	 * in &amp;SLAB_TYPESAFE_BY_RCU caches</div><div class='add'>+	 *</div><div class='add'>+	 * By default &amp;SLAB_TYPESAFE_BY_RCU caches place the free pointer</div><div class='add'>+	 * outside of the object. This might cause the object to grow in size.</div><div class='add'>+	 * Cache creators that have a reason to avoid this can specify a custom</div><div class='add'>+	 * free pointer offset in their struct where the free pointer will be</div><div class='add'>+	 * placed.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that placing the free pointer inside the object requires the</div><div class='add'>+	 * caller to ensure that no fields are invalidated that are required to</div><div class='add'>+	 * guard against object recycling (See &amp;SLAB_TYPESAFE_BY_RCU for</div><div class='add'>+	 * details).</div><div class='add'>+	 *</div><div class='add'>+	 * Using %0 as a value for @freeptr_offset is valid. If @freeptr_offset</div><div class='add'>+	 * is specified, %use_freeptr_offset must be set %true.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that @ctor currently isn't supported with custom free pointers</div><div class='add'>+	 * as a @ctor requires an external free pointer.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int freeptr_offset;</div><div class='add'>+	/**</div><div class='add'>+	 * @use_freeptr_offset: Whether a @freeptr_offset is used.</div><div class='add'>+	 */</div><div class='add'>+	bool use_freeptr_offset;</div><div class='add'>+	/**</div><div class='add'>+	 * @ctor: A constructor for the objects.</div><div class='add'>+	 *</div><div class='add'>+	 * The constructor is invoked for each object in a newly allocated slab</div><div class='add'>+	 * page. It is the cache user's responsibility to free object in the</div><div class='add'>+	 * same state as after calling the constructor, or deal appropriately</div><div class='add'>+	 * with any differences between a freshly constructed and a reallocated</div><div class='add'>+	 * object.</div><div class='add'>+	 *</div><div class='add'>+	 * %NULL means no constructor.</div><div class='add'>+	 */</div><div class='add'>+	void (*ctor)(void *);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slab_sheaf {</div><div class='add'>+	union {</div><div class='add'>+		struct list_head barn_list;</div><div class='add'>+		/* only used for prefilled sheafs */</div><div class='add'>+		unsigned int capacity;</div><div class='add'>+	};</div><div class='add'>+	struct kmem_cache *cache;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	int node; /* only used for rcu_sheaf */</div><div class='add'>+	void *objects[];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline void *kzalloc(size_t size, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	return kmalloc(size, gfp | __GFP_ZERO);</div><div class='hunk'>@@ -37,12 +149,57 @@ static inline void *kmem_cache_alloc(struct kmem_cache *cachep, int flags)</div><div class='ctx'> }</div><div class='ctx'> void kmem_cache_free(struct kmem_cache *cachep, void *objp);</div><div class='ctx'> </div><div class='del'>-struct kmem_cache *kmem_cache_create(const char *name, unsigned int size,</div><div class='del'>-			unsigned int align, unsigned int flags,</div><div class='del'>-			void (*ctor)(void *));</div><div class='add'>+</div><div class='add'>+struct kmem_cache *</div><div class='add'>+__kmem_cache_create_args(const char *name, unsigned int size,</div><div class='add'>+		struct kmem_cache_args *args, unsigned int flags);</div><div class='add'>+</div><div class='add'>+/* If NULL is passed for @args, use this variant with default arguments. */</div><div class='add'>+static inline struct kmem_cache *</div><div class='add'>+__kmem_cache_default_args(const char *name, unsigned int size,</div><div class='add'>+		struct kmem_cache_args *args, unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	struct kmem_cache_args kmem_default_args = {};</div><div class='add'>+</div><div class='add'>+	return __kmem_cache_create_args(name, size, &amp;kmem_default_args, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct kmem_cache *</div><div class='add'>+__kmem_cache_create(const char *name, unsigned int size, unsigned int align,</div><div class='add'>+		unsigned int flags, void (*ctor)(void *))</div><div class='add'>+{</div><div class='add'>+	struct kmem_cache_args kmem_args = {</div><div class='add'>+		.align	= align,</div><div class='add'>+		.ctor	= ctor,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return __kmem_cache_create_args(name, size, &amp;kmem_args, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define kmem_cache_create(__name, __object_size, __args, ...)           \</div><div class='add'>+	_Generic((__args),                                              \</div><div class='add'>+		struct kmem_cache_args *: __kmem_cache_create_args,	\</div><div class='add'>+		void *: __kmem_cache_default_args,			\</div><div class='add'>+		default: __kmem_cache_create)(__name, __object_size, __args, __VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> void kmem_cache_free_bulk(struct kmem_cache *cachep, size_t size, void **list);</div><div class='ctx'> int kmem_cache_alloc_bulk(struct kmem_cache *cachep, gfp_t gfp, size_t size,</div><div class='ctx'> 			  void **list);</div><div class='add'>+struct slab_sheaf *</div><div class='add'>+kmem_cache_prefill_sheaf(struct kmem_cache *s, gfp_t gfp, unsigned int size);</div><div class='add'>+</div><div class='add'>+void *</div><div class='add'>+kmem_cache_alloc_from_sheaf(struct kmem_cache *s, gfp_t gfp,</div><div class='add'>+		struct slab_sheaf *sheaf);</div><div class='add'>+</div><div class='add'>+void kmem_cache_return_sheaf(struct kmem_cache *s, gfp_t gfp,</div><div class='add'>+		struct slab_sheaf *sheaf);</div><div class='add'>+int kmem_cache_refill_sheaf(struct kmem_cache *s, gfp_t gfp,</div><div class='add'>+		struct slab_sheaf **sheafp, unsigned int size);</div><div class='add'>+</div><div class='add'>+static inline unsigned int kmem_cache_sheaf_size(struct slab_sheaf *sheaf)</div><div class='add'>+{</div><div class='add'>+	return sheaf-&gt;size;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif		/* _TOOLS_SLAB_H */</div><div class='head'>diff --git a/tools/include/linux/static_call_types.h b/tools/include/linux/static_call_types.h<br/>index 5a00b8b2cf9f..cfb6ddeb292b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/static_call_types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/static_call_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/static_call_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/static_call_types.h</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> #define STATIC_CALL_SITE_INIT 2UL	/* init section */</div><div class='ctx'> #define STATIC_CALL_SITE_FLAGS 3UL</div><div class='ctx'> </div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The static call site table needs to be created by external tooling (objtool</div><div class='ctx'>  * or a compiler plugin).</div><div class='hunk'>@@ -100,4 +102,6 @@ struct static_call_key {</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_HAVE_STATIC_CALL */</div><div class='ctx'> </div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='ctx'> #endif /* _STATIC_CALL_TYPES_H */</div><div class='head'>diff --git a/tools/include/linux/string.h b/tools/include/linux/string.h<br/>index 8499f509f03e..51ad3cf4fa82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/linux/string.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/linux/string.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/linux/string.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/linux/string.h</a></div><div class='hunk'>@@ -44,6 +44,20 @@ static inline bool strstarts(const char *str, const char *prefix)</div><div class='ctx'> 	return strncmp(str, prefix, strlen(prefix)) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Checks if a string ends with another.</div><div class='add'>+ */</div><div class='add'>+static inline bool str_ends_with(const char *str, const char *substr)</div><div class='add'>+{</div><div class='add'>+	size_t len = strlen(str);</div><div class='add'>+	size_t sublen = strlen(substr);</div><div class='add'>+</div><div class='add'>+	if (sublen &gt; len)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !strcmp(str + len - sublen, substr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern char * __must_check skip_spaces(const char *);</div><div class='ctx'> </div><div class='ctx'> extern char *strim(char *);</div><div class='head'>diff --git a/tools/include/nolibc/Makefile b/tools/include/nolibc/Makefile<br/>index 143c2d2c2ba6..8118e22844f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/Makefile</a></div><div class='hunk'>@@ -23,7 +23,7 @@ else</div><div class='ctx'> Q=@</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-arch_file := arch-$(ARCH).h</div><div class='add'>+arch_files := arch.h $(wildcard arch-*.h)</div><div class='ctx'> all_files := \</div><div class='ctx'> 		compiler.h \</div><div class='ctx'> 		crt.h \</div><div class='hunk'>@@ -33,6 +33,7 @@ all_files := \</div><div class='ctx'> 		errno.h \</div><div class='ctx'> 		fcntl.h \</div><div class='ctx'> 		getopt.h \</div><div class='add'>+		inttypes.h \</div><div class='ctx'> 		limits.h \</div><div class='ctx'> 		math.h \</div><div class='ctx'> 		nolibc.h \</div><div class='hunk'>@@ -56,12 +57,14 @@ all_files := \</div><div class='ctx'> 		sys/random.h \</div><div class='ctx'> 		sys/reboot.h \</div><div class='ctx'> 		sys/resource.h \</div><div class='add'>+		sys/select.h \</div><div class='ctx'> 		sys/stat.h \</div><div class='ctx'> 		sys/syscall.h \</div><div class='ctx'> 		sys/sysmacros.h \</div><div class='ctx'> 		sys/time.h \</div><div class='ctx'> 		sys/timerfd.h \</div><div class='ctx'> 		sys/types.h \</div><div class='add'>+		sys/uio.h \</div><div class='ctx'> 		sys/utsname.h \</div><div class='ctx'> 		sys/wait.h \</div><div class='ctx'> 		time.h \</div><div class='hunk'>@@ -79,7 +82,7 @@ help:</div><div class='ctx'> 	@echo "Supported targets under nolibc:"</div><div class='ctx'> 	@echo "  all                 call \"headers\""</div><div class='ctx'> 	@echo "  clean               clean the sysroot"</div><div class='del'>-	@echo "  headers             prepare a sysroot in tools/include/nolibc/sysroot"</div><div class='add'>+	@echo "  headers             prepare a multi-arch sysroot in \$${OUTPUT}sysroot"</div><div class='ctx'> 	@echo "  headers_standalone  like \"headers\", and also install kernel headers"</div><div class='ctx'> 	@echo "  help                this help"</div><div class='ctx'> 	@echo ""</div><div class='hunk'>@@ -90,18 +93,11 @@ help:</div><div class='ctx'> 	@echo "  OUTPUT  = $(OUTPUT)"</div><div class='ctx'> 	@echo ""</div><div class='ctx'> </div><div class='add'>+# installs headers for all archs at once.</div><div class='ctx'> headers:</div><div class='del'>-	$(Q)mkdir -p $(OUTPUT)sysroot</div><div class='del'>-	$(Q)mkdir -p $(OUTPUT)sysroot/include</div><div class='del'>-	$(Q)cp --parents $(all_files) $(OUTPUT)sysroot/include/</div><div class='del'>-	$(Q)if [ "$(ARCH)" = "i386" -o "$(ARCH)" = "x86_64" ]; then \</div><div class='del'>-		cat arch-x86.h;                 \</div><div class='del'>-	elif [ -e "$(arch_file)" ]; then        \</div><div class='del'>-		cat $(arch_file);               \</div><div class='del'>-	else                                    \</div><div class='del'>-		echo "Fatal: architecture $(ARCH) not yet supported by nolibc." &gt;&amp;2; \</div><div class='del'>-		exit 1;                         \</div><div class='del'>-	fi &gt; $(OUTPUT)sysroot/include/arch.h</div><div class='add'>+	$(Q)mkdir -p "$(OUTPUT)sysroot"</div><div class='add'>+	$(Q)mkdir -p "$(OUTPUT)sysroot/include"</div><div class='add'>+	$(Q)cp --parents $(arch_files) $(all_files) "$(OUTPUT)sysroot/include/"</div><div class='ctx'> </div><div class='ctx'> headers_standalone: headers</div><div class='ctx'> 	$(Q)$(MAKE) -C $(srctree) headers</div><div class='head'>diff --git a/tools/include/nolibc/arch-arm.h b/tools/include/nolibc/arch-arm.h<br/>index 1f66e7e5a444..251c42579028 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-arm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-arm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-arm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-arm.h</a></div><div class='hunk'>@@ -184,6 +184,7 @@</div><div class='ctx'> 	_arg1;                                                                \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -193,5 +194,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_ARM_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-arm64.h b/tools/include/nolibc/arch-arm64.h<br/>index 02a3f74c8ec8..080a55a7144e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-arm64.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-arm64.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-arm64.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-arm64.h</a></div><div class='hunk'>@@ -141,6 +141,7 @@</div><div class='ctx'> 	_arg1;                                                                \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -150,4 +151,5 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> #endif /* _NOLIBC_ARCH_ARM64_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-loongarch.h b/tools/include/nolibc/arch-loongarch.h<br/>index 5511705303ea..c894176c3f89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-loongarch.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-loongarch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-loongarch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-loongarch.h</a></div><div class='hunk'>@@ -142,6 +142,7 @@</div><div class='ctx'> 	_arg1;                                                                \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -151,5 +152,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_LOONGARCH_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-m68k.h b/tools/include/nolibc/arch-m68k.h<br/>index 6dac1845f298..2a4fbada5e79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-m68k.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-m68k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-m68k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-m68k.h</a></div><div class='hunk'>@@ -128,6 +128,7 @@</div><div class='ctx'> 	_num;                                                                 \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> void _start(void);</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -137,5 +138,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_M68K_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/arch-mips.h<br/>index 0cbac63b249a..a72506ceec6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-mips.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-mips.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-mips.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-mips.h</a></div><div class='hunk'>@@ -245,6 +245,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif /* _ABIO32 */</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code, note that it's called __start on MIPS */</div><div class='ctx'> void __start(void);</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector __start(void)</div><div class='hunk'>@@ -266,5 +267,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector __</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_MIPS_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h<br/>index 204564bbcd32..e0c7e0b81f7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-powerpc.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-powerpc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-powerpc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-powerpc.h</a></div><div class='hunk'>@@ -183,6 +183,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* !__powerpc64__ */</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -215,5 +216,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> #endif</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_POWERPC_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-riscv.h b/tools/include/nolibc/arch-riscv.h<br/>index 885383a86c38..1c00cacf57e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-riscv.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-riscv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-riscv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-riscv.h</a></div><div class='hunk'>@@ -139,6 +139,7 @@</div><div class='ctx'> 	_arg1;                                                                \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -152,5 +153,6 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_RISCV_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-s390.h b/tools/include/nolibc/arch-s390.h<br/>index df4c3cc713ac..74125a254ce3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-s390.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-s390.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-s390.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-s390.h</a></div><div class='hunk'>@@ -139,22 +139,19 @@</div><div class='ctx'> 	_arg1;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ volatile (</div><div class='del'>-#ifdef __s390x__</div><div class='ctx'> 		"lgr	%r2, %r15\n"          /* save stack pointer to %r2, as arg1 of _start_c */</div><div class='ctx'> 		"aghi	%r15, -160\n"         /* allocate new stackframe                        */</div><div class='del'>-#else</div><div class='del'>-		"lr	%r2, %r15\n"</div><div class='del'>-		"ahi	%r15, -96\n"</div><div class='del'>-#endif</div><div class='ctx'> 		"xc	0(8,%r15), 0(%r15)\n" /* clear backchain                                */</div><div class='ctx'> 		"brasl	%r14, _start_c\n"     /* transfer to c runtime                          */</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> struct s390_mmap_arg_struct {</div><div class='ctx'> 	unsigned long addr;</div><div class='head'>diff --git a/tools/include/nolibc/arch-sh.h b/tools/include/nolibc/arch-sh.h<br/>index a96b8914607e..7a421197d104 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-sh.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-sh.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-sh.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-sh.h</a></div><div class='hunk'>@@ -140,6 +140,7 @@</div><div class='ctx'> 	_ret;                                                                 \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void _start_wrapper(void);</div><div class='ctx'> void __attribute__((weak,noreturn)) __nolibc_entrypoint __no_stack_protector _start_wrapper(void)</div><div class='hunk'>@@ -158,5 +159,6 @@ void __attribute__((weak,noreturn)) __nolibc_entrypoint __no_stack_protector _st</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_ARCH_SH_H */</div><div class='head'>diff --git a/tools/include/nolibc/arch-sparc.h b/tools/include/nolibc/arch-sparc.h<br/>index ca420d843e25..2ebb5686e105 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-sparc.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-sparc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-sparc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-sparc.h</a></div><div class='hunk'>@@ -152,6 +152,7 @@</div><div class='ctx'> 	_arg1;                                                                \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -169,6 +170,7 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> static pid_t getpid(void);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/nolibc/arch-x86.h b/tools/include/nolibc/arch-x86.h<br/>index d3efc0c3b8ad..f6c43ac5377b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-x86.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch-x86.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch-x86.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch-x86.h</a></div><div class='hunk'>@@ -157,6 +157,7 @@</div><div class='ctx'> 	_eax;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> /*</div><div class='ctx'>  * i386 System V ABI mandates:</div><div class='hunk'>@@ -176,6 +177,7 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #else /* !defined(__x86_64__) */</div><div class='ctx'> </div><div class='hunk'>@@ -323,6 +325,7 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	_ret;                                                                 \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* startup code */</div><div class='ctx'> /*</div><div class='ctx'>  * x86-64 System V ABI mandates:</div><div class='hunk'>@@ -340,6 +343,7 @@ void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _s</div><div class='ctx'> 	);</div><div class='ctx'> 	__nolibc_entrypoint_epilogue();</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #define NOLIBC_ARCH_HAS_MEMMOVE</div><div class='ctx'> void *memmove(void *dst, const void *src, size_t len);</div><div class='hunk'>@@ -351,7 +355,7 @@ void *memcpy(void *dst, const void *src, size_t len);</div><div class='ctx'> void *memset(void *dst, int c, size_t len);</div><div class='ctx'> </div><div class='ctx'> __asm__ (</div><div class='del'>-".section .text.nolibc_memmove_memcpy\n"</div><div class='add'>+".pushsection .text.nolibc_memmove_memcpy\n"</div><div class='ctx'> ".weak memmove\n"</div><div class='ctx'> ".weak memcpy\n"</div><div class='ctx'> "memmove:\n"</div><div class='hunk'>@@ -371,8 +375,9 @@ __asm__ (</div><div class='ctx'> 	"rep movsb\n\t"</div><div class='ctx'> 	"cld\n\t"</div><div class='ctx'> 	"retq\n"</div><div class='add'>+".popsection\n"</div><div class='ctx'> </div><div class='del'>-".section .text.nolibc_memset\n"</div><div class='add'>+".pushsection .text.nolibc_memset\n"</div><div class='ctx'> ".weak memset\n"</div><div class='ctx'> "memset:\n"</div><div class='ctx'> 	"xchgl %eax, %esi\n\t"</div><div class='hunk'>@@ -381,6 +386,7 @@ __asm__ (</div><div class='ctx'> 	"rep stosb\n\t"</div><div class='ctx'> 	"popq  %rax\n\t"</div><div class='ctx'> 	"retq\n"</div><div class='add'>+".popsection\n"</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> #endif /* !defined(__x86_64__) */</div><div class='head'>diff --git a/tools/include/nolibc/arch.h b/tools/include/nolibc/arch.h<br/>index 426c89198135..a3adaf433f2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/arch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/arch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/arch.h</a></div><div class='hunk'>@@ -3,15 +3,6 @@</div><div class='ctx'>  * Copyright (C) 2017-2022 Willy Tarreau &lt;w@1wt.eu&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* Below comes the architecture-specific code. For each architecture, we have</div><div class='del'>- * the syscall declarations and the _start code definition. This is the only</div><div class='del'>- * global part. On all architectures the kernel puts everything in the stack</div><div class='del'>- * before jumping to _start just above us, without any return address (_start</div><div class='del'>- * is not a function but an entry point). So at the stack pointer we find argc.</div><div class='del'>- * Then argv[] begins, and ends at the first NULL. Then we have envp which</div><div class='del'>- * starts and ends with a NULL as well. So envp=argv+argc+1.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> #ifndef _NOLIBC_ARCH_H</div><div class='ctx'> #define _NOLIBC_ARCH_H</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +18,7 @@</div><div class='ctx'> #include "arch-powerpc.h"</div><div class='ctx'> #elif defined(__riscv)</div><div class='ctx'> #include "arch-riscv.h"</div><div class='del'>-#elif defined(__s390x__) || defined(__s390__)</div><div class='add'>+#elif defined(__s390x__)</div><div class='ctx'> #include "arch-s390.h"</div><div class='ctx'> #elif defined(__loongarch__)</div><div class='ctx'> #include "arch-loongarch.h"</div><div class='head'>diff --git a/tools/include/nolibc/compiler.h b/tools/include/nolibc/compiler.h<br/>index 369cfb5a0e78..87090bbc53e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/compiler.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/compiler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/compiler.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/compiler.h</a></div><div class='hunk'>@@ -41,8 +41,8 @@</div><div class='ctx'> #  define __no_stack_protector __attribute__((__optimize__("-fno-stack-protector")))</div><div class='ctx'> #endif /* __nolibc_has_attribute(no_stack_protector) */</div><div class='ctx'> </div><div class='del'>-#if __nolibc_has_attribute(fallthrough)</div><div class='del'>-#  define __nolibc_fallthrough do { } while (0); __attribute__((fallthrough))</div><div class='add'>+#if __nolibc_has_attribute(__fallthrough__)</div><div class='add'>+#  define __nolibc_fallthrough do { } while (0); __attribute__((__fallthrough__))</div><div class='ctx'> #else</div><div class='ctx'> #  define __nolibc_fallthrough do { } while (0)</div><div class='ctx'> #endif /* __nolibc_has_attribute(fallthrough) */</div><div class='head'>diff --git a/tools/include/nolibc/crt.h b/tools/include/nolibc/crt.h<br/>index 961cfe777c35..d9262998dae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/crt.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/crt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/crt.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/crt.h</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> #ifndef _NOLIBC_CRT_H</div><div class='ctx'> #define _NOLIBC_CRT_H</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='add'>+</div><div class='ctx'> #include "compiler.h"</div><div class='ctx'> </div><div class='ctx'> char **environ __attribute__((weak));</div><div class='hunk'>@@ -88,4 +90,5 @@ void _start_c(long *sp)</div><div class='ctx'> 	exit(exitcode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> #endif /* _NOLIBC_CRT_H */</div><div class='head'>diff --git a/tools/include/nolibc/dirent.h b/tools/include/nolibc/dirent.h<br/>index 758b95c48e7a..61a122a60327 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/dirent.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/dirent.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/dirent.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/dirent.h</a></div><div class='hunk'>@@ -86,9 +86,9 @@ int readdir_r(DIR *dirp, struct dirent *entry, struct dirent **result)</div><div class='ctx'> 	 * readdir() can only return one entry at a time.</div><div class='ctx'> 	 * Make sure the non-returned ones are not skipped.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = lseek(fd, ldir-&gt;d_off, SEEK_SET);</div><div class='del'>-	if (ret == -1)</div><div class='del'>-		return errno;</div><div class='add'>+	ret = sys_lseek(fd, ldir-&gt;d_off, SEEK_SET);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return -ret;</div><div class='ctx'> </div><div class='ctx'> 	entry-&gt;d_ino = ldir-&gt;d_ino;</div><div class='ctx'> 	/* the destination should always be big enough */</div><div class='head'>diff --git a/tools/include/nolibc/getopt.h b/tools/include/nolibc/getopt.h<br/>index 217abb95264b..87565e3b6a33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/getopt.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/getopt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/getopt.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/getopt.h</a></div><div class='hunk'>@@ -78,7 +78,7 @@ int getopt(int argc, char * const argv[], const char *optstring)</div><div class='ctx'> 		return '?';</div><div class='ctx'> 	}</div><div class='ctx'> 	if (optstring[i] == ':') {</div><div class='del'>-		optarg = 0;</div><div class='add'>+		optarg = NULL;</div><div class='ctx'> 		if (optstring[i + 1] != ':' || __optpos) {</div><div class='ctx'> 			optarg = argv[optind++];</div><div class='ctx'> 			if (__optpos)</div><div class='head'>diff --git a/tools/include/nolibc/inttypes.h b/tools/include/nolibc/inttypes.h<br/>new file mode 100644<br/>index 000000000000..1977bd74bfeb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/inttypes.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/inttypes.h</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+/* SPDX-License-Identifier: LGPL-2.1 OR MIT */</div><div class='add'>+</div><div class='add'>+#include "nolibc.h"</div><div class='head'>diff --git a/tools/include/nolibc/nolibc.h b/tools/include/nolibc/nolibc.h<br/>index c199ade200c2..272dfc961158 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/nolibc.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/nolibc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/nolibc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/nolibc.h</a></div><div class='hunk'>@@ -104,11 +104,13 @@</div><div class='ctx'> #include "sys/random.h"</div><div class='ctx'> #include "sys/reboot.h"</div><div class='ctx'> #include "sys/resource.h"</div><div class='add'>+#include "sys/select.h"</div><div class='ctx'> #include "sys/stat.h"</div><div class='ctx'> #include "sys/syscall.h"</div><div class='ctx'> #include "sys/sysmacros.h"</div><div class='ctx'> #include "sys/time.h"</div><div class='ctx'> #include "sys/timerfd.h"</div><div class='add'>+#include "sys/uio.h"</div><div class='ctx'> #include "sys/utsname.h"</div><div class='ctx'> #include "sys/wait.h"</div><div class='ctx'> #include "ctype.h"</div><div class='hunk'>@@ -116,6 +118,7 @@</div><div class='ctx'> #include "sched.h"</div><div class='ctx'> #include "signal.h"</div><div class='ctx'> #include "unistd.h"</div><div class='add'>+#include "stdbool.h"</div><div class='ctx'> #include "stdio.h"</div><div class='ctx'> #include "stdlib.h"</div><div class='ctx'> #include "string.h"</div><div class='head'>diff --git a/tools/include/nolibc/poll.h b/tools/include/nolibc/poll.h<br/>index 1765acb17ea0..0d053f93ea99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/poll.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/poll.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/poll.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/poll.h</a></div><div class='hunk'>@@ -39,10 +39,8 @@ int sys_poll(struct pollfd *fds, int nfds, int timeout)</div><div class='ctx'> 		t.tv_nsec = (timeout % 1000) * 1000000;</div><div class='ctx'> 	}</div><div class='ctx'> 	return my_syscall5(__NR_ppoll_time64, fds, nfds, (timeout &gt;= 0) ? &amp;t : NULL, NULL, 0);</div><div class='del'>-#elif defined(__NR_poll)</div><div class='del'>-	return my_syscall3(__NR_poll, fds, nfds, timeout);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, fds, nfds, timeout);</div><div class='add'>+	return my_syscall3(__NR_poll, fds, nfds, timeout);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/nolibc/stackprotector.h b/tools/include/nolibc/stackprotector.h<br/>index c71a2c257177..7123aa056cb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stackprotector.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stackprotector.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stackprotector.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/stackprotector.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "compiler.h"</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> #if defined(_NOLIBC_STACKPROTECTOR)</div><div class='ctx'> </div><div class='ctx'> #include "sys.h"</div><div class='hunk'>@@ -49,5 +50,6 @@ static __no_stack_protector void __stack_chk_init(void)</div><div class='ctx'> #else /* !defined(_NOLIBC_STACKPROTECTOR) */</div><div class='ctx'> static void __stack_chk_init(void) {}</div><div class='ctx'> #endif /* defined(_NOLIBC_STACKPROTECTOR) */</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_STACKPROTECTOR_H */</div><div class='head'>diff --git a/tools/include/nolibc/std.h b/tools/include/nolibc/std.h<br/>index ba950f0e7338..392f4dd94158 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/std.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/std.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/std.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/std.h</a></div><div class='hunk'>@@ -20,15 +20,15 @@</div><div class='ctx'> </div><div class='ctx'> /* those are commonly provided by sys/types.h */</div><div class='ctx'> typedef unsigned int          dev_t;</div><div class='del'>-typedef unsigned long         ino_t;</div><div class='add'>+typedef uint64_t              ino_t;</div><div class='ctx'> typedef unsigned int         mode_t;</div><div class='ctx'> typedef   signed int          pid_t;</div><div class='ctx'> typedef unsigned int          uid_t;</div><div class='ctx'> typedef unsigned int          gid_t;</div><div class='ctx'> typedef unsigned long       nlink_t;</div><div class='del'>-typedef   signed long         off_t;</div><div class='add'>+typedef  int64_t              off_t;</div><div class='ctx'> typedef   signed long     blksize_t;</div><div class='ctx'> typedef   signed long      blkcnt_t;</div><div class='del'>-typedef __kernel_old_time_t  time_t;</div><div class='add'>+typedef __kernel_time_t      time_t;</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_STD_H */</div><div class='head'>diff --git a/tools/include/nolibc/stdio.h b/tools/include/nolibc/stdio.h<br/>index 7630234408c5..1f16dab2ac88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stdio.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stdio.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stdio.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/stdio.h</a></div><div class='hunk'>@@ -321,11 +321,13 @@ int __nolibc_printf(__nolibc_printf_cb cb, intptr_t state, size_t n, const char</div><div class='ctx'> 				if (!outstr)</div><div class='ctx'> 					outstr="(null)";</div><div class='ctx'> 			}</div><div class='del'>-#ifndef NOLIBC_IGNORE_ERRNO</div><div class='ctx'> 			else if (c == 'm') {</div><div class='add'>+#ifdef NOLIBC_IGNORE_ERRNO</div><div class='add'>+				outstr = "unknown error";</div><div class='add'>+#else</div><div class='ctx'> 				outstr = strerror(errno);</div><div class='del'>-			}</div><div class='ctx'> #endif /* NOLIBC_IGNORE_ERRNO */</div><div class='add'>+			}</div><div class='ctx'> 			else if (c == '%') {</div><div class='ctx'> 				/* queue it verbatim */</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -600,7 +602,11 @@ int sscanf(const char *str, const char *format, ...)</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> void perror(const char *msg)</div><div class='ctx'> {</div><div class='add'>+#ifdef NOLIBC_IGNORE_ERRNO</div><div class='add'>+	fprintf(stderr, "%s%sunknown error\n", (msg &amp;&amp; *msg) ? msg : "", (msg &amp;&amp; *msg) ? ": " : "");</div><div class='add'>+#else</div><div class='ctx'> 	fprintf(stderr, "%s%serrno=%d\n", (msg &amp;&amp; *msg) ? msg : "", (msg &amp;&amp; *msg) ? ": " : "", errno);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='head'>diff --git a/tools/include/nolibc/stdlib.h b/tools/include/nolibc/stdlib.h<br/>index 5fd99a480f82..f184e108ed0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stdlib.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/stdlib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/stdlib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/stdlib.h</a></div><div class='hunk'>@@ -100,6 +100,7 @@ void free(void *ptr)</div><div class='ctx'> 	munmap(heap, heap-&gt;len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> /* getenv() tries to find the environment variable named &lt;name&gt; in the</div><div class='ctx'>  * environment array pointed to by global variable "environ" which must be</div><div class='ctx'>  * declared as a char **, and must be terminated by a NULL (it is recommended</div><div class='hunk'>@@ -122,6 +123,7 @@ char *getenv(const char *name)</div><div class='ctx'> 	}</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> void *malloc(size_t len)</div><div class='head'>diff --git a/tools/include/nolibc/string.h b/tools/include/nolibc/string.h<br/>index 163a17e7dd38..4000926f44ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/string.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/string.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/string.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/string.h</a></div><div class='hunk'>@@ -93,6 +93,21 @@ void *memset(void *dst, int b, size_t len)</div><div class='ctx'> }</div><div class='ctx'> #endif /* #ifndef NOLIBC_ARCH_HAS_MEMSET */</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_ARCH_HAS_MEMCHR</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+void *memchr(const void *s, int c, size_t len)</div><div class='add'>+{</div><div class='add'>+	char *p = (char *)s;</div><div class='add'>+</div><div class='add'>+	while (len--) {</div><div class='add'>+		if (*p == (char)c)</div><div class='add'>+			return p;</div><div class='add'>+		p++;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif /* #ifndef NOLIBC_ARCH_HAS_MEMCHR */</div><div class='add'>+</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> char *strchr(const char *s, int c)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/include/nolibc/sys.h b/tools/include/nolibc/sys.h<br/>index 295e71d34aba..847af1ccbdc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys.h</a></div><div class='hunk'>@@ -106,7 +106,7 @@ static __attribute__((unused))</div><div class='ctx'> void *sbrk(intptr_t inc)</div><div class='ctx'> {</div><div class='ctx'> 	/* first call to find current end */</div><div class='del'>-	void *ret = sys_brk(0);</div><div class='add'>+	void *ret = sys_brk(NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &amp;&amp; sys_brk(ret + inc) == ret + inc)</div><div class='ctx'> 		return ret + inc;</div><div class='hunk'>@@ -118,6 +118,7 @@ void *sbrk(intptr_t inc)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * int chdir(const char *path);</div><div class='add'>+ * int fchdir(int fildes);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='hunk'>@@ -132,6 +133,18 @@ int chdir(const char *path)</div><div class='ctx'> 	return __sysret(sys_chdir(path));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __attribute__((unused))</div><div class='add'>+int sys_fchdir(int fildes)</div><div class='add'>+{</div><div class='add'>+	return my_syscall1(__NR_fchdir, fildes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+int fchdir(int fildes)</div><div class='add'>+{</div><div class='add'>+	return __sysret(sys_fchdir(fildes));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * int chmod(const char *path, mode_t mode);</div><div class='hunk'>@@ -142,10 +155,8 @@ int sys_chmod(const char *path, mode_t mode)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_fchmodat)</div><div class='ctx'> 	return my_syscall4(__NR_fchmodat, AT_FDCWD, path, mode, 0);</div><div class='del'>-#elif defined(__NR_chmod)</div><div class='del'>-	return my_syscall2(__NR_chmod, path, mode);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path, mode);</div><div class='add'>+	return my_syscall2(__NR_chmod, path, mode);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -165,10 +176,8 @@ int sys_chown(const char *path, uid_t owner, gid_t group)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_fchownat)</div><div class='ctx'> 	return my_syscall5(__NR_fchownat, AT_FDCWD, path, owner, group, 0);</div><div class='del'>-#elif defined(__NR_chown)</div><div class='del'>-	return my_syscall3(__NR_chown, path, owner, group);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path, owner, group);</div><div class='add'>+	return my_syscall3(__NR_chown, path, owner, group);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -238,11 +247,22 @@ static __attribute__((unused))</div><div class='ctx'> int sys_dup2(int old, int new)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_dup3)</div><div class='add'>+	int ret, nr_fcntl;</div><div class='add'>+</div><div class='add'>+#ifdef __NR_fcntl64</div><div class='add'>+	nr_fcntl = __NR_fcntl64;</div><div class='add'>+#else</div><div class='add'>+	nr_fcntl = __NR_fcntl;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (old == new) {</div><div class='add'>+		ret = my_syscall2(nr_fcntl, old, F_GETFD);</div><div class='add'>+		return ret &lt; 0 ? ret : old;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return my_syscall3(__NR_dup3, old, new, 0);</div><div class='del'>-#elif defined(__NR_dup2)</div><div class='del'>-	return my_syscall2(__NR_dup2, old, new);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, old, new);</div><div class='add'>+	return my_syscall2(__NR_dup2, old, new);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -327,10 +347,8 @@ pid_t sys_fork(void)</div><div class='ctx'> 	 * will not use the rest with no other flag.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return my_syscall5(__NR_clone, SIGCHLD, 0, 0, 0, 0);</div><div class='del'>-#elif defined(__NR_fork)</div><div class='del'>-	return my_syscall0(__NR_fork);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__);</div><div class='add'>+	return my_syscall0(__NR_fork);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -347,7 +365,7 @@ pid_t sys_vfork(void)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_vfork)</div><div class='ctx'> 	return my_syscall0(__NR_vfork);</div><div class='del'>-#elif defined(__NR_clone3)</div><div class='add'>+#else</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * clone() could be used but has different argument orders per</div><div class='ctx'> 	 * architecture.</div><div class='hunk'>@@ -358,8 +376,6 @@ pid_t sys_vfork(void)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return my_syscall2(__NR_clone3, &amp;args, sizeof(args));</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -509,6 +525,7 @@ pid_t gettid(void)</div><div class='ctx'> 	return sys_gettid();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='ctx'> static unsigned long getauxval(unsigned long key);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -520,7 +537,7 @@ int getpagesize(void)</div><div class='ctx'> {</div><div class='ctx'> 	return __sysret((int)getauxval(AT_PAGESZ) ?: -ENOENT);</div><div class='ctx'> }</div><div class='del'>-</div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * uid_t getuid(void);</div><div class='hunk'>@@ -569,10 +586,8 @@ int sys_link(const char *old, const char *new)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_linkat)</div><div class='ctx'> 	return my_syscall5(__NR_linkat, AT_FDCWD, old, AT_FDCWD, new, 0);</div><div class='del'>-#elif defined(__NR_link)</div><div class='del'>-	return my_syscall2(__NR_link, old, new);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, old, new);</div><div class='add'>+	return my_syscall2(__NR_link, old, new);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -590,44 +605,27 @@ int link(const char *old, const char *new)</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> off_t sys_lseek(int fd, off_t offset, int whence)</div><div class='ctx'> {</div><div class='del'>-#if defined(__NR_lseek)</div><div class='del'>-	return my_syscall3(__NR_lseek, fd, offset, whence);</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, fd, offset, whence);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __attribute__((unused))</div><div class='del'>-int sys_llseek(int fd, unsigned long offset_high, unsigned long offset_low,</div><div class='del'>-	       __kernel_loff_t *result, int whence)</div><div class='del'>-{</div><div class='ctx'> #if defined(__NR_llseek)</div><div class='del'>-	return my_syscall5(__NR_llseek, fd, offset_high, offset_low, result, whence);</div><div class='add'>+	__kernel_loff_t loff = 0;</div><div class='add'>+	off_t result;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = my_syscall5(__NR_llseek, fd, offset &gt;&gt; 32, (uint32_t)offset, &amp;loff, whence);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		result = ret;</div><div class='add'>+	else</div><div class='add'>+		result = loff;</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, fd, offset_high, offset_low, result, whence);</div><div class='add'>+	return my_syscall3(__NR_lseek, fd, offset, whence);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> off_t lseek(int fd, off_t offset, int whence)</div><div class='ctx'> {</div><div class='del'>-	__kernel_loff_t loff = 0;</div><div class='del'>-	off_t result;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	result = sys_lseek(fd, offset, whence);</div><div class='del'>-	if (result == -ENOSYS) {</div><div class='del'>-		/* Only exists on 32bit where nolibc off_t is also 32bit */</div><div class='del'>-		ret = sys_llseek(fd, 0, offset, &amp;loff, whence);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			result = ret;</div><div class='del'>-		else if (loff != (off_t)loff)</div><div class='del'>-			result = -EOVERFLOW;</div><div class='del'>-		else</div><div class='del'>-			result = loff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return __sysret(result);</div><div class='add'>+	return __sysret(sys_lseek(fd, offset, whence));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -640,10 +638,8 @@ int sys_mkdir(const char *path, mode_t mode)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_mkdirat)</div><div class='ctx'> 	return my_syscall3(__NR_mkdirat, AT_FDCWD, path, mode);</div><div class='del'>-#elif defined(__NR_mkdir)</div><div class='del'>-	return my_syscall2(__NR_mkdir, path, mode);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path, mode);</div><div class='add'>+	return my_syscall2(__NR_mkdir, path, mode);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -662,10 +658,8 @@ int sys_rmdir(const char *path)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_rmdir)</div><div class='ctx'> 	return my_syscall1(__NR_rmdir, path);</div><div class='del'>-#elif defined(__NR_unlinkat)</div><div class='del'>-	return my_syscall3(__NR_unlinkat, AT_FDCWD, path, AT_REMOVEDIR);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path);</div><div class='add'>+	return my_syscall3(__NR_unlinkat, AT_FDCWD, path, AT_REMOVEDIR);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -685,10 +679,8 @@ long sys_mknod(const char *path, mode_t mode, dev_t dev)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_mknodat)</div><div class='ctx'> 	return my_syscall4(__NR_mknodat, AT_FDCWD, path, mode, dev);</div><div class='del'>-#elif defined(__NR_mknod)</div><div class='del'>-	return my_syscall3(__NR_mknod, path, mode, dev);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path, mode, dev);</div><div class='add'>+	return my_syscall3(__NR_mknod, path, mode, dev);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -775,53 +767,6 @@ int sched_yield(void)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * int select(int nfds, fd_set *read_fds, fd_set *write_fds,</div><div class='del'>- *            fd_set *except_fds, struct timeval *timeout);</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static __attribute__((unused))</div><div class='del'>-int sys_select(int nfds, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *timeout)</div><div class='del'>-{</div><div class='del'>-#if defined(__ARCH_WANT_SYS_OLD_SELECT) &amp;&amp; !defined(__NR__newselect)</div><div class='del'>-	struct sel_arg_struct {</div><div class='del'>-		unsigned long n;</div><div class='del'>-		fd_set *r, *w, *e;</div><div class='del'>-		struct timeval *t;</div><div class='del'>-	} arg = { .n = nfds, .r = rfds, .w = wfds, .e = efds, .t = timeout };</div><div class='del'>-	return my_syscall1(__NR_select, &amp;arg);</div><div class='del'>-#elif defined(__NR__newselect)</div><div class='del'>-	return my_syscall5(__NR__newselect, nfds, rfds, wfds, efds, timeout);</div><div class='del'>-#elif defined(__NR_select)</div><div class='del'>-	return my_syscall5(__NR_select, nfds, rfds, wfds, efds, timeout);</div><div class='del'>-#elif defined(__NR_pselect6)</div><div class='del'>-	struct timespec t;</div><div class='del'>-</div><div class='del'>-	if (timeout) {</div><div class='del'>-		t.tv_sec  = timeout-&gt;tv_sec;</div><div class='del'>-		t.tv_nsec = timeout-&gt;tv_usec * 1000;</div><div class='del'>-	}</div><div class='del'>-	return my_syscall6(__NR_pselect6, nfds, rfds, wfds, efds, timeout ? &amp;t : NULL, NULL);</div><div class='del'>-#elif defined(__NR_pselect6_time64)</div><div class='del'>-	struct __kernel_timespec t;</div><div class='del'>-</div><div class='del'>-	if (timeout) {</div><div class='del'>-		t.tv_sec  = timeout-&gt;tv_sec;</div><div class='del'>-		t.tv_nsec = timeout-&gt;tv_usec * 1000;</div><div class='del'>-	}</div><div class='del'>-	return my_syscall6(__NR_pselect6_time64, nfds, rfds, wfds, efds, timeout ? &amp;t : NULL, NULL);</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, nfds, rfds, wfds, efds, timeout);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __attribute__((unused))</div><div class='del'>-int select(int nfds, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *timeout)</div><div class='del'>-{</div><div class='del'>-	return __sysret(sys_select(nfds, rfds, wfds, efds, timeout));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * int setpgid(pid_t pid, pid_t pgid);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -874,10 +819,8 @@ int sys_symlink(const char *old, const char *new)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_symlinkat)</div><div class='ctx'> 	return my_syscall3(__NR_symlinkat, old, AT_FDCWD, new);</div><div class='del'>-#elif defined(__NR_symlink)</div><div class='del'>-	return my_syscall2(__NR_symlink, old, new);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, old, new);</div><div class='add'>+	return my_syscall2(__NR_symlink, old, new);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -931,10 +874,8 @@ int sys_unlink(const char *path)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_unlinkat)</div><div class='ctx'> 	return my_syscall3(__NR_unlinkat, AT_FDCWD, path, 0);</div><div class='del'>-#elif defined(__NR_unlink)</div><div class='del'>-	return my_syscall1(__NR_unlink, path);</div><div class='ctx'> #else</div><div class='del'>-	return __nolibc_enosys(__func__, path);</div><div class='add'>+	return my_syscall1(__NR_unlink, path);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/nolibc/sys/auxv.h b/tools/include/nolibc/sys/auxv.h<br/>index c52463d6c18d..0e98325e7347 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/auxv.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/auxv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/auxv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/auxv.h</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #ifndef _NOLIBC_SYS_AUXV_H</div><div class='ctx'> #define _NOLIBC_SYS_AUXV_H</div><div class='ctx'> </div><div class='add'>+#ifndef NOLIBC_NO_RUNTIME</div><div class='add'>+</div><div class='ctx'> #include "../crt.h"</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='hunk'>@@ -38,4 +40,5 @@ unsigned long getauxval(unsigned long type)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif /* NOLIBC_NO_RUNTIME */</div><div class='ctx'> #endif /* _NOLIBC_SYS_AUXV_H */</div><div class='head'>diff --git a/tools/include/nolibc/sys/mman.h b/tools/include/nolibc/sys/mman.h<br/>index 5228751b458c..77084ac3405a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/mman.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/mman.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/mman.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/mman.h</a></div><div class='hunk'>@@ -31,11 +31,6 @@ void *sys_mmap(void *addr, size_t length, int prot, int flags, int fd,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* Note that on Linux, MAP_FAILED is -1 so we can use the generic __sysret()</div><div class='del'>- * which returns -1 upon error and still satisfy user land that checks for</div><div class='del'>- * MAP_FAILED.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> void *mmap(void *addr, size_t length, int prot, int flags, int fd, off_t offset)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/include/nolibc/sys/random.h b/tools/include/nolibc/sys/random.h<br/>index 8d9749f1c845..cd5d25c571a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/random.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/random.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/random.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/random.h</a></div><div class='hunk'>@@ -22,13 +22,13 @@</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> ssize_t sys_getrandom(void *buf, size_t buflen, unsigned int flags)</div><div class='ctx'> {</div><div class='del'>-       return my_syscall3(__NR_getrandom, buf, buflen, flags);</div><div class='add'>+	return my_syscall3(__NR_getrandom, buf, buflen, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> ssize_t getrandom(void *buf, size_t buflen, unsigned int flags)</div><div class='ctx'> {</div><div class='del'>-       return __sysret(sys_getrandom(buf, buflen, flags));</div><div class='add'>+	return __sysret(sys_getrandom(buf, buflen, flags));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_SYS_RANDOM_H */</div><div class='head'>diff --git a/tools/include/nolibc/sys/reboot.h b/tools/include/nolibc/sys/reboot.h<br/>index 4a1e435be669..38274c64a722 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/reboot.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/reboot.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/reboot.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/reboot.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ ssize_t sys_reboot(int magic1, int magic2, int cmd, void *arg)</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> int reboot(int cmd)</div><div class='ctx'> {</div><div class='del'>-	return __sysret(sys_reboot(LINUX_REBOOT_MAGIC1, LINUX_REBOOT_MAGIC2, cmd, 0));</div><div class='add'>+	return __sysret(sys_reboot(LINUX_REBOOT_MAGIC1, LINUX_REBOOT_MAGIC2, cmd, NULL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* _NOLIBC_SYS_REBOOT_H */</div><div class='head'>diff --git a/tools/include/nolibc/sys/select.h b/tools/include/nolibc/sys/select.h<br/>new file mode 100644<br/>index 000000000000..2a5619c01277<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/select.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/select.h</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+/* SPDX-License-Identifier: LGPL-2.1 OR MIT */</div><div class='add'>+</div><div class='add'>+#include "../nolibc.h"</div><div class='add'>+</div><div class='add'>+#ifndef _NOLIBC_SYS_SELECT_H</div><div class='add'>+#define _NOLIBC_SYS_SELECT_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+</div><div class='add'>+/* commonly an fd_set represents 256 FDs */</div><div class='add'>+#ifndef FD_SETSIZE</div><div class='add'>+#define FD_SETSIZE     256</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define FD_SETIDXMASK (8 * sizeof(unsigned long))</div><div class='add'>+#define FD_SETBITMASK (8 * sizeof(unsigned long)-1)</div><div class='add'>+</div><div class='add'>+/* for select() */</div><div class='add'>+typedef struct {</div><div class='add'>+	unsigned long fds[(FD_SETSIZE + FD_SETBITMASK) / FD_SETIDXMASK];</div><div class='add'>+} fd_set;</div><div class='add'>+</div><div class='add'>+#define FD_CLR(fd, set) do {						\</div><div class='add'>+		fd_set *__set = (set);					\</div><div class='add'>+		int __fd = (fd);					\</div><div class='add'>+		if (__fd &gt;= 0)						\</div><div class='add'>+			__set-&gt;fds[__fd / FD_SETIDXMASK] &amp;=		\</div><div class='add'>+				~(1U &lt;&lt; (__fd &amp; FD_SETBITMASK));	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define FD_SET(fd, set) do {						\</div><div class='add'>+		fd_set *__set = (set);					\</div><div class='add'>+		int __fd = (fd);					\</div><div class='add'>+		if (__fd &gt;= 0)						\</div><div class='add'>+			__set-&gt;fds[__fd / FD_SETIDXMASK] |=		\</div><div class='add'>+				1 &lt;&lt; (__fd &amp; FD_SETBITMASK);		\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define FD_ISSET(fd, set) ({						\</div><div class='add'>+			fd_set *__set = (set);				\</div><div class='add'>+			int __fd = (fd);				\</div><div class='add'>+		int __r = 0;						\</div><div class='add'>+		if (__fd &gt;= 0)						\</div><div class='add'>+			__r = !!(__set-&gt;fds[__fd / FD_SETIDXMASK] &amp;	\</div><div class='add'>+1U &lt;&lt; (__fd &amp; FD_SETBITMASK));						\</div><div class='add'>+		__r;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define FD_ZERO(set) do {						\</div><div class='add'>+		fd_set *__set = (set);					\</div><div class='add'>+		int __idx;						\</div><div class='add'>+		int __size = (FD_SETSIZE+FD_SETBITMASK) / FD_SETIDXMASK;\</div><div class='add'>+		for (__idx = 0; __idx &lt; __size; __idx++)		\</div><div class='add'>+			__set-&gt;fds[__idx] = 0;				\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * int select(int nfds, fd_set *read_fds, fd_set *write_fds,</div><div class='add'>+ *            fd_set *except_fds, struct timeval *timeout);</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+int sys_select(int nfds, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *timeout)</div><div class='add'>+{</div><div class='add'>+#if defined(__ARCH_WANT_SYS_OLD_SELECT) &amp;&amp; !defined(__NR__newselect)</div><div class='add'>+	struct sel_arg_struct {</div><div class='add'>+		unsigned long n;</div><div class='add'>+		fd_set *r, *w, *e;</div><div class='add'>+		struct timeval *t;</div><div class='add'>+	} arg = { .n = nfds, .r = rfds, .w = wfds, .e = efds, .t = timeout };</div><div class='add'>+	return my_syscall1(__NR_select, &amp;arg);</div><div class='add'>+#elif defined(__NR__newselect)</div><div class='add'>+	return my_syscall5(__NR__newselect, nfds, rfds, wfds, efds, timeout);</div><div class='add'>+#elif defined(__NR_select)</div><div class='add'>+	return my_syscall5(__NR_select, nfds, rfds, wfds, efds, timeout);</div><div class='add'>+#elif defined(__NR_pselect6)</div><div class='add'>+	struct timespec t;</div><div class='add'>+</div><div class='add'>+	if (timeout) {</div><div class='add'>+		t.tv_sec  = timeout-&gt;tv_sec;</div><div class='add'>+		t.tv_nsec = timeout-&gt;tv_usec * 1000;</div><div class='add'>+	}</div><div class='add'>+	return my_syscall6(__NR_pselect6, nfds, rfds, wfds, efds, timeout ? &amp;t : NULL, NULL);</div><div class='add'>+#else</div><div class='add'>+	struct __kernel_timespec t;</div><div class='add'>+</div><div class='add'>+	if (timeout) {</div><div class='add'>+		t.tv_sec  = timeout-&gt;tv_sec;</div><div class='add'>+		t.tv_nsec = timeout-&gt;tv_usec * 1000;</div><div class='add'>+	}</div><div class='add'>+	return my_syscall6(__NR_pselect6_time64, nfds, rfds, wfds, efds, timeout ? &amp;t : NULL, NULL);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+int select(int nfds, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *timeout)</div><div class='add'>+{</div><div class='add'>+	return __sysret(sys_select(nfds, rfds, wfds, efds, timeout));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _NOLIBC_SYS_SELECT_H */</div><div class='head'>diff --git a/tools/include/nolibc/sys/timerfd.h b/tools/include/nolibc/sys/timerfd.h<br/>index 4375d546ba58..5dd61030c991 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/timerfd.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/timerfd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/timerfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/timerfd.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@ int sys_timerfd_gettime(int fd, struct itimerspec *curr_value)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_timerfd_gettime)</div><div class='ctx'> 	return my_syscall2(__NR_timerfd_gettime, fd, curr_value);</div><div class='del'>-#elif defined(__NR_timerfd_gettime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_itimerspec kcurr_value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -42,8 +42,6 @@ int sys_timerfd_gettime(int fd, struct itimerspec *curr_value)</div><div class='ctx'> 	__nolibc_timespec_kernel_to_user(&amp;kcurr_value.it_interval, &amp;curr_value-&gt;it_interval);</div><div class='ctx'> 	__nolibc_timespec_kernel_to_user(&amp;kcurr_value.it_value, &amp;curr_value-&gt;it_value);</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, fd, curr_value);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +58,7 @@ int sys_timerfd_settime(int fd, int flags,</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_timerfd_settime)</div><div class='ctx'> 	return my_syscall4(__NR_timerfd_settime, fd, flags, new_value, old_value);</div><div class='del'>-#elif defined(__NR_timerfd_settime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_itimerspec knew_value, kold_value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -72,8 +70,6 @@ int sys_timerfd_settime(int fd, int flags,</div><div class='ctx'> 		__nolibc_timespec_kernel_to_user(&amp;kold_value.it_value, &amp;old_value-&gt;it_value);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, fd, flags, new_value, old_value);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/nolibc/sys/uio.h b/tools/include/nolibc/sys/uio.h<br/>new file mode 100644<br/>index 000000000000..7ad42b927d2f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/uio.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/uio.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+/* SPDX-License-Identifier: LGPL-2.1 OR MIT */</div><div class='add'>+/*</div><div class='add'>+ * uio for NOLIBC</div><div class='add'>+ * Copyright (C) 2017-2021 Willy Tarreau &lt;w@1wt.eu&gt;</div><div class='add'>+ * Copyright (C) 2025 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* make sure to include all global symbols */</div><div class='add'>+#include "../nolibc.h"</div><div class='add'>+</div><div class='add'>+#ifndef _NOLIBC_SYS_UIO_H</div><div class='add'>+#define _NOLIBC_SYS_UIO_H</div><div class='add'>+</div><div class='add'>+#include "../sys.h"</div><div class='add'>+#include &lt;linux/uio.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ssize_t readv(int fd, const struct iovec *iovec, int count);</div><div class='add'>+ */</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+ssize_t sys_readv(int fd, const struct iovec *iovec, int count)</div><div class='add'>+{</div><div class='add'>+	return my_syscall3(__NR_readv, fd, iovec, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+ssize_t readv(int fd, const struct iovec *iovec, int count)</div><div class='add'>+{</div><div class='add'>+	return __sysret(sys_readv(fd, iovec, count));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ssize_t writev(int fd, const struct iovec *iovec, int count);</div><div class='add'>+ */</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+ssize_t sys_writev(int fd, const struct iovec *iovec, int count)</div><div class='add'>+{</div><div class='add'>+	return my_syscall3(__NR_writev, fd, iovec, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __attribute__((unused))</div><div class='add'>+ssize_t writev(int fd, const struct iovec *iovec, int count)</div><div class='add'>+{</div><div class='add'>+	return __sysret(sys_writev(fd, iovec, count));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _NOLIBC_SYS_UIO_H */</div><div class='head'>diff --git a/tools/include/nolibc/sys/wait.h b/tools/include/nolibc/sys/wait.h<br/>index 56ddb806da7f..9d9319ba92cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/wait.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/sys/wait.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/sys/wait.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/sys/wait.h</a></div><div class='hunk'>@@ -16,28 +16,11 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * pid_t wait(int *status);</div><div class='del'>- * pid_t wait4(pid_t pid, int *status, int options, struct rusage *rusage);</div><div class='ctx'>  * pid_t waitpid(pid_t pid, int *status, int options);</div><div class='ctx'>  * int waitid(idtype_t idtype, id_t id, siginfo_t *infop, int options);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='del'>-pid_t sys_wait4(pid_t pid, int *status, int options, struct rusage *rusage)</div><div class='del'>-{</div><div class='del'>-#ifdef __NR_wait4</div><div class='del'>-	return my_syscall4(__NR_wait4, pid, status, options, rusage);</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, pid, status, options, rusage);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __attribute__((unused))</div><div class='del'>-pid_t wait4(pid_t pid, int *status, int options, struct rusage *rusage)</div><div class='del'>-{</div><div class='del'>-	return __sysret(sys_wait4(pid, status, options, rusage));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __attribute__((unused))</div><div class='ctx'> int sys_waitid(int which, pid_t pid, siginfo_t *infop, int options, struct rusage *rusage)</div><div class='ctx'> {</div><div class='ctx'> 	return my_syscall5(__NR_waitid, which, pid, infop, options, rusage);</div><div class='hunk'>@@ -82,23 +65,29 @@ pid_t waitpid(pid_t pid, int *status, int options)</div><div class='ctx'> </div><div class='ctx'> 	switch (info.si_code) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		*status = 0;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLD_EXITED:</div><div class='del'>-		*status = (info.si_status &amp; 0xff) &lt;&lt; 8;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = (info.si_status &amp; 0xff) &lt;&lt; 8;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLD_KILLED:</div><div class='del'>-		*status = info.si_status &amp; 0x7f;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = info.si_status &amp; 0x7f;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLD_DUMPED:</div><div class='del'>-		*status = (info.si_status &amp; 0x7f) | 0x80;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = (info.si_status &amp; 0x7f) | 0x80;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLD_STOPPED:</div><div class='ctx'> 	case CLD_TRAPPED:</div><div class='del'>-		*status = (info.si_status &lt;&lt; 8) + 0x7f;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = (info.si_status &lt;&lt; 8) + 0x7f;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLD_CONTINUED:</div><div class='del'>-		*status = 0xffff;</div><div class='add'>+		if (status)</div><div class='add'>+			*status = 0xffff;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -1;</div><div class='head'>diff --git a/tools/include/nolibc/time.h b/tools/include/nolibc/time.h<br/>index d02bc44d2643..48e78f8becf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/time.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/time.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/time.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/time.h</a></div><div class='hunk'>@@ -45,7 +45,7 @@ int sys_clock_getres(clockid_t clockid, struct timespec *res)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_clock_getres)</div><div class='ctx'> 	return my_syscall2(__NR_clock_getres, clockid, res);</div><div class='del'>-#elif defined(__NR_clock_getres_time64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_timespec kres;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -53,8 +53,6 @@ int sys_clock_getres(clockid_t clockid, struct timespec *res)</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		__nolibc_timespec_kernel_to_user(&amp;kres, res);</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, clockid, res);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +67,7 @@ int sys_clock_gettime(clockid_t clockid, struct timespec *tp)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_clock_gettime)</div><div class='ctx'> 	return my_syscall2(__NR_clock_gettime, clockid, tp);</div><div class='del'>-#elif defined(__NR_clock_gettime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_timespec ktp;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -77,8 +75,6 @@ int sys_clock_gettime(clockid_t clockid, struct timespec *tp)</div><div class='ctx'> 	if (tp)</div><div class='ctx'> 		__nolibc_timespec_kernel_to_user(&amp;ktp, tp);</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, clockid, tp);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -93,13 +89,11 @@ int sys_clock_settime(clockid_t clockid, struct timespec *tp)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_clock_settime)</div><div class='ctx'> 	return my_syscall2(__NR_clock_settime, clockid, tp);</div><div class='del'>-#elif defined(__NR_clock_settime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_timespec ktp;</div><div class='ctx'> </div><div class='ctx'> 	__nolibc_timespec_user_to_kernel(tp, &amp;ktp);</div><div class='ctx'> 	return my_syscall2(__NR_clock_settime64, clockid, &amp;ktp);</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, clockid, tp);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -115,7 +109,7 @@ int sys_clock_nanosleep(clockid_t clockid, int flags, const struct timespec *rqt</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_clock_nanosleep)</div><div class='ctx'> 	return my_syscall4(__NR_clock_nanosleep, clockid, flags, rqtp, rmtp);</div><div class='del'>-#elif defined(__NR_clock_nanosleep_time64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_timespec krqtp, krmtp;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -124,8 +118,6 @@ int sys_clock_nanosleep(clockid_t clockid, int flags, const struct timespec *rqt</div><div class='ctx'> 	if (rmtp)</div><div class='ctx'> 		__nolibc_timespec_kernel_to_user(&amp;krmtp, rmtp);</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, clockid, flags, rqtp, rmtp);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +125,8 @@ static __attribute__((unused))</div><div class='ctx'> int clock_nanosleep(clockid_t clockid, int flags, const struct timespec *rqtp,</div><div class='ctx'> 		    struct timespec *rmtp)</div><div class='ctx'> {</div><div class='del'>-	return __sysret(sys_clock_nanosleep(clockid, flags, rqtp, rmtp));</div><div class='add'>+	/* Directly return a positive error number */</div><div class='add'>+	return -sys_clock_nanosleep(clockid, flags, rqtp, rmtp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __inline__</div><div class='hunk'>@@ -145,7 +138,7 @@ double difftime(time_t time1, time_t time2)</div><div class='ctx'> static __inline__</div><div class='ctx'> int nanosleep(const struct timespec *rqtp, struct timespec *rmtp)</div><div class='ctx'> {</div><div class='del'>-	return clock_nanosleep(CLOCK_REALTIME, 0, rqtp, rmtp);</div><div class='add'>+	return __sysret(sys_clock_nanosleep(CLOCK_REALTIME, 0, rqtp, rmtp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -198,7 +191,7 @@ int sys_timer_gettime(timer_t timerid, struct itimerspec *curr_value)</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_timer_gettime)</div><div class='ctx'> 	return my_syscall2(__NR_timer_gettime, timerid, curr_value);</div><div class='del'>-#elif defined(__NR_timer_gettime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_itimerspec kcurr_value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -206,8 +199,6 @@ int sys_timer_gettime(timer_t timerid, struct itimerspec *curr_value)</div><div class='ctx'> 	__nolibc_timespec_kernel_to_user(&amp;kcurr_value.it_interval, &amp;curr_value-&gt;it_interval);</div><div class='ctx'> 	__nolibc_timespec_kernel_to_user(&amp;kcurr_value.it_value, &amp;curr_value-&gt;it_value);</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, timerid, curr_value);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -223,7 +214,7 @@ int sys_timer_settime(timer_t timerid, int flags,</div><div class='ctx'> {</div><div class='ctx'> #if defined(__NR_timer_settime)</div><div class='ctx'> 	return my_syscall4(__NR_timer_settime, timerid, flags, new_value, old_value);</div><div class='del'>-#elif defined(__NR_timer_settime64)</div><div class='add'>+#else</div><div class='ctx'> 	struct __kernel_itimerspec knew_value, kold_value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -235,8 +226,6 @@ int sys_timer_settime(timer_t timerid, int flags,</div><div class='ctx'> 		__nolibc_timespec_kernel_to_user(&amp;kold_value.it_value, &amp;old_value-&gt;it_value);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='del'>-#else</div><div class='del'>-	return __nolibc_enosys(__func__, timerid, flags, new_value, old_value);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/include/nolibc/types.h b/tools/include/nolibc/types.h<br/>index 16c6e9ec9451..470a5f77bc0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/types.h</a></div><div class='hunk'>@@ -70,11 +70,6 @@</div><div class='ctx'> #define DT_LNK         0xa</div><div class='ctx'> #define DT_SOCK        0xc</div><div class='ctx'> </div><div class='del'>-/* commonly an fd_set represents 256 FDs */</div><div class='del'>-#ifndef FD_SETSIZE</div><div class='del'>-#define FD_SETSIZE     256</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* PATH_MAX and MAXPATHLEN are often used and found with plenty of different</div><div class='ctx'>  * values.</div><div class='ctx'>  */</div><div class='hunk'>@@ -115,48 +110,6 @@</div><div class='ctx'> #define EXIT_SUCCESS 0</div><div class='ctx'> #define EXIT_FAILURE 1</div><div class='ctx'> </div><div class='del'>-#define FD_SETIDXMASK (8 * sizeof(unsigned long))</div><div class='del'>-#define FD_SETBITMASK (8 * sizeof(unsigned long)-1)</div><div class='del'>-</div><div class='del'>-/* for select() */</div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned long fds[(FD_SETSIZE + FD_SETBITMASK) / FD_SETIDXMASK];</div><div class='del'>-} fd_set;</div><div class='del'>-</div><div class='del'>-#define FD_CLR(fd, set) do {						\</div><div class='del'>-		fd_set *__set = (set);					\</div><div class='del'>-		int __fd = (fd);					\</div><div class='del'>-		if (__fd &gt;= 0)						\</div><div class='del'>-			__set-&gt;fds[__fd / FD_SETIDXMASK] &amp;=		\</div><div class='del'>-				~(1U &lt;&lt; (__fd &amp; FD_SETBITMASK));	\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define FD_SET(fd, set) do {						\</div><div class='del'>-		fd_set *__set = (set);					\</div><div class='del'>-		int __fd = (fd);					\</div><div class='del'>-		if (__fd &gt;= 0)						\</div><div class='del'>-			__set-&gt;fds[__fd / FD_SETIDXMASK] |=		\</div><div class='del'>-				1 &lt;&lt; (__fd &amp; FD_SETBITMASK);		\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define FD_ISSET(fd, set) ({						\</div><div class='del'>-			fd_set *__set = (set);				\</div><div class='del'>-			int __fd = (fd);				\</div><div class='del'>-		int __r = 0;						\</div><div class='del'>-		if (__fd &gt;= 0)						\</div><div class='del'>-			__r = !!(__set-&gt;fds[__fd / FD_SETIDXMASK] &amp;	\</div><div class='del'>-1U &lt;&lt; (__fd &amp; FD_SETBITMASK));						\</div><div class='del'>-		__r;							\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define FD_ZERO(set) do {						\</div><div class='del'>-		fd_set *__set = (set);					\</div><div class='del'>-		int __idx;						\</div><div class='del'>-		int __size = (FD_SETSIZE+FD_SETBITMASK) / FD_SETIDXMASK;\</div><div class='del'>-		for (__idx = 0; __idx &lt; __size; __idx++)		\</div><div class='del'>-			__set-&gt;fds[__idx] = 0;				\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='ctx'> /* for getdents64() */</div><div class='ctx'> struct linux_dirent64 {</div><div class='ctx'> 	uint64_t       d_ino;</div><div class='head'>diff --git a/tools/include/nolibc/unistd.h b/tools/include/nolibc/unistd.h<br/>index 25bfc7732ec7..bb5e80f3f05d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/unistd.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/nolibc/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/nolibc/unistd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/nolibc/unistd.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> static __attribute__((unused))</div><div class='ctx'> int sys_faccessat(int fd, const char *path, int amode, int flag)</div><div class='ctx'> {</div><div class='del'>-       return my_syscall4(__NR_faccessat, fd, path, amode, flag);</div><div class='add'>+	return my_syscall4(__NR_faccessat, fd, path, amode, flag);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='hunk'>@@ -54,7 +54,7 @@ int msleep(unsigned int msecs)</div><div class='ctx'> {</div><div class='ctx'> 	struct timeval my_timeval = { msecs / 1000, (msecs % 1000) * 1000 };</div><div class='ctx'> </div><div class='del'>-	if (sys_select(0, 0, 0, 0, &amp;my_timeval) &lt; 0)</div><div class='add'>+	if (sys_select(0, NULL, NULL, NULL, &amp;my_timeval) &lt; 0)</div><div class='ctx'> 		return (my_timeval.tv_sec * 1000) +</div><div class='ctx'> 			(my_timeval.tv_usec / 1000) +</div><div class='ctx'> 			!!(my_timeval.tv_usec % 1000);</div><div class='hunk'>@@ -67,7 +67,7 @@ unsigned int sleep(unsigned int seconds)</div><div class='ctx'> {</div><div class='ctx'> 	struct timeval my_timeval = { seconds, 0 };</div><div class='ctx'> </div><div class='del'>-	if (sys_select(0, 0, 0, 0, &amp;my_timeval) &lt; 0)</div><div class='add'>+	if (sys_select(0, NULL, NULL, NULL, &amp;my_timeval) &lt; 0)</div><div class='ctx'> 		return my_timeval.tv_sec + !!my_timeval.tv_usec;</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -78,7 +78,7 @@ int usleep(unsigned int usecs)</div><div class='ctx'> {</div><div class='ctx'> 	struct timeval my_timeval = { usecs / 1000000, usecs % 1000000 };</div><div class='ctx'> </div><div class='del'>-	return sys_select(0, 0, 0, 0, &amp;my_timeval);</div><div class='add'>+	return sys_select(0, NULL, NULL, NULL, &amp;my_timeval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __attribute__((unused))</div><div class='head'>diff --git a/tools/include/uapi/asm-generic/unistd.h b/tools/include/uapi/asm-generic/unistd.h<br/>index 2892a45023af..04e0077fb4c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/asm-generic/unistd.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/asm-generic/unistd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/asm-generic/unistd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/asm-generic/unistd.h</a></div><div class='hunk'>@@ -852,8 +852,14 @@ __SYSCALL(__NR_removexattrat, sys_removexattrat)</div><div class='ctx'> #define __NR_open_tree_attr 467</div><div class='ctx'> __SYSCALL(__NR_open_tree_attr, sys_open_tree_attr)</div><div class='ctx'> </div><div class='add'>+/* fs/inode.c */</div><div class='add'>+#define __NR_file_getattr 468</div><div class='add'>+__SYSCALL(__NR_file_getattr, sys_file_getattr)</div><div class='add'>+#define __NR_file_setattr 469</div><div class='add'>+__SYSCALL(__NR_file_setattr, sys_file_setattr)</div><div class='add'>+</div><div class='ctx'> #undef __NR_syscalls</div><div class='del'>-#define __NR_syscalls 468</div><div class='add'>+#define __NR_syscalls 470</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * 32 bit systems traditionally used different</div><div class='head'>diff --git a/tools/include/uapi/drm/drm.h b/tools/include/uapi/drm/drm.h<br/>index e63a71d3c607..3cd5cf15e3c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/drm/drm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/drm/drm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/drm/drm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/drm/drm.h</a></div><div class='hunk'>@@ -597,35 +597,66 @@ struct drm_set_version {</div><div class='ctx'> 	int drm_dd_minor;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* DRM_IOCTL_GEM_CLOSE ioctl argument type */</div><div class='add'>+/**</div><div class='add'>+ * struct drm_gem_close - Argument for &amp;DRM_IOCTL_GEM_CLOSE ioctl.</div><div class='add'>+ * @handle: Handle of the object to be closed.</div><div class='add'>+ * @pad: Padding.</div><div class='add'>+ *</div><div class='add'>+ * Releases the handle to an mm object.</div><div class='add'>+ */</div><div class='ctx'> struct drm_gem_close {</div><div class='del'>-	/** Handle of the object to be closed. */</div><div class='ctx'> 	__u32 handle;</div><div class='ctx'> 	__u32 pad;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* DRM_IOCTL_GEM_FLINK ioctl argument type */</div><div class='add'>+/**</div><div class='add'>+ * struct drm_gem_flink - Argument for &amp;DRM_IOCTL_GEM_FLINK ioctl.</div><div class='add'>+ * @handle: Handle for the object being named.</div><div class='add'>+ * @name: Returned global name.</div><div class='add'>+ *</div><div class='add'>+ * Create a global name for an object, returning the name.</div><div class='add'>+ *</div><div class='add'>+ * Note that the name does not hold a reference; when the object</div><div class='add'>+ * is freed, the name goes away.</div><div class='add'>+ */</div><div class='ctx'> struct drm_gem_flink {</div><div class='del'>-	/** Handle for the object being named */</div><div class='ctx'> 	__u32 handle;</div><div class='del'>-</div><div class='del'>-	/** Returned global name */</div><div class='ctx'> 	__u32 name;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* DRM_IOCTL_GEM_OPEN ioctl argument type */</div><div class='add'>+/**</div><div class='add'>+ * struct drm_gem_open - Argument for &amp;DRM_IOCTL_GEM_OPEN ioctl.</div><div class='add'>+ * @name: Name of object being opened.</div><div class='add'>+ * @handle: Returned handle for the object.</div><div class='add'>+ * @size: Returned size of the object</div><div class='add'>+ *</div><div class='add'>+ * Open an object using the global name, returning a handle and the size.</div><div class='add'>+ *</div><div class='add'>+ * This handle (of course) holds a reference to the object, so the object</div><div class='add'>+ * will not go away until the handle is deleted.</div><div class='add'>+ */</div><div class='ctx'> struct drm_gem_open {</div><div class='del'>-	/** Name of object being opened */</div><div class='ctx'> 	__u32 name;</div><div class='del'>-</div><div class='del'>-	/** Returned handle for the object */</div><div class='ctx'> 	__u32 handle;</div><div class='del'>-</div><div class='del'>-	/** Returned size of the object */</div><div class='ctx'> 	__u64 size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct drm_gem_change_handle - Argument for &amp;DRM_IOCTL_GEM_CHANGE_HANDLE ioctl.</div><div class='add'>+ * @handle: The handle of a gem object.</div><div class='add'>+ * @new_handle: An available gem handle.</div><div class='add'>+ *</div><div class='add'>+ * This ioctl changes the handle of a GEM object to the specified one.</div><div class='add'>+ * The new handle must be unused. On success the old handle is closed</div><div class='add'>+ * and all further IOCTL should refer to the new handle only.</div><div class='add'>+ * Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle.</div><div class='add'>+ */</div><div class='add'>+struct drm_gem_change_handle {</div><div class='add'>+	__u32 handle;</div><div class='add'>+	__u32 new_handle;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * DRM_CAP_DUMB_BUFFER</div><div class='ctx'>  *</div><div class='ctx'>  * If set to 1, the driver supports creating dumb buffers via the</div><div class='hunk'>@@ -1309,6 +1340,14 @@ extern "C" {</div><div class='ctx'>  */</div><div class='ctx'> #define DRM_IOCTL_SET_CLIENT_NAME	DRM_IOWR(0xD1, struct drm_set_client_name)</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle</div><div class='add'>+ *</div><div class='add'>+ * Some applications (notably CRIU) need objects to have specific gem handles.</div><div class='add'>+ * This ioctl changes the object at one gem handle to use a new gem handle.</div><div class='add'>+ */</div><div class='add'>+#define DRM_IOCTL_GEM_CHANGE_HANDLE    DRM_IOWR(0xD2, struct drm_gem_change_handle)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Device specific ioctls should only be in their respective headers</div><div class='ctx'>  * The device specific ioctl range is from 0x40 to 0x9f.</div><div class='head'>diff --git a/tools/include/uapi/linux/bpf.h b/tools/include/uapi/linux/bpf.h<br/>index 233de8677382..be7d8e060e10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/bpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/bpf.h</a></div><div class='hunk'>@@ -1026,6 +1026,7 @@ enum bpf_map_type {</div><div class='ctx'> 	BPF_MAP_TYPE_USER_RINGBUF,</div><div class='ctx'> 	BPF_MAP_TYPE_CGRP_STORAGE,</div><div class='ctx'> 	BPF_MAP_TYPE_ARENA,</div><div class='add'>+	BPF_MAP_TYPE_INSN_ARRAY,</div><div class='ctx'> 	__MAX_BPF_MAP_TYPE</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1430,6 +1431,9 @@ enum {</div><div class='ctx'> </div><div class='ctx'> /* Do not translate kernel bpf_arena pointers to user pointers */</div><div class='ctx'> 	BPF_F_NO_USER_CONV	= (1U &lt;&lt; 18),</div><div class='add'>+</div><div class='add'>+/* Enable BPF ringbuf overwrite mode */</div><div class='add'>+	BPF_F_RB_OVERWRITE	= (1U &lt;&lt; 19),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Flags for BPF_PROG_QUERY. */</div><div class='hunk'>@@ -1522,6 +1526,12 @@ union bpf_attr {</div><div class='ctx'> 		 * If provided, map_flags should have BPF_F_TOKEN_FD flag set.</div><div class='ctx'> 		 */</div><div class='ctx'> 		__s32	map_token_fd;</div><div class='add'>+</div><div class='add'>+		/* Hash of the program that has exclusive access to the map.</div><div class='add'>+		 */</div><div class='add'>+		__aligned_u64 excl_prog_hash;</div><div class='add'>+		/* Size of the passed excl_prog_hash. */</div><div class='add'>+		__u32 excl_prog_hash_size;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */</div><div class='hunk'>@@ -1605,6 +1615,16 @@ union bpf_attr {</div><div class='ctx'> 		 * continuous.</div><div class='ctx'> 		 */</div><div class='ctx'> 		__u32		fd_array_cnt;</div><div class='add'>+		/* Pointer to a buffer containing the signature of the BPF</div><div class='add'>+		 * program.</div><div class='add'>+		 */</div><div class='add'>+		__aligned_u64   signature;</div><div class='add'>+		/* Size of the signature buffer in bytes. */</div><div class='add'>+		__u32 		signature_size;</div><div class='add'>+		/* ID of the kernel keyring to be used for signature</div><div class='add'>+		 * verification.</div><div class='add'>+		 */</div><div class='add'>+		__s32		keyring_id;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	struct { /* anonymous struct used by BPF_OBJ_* commands */</div><div class='hunk'>@@ -4875,7 +4895,7 @@ union bpf_attr {</div><div class='ctx'>  *</div><div class='ctx'>  *		**-ENOENT** if the bpf_local_storage cannot be found.</div><div class='ctx'>  *</div><div class='del'>- * long bpf_d_path(struct path *path, char *buf, u32 sz)</div><div class='add'>+ * long bpf_d_path(const struct path *path, char *buf, u32 sz)</div><div class='ctx'>  *	Description</div><div class='ctx'>  *		Return full path for given **struct path** object, which</div><div class='ctx'>  *		needs to be the kernel BTF *path* object. The path is</div><div class='hunk'>@@ -5602,7 +5622,7 @@ union bpf_attr {</div><div class='ctx'>  *	Return</div><div class='ctx'>  *		*sk* if casting is valid, or **NULL** otherwise.</div><div class='ctx'>  *</div><div class='del'>- * long bpf_dynptr_from_mem(void *data, u32 size, u64 flags, struct bpf_dynptr *ptr)</div><div class='add'>+ * long bpf_dynptr_from_mem(void *data, u64 size, u64 flags, struct bpf_dynptr *ptr)</div><div class='ctx'>  *	Description</div><div class='ctx'>  *		Get a dynptr to local memory *data*.</div><div class='ctx'>  *</div><div class='hunk'>@@ -5645,7 +5665,7 @@ union bpf_attr {</div><div class='ctx'>  *	Return</div><div class='ctx'>  *		Nothing. Always succeeds.</div><div class='ctx'>  *</div><div class='del'>- * long bpf_dynptr_read(void *dst, u32 len, const struct bpf_dynptr *src, u32 offset, u64 flags)</div><div class='add'>+ * long bpf_dynptr_read(void *dst, u64 len, const struct bpf_dynptr *src, u64 offset, u64 flags)</div><div class='ctx'>  *	Description</div><div class='ctx'>  *		Read *len* bytes from *src* into *dst*, starting from *offset*</div><div class='ctx'>  *		into *src*.</div><div class='hunk'>@@ -5655,7 +5675,7 @@ union bpf_attr {</div><div class='ctx'>  *		of *src*'s data, -EINVAL if *src* is an invalid dynptr or if</div><div class='ctx'>  *		*flags* is not 0.</div><div class='ctx'>  *</div><div class='del'>- * long bpf_dynptr_write(const struct bpf_dynptr *dst, u32 offset, void *src, u32 len, u64 flags)</div><div class='add'>+ * long bpf_dynptr_write(const struct bpf_dynptr *dst, u64 offset, void *src, u64 len, u64 flags)</div><div class='ctx'>  *	Description</div><div class='ctx'>  *		Write *len* bytes from *src* into *dst*, starting from *offset*</div><div class='ctx'>  *		into *dst*.</div><div class='hunk'>@@ -5676,7 +5696,7 @@ union bpf_attr {</div><div class='ctx'>  *		is a read-only dynptr or if *flags* is not correct. For skb-type dynptrs,</div><div class='ctx'>  *		other errors correspond to errors returned by **bpf_skb_store_bytes**\ ().</div><div class='ctx'>  *</div><div class='del'>- * void *bpf_dynptr_data(const struct bpf_dynptr *ptr, u32 offset, u32 len)</div><div class='add'>+ * void *bpf_dynptr_data(const struct bpf_dynptr *ptr, u64 offset, u64 len)</div><div class='ctx'>  *	Description</div><div class='ctx'>  *		Get a pointer to the underlying dynptr data.</div><div class='ctx'>  *</div><div class='hunk'>@@ -6215,6 +6235,7 @@ enum {</div><div class='ctx'> 	BPF_RB_RING_SIZE = 1,</div><div class='ctx'> 	BPF_RB_CONS_POS = 2,</div><div class='ctx'> 	BPF_RB_PROD_POS = 3,</div><div class='add'>+	BPF_RB_OVERWRITE_POS = 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* BPF ring buffer constants */</div><div class='hunk'>@@ -6666,6 +6687,8 @@ struct bpf_map_info {</div><div class='ctx'> 	__u32 btf_value_type_id;</div><div class='ctx'> 	__u32 btf_vmlinux_id;</div><div class='ctx'> 	__u64 map_extra;</div><div class='add'>+	__aligned_u64 hash;</div><div class='add'>+	__u32 hash_size;</div><div class='ctx'> } __attribute__((aligned(8)));</div><div class='ctx'> </div><div class='ctx'> struct bpf_btf_info {</div><div class='hunk'>@@ -7182,6 +7205,7 @@ enum {</div><div class='ctx'> 	TCP_BPF_SYN_MAC         = 1007, /* Copy the MAC, IP[46], and TCP header */</div><div class='ctx'> 	TCP_BPF_SOCK_OPS_CB_FLAGS = 1008, /* Get or Set TCP sock ops flags */</div><div class='ctx'> 	SK_BPF_CB_FLAGS		= 1009, /* Get or set sock ops flags in socket */</div><div class='add'>+	SK_BPF_BYPASS_PROT_MEM	= 1010, /* Get or Set sk-&gt;sk_bypass_prot_mem */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -7418,6 +7442,10 @@ struct bpf_timer {</div><div class='ctx'> 	__u64 __opaque[2];</div><div class='ctx'> } __attribute__((aligned(8)));</div><div class='ctx'> </div><div class='add'>+struct bpf_task_work {</div><div class='add'>+	__u64 __opaque;</div><div class='add'>+} __attribute__((aligned(8)));</div><div class='add'>+</div><div class='ctx'> struct bpf_wq {</div><div class='ctx'> 	__u64 __opaque[2];</div><div class='ctx'> } __attribute__((aligned(8)));</div><div class='hunk'>@@ -7623,4 +7651,24 @@ enum bpf_kfunc_flags {</div><div class='ctx'> 	BPF_F_PAD_ZEROS = (1ULL &lt;&lt; 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Values of a BPF_MAP_TYPE_INSN_ARRAY entry must be of this type.</div><div class='add'>+ *</div><div class='add'>+ * Before the map is used the orig_off field should point to an</div><div class='add'>+ * instruction inside the program being loaded. The other fields</div><div class='add'>+ * must be set to 0.</div><div class='add'>+ *</div><div class='add'>+ * After the program is loaded, the xlated_off will be adjusted</div><div class='add'>+ * by the verifier to point to the index of the original instruction</div><div class='add'>+ * in the xlated program. If the instruction is deleted, it will</div><div class='add'>+ * be set to (u32)-1. The jitted_off will be set to the corresponding</div><div class='add'>+ * offset in the jitted image of the program.</div><div class='add'>+ */</div><div class='add'>+struct bpf_insn_array_value {</div><div class='add'>+	__u32 orig_off;</div><div class='add'>+	__u32 xlated_off;</div><div class='add'>+	__u32 jitted_off;</div><div class='add'>+	__u32 :32;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* _UAPI__LINUX_BPF_H__ */</div><div class='head'>diff --git a/tools/include/uapi/linux/genetlink.h b/tools/include/uapi/linux/genetlink.h<br/>new file mode 100644<br/>index 000000000000..ddba3ca01e39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/genetlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/genetlink.h</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI__LINUX_GENERIC_NETLINK_H</div><div class='add'>+#define _UAPI__LINUX_GENERIC_NETLINK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define GENL_NAMSIZ	16	/* length of family name */</div><div class='add'>+</div><div class='add'>+#define GENL_MIN_ID	NLMSG_MIN_TYPE</div><div class='add'>+#define GENL_MAX_ID	1023</div><div class='add'>+</div><div class='add'>+struct genlmsghdr {</div><div class='add'>+	__u8	cmd;</div><div class='add'>+	__u8	version;</div><div class='add'>+	__u16	reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define GENL_HDRLEN	NLMSG_ALIGN(sizeof(struct genlmsghdr))</div><div class='add'>+</div><div class='add'>+#define GENL_ADMIN_PERM		0x01</div><div class='add'>+#define GENL_CMD_CAP_DO		0x02</div><div class='add'>+#define GENL_CMD_CAP_DUMP	0x04</div><div class='add'>+#define GENL_CMD_CAP_HASPOL	0x08</div><div class='add'>+#define GENL_UNS_ADMIN_PERM	0x10</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * List of reserved static generic netlink identifiers:</div><div class='add'>+ */</div><div class='add'>+#define GENL_ID_CTRL		NLMSG_MIN_TYPE</div><div class='add'>+#define GENL_ID_VFS_DQUOT	(NLMSG_MIN_TYPE + 1)</div><div class='add'>+#define GENL_ID_PMCRAID		(NLMSG_MIN_TYPE + 2)</div><div class='add'>+/* must be last reserved + 1 */</div><div class='add'>+#define GENL_START_ALLOC	(NLMSG_MIN_TYPE + 3)</div><div class='add'>+</div><div class='add'>+/**************************************************************************</div><div class='add'>+ * Controller</div><div class='add'>+ **************************************************************************/</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CTRL_CMD_UNSPEC,</div><div class='add'>+	CTRL_CMD_NEWFAMILY,</div><div class='add'>+	CTRL_CMD_DELFAMILY,</div><div class='add'>+	CTRL_CMD_GETFAMILY,</div><div class='add'>+	CTRL_CMD_NEWOPS,</div><div class='add'>+	CTRL_CMD_DELOPS,</div><div class='add'>+	CTRL_CMD_GETOPS,</div><div class='add'>+	CTRL_CMD_NEWMCAST_GRP,</div><div class='add'>+	CTRL_CMD_DELMCAST_GRP,</div><div class='add'>+	CTRL_CMD_GETMCAST_GRP, /* unused */</div><div class='add'>+	CTRL_CMD_GETPOLICY,</div><div class='add'>+	__CTRL_CMD_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CTRL_CMD_MAX (__CTRL_CMD_MAX - 1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CTRL_ATTR_UNSPEC,</div><div class='add'>+	CTRL_ATTR_FAMILY_ID,</div><div class='add'>+	CTRL_ATTR_FAMILY_NAME,</div><div class='add'>+	CTRL_ATTR_VERSION,</div><div class='add'>+	CTRL_ATTR_HDRSIZE,</div><div class='add'>+	CTRL_ATTR_MAXATTR,</div><div class='add'>+	CTRL_ATTR_OPS,</div><div class='add'>+	CTRL_ATTR_MCAST_GROUPS,</div><div class='add'>+	CTRL_ATTR_POLICY,</div><div class='add'>+	CTRL_ATTR_OP_POLICY,</div><div class='add'>+	CTRL_ATTR_OP,</div><div class='add'>+	__CTRL_ATTR_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CTRL_ATTR_MAX (__CTRL_ATTR_MAX - 1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CTRL_ATTR_OP_UNSPEC,</div><div class='add'>+	CTRL_ATTR_OP_ID,</div><div class='add'>+	CTRL_ATTR_OP_FLAGS,</div><div class='add'>+	__CTRL_ATTR_OP_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CTRL_ATTR_OP_MAX (__CTRL_ATTR_OP_MAX - 1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CTRL_ATTR_MCAST_GRP_UNSPEC,</div><div class='add'>+	CTRL_ATTR_MCAST_GRP_NAME,</div><div class='add'>+	CTRL_ATTR_MCAST_GRP_ID,</div><div class='add'>+	__CTRL_ATTR_MCAST_GRP_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CTRL_ATTR_MCAST_GRP_MAX (__CTRL_ATTR_MCAST_GRP_MAX - 1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CTRL_ATTR_POLICY_UNSPEC,</div><div class='add'>+	CTRL_ATTR_POLICY_DO,</div><div class='add'>+	CTRL_ATTR_POLICY_DUMP,</div><div class='add'>+</div><div class='add'>+	__CTRL_ATTR_POLICY_DUMP_MAX,</div><div class='add'>+	CTRL_ATTR_POLICY_DUMP_MAX = __CTRL_ATTR_POLICY_DUMP_MAX - 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CTRL_ATTR_POLICY_MAX (__CTRL_ATTR_POLICY_DUMP_MAX - 1)</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI__LINUX_GENERIC_NETLINK_H */</div><div class='head'>diff --git a/tools/include/uapi/linux/if_addr.h b/tools/include/uapi/linux/if_addr.h<br/>new file mode 100644<br/>index 000000000000..aa7958b4e41d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/if_addr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/if_addr.h</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI__LINUX_IF_ADDR_H</div><div class='add'>+#define _UAPI__LINUX_IF_ADDR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+struct ifaddrmsg {</div><div class='add'>+	__u8		ifa_family;</div><div class='add'>+	__u8		ifa_prefixlen;	/* The prefix length		*/</div><div class='add'>+	__u8		ifa_flags;	/* Flags			*/</div><div class='add'>+	__u8		ifa_scope;	/* Address scope		*/</div><div class='add'>+	__u32		ifa_index;	/* Link index			*/</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Important comment:</div><div class='add'>+ * IFA_ADDRESS is prefix address, rather than local interface address.</div><div class='add'>+ * It makes no difference for normally configured broadcast interfaces,</div><div class='add'>+ * but for point-to-point IFA_ADDRESS is DESTINATION address,</div><div class='add'>+ * local address is supplied in IFA_LOCAL attribute.</div><div class='add'>+ *</div><div class='add'>+ * IFA_FLAGS is a u32 attribute that extends the u8 field ifa_flags.</div><div class='add'>+ * If present, the value from struct ifaddrmsg will be ignored.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	IFA_UNSPEC,</div><div class='add'>+	IFA_ADDRESS,</div><div class='add'>+	IFA_LOCAL,</div><div class='add'>+	IFA_LABEL,</div><div class='add'>+	IFA_BROADCAST,</div><div class='add'>+	IFA_ANYCAST,</div><div class='add'>+	IFA_CACHEINFO,</div><div class='add'>+	IFA_MULTICAST,</div><div class='add'>+	IFA_FLAGS,</div><div class='add'>+	IFA_RT_PRIORITY,	/* u32, priority/metric for prefix route */</div><div class='add'>+	IFA_TARGET_NETNSID,</div><div class='add'>+	IFA_PROTO,		/* u8, address protocol */</div><div class='add'>+	__IFA_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IFA_MAX (__IFA_MAX - 1)</div><div class='add'>+</div><div class='add'>+/* ifa_flags */</div><div class='add'>+#define IFA_F_SECONDARY		0x01</div><div class='add'>+#define IFA_F_TEMPORARY		IFA_F_SECONDARY</div><div class='add'>+</div><div class='add'>+#define	IFA_F_NODAD		0x02</div><div class='add'>+#define IFA_F_OPTIMISTIC	0x04</div><div class='add'>+#define IFA_F_DADFAILED		0x08</div><div class='add'>+#define	IFA_F_HOMEADDRESS	0x10</div><div class='add'>+#define IFA_F_DEPRECATED	0x20</div><div class='add'>+#define IFA_F_TENTATIVE		0x40</div><div class='add'>+#define IFA_F_PERMANENT		0x80</div><div class='add'>+#define IFA_F_MANAGETEMPADDR	0x100</div><div class='add'>+#define IFA_F_NOPREFIXROUTE	0x200</div><div class='add'>+#define IFA_F_MCAUTOJOIN	0x400</div><div class='add'>+#define IFA_F_STABLE_PRIVACY	0x800</div><div class='add'>+</div><div class='add'>+struct ifa_cacheinfo {</div><div class='add'>+	__u32	ifa_prefered;</div><div class='add'>+	__u32	ifa_valid;</div><div class='add'>+	__u32	cstamp; /* created timestamp, hundredths of seconds */</div><div class='add'>+	__u32	tstamp; /* updated timestamp, hundredths of seconds */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* backwards compatibility for userspace */</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+#define IFA_RTA(r)  ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct ifaddrmsg))))</div><div class='add'>+#define IFA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct ifaddrmsg))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* ifa_proto */</div><div class='add'>+#define IFAPROT_UNSPEC		0</div><div class='add'>+#define IFAPROT_KERNEL_LO	1	/* loopback */</div><div class='add'>+#define IFAPROT_KERNEL_RA	2	/* set by kernel from router announcement */</div><div class='add'>+#define IFAPROT_KERNEL_LL	3	/* link-local set by kernel */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/tools/include/uapi/linux/kvm.h b/tools/include/uapi/linux/kvm.h<br/>index 7415a3863891..52f6000ab020 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/kvm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/kvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/kvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/kvm.h</a></div><div class='hunk'>@@ -178,6 +178,7 @@ struct kvm_xen_exit {</div><div class='ctx'> #define KVM_EXIT_NOTIFY           37</div><div class='ctx'> #define KVM_EXIT_LOONGARCH_IOCSR  38</div><div class='ctx'> #define KVM_EXIT_MEMORY_FAULT     39</div><div class='add'>+#define KVM_EXIT_TDX              40</div><div class='ctx'> </div><div class='ctx'> /* For KVM_EXIT_INTERNAL_ERROR */</div><div class='ctx'> /* Emulate instruction failed. */</div><div class='hunk'>@@ -447,6 +448,31 @@ struct kvm_run {</div><div class='ctx'> 			__u64 gpa;</div><div class='ctx'> 			__u64 size;</div><div class='ctx'> 		} memory_fault;</div><div class='add'>+		/* KVM_EXIT_TDX */</div><div class='add'>+		struct {</div><div class='add'>+			__u64 flags;</div><div class='add'>+			__u64 nr;</div><div class='add'>+			union {</div><div class='add'>+				struct {</div><div class='add'>+					__u64 ret;</div><div class='add'>+					__u64 data[5];</div><div class='add'>+				} unknown;</div><div class='add'>+				struct {</div><div class='add'>+					__u64 ret;</div><div class='add'>+					__u64 gpa;</div><div class='add'>+					__u64 size;</div><div class='add'>+				} get_quote;</div><div class='add'>+				struct {</div><div class='add'>+					__u64 ret;</div><div class='add'>+					__u64 leaf;</div><div class='add'>+					__u64 r11, r12, r13, r14;</div><div class='add'>+				} get_tdvmcall_info;</div><div class='add'>+				struct {</div><div class='add'>+					__u64 ret;</div><div class='add'>+					__u64 vector;</div><div class='add'>+				} setup_event_notify;</div><div class='add'>+			};</div><div class='add'>+		} tdx;</div><div class='ctx'> 		/* Fix the size of the union. */</div><div class='ctx'> 		char padding[256];</div><div class='ctx'> 	};</div><div class='hunk'>@@ -935,6 +961,8 @@ struct kvm_enable_cap {</div><div class='ctx'> #define KVM_CAP_ARM_EL2 240</div><div class='ctx'> #define KVM_CAP_ARM_EL2_E2H0 241</div><div class='ctx'> #define KVM_CAP_RISCV_MP_STATE_RESET 242</div><div class='add'>+#define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243</div><div class='add'>+#define KVM_CAP_GUEST_MEMFD_FLAGS 244</div><div class='ctx'> </div><div class='ctx'> struct kvm_irq_routing_irqchip {</div><div class='ctx'> 	__u32 irqchip;</div><div class='hunk'>@@ -1571,6 +1599,8 @@ struct kvm_memory_attributes {</div><div class='ctx'> #define KVM_MEMORY_ATTRIBUTE_PRIVATE           (1ULL &lt;&lt; 3)</div><div class='ctx'> </div><div class='ctx'> #define KVM_CREATE_GUEST_MEMFD	_IOWR(KVMIO,  0xd4, struct kvm_create_guest_memfd)</div><div class='add'>+#define GUEST_MEMFD_FLAG_MMAP		(1ULL &lt;&lt; 0)</div><div class='add'>+#define GUEST_MEMFD_FLAG_INIT_SHARED	(1ULL &lt;&lt; 1)</div><div class='ctx'> </div><div class='ctx'> struct kvm_create_guest_memfd {</div><div class='ctx'> 	__u64 size;</div><div class='head'>diff --git a/tools/include/uapi/linux/neighbour.h b/tools/include/uapi/linux/neighbour.h<br/>new file mode 100644<br/>index 000000000000..c34a81245f87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/neighbour.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/neighbour.h</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI__LINUX_NEIGHBOUR_H</div><div class='add'>+#define _UAPI__LINUX_NEIGHBOUR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+struct ndmsg {</div><div class='add'>+	__u8		ndm_family;</div><div class='add'>+	__u8		ndm_pad1;</div><div class='add'>+	__u16		ndm_pad2;</div><div class='add'>+	__s32		ndm_ifindex;</div><div class='add'>+	__u16		ndm_state;</div><div class='add'>+	__u8		ndm_flags;</div><div class='add'>+	__u8		ndm_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NDA_UNSPEC,</div><div class='add'>+	NDA_DST,</div><div class='add'>+	NDA_LLADDR,</div><div class='add'>+	NDA_CACHEINFO,</div><div class='add'>+	NDA_PROBES,</div><div class='add'>+	NDA_VLAN,</div><div class='add'>+	NDA_PORT,</div><div class='add'>+	NDA_VNI,</div><div class='add'>+	NDA_IFINDEX,</div><div class='add'>+	NDA_MASTER,</div><div class='add'>+	NDA_LINK_NETNSID,</div><div class='add'>+	NDA_SRC_VNI,</div><div class='add'>+	NDA_PROTOCOL,  /* Originator of entry */</div><div class='add'>+	NDA_NH_ID,</div><div class='add'>+	NDA_FDB_EXT_ATTRS,</div><div class='add'>+	NDA_FLAGS_EXT,</div><div class='add'>+	NDA_NDM_STATE_MASK,</div><div class='add'>+	NDA_NDM_FLAGS_MASK,</div><div class='add'>+	__NDA_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NDA_MAX (__NDA_MAX - 1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Neighbor Cache Entry Flags</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define NTF_USE		(1 &lt;&lt; 0)</div><div class='add'>+#define NTF_SELF	(1 &lt;&lt; 1)</div><div class='add'>+#define NTF_MASTER	(1 &lt;&lt; 2)</div><div class='add'>+#define NTF_PROXY	(1 &lt;&lt; 3)	/* == ATF_PUBL */</div><div class='add'>+#define NTF_EXT_LEARNED	(1 &lt;&lt; 4)</div><div class='add'>+#define NTF_OFFLOADED   (1 &lt;&lt; 5)</div><div class='add'>+#define NTF_STICKY	(1 &lt;&lt; 6)</div><div class='add'>+#define NTF_ROUTER	(1 &lt;&lt; 7)</div><div class='add'>+/* Extended flags under NDA_FLAGS_EXT: */</div><div class='add'>+#define NTF_EXT_MANAGED		(1 &lt;&lt; 0)</div><div class='add'>+#define NTF_EXT_LOCKED		(1 &lt;&lt; 1)</div><div class='add'>+#define NTF_EXT_EXT_VALIDATED	(1 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Neighbor Cache Entry States.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define NUD_INCOMPLETE	0x01</div><div class='add'>+#define NUD_REACHABLE	0x02</div><div class='add'>+#define NUD_STALE	0x04</div><div class='add'>+#define NUD_DELAY	0x08</div><div class='add'>+#define NUD_PROBE	0x10</div><div class='add'>+#define NUD_FAILED	0x20</div><div class='add'>+</div><div class='add'>+/* Dummy states */</div><div class='add'>+#define NUD_NOARP	0x40</div><div class='add'>+#define NUD_PERMANENT	0x80</div><div class='add'>+#define NUD_NONE	0x00</div><div class='add'>+</div><div class='add'>+/* NUD_NOARP &amp; NUD_PERMANENT are pseudostates, they never change and make no</div><div class='add'>+ * address resolution or NUD.</div><div class='add'>+ *</div><div class='add'>+ * NUD_PERMANENT also cannot be deleted by garbage collectors. This holds true</div><div class='add'>+ * for dynamic entries with NTF_EXT_LEARNED flag as well. However, upon carrier</div><div class='add'>+ * down event, NUD_PERMANENT entries are not flushed whereas NTF_EXT_LEARNED</div><div class='add'>+ * flagged entries explicitly are (which is also consistent with the routing</div><div class='add'>+ * subsystem).</div><div class='add'>+ *</div><div class='add'>+ * When NTF_EXT_LEARNED is set for a bridge fdb entry the different cache entry</div><div class='add'>+ * states don't make sense and thus are ignored. Such entries don't age and</div><div class='add'>+ * can roam.</div><div class='add'>+ *</div><div class='add'>+ * NTF_EXT_MANAGED flagged neigbor entries are managed by the kernel on behalf</div><div class='add'>+ * of a user space control plane, and automatically refreshed so that (if</div><div class='add'>+ * possible) they remain in NUD_REACHABLE state.</div><div class='add'>+ *</div><div class='add'>+ * NTF_EXT_LOCKED flagged bridge FDB entries are entries generated by the</div><div class='add'>+ * bridge in response to a host trying to communicate via a locked bridge port</div><div class='add'>+ * with MAB enabled. Their purpose is to notify user space that a host requires</div><div class='add'>+ * authentication.</div><div class='add'>+ *</div><div class='add'>+ * NTF_EXT_EXT_VALIDATED flagged neighbor entries were externally validated by</div><div class='add'>+ * a user space control plane. The kernel will not remove or invalidate them,</div><div class='add'>+ * but it can probe them and notify user space when they become reachable.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct nda_cacheinfo {</div><div class='add'>+	__u32		ndm_confirmed;</div><div class='add'>+	__u32		ndm_used;</div><div class='add'>+	__u32		ndm_updated;</div><div class='add'>+	__u32		ndm_refcnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*****************************************************************</div><div class='add'>+ *		Neighbour tables specific messages.</div><div class='add'>+ *</div><div class='add'>+ * To retrieve the neighbour tables send RTM_GETNEIGHTBL with the</div><div class='add'>+ * NLM_F_DUMP flag set. Every neighbour table configuration is</div><div class='add'>+ * spread over multiple messages to avoid running into message</div><div class='add'>+ * size limits on systems with many interfaces. The first message</div><div class='add'>+ * in the sequence transports all not device specific data such as</div><div class='add'>+ * statistics, configuration, and the default parameter set.</div><div class='add'>+ * This message is followed by 0..n messages carrying device</div><div class='add'>+ * specific parameter sets.</div><div class='add'>+ * Although the ordering should be sufficient, NDTA_NAME can be</div><div class='add'>+ * used to identify sequences. The initial message can be identified</div><div class='add'>+ * by checking for NDTA_CONFIG. The device specific messages do</div><div class='add'>+ * not contain this TLV but have NDTPA_IFINDEX set to the</div><div class='add'>+ * corresponding interface index.</div><div class='add'>+ *</div><div class='add'>+ * To change neighbour table attributes, send RTM_SETNEIGHTBL</div><div class='add'>+ * with NDTA_NAME set. Changeable attribute include NDTA_THRESH[1-3],</div><div class='add'>+ * NDTA_GC_INTERVAL, and all TLVs in NDTA_PARMS unless marked</div><div class='add'>+ * otherwise. Device specific parameter sets can be changed by</div><div class='add'>+ * setting NDTPA_IFINDEX to the interface index of the corresponding</div><div class='add'>+ * device.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct ndt_stats {</div><div class='add'>+	__u64		ndts_allocs;</div><div class='add'>+	__u64		ndts_destroys;</div><div class='add'>+	__u64		ndts_hash_grows;</div><div class='add'>+	__u64		ndts_res_failed;</div><div class='add'>+	__u64		ndts_lookups;</div><div class='add'>+	__u64		ndts_hits;</div><div class='add'>+	__u64		ndts_rcv_probes_mcast;</div><div class='add'>+	__u64		ndts_rcv_probes_ucast;</div><div class='add'>+	__u64		ndts_periodic_gc_runs;</div><div class='add'>+	__u64		ndts_forced_gc_runs;</div><div class='add'>+	__u64		ndts_table_fulls;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NDTPA_UNSPEC,</div><div class='add'>+	NDTPA_IFINDEX,			/* u32, unchangeable */</div><div class='add'>+	NDTPA_REFCNT,			/* u32, read-only */</div><div class='add'>+	NDTPA_REACHABLE_TIME,		/* u64, read-only, msecs */</div><div class='add'>+	NDTPA_BASE_REACHABLE_TIME,	/* u64, msecs */</div><div class='add'>+	NDTPA_RETRANS_TIME,		/* u64, msecs */</div><div class='add'>+	NDTPA_GC_STALETIME,		/* u64, msecs */</div><div class='add'>+	NDTPA_DELAY_PROBE_TIME,		/* u64, msecs */</div><div class='add'>+	NDTPA_QUEUE_LEN,		/* u32 */</div><div class='add'>+	NDTPA_APP_PROBES,		/* u32 */</div><div class='add'>+	NDTPA_UCAST_PROBES,		/* u32 */</div><div class='add'>+	NDTPA_MCAST_PROBES,		/* u32 */</div><div class='add'>+	NDTPA_ANYCAST_DELAY,		/* u64, msecs */</div><div class='add'>+	NDTPA_PROXY_DELAY,		/* u64, msecs */</div><div class='add'>+	NDTPA_PROXY_QLEN,		/* u32 */</div><div class='add'>+	NDTPA_LOCKTIME,			/* u64, msecs */</div><div class='add'>+	NDTPA_QUEUE_LENBYTES,		/* u32 */</div><div class='add'>+	NDTPA_MCAST_REPROBES,		/* u32 */</div><div class='add'>+	NDTPA_PAD,</div><div class='add'>+	NDTPA_INTERVAL_PROBE_TIME_MS,	/* u64, msecs */</div><div class='add'>+	__NDTPA_MAX</div><div class='add'>+};</div><div class='add'>+#define NDTPA_MAX (__NDTPA_MAX - 1)</div><div class='add'>+</div><div class='add'>+struct ndtmsg {</div><div class='add'>+	__u8		ndtm_family;</div><div class='add'>+	__u8		ndtm_pad1;</div><div class='add'>+	__u16		ndtm_pad2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ndt_config {</div><div class='add'>+	__u16		ndtc_key_len;</div><div class='add'>+	__u16		ndtc_entry_size;</div><div class='add'>+	__u32		ndtc_entries;</div><div class='add'>+	__u32		ndtc_last_flush;	/* delta to now in msecs */</div><div class='add'>+	__u32		ndtc_last_rand;		/* delta to now in msecs */</div><div class='add'>+	__u32		ndtc_hash_rnd;</div><div class='add'>+	__u32		ndtc_hash_mask;</div><div class='add'>+	__u32		ndtc_hash_chain_gc;</div><div class='add'>+	__u32		ndtc_proxy_qlen;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NDTA_UNSPEC,</div><div class='add'>+	NDTA_NAME,			/* char *, unchangeable */</div><div class='add'>+	NDTA_THRESH1,			/* u32 */</div><div class='add'>+	NDTA_THRESH2,			/* u32 */</div><div class='add'>+	NDTA_THRESH3,			/* u32 */</div><div class='add'>+	NDTA_CONFIG,			/* struct ndt_config, read-only */</div><div class='add'>+	NDTA_PARMS,			/* nested TLV NDTPA_* */</div><div class='add'>+	NDTA_STATS,			/* struct ndt_stats, read-only */</div><div class='add'>+	NDTA_GC_INTERVAL,		/* u64, msecs */</div><div class='add'>+	NDTA_PAD,</div><div class='add'>+	__NDTA_MAX</div><div class='add'>+};</div><div class='add'>+#define NDTA_MAX (__NDTA_MAX - 1)</div><div class='add'>+</div><div class='add'>+ /* FDB activity notification bits used in NFEA_ACTIVITY_NOTIFY:</div><div class='add'>+  * - FDB_NOTIFY_BIT - notify on activity/expire for any entry</div><div class='add'>+  * - FDB_NOTIFY_INACTIVE_BIT - mark as inactive to avoid multiple notifications</div><div class='add'>+  */</div><div class='add'>+enum {</div><div class='add'>+	FDB_NOTIFY_BIT		= (1 &lt;&lt; 0),</div><div class='add'>+	FDB_NOTIFY_INACTIVE_BIT	= (1 &lt;&lt; 1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* embedded into NDA_FDB_EXT_ATTRS:</div><div class='add'>+ * [NDA_FDB_EXT_ATTRS] = {</div><div class='add'>+ *     [NFEA_ACTIVITY_NOTIFY]</div><div class='add'>+ *     ...</div><div class='add'>+ * }</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	NFEA_UNSPEC,</div><div class='add'>+	NFEA_ACTIVITY_NOTIFY,</div><div class='add'>+	NFEA_DONT_REFRESH,</div><div class='add'>+	__NFEA_MAX</div><div class='add'>+};</div><div class='add'>+#define NFEA_MAX (__NFEA_MAX - 1)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/tools/include/uapi/linux/netdev.h b/tools/include/uapi/linux/netdev.h<br/>index 48eb49aa03d4..e0b579a1df4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/netdev.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/netdev.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/netdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/netdev.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Do not edit directly, auto-generated from: */</div><div class='ctx'> /*	Documentation/netlink/specs/netdev.yaml */</div><div class='ctx'> /* YNL-GEN uapi header */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='ctx'> </div><div class='ctx'> #ifndef _UAPI_LINUX_NETDEV_H</div><div class='ctx'> #define _UAPI_LINUX_NETDEV_H</div><div class='hunk'>@@ -80,6 +81,7 @@ enum netdev_qstats_scope {</div><div class='ctx'> enum netdev_napi_threaded {</div><div class='ctx'> 	NETDEV_NAPI_THREADED_DISABLED,</div><div class='ctx'> 	NETDEV_NAPI_THREADED_ENABLED,</div><div class='add'>+	NETDEV_NAPI_THREADED_BUSY_POLL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='head'>diff --git a/tools/include/uapi/linux/netfilter.h b/tools/include/uapi/linux/netfilter.h<br/>new file mode 100644<br/>index 000000000000..5a79ccb76701<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/netfilter.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/netfilter.h</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI__LINUX_NETFILTER_H</div><div class='add'>+#define _UAPI__LINUX_NETFILTER_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/in6.h&gt;</div><div class='add'>+</div><div class='add'>+/* Responses from hook functions. */</div><div class='add'>+#define NF_DROP 0</div><div class='add'>+#define NF_ACCEPT 1</div><div class='add'>+#define NF_STOLEN 2</div><div class='add'>+#define NF_QUEUE 3</div><div class='add'>+#define NF_REPEAT 4</div><div class='add'>+#define NF_STOP 5	/* Deprecated, for userspace nf_queue compatibility. */</div><div class='add'>+#define NF_MAX_VERDICT NF_STOP</div><div class='add'>+</div><div class='add'>+/* we overload the higher bits for encoding auxiliary data such as the queue</div><div class='add'>+ * number or errno values. Not nice, but better than additional function</div><div class='add'>+ * arguments. */</div><div class='add'>+#define NF_VERDICT_MASK 0x000000ff</div><div class='add'>+</div><div class='add'>+/* extra verdict flags have mask 0x0000ff00 */</div><div class='add'>+#define NF_VERDICT_FLAG_QUEUE_BYPASS	0x00008000</div><div class='add'>+</div><div class='add'>+/* queue number (NF_QUEUE) or errno (NF_DROP) */</div><div class='add'>+#define NF_VERDICT_QMASK 0xffff0000</div><div class='add'>+#define NF_VERDICT_QBITS 16</div><div class='add'>+</div><div class='add'>+#define NF_QUEUE_NR(x) ((((x) &lt;&lt; 16) &amp; NF_VERDICT_QMASK) | NF_QUEUE)</div><div class='add'>+</div><div class='add'>+#define NF_DROP_ERR(x) (((-x) &lt;&lt; 16) | NF_DROP)</div><div class='add'>+</div><div class='add'>+/* only for userspace compatibility */</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+</div><div class='add'>+/* NF_VERDICT_BITS should be 8 now, but userspace might break if this changes */</div><div class='add'>+#define NF_VERDICT_BITS 16</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+enum nf_inet_hooks {</div><div class='add'>+	NF_INET_PRE_ROUTING,</div><div class='add'>+	NF_INET_LOCAL_IN,</div><div class='add'>+	NF_INET_FORWARD,</div><div class='add'>+	NF_INET_LOCAL_OUT,</div><div class='add'>+	NF_INET_POST_ROUTING,</div><div class='add'>+	NF_INET_NUMHOOKS,</div><div class='add'>+	NF_INET_INGRESS = NF_INET_NUMHOOKS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum nf_dev_hooks {</div><div class='add'>+	NF_NETDEV_INGRESS,</div><div class='add'>+	NF_NETDEV_EGRESS,</div><div class='add'>+	NF_NETDEV_NUMHOOKS</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NFPROTO_UNSPEC =  0,</div><div class='add'>+	NFPROTO_INET   =  1,</div><div class='add'>+	NFPROTO_IPV4   =  2,</div><div class='add'>+	NFPROTO_ARP    =  3,</div><div class='add'>+	NFPROTO_NETDEV =  5,</div><div class='add'>+	NFPROTO_BRIDGE =  7,</div><div class='add'>+	NFPROTO_IPV6   = 10,</div><div class='add'>+#ifndef __KERNEL__ /* no longer supported by kernel */</div><div class='add'>+	NFPROTO_DECNET = 12,</div><div class='add'>+#endif</div><div class='add'>+	NFPROTO_NUMPROTO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union nf_inet_addr {</div><div class='add'>+	__u32		all[4];</div><div class='add'>+	__be32		ip;</div><div class='add'>+	__be32		ip6[4];</div><div class='add'>+	struct in_addr	in;</div><div class='add'>+	struct in6_addr	in6;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI__LINUX_NETFILTER_H */</div><div class='head'>diff --git a/tools/include/uapi/linux/netfilter_arp.h b/tools/include/uapi/linux/netfilter_arp.h<br/>new file mode 100644<br/>index 000000000000..791dfc5ae907<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/netfilter_arp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/netfilter_arp.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */</div><div class='add'>+#ifndef __LINUX_ARP_NETFILTER_H</div><div class='add'>+#define __LINUX_ARP_NETFILTER_H</div><div class='add'>+</div><div class='add'>+/* ARP-specific defines for netfilter.</div><div class='add'>+ * (C)2002 Rusty Russell IBM -- This code is GPL.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netfilter.h&gt;</div><div class='add'>+</div><div class='add'>+/* There is no PF_ARP. */</div><div class='add'>+#define NF_ARP		0</div><div class='add'>+</div><div class='add'>+/* ARP Hooks */</div><div class='add'>+#define NF_ARP_IN	0</div><div class='add'>+#define NF_ARP_OUT	1</div><div class='add'>+#define NF_ARP_FORWARD	2</div><div class='add'>+</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+#define NF_ARP_NUMHOOKS	3</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __LINUX_ARP_NETFILTER_H */</div><div class='head'>diff --git a/tools/include/uapi/linux/nsfs.h b/tools/include/uapi/linux/nsfs.h<br/>index 34127653fd00..a25e38d1c874 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/nsfs.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/nsfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/nsfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/nsfs.h</a></div><div class='hunk'>@@ -16,8 +16,6 @@</div><div class='ctx'> #define NS_GET_NSTYPE		_IO(NSIO, 0x3)</div><div class='ctx'> /* Get owner UID (in the caller's user namespace) for a user namespace */</div><div class='ctx'> #define NS_GET_OWNER_UID	_IO(NSIO, 0x4)</div><div class='del'>-/* Get the id for a mount namespace */</div><div class='del'>-#define NS_GET_MNTNS_ID		_IOR(NSIO, 0x5, __u64)</div><div class='ctx'> /* Translate pid from target pid namespace into the caller's pid namespace. */</div><div class='ctx'> #define NS_GET_PID_FROM_PIDNS	_IOR(NSIO, 0x6, int)</div><div class='ctx'> /* Return thread-group leader id of pid in the callers pid namespace. */</div><div class='hunk'>@@ -42,4 +40,89 @@ struct mnt_ns_info {</div><div class='ctx'> /* Get previous namespace. */</div><div class='ctx'> #define NS_MNT_GET_PREV		_IOR(NSIO, 12, struct mnt_ns_info)</div><div class='ctx'> </div><div class='add'>+/* Retrieve namespace identifiers. */</div><div class='add'>+#define NS_GET_MNTNS_ID		_IOR(NSIO, 5,  __u64)</div><div class='add'>+#define NS_GET_ID		_IOR(NSIO, 13, __u64)</div><div class='add'>+</div><div class='add'>+enum init_ns_ino {</div><div class='add'>+	IPC_NS_INIT_INO		= 0xEFFFFFFFU,</div><div class='add'>+	UTS_NS_INIT_INO		= 0xEFFFFFFEU,</div><div class='add'>+	USER_NS_INIT_INO	= 0xEFFFFFFDU,</div><div class='add'>+	PID_NS_INIT_INO		= 0xEFFFFFFCU,</div><div class='add'>+	CGROUP_NS_INIT_INO	= 0xEFFFFFFBU,</div><div class='add'>+	TIME_NS_INIT_INO	= 0xEFFFFFFAU,</div><div class='add'>+	NET_NS_INIT_INO		= 0xEFFFFFF9U,</div><div class='add'>+	MNT_NS_INIT_INO		= 0xEFFFFFF8U,</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+	MNT_NS_ANON_INO		= 0xEFFFFFF7U,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nsfs_file_handle {</div><div class='add'>+	__u64 ns_id;</div><div class='add'>+	__u32 ns_type;</div><div class='add'>+	__u32 ns_inum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NSFS_FILE_HANDLE_SIZE_VER0 16 /* sizeof first published struct */</div><div class='add'>+#define NSFS_FILE_HANDLE_SIZE_LATEST sizeof(struct nsfs_file_handle) /* sizeof latest published struct */</div><div class='add'>+</div><div class='add'>+enum init_ns_id {</div><div class='add'>+	IPC_NS_INIT_ID		= 1ULL,</div><div class='add'>+	UTS_NS_INIT_ID		= 2ULL,</div><div class='add'>+	USER_NS_INIT_ID		= 3ULL,</div><div class='add'>+	PID_NS_INIT_ID		= 4ULL,</div><div class='add'>+	CGROUP_NS_INIT_ID	= 5ULL,</div><div class='add'>+	TIME_NS_INIT_ID		= 6ULL,</div><div class='add'>+	NET_NS_INIT_ID		= 7ULL,</div><div class='add'>+	MNT_NS_INIT_ID		= 8ULL,</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+	NS_LAST_INIT_ID		= MNT_NS_INIT_ID,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ns_type {</div><div class='add'>+	TIME_NS    = (1ULL &lt;&lt; 7),  /* CLONE_NEWTIME */</div><div class='add'>+	MNT_NS     = (1ULL &lt;&lt; 17), /* CLONE_NEWNS */</div><div class='add'>+	CGROUP_NS  = (1ULL &lt;&lt; 25), /* CLONE_NEWCGROUP */</div><div class='add'>+	UTS_NS     = (1ULL &lt;&lt; 26), /* CLONE_NEWUTS */</div><div class='add'>+	IPC_NS     = (1ULL &lt;&lt; 27), /* CLONE_NEWIPC */</div><div class='add'>+	USER_NS    = (1ULL &lt;&lt; 28), /* CLONE_NEWUSER */</div><div class='add'>+	PID_NS     = (1ULL &lt;&lt; 29), /* CLONE_NEWPID */</div><div class='add'>+	NET_NS     = (1ULL &lt;&lt; 30), /* CLONE_NEWNET */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ns_id_req - namespace ID request structure</div><div class='add'>+ * @size: size of this structure</div><div class='add'>+ * @spare: reserved for future use</div><div class='add'>+ * @filter: filter mask</div><div class='add'>+ * @ns_id: last namespace id</div><div class='add'>+ * @user_ns_id: owning user namespace ID</div><div class='add'>+ *</div><div class='add'>+ * Structure for passing namespace ID and miscellaneous parameters to</div><div class='add'>+ * statns(2) and listns(2).</div><div class='add'>+ *</div><div class='add'>+ * For statns(2) @param represents the request mask.</div><div class='add'>+ * For listns(2) @param represents the last listed mount id (or zero).</div><div class='add'>+ */</div><div class='add'>+struct ns_id_req {</div><div class='add'>+	__u32 size;</div><div class='add'>+	__u32 spare;</div><div class='add'>+	__u64 ns_id;</div><div class='add'>+	struct /* listns */ {</div><div class='add'>+		__u32 ns_type;</div><div class='add'>+		__u32 spare2;</div><div class='add'>+		__u64 user_ns_id;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Special @user_ns_id value that can be passed to listns()</div><div class='add'>+ */</div><div class='add'>+#define LISTNS_CURRENT_USER 0xffffffffffffffff /* Caller's userns */</div><div class='add'>+</div><div class='add'>+/* List of all ns_id_req versions. */</div><div class='add'>+#define NS_ID_REQ_SIZE_VER0 32 /* sizeof first published struct */</div><div class='add'>+</div><div class='ctx'> #endif /* __LINUX_NSFS_H */</div><div class='head'>diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h<br/>index 78a362b80027..c44a8fb3e418 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/perf_event.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/include/uapi/linux/perf_event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/perf_event.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/perf_event.h</a></div><div class='hunk'>@@ -382,6 +382,7 @@ enum perf_event_read_format {</div><div class='ctx'> #define PERF_ATTR_SIZE_VER6			120	/* Add: aux_sample_size */</div><div class='ctx'> #define PERF_ATTR_SIZE_VER7			128	/* Add: sig_data */</div><div class='ctx'> #define PERF_ATTR_SIZE_VER8			136	/* Add: config3 */</div><div class='add'>+#define PERF_ATTR_SIZE_VER9			144	/* add: config4 */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * 'struct perf_event_attr' contains various attributes that define</div><div class='hunk'>@@ -463,7 +464,9 @@ struct perf_event_attr {</div><div class='ctx'> 				inherit_thread :  1, /* children only inherit if cloned with CLONE_THREAD */</div><div class='ctx'> 				remove_on_exec :  1, /* event is removed from task on exec */</div><div class='ctx'> 				sigtrap        :  1, /* send synchronous SIGTRAP on event */</div><div class='del'>-				__reserved_1   : 26;</div><div class='add'>+				defer_callchain:  1, /* request PERF_RECORD_CALLCHAIN_DEFERRED records */</div><div class='add'>+				defer_output   :  1, /* output PERF_RECORD_CALLCHAIN_DEFERRED records */</div><div class='add'>+				__reserved_1   : 24;</div><div class='ctx'> </div><div class='ctx'> 	union {</div><div class='ctx'> 		__u32		wakeup_events;	  /* wake up every n events */</div><div class='hunk'>@@ -543,6 +546,7 @@ struct perf_event_attr {</div><div class='ctx'> 	__u64	sig_data;</div><div class='ctx'> </div><div class='ctx'> 	__u64	config3; /* extension of config2 */</div><div class='add'>+	__u64	config4; /* extension of config3 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1239,6 +1243,22 @@ enum perf_event_type {</div><div class='ctx'> 	 */</div><div class='ctx'> 	PERF_RECORD_AUX_OUTPUT_HW_ID		= 21,</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This user callchain capture was deferred until shortly before</div><div class='add'>+	 * returning to user space.  Previous samples would have kernel</div><div class='add'>+	 * callchains only and they need to be stitched with this to make full</div><div class='add'>+	 * callchains.</div><div class='add'>+	 *</div><div class='add'>+	 * struct {</div><div class='add'>+	 *	struct perf_event_header	header;</div><div class='add'>+	 *	u64				cookie;</div><div class='add'>+	 *	u64				nr;</div><div class='add'>+	 *	u64				ips[nr];</div><div class='add'>+	 *	struct sample_id		sample_id;</div><div class='add'>+	 * };</div><div class='add'>+	 */</div><div class='add'>+	PERF_RECORD_CALLCHAIN_DEFERRED		= 22,</div><div class='add'>+</div><div class='ctx'> 	PERF_RECORD_MAX,			/* non-ABI */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1269,6 +1289,7 @@ enum perf_callchain_context {</div><div class='ctx'> 	PERF_CONTEXT_HV				= (__u64)-32,</div><div class='ctx'> 	PERF_CONTEXT_KERNEL			= (__u64)-128,</div><div class='ctx'> 	PERF_CONTEXT_USER			= (__u64)-512,</div><div class='add'>+	PERF_CONTEXT_USER_DEFERRED		= (__u64)-640,</div><div class='ctx'> </div><div class='ctx'> 	PERF_CONTEXT_GUEST			= (__u64)-2048,</div><div class='ctx'> 	PERF_CONTEXT_GUEST_KERNEL		= (__u64)-2176,</div><div class='head'>diff --git a/tools/include/uapi/linux/rtnetlink.h b/tools/include/uapi/linux/rtnetlink.h<br/>new file mode 100644<br/>index 000000000000..dab9493c791b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/include/uapi/linux/rtnetlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/include/uapi/linux/rtnetlink.h</a></div><div class='hunk'>@@ -0,0 +1,848 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI__LINUX_RTNETLINK_H</div><div class='add'>+#define _UAPI__LINUX_RTNETLINK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/netlink.h&gt;</div><div class='add'>+#include &lt;linux/if_link.h&gt;</div><div class='add'>+#include &lt;linux/if_addr.h&gt;</div><div class='add'>+#include &lt;linux/neighbour.h&gt;</div><div class='add'>+</div><div class='add'>+/* rtnetlink families. Values up to 127 are reserved for real address</div><div class='add'>+ * families, values above 128 may be used arbitrarily.</div><div class='add'>+ */</div><div class='add'>+#define RTNL_FAMILY_IPMR		128</div><div class='add'>+#define RTNL_FAMILY_IP6MR		129</div><div class='add'>+#define RTNL_FAMILY_MAX			129</div><div class='add'>+</div><div class='add'>+/****</div><div class='add'>+ *		Routing/neighbour discovery messages.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+/* Types of messages */</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	RTM_BASE	= 16,</div><div class='add'>+#define RTM_BASE	RTM_BASE</div><div class='add'>+</div><div class='add'>+	RTM_NEWLINK	= 16,</div><div class='add'>+#define RTM_NEWLINK	RTM_NEWLINK</div><div class='add'>+	RTM_DELLINK,</div><div class='add'>+#define RTM_DELLINK	RTM_DELLINK</div><div class='add'>+	RTM_GETLINK,</div><div class='add'>+#define RTM_GETLINK	RTM_GETLINK</div><div class='add'>+	RTM_SETLINK,</div><div class='add'>+#define RTM_SETLINK	RTM_SETLINK</div><div class='add'>+</div><div class='add'>+	RTM_NEWADDR	= 20,</div><div class='add'>+#define RTM_NEWADDR	RTM_NEWADDR</div><div class='add'>+	RTM_DELADDR,</div><div class='add'>+#define RTM_DELADDR	RTM_DELADDR</div><div class='add'>+	RTM_GETADDR,</div><div class='add'>+#define RTM_GETADDR	RTM_GETADDR</div><div class='add'>+</div><div class='add'>+	RTM_NEWROUTE	= 24,</div><div class='add'>+#define RTM_NEWROUTE	RTM_NEWROUTE</div><div class='add'>+	RTM_DELROUTE,</div><div class='add'>+#define RTM_DELROUTE	RTM_DELROUTE</div><div class='add'>+	RTM_GETROUTE,</div><div class='add'>+#define RTM_GETROUTE	RTM_GETROUTE</div><div class='add'>+</div><div class='add'>+	RTM_NEWNEIGH	= 28,</div><div class='add'>+#define RTM_NEWNEIGH	RTM_NEWNEIGH</div><div class='add'>+	RTM_DELNEIGH,</div><div class='add'>+#define RTM_DELNEIGH	RTM_DELNEIGH</div><div class='add'>+	RTM_GETNEIGH,</div><div class='add'>+#define RTM_GETNEIGH	RTM_GETNEIGH</div><div class='add'>+</div><div class='add'>+	RTM_NEWRULE	= 32,</div><div class='add'>+#define RTM_NEWRULE	RTM_NEWRULE</div><div class='add'>+	RTM_DELRULE,</div><div class='add'>+#define RTM_DELRULE	RTM_DELRULE</div><div class='add'>+	RTM_GETRULE,</div><div class='add'>+#define RTM_GETRULE	RTM_GETRULE</div><div class='add'>+</div><div class='add'>+	RTM_NEWQDISC	= 36,</div><div class='add'>+#define RTM_NEWQDISC	RTM_NEWQDISC</div><div class='add'>+	RTM_DELQDISC,</div><div class='add'>+#define RTM_DELQDISC	RTM_DELQDISC</div><div class='add'>+	RTM_GETQDISC,</div><div class='add'>+#define RTM_GETQDISC	RTM_GETQDISC</div><div class='add'>+</div><div class='add'>+	RTM_NEWTCLASS	= 40,</div><div class='add'>+#define RTM_NEWTCLASS	RTM_NEWTCLASS</div><div class='add'>+	RTM_DELTCLASS,</div><div class='add'>+#define RTM_DELTCLASS	RTM_DELTCLASS</div><div class='add'>+	RTM_GETTCLASS,</div><div class='add'>+#define RTM_GETTCLASS	RTM_GETTCLASS</div><div class='add'>+</div><div class='add'>+	RTM_NEWTFILTER	= 44,</div><div class='add'>+#define RTM_NEWTFILTER	RTM_NEWTFILTER</div><div class='add'>+	RTM_DELTFILTER,</div><div class='add'>+#define RTM_DELTFILTER	RTM_DELTFILTER</div><div class='add'>+	RTM_GETTFILTER,</div><div class='add'>+#define RTM_GETTFILTER	RTM_GETTFILTER</div><div class='add'>+</div><div class='add'>+	RTM_NEWACTION	= 48,</div><div class='add'>+#define RTM_NEWACTION   RTM_NEWACTION</div><div class='add'>+	RTM_DELACTION,</div><div class='add'>+#define RTM_DELACTION   RTM_DELACTION</div><div class='add'>+	RTM_GETACTION,</div><div class='add'>+#define RTM_GETACTION   RTM_GETACTION</div><div class='add'>+</div><div class='add'>+	RTM_NEWPREFIX	= 52,</div><div class='add'>+#define RTM_NEWPREFIX	RTM_NEWPREFIX</div><div class='add'>+</div><div class='add'>+	RTM_NEWMULTICAST = 56,</div><div class='add'>+#define RTM_NEWMULTICAST RTM_NEWMULTICAST</div><div class='add'>+	RTM_DELMULTICAST,</div><div class='add'>+#define RTM_DELMULTICAST RTM_DELMULTICAST</div><div class='add'>+	RTM_GETMULTICAST,</div><div class='add'>+#define RTM_GETMULTICAST RTM_GETMULTICAST</div><div class='add'>+</div><div class='add'>+	RTM_NEWANYCAST	= 60,</div><div class='add'>+#define RTM_NEWANYCAST RTM_NEWANYCAST</div><div class='add'>+	RTM_DELANYCAST,</div><div class='add'>+#define RTM_DELANYCAST RTM_DELANYCAST</div><div class='add'>+	RTM_GETANYCAST,</div><div class='add'>+#define RTM_GETANYCAST	RTM_GETANYCAST</div><div class='add'>+</div><div class='add'>+	RTM_NEWNEIGHTBL	= 64,</div><div class='add'>+#define RTM_NEWNEIGHTBL	RTM_NEWNEIGHTBL</div><div class='add'>+	RTM_GETNEIGHTBL	= 66,</div><div class='add'>+#define RTM_GETNEIGHTBL	RTM_GETNEIGHTBL</div><div class='add'>+	RTM_SETNEIGHTBL,</div><div class='add'>+#define RTM_SETNEIGHTBL	RTM_SETNEIGHTBL</div><div class='add'>+</div><div class='add'>+	RTM_NEWNDUSEROPT = 68,</div><div class='add'>+#define RTM_NEWNDUSEROPT RTM_NEWNDUSEROPT</div><div class='add'>+</div><div class='add'>+	RTM_NEWADDRLABEL = 72,</div><div class='add'>+#define RTM_NEWADDRLABEL RTM_NEWADDRLABEL</div><div class='add'>+	RTM_DELADDRLABEL,</div><div class='add'>+#define RTM_DELADDRLABEL RTM_DELADDRLABEL</div><div class='add'>+	RTM_GETADDRLABEL,</div><div class='add'>+#define RTM_GETADDRLABEL RTM_GETADDRLABEL</div><div class='add'>+</div><div class='add'>+	RTM_GETDCB = 78,</div><div class='add'>+#define RTM_GETDCB RTM_GETDCB</div><div class='add'>+	RTM_SETDCB,</div><div class='add'>+#define RTM_SETDCB RTM_SETDCB</div><div class='add'>+</div><div class='add'>+	RTM_NEWNETCONF = 80,</div><div class='add'>+#define RTM_NEWNETCONF RTM_NEWNETCONF</div><div class='add'>+	RTM_DELNETCONF,</div><div class='add'>+#define RTM_DELNETCONF RTM_DELNETCONF</div><div class='add'>+	RTM_GETNETCONF = 82,</div><div class='add'>+#define RTM_GETNETCONF RTM_GETNETCONF</div><div class='add'>+</div><div class='add'>+	RTM_NEWMDB = 84,</div><div class='add'>+#define RTM_NEWMDB RTM_NEWMDB</div><div class='add'>+	RTM_DELMDB = 85,</div><div class='add'>+#define RTM_DELMDB RTM_DELMDB</div><div class='add'>+	RTM_GETMDB = 86,</div><div class='add'>+#define RTM_GETMDB RTM_GETMDB</div><div class='add'>+</div><div class='add'>+	RTM_NEWNSID = 88,</div><div class='add'>+#define RTM_NEWNSID RTM_NEWNSID</div><div class='add'>+	RTM_DELNSID = 89,</div><div class='add'>+#define RTM_DELNSID RTM_DELNSID</div><div class='add'>+	RTM_GETNSID = 90,</div><div class='add'>+#define RTM_GETNSID RTM_GETNSID</div><div class='add'>+</div><div class='add'>+	RTM_NEWSTATS = 92,</div><div class='add'>+#define RTM_NEWSTATS RTM_NEWSTATS</div><div class='add'>+	RTM_GETSTATS = 94,</div><div class='add'>+#define RTM_GETSTATS RTM_GETSTATS</div><div class='add'>+	RTM_SETSTATS,</div><div class='add'>+#define RTM_SETSTATS RTM_SETSTATS</div><div class='add'>+</div><div class='add'>+	RTM_NEWCACHEREPORT = 96,</div><div class='add'>+#define RTM_NEWCACHEREPORT RTM_NEWCACHEREPORT</div><div class='add'>+</div><div class='add'>+	RTM_NEWCHAIN = 100,</div><div class='add'>+#define RTM_NEWCHAIN RTM_NEWCHAIN</div><div class='add'>+	RTM_DELCHAIN,</div><div class='add'>+#define RTM_DELCHAIN RTM_DELCHAIN</div><div class='add'>+	RTM_GETCHAIN,</div><div class='add'>+#define RTM_GETCHAIN RTM_GETCHAIN</div><div class='add'>+</div><div class='add'>+	RTM_NEWNEXTHOP = 104,</div><div class='add'>+#define RTM_NEWNEXTHOP	RTM_NEWNEXTHOP</div><div class='add'>+	RTM_DELNEXTHOP,</div><div class='add'>+#define RTM_DELNEXTHOP	RTM_DELNEXTHOP</div><div class='add'>+	RTM_GETNEXTHOP,</div><div class='add'>+#define RTM_GETNEXTHOP	RTM_GETNEXTHOP</div><div class='add'>+</div><div class='add'>+	RTM_NEWLINKPROP = 108,</div><div class='add'>+#define RTM_NEWLINKPROP	RTM_NEWLINKPROP</div><div class='add'>+	RTM_DELLINKPROP,</div><div class='add'>+#define RTM_DELLINKPROP	RTM_DELLINKPROP</div><div class='add'>+	RTM_GETLINKPROP,</div><div class='add'>+#define RTM_GETLINKPROP	RTM_GETLINKPROP</div><div class='add'>+</div><div class='add'>+	RTM_NEWVLAN = 112,</div><div class='add'>+#define RTM_NEWVLAN	RTM_NEWVLAN</div><div class='add'>+	RTM_DELVLAN,</div><div class='add'>+#define RTM_DELVLAN	RTM_DELVLAN</div><div class='add'>+	RTM_GETVLAN,</div><div class='add'>+#define RTM_GETVLAN	RTM_GETVLAN</div><div class='add'>+</div><div class='add'>+	RTM_NEWNEXTHOPBUCKET = 116,</div><div class='add'>+#define RTM_NEWNEXTHOPBUCKET	RTM_NEWNEXTHOPBUCKET</div><div class='add'>+	RTM_DELNEXTHOPBUCKET,</div><div class='add'>+#define RTM_DELNEXTHOPBUCKET	RTM_DELNEXTHOPBUCKET</div><div class='add'>+	RTM_GETNEXTHOPBUCKET,</div><div class='add'>+#define RTM_GETNEXTHOPBUCKET	RTM_GETNEXTHOPBUCKET</div><div class='add'>+</div><div class='add'>+	RTM_NEWTUNNEL = 120,</div><div class='add'>+#define RTM_NEWTUNNEL	RTM_NEWTUNNEL</div><div class='add'>+	RTM_DELTUNNEL,</div><div class='add'>+#define RTM_DELTUNNEL	RTM_DELTUNNEL</div><div class='add'>+	RTM_GETTUNNEL,</div><div class='add'>+#define RTM_GETTUNNEL	RTM_GETTUNNEL</div><div class='add'>+</div><div class='add'>+	__RTM_MAX,</div><div class='add'>+#define RTM_MAX		(((__RTM_MAX + 3) &amp; ~3) - 1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RTM_NR_MSGTYPES	(RTM_MAX + 1 - RTM_BASE)</div><div class='add'>+#define RTM_NR_FAMILIES	(RTM_NR_MSGTYPES &gt;&gt; 2)</div><div class='add'>+#define RTM_FAM(cmd)	(((cmd) - RTM_BASE) &gt;&gt; 2)</div><div class='add'>+</div><div class='add'>+/* </div><div class='add'>+   Generic structure for encapsulation of optional route information.</div><div class='add'>+   It is reminiscent of sockaddr, but with sa_family replaced</div><div class='add'>+   with attribute type.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct rtattr {</div><div class='add'>+	unsigned short	rta_len;</div><div class='add'>+	unsigned short	rta_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Macros to handle rtattributes */</div><div class='add'>+</div><div class='add'>+#define RTA_ALIGNTO	4U</div><div class='add'>+#define RTA_ALIGN(len) ( ((len)+RTA_ALIGNTO-1) &amp; ~(RTA_ALIGNTO-1) )</div><div class='add'>+#define RTA_OK(rta,len) ((len) &gt;= (int)sizeof(struct rtattr) &amp;&amp; \</div><div class='add'>+			 (rta)-&gt;rta_len &gt;= sizeof(struct rtattr) &amp;&amp; \</div><div class='add'>+			 (rta)-&gt;rta_len &lt;= (len))</div><div class='add'>+#define RTA_NEXT(rta,attrlen)	((attrlen) -= RTA_ALIGN((rta)-&gt;rta_len), \</div><div class='add'>+				 (struct rtattr*)(((char*)(rta)) + RTA_ALIGN((rta)-&gt;rta_len)))</div><div class='add'>+#define RTA_LENGTH(len)	(RTA_ALIGN(sizeof(struct rtattr)) + (len))</div><div class='add'>+#define RTA_SPACE(len)	RTA_ALIGN(RTA_LENGTH(len))</div><div class='add'>+#define RTA_DATA(rta)   ((void*)(((char*)(rta)) + RTA_LENGTH(0)))</div><div class='add'>+#define RTA_PAYLOAD(rta) ((int)((rta)-&gt;rta_len) - RTA_LENGTH(0))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/******************************************************************************</div><div class='add'>+ *		Definitions used in routing table administration.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct rtmsg {</div><div class='add'>+	unsigned char		rtm_family;</div><div class='add'>+	unsigned char		rtm_dst_len;</div><div class='add'>+	unsigned char		rtm_src_len;</div><div class='add'>+	unsigned char		rtm_tos;</div><div class='add'>+</div><div class='add'>+	unsigned char		rtm_table;	/* Routing table id */</div><div class='add'>+	unsigned char		rtm_protocol;	/* Routing protocol; see below	*/</div><div class='add'>+	unsigned char		rtm_scope;	/* See below */	</div><div class='add'>+	unsigned char		rtm_type;	/* See below	*/</div><div class='add'>+</div><div class='add'>+	unsigned		rtm_flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rtm_type */</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	RTN_UNSPEC,</div><div class='add'>+	RTN_UNICAST,		/* Gateway or direct route	*/</div><div class='add'>+	RTN_LOCAL,		/* Accept locally		*/</div><div class='add'>+	RTN_BROADCAST,		/* Accept locally as broadcast,</div><div class='add'>+				   send as broadcast */</div><div class='add'>+	RTN_ANYCAST,		/* Accept locally as broadcast,</div><div class='add'>+				   but send as unicast */</div><div class='add'>+	RTN_MULTICAST,		/* Multicast route		*/</div><div class='add'>+	RTN_BLACKHOLE,		/* Drop				*/</div><div class='add'>+	RTN_UNREACHABLE,	/* Destination is unreachable   */</div><div class='add'>+	RTN_PROHIBIT,		/* Administratively prohibited	*/</div><div class='add'>+	RTN_THROW,		/* Not in this table		*/</div><div class='add'>+	RTN_NAT,		/* Translate this address	*/</div><div class='add'>+	RTN_XRESOLVE,		/* Use external resolver	*/</div><div class='add'>+	__RTN_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RTN_MAX (__RTN_MAX - 1)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* rtm_protocol */</div><div class='add'>+</div><div class='add'>+#define RTPROT_UNSPEC		0</div><div class='add'>+#define RTPROT_REDIRECT		1	/* Route installed by ICMP redirects;</div><div class='add'>+					   not used by current IPv4 */</div><div class='add'>+#define RTPROT_KERNEL		2	/* Route installed by kernel		*/</div><div class='add'>+#define RTPROT_BOOT		3	/* Route installed during boot		*/</div><div class='add'>+#define RTPROT_STATIC		4	/* Route installed by administrator	*/</div><div class='add'>+</div><div class='add'>+/* Values of protocol &gt;= RTPROT_STATIC are not interpreted by kernel;</div><div class='add'>+   they are just passed from user and back as is.</div><div class='add'>+   It will be used by hypothetical multiple routing daemons.</div><div class='add'>+   Note that protocol values should be standardized in order to</div><div class='add'>+   avoid conflicts.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define RTPROT_GATED		8	/* Apparently, GateD */</div><div class='add'>+#define RTPROT_RA		9	/* RDISC/ND router advertisements */</div><div class='add'>+#define RTPROT_MRT		10	/* Merit MRT */</div><div class='add'>+#define RTPROT_ZEBRA		11	/* Zebra */</div><div class='add'>+#define RTPROT_BIRD		12	/* BIRD */</div><div class='add'>+#define RTPROT_DNROUTED		13	/* DECnet routing daemon */</div><div class='add'>+#define RTPROT_XORP		14	/* XORP */</div><div class='add'>+#define RTPROT_NTK		15	/* Netsukuku */</div><div class='add'>+#define RTPROT_DHCP		16	/* DHCP client */</div><div class='add'>+#define RTPROT_MROUTED		17	/* Multicast daemon */</div><div class='add'>+#define RTPROT_KEEPALIVED	18	/* Keepalived daemon */</div><div class='add'>+#define RTPROT_BABEL		42	/* Babel daemon */</div><div class='add'>+#define RTPROT_OVN		84	/* OVN daemon */</div><div class='add'>+#define RTPROT_OPENR		99	/* Open Routing (Open/R) Routes */</div><div class='add'>+#define RTPROT_BGP		186	/* BGP Routes */</div><div class='add'>+#define RTPROT_ISIS		187	/* ISIS Routes */</div><div class='add'>+#define RTPROT_OSPF		188	/* OSPF Routes */</div><div class='add'>+#define RTPROT_RIP		189	/* RIP Routes */</div><div class='add'>+#define RTPROT_EIGRP		192	/* EIGRP Routes */</div><div class='add'>+</div><div class='add'>+/* rtm_scope</div><div class='add'>+</div><div class='add'>+   Really it is not scope, but sort of distance to the destination.</div><div class='add'>+   NOWHERE are reserved for not existing destinations, HOST is our</div><div class='add'>+   local addresses, LINK are destinations, located on directly attached</div><div class='add'>+   link and UNIVERSE is everywhere in the Universe.</div><div class='add'>+</div><div class='add'>+   Intermediate values are also possible f.e. interior routes</div><div class='add'>+   could be assigned a value between UNIVERSE and LINK.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+enum rt_scope_t {</div><div class='add'>+	RT_SCOPE_UNIVERSE=0,</div><div class='add'>+/* User defined values  */</div><div class='add'>+	RT_SCOPE_SITE=200,</div><div class='add'>+	RT_SCOPE_LINK=253,</div><div class='add'>+	RT_SCOPE_HOST=254,</div><div class='add'>+	RT_SCOPE_NOWHERE=255</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rtm_flags */</div><div class='add'>+</div><div class='add'>+#define RTM_F_NOTIFY		0x100	/* Notify user of route change	*/</div><div class='add'>+#define RTM_F_CLONED		0x200	/* This route is cloned		*/</div><div class='add'>+#define RTM_F_EQUALIZE		0x400	/* Multipath equalizer: NI	*/</div><div class='add'>+#define RTM_F_PREFIX		0x800	/* Prefix addresses		*/</div><div class='add'>+#define RTM_F_LOOKUP_TABLE	0x1000	/* set rtm_table to FIB lookup result */</div><div class='add'>+#define RTM_F_FIB_MATCH	        0x2000	/* return full fib lookup match */</div><div class='add'>+#define RTM_F_OFFLOAD		0x4000	/* route is offloaded */</div><div class='add'>+#define RTM_F_TRAP		0x8000	/* route is trapping packets */</div><div class='add'>+#define RTM_F_OFFLOAD_FAILED	0x20000000 /* route offload failed, this value</div><div class='add'>+					    * is chosen to avoid conflicts with</div><div class='add'>+					    * other flags defined in</div><div class='add'>+					    * include/uapi/linux/ipv6_route.h</div><div class='add'>+					    */</div><div class='add'>+</div><div class='add'>+/* Reserved table identifiers */</div><div class='add'>+</div><div class='add'>+enum rt_class_t {</div><div class='add'>+	RT_TABLE_UNSPEC=0,</div><div class='add'>+/* User defined values */</div><div class='add'>+	RT_TABLE_COMPAT=252,</div><div class='add'>+	RT_TABLE_DEFAULT=253,</div><div class='add'>+	RT_TABLE_MAIN=254,</div><div class='add'>+	RT_TABLE_LOCAL=255,</div><div class='add'>+	RT_TABLE_MAX=0xFFFFFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Routing message attributes */</div><div class='add'>+</div><div class='add'>+enum rtattr_type_t {</div><div class='add'>+	RTA_UNSPEC,</div><div class='add'>+	RTA_DST,</div><div class='add'>+	RTA_SRC,</div><div class='add'>+	RTA_IIF,</div><div class='add'>+	RTA_OIF,</div><div class='add'>+	RTA_GATEWAY,</div><div class='add'>+	RTA_PRIORITY,</div><div class='add'>+	RTA_PREFSRC,</div><div class='add'>+	RTA_METRICS,</div><div class='add'>+	RTA_MULTIPATH,</div><div class='add'>+	RTA_PROTOINFO, /* no longer used */</div><div class='add'>+	RTA_FLOW,</div><div class='add'>+	RTA_CACHEINFO,</div><div class='add'>+	RTA_SESSION, /* no longer used */</div><div class='add'>+	RTA_MP_ALGO, /* no longer used */</div><div class='add'>+	RTA_TABLE,</div><div class='add'>+	RTA_MARK,</div><div class='add'>+	RTA_MFC_STATS,</div><div class='add'>+	RTA_VIA,</div><div class='add'>+	RTA_NEWDST,</div><div class='add'>+	RTA_PREF,</div><div class='add'>+	RTA_ENCAP_TYPE,</div><div class='add'>+	RTA_ENCAP,</div><div class='add'>+	RTA_EXPIRES,</div><div class='add'>+	RTA_PAD,</div><div class='add'>+	RTA_UID,</div><div class='add'>+	RTA_TTL_PROPAGATE,</div><div class='add'>+	RTA_IP_PROTO,</div><div class='add'>+	RTA_SPORT,</div><div class='add'>+	RTA_DPORT,</div><div class='add'>+	RTA_NH_ID,</div><div class='add'>+	RTA_FLOWLABEL,</div><div class='add'>+	__RTA_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RTA_MAX (__RTA_MAX - 1)</div><div class='add'>+</div><div class='add'>+#define RTM_RTA(r)  ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct rtmsg))))</div><div class='add'>+#define RTM_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct rtmsg))</div><div class='add'>+</div><div class='add'>+/* RTM_MULTIPATH --- array of struct rtnexthop.</div><div class='add'>+ *</div><div class='add'>+ * "struct rtnexthop" describes all necessary nexthop information,</div><div class='add'>+ * i.e. parameters of path to a destination via this nexthop.</div><div class='add'>+ *</div><div class='add'>+ * At the moment it is impossible to set different prefsrc, mtu, window</div><div class='add'>+ * and rtt for different paths from multipath.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct rtnexthop {</div><div class='add'>+	unsigned short		rtnh_len;</div><div class='add'>+	unsigned char		rtnh_flags;</div><div class='add'>+	unsigned char		rtnh_hops;</div><div class='add'>+	int			rtnh_ifindex;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rtnh_flags */</div><div class='add'>+</div><div class='add'>+#define RTNH_F_DEAD		1	/* Nexthop is dead (used by multipath)	*/</div><div class='add'>+#define RTNH_F_PERVASIVE	2	/* Do recursive gateway lookup	*/</div><div class='add'>+#define RTNH_F_ONLINK		4	/* Gateway is forced on link	*/</div><div class='add'>+#define RTNH_F_OFFLOAD		8	/* Nexthop is offloaded */</div><div class='add'>+#define RTNH_F_LINKDOWN		16	/* carrier-down on nexthop */</div><div class='add'>+#define RTNH_F_UNRESOLVED	32	/* The entry is unresolved (ipmr) */</div><div class='add'>+#define RTNH_F_TRAP		64	/* Nexthop is trapping packets */</div><div class='add'>+</div><div class='add'>+#define RTNH_COMPARE_MASK	(RTNH_F_DEAD | RTNH_F_LINKDOWN | \</div><div class='add'>+				 RTNH_F_OFFLOAD | RTNH_F_TRAP)</div><div class='add'>+</div><div class='add'>+/* Macros to handle hexthops */</div><div class='add'>+</div><div class='add'>+#define RTNH_ALIGNTO	4</div><div class='add'>+#define RTNH_ALIGN(len) ( ((len)+RTNH_ALIGNTO-1) &amp; ~(RTNH_ALIGNTO-1) )</div><div class='add'>+#define RTNH_OK(rtnh,len) ((rtnh)-&gt;rtnh_len &gt;= sizeof(struct rtnexthop) &amp;&amp; \</div><div class='add'>+			   ((int)(rtnh)-&gt;rtnh_len) &lt;= (len))</div><div class='add'>+#define RTNH_NEXT(rtnh)	((struct rtnexthop*)(((char*)(rtnh)) + RTNH_ALIGN((rtnh)-&gt;rtnh_len)))</div><div class='add'>+#define RTNH_LENGTH(len) (RTNH_ALIGN(sizeof(struct rtnexthop)) + (len))</div><div class='add'>+#define RTNH_SPACE(len)	RTNH_ALIGN(RTNH_LENGTH(len))</div><div class='add'>+#define RTNH_DATA(rtnh)   ((struct rtattr*)(((char*)(rtnh)) + RTNH_LENGTH(0)))</div><div class='add'>+</div><div class='add'>+/* RTA_VIA */</div><div class='add'>+struct rtvia {</div><div class='add'>+	__kernel_sa_family_t	rtvia_family;</div><div class='add'>+	__u8			rtvia_addr[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RTM_CACHEINFO */</div><div class='add'>+</div><div class='add'>+struct rta_cacheinfo {</div><div class='add'>+	__u32	rta_clntref;</div><div class='add'>+	__u32	rta_lastuse;</div><div class='add'>+	__s32	rta_expires;</div><div class='add'>+	__u32	rta_error;</div><div class='add'>+	__u32	rta_used;</div><div class='add'>+</div><div class='add'>+#define RTNETLINK_HAVE_PEERINFO 1</div><div class='add'>+	__u32	rta_id;</div><div class='add'>+	__u32	rta_ts;</div><div class='add'>+	__u32	rta_tsage;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RTM_METRICS --- array of struct rtattr with types of RTAX_* */</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	RTAX_UNSPEC,</div><div class='add'>+#define RTAX_UNSPEC RTAX_UNSPEC</div><div class='add'>+	RTAX_LOCK,</div><div class='add'>+#define RTAX_LOCK RTAX_LOCK</div><div class='add'>+	RTAX_MTU,</div><div class='add'>+#define RTAX_MTU RTAX_MTU</div><div class='add'>+	RTAX_WINDOW,</div><div class='add'>+#define RTAX_WINDOW RTAX_WINDOW</div><div class='add'>+	RTAX_RTT,</div><div class='add'>+#define RTAX_RTT RTAX_RTT</div><div class='add'>+	RTAX_RTTVAR,</div><div class='add'>+#define RTAX_RTTVAR RTAX_RTTVAR</div><div class='add'>+	RTAX_SSTHRESH,</div><div class='add'>+#define RTAX_SSTHRESH RTAX_SSTHRESH</div><div class='add'>+	RTAX_CWND,</div><div class='add'>+#define RTAX_CWND RTAX_CWND</div><div class='add'>+	RTAX_ADVMSS,</div><div class='add'>+#define RTAX_ADVMSS RTAX_ADVMSS</div><div class='add'>+	RTAX_REORDERING,</div><div class='add'>+#define RTAX_REORDERING RTAX_REORDERING</div><div class='add'>+	RTAX_HOPLIMIT,</div><div class='add'>+#define RTAX_HOPLIMIT RTAX_HOPLIMIT</div><div class='add'>+	RTAX_INITCWND,</div><div class='add'>+#define RTAX_INITCWND RTAX_INITCWND</div><div class='add'>+	RTAX_FEATURES,</div><div class='add'>+#define RTAX_FEATURES RTAX_FEATURES</div><div class='add'>+	RTAX_RTO_MIN,</div><div class='add'>+#define RTAX_RTO_MIN RTAX_RTO_MIN</div><div class='add'>+	RTAX_INITRWND,</div><div class='add'>+#define RTAX_INITRWND RTAX_INITRWND</div><div class='add'>+	RTAX_QUICKACK,</div><div class='add'>+#define RTAX_QUICKACK RTAX_QUICKACK</div><div class='add'>+	RTAX_CC_ALGO,</div><div class='add'>+#define RTAX_CC_ALGO RTAX_CC_ALGO</div><div class='add'>+	RTAX_FASTOPEN_NO_COOKIE,</div><div class='add'>+#define RTAX_FASTOPEN_NO_COOKIE RTAX_FASTOPEN_NO_COOKIE</div><div class='add'>+	__RTAX_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RTAX_MAX (__RTAX_MAX - 1)</div><div class='add'>+</div><div class='add'>+#define RTAX_FEATURE_ECN		(1 &lt;&lt; 0)</div><div class='add'>+#define RTAX_FEATURE_SACK		(1 &lt;&lt; 1) /* unused */</div><div class='add'>+#define RTAX_FEATURE_TIMESTAMP		(1 &lt;&lt; 2) /* unused */</div><div class='add'>+#define RTAX_FEATURE_ALLFRAG		(1 &lt;&lt; 3) /* unused */</div><div class='add'>+#define RTAX_FEATURE_TCP_USEC_TS	(1 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define RTAX_FEATURE_MASK	(RTAX_FEATURE_ECN |		\</div><div class='add'>+				 RTAX_FEATURE_SACK |		\</div><div class='add'>+				 RTAX_FEATURE_TIMESTAMP |	\</div><div class='add'>+				 RTAX_FEATURE_ALLFRAG |		\</div><div class='add'>+				 RTAX_FEATURE_TCP_USEC_TS)</div><div class='add'>+</div><div class='add'>+struct rta_session {</div><div class='add'>+	__u8	proto;</div><div class='add'>+	__u8	pad1;</div><div class='add'>+	__u16	pad2;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__u16	sport;</div><div class='add'>+			__u16	dport;</div><div class='add'>+		} ports;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			__u8	type;</div><div class='add'>+			__u8	code;</div><div class='add'>+			__u16	ident;</div><div class='add'>+		} icmpt;</div><div class='add'>+</div><div class='add'>+		__u32		spi;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rta_mfc_stats {</div><div class='add'>+	__u64	mfcs_packets;</div><div class='add'>+	__u64	mfcs_bytes;</div><div class='add'>+	__u64	mfcs_wrong_if;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/****</div><div class='add'>+ *		General form of address family dependent message.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct rtgenmsg {</div><div class='add'>+	unsigned char		rtgen_family;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*****************************************************************</div><div class='add'>+ *		Link layer specific messages.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+/* struct ifinfomsg</div><div class='add'>+ * passes link level specific information, not dependent</div><div class='add'>+ * on network protocol.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct ifinfomsg {</div><div class='add'>+	unsigned char	ifi_family;</div><div class='add'>+	unsigned char	__ifi_pad;</div><div class='add'>+	unsigned short	ifi_type;		/* ARPHRD_* */</div><div class='add'>+	int		ifi_index;		/* Link index	*/</div><div class='add'>+	unsigned	ifi_flags;		/* IFF_* flags	*/</div><div class='add'>+	unsigned	ifi_change;		/* IFF_* change mask */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/********************************************************************</div><div class='add'>+ *		prefix information </div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct prefixmsg {</div><div class='add'>+	unsigned char	prefix_family;</div><div class='add'>+	unsigned char	prefix_pad1;</div><div class='add'>+	unsigned short	prefix_pad2;</div><div class='add'>+	int		prefix_ifindex;</div><div class='add'>+	unsigned char	prefix_type;</div><div class='add'>+	unsigned char	prefix_len;</div><div class='add'>+	unsigned char	prefix_flags;</div><div class='add'>+	unsigned char	prefix_pad3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum </div><div class='add'>+{</div><div class='add'>+	PREFIX_UNSPEC,</div><div class='add'>+	PREFIX_ADDRESS,</div><div class='add'>+	PREFIX_CACHEINFO,</div><div class='add'>+	__PREFIX_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PREFIX_MAX	(__PREFIX_MAX - 1)</div><div class='add'>+</div><div class='add'>+struct prefix_cacheinfo {</div><div class='add'>+	__u32	preferred_time;</div><div class='add'>+	__u32	valid_time;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*****************************************************************</div><div class='add'>+ *		Traffic control messages.</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct tcmsg {</div><div class='add'>+	unsigned char	tcm_family;</div><div class='add'>+	unsigned char	tcm__pad1;</div><div class='add'>+	unsigned short	tcm__pad2;</div><div class='add'>+	int		tcm_ifindex;</div><div class='add'>+	__u32		tcm_handle;</div><div class='add'>+	__u32		tcm_parent;</div><div class='add'>+/* tcm_block_index is used instead of tcm_parent</div><div class='add'>+ * in case tcm_ifindex == TCM_IFINDEX_MAGIC_BLOCK</div><div class='add'>+ */</div><div class='add'>+#define tcm_block_index tcm_parent</div><div class='add'>+	__u32		tcm_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* For manipulation of filters in shared block, tcm_ifindex is set to</div><div class='add'>+ * TCM_IFINDEX_MAGIC_BLOCK, and tcm_parent is aliased to tcm_block_index</div><div class='add'>+ * which is the block index.</div><div class='add'>+ */</div><div class='add'>+#define TCM_IFINDEX_MAGIC_BLOCK (0xFFFFFFFFU)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	TCA_UNSPEC,</div><div class='add'>+	TCA_KIND,</div><div class='add'>+	TCA_OPTIONS,</div><div class='add'>+	TCA_STATS,</div><div class='add'>+	TCA_XSTATS,</div><div class='add'>+	TCA_RATE,</div><div class='add'>+	TCA_FCNT,</div><div class='add'>+	TCA_STATS2,</div><div class='add'>+	TCA_STAB,</div><div class='add'>+	TCA_PAD,</div><div class='add'>+	TCA_DUMP_INVISIBLE,</div><div class='add'>+	TCA_CHAIN,</div><div class='add'>+	TCA_HW_OFFLOAD,</div><div class='add'>+	TCA_INGRESS_BLOCK,</div><div class='add'>+	TCA_EGRESS_BLOCK,</div><div class='add'>+	TCA_DUMP_FLAGS,</div><div class='add'>+	TCA_EXT_WARN_MSG,</div><div class='add'>+	__TCA_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define TCA_MAX (__TCA_MAX - 1)</div><div class='add'>+</div><div class='add'>+#define TCA_DUMP_FLAGS_TERSE (1 &lt;&lt; 0) /* Means that in dump user gets only basic</div><div class='add'>+				       * data necessary to identify the objects</div><div class='add'>+				       * (handle, cookie, etc.) and stats.</div><div class='add'>+				       */</div><div class='add'>+</div><div class='add'>+#define TCA_RTA(r)  ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct tcmsg))))</div><div class='add'>+#define TCA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct tcmsg))</div><div class='add'>+</div><div class='add'>+/********************************************************************</div><div class='add'>+ *		Neighbor Discovery userland options</div><div class='add'>+ ****/</div><div class='add'>+</div><div class='add'>+struct nduseroptmsg {</div><div class='add'>+	unsigned char	nduseropt_family;</div><div class='add'>+	unsigned char	nduseropt_pad1;</div><div class='add'>+	unsigned short	nduseropt_opts_len;	/* Total length of options */</div><div class='add'>+	int		nduseropt_ifindex;</div><div class='add'>+	__u8		nduseropt_icmp_type;</div><div class='add'>+	__u8		nduseropt_icmp_code;</div><div class='add'>+	unsigned short	nduseropt_pad2;</div><div class='add'>+	unsigned int	nduseropt_pad3;</div><div class='add'>+	/* Followed by one or more ND options */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NDUSEROPT_UNSPEC,</div><div class='add'>+	NDUSEROPT_SRCADDR,</div><div class='add'>+	__NDUSEROPT_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NDUSEROPT_MAX	(__NDUSEROPT_MAX - 1)</div><div class='add'>+</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+/* RTnetlink multicast groups - backwards compatibility for userspace */</div><div class='add'>+#define RTMGRP_LINK		1</div><div class='add'>+#define RTMGRP_NOTIFY		2</div><div class='add'>+#define RTMGRP_NEIGH		4</div><div class='add'>+#define RTMGRP_TC		8</div><div class='add'>+</div><div class='add'>+#define RTMGRP_IPV4_IFADDR	0x10</div><div class='add'>+#define RTMGRP_IPV4_MROUTE	0x20</div><div class='add'>+#define RTMGRP_IPV4_ROUTE	0x40</div><div class='add'>+#define RTMGRP_IPV4_RULE	0x80</div><div class='add'>+</div><div class='add'>+#define RTMGRP_IPV6_IFADDR	0x100</div><div class='add'>+#define RTMGRP_IPV6_MROUTE	0x200</div><div class='add'>+#define RTMGRP_IPV6_ROUTE	0x400</div><div class='add'>+#define RTMGRP_IPV6_IFINFO	0x800</div><div class='add'>+</div><div class='add'>+#define RTMGRP_DECnet_IFADDR    0x1000</div><div class='add'>+#define RTMGRP_DECnet_ROUTE     0x4000</div><div class='add'>+</div><div class='add'>+#define RTMGRP_IPV6_PREFIX	0x20000</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* RTnetlink multicast groups */</div><div class='add'>+enum rtnetlink_groups {</div><div class='add'>+	RTNLGRP_NONE,</div><div class='add'>+#define RTNLGRP_NONE		RTNLGRP_NONE</div><div class='add'>+	RTNLGRP_LINK,</div><div class='add'>+#define RTNLGRP_LINK		RTNLGRP_LINK</div><div class='add'>+	RTNLGRP_NOTIFY,</div><div class='add'>+#define RTNLGRP_NOTIFY		RTNLGRP_NOTIFY</div><div class='add'>+	RTNLGRP_NEIGH,</div><div class='add'>+#define RTNLGRP_NEIGH		RTNLGRP_NEIGH</div><div class='add'>+	RTNLGRP_TC,</div><div class='add'>+#define RTNLGRP_TC		RTNLGRP_TC</div><div class='add'>+	RTNLGRP_IPV4_IFADDR,</div><div class='add'>+#define RTNLGRP_IPV4_IFADDR	RTNLGRP_IPV4_IFADDR</div><div class='add'>+	RTNLGRP_IPV4_MROUTE,</div><div class='add'>+#define	RTNLGRP_IPV4_MROUTE	RTNLGRP_IPV4_MROUTE</div><div class='add'>+	RTNLGRP_IPV4_ROUTE,</div><div class='add'>+#define RTNLGRP_IPV4_ROUTE	RTNLGRP_IPV4_ROUTE</div><div class='add'>+	RTNLGRP_IPV4_RULE,</div><div class='add'>+#define RTNLGRP_IPV4_RULE	RTNLGRP_IPV4_RULE</div><div class='add'>+	RTNLGRP_IPV6_IFADDR,</div><div class='add'>+#define RTNLGRP_IPV6_IFADDR	RTNLGRP_IPV6_IFADDR</div><div class='add'>+	RTNLGRP_IPV6_MROUTE,</div><div class='add'>+#define RTNLGRP_IPV6_MROUTE	RTNLGRP_IPV6_MROUTE</div><div class='add'>+	RTNLGRP_IPV6_ROUTE,</div><div class='add'>+#define RTNLGRP_IPV6_ROUTE	RTNLGRP_IPV6_ROUTE</div><div class='add'>+	RTNLGRP_IPV6_IFINFO,</div><div class='add'>+#define RTNLGRP_IPV6_IFINFO	RTNLGRP_IPV6_IFINFO</div><div class='add'>+	RTNLGRP_DECnet_IFADDR,</div><div class='add'>+#define RTNLGRP_DECnet_IFADDR	RTNLGRP_DECnet_IFADDR</div><div class='add'>+	RTNLGRP_NOP2,</div><div class='add'>+	RTNLGRP_DECnet_ROUTE,</div><div class='add'>+#define RTNLGRP_DECnet_ROUTE	RTNLGRP_DECnet_ROUTE</div><div class='add'>+	RTNLGRP_DECnet_RULE,</div><div class='add'>+#define RTNLGRP_DECnet_RULE	RTNLGRP_DECnet_RULE</div><div class='add'>+	RTNLGRP_NOP4,</div><div class='add'>+	RTNLGRP_IPV6_PREFIX,</div><div class='add'>+#define RTNLGRP_IPV6_PREFIX	RTNLGRP_IPV6_PREFIX</div><div class='add'>+	RTNLGRP_IPV6_RULE,</div><div class='add'>+#define RTNLGRP_IPV6_RULE	RTNLGRP_IPV6_RULE</div><div class='add'>+	RTNLGRP_ND_USEROPT,</div><div class='add'>+#define RTNLGRP_ND_USEROPT	RTNLGRP_ND_USEROPT</div><div class='add'>+	RTNLGRP_PHONET_IFADDR,</div><div class='add'>+#define RTNLGRP_PHONET_IFADDR	RTNLGRP_PHONET_IFADDR</div><div class='add'>+	RTNLGRP_PHONET_ROUTE,</div><div class='add'>+#define RTNLGRP_PHONET_ROUTE	RTNLGRP_PHONET_ROUTE</div><div class='add'>+	RTNLGRP_DCB,</div><div class='add'>+#define RTNLGRP_DCB		RTNLGRP_DCB</div><div class='add'>+	RTNLGRP_IPV4_NETCONF,</div><div class='add'>+#define RTNLGRP_IPV4_NETCONF	RTNLGRP_IPV4_NETCONF</div><div class='add'>+	RTNLGRP_IPV6_NETCONF,</div><div class='add'>+#define RTNLGRP_IPV6_NETCONF	RTNLGRP_IPV6_NETCONF</div><div class='add'>+	RTNLGRP_MDB,</div><div class='add'>+#define RTNLGRP_MDB		RTNLGRP_MDB</div><div class='add'>+	RTNLGRP_MPLS_ROUTE,</div><div class='add'>+#define RTNLGRP_MPLS_ROUTE	RTNLGRP_MPLS_ROUTE</div><div class='add'>+	RTNLGRP_NSID,</div><div class='add'>+#define RTNLGRP_NSID		RTNLGRP_NSID</div><div class='add'>+	RTNLGRP_MPLS_NETCONF,</div><div class='add'>+#define RTNLGRP_MPLS_NETCONF	RTNLGRP_MPLS_NETCONF</div><div class='add'>+	RTNLGRP_IPV4_MROUTE_R,</div><div class='add'>+#define RTNLGRP_IPV4_MROUTE_R	RTNLGRP_IPV4_MROUTE_R</div><div class='add'>+	RTNLGRP_IPV6_MROUTE_R,</div><div class='add'>+#define RTNLGRP_IPV6_MROUTE_R	RTNLGRP_IPV6_MROUTE_R</div><div class='add'>+	RTNLGRP_NEXTHOP,</div><div class='add'>+#define RTNLGRP_NEXTHOP		RTNLGRP_NEXTHOP</div><div class='add'>+	RTNLGRP_BRVLAN,</div><div class='add'>+#define RTNLGRP_BRVLAN		RTNLGRP_BRVLAN</div><div class='add'>+	RTNLGRP_MCTP_IFADDR,</div><div class='add'>+#define RTNLGRP_MCTP_IFADDR	RTNLGRP_MCTP_IFADDR</div><div class='add'>+	RTNLGRP_TUNNEL,</div><div class='add'>+#define RTNLGRP_TUNNEL		RTNLGRP_TUNNEL</div><div class='add'>+	RTNLGRP_STATS,</div><div class='add'>+#define RTNLGRP_STATS		RTNLGRP_STATS</div><div class='add'>+	RTNLGRP_IPV4_MCADDR,</div><div class='add'>+#define RTNLGRP_IPV4_MCADDR	RTNLGRP_IPV4_MCADDR</div><div class='add'>+	RTNLGRP_IPV6_MCADDR,</div><div class='add'>+#define RTNLGRP_IPV6_MCADDR	RTNLGRP_IPV6_MCADDR</div><div class='add'>+	RTNLGRP_IPV6_ACADDR,</div><div class='add'>+#define RTNLGRP_IPV6_ACADDR	RTNLGRP_IPV6_ACADDR</div><div class='add'>+	__RTNLGRP_MAX</div><div class='add'>+};</div><div class='add'>+#define RTNLGRP_MAX	(__RTNLGRP_MAX - 1)</div><div class='add'>+</div><div class='add'>+/* TC action piece */</div><div class='add'>+struct tcamsg {</div><div class='add'>+	unsigned char	tca_family;</div><div class='add'>+	unsigned char	tca__pad1;</div><div class='add'>+	unsigned short	tca__pad2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	TCA_ROOT_UNSPEC,</div><div class='add'>+	TCA_ROOT_TAB,</div><div class='add'>+#define TCA_ACT_TAB TCA_ROOT_TAB</div><div class='add'>+#define TCAA_MAX TCA_ROOT_TAB</div><div class='add'>+	TCA_ROOT_FLAGS,</div><div class='add'>+	TCA_ROOT_COUNT,</div><div class='add'>+	TCA_ROOT_TIME_DELTA, /* in msecs */</div><div class='add'>+	TCA_ROOT_EXT_WARN_MSG,</div><div class='add'>+	__TCA_ROOT_MAX,</div><div class='add'>+#define	TCA_ROOT_MAX (__TCA_ROOT_MAX - 1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define TA_RTA(r)  ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct tcamsg))))</div><div class='add'>+#define TA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct tcamsg))</div><div class='add'>+/* tcamsg flags stored in attribute TCA_ROOT_FLAGS</div><div class='add'>+ *</div><div class='add'>+ * TCA_ACT_FLAG_LARGE_DUMP_ON user-&gt;kernel to request for larger than</div><div class='add'>+ * TCA_ACT_MAX_PRIO actions in a dump. All dump responses will contain the</div><div class='add'>+ * number of actions being dumped stored in for user app's consumption in</div><div class='add'>+ * TCA_ROOT_COUNT</div><div class='add'>+ *</div><div class='add'>+ * TCA_ACT_FLAG_TERSE_DUMP user-&gt;kernel to request terse (brief) dump that only</div><div class='add'>+ * includes essential action info (kind, index, etc.)</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#define TCA_FLAG_LARGE_DUMP_ON		(1 &lt;&lt; 0)</div><div class='add'>+#define TCA_ACT_FLAG_LARGE_DUMP_ON	TCA_FLAG_LARGE_DUMP_ON</div><div class='add'>+#define TCA_ACT_FLAG_TERSE_DUMP		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+/* New extended info filters for IFLA_EXT_MASK */</div><div class='add'>+#define RTEXT_FILTER_VF		(1 &lt;&lt; 0)</div><div class='add'>+#define RTEXT_FILTER_BRVLAN	(1 &lt;&lt; 1)</div><div class='add'>+#define RTEXT_FILTER_BRVLAN_COMPRESSED	(1 &lt;&lt; 2)</div><div class='add'>+#define	RTEXT_FILTER_SKIP_STATS	(1 &lt;&lt; 3)</div><div class='add'>+#define RTEXT_FILTER_MRP	(1 &lt;&lt; 4)</div><div class='add'>+#define RTEXT_FILTER_CFM_CONFIG	(1 &lt;&lt; 5)</div><div class='add'>+#define RTEXT_FILTER_CFM_STATUS	(1 &lt;&lt; 6)</div><div class='add'>+#define RTEXT_FILTER_MST	(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+/* End of information exported to user level */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI__LINUX_RTNETLINK_H */</div><div class='head'>diff --git a/tools/lib/bpf/Build b/tools/lib/bpf/Build<br/>index e2cd558ca0b4..c80204bb72a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/Build</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-libbpf-y := libbpf.o bpf.o nlattr.o btf.o libbpf_errno.o str_error.o \</div><div class='add'>+libbpf-y := libbpf.o bpf.o nlattr.o btf.o libbpf_utils.o \</div><div class='ctx'> 	    netlink.o bpf_prog_linfo.o libbpf_probes.o hashmap.o \</div><div class='ctx'> 	    btf_dump.o ringbuf.o strset.o linker.o gen_loader.o relo_core.o \</div><div class='ctx'> 	    usdt.o zip.o elf.o features.o btf_iter.o btf_relocate.o</div><div class='head'>diff --git a/tools/lib/bpf/bpf.c b/tools/lib/bpf/bpf.c<br/>index ab40dbf9f020..b66f5fbfbbb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/bpf.c</a></div><div class='hunk'>@@ -154,7 +154,7 @@ int bump_rlimit_memlock(void)</div><div class='ctx'> </div><div class='ctx'> 	memlock_bumped = true;</div><div class='ctx'> </div><div class='del'>-	/* zero memlock_rlim_max disables auto-bumping RLIMIT_MEMLOCK */</div><div class='add'>+	/* zero memlock_rlim disables auto-bumping RLIMIT_MEMLOCK */</div><div class='ctx'> 	if (memlock_rlim == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -172,7 +172,7 @@ int bpf_map_create(enum bpf_map_type map_type,</div><div class='ctx'> 		   __u32 max_entries,</div><div class='ctx'> 		   const struct bpf_map_create_opts *opts)</div><div class='ctx'> {</div><div class='del'>-	const size_t attr_sz = offsetofend(union bpf_attr, map_token_fd);</div><div class='add'>+	const size_t attr_sz = offsetofend(union bpf_attr, excl_prog_hash_size);</div><div class='ctx'> 	union bpf_attr attr;</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='hunk'>@@ -203,6 +203,8 @@ int bpf_map_create(enum bpf_map_type map_type,</div><div class='ctx'> 	attr.map_ifindex = OPTS_GET(opts, map_ifindex, 0);</div><div class='ctx'> </div><div class='ctx'> 	attr.map_token_fd = OPTS_GET(opts, token_fd, 0);</div><div class='add'>+	attr.excl_prog_hash = ptr_to_u64(OPTS_GET(opts, excl_prog_hash, NULL));</div><div class='add'>+	attr.excl_prog_hash_size = OPTS_GET(opts, excl_prog_hash_size, 0);</div><div class='ctx'> </div><div class='ctx'> 	fd = sys_bpf_fd(BPF_MAP_CREATE, &amp;attr, attr_sz);</div><div class='ctx'> 	return libbpf_err_errno(fd);</div><div class='hunk'>@@ -238,7 +240,7 @@ int bpf_prog_load(enum bpf_prog_type prog_type,</div><div class='ctx'> 		  const struct bpf_insn *insns, size_t insn_cnt,</div><div class='ctx'> 		  struct bpf_prog_load_opts *opts)</div><div class='ctx'> {</div><div class='del'>-	const size_t attr_sz = offsetofend(union bpf_attr, fd_array_cnt);</div><div class='add'>+	const size_t attr_sz = offsetofend(union bpf_attr, keyring_id);</div><div class='ctx'> 	void *finfo = NULL, *linfo = NULL;</div><div class='ctx'> 	const char *func_info, *line_info;</div><div class='ctx'> 	__u32 log_size, log_level, attach_prog_fd, attach_btf_obj_fd;</div><div class='head'>diff --git a/tools/lib/bpf/bpf.h b/tools/lib/bpf/bpf.h<br/>index 7252150e7ad3..e983a3e40d61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/bpf.h</a></div><div class='hunk'>@@ -54,9 +54,12 @@ struct bpf_map_create_opts {</div><div class='ctx'> 	__s32 value_type_btf_obj_fd;</div><div class='ctx'> </div><div class='ctx'> 	__u32 token_fd;</div><div class='add'>+</div><div class='add'>+	const void *excl_prog_hash;</div><div class='add'>+	__u32 excl_prog_hash_size;</div><div class='ctx'> 	size_t :0;</div><div class='ctx'> };</div><div class='del'>-#define bpf_map_create_opts__last_field token_fd</div><div class='add'>+#define bpf_map_create_opts__last_field excl_prog_hash_size</div><div class='ctx'> </div><div class='ctx'> LIBBPF_API int bpf_map_create(enum bpf_map_type map_type,</div><div class='ctx'> 			      const char *map_name,</div><div class='head'>diff --git a/tools/lib/bpf/bpf_gen_internal.h b/tools/lib/bpf/bpf_gen_internal.h<br/>index 6ff963a491d9..49af4260b8e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_gen_internal.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_gen_internal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_gen_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/bpf_gen_internal.h</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #define __BPF_GEN_INTERNAL_H</div><div class='ctx'> </div><div class='ctx'> #include "bpf.h"</div><div class='add'>+#include "libbpf_internal.h"</div><div class='ctx'> </div><div class='ctx'> struct ksym_relo_desc {</div><div class='ctx'> 	const char *name;</div><div class='hunk'>@@ -50,6 +51,7 @@ struct bpf_gen {</div><div class='ctx'> 	__u32 nr_ksyms;</div><div class='ctx'> 	int fd_array;</div><div class='ctx'> 	int nr_fd_array;</div><div class='add'>+	int hash_insn_offset[SHA256_DWORD_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void bpf_gen__init(struct bpf_gen *gen, int log_level, int nr_progs, int nr_maps);</div><div class='head'>diff --git a/tools/lib/bpf/bpf_helpers.h b/tools/lib/bpf/bpf_helpers.h<br/>index 80c028540656..d4e4e388e625 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_helpers.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_helpers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_helpers.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/bpf_helpers.h</a></div><div class='hunk'>@@ -315,20 +315,20 @@ enum libbpf_tristate {</div><div class='ctx'> 			  ___param, sizeof(___param));		\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-extern int bpf_stream_vprintk(int stream_id, const char *fmt__str, const void *args,</div><div class='del'>-			      __u32 len__sz, void *aux__prog) __weak __ksym;</div><div class='del'>-</div><div class='del'>-#define bpf_stream_printk(stream_id, fmt, args...)				\</div><div class='del'>-({										\</div><div class='del'>-	static const char ___fmt[] = fmt;					\</div><div class='del'>-	unsigned long long ___param[___bpf_narg(args)];				\</div><div class='del'>-										\</div><div class='del'>-	_Pragma("GCC diagnostic push")						\</div><div class='del'>-	_Pragma("GCC diagnostic ignored \"-Wint-conversion\"")			\</div><div class='del'>-	___bpf_fill(___param, args);						\</div><div class='del'>-	_Pragma("GCC diagnostic pop")						\</div><div class='del'>-										\</div><div class='del'>-	bpf_stream_vprintk(stream_id, ___fmt, ___param, sizeof(___param), NULL);\</div><div class='add'>+extern int bpf_stream_vprintk_impl(int stream_id, const char *fmt__str, const void *args,</div><div class='add'>+				   __u32 len__sz, void *aux__prog) __weak __ksym;</div><div class='add'>+</div><div class='add'>+#define bpf_stream_printk(stream_id, fmt, args...)					\</div><div class='add'>+({											\</div><div class='add'>+	static const char ___fmt[] = fmt;						\</div><div class='add'>+	unsigned long long ___param[___bpf_narg(args)];					\</div><div class='add'>+											\</div><div class='add'>+	_Pragma("GCC diagnostic push")							\</div><div class='add'>+	_Pragma("GCC diagnostic ignored \"-Wint-conversion\"")				\</div><div class='add'>+	___bpf_fill(___param, args);							\</div><div class='add'>+	_Pragma("GCC diagnostic pop")							\</div><div class='add'>+											\</div><div class='add'>+	bpf_stream_vprintk_impl(stream_id, ___fmt, ___param, sizeof(___param), NULL);	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /* Use __bpf_printk when bpf_printk call has 3 or fewer fmt args</div><div class='head'>diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h<br/>index a8f6cd4841b0..dbe32a5d02cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_tracing.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/bpf_tracing.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/bpf_tracing.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/bpf_tracing.h</a></div><div class='hunk'>@@ -311,7 +311,7 @@ struct pt_regs___arm64 {</div><div class='ctx'> #define __PT_RET_REG regs[31]</div><div class='ctx'> #define __PT_FP_REG __unsupported__</div><div class='ctx'> #define __PT_RC_REG gpr[3]</div><div class='del'>-#define __PT_SP_REG sp</div><div class='add'>+#define __PT_SP_REG gpr[1]</div><div class='ctx'> #define __PT_IP_REG nip</div><div class='ctx'> </div><div class='ctx'> #elif defined(bpf_target_sparc)</div><div class='head'>diff --git a/tools/lib/bpf/btf.c b/tools/lib/bpf/btf.c<br/>index 37682908cb0f..84a4b0abc8be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/btf.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #include "hashmap.h"</div><div class='ctx'> #include "strset.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> #define BTF_MAX_NR_TYPES 0x7fffffffU</div><div class='ctx'> #define BTF_MAX_STR_OFFSET 0x7fffffffU</div><div class='hunk'>@@ -1062,7 +1061,7 @@ static struct btf *btf_new(const void *data, __u32 size, struct btf *base_btf, b</div><div class='ctx'> 	if (base_btf) {</div><div class='ctx'> 		btf-&gt;base_btf = base_btf;</div><div class='ctx'> 		btf-&gt;start_id = btf__type_cnt(base_btf);</div><div class='del'>-		btf-&gt;start_str_off = base_btf-&gt;hdr-&gt;str_len;</div><div class='add'>+		btf-&gt;start_str_off = base_btf-&gt;hdr-&gt;str_len + base_btf-&gt;start_str_off;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (is_mmap) {</div><div class='hunk'>@@ -3902,6 +3901,20 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Calculate type signature hash of TYPEDEF, ignoring referenced type IDs,</div><div class='add'>+ * as referenced type IDs equivalence is established separately during type</div><div class='add'>+ * graph equivalence check algorithm.</div><div class='add'>+ */</div><div class='add'>+static long btf_hash_typedef(struct btf_type *t)</div><div class='add'>+{</div><div class='add'>+	long h;</div><div class='add'>+</div><div class='add'>+	h = hash_combine(0, t-&gt;name_off);</div><div class='add'>+	h = hash_combine(h, t-&gt;info);</div><div class='add'>+	return h;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static long btf_hash_common(struct btf_type *t)</div><div class='ctx'> {</div><div class='ctx'> 	long h;</div><div class='hunk'>@@ -3919,6 +3932,13 @@ static bool btf_equal_common(struct btf_type *t1, struct btf_type *t2)</div><div class='ctx'> 	       t1-&gt;size == t2-&gt;size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Check structural compatibility of two TYPEDEF. */</div><div class='add'>+static bool btf_equal_typedef(struct btf_type *t1, struct btf_type *t2)</div><div class='add'>+{</div><div class='add'>+	return t1-&gt;name_off == t2-&gt;name_off &amp;&amp;</div><div class='add'>+	       t1-&gt;info == t2-&gt;info;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Calculate type signature hash of INT or TAG. */</div><div class='ctx'> static long btf_hash_int_decl_tag(struct btf_type *t)</div><div class='ctx'> {</div><div class='hunk'>@@ -4845,13 +4865,30 @@ static void btf_dedup_merge_hypot_map(struct btf_dedup *d)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline long btf_hash_by_kind(struct btf_type *t, __u16 kind)</div><div class='add'>+{</div><div class='add'>+	if (kind == BTF_KIND_TYPEDEF)</div><div class='add'>+		return btf_hash_typedef(t);</div><div class='add'>+	else</div><div class='add'>+		return btf_hash_struct(t);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool btf_equal_by_kind(struct btf_type *t1, struct btf_type *t2, __u16 kind)</div><div class='add'>+{</div><div class='add'>+	if (kind == BTF_KIND_TYPEDEF)</div><div class='add'>+		return btf_equal_typedef(t1, t2);</div><div class='add'>+	else</div><div class='add'>+		return btf_shallow_equal_struct(t1, t2);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * Deduplicate struct/union types.</div><div class='add'>+ * Deduplicate struct/union and typedef types.</div><div class='ctx'>  *</div><div class='ctx'>  * For each struct/union type its type signature hash is calculated, taking</div><div class='ctx'>  * into account type's name, size, number, order and names of fields, but</div><div class='ctx'>  * ignoring type ID's referenced from fields, because they might not be deduped</div><div class='del'>- * completely until after reference types deduplication phase. This type hash</div><div class='add'>+ * completely until after reference types deduplication phase. For each typedef</div><div class='add'>+ * type, the hash is computed based on the type’s name and size. This type hash</div><div class='ctx'>  * is used to iterate over all potential canonical types, sharing same hash.</div><div class='ctx'>  * For each canonical candidate we check whether type graphs that they form</div><div class='ctx'>  * (through referenced types in fields and so on) are equivalent using algorithm</div><div class='hunk'>@@ -4883,18 +4920,20 @@ static int btf_dedup_struct_type(struct btf_dedup *d, __u32 type_id)</div><div class='ctx'> 	t = btf_type_by_id(d-&gt;btf, type_id);</div><div class='ctx'> 	kind = btf_kind(t);</div><div class='ctx'> </div><div class='del'>-	if (kind != BTF_KIND_STRUCT &amp;&amp; kind != BTF_KIND_UNION)</div><div class='add'>+	if (kind != BTF_KIND_STRUCT &amp;&amp;</div><div class='add'>+		kind != BTF_KIND_UNION &amp;&amp;</div><div class='add'>+		kind != BTF_KIND_TYPEDEF)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	h = btf_hash_struct(t);</div><div class='add'>+	h = btf_hash_by_kind(t, kind);</div><div class='ctx'> 	for_each_dedup_cand(d, hash_entry, h) {</div><div class='ctx'> 		__u32 cand_id = hash_entry-&gt;value;</div><div class='ctx'> 		int eq;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Even though btf_dedup_is_equiv() checks for</div><div class='del'>-		 * btf_shallow_equal_struct() internally when checking two</div><div class='del'>-		 * structs (unions) for equivalence, we need to guard here</div><div class='add'>+		 * btf_equal_by_kind() internally when checking two</div><div class='add'>+		 * structs (unions) or typedefs for equivalence, we need to guard here</div><div class='ctx'> 		 * from picking matching FWD type as a dedup candidate.</div><div class='ctx'> 		 * This can happen due to hash collision. In such case just</div><div class='ctx'> 		 * relying on btf_dedup_is_equiv() would lead to potentially</div><div class='hunk'>@@ -4902,7 +4941,7 @@ static int btf_dedup_struct_type(struct btf_dedup *d, __u32 type_id)</div><div class='ctx'> 		 * FWD and compatible STRUCT/UNION are considered equivalent.</div><div class='ctx'> 		 */</div><div class='ctx'> 		cand_type = btf_type_by_id(d-&gt;btf, cand_id);</div><div class='del'>-		if (!btf_shallow_equal_struct(t, cand_type))</div><div class='add'>+		if (!btf_equal_by_kind(t, cand_type, kind))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		btf_dedup_clear_hypot_map(d);</div><div class='hunk'>@@ -4940,18 +4979,18 @@ static int btf_dedup_struct_types(struct btf_dedup *d)</div><div class='ctx'> /*</div><div class='ctx'>  * Deduplicate reference type.</div><div class='ctx'>  *</div><div class='del'>- * Once all primitive and struct/union types got deduplicated, we can easily</div><div class='add'>+ * Once all primitive, struct/union and typedef types got deduplicated, we can easily</div><div class='ctx'>  * deduplicate all other (reference) BTF types. This is done in two steps:</div><div class='ctx'>  *</div><div class='ctx'>  * 1. Resolve all referenced type IDs into their canonical type IDs. This</div><div class='del'>- * resolution can be done either immediately for primitive or struct/union types</div><div class='del'>- * (because they were deduped in previous two phases) or recursively for</div><div class='add'>+ * resolution can be done either immediately for primitive, struct/union, and typedef</div><div class='add'>+ * types (because they were deduped in previous two phases) or recursively for</div><div class='ctx'>  * reference types. Recursion will always terminate at either primitive or</div><div class='del'>- * struct/union type, at which point we can "unwind" chain of reference types</div><div class='del'>- * one by one. There is no danger of encountering cycles because in C type</div><div class='del'>- * system the only way to form type cycle is through struct/union, so any chain</div><div class='del'>- * of reference types, even those taking part in a type cycle, will inevitably</div><div class='del'>- * reach struct/union at some point.</div><div class='add'>+ * struct/union and typedef types, at which point we can "unwind" chain of reference</div><div class='add'>+ * types one by one. There is no danger of encountering cycles in C, as the only way to</div><div class='add'>+ * form a type cycle is through struct or union types. Go can form such cycles through</div><div class='add'>+ * typedef. Thus, any chain of reference types, even those taking part in a type cycle,</div><div class='add'>+ * will inevitably reach a struct/union or typedef type at some point.</div><div class='ctx'>  *</div><div class='ctx'>  * 2. Once all referenced type IDs are resolved into canonical ones, BTF type</div><div class='ctx'>  * becomes "stable", in the sense that no further deduplication will cause</div><div class='hunk'>@@ -4983,7 +5022,6 @@ static int btf_dedup_ref_type(struct btf_dedup *d, __u32 type_id)</div><div class='ctx'> 	case BTF_KIND_VOLATILE:</div><div class='ctx'> 	case BTF_KIND_RESTRICT:</div><div class='ctx'> 	case BTF_KIND_PTR:</div><div class='del'>-	case BTF_KIND_TYPEDEF:</div><div class='ctx'> 	case BTF_KIND_FUNC:</div><div class='ctx'> 	case BTF_KIND_TYPE_TAG:</div><div class='ctx'> 		ref_type_id = btf_dedup_ref_type(d, t-&gt;type);</div><div class='hunk'>@@ -5819,7 +5857,7 @@ void btf_set_base_btf(struct btf *btf, const struct btf *base_btf)</div><div class='ctx'> {</div><div class='ctx'> 	btf-&gt;base_btf = (struct btf *)base_btf;</div><div class='ctx'> 	btf-&gt;start_id = btf__type_cnt(base_btf);</div><div class='del'>-	btf-&gt;start_str_off = base_btf-&gt;hdr-&gt;str_len;</div><div class='add'>+	btf-&gt;start_str_off = base_btf-&gt;hdr-&gt;str_len + base_btf-&gt;start_str_off;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int btf__relocate(struct btf *btf, const struct btf *base_btf)</div><div class='head'>diff --git a/tools/lib/bpf/btf.h b/tools/lib/bpf/btf.h<br/>index ccfd905f03df..cc01494d6210 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/btf.h</a></div><div class='hunk'>@@ -94,6 +94,7 @@ LIBBPF_API struct btf *btf__new_empty(void);</div><div class='ctx'>  * @brief **btf__new_empty_split()** creates an unpopulated BTF object from an</div><div class='ctx'>  * ELF BTF section except with a base BTF on top of which split BTF should be</div><div class='ctx'>  * based</div><div class='add'>+ * @param base_btf base BTF object</div><div class='ctx'>  * @return new BTF object instance which has to be eventually freed with</div><div class='ctx'>  * **btf__free()**</div><div class='ctx'>  *</div><div class='hunk'>@@ -115,6 +116,10 @@ LIBBPF_API struct btf *btf__new_empty_split(struct btf *base_btf);</div><div class='ctx'>  * When that split BTF is loaded against a (possibly changed) base, this</div><div class='ctx'>  * distilled base BTF will help update references to that (possibly changed)</div><div class='ctx'>  * base BTF.</div><div class='add'>+ * @param src_btf source split BTF object</div><div class='add'>+ * @param new_base_btf pointer to where the new base BTF object pointer will be stored</div><div class='add'>+ * @param new_split_btf pointer to where the new split BTF object pointer will be stored</div><div class='add'>+ * @return 0 on success; negative error code, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * Both the new split and its associated new base BTF must be freed by</div><div class='ctx'>  * the caller.</div><div class='hunk'>@@ -264,6 +269,9 @@ LIBBPF_API int btf__dedup(struct btf *btf, const struct btf_dedup_opts *opts);</div><div class='ctx'>  * to base BTF kinds, and verify those references are compatible with</div><div class='ctx'>  * *base_btf*; if they are, *btf* is adjusted such that is re-parented to</div><div class='ctx'>  * *base_btf* and type ids and strings are adjusted to accommodate this.</div><div class='add'>+ * @param btf split BTF object to relocate</div><div class='add'>+ * @param base_btf base BTF object</div><div class='add'>+ * @return 0 on success; negative error code, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * If successful, 0 is returned and **btf** now has **base_btf** as its</div><div class='ctx'>  * base.</div><div class='head'>diff --git a/tools/lib/bpf/btf_dump.c b/tools/lib/bpf/btf_dump.c<br/>index f09f25eccf3c..6388392f49a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf_dump.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/btf_dump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/btf_dump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/btf_dump.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include "hashmap.h"</div><div class='ctx'> #include "libbpf.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> static const char PREFIXES[] = "\t\t\t\t\t\t\t\t\t\t\t\t\t";</div><div class='ctx'> static const size_t PREFIX_CNT = sizeof(PREFIXES) - 1;</div><div class='head'>diff --git a/tools/lib/bpf/elf.c b/tools/lib/bpf/elf.c<br/>index 823f83ad819c..295dbda24580 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/elf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/elf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/elf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/elf.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "libbpf_internal.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> /* A SHT_GNU_versym section holds 16-bit words. This bit is set if</div><div class='ctx'>  * the symbol is hidden and can only be seen when referenced using an</div><div class='head'>diff --git a/tools/lib/bpf/features.c b/tools/lib/bpf/features.c<br/>index 760657f5224c..b842b83e2480 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/features.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/features.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/features.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/features.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> #include "libbpf.h"</div><div class='ctx'> #include "libbpf_common.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> static inline __u64 ptr_to_u64(const void *ptr)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/lib/bpf/gen_loader.c b/tools/lib/bpf/gen_loader.c<br/>index 113ae4abd345..cd5c2543f54d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/gen_loader.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/gen_loader.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/gen_loader.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/gen_loader.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;sys/param.h&gt;</div><div class='ctx'> #include "btf.h"</div><div class='hunk'>@@ -13,8 +14,6 @@</div><div class='ctx'> #include "hashmap.h"</div><div class='ctx'> #include "bpf_gen_internal.h"</div><div class='ctx'> #include "skel_internal.h"</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_USED_MAPS	64</div><div class='ctx'> #define MAX_USED_PROGS	32</div><div class='hunk'>@@ -110,6 +109,7 @@ static void emit2(struct bpf_gen *gen, struct bpf_insn insn1, struct bpf_insn in</div><div class='ctx'> </div><div class='ctx'> static int add_data(struct bpf_gen *gen, const void *data, __u32 size);</div><div class='ctx'> static void emit_sys_close_blob(struct bpf_gen *gen, int blob_off);</div><div class='add'>+static void emit_signature_match(struct bpf_gen *gen);</div><div class='ctx'> </div><div class='ctx'> void bpf_gen__init(struct bpf_gen *gen, int log_level, int nr_progs, int nr_maps)</div><div class='ctx'> {</div><div class='hunk'>@@ -152,6 +152,8 @@ void bpf_gen__init(struct bpf_gen *gen, int log_level, int nr_progs, int nr_maps</div><div class='ctx'> 	/* R7 contains the error code from sys_bpf. Copy it into R0 and exit. */</div><div class='ctx'> 	emit(gen, BPF_MOV64_REG(BPF_REG_0, BPF_REG_7));</div><div class='ctx'> 	emit(gen, BPF_EXIT_INSN());</div><div class='add'>+	if (OPTS_GET(gen-&gt;opts, gen_hash, false))</div><div class='add'>+		emit_signature_match(gen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int add_data(struct bpf_gen *gen, const void *data, __u32 size)</div><div class='hunk'>@@ -368,6 +370,8 @@ static void emit_sys_close_blob(struct bpf_gen *gen, int blob_off)</div><div class='ctx'> 	__emit_sys_close(gen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void compute_sha_update_offsets(struct bpf_gen *gen);</div><div class='add'>+</div><div class='ctx'> int bpf_gen__finish(struct bpf_gen *gen, int nr_progs, int nr_maps)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -394,6 +398,9 @@ int bpf_gen__finish(struct bpf_gen *gen, int nr_progs, int nr_maps)</div><div class='ctx'> 			      blob_fd_array_off(gen, i));</div><div class='ctx'> 	emit(gen, BPF_MOV64_IMM(BPF_REG_0, 0));</div><div class='ctx'> 	emit(gen, BPF_EXIT_INSN());</div><div class='add'>+	if (OPTS_GET(gen-&gt;opts, gen_hash, false))</div><div class='add'>+		compute_sha_update_offsets(gen);</div><div class='add'>+</div><div class='ctx'> 	pr_debug("gen: finish %s\n", errstr(gen-&gt;error));</div><div class='ctx'> 	if (!gen-&gt;error) {</div><div class='ctx'> 		struct gen_loader_opts *opts = gen-&gt;opts;</div><div class='hunk'>@@ -446,6 +453,22 @@ void bpf_gen__free(struct bpf_gen *gen)</div><div class='ctx'> 	_val;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+static void compute_sha_update_offsets(struct bpf_gen *gen)</div><div class='add'>+{</div><div class='add'>+	__u64 sha[SHA256_DWORD_SIZE];</div><div class='add'>+	__u64 sha_dw;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	libbpf_sha256(gen-&gt;data_start, gen-&gt;data_cur - gen-&gt;data_start, (__u8 *)sha);</div><div class='add'>+	for (i = 0; i &lt; SHA256_DWORD_SIZE; i++) {</div><div class='add'>+		struct bpf_insn *insn =</div><div class='add'>+			(struct bpf_insn *)(gen-&gt;insn_start + gen-&gt;hash_insn_offset[i]);</div><div class='add'>+		sha_dw = tgt_endian(sha[i]);</div><div class='add'>+		insn[0].imm = (__u32)sha_dw;</div><div class='add'>+		insn[1].imm = sha_dw &gt;&gt; 32;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bpf_gen__load_btf(struct bpf_gen *gen, const void *btf_raw_data,</div><div class='ctx'> 		       __u32 btf_raw_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -557,6 +580,29 @@ void bpf_gen__map_create(struct bpf_gen *gen,</div><div class='ctx'> 		emit_sys_close_stack(gen, stack_off(inner_map_fd));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void emit_signature_match(struct bpf_gen *gen)</div><div class='add'>+{</div><div class='add'>+	__s64 off;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SHA256_DWORD_SIZE; i++) {</div><div class='add'>+		emit2(gen, BPF_LD_IMM64_RAW_FULL(BPF_REG_1, BPF_PSEUDO_MAP_IDX,</div><div class='add'>+						 0, 0, 0, 0));</div><div class='add'>+		emit(gen, BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_1, i * sizeof(__u64)));</div><div class='add'>+		gen-&gt;hash_insn_offset[i] = gen-&gt;insn_cur - gen-&gt;insn_start;</div><div class='add'>+		emit2(gen, BPF_LD_IMM64_RAW_FULL(BPF_REG_3, 0, 0, 0, 0, 0));</div><div class='add'>+</div><div class='add'>+		off =  -(gen-&gt;insn_cur - gen-&gt;insn_start - gen-&gt;cleanup_label) / 8 - 1;</div><div class='add'>+		if (is_simm16(off)) {</div><div class='add'>+			emit(gen, BPF_MOV64_IMM(BPF_REG_7, -EINVAL));</div><div class='add'>+			emit(gen, BPF_JMP_REG(BPF_JNE, BPF_REG_2, BPF_REG_3, off));</div><div class='add'>+		} else {</div><div class='add'>+			gen-&gt;error = -ERANGE;</div><div class='add'>+			emit(gen, BPF_JMP_IMM(BPF_JA, 0, 0, -1));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bpf_gen__record_attach_target(struct bpf_gen *gen, const char *attach_name,</div><div class='ctx'> 				   enum bpf_attach_type type)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/lib/bpf/libbpf.c b/tools/lib/bpf/libbpf.c<br/>index 8f5a81b672e1..3dc8a8078815 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf.c</a></div><div class='hunk'>@@ -50,7 +50,6 @@</div><div class='ctx'> #include "libbpf.h"</div><div class='ctx'> #include "bpf.h"</div><div class='ctx'> #include "btf.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #include "hashmap.h"</div><div class='ctx'> #include "bpf_gen_internal.h"</div><div class='hunk'>@@ -191,6 +190,7 @@ static const char * const map_type_name[] = {</div><div class='ctx'> 	[BPF_MAP_TYPE_USER_RINGBUF]             = "user_ringbuf",</div><div class='ctx'> 	[BPF_MAP_TYPE_CGRP_STORAGE]		= "cgrp_storage",</div><div class='ctx'> 	[BPF_MAP_TYPE_ARENA]			= "arena",</div><div class='add'>+	[BPF_MAP_TYPE_INSN_ARRAY]		= "insn_array",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const prog_type_name[] = {</div><div class='hunk'>@@ -318,8 +318,6 @@ static void pr_perm_msg(int err)</div><div class='ctx'> 		buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define STRERR_BUFSIZE  128</div><div class='del'>-</div><div class='ctx'> /* Copied from tools/perf/util/util.h */</div><div class='ctx'> #ifndef zfree</div><div class='ctx'> # define zfree(ptr) ({ free(*ptr); *ptr = NULL; })</div><div class='hunk'>@@ -372,6 +370,7 @@ enum reloc_type {</div><div class='ctx'> 	RELO_EXTERN_CALL,</div><div class='ctx'> 	RELO_SUBPROG_ADDR,</div><div class='ctx'> 	RELO_CORE,</div><div class='add'>+	RELO_INSN_ARRAY,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct reloc_desc {</div><div class='hunk'>@@ -382,7 +381,16 @@ struct reloc_desc {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			int map_idx;</div><div class='ctx'> 			int sym_off;</div><div class='del'>-			int ext_idx;</div><div class='add'>+			/*</div><div class='add'>+			 * The following two fields can be unionized, as the</div><div class='add'>+			 * ext_idx field is used for extern symbols, and the</div><div class='add'>+			 * sym_size is used for jump tables, which are never</div><div class='add'>+			 * extern</div><div class='add'>+			 */</div><div class='add'>+			union {</div><div class='add'>+				int ext_idx;</div><div class='add'>+				int sym_size;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -424,6 +432,11 @@ struct bpf_sec_def {</div><div class='ctx'> 	libbpf_prog_attach_fn_t prog_attach_fn;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bpf_light_subprog {</div><div class='add'>+	__u32 sec_insn_off;</div><div class='add'>+	__u32 sub_insn_off;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * bpf_prog should be a better name but it has been used in</div><div class='ctx'>  * linux/filter.h.</div><div class='hunk'>@@ -496,6 +509,10 @@ struct bpf_program {</div><div class='ctx'> 	__u32 line_info_rec_size;</div><div class='ctx'> 	__u32 line_info_cnt;</div><div class='ctx'> 	__u32 prog_flags;</div><div class='add'>+	__u8  hash[SHA256_DIGEST_LENGTH];</div><div class='add'>+</div><div class='add'>+	struct bpf_light_subprog *subprogs;</div><div class='add'>+	__u32 subprog_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bpf_struct_ops {</div><div class='hunk'>@@ -575,6 +592,7 @@ struct bpf_map {</div><div class='ctx'> 	bool autocreate;</div><div class='ctx'> 	bool autoattach;</div><div class='ctx'> 	__u64 map_extra;</div><div class='add'>+	struct bpf_program *excl_prog;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum extern_type {</div><div class='hunk'>@@ -668,6 +686,7 @@ struct elf_state {</div><div class='ctx'> 	int symbols_shndx;</div><div class='ctx'> 	bool has_st_ops;</div><div class='ctx'> 	int arena_data_shndx;</div><div class='add'>+	int jumptables_data_shndx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct usdt_manager;</div><div class='hunk'>@@ -739,6 +758,16 @@ struct bpf_object {</div><div class='ctx'> 	void *arena_data;</div><div class='ctx'> 	size_t arena_data_sz;</div><div class='ctx'> </div><div class='add'>+	void *jumptables_data;</div><div class='add'>+	size_t jumptables_data_sz;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct bpf_program *prog;</div><div class='add'>+		int sym_off;</div><div class='add'>+		int fd;</div><div class='add'>+	} *jumptable_maps;</div><div class='add'>+	size_t jumptable_map_cnt;</div><div class='add'>+</div><div class='ctx'> 	struct kern_feature_cache *feat_cache;</div><div class='ctx'> 	char *token_path;</div><div class='ctx'> 	int token_fd;</div><div class='hunk'>@@ -765,6 +794,7 @@ void bpf_program__unload(struct bpf_program *prog)</div><div class='ctx'> </div><div class='ctx'> 	zfree(&amp;prog-&gt;func_info);</div><div class='ctx'> 	zfree(&amp;prog-&gt;line_info);</div><div class='add'>+	zfree(&amp;prog-&gt;subprogs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bpf_program__exit(struct bpf_program *prog)</div><div class='hunk'>@@ -1013,35 +1043,33 @@ find_struct_ops_kern_types(struct bpf_object *obj, const char *tname_raw,</div><div class='ctx'> 	const struct btf_member *kern_data_member;</div><div class='ctx'> 	struct btf *btf = NULL;</div><div class='ctx'> 	__s32 kern_vtype_id, kern_type_id;</div><div class='del'>-	char tname[256];</div><div class='add'>+	char tname[192], stname[256];</div><div class='ctx'> 	__u32 i;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(tname, sizeof(tname), "%.*s",</div><div class='ctx'> 		 (int)bpf_core_essential_name_len(tname_raw), tname_raw);</div><div class='ctx'> </div><div class='del'>-	kern_type_id = find_ksym_btf_id(obj, tname, BTF_KIND_STRUCT,</div><div class='del'>-					&amp;btf, mod_btf);</div><div class='del'>-	if (kern_type_id &lt; 0) {</div><div class='del'>-		pr_warn("struct_ops init_kern: struct %s is not found in kernel BTF\n",</div><div class='del'>-			tname);</div><div class='del'>-		return kern_type_id;</div><div class='del'>-	}</div><div class='del'>-	kern_type = btf__type_by_id(btf, kern_type_id);</div><div class='add'>+	snprintf(stname, sizeof(stname), "%s%s", STRUCT_OPS_VALUE_PREFIX, tname);</div><div class='ctx'> </div><div class='del'>-	/* Find the corresponding "map_value" type that will be used</div><div class='del'>-	 * in map_update(BPF_MAP_TYPE_STRUCT_OPS).  For example,</div><div class='del'>-	 * find "struct bpf_struct_ops_tcp_congestion_ops" from the</div><div class='del'>-	 * btf_vmlinux.</div><div class='add'>+	/* Look for the corresponding "map_value" type that will be used</div><div class='add'>+	 * in map_update(BPF_MAP_TYPE_STRUCT_OPS) first, figure out the btf</div><div class='add'>+	 * and the mod_btf.</div><div class='add'>+	 * For example, find "struct bpf_struct_ops_tcp_congestion_ops".</div><div class='ctx'> 	 */</div><div class='del'>-	kern_vtype_id = find_btf_by_prefix_kind(btf, STRUCT_OPS_VALUE_PREFIX,</div><div class='del'>-						tname, BTF_KIND_STRUCT);</div><div class='add'>+	kern_vtype_id = find_ksym_btf_id(obj, stname, BTF_KIND_STRUCT, &amp;btf, mod_btf);</div><div class='ctx'> 	if (kern_vtype_id &lt; 0) {</div><div class='del'>-		pr_warn("struct_ops init_kern: struct %s%s is not found in kernel BTF\n",</div><div class='del'>-			STRUCT_OPS_VALUE_PREFIX, tname);</div><div class='add'>+		pr_warn("struct_ops init_kern: struct %s is not found in kernel BTF\n", stname);</div><div class='ctx'> 		return kern_vtype_id;</div><div class='ctx'> 	}</div><div class='ctx'> 	kern_vtype = btf__type_by_id(btf, kern_vtype_id);</div><div class='ctx'> </div><div class='add'>+	kern_type_id = btf__find_by_name_kind(btf, tname, BTF_KIND_STRUCT);</div><div class='add'>+	if (kern_type_id &lt; 0) {</div><div class='add'>+		pr_warn("struct_ops init_kern: struct %s is not found in kernel BTF\n", tname);</div><div class='add'>+		return kern_type_id;</div><div class='add'>+	}</div><div class='add'>+	kern_type = btf__type_by_id(btf, kern_type_id);</div><div class='add'>+</div><div class='ctx'> 	/* Find "struct tcp_congestion_ops" from</div><div class='ctx'> 	 * struct bpf_struct_ops_tcp_congestion_ops {</div><div class='ctx'> 	 *	[ ... ]</div><div class='hunk'>@@ -1054,8 +1082,8 @@ find_struct_ops_kern_types(struct bpf_object *obj, const char *tname_raw,</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i == btf_vlen(kern_vtype)) {</div><div class='del'>-		pr_warn("struct_ops init_kern: struct %s data is not found in struct %s%s\n",</div><div class='del'>-			tname, STRUCT_OPS_VALUE_PREFIX, tname);</div><div class='add'>+		pr_warn("struct_ops init_kern: struct %s data is not found in struct %s\n",</div><div class='add'>+			tname, stname);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2999,7 +3027,7 @@ static int bpf_object__init_user_btf_maps(struct bpf_object *obj, bool strict,</div><div class='ctx'> </div><div class='ctx'> 	scn = elf_sec_by_idx(obj, obj-&gt;efile.btf_maps_shndx);</div><div class='ctx'> 	data = elf_sec_data(obj, scn);</div><div class='del'>-	if (!scn || !data) {</div><div class='add'>+	if (!data) {</div><div class='ctx'> 		pr_warn("elf: failed to get %s map definitions for %s\n",</div><div class='ctx'> 			MAPS_ELF_SEC, obj-&gt;path);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -3945,6 +3973,13 @@ static int bpf_object__elf_collect(struct bpf_object *obj)</div><div class='ctx'> 			} else if (strcmp(name, ARENA_SEC) == 0) {</div><div class='ctx'> 				obj-&gt;efile.arena_data = data;</div><div class='ctx'> 				obj-&gt;efile.arena_data_shndx = idx;</div><div class='add'>+			} else if (strcmp(name, JUMPTABLES_SEC) == 0) {</div><div class='add'>+				obj-&gt;jumptables_data = malloc(data-&gt;d_size);</div><div class='add'>+				if (!obj-&gt;jumptables_data)</div><div class='add'>+					return -ENOMEM;</div><div class='add'>+				memcpy(obj-&gt;jumptables_data, data-&gt;d_buf, data-&gt;d_size);</div><div class='add'>+				obj-&gt;jumptables_data_sz = data-&gt;d_size;</div><div class='add'>+				obj-&gt;efile.jumptables_data_shndx = idx;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				pr_info("elf: skipping unrecognized data section(%d) %s\n",</div><div class='ctx'> 					idx, name);</div><div class='hunk'>@@ -4485,6 +4520,44 @@ bpf_object__section_to_libbpf_map_type(const struct bpf_object *obj, int shndx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bpf_prog_compute_hash(struct bpf_program *prog)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn *purged;</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	purged = calloc(prog-&gt;insns_cnt, BPF_INSN_SZ);</div><div class='add'>+	if (!purged)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* If relocations have been done, the map_fd needs to be</div><div class='add'>+	 * discarded for the digest calculation.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; prog-&gt;insns_cnt; i++) {</div><div class='add'>+		purged[i] = prog-&gt;insns[i];</div><div class='add'>+		if (purged[i].code == (BPF_LD | BPF_IMM | BPF_DW) &amp;&amp;</div><div class='add'>+		    (purged[i].src_reg == BPF_PSEUDO_MAP_FD ||</div><div class='add'>+		     purged[i].src_reg == BPF_PSEUDO_MAP_VALUE)) {</div><div class='add'>+			purged[i].imm = 0;</div><div class='add'>+			i++;</div><div class='add'>+			if (i &gt;= prog-&gt;insns_cnt ||</div><div class='add'>+			    prog-&gt;insns[i].code != 0 ||</div><div class='add'>+			    prog-&gt;insns[i].dst_reg != 0 ||</div><div class='add'>+			    prog-&gt;insns[i].src_reg != 0 ||</div><div class='add'>+			    prog-&gt;insns[i].off != 0) {</div><div class='add'>+				err = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			purged[i] = prog-&gt;insns[i];</div><div class='add'>+			purged[i].imm = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	libbpf_sha256(purged, prog-&gt;insns_cnt * sizeof(struct bpf_insn),</div><div class='add'>+		      prog-&gt;hash);</div><div class='add'>+out:</div><div class='add'>+	free(purged);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bpf_program__record_reloc(struct bpf_program *prog,</div><div class='ctx'> 				     struct reloc_desc *reloc_desc,</div><div class='ctx'> 				     __u32 insn_idx, const char *sym_name,</div><div class='hunk'>@@ -4599,6 +4672,16 @@ static int bpf_program__record_reloc(struct bpf_program *prog,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* jump table data relocation */</div><div class='add'>+	if (shdr_idx == obj-&gt;efile.jumptables_data_shndx) {</div><div class='add'>+		reloc_desc-&gt;type = RELO_INSN_ARRAY;</div><div class='add'>+		reloc_desc-&gt;insn_idx = insn_idx;</div><div class='add'>+		reloc_desc-&gt;map_idx = -1;</div><div class='add'>+		reloc_desc-&gt;sym_off = sym-&gt;st_value;</div><div class='add'>+		reloc_desc-&gt;sym_size = sym-&gt;st_size;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* generic map reference relocation */</div><div class='ctx'> 	if (type == LIBBPF_MAP_UNSPEC) {</div><div class='ctx'> 		if (!bpf_object__shndx_is_maps(obj, shdr_idx)) {</div><div class='hunk'>@@ -5093,6 +5176,16 @@ static bool map_is_reuse_compat(const struct bpf_map *map, int map_fd)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * bpf_get_map_info_by_fd() for DEVMAP will always return flags with</div><div class='add'>+	 * BPF_F_RDONLY_PROG set, but it generally is not set at map creation time.</div><div class='add'>+	 * Thus, ignore the BPF_F_RDONLY_PROG flag in the flags returned from</div><div class='add'>+	 * bpf_get_map_info_by_fd() when checking for compatibility with an</div><div class='add'>+	 * existing DEVMAP.</div><div class='add'>+	 */</div><div class='add'>+	if (map-&gt;def.type == BPF_MAP_TYPE_DEVMAP || map-&gt;def.type == BPF_MAP_TYPE_DEVMAP_HASH)</div><div class='add'>+		map_info.map_flags &amp;= ~BPF_F_RDONLY_PROG;</div><div class='add'>+</div><div class='ctx'> 	return (map_info.type == map-&gt;def.type &amp;&amp;</div><div class='ctx'> 		map_info.key_size == map-&gt;def.key_size &amp;&amp;</div><div class='ctx'> 		map_info.value_size == map-&gt;def.value_size &amp;&amp;</div><div class='hunk'>@@ -5224,6 +5317,14 @@ static int bpf_object__create_map(struct bpf_object *obj, struct bpf_map *map, b</div><div class='ctx'> 	create_attr.token_fd = obj-&gt;token_fd;</div><div class='ctx'> 	if (obj-&gt;token_fd)</div><div class='ctx'> 		create_attr.map_flags |= BPF_F_TOKEN_FD;</div><div class='add'>+	if (map-&gt;excl_prog) {</div><div class='add'>+		err = bpf_prog_compute_hash(map-&gt;excl_prog);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		create_attr.excl_prog_hash = map-&gt;excl_prog-&gt;hash;</div><div class='add'>+		create_attr.excl_prog_hash_size = SHA256_DIGEST_LENGTH;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (bpf_map__is_struct_ops(map)) {</div><div class='ctx'> 		create_attr.btf_vmlinux_value_type_id = map-&gt;btf_vmlinux_value_type_id;</div><div class='hunk'>@@ -6091,6 +6192,157 @@ static void poison_kfunc_call(struct bpf_program *prog, int relo_idx,</div><div class='ctx'> 	insn-&gt;imm = POISON_CALL_KFUNC_BASE + ext_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int find_jt_map(struct bpf_object *obj, struct bpf_program *prog, int sym_off)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; obj-&gt;jumptable_map_cnt; i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * This might happen that same offset is used for two different</div><div class='add'>+		 * programs (as jump tables can be the same). However, for</div><div class='add'>+		 * different programs different maps should be created.</div><div class='add'>+		 */</div><div class='add'>+		if (obj-&gt;jumptable_maps[i].sym_off == sym_off &amp;&amp;</div><div class='add'>+		    obj-&gt;jumptable_maps[i].prog == prog)</div><div class='add'>+			return obj-&gt;jumptable_maps[i].fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_jt_map(struct bpf_object *obj, struct bpf_program *prog, int sym_off, int map_fd)</div><div class='add'>+{</div><div class='add'>+	size_t cnt = obj-&gt;jumptable_map_cnt;</div><div class='add'>+	size_t size = sizeof(obj-&gt;jumptable_maps[0]);</div><div class='add'>+	void *tmp;</div><div class='add'>+</div><div class='add'>+	tmp = libbpf_reallocarray(obj-&gt;jumptable_maps, cnt + 1, size);</div><div class='add'>+	if (!tmp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	obj-&gt;jumptable_maps = tmp;</div><div class='add'>+	obj-&gt;jumptable_maps[cnt].prog = prog;</div><div class='add'>+	obj-&gt;jumptable_maps[cnt].sym_off = sym_off;</div><div class='add'>+	obj-&gt;jumptable_maps[cnt].fd = map_fd;</div><div class='add'>+	obj-&gt;jumptable_map_cnt++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int find_subprog_idx(struct bpf_program *prog, int insn_idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = prog-&gt;subprog_cnt - 1; i &gt;= 0; i--) {</div><div class='add'>+		if (insn_idx &gt;= prog-&gt;subprogs[i].sub_insn_off)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int create_jt_map(struct bpf_object *obj, struct bpf_program *prog, struct reloc_desc *relo)</div><div class='add'>+{</div><div class='add'>+	const __u32 jt_entry_size = 8;</div><div class='add'>+	int sym_off = relo-&gt;sym_off;</div><div class='add'>+	int jt_size = relo-&gt;sym_size;</div><div class='add'>+	__u32 max_entries = jt_size / jt_entry_size;</div><div class='add'>+	__u32 value_size = sizeof(struct bpf_insn_array_value);</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int subprog_idx;</div><div class='add'>+	int map_fd, err;</div><div class='add'>+	__u64 insn_off;</div><div class='add'>+	__u64 *jt;</div><div class='add'>+	__u32 i;</div><div class='add'>+</div><div class='add'>+	map_fd = find_jt_map(obj, prog, sym_off);</div><div class='add'>+	if (map_fd &gt;= 0)</div><div class='add'>+		return map_fd;</div><div class='add'>+</div><div class='add'>+	if (sym_off % jt_entry_size) {</div><div class='add'>+		pr_warn("map '.jumptables': jumptable start %d should be multiple of %u\n",</div><div class='add'>+			sym_off, jt_entry_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (jt_size % jt_entry_size) {</div><div class='add'>+		pr_warn("map '.jumptables': jumptable size %d should be multiple of %u\n",</div><div class='add'>+			jt_size, jt_entry_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	map_fd = bpf_map_create(BPF_MAP_TYPE_INSN_ARRAY, ".jumptables",</div><div class='add'>+				4, value_size, max_entries, NULL);</div><div class='add'>+	if (map_fd &lt; 0)</div><div class='add'>+		return map_fd;</div><div class='add'>+</div><div class='add'>+	if (!obj-&gt;jumptables_data) {</div><div class='add'>+		pr_warn("map '.jumptables': ELF file is missing jump table data\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_close;</div><div class='add'>+	}</div><div class='add'>+	if (sym_off + jt_size &gt; obj-&gt;jumptables_data_sz) {</div><div class='add'>+		pr_warn("map '.jumptables': jumptables_data size is %zd, trying to access %d\n",</div><div class='add'>+			obj-&gt;jumptables_data_sz, sym_off + jt_size);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	subprog_idx = -1; /* main program */</div><div class='add'>+	if (relo-&gt;insn_idx &lt; 0 || relo-&gt;insn_idx &gt;= prog-&gt;insns_cnt) {</div><div class='add'>+		pr_warn("map '.jumptables': invalid instruction index %d\n", relo-&gt;insn_idx);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_close;</div><div class='add'>+	}</div><div class='add'>+	if (prog-&gt;subprogs)</div><div class='add'>+		subprog_idx = find_subprog_idx(prog, relo-&gt;insn_idx);</div><div class='add'>+</div><div class='add'>+	jt = (__u64 *)(obj-&gt;jumptables_data + sym_off);</div><div class='add'>+	for (i = 0; i &lt; max_entries; i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * The offset should be made to be relative to the beginning of</div><div class='add'>+		 * the main function, not the subfunction.</div><div class='add'>+		 */</div><div class='add'>+		insn_off = jt[i]/sizeof(struct bpf_insn);</div><div class='add'>+		if (subprog_idx &gt;= 0) {</div><div class='add'>+			insn_off -= prog-&gt;subprogs[subprog_idx].sec_insn_off;</div><div class='add'>+			insn_off += prog-&gt;subprogs[subprog_idx].sub_insn_off;</div><div class='add'>+		} else {</div><div class='add'>+			insn_off -= prog-&gt;sec_insn_off;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LLVM-generated jump tables contain u64 records, however</div><div class='add'>+		 * should contain values that fit in u32.</div><div class='add'>+		 */</div><div class='add'>+		if (insn_off &gt; UINT32_MAX) {</div><div class='add'>+			pr_warn("map '.jumptables': invalid jump table value 0x%llx at offset %d\n",</div><div class='add'>+				(long long)jt[i], sym_off + i * jt_entry_size);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto err_close;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		val.orig_off = insn_off;</div><div class='add'>+		err = bpf_map_update_elem(map_fd, &amp;i, &amp;val, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = bpf_map_freeze(map_fd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close;</div><div class='add'>+</div><div class='add'>+	err = add_jt_map(obj, prog, sym_off, map_fd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close;</div><div class='add'>+</div><div class='add'>+	return map_fd;</div><div class='add'>+</div><div class='add'>+err_close:</div><div class='add'>+	close(map_fd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Relocate data references within program code:</div><div class='ctx'>  *  - map references;</div><div class='ctx'>  *  - global variable references;</div><div class='hunk'>@@ -6182,6 +6434,20 @@ bpf_object__relocate_data(struct bpf_object *obj, struct bpf_program *prog)</div><div class='ctx'> 		case RELO_CORE:</div><div class='ctx'> 			/* will be handled by bpf_program_record_relos() */</div><div class='ctx'> 			break;</div><div class='add'>+		case RELO_INSN_ARRAY: {</div><div class='add'>+			int map_fd;</div><div class='add'>+</div><div class='add'>+			map_fd = create_jt_map(obj, prog, relo);</div><div class='add'>+			if (map_fd &lt; 0) {</div><div class='add'>+				pr_warn("prog '%s': relo #%d: can't create jump table: sym_off %u\n",</div><div class='add'>+					prog-&gt;name, i, relo-&gt;sym_off);</div><div class='add'>+				return map_fd;</div><div class='add'>+			}</div><div class='add'>+			insn[0].src_reg = BPF_PSEUDO_MAP_VALUE;</div><div class='add'>+			insn-&gt;imm = map_fd;</div><div class='add'>+			insn-&gt;off = 0;</div><div class='add'>+		}</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			pr_warn("prog '%s': relo #%d: bad relo type %d\n",</div><div class='ctx'> 				prog-&gt;name, i, relo-&gt;type);</div><div class='hunk'>@@ -6379,36 +6645,62 @@ static int append_subprog_relos(struct bpf_program *main_prog, struct bpf_progra</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int save_subprog_offsets(struct bpf_program *main_prog, struct bpf_program *subprog)</div><div class='add'>+{</div><div class='add'>+	size_t size = sizeof(main_prog-&gt;subprogs[0]);</div><div class='add'>+	int cnt = main_prog-&gt;subprog_cnt;</div><div class='add'>+	void *tmp;</div><div class='add'>+</div><div class='add'>+	tmp = libbpf_reallocarray(main_prog-&gt;subprogs, cnt + 1, size);</div><div class='add'>+	if (!tmp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	main_prog-&gt;subprogs = tmp;</div><div class='add'>+	main_prog-&gt;subprogs[cnt].sec_insn_off = subprog-&gt;sec_insn_off;</div><div class='add'>+	main_prog-&gt;subprogs[cnt].sub_insn_off = subprog-&gt;sub_insn_off;</div><div class='add'>+	main_prog-&gt;subprog_cnt++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> bpf_object__append_subprog_code(struct bpf_object *obj, struct bpf_program *main_prog,</div><div class='ctx'> 				struct bpf_program *subprog)</div><div class='ctx'> {</div><div class='del'>-       struct bpf_insn *insns;</div><div class='del'>-       size_t new_cnt;</div><div class='del'>-       int err;</div><div class='add'>+	struct bpf_insn *insns;</div><div class='add'>+	size_t new_cnt;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	subprog-&gt;sub_insn_off = main_prog-&gt;insns_cnt;</div><div class='ctx'> </div><div class='del'>-       subprog-&gt;sub_insn_off = main_prog-&gt;insns_cnt;</div><div class='add'>+	new_cnt = main_prog-&gt;insns_cnt + subprog-&gt;insns_cnt;</div><div class='add'>+	insns = libbpf_reallocarray(main_prog-&gt;insns, new_cnt, sizeof(*insns));</div><div class='add'>+	if (!insns) {</div><div class='add'>+		pr_warn("prog '%s': failed to realloc prog code\n", main_prog-&gt;name);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	main_prog-&gt;insns = insns;</div><div class='add'>+	main_prog-&gt;insns_cnt = new_cnt;</div><div class='ctx'> </div><div class='del'>-       new_cnt = main_prog-&gt;insns_cnt + subprog-&gt;insns_cnt;</div><div class='del'>-       insns = libbpf_reallocarray(main_prog-&gt;insns, new_cnt, sizeof(*insns));</div><div class='del'>-       if (!insns) {</div><div class='del'>-               pr_warn("prog '%s': failed to realloc prog code\n", main_prog-&gt;name);</div><div class='del'>-               return -ENOMEM;</div><div class='del'>-       }</div><div class='del'>-       main_prog-&gt;insns = insns;</div><div class='del'>-       main_prog-&gt;insns_cnt = new_cnt;</div><div class='add'>+	memcpy(main_prog-&gt;insns + subprog-&gt;sub_insn_off, subprog-&gt;insns,</div><div class='add'>+	       subprog-&gt;insns_cnt * sizeof(*insns));</div><div class='ctx'> </div><div class='del'>-       memcpy(main_prog-&gt;insns + subprog-&gt;sub_insn_off, subprog-&gt;insns,</div><div class='del'>-              subprog-&gt;insns_cnt * sizeof(*insns));</div><div class='add'>+	pr_debug("prog '%s': added %zu insns from sub-prog '%s'\n",</div><div class='add'>+		 main_prog-&gt;name, subprog-&gt;insns_cnt, subprog-&gt;name);</div><div class='ctx'> </div><div class='del'>-       pr_debug("prog '%s': added %zu insns from sub-prog '%s'\n",</div><div class='del'>-                main_prog-&gt;name, subprog-&gt;insns_cnt, subprog-&gt;name);</div><div class='add'>+	/* The subprog insns are now appended. Append its relos too. */</div><div class='add'>+	err = append_subprog_relos(main_prog, subprog);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-       /* The subprog insns are now appended. Append its relos too. */</div><div class='del'>-       err = append_subprog_relos(main_prog, subprog);</div><div class='del'>-       if (err)</div><div class='del'>-               return err;</div><div class='del'>-       return 0;</div><div class='add'>+	err = save_subprog_offsets(main_prog, subprog);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_warn("prog '%s': failed to add subprog offsets: %s\n",</div><div class='add'>+			main_prog-&gt;name, errstr(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -9175,6 +9467,13 @@ void bpf_object__close(struct bpf_object *obj)</div><div class='ctx'> </div><div class='ctx'> 	zfree(&amp;obj-&gt;arena_data);</div><div class='ctx'> </div><div class='add'>+	zfree(&amp;obj-&gt;jumptables_data);</div><div class='add'>+	obj-&gt;jumptables_data_sz = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; obj-&gt;jumptable_map_cnt; i++)</div><div class='add'>+		close(obj-&gt;jumptable_maps[i].fd);</div><div class='add'>+	zfree(&amp;obj-&gt;jumptable_maps);</div><div class='add'>+</div><div class='ctx'> 	free(obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10514,6 +10813,27 @@ int bpf_map__set_inner_map_fd(struct bpf_map *map, int fd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int bpf_map__set_exclusive_program(struct bpf_map *map, struct bpf_program *prog)</div><div class='add'>+{</div><div class='add'>+	if (map_is_created(map)) {</div><div class='add'>+		pr_warn("exclusive programs must be set before map creation\n");</div><div class='add'>+		return libbpf_err(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (map-&gt;obj != prog-&gt;obj) {</div><div class='add'>+		pr_warn("excl_prog and map must be from the same bpf object\n");</div><div class='add'>+		return libbpf_err(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	map-&gt;excl_prog = prog;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct bpf_program *bpf_map__exclusive_program(struct bpf_map *map)</div><div class='add'>+{</div><div class='add'>+	return map-&gt;excl_prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct bpf_map *</div><div class='ctx'> __bpf_map__iter(const struct bpf_map *m, const struct bpf_object *obj, int i)</div><div class='ctx'> {</div><div class='hunk'>@@ -11251,8 +11571,6 @@ static const char *arch_specific_syscall_pfx(void)</div><div class='ctx'> 	return "ia32";</div><div class='ctx'> #elif defined(__s390x__)</div><div class='ctx'> 	return "s390x";</div><div class='del'>-#elif defined(__s390__)</div><div class='del'>-	return "s390";</div><div class='ctx'> #elif defined(__arm__)</div><div class='ctx'> 	return "arm";</div><div class='ctx'> #elif defined(__aarch64__)</div><div class='hunk'>@@ -12039,8 +12357,6 @@ static const char *arch_specific_lib_paths(void)</div><div class='ctx'> 	return "/lib/i386-linux-gnu";</div><div class='ctx'> #elif defined(__s390x__)</div><div class='ctx'> 	return "/lib/s390x-linux-gnu";</div><div class='del'>-#elif defined(__s390__)</div><div class='del'>-	return "/lib/s390-linux-gnu";</div><div class='ctx'> #elif defined(__arm__) &amp;&amp; defined(__SOFTFP__)</div><div class='ctx'> 	return "/lib/arm-linux-gnueabi";</div><div class='ctx'> #elif defined(__arm__) &amp;&amp; !defined(__SOFTFP__)</div><div class='hunk'>@@ -13784,8 +14100,8 @@ int bpf_program__set_attach_target(struct bpf_program *prog,</div><div class='ctx'> 		return libbpf_err(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	if (attach_prog_fd &amp;&amp; !attach_func_name) {</div><div class='del'>-		/* remember attach_prog_fd and let bpf_program__load() find</div><div class='del'>-		 * BTF ID during the program load</div><div class='add'>+		/* Store attach_prog_fd. The BTF ID will be resolved later during</div><div class='add'>+		 * the normal object/program load phase.</div><div class='ctx'> 		 */</div><div class='ctx'> 		prog-&gt;attach_prog_fd = attach_prog_fd;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/tools/lib/bpf/libbpf.h b/tools/lib/bpf/libbpf.h<br/>index 455a957cb702..65e68e964b89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf.h</a></div><div class='hunk'>@@ -24,8 +24,25 @@</div><div class='ctx'> extern "C" {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * @brief **libbpf_major_version()** provides the major version of libbpf.</div><div class='add'>+ * @return An integer, the major version number</div><div class='add'>+ */</div><div class='ctx'> LIBBPF_API __u32 libbpf_major_version(void);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * @brief **libbpf_minor_version()** provides the minor version of libbpf.</div><div class='add'>+ * @return An integer, the minor version number</div><div class='add'>+ */</div><div class='ctx'> LIBBPF_API __u32 libbpf_minor_version(void);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * @brief **libbpf_version_string()** provides the version of libbpf in a</div><div class='add'>+ * human-readable form, e.g., "v1.7".</div><div class='add'>+ * @return Pointer to a static string containing the version</div><div class='add'>+ *</div><div class='add'>+ * The format is *not* a part of a stable API and may change in the future.</div><div class='add'>+ */</div><div class='ctx'> LIBBPF_API const char *libbpf_version_string(void);</div><div class='ctx'> </div><div class='ctx'> enum libbpf_errno {</div><div class='hunk'>@@ -49,6 +66,14 @@ enum libbpf_errno {</div><div class='ctx'> 	__LIBBPF_ERRNO__END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * @brief **libbpf_strerror()** converts the provided error code into a</div><div class='add'>+ * human-readable string.</div><div class='add'>+ * @param err The error code to convert</div><div class='add'>+ * @param buf Pointer to a buffer where the error message will be stored</div><div class='add'>+ * @param size The number of bytes in the buffer</div><div class='add'>+ * @return 0, on success; negative error code, otherwise</div><div class='add'>+ */</div><div class='ctx'> LIBBPF_API int libbpf_strerror(int err, char *buf, size_t size);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -252,7 +277,7 @@ bpf_object__open_mem(const void *obj_buf, size_t obj_buf_sz,</div><div class='ctx'>  * @return 0, on success; negative error code, otherwise, error code is</div><div class='ctx'>  * stored in errno</div><div class='ctx'>  */</div><div class='del'>-int bpf_object__prepare(struct bpf_object *obj);</div><div class='add'>+LIBBPF_API int bpf_object__prepare(struct bpf_object *obj);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * @brief **bpf_object__load()** loads BPF object into kernel.</div><div class='hunk'>@@ -423,7 +448,7 @@ LIBBPF_API int bpf_program__pin(struct bpf_program *prog, const char *path);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * @brief **bpf_program__unpin()** unpins the BPF program from a file</div><div class='del'>- * in the BPFFS specified by a path. This decrements the programs</div><div class='add'>+ * in the BPFFS specified by a path. This decrements program's in-kernel</div><div class='ctx'>  * reference count.</div><div class='ctx'>  *</div><div class='ctx'>  * The file pinning the BPF program can also be unlinked by a different</div><div class='hunk'>@@ -456,14 +481,12 @@ LIBBPF_API int bpf_link__pin(struct bpf_link *link, const char *path);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * @brief **bpf_link__unpin()** unpins the BPF link from a file</div><div class='del'>- * in the BPFFS specified by a path. This decrements the links</div><div class='del'>- * reference count.</div><div class='add'>+ * in the BPFFS. This decrements link's in-kernel reference count.</div><div class='ctx'>  *</div><div class='ctx'>  * The file pinning the BPF link can also be unlinked by a different</div><div class='ctx'>  * process in which case this function will return an error.</div><div class='ctx'>  *</div><div class='del'>- * @param prog BPF program to unpin</div><div class='del'>- * @param path file path to the pin in a BPF file system</div><div class='add'>+ * @param link BPF link to unpin</div><div class='ctx'>  * @return 0, on success; negative error code, otherwise</div><div class='ctx'>  */</div><div class='ctx'> LIBBPF_API int bpf_link__unpin(struct bpf_link *link);</div><div class='hunk'>@@ -970,8 +993,13 @@ LIBBPF_API __u32 bpf_program__line_info_cnt(const struct bpf_program *prog);</div><div class='ctx'>  *   - fentry/fexit/fmod_ret;</div><div class='ctx'>  *   - lsm;</div><div class='ctx'>  *   - freplace.</div><div class='del'>- * @param prog BPF program to set the attach type for</div><div class='del'>- * @param type attach type to set the BPF map to have</div><div class='add'>+ * @param prog BPF program to configure; must be not yet loaded.</div><div class='add'>+ * @param attach_prog_fd FD of target BPF program (for freplace/extension).</div><div class='add'>+ * If &gt;0 and func name omitted, defers BTF ID resolution.</div><div class='add'>+ * @param attach_func_name Target function name. Used either with</div><div class='add'>+ * attach_prog_fd to find destination BTF type ID in that BPF program, or</div><div class='add'>+ * alone (no attach_prog_fd) to resolve kernel (vmlinux/module) BTF ID.</div><div class='add'>+ * Must be provided if attach_prog_fd is 0.</div><div class='ctx'>  * @return error code; or 0 if no error occurred.</div><div class='ctx'>  */</div><div class='ctx'> LIBBPF_API int</div><div class='hunk'>@@ -1073,6 +1101,7 @@ LIBBPF_API __u32 bpf_map__value_size(const struct bpf_map *map);</div><div class='ctx'> /**</div><div class='ctx'>  * @brief **bpf_map__set_value_size()** sets map value size.</div><div class='ctx'>  * @param map the BPF map instance</div><div class='add'>+ * @param size the new value size</div><div class='ctx'>  * @return 0, on success; negative error, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * There is a special case for maps with associated memory-mapped regions, like</div><div class='hunk'>@@ -1177,7 +1206,7 @@ LIBBPF_API struct bpf_map *bpf_map__inner_map(struct bpf_map *map);</div><div class='ctx'>  * per-CPU values value size has to be aligned up to closest 8 bytes for</div><div class='ctx'>  * alignment reasons, so expected size is: `round_up(value_size, 8)</div><div class='ctx'>  * * libbpf_num_possible_cpus()`.</div><div class='del'>- * @flags extra flags passed to kernel for this operation</div><div class='add'>+ * @param flags extra flags passed to kernel for this operation</div><div class='ctx'>  * @return 0, on success; negative error, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * **bpf_map__lookup_elem()** is high-level equivalent of</div><div class='hunk'>@@ -1201,7 +1230,7 @@ LIBBPF_API int bpf_map__lookup_elem(const struct bpf_map *map,</div><div class='ctx'>  * per-CPU values value size has to be aligned up to closest 8 bytes for</div><div class='ctx'>  * alignment reasons, so expected size is: `round_up(value_size, 8)</div><div class='ctx'>  * * libbpf_num_possible_cpus()`.</div><div class='del'>- * @flags extra flags passed to kernel for this operation</div><div class='add'>+ * @param flags extra flags passed to kernel for this operation</div><div class='ctx'>  * @return 0, on success; negative error, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * **bpf_map__update_elem()** is high-level equivalent of</div><div class='hunk'>@@ -1217,7 +1246,7 @@ LIBBPF_API int bpf_map__update_elem(const struct bpf_map *map,</div><div class='ctx'>  * @param map BPF map to delete element from</div><div class='ctx'>  * @param key pointer to memory containing bytes of the key</div><div class='ctx'>  * @param key_sz size in bytes of key data, needs to match BPF map definition's **key_size**</div><div class='del'>- * @flags extra flags passed to kernel for this operation</div><div class='add'>+ * @param flags extra flags passed to kernel for this operation</div><div class='ctx'>  * @return 0, on success; negative error, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * **bpf_map__delete_elem()** is high-level equivalent of</div><div class='hunk'>@@ -1240,7 +1269,7 @@ LIBBPF_API int bpf_map__delete_elem(const struct bpf_map *map,</div><div class='ctx'>  * per-CPU values value size has to be aligned up to closest 8 bytes for</div><div class='ctx'>  * alignment reasons, so expected size is: `round_up(value_size, 8)</div><div class='ctx'>  * * libbpf_num_possible_cpus()`.</div><div class='del'>- * @flags extra flags passed to kernel for this operation</div><div class='add'>+ * @param flags extra flags passed to kernel for this operation</div><div class='ctx'>  * @return 0, on success; negative error, otherwise</div><div class='ctx'>  *</div><div class='ctx'>  * **bpf_map__lookup_and_delete_elem()** is high-level equivalent of</div><div class='hunk'>@@ -1266,6 +1295,28 @@ LIBBPF_API int bpf_map__lookup_and_delete_elem(const struct bpf_map *map,</div><div class='ctx'>  */</div><div class='ctx'> LIBBPF_API int bpf_map__get_next_key(const struct bpf_map *map,</div><div class='ctx'> 				     const void *cur_key, void *next_key, size_t key_sz);</div><div class='add'>+/**</div><div class='add'>+ * @brief **bpf_map__set_exclusive_program()** sets a map to be exclusive to the</div><div class='add'>+ * specified program. This must be called *before* the map is created.</div><div class='add'>+ *</div><div class='add'>+ * @param map BPF map to make exclusive.</div><div class='add'>+ * @param prog BPF program to be the exclusive user of the map. Must belong</div><div class='add'>+ * to the same bpf_object as the map.</div><div class='add'>+ * @return 0 on success; a negative error code otherwise.</div><div class='add'>+ *</div><div class='add'>+ * This function must be called after the BPF object is opened but before</div><div class='add'>+ * it is loaded. Once the object is loaded, only the specified program</div><div class='add'>+ * will be able to access the map's contents.</div><div class='add'>+ */</div><div class='add'>+LIBBPF_API int bpf_map__set_exclusive_program(struct bpf_map *map, struct bpf_program *prog);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * @brief **bpf_map__exclusive_program()** returns the exclusive program</div><div class='add'>+ * that is registered with the map (if any).</div><div class='add'>+ * @param map BPF map to which the exclusive program is registered.</div><div class='add'>+ * @return the registered exclusive program.</div><div class='add'>+ */</div><div class='add'>+LIBBPF_API struct bpf_program *bpf_map__exclusive_program(struct bpf_map *map);</div><div class='ctx'> </div><div class='ctx'> struct bpf_xdp_set_link_opts {</div><div class='ctx'> 	size_t sz;</div><div class='hunk'>@@ -1590,6 +1641,7 @@ struct perf_buffer_opts {</div><div class='ctx'>  * @param sample_cb function called on each received data record</div><div class='ctx'>  * @param lost_cb function called when record loss has occurred</div><div class='ctx'>  * @param ctx user-provided extra context passed into *sample_cb* and *lost_cb*</div><div class='add'>+ * @param opts optional parameters for the perf buffer, can be null</div><div class='ctx'>  * @return a new instance of struct perf_buffer on success, NULL on error with</div><div class='ctx'>  * *errno* containing an error code</div><div class='ctx'>  */</div><div class='hunk'>@@ -1810,9 +1862,10 @@ struct gen_loader_opts {</div><div class='ctx'> 	const char *insns;</div><div class='ctx'> 	__u32 data_sz;</div><div class='ctx'> 	__u32 insns_sz;</div><div class='add'>+	bool gen_hash;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define gen_loader_opts__last_field insns_sz</div><div class='add'>+#define gen_loader_opts__last_field gen_hash</div><div class='ctx'> LIBBPF_API int bpf_object__gen_loader(struct bpf_object *obj,</div><div class='ctx'> 				      struct gen_loader_opts *opts);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/lib/bpf/libbpf.map b/tools/lib/bpf/libbpf.map<br/>index d7bd463e7017..8ed8749907d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.map?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf.map</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf.map?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf.map</a></div><div class='hunk'>@@ -448,4 +448,7 @@ LIBBPF_1.6.0 {</div><div class='ctx'> } LIBBPF_1.5.0;</div><div class='ctx'> </div><div class='ctx'> LIBBPF_1.7.0 {</div><div class='add'>+	global:</div><div class='add'>+		bpf_map__set_exclusive_program;</div><div class='add'>+		bpf_map__exclusive_program;</div><div class='ctx'> } LIBBPF_1.6.0;</div><div class='head'>diff --git a/tools/lib/bpf/libbpf_errno.c b/tools/lib/bpf/libbpf_errno.c<br/>deleted file mode 100644<br/>index 6b180172ec6b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_errno.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_errno.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,75 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2013-2015 Alexei Starovoitov &lt;ast@kernel.org&gt;</div><div class='del'>- * Copyright (C) 2015 Wang Nan &lt;wangnan0@huawei.com&gt;</div><div class='del'>- * Copyright (C) 2015 Huawei Inc.</div><div class='del'>- * Copyright (C) 2017 Nicira, Inc.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef _GNU_SOURCE</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-</div><div class='del'>-#include "libbpf.h"</div><div class='del'>-#include "libbpf_internal.h"</div><div class='del'>-</div><div class='del'>-/* make sure libbpf doesn't use kernel-only integer typedefs */</div><div class='del'>-#pragma GCC poison u8 u16 u32 u64 s8 s16 s32 s64</div><div class='del'>-</div><div class='del'>-#define ERRNO_OFFSET(e)		((e) - __LIBBPF_ERRNO__START)</div><div class='del'>-#define ERRCODE_OFFSET(c)	ERRNO_OFFSET(LIBBPF_ERRNO__##c)</div><div class='del'>-#define NR_ERRNO	(__LIBBPF_ERRNO__END - __LIBBPF_ERRNO__START)</div><div class='del'>-</div><div class='del'>-static const char *libbpf_strerror_table[NR_ERRNO] = {</div><div class='del'>-	[ERRCODE_OFFSET(LIBELF)]	= "Something wrong in libelf",</div><div class='del'>-	[ERRCODE_OFFSET(FORMAT)]	= "BPF object format invalid",</div><div class='del'>-	[ERRCODE_OFFSET(KVERSION)]	= "'version' section incorrect or lost",</div><div class='del'>-	[ERRCODE_OFFSET(ENDIAN)]	= "Endian mismatch",</div><div class='del'>-	[ERRCODE_OFFSET(INTERNAL)]	= "Internal error in libbpf",</div><div class='del'>-	[ERRCODE_OFFSET(RELOC)]		= "Relocation failed",</div><div class='del'>-	[ERRCODE_OFFSET(VERIFY)]	= "Kernel verifier blocks program loading",</div><div class='del'>-	[ERRCODE_OFFSET(PROG2BIG)]	= "Program too big",</div><div class='del'>-	[ERRCODE_OFFSET(KVER)]		= "Incorrect kernel version",</div><div class='del'>-	[ERRCODE_OFFSET(PROGTYPE)]	= "Kernel doesn't support this program type",</div><div class='del'>-	[ERRCODE_OFFSET(WRNGPID)]	= "Wrong pid in netlink message",</div><div class='del'>-	[ERRCODE_OFFSET(INVSEQ)]	= "Invalid netlink sequence",</div><div class='del'>-	[ERRCODE_OFFSET(NLPARSE)]	= "Incorrect netlink message parsing",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int libbpf_strerror(int err, char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!buf || !size)</div><div class='del'>-		return libbpf_err(-EINVAL);</div><div class='del'>-</div><div class='del'>-	err = err &gt; 0 ? err : -err;</div><div class='del'>-</div><div class='del'>-	if (err &lt; __LIBBPF_ERRNO__START) {</div><div class='del'>-		ret = strerror_r(err, buf, size);</div><div class='del'>-		buf[size - 1] = '\0';</div><div class='del'>-		return libbpf_err_errno(ret);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (err &lt; __LIBBPF_ERRNO__END) {</div><div class='del'>-		const char *msg;</div><div class='del'>-</div><div class='del'>-		msg = libbpf_strerror_table[ERRNO_OFFSET(err)];</div><div class='del'>-		ret = snprintf(buf, size, "%s", msg);</div><div class='del'>-		buf[size - 1] = '\0';</div><div class='del'>-		/* The length of the buf and msg is positive.</div><div class='del'>-		 * A negative number may be returned only when the</div><div class='del'>-		 * size exceeds INT_MAX. Not likely to appear.</div><div class='del'>-		 */</div><div class='del'>-		if (ret &gt;= size)</div><div class='del'>-			return libbpf_err(-ERANGE);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = snprintf(buf, size, "Unknown libbpf error %d", err);</div><div class='del'>-	buf[size - 1] = '\0';</div><div class='del'>-	if (ret &gt;= size)</div><div class='del'>-		return libbpf_err(-ERANGE);</div><div class='del'>-	return libbpf_err(-ENOENT);</div><div class='del'>-}</div><div class='head'>diff --git a/tools/lib/bpf/libbpf_internal.h b/tools/lib/bpf/libbpf_internal.h<br/>index 477a3b3389a0..fc59b21b51b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_internal.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_internal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf_internal.h</a></div><div class='hunk'>@@ -74,6 +74,8 @@</div><div class='ctx'> #define ELF64_ST_VISIBILITY(o) ((o) &amp; 0x03)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define JUMPTABLES_SEC ".jumptables"</div><div class='add'>+</div><div class='ctx'> #define BTF_INFO_ENC(kind, kind_flag, vlen) \</div><div class='ctx'> 	((!!(kind_flag) &lt;&lt; 31) | ((kind) &lt;&lt; 24) | ((vlen) &amp; BTF_MAX_VLEN))</div><div class='ctx'> #define BTF_TYPE_ENC(name, info, size_or_type) (name), (info), (size_or_type)</div><div class='hunk'>@@ -172,6 +174,16 @@ do {				\</div><div class='ctx'> #define pr_info(fmt, ...)	__pr(LIBBPF_INFO, fmt, ##__VA_ARGS__)</div><div class='ctx'> #define pr_debug(fmt, ...)	__pr(LIBBPF_DEBUG, fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * @brief **libbpf_errstr()** returns string corresponding to numeric errno</div><div class='add'>+ * @param err negative numeric errno</div><div class='add'>+ * @return pointer to string representation of the errno, that is invalidated</div><div class='add'>+ * upon the next call.</div><div class='add'>+ */</div><div class='add'>+const char *libbpf_errstr(int err);</div><div class='add'>+</div><div class='add'>+#define errstr(err) libbpf_errstr(err)</div><div class='add'>+</div><div class='ctx'> #ifndef __has_builtin</div><div class='ctx'> #define __has_builtin(x) 0</div><div class='ctx'> #endif</div><div class='hunk'>@@ -712,6 +724,11 @@ static inline bool is_pow_of_2(size_t x)</div><div class='ctx'> 	return x &amp;&amp; (x &amp; (x - 1)) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline __u32 ror32(__u32 v, int bits)</div><div class='add'>+{</div><div class='add'>+	return (v &gt;&gt; bits) | (v &lt;&lt; (32 - bits));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define PROG_LOAD_ATTEMPTS 5</div><div class='ctx'> int sys_bpf_prog_load(union bpf_attr *attr, unsigned int size, int attempts);</div><div class='ctx'> </div><div class='hunk'>@@ -736,4 +753,8 @@ int elf_resolve_pattern_offsets(const char *binary_path, const char *pattern,</div><div class='ctx'> </div><div class='ctx'> int probe_fd(int fd);</div><div class='ctx'> </div><div class='add'>+#define SHA256_DIGEST_LENGTH 32</div><div class='add'>+#define SHA256_DWORD_SIZE SHA256_DIGEST_LENGTH / sizeof(__u64)</div><div class='add'>+</div><div class='add'>+void libbpf_sha256(const void *data, size_t len, __u8 out[SHA256_DIGEST_LENGTH]);</div><div class='ctx'> #endif /* __LIBBPF_LIBBPF_INTERNAL_H */</div><div class='head'>diff --git a/tools/lib/bpf/libbpf_probes.c b/tools/lib/bpf/libbpf_probes.c<br/>index 9dfbe7750f56..bccf4bb747e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_probes.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/libbpf_probes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_probes.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf_probes.c</a></div><div class='hunk'>@@ -364,6 +364,10 @@ static int probe_map_create(enum bpf_map_type map_type)</div><div class='ctx'> 	case BPF_MAP_TYPE_SOCKHASH:</div><div class='ctx'> 	case BPF_MAP_TYPE_REUSEPORT_SOCKARRAY:</div><div class='ctx'> 		break;</div><div class='add'>+	case BPF_MAP_TYPE_INSN_ARRAY:</div><div class='add'>+		key_size	= sizeof(__u32);</div><div class='add'>+		value_size	= sizeof(struct bpf_insn_array_value);</div><div class='add'>+		break;</div><div class='ctx'> 	case BPF_MAP_TYPE_UNSPEC:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='head'>diff --git a/tools/lib/bpf/libbpf_utils.c b/tools/lib/bpf/libbpf_utils.c<br/>new file mode 100644<br/>index 000000000000..ac3beae54cf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/libbpf_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/libbpf_utils.c</a></div><div class='hunk'>@@ -0,0 +1,256 @@</div><div class='add'>+// SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2013-2015 Alexei Starovoitov &lt;ast@kernel.org&gt;</div><div class='add'>+ * Copyright (C) 2015 Wang Nan &lt;wangnan0@huawei.com&gt;</div><div class='add'>+ * Copyright (C) 2015 Huawei Inc.</div><div class='add'>+ * Copyright (C) 2017 Nicira, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#undef _GNU_SOURCE</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "libbpf.h"</div><div class='add'>+#include "libbpf_internal.h"</div><div class='add'>+</div><div class='add'>+#ifndef ENOTSUPP</div><div class='add'>+#define ENOTSUPP	524</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* make sure libbpf doesn't use kernel-only integer typedefs */</div><div class='add'>+#pragma GCC poison u8 u16 u32 u64 s8 s16 s32 s64</div><div class='add'>+</div><div class='add'>+#define ERRNO_OFFSET(e)		((e) - __LIBBPF_ERRNO__START)</div><div class='add'>+#define ERRCODE_OFFSET(c)	ERRNO_OFFSET(LIBBPF_ERRNO__##c)</div><div class='add'>+#define NR_ERRNO	(__LIBBPF_ERRNO__END - __LIBBPF_ERRNO__START)</div><div class='add'>+</div><div class='add'>+static const char *libbpf_strerror_table[NR_ERRNO] = {</div><div class='add'>+	[ERRCODE_OFFSET(LIBELF)]	= "Something wrong in libelf",</div><div class='add'>+	[ERRCODE_OFFSET(FORMAT)]	= "BPF object format invalid",</div><div class='add'>+	[ERRCODE_OFFSET(KVERSION)]	= "'version' section incorrect or lost",</div><div class='add'>+	[ERRCODE_OFFSET(ENDIAN)]	= "Endian mismatch",</div><div class='add'>+	[ERRCODE_OFFSET(INTERNAL)]	= "Internal error in libbpf",</div><div class='add'>+	[ERRCODE_OFFSET(RELOC)]		= "Relocation failed",</div><div class='add'>+	[ERRCODE_OFFSET(VERIFY)]	= "Kernel verifier blocks program loading",</div><div class='add'>+	[ERRCODE_OFFSET(PROG2BIG)]	= "Program too big",</div><div class='add'>+	[ERRCODE_OFFSET(KVER)]		= "Incorrect kernel version",</div><div class='add'>+	[ERRCODE_OFFSET(PROGTYPE)]	= "Kernel doesn't support this program type",</div><div class='add'>+	[ERRCODE_OFFSET(WRNGPID)]	= "Wrong pid in netlink message",</div><div class='add'>+	[ERRCODE_OFFSET(INVSEQ)]	= "Invalid netlink sequence",</div><div class='add'>+	[ERRCODE_OFFSET(NLPARSE)]	= "Incorrect netlink message parsing",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int libbpf_strerror(int err, char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!buf || !size)</div><div class='add'>+		return libbpf_err(-EINVAL);</div><div class='add'>+</div><div class='add'>+	err = err &gt; 0 ? err : -err;</div><div class='add'>+</div><div class='add'>+	if (err &lt; __LIBBPF_ERRNO__START) {</div><div class='add'>+		ret = strerror_r(err, buf, size);</div><div class='add'>+		buf[size - 1] = '\0';</div><div class='add'>+		return libbpf_err_errno(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err &lt; __LIBBPF_ERRNO__END) {</div><div class='add'>+		const char *msg;</div><div class='add'>+</div><div class='add'>+		msg = libbpf_strerror_table[ERRNO_OFFSET(err)];</div><div class='add'>+		ret = snprintf(buf, size, "%s", msg);</div><div class='add'>+		buf[size - 1] = '\0';</div><div class='add'>+		/* The length of the buf and msg is positive.</div><div class='add'>+		 * A negative number may be returned only when the</div><div class='add'>+		 * size exceeds INT_MAX. Not likely to appear.</div><div class='add'>+		 */</div><div class='add'>+		if (ret &gt;= size)</div><div class='add'>+			return libbpf_err(-ERANGE);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = snprintf(buf, size, "Unknown libbpf error %d", err);</div><div class='add'>+	buf[size - 1] = '\0';</div><div class='add'>+	if (ret &gt;= size)</div><div class='add'>+		return libbpf_err(-ERANGE);</div><div class='add'>+	return libbpf_err(-ENOENT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const char *libbpf_errstr(int err)</div><div class='add'>+{</div><div class='add'>+	static __thread char buf[12];</div><div class='add'>+</div><div class='add'>+	if (err &gt; 0)</div><div class='add'>+		err = -err;</div><div class='add'>+</div><div class='add'>+	switch (err) {</div><div class='add'>+	case -E2BIG:		return "-E2BIG";</div><div class='add'>+	case -EACCES:		return "-EACCES";</div><div class='add'>+	case -EADDRINUSE:	return "-EADDRINUSE";</div><div class='add'>+	case -EADDRNOTAVAIL:	return "-EADDRNOTAVAIL";</div><div class='add'>+	case -EAGAIN:		return "-EAGAIN";</div><div class='add'>+	case -EALREADY:		return "-EALREADY";</div><div class='add'>+	case -EBADF:		return "-EBADF";</div><div class='add'>+	case -EBADFD:		return "-EBADFD";</div><div class='add'>+	case -EBUSY:		return "-EBUSY";</div><div class='add'>+	case -ECANCELED:	return "-ECANCELED";</div><div class='add'>+	case -ECHILD:		return "-ECHILD";</div><div class='add'>+	case -EDEADLK:		return "-EDEADLK";</div><div class='add'>+	case -EDOM:		return "-EDOM";</div><div class='add'>+	case -EEXIST:		return "-EEXIST";</div><div class='add'>+	case -EFAULT:		return "-EFAULT";</div><div class='add'>+	case -EFBIG:		return "-EFBIG";</div><div class='add'>+	case -EILSEQ:		return "-EILSEQ";</div><div class='add'>+	case -EINPROGRESS:	return "-EINPROGRESS";</div><div class='add'>+	case -EINTR:		return "-EINTR";</div><div class='add'>+	case -EINVAL:		return "-EINVAL";</div><div class='add'>+	case -EIO:		return "-EIO";</div><div class='add'>+	case -EISDIR:		return "-EISDIR";</div><div class='add'>+	case -ELOOP:		return "-ELOOP";</div><div class='add'>+	case -EMFILE:		return "-EMFILE";</div><div class='add'>+	case -EMLINK:		return "-EMLINK";</div><div class='add'>+	case -EMSGSIZE:		return "-EMSGSIZE";</div><div class='add'>+	case -ENAMETOOLONG:	return "-ENAMETOOLONG";</div><div class='add'>+	case -ENFILE:		return "-ENFILE";</div><div class='add'>+	case -ENODATA:		return "-ENODATA";</div><div class='add'>+	case -ENODEV:		return "-ENODEV";</div><div class='add'>+	case -ENOENT:		return "-ENOENT";</div><div class='add'>+	case -ENOEXEC:		return "-ENOEXEC";</div><div class='add'>+	case -ENOLINK:		return "-ENOLINK";</div><div class='add'>+	case -ENOMEM:		return "-ENOMEM";</div><div class='add'>+	case -ENOSPC:		return "-ENOSPC";</div><div class='add'>+	case -ENOTBLK:		return "-ENOTBLK";</div><div class='add'>+	case -ENOTDIR:		return "-ENOTDIR";</div><div class='add'>+	case -ENOTSUPP:		return "-ENOTSUPP";</div><div class='add'>+	case -ENOTTY:		return "-ENOTTY";</div><div class='add'>+	case -ENXIO:		return "-ENXIO";</div><div class='add'>+	case -EOPNOTSUPP:	return "-EOPNOTSUPP";</div><div class='add'>+	case -EOVERFLOW:	return "-EOVERFLOW";</div><div class='add'>+	case -EPERM:		return "-EPERM";</div><div class='add'>+	case -EPIPE:		return "-EPIPE";</div><div class='add'>+	case -EPROTO:		return "-EPROTO";</div><div class='add'>+	case -EPROTONOSUPPORT:	return "-EPROTONOSUPPORT";</div><div class='add'>+	case -ERANGE:		return "-ERANGE";</div><div class='add'>+	case -EROFS:		return "-EROFS";</div><div class='add'>+	case -ESPIPE:		return "-ESPIPE";</div><div class='add'>+	case -ESRCH:		return "-ESRCH";</div><div class='add'>+	case -ETXTBSY:		return "-ETXTBSY";</div><div class='add'>+	case -EUCLEAN:		return "-EUCLEAN";</div><div class='add'>+	case -EXDEV:		return "-EXDEV";</div><div class='add'>+	default:</div><div class='add'>+		snprintf(buf, sizeof(buf), "%d", err);</div><div class='add'>+		return buf;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline __u32 get_unaligned_be32(const void *p)</div><div class='add'>+{</div><div class='add'>+	__be32 val;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;val, p, sizeof(val));</div><div class='add'>+	return be32_to_cpu(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void put_unaligned_be32(__u32 val, void *p)</div><div class='add'>+{</div><div class='add'>+	__be32 be_val = cpu_to_be32(val);</div><div class='add'>+</div><div class='add'>+	memcpy(p, &amp;be_val, sizeof(be_val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SHA256_BLOCK_LENGTH 64</div><div class='add'>+#define Ch(x, y, z) (((x) &amp; (y)) ^ (~(x) &amp; (z)))</div><div class='add'>+#define Maj(x, y, z) (((x) &amp; (y)) ^ ((x) &amp; (z)) ^ ((y) &amp; (z)))</div><div class='add'>+#define Sigma_0(x) (ror32((x), 2) ^ ror32((x), 13) ^ ror32((x), 22))</div><div class='add'>+#define Sigma_1(x) (ror32((x), 6) ^ ror32((x), 11) ^ ror32((x), 25))</div><div class='add'>+#define sigma_0(x) (ror32((x), 7) ^ ror32((x), 18) ^ ((x) &gt;&gt; 3))</div><div class='add'>+#define sigma_1(x) (ror32((x), 17) ^ ror32((x), 19) ^ ((x) &gt;&gt; 10))</div><div class='add'>+</div><div class='add'>+static const __u32 sha256_K[64] = {</div><div class='add'>+	0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,</div><div class='add'>+	0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,</div><div class='add'>+	0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,</div><div class='add'>+	0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,</div><div class='add'>+	0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,</div><div class='add'>+	0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,</div><div class='add'>+	0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,</div><div class='add'>+	0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,</div><div class='add'>+	0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,</div><div class='add'>+	0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,</div><div class='add'>+	0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SHA256_ROUND(i, a, b, c, d, e, f, g, h)                                \</div><div class='add'>+	{                                                                      \</div><div class='add'>+		__u32 tmp = h + Sigma_1(e) + Ch(e, f, g) + sha256_K[i] + w[i]; \</div><div class='add'>+		d += tmp;                                                      \</div><div class='add'>+		h = tmp + Sigma_0(a) + Maj(a, b, c);                           \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static void sha256_blocks(__u32 state[8], const __u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	while (nblocks--) {</div><div class='add'>+		__u32 a = state[0];</div><div class='add'>+		__u32 b = state[1];</div><div class='add'>+		__u32 c = state[2];</div><div class='add'>+		__u32 d = state[3];</div><div class='add'>+		__u32 e = state[4];</div><div class='add'>+		__u32 f = state[5];</div><div class='add'>+		__u32 g = state[6];</div><div class='add'>+		__u32 h = state[7];</div><div class='add'>+		__u32 w[64];</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; 16; i++)</div><div class='add'>+			w[i] = get_unaligned_be32(&amp;data[4 * i]);</div><div class='add'>+		for (; i &lt; ARRAY_SIZE(w); i++)</div><div class='add'>+			w[i] = sigma_1(w[i - 2]) + w[i - 7] +</div><div class='add'>+			       sigma_0(w[i - 15]) + w[i - 16];</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(w); i += 8) {</div><div class='add'>+			SHA256_ROUND(i + 0, a, b, c, d, e, f, g, h);</div><div class='add'>+			SHA256_ROUND(i + 1, h, a, b, c, d, e, f, g);</div><div class='add'>+			SHA256_ROUND(i + 2, g, h, a, b, c, d, e, f);</div><div class='add'>+			SHA256_ROUND(i + 3, f, g, h, a, b, c, d, e);</div><div class='add'>+			SHA256_ROUND(i + 4, e, f, g, h, a, b, c, d);</div><div class='add'>+			SHA256_ROUND(i + 5, d, e, f, g, h, a, b, c);</div><div class='add'>+			SHA256_ROUND(i + 6, c, d, e, f, g, h, a, b);</div><div class='add'>+			SHA256_ROUND(i + 7, b, c, d, e, f, g, h, a);</div><div class='add'>+		}</div><div class='add'>+		state[0] += a;</div><div class='add'>+		state[1] += b;</div><div class='add'>+		state[2] += c;</div><div class='add'>+		state[3] += d;</div><div class='add'>+		state[4] += e;</div><div class='add'>+		state[5] += f;</div><div class='add'>+		state[6] += g;</div><div class='add'>+		state[7] += h;</div><div class='add'>+		data += SHA256_BLOCK_LENGTH;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void libbpf_sha256(const void *data, size_t len, __u8 out[SHA256_DIGEST_LENGTH])</div><div class='add'>+{</div><div class='add'>+	__u32 state[8] = { 0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a,</div><div class='add'>+			   0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19 };</div><div class='add'>+	const __be64 bitcount = cpu_to_be64((__u64)len * 8);</div><div class='add'>+	__u8 final_data[2 * SHA256_BLOCK_LENGTH] = { 0 };</div><div class='add'>+	size_t final_len = len % SHA256_BLOCK_LENGTH;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	sha256_blocks(state, data, len / SHA256_BLOCK_LENGTH);</div><div class='add'>+</div><div class='add'>+	memcpy(final_data, data + len - final_len, final_len);</div><div class='add'>+	final_data[final_len] = 0x80;</div><div class='add'>+	final_len = roundup(final_len + 9, SHA256_BLOCK_LENGTH);</div><div class='add'>+	memcpy(&amp;final_data[final_len - 8], &amp;bitcount, 8);</div><div class='add'>+</div><div class='add'>+	sha256_blocks(state, final_data, final_len / SHA256_BLOCK_LENGTH);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(state); i++)</div><div class='add'>+		put_unaligned_be32(state[i], &amp;out[4 * i]);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/lib/bpf/linker.c b/tools/lib/bpf/linker.c<br/>index a469e5d4fee7..f4403e3cf994 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/linker.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/linker.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/linker.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/linker.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include "btf.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #include "strset.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> #define BTF_EXTERN_SEC ".extern"</div><div class='ctx'> </div><div class='hunk'>@@ -2026,6 +2025,9 @@ static int linker_append_elf_sym(struct bpf_linker *linker, struct src_obj *obj,</div><div class='ctx'> 			obj-&gt;sym_map[src_sym_idx] = dst_sec-&gt;sec_sym_idx;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (strcmp(src_sec-&gt;sec_name, JUMPTABLES_SEC) == 0)</div><div class='add'>+			goto add_sym;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (sym_bind == STB_LOCAL)</div><div class='head'>diff --git a/tools/lib/bpf/relo_core.c b/tools/lib/bpf/relo_core.c<br/>index 2b83c98a1137..6eea5edba58a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/relo_core.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/relo_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/relo_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/relo_core.c</a></div><div class='hunk'>@@ -64,7 +64,6 @@ enum libbpf_print_level {</div><div class='ctx'> #include "libbpf.h"</div><div class='ctx'> #include "bpf.h"</div><div class='ctx'> #include "btf.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/tools/lib/bpf/ringbuf.c b/tools/lib/bpf/ringbuf.c<br/>index 9702b70da444..00ec4837a06d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/ringbuf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/ringbuf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/ringbuf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/ringbuf.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include "libbpf.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #include "bpf.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> struct ring {</div><div class='ctx'> 	ring_buffer_sample_fn sample_cb;</div><div class='head'>diff --git a/tools/lib/bpf/skel_internal.h b/tools/lib/bpf/skel_internal.h<br/>index 4d5fa079b5d6..6a8f5c7a02eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/skel_internal.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/skel_internal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/skel_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/skel_internal.h</a></div><div class='hunk'>@@ -13,10 +13,15 @@</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/syscall.h&gt;</div><div class='ctx'> #include &lt;sys/mman.h&gt;</div><div class='add'>+#include &lt;linux/keyctl.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include "bpf.h"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef SHA256_DIGEST_LENGTH</div><div class='add'>+#define SHA256_DIGEST_LENGTH 32</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef __NR_bpf</div><div class='ctx'> # if defined(__mips__) &amp;&amp; defined(_ABIO32)</div><div class='ctx'> #  define __NR_bpf 4355</div><div class='hunk'>@@ -64,6 +69,11 @@ struct bpf_load_and_run_opts {</div><div class='ctx'> 	__u32 data_sz;</div><div class='ctx'> 	__u32 insns_sz;</div><div class='ctx'> 	const char *errstr;</div><div class='add'>+	void *signature;</div><div class='add'>+	__u32 signature_sz;</div><div class='add'>+	__s32 keyring_id;</div><div class='add'>+	void *excl_prog_hash;</div><div class='add'>+	__u32 excl_prog_hash_sz;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> long kern_sys_bpf(__u32 cmd, void *attr, __u32 attr_size);</div><div class='hunk'>@@ -220,14 +230,19 @@ static inline int skel_map_create(enum bpf_map_type map_type,</div><div class='ctx'> 				  const char *map_name,</div><div class='ctx'> 				  __u32 key_size,</div><div class='ctx'> 				  __u32 value_size,</div><div class='del'>-				  __u32 max_entries)</div><div class='add'>+				  __u32 max_entries,</div><div class='add'>+				  const void *excl_prog_hash,</div><div class='add'>+				  __u32 excl_prog_hash_sz)</div><div class='ctx'> {</div><div class='del'>-	const size_t attr_sz = offsetofend(union bpf_attr, map_extra);</div><div class='add'>+	const size_t attr_sz = offsetofend(union bpf_attr, excl_prog_hash_size);</div><div class='ctx'> 	union bpf_attr attr;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;attr, 0, attr_sz);</div><div class='ctx'> </div><div class='ctx'> 	attr.map_type = map_type;</div><div class='add'>+	attr.excl_prog_hash = (unsigned long) excl_prog_hash;</div><div class='add'>+	attr.excl_prog_hash_size = excl_prog_hash_sz;</div><div class='add'>+</div><div class='ctx'> 	strncpy(attr.map_name, map_name, sizeof(attr.map_name));</div><div class='ctx'> 	attr.key_size = key_size;</div><div class='ctx'> 	attr.value_size = value_size;</div><div class='hunk'>@@ -300,6 +315,35 @@ static inline int skel_link_create(int prog_fd, int target_fd,</div><div class='ctx'> 	return skel_sys_bpf(BPF_LINK_CREATE, &amp;attr, attr_sz);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int skel_obj_get_info_by_fd(int fd)</div><div class='add'>+{</div><div class='add'>+	const size_t attr_sz = offsetofend(union bpf_attr, info);</div><div class='add'>+	__u8 sha[SHA256_DIGEST_LENGTH];</div><div class='add'>+	struct bpf_map_info info;</div><div class='add'>+	__u32 info_len = sizeof(info);</div><div class='add'>+	union bpf_attr attr;</div><div class='add'>+</div><div class='add'>+	memset(&amp;info, 0, sizeof(info));</div><div class='add'>+	info.hash = (long) &amp;sha;</div><div class='add'>+	info.hash_size = SHA256_DIGEST_LENGTH;</div><div class='add'>+</div><div class='add'>+	memset(&amp;attr, 0, attr_sz);</div><div class='add'>+	attr.info.bpf_fd = fd;</div><div class='add'>+	attr.info.info = (long) &amp;info;</div><div class='add'>+	attr.info.info_len = info_len;</div><div class='add'>+	return skel_sys_bpf(BPF_OBJ_GET_INFO_BY_FD, &amp;attr, attr_sz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int skel_map_freeze(int fd)</div><div class='add'>+{</div><div class='add'>+	const size_t attr_sz = offsetofend(union bpf_attr, map_fd);</div><div class='add'>+	union bpf_attr attr;</div><div class='add'>+</div><div class='add'>+	memset(&amp;attr, 0, attr_sz);</div><div class='add'>+	attr.map_fd = fd;</div><div class='add'>+</div><div class='add'>+	return skel_sys_bpf(BPF_MAP_FREEZE, &amp;attr, attr_sz);</div><div class='add'>+}</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> #define set_err</div><div class='ctx'> #else</div><div class='hunk'>@@ -308,12 +352,13 @@ static inline int skel_link_create(int prog_fd, int target_fd,</div><div class='ctx'> </div><div class='ctx'> static inline int bpf_load_and_run(struct bpf_load_and_run_opts *opts)</div><div class='ctx'> {</div><div class='del'>-	const size_t prog_load_attr_sz = offsetofend(union bpf_attr, fd_array);</div><div class='add'>+	const size_t prog_load_attr_sz = offsetofend(union bpf_attr, keyring_id);</div><div class='ctx'> 	const size_t test_run_attr_sz = offsetofend(union bpf_attr, test);</div><div class='ctx'> 	int map_fd = -1, prog_fd = -1, key = 0, err;</div><div class='ctx'> 	union bpf_attr attr;</div><div class='ctx'> </div><div class='del'>-	err = map_fd = skel_map_create(BPF_MAP_TYPE_ARRAY, "__loader.map", 4, opts-&gt;data_sz, 1);</div><div class='add'>+	err = map_fd = skel_map_create(BPF_MAP_TYPE_ARRAY, "__loader.map", 4, opts-&gt;data_sz, 1,</div><div class='add'>+				       opts-&gt;excl_prog_hash, opts-&gt;excl_prog_hash_sz);</div><div class='ctx'> 	if (map_fd &lt; 0) {</div><div class='ctx'> 		opts-&gt;errstr = "failed to create loader map";</div><div class='ctx'> 		set_err;</div><div class='hunk'>@@ -327,11 +372,34 @@ static inline int bpf_load_and_run(struct bpf_load_and_run_opts *opts)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+	err = skel_map_freeze(map_fd);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		opts-&gt;errstr = "failed to freeze map";</div><div class='add'>+		set_err;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	err = skel_obj_get_info_by_fd(map_fd);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		opts-&gt;errstr = "failed to fetch obj info";</div><div class='add'>+		set_err;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	memset(&amp;attr, 0, prog_load_attr_sz);</div><div class='ctx'> 	attr.prog_type = BPF_PROG_TYPE_SYSCALL;</div><div class='ctx'> 	attr.insns = (long) opts-&gt;insns;</div><div class='ctx'> 	attr.insn_cnt = opts-&gt;insns_sz / sizeof(struct bpf_insn);</div><div class='ctx'> 	attr.license = (long) "Dual BSD/GPL";</div><div class='add'>+#ifndef __KERNEL__</div><div class='add'>+	attr.signature = (long) opts-&gt;signature;</div><div class='add'>+	attr.signature_size = opts-&gt;signature_sz;</div><div class='add'>+#else</div><div class='add'>+	if (opts-&gt;signature || opts-&gt;signature_sz)</div><div class='add'>+		pr_warn("signatures are not supported from bpf_preload\n");</div><div class='add'>+#endif</div><div class='add'>+	attr.keyring_id = opts-&gt;keyring_id;</div><div class='ctx'> 	memcpy(attr.prog_name, "__loader.prog", sizeof("__loader.prog"));</div><div class='ctx'> 	attr.fd_array = (long) &amp;map_fd;</div><div class='ctx'> 	attr.log_level = opts-&gt;ctx-&gt;log_level;</div><div class='head'>diff --git a/tools/lib/bpf/str_error.c b/tools/lib/bpf/str_error.c<br/>deleted file mode 100644<br/>index 9a541762f54c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/str_error.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/str_error.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,104 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='del'>-#undef _GNU_SOURCE</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;errno.h&gt;</div><div class='del'>-#include "str_error.h"</div><div class='del'>-</div><div class='del'>-#ifndef ENOTSUPP</div><div class='del'>-#define ENOTSUPP	524</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* make sure libbpf doesn't use kernel-only integer typedefs */</div><div class='del'>-#pragma GCC poison u8 u16 u32 u64 s8 s16 s32 s64</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Wrapper to allow for building in non-GNU systems such as Alpine Linux's musl</div><div class='del'>- * libc, while checking strerror_r() return to avoid having to check this in</div><div class='del'>- * all places calling it.</div><div class='del'>- */</div><div class='del'>-char *libbpf_strerror_r(int err, char *dst, int len)</div><div class='del'>-{</div><div class='del'>-	int ret = strerror_r(err &lt; 0 ? -err : err, dst, len);</div><div class='del'>-	/* on glibc &lt;2.13, ret == -1 and errno is set, if strerror_r() can't</div><div class='del'>-	 * handle the error, on glibc &gt;=2.13 *positive* (errno-like) error</div><div class='del'>-	 * code is returned directly</div><div class='del'>-	 */</div><div class='del'>-	if (ret == -1)</div><div class='del'>-		ret = errno;</div><div class='del'>-	if (ret) {</div><div class='del'>-		if (ret == EINVAL)</div><div class='del'>-			/* strerror_r() doesn't recognize this specific error */</div><div class='del'>-			snprintf(dst, len, "unknown error (%d)", err &lt; 0 ? err : -err);</div><div class='del'>-		else</div><div class='del'>-			snprintf(dst, len, "ERROR: strerror_r(%d)=%d", err, ret);</div><div class='del'>-	}</div><div class='del'>-	return dst;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const char *libbpf_errstr(int err)</div><div class='del'>-{</div><div class='del'>-	static __thread char buf[12];</div><div class='del'>-</div><div class='del'>-	if (err &gt; 0)</div><div class='del'>-		err = -err;</div><div class='del'>-</div><div class='del'>-	switch (err) {</div><div class='del'>-	case -E2BIG:		return "-E2BIG";</div><div class='del'>-	case -EACCES:		return "-EACCES";</div><div class='del'>-	case -EADDRINUSE:	return "-EADDRINUSE";</div><div class='del'>-	case -EADDRNOTAVAIL:	return "-EADDRNOTAVAIL";</div><div class='del'>-	case -EAGAIN:		return "-EAGAIN";</div><div class='del'>-	case -EALREADY:		return "-EALREADY";</div><div class='del'>-	case -EBADF:		return "-EBADF";</div><div class='del'>-	case -EBADFD:		return "-EBADFD";</div><div class='del'>-	case -EBUSY:		return "-EBUSY";</div><div class='del'>-	case -ECANCELED:	return "-ECANCELED";</div><div class='del'>-	case -ECHILD:		return "-ECHILD";</div><div class='del'>-	case -EDEADLK:		return "-EDEADLK";</div><div class='del'>-	case -EDOM:		return "-EDOM";</div><div class='del'>-	case -EEXIST:		return "-EEXIST";</div><div class='del'>-	case -EFAULT:		return "-EFAULT";</div><div class='del'>-	case -EFBIG:		return "-EFBIG";</div><div class='del'>-	case -EILSEQ:		return "-EILSEQ";</div><div class='del'>-	case -EINPROGRESS:	return "-EINPROGRESS";</div><div class='del'>-	case -EINTR:		return "-EINTR";</div><div class='del'>-	case -EINVAL:		return "-EINVAL";</div><div class='del'>-	case -EIO:		return "-EIO";</div><div class='del'>-	case -EISDIR:		return "-EISDIR";</div><div class='del'>-	case -ELOOP:		return "-ELOOP";</div><div class='del'>-	case -EMFILE:		return "-EMFILE";</div><div class='del'>-	case -EMLINK:		return "-EMLINK";</div><div class='del'>-	case -EMSGSIZE:		return "-EMSGSIZE";</div><div class='del'>-	case -ENAMETOOLONG:	return "-ENAMETOOLONG";</div><div class='del'>-	case -ENFILE:		return "-ENFILE";</div><div class='del'>-	case -ENODATA:		return "-ENODATA";</div><div class='del'>-	case -ENODEV:		return "-ENODEV";</div><div class='del'>-	case -ENOENT:		return "-ENOENT";</div><div class='del'>-	case -ENOEXEC:		return "-ENOEXEC";</div><div class='del'>-	case -ENOLINK:		return "-ENOLINK";</div><div class='del'>-	case -ENOMEM:		return "-ENOMEM";</div><div class='del'>-	case -ENOSPC:		return "-ENOSPC";</div><div class='del'>-	case -ENOTBLK:		return "-ENOTBLK";</div><div class='del'>-	case -ENOTDIR:		return "-ENOTDIR";</div><div class='del'>-	case -ENOTSUPP:		return "-ENOTSUPP";</div><div class='del'>-	case -ENOTTY:		return "-ENOTTY";</div><div class='del'>-	case -ENXIO:		return "-ENXIO";</div><div class='del'>-	case -EOPNOTSUPP:	return "-EOPNOTSUPP";</div><div class='del'>-	case -EOVERFLOW:	return "-EOVERFLOW";</div><div class='del'>-	case -EPERM:		return "-EPERM";</div><div class='del'>-	case -EPIPE:		return "-EPIPE";</div><div class='del'>-	case -EPROTO:		return "-EPROTO";</div><div class='del'>-	case -EPROTONOSUPPORT:	return "-EPROTONOSUPPORT";</div><div class='del'>-	case -ERANGE:		return "-ERANGE";</div><div class='del'>-	case -EROFS:		return "-EROFS";</div><div class='del'>-	case -ESPIPE:		return "-ESPIPE";</div><div class='del'>-	case -ESRCH:		return "-ESRCH";</div><div class='del'>-	case -ETXTBSY:		return "-ETXTBSY";</div><div class='del'>-	case -EUCLEAN:		return "-EUCLEAN";</div><div class='del'>-	case -EXDEV:		return "-EXDEV";</div><div class='del'>-	default:</div><div class='del'>-		snprintf(buf, sizeof(buf), "%d", err);</div><div class='del'>-		return buf;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/tools/lib/bpf/str_error.h b/tools/lib/bpf/str_error.h<br/>deleted file mode 100644<br/>index 53e7fbffc13e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/str_error.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/str_error.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */</div><div class='del'>-#ifndef __LIBBPF_STR_ERROR_H</div><div class='del'>-#define __LIBBPF_STR_ERROR_H</div><div class='del'>-</div><div class='del'>-#define STRERR_BUFSIZE  128</div><div class='del'>-</div><div class='del'>-char *libbpf_strerror_r(int err, char *dst, int len);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * @brief **libbpf_errstr()** returns string corresponding to numeric errno</div><div class='del'>- * @param err negative numeric errno</div><div class='del'>- * @return pointer to string representation of the errno, that is invalidated</div><div class='del'>- * upon the next call.</div><div class='del'>- */</div><div class='del'>-const char *libbpf_errstr(int err);</div><div class='del'>-</div><div class='del'>-#define errstr(err) libbpf_errstr(err)</div><div class='del'>-</div><div class='del'>-#endif /* __LIBBPF_STR_ERROR_H */</div><div class='head'>diff --git a/tools/lib/bpf/usdt.bpf.h b/tools/lib/bpf/usdt.bpf.h<br/>index 2a7865c8e3fe..43deb05a5197 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/usdt.bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/usdt.bpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/usdt.bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/usdt.bpf.h</a></div><div class='hunk'>@@ -34,13 +34,32 @@ enum __bpf_usdt_arg_type {</div><div class='ctx'> 	BPF_USDT_ARG_CONST,</div><div class='ctx'> 	BPF_USDT_ARG_REG,</div><div class='ctx'> 	BPF_USDT_ARG_REG_DEREF,</div><div class='add'>+	BPF_USDT_ARG_SIB,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This struct layout is designed specifically to be backwards/forward</div><div class='add'>+ * compatible between libbpf versions for ARG_CONST, ARG_REG, and</div><div class='add'>+ * ARG_REG_DEREF modes. ARG_SIB requires libbpf v1.7+.</div><div class='add'>+ */</div><div class='ctx'> struct __bpf_usdt_arg_spec {</div><div class='ctx'> 	/* u64 scalar interpreted depending on arg_type, see below */</div><div class='ctx'> 	__u64 val_off;</div><div class='add'>+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__</div><div class='ctx'> 	/* arg location case, see bpf_usdt_arg() for details */</div><div class='del'>-	enum __bpf_usdt_arg_type arg_type;</div><div class='add'>+	enum __bpf_usdt_arg_type arg_type: 8;</div><div class='add'>+	/* index register offset within struct pt_regs */</div><div class='add'>+	__u16 idx_reg_off: 12;</div><div class='add'>+	/* scale factor for index register (1, 2, 4, or 8) */</div><div class='add'>+	__u16 scale_bitshift: 4;</div><div class='add'>+	/* reserved for future use, keeps reg_off offset stable */</div><div class='add'>+	__u8 __reserved: 8;</div><div class='add'>+#else</div><div class='add'>+	__u8 __reserved: 8;</div><div class='add'>+	__u16 idx_reg_off: 12;</div><div class='add'>+	__u16 scale_bitshift: 4;</div><div class='add'>+	enum __bpf_usdt_arg_type arg_type: 8;</div><div class='add'>+#endif</div><div class='ctx'> 	/* offset of referenced register within struct pt_regs */</div><div class='ctx'> 	short reg_off;</div><div class='ctx'> 	/* whether arg should be interpreted as signed value */</div><div class='hunk'>@@ -149,7 +168,7 @@ int bpf_usdt_arg(struct pt_regs *ctx, __u64 arg_num, long *res)</div><div class='ctx'> {</div><div class='ctx'> 	struct __bpf_usdt_spec *spec;</div><div class='ctx'> 	struct __bpf_usdt_arg_spec *arg_spec;</div><div class='del'>-	unsigned long val;</div><div class='add'>+	unsigned long val, idx;</div><div class='ctx'> 	int err, spec_id;</div><div class='ctx'> </div><div class='ctx'> 	*res = 0;</div><div class='hunk'>@@ -204,6 +223,27 @@ int bpf_usdt_arg(struct pt_regs *ctx, __u64 arg_num, long *res)</div><div class='ctx'> 		val &gt;&gt;= arg_spec-&gt;arg_bitshift;</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='add'>+	case BPF_USDT_ARG_SIB:</div><div class='add'>+		/* Arg is in memory addressed by SIB (Scale-Index-Base) mode</div><div class='add'>+		 * (e.g., "-1@-96(%rbp,%rax,8)" in USDT arg spec). We first</div><div class='add'>+		 * fetch the base register contents and the index register</div><div class='add'>+		 * contents from pt_regs. Then we calculate the final address</div><div class='add'>+		 * as base + (index * scale) + offset, and do a user-space</div><div class='add'>+		 * probe read to fetch the argument value.</div><div class='add'>+		 */</div><div class='add'>+		err = bpf_probe_read_kernel(&amp;val, sizeof(val), (void *)ctx + arg_spec-&gt;reg_off);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		err = bpf_probe_read_kernel(&amp;idx, sizeof(idx), (void *)ctx + arg_spec-&gt;idx_reg_off);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		err = bpf_probe_read_user(&amp;val, sizeof(val), (void *)(val + (idx &lt;&lt; arg_spec-&gt;scale_bitshift) + arg_spec-&gt;val_off));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__</div><div class='add'>+		val &gt;&gt;= arg_spec-&gt;arg_bitshift;</div><div class='add'>+#endif</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/tools/lib/bpf/usdt.c b/tools/lib/bpf/usdt.c<br/>index 3373b9d45ac4..d1524f6f54ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/usdt.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/bpf/usdt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/bpf/usdt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/bpf/usdt.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include "libbpf_common.h"</div><div class='ctx'> #include "libbpf_internal.h"</div><div class='ctx'> #include "hashmap.h"</div><div class='del'>-#include "str_error.h"</div><div class='ctx'> </div><div class='ctx'> /* libbpf's USDT support consists of BPF-side state/code and user-space</div><div class='ctx'>  * state/code working together in concert. BPF-side parts are defined in</div><div class='hunk'>@@ -200,12 +199,23 @@ enum usdt_arg_type {</div><div class='ctx'> 	USDT_ARG_CONST,</div><div class='ctx'> 	USDT_ARG_REG,</div><div class='ctx'> 	USDT_ARG_REG_DEREF,</div><div class='add'>+	USDT_ARG_SIB,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* should match exactly struct __bpf_usdt_arg_spec from usdt.bpf.h */</div><div class='ctx'> struct usdt_arg_spec {</div><div class='ctx'> 	__u64 val_off;</div><div class='del'>-	enum usdt_arg_type arg_type;</div><div class='add'>+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__</div><div class='add'>+	enum usdt_arg_type arg_type: 8;</div><div class='add'>+	__u16	idx_reg_off: 12;</div><div class='add'>+	__u16	scale_bitshift: 4;</div><div class='add'>+	__u8 __reserved: 8;     /* keep reg_off offset stable */</div><div class='add'>+#else</div><div class='add'>+	__u8 __reserved: 8;     /* keep reg_off offset stable */</div><div class='add'>+	__u16	idx_reg_off: 12;</div><div class='add'>+	__u16	scale_bitshift: 4;</div><div class='add'>+	enum usdt_arg_type arg_type: 8;</div><div class='add'>+#endif</div><div class='ctx'> 	short reg_off;</div><div class='ctx'> 	bool arg_signed;</div><div class='ctx'> 	char arg_bitshift;</div><div class='hunk'>@@ -570,9 +580,8 @@ static struct elf_seg *find_vma_seg(struct elf_seg *segs, size_t seg_cnt, long o</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int parse_usdt_note(Elf *elf, const char *path, GElf_Nhdr *nhdr,</div><div class='del'>-			   const char *data, size_t name_off, size_t desc_off,</div><div class='del'>-			   struct usdt_note *usdt_note);</div><div class='add'>+static int parse_usdt_note(GElf_Nhdr *nhdr, const char *data, size_t name_off,</div><div class='add'>+			   size_t desc_off, struct usdt_note *usdt_note);</div><div class='ctx'> </div><div class='ctx'> static int parse_usdt_spec(struct usdt_spec *spec, const struct usdt_note *note, __u64 usdt_cookie);</div><div class='ctx'> </div><div class='hunk'>@@ -626,7 +635,7 @@ static int collect_usdt_targets(struct usdt_manager *man, Elf *elf, const char *</div><div class='ctx'> 		struct elf_seg *seg = NULL;</div><div class='ctx'> 		void *tmp;</div><div class='ctx'> </div><div class='del'>-		err = parse_usdt_note(elf, path, &amp;nhdr, data-&gt;d_buf, name_off, desc_off, &amp;note);</div><div class='add'>+		err = parse_usdt_note(&amp;nhdr, data-&gt;d_buf, name_off, desc_off, &amp;note);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> </div><div class='hunk'>@@ -1132,8 +1141,7 @@ err_out:</div><div class='ctx'> /* Parse out USDT ELF note from '.note.stapsdt' section.</div><div class='ctx'>  * Logic inspired by perf's code.</div><div class='ctx'>  */</div><div class='del'>-static int parse_usdt_note(Elf *elf, const char *path, GElf_Nhdr *nhdr,</div><div class='del'>-			   const char *data, size_t name_off, size_t desc_off,</div><div class='add'>+static int parse_usdt_note(GElf_Nhdr *nhdr, const char *data, size_t name_off, size_t desc_off,</div><div class='ctx'> 			   struct usdt_note *note)</div><div class='ctx'> {</div><div class='ctx'> 	const char *provider, *name, *args;</div><div class='hunk'>@@ -1283,11 +1291,51 @@ static int calc_pt_regs_off(const char *reg_name)</div><div class='ctx'> </div><div class='ctx'> static int parse_usdt_arg(const char *arg_str, int arg_num, struct usdt_arg_spec *arg, int *arg_sz)</div><div class='ctx'> {</div><div class='del'>-	char reg_name[16];</div><div class='del'>-	int len, reg_off;</div><div class='del'>-	long off;</div><div class='add'>+	char reg_name[16] = {0}, idx_reg_name[16] = {0};</div><div class='add'>+	int len, reg_off, idx_reg_off, scale = 1;</div><div class='add'>+	long off = 0;</div><div class='add'>+</div><div class='add'>+	if (sscanf(arg_str, " %d @ %ld ( %%%15[^,] , %%%15[^,] , %d ) %n",</div><div class='add'>+		   arg_sz, &amp;off, reg_name, idx_reg_name, &amp;scale, &amp;len) == 5 ||</div><div class='add'>+		sscanf(arg_str, " %d @ ( %%%15[^,] , %%%15[^,] , %d ) %n",</div><div class='add'>+		       arg_sz, reg_name, idx_reg_name, &amp;scale, &amp;len) == 4 ||</div><div class='add'>+		sscanf(arg_str, " %d @ %ld ( %%%15[^,] , %%%15[^)] ) %n",</div><div class='add'>+		       arg_sz, &amp;off, reg_name, idx_reg_name, &amp;len) == 4 ||</div><div class='add'>+		sscanf(arg_str, " %d @ ( %%%15[^,] , %%%15[^)] ) %n",</div><div class='add'>+		       arg_sz, reg_name, idx_reg_name, &amp;len) == 3</div><div class='add'>+		) {</div><div class='add'>+		/*</div><div class='add'>+		 * Scale Index Base case:</div><div class='add'>+		 * 1@-96(%rbp,%rax,8)</div><div class='add'>+		 * 1@(%rbp,%rax,8)</div><div class='add'>+		 * 1@-96(%rbp,%rax)</div><div class='add'>+		 * 1@(%rbp,%rax)</div><div class='add'>+		 */</div><div class='add'>+		arg-&gt;arg_type = USDT_ARG_SIB;</div><div class='add'>+		arg-&gt;val_off = off;</div><div class='ctx'> </div><div class='del'>-	if (sscanf(arg_str, " %d @ %ld ( %%%15[^)] ) %n", arg_sz, &amp;off, reg_name, &amp;len) == 3) {</div><div class='add'>+		reg_off = calc_pt_regs_off(reg_name);</div><div class='add'>+		if (reg_off &lt; 0)</div><div class='add'>+			return reg_off;</div><div class='add'>+		arg-&gt;reg_off = reg_off;</div><div class='add'>+</div><div class='add'>+		idx_reg_off = calc_pt_regs_off(idx_reg_name);</div><div class='add'>+		if (idx_reg_off &lt; 0)</div><div class='add'>+			return idx_reg_off;</div><div class='add'>+		arg-&gt;idx_reg_off = idx_reg_off;</div><div class='add'>+</div><div class='add'>+		/* validate scale factor and set fields directly */</div><div class='add'>+		switch (scale) {</div><div class='add'>+		case 1: arg-&gt;scale_bitshift = 0; break;</div><div class='add'>+		case 2: arg-&gt;scale_bitshift = 1; break;</div><div class='add'>+		case 4: arg-&gt;scale_bitshift = 2; break;</div><div class='add'>+		case 8: arg-&gt;scale_bitshift = 3; break;</div><div class='add'>+		default:</div><div class='add'>+			pr_warn("usdt: invalid SIB scale %d, expected 1, 2, 4, 8\n", scale);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else if (sscanf(arg_str, " %d @ %ld ( %%%15[^)] ) %n",</div><div class='add'>+				arg_sz, &amp;off, reg_name, &amp;len) == 3) {</div><div class='ctx'> 		/* Memory dereference case, e.g., -4@-20(%rbp) */</div><div class='ctx'> 		arg-&gt;arg_type = USDT_ARG_REG_DEREF;</div><div class='ctx'> 		arg-&gt;val_off = off;</div><div class='hunk'>@@ -1306,6 +1354,7 @@ static int parse_usdt_arg(const char *arg_str, int arg_num, struct usdt_arg_spec</div><div class='ctx'> 	} else if (sscanf(arg_str, " %d @ %%%15s %n", arg_sz, reg_name, &amp;len) == 2) {</div><div class='ctx'> 		/* Register read case, e.g., -4@%eax */</div><div class='ctx'> 		arg-&gt;arg_type = USDT_ARG_REG;</div><div class='add'>+		/* register read has no memory offset */</div><div class='ctx'> 		arg-&gt;val_off = 0;</div><div class='ctx'> </div><div class='ctx'> 		reg_off = calc_pt_regs_off(reg_name);</div><div class='hunk'>@@ -1327,8 +1376,6 @@ static int parse_usdt_arg(const char *arg_str, int arg_num, struct usdt_arg_spec</div><div class='ctx'> </div><div class='ctx'> #elif defined(__s390x__)</div><div class='ctx'> </div><div class='del'>-/* Do not support __s390__ for now, since user_pt_regs is broken with -m31. */</div><div class='del'>-</div><div class='ctx'> static int parse_usdt_arg(const char *arg_str, int arg_num, struct usdt_arg_spec *arg, int *arg_sz)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int reg;</div><div class='head'>diff --git a/tools/lib/perf/cpumap.c b/tools/lib/perf/cpumap.c<br/>index b20a5280f2b3..4160e7d2e120 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/cpumap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/cpumap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/cpumap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/perf/cpumap.c</a></div><div class='hunk'>@@ -368,10 +368,12 @@ struct perf_cpu perf_cpu_map__max(const struct perf_cpu_map *map)</div><div class='ctx'> 		.cpu = -1</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	// cpu_map__trim_new() qsort()s it, cpu_map__default_new() sorts it as well.</div><div class='del'>-	return __perf_cpu_map__nr(map) &gt; 0</div><div class='del'>-		? __perf_cpu_map__cpu(map, __perf_cpu_map__nr(map) - 1)</div><div class='del'>-		: result;</div><div class='add'>+	if (!map)</div><div class='add'>+		return result;</div><div class='add'>+</div><div class='add'>+	// The CPUs are always sorted and nr is always &gt; 0 as 0 length map is</div><div class='add'>+	// encoded as NULL.</div><div class='add'>+	return __perf_cpu_map__cpu(map, __perf_cpu_map__nr(map) - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /** Is 'b' a subset of 'a'. */</div><div class='hunk'>@@ -453,21 +455,33 @@ int perf_cpu_map__merge(struct perf_cpu_map **orig, struct perf_cpu_map *other)</div><div class='ctx'> struct perf_cpu_map *perf_cpu_map__intersect(struct perf_cpu_map *orig,</div><div class='ctx'> 					     struct perf_cpu_map *other)</div><div class='ctx'> {</div><div class='del'>-	struct perf_cpu *tmp_cpus;</div><div class='del'>-	int tmp_len;</div><div class='ctx'> 	int i, j, k;</div><div class='del'>-	struct perf_cpu_map *merged = NULL;</div><div class='add'>+	struct perf_cpu_map *merged;</div><div class='ctx'> </div><div class='ctx'> 	if (perf_cpu_map__is_subset(other, orig))</div><div class='ctx'> 		return perf_cpu_map__get(orig);</div><div class='ctx'> 	if (perf_cpu_map__is_subset(orig, other))</div><div class='ctx'> 		return perf_cpu_map__get(other);</div><div class='ctx'> </div><div class='del'>-	tmp_len = max(__perf_cpu_map__nr(orig), __perf_cpu_map__nr(other));</div><div class='del'>-	tmp_cpus = malloc(tmp_len * sizeof(struct perf_cpu));</div><div class='del'>-	if (!tmp_cpus)</div><div class='add'>+	i = j = k = 0;</div><div class='add'>+	while (i &lt; __perf_cpu_map__nr(orig) &amp;&amp; j &lt; __perf_cpu_map__nr(other)) {</div><div class='add'>+		if (__perf_cpu_map__cpu(orig, i).cpu &lt; __perf_cpu_map__cpu(other, j).cpu)</div><div class='add'>+			i++;</div><div class='add'>+		else if (__perf_cpu_map__cpu(orig, i).cpu &gt; __perf_cpu_map__cpu(other, j).cpu)</div><div class='add'>+			j++;</div><div class='add'>+		else { /* CPUs match. */</div><div class='add'>+			i++;</div><div class='add'>+			j++;</div><div class='add'>+			k++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (k == 0) /* Maps are completely disjoint. */</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	merged = perf_cpu_map__alloc(k);</div><div class='add'>+	if (!merged)</div><div class='add'>+		return NULL;</div><div class='add'>+	/* Entries are added to merged in sorted order, so no need to sort again. */</div><div class='ctx'> 	i = j = k = 0;</div><div class='ctx'> 	while (i &lt; __perf_cpu_map__nr(orig) &amp;&amp; j &lt; __perf_cpu_map__nr(other)) {</div><div class='ctx'> 		if (__perf_cpu_map__cpu(orig, i).cpu &lt; __perf_cpu_map__cpu(other, j).cpu)</div><div class='hunk'>@@ -476,11 +490,8 @@ struct perf_cpu_map *perf_cpu_map__intersect(struct perf_cpu_map *orig,</div><div class='ctx'> 			j++;</div><div class='ctx'> 		else {</div><div class='ctx'> 			j++;</div><div class='del'>-			tmp_cpus[k++] = __perf_cpu_map__cpu(orig, i++);</div><div class='add'>+			RC_CHK_ACCESS(merged)-&gt;map[k++] = __perf_cpu_map__cpu(orig, i++);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (k)</div><div class='del'>-		merged = cpu_map__trim_new(k, tmp_cpus);</div><div class='del'>-	free(tmp_cpus);</div><div class='ctx'> 	return merged;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/lib/perf/include/perf/core.h b/tools/lib/perf/include/perf/core.h<br/>index a3f6d68edad7..06cc132d88cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/include/perf/core.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/include/perf/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/include/perf/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/perf/include/perf/core.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;stdarg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef LIBPERF_API</div><div class='del'>-#define LIBPERF_API __attribute__((visibility("default")))</div><div class='add'>+#define LIBPERF_API extern __attribute__((visibility("default")))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> enum libperf_print_level {</div><div class='head'>diff --git a/tools/lib/perf/include/perf/event.h b/tools/lib/perf/include/perf/event.h<br/>index 6608f1e3701b..43a8cb04994f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/include/perf/event.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/include/perf/event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/include/perf/event.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/perf/include/perf/event.h</a></div><div class='hunk'>@@ -151,6 +151,18 @@ struct perf_record_switch {</div><div class='ctx'> 	__u32			 next_prev_tid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct perf_record_callchain_deferred {</div><div class='add'>+	struct perf_event_header header;</div><div class='add'>+	/*</div><div class='add'>+	 * This is to match kernel and (deferred) user stacks together.</div><div class='add'>+	 * The kernel part will be in the sample callchain array after</div><div class='add'>+	 * the PERF_CONTEXT_USER_DEFERRED entry.</div><div class='add'>+	 */</div><div class='add'>+	__u64			 cookie;</div><div class='add'>+	__u64			 nr;</div><div class='add'>+	__u64			 ips[];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct perf_record_header_attr {</div><div class='ctx'> 	struct perf_event_header header;</div><div class='ctx'> 	struct perf_event_attr	 attr;</div><div class='hunk'>@@ -291,6 +303,7 @@ struct perf_record_header_event_type {</div><div class='ctx'> struct perf_record_header_tracing_data {</div><div class='ctx'> 	struct perf_event_header header;</div><div class='ctx'> 	__u32			 size;</div><div class='add'>+	__u32			 pad;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define PERF_RECORD_MISC_BUILD_ID_SIZE (1 &lt;&lt; 15)</div><div class='hunk'>@@ -522,6 +535,7 @@ union perf_event {</div><div class='ctx'> 	struct perf_record_read			read;</div><div class='ctx'> 	struct perf_record_throttle		throttle;</div><div class='ctx'> 	struct perf_record_sample		sample;</div><div class='add'>+	struct perf_record_callchain_deferred	callchain_deferred;</div><div class='ctx'> 	struct perf_record_bpf_event		bpf;</div><div class='ctx'> 	struct perf_record_ksymbol		ksymbol;</div><div class='ctx'> 	struct perf_record_text_poke_event	text_poke;</div><div class='head'>diff --git a/tools/lib/perf/mmap.c b/tools/lib/perf/mmap.c<br/>index c1a51d925e0e..ec124eb0ec0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/mmap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/perf/mmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/perf/mmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/perf/mmap.c</a></div><div class='hunk'>@@ -508,7 +508,7 @@ int perf_mmap__read_self(struct perf_mmap *map, struct perf_counts_values *count</div><div class='ctx'> 		idx = READ_ONCE(pc-&gt;index);</div><div class='ctx'> 		cnt = READ_ONCE(pc-&gt;offset);</div><div class='ctx'> 		if (pc-&gt;cap_user_rdpmc &amp;&amp; idx) {</div><div class='del'>-			s64 evcnt = read_perf_counter(idx - 1);</div><div class='add'>+			u64 evcnt = read_perf_counter(idx - 1);</div><div class='ctx'> 			u16 width = READ_ONCE(pc-&gt;pmc_width);</div><div class='ctx'> </div><div class='ctx'> 			evcnt &lt;&lt;= 64 - width;</div><div class='head'>diff --git a/tools/lib/python/__init__.py b/tools/lib/python/__init__.py<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/__init__.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/__init__.py</a></div><div class='head'>diff --git a/tools/lib/python/abi/__init__.py b/tools/lib/python/abi/__init__.py<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/abi/__init__.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/abi/__init__.py</a></div><div class='head'>diff --git a/tools/lib/python/abi/abi_parser.py b/tools/lib/python/abi/abi_parser.py<br/>new file mode 100644<br/>index 000000000000..9b8db70067ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/abi/abi_parser.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/abi/abi_parser.py</a></div><div class='hunk'>@@ -0,0 +1,628 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# pylint: disable=R0902,R0903,R0911,R0912,R0913,R0914,R0915,R0917,C0302</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse ABI documentation and produce results from it.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+from argparse import Namespace</div><div class='add'>+import logging</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+</div><div class='add'>+from pprint import pformat</div><div class='add'>+from random import randrange, seed</div><div class='add'>+</div><div class='add'>+# Import Python modules</div><div class='add'>+</div><div class='add'>+from abi.helpers import AbiDebug, ABI_DIR</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class AbiParser:</div><div class='add'>+    """Main class to parse ABI files"""</div><div class='add'>+</div><div class='add'>+    TAGS = r"(what|where|date|kernelversion|contact|description|users)"</div><div class='add'>+    XREF = r"(?:^|\s|\()(\/(?:sys|config|proc|dev|kvd)\/[^,.:;\)\s]+)(?:[,.:;\)\s]|\Z)"</div><div class='add'>+</div><div class='add'>+    def __init__(self, directory, logger=None,</div><div class='add'>+                 enable_lineno=False, show_warnings=True, debug=0):</div><div class='add'>+        """Stores arguments for the class and initialize class vars"""</div><div class='add'>+</div><div class='add'>+        self.directory = directory</div><div class='add'>+        self.enable_lineno = enable_lineno</div><div class='add'>+        self.show_warnings = show_warnings</div><div class='add'>+        self.debug = debug</div><div class='add'>+</div><div class='add'>+        if not logger:</div><div class='add'>+            self.log = logging.getLogger("get_abi")</div><div class='add'>+        else:</div><div class='add'>+            self.log = logger</div><div class='add'>+</div><div class='add'>+        self.data = {}</div><div class='add'>+        self.what_symbols = {}</div><div class='add'>+        self.file_refs = {}</div><div class='add'>+        self.what_refs = {}</div><div class='add'>+</div><div class='add'>+        # Ignore files that contain such suffixes</div><div class='add'>+        self.ignore_suffixes = (".rej", ".org", ".orig", ".bak", "~")</div><div class='add'>+</div><div class='add'>+        # Regular expressions used on parser</div><div class='add'>+        self.re_abi_dir = re.compile(r"(.*)" + ABI_DIR)</div><div class='add'>+        self.re_tag = re.compile(r"(\S+)(:\s*)(.*)", re.I)</div><div class='add'>+        self.re_valid = re.compile(self.TAGS)</div><div class='add'>+        self.re_start_spc = re.compile(r"(\s*)(\S.*)")</div><div class='add'>+        self.re_whitespace = re.compile(r"^\s+")</div><div class='add'>+</div><div class='add'>+        # Regular used on print</div><div class='add'>+        self.re_what = re.compile(r"(\/?(?:[\w\-]+\/?){1,2})")</div><div class='add'>+        self.re_escape = re.compile(r"([\.\x01-\x08\x0e-\x1f\x21-\x2f\x3a-\x40\x7b-\xff])")</div><div class='add'>+        self.re_unprintable = re.compile(r"([\x00-\x2f\x3a-\x40\x5b-\x60\x7b-\xff]+)")</div><div class='add'>+        self.re_title_mark = re.compile(r"\n[\-\*\=\^\~]+\n")</div><div class='add'>+        self.re_doc = re.compile(r"Documentation/(?!devicetree)(\S+)\.rst")</div><div class='add'>+        self.re_abi = re.compile(r"(Documentation/ABI/)([\w\/\-]+)")</div><div class='add'>+        self.re_xref_node = re.compile(self.XREF)</div><div class='add'>+</div><div class='add'>+    def warn(self, fdata, msg, extra=None):</div><div class='add'>+        """Displays a parse error if warning is enabled"""</div><div class='add'>+</div><div class='add'>+        if not self.show_warnings:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        msg = f"{fdata.fname}:{fdata.ln}: {msg}"</div><div class='add'>+        if extra:</div><div class='add'>+            msg += "\n\t\t" + extra</div><div class='add'>+</div><div class='add'>+        self.log.warning(msg)</div><div class='add'>+</div><div class='add'>+    def add_symbol(self, what, fname, ln=None, xref=None):</div><div class='add'>+        """Create a reference table describing where each 'what' is located"""</div><div class='add'>+</div><div class='add'>+        if what not in self.what_symbols:</div><div class='add'>+            self.what_symbols[what] = {"file": {}}</div><div class='add'>+</div><div class='add'>+        if fname not in self.what_symbols[what]["file"]:</div><div class='add'>+            self.what_symbols[what]["file"][fname] = []</div><div class='add'>+</div><div class='add'>+        if ln and ln not in self.what_symbols[what]["file"][fname]:</div><div class='add'>+            self.what_symbols[what]["file"][fname].append(ln)</div><div class='add'>+</div><div class='add'>+        if xref:</div><div class='add'>+            self.what_symbols[what]["xref"] = xref</div><div class='add'>+</div><div class='add'>+    def _parse_line(self, fdata, line):</div><div class='add'>+        """Parse a single line of an ABI file"""</div><div class='add'>+</div><div class='add'>+        new_what = False</div><div class='add'>+        new_tag = False</div><div class='add'>+        content = None</div><div class='add'>+</div><div class='add'>+        match = self.re_tag.match(line)</div><div class='add'>+        if match:</div><div class='add'>+            new = match.group(1).lower()</div><div class='add'>+            sep = match.group(2)</div><div class='add'>+            content = match.group(3)</div><div class='add'>+</div><div class='add'>+            match = self.re_valid.search(new)</div><div class='add'>+            if match:</div><div class='add'>+                new_tag = match.group(1)</div><div class='add'>+            else:</div><div class='add'>+                if fdata.tag == "description":</div><div class='add'>+                    # New "tag" is actually part of description.</div><div class='add'>+                    # Don't consider it a tag</div><div class='add'>+                    new_tag = False</div><div class='add'>+                elif fdata.tag != "":</div><div class='add'>+                    self.warn(fdata, f"tag '{fdata.tag}' is invalid", line)</div><div class='add'>+</div><div class='add'>+        if new_tag:</div><div class='add'>+            # "where" is Invalid, but was a common mistake. Warn if found</div><div class='add'>+            if new_tag == "where":</div><div class='add'>+                self.warn(fdata, "tag 'Where' is invalid. Should be 'What:' instead")</div><div class='add'>+                new_tag = "what"</div><div class='add'>+</div><div class='add'>+            if new_tag == "what":</div><div class='add'>+                fdata.space = None</div><div class='add'>+</div><div class='add'>+                if content not in self.what_symbols:</div><div class='add'>+                    self.add_symbol(what=content, fname=fdata.fname, ln=fdata.ln)</div><div class='add'>+</div><div class='add'>+                if fdata.tag == "what":</div><div class='add'>+                    fdata.what.append(content.strip("\n"))</div><div class='add'>+                else:</div><div class='add'>+                    if fdata.key:</div><div class='add'>+                        if "description" not in self.data.get(fdata.key, {}):</div><div class='add'>+                            self.warn(fdata, f"{fdata.key} doesn't have a description")</div><div class='add'>+</div><div class='add'>+                        for w in fdata.what:</div><div class='add'>+                            self.add_symbol(what=w, fname=fdata.fname,</div><div class='add'>+                                            ln=fdata.what_ln, xref=fdata.key)</div><div class='add'>+</div><div class='add'>+                    fdata.label = content</div><div class='add'>+                    new_what = True</div><div class='add'>+</div><div class='add'>+                    key = "abi_" + content.lower()</div><div class='add'>+                    fdata.key = self.re_unprintable.sub("_", key).strip("_")</div><div class='add'>+</div><div class='add'>+                    # Avoid duplicated keys but using a defined seed, to make</div><div class='add'>+                    # the namespace identical if there aren't changes at the</div><div class='add'>+                    # ABI symbols</div><div class='add'>+                    seed(42)</div><div class='add'>+</div><div class='add'>+                    while fdata.key in self.data:</div><div class='add'>+                        char = randrange(0, 51) + ord("A")</div><div class='add'>+                        if char &gt; ord("Z"):</div><div class='add'>+                            char += ord("a") - ord("Z") - 1</div><div class='add'>+</div><div class='add'>+                        fdata.key += chr(char)</div><div class='add'>+</div><div class='add'>+                    if fdata.key and fdata.key not in self.data:</div><div class='add'>+                        self.data[fdata.key] = {</div><div class='add'>+                            "what": [content],</div><div class='add'>+                            "file": [fdata.file_ref],</div><div class='add'>+                            "path": fdata.ftype,</div><div class='add'>+                            "line_no": fdata.ln,</div><div class='add'>+                        }</div><div class='add'>+</div><div class='add'>+                    fdata.what = self.data[fdata.key]["what"]</div><div class='add'>+</div><div class='add'>+                self.what_refs[content] = fdata.key</div><div class='add'>+                fdata.tag = new_tag</div><div class='add'>+                fdata.what_ln = fdata.ln</div><div class='add'>+</div><div class='add'>+                if fdata.nametag["what"]:</div><div class='add'>+                    t = (content, fdata.key)</div><div class='add'>+                    if t not in fdata.nametag["symbols"]:</div><div class='add'>+                        fdata.nametag["symbols"].append(t)</div><div class='add'>+</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            if fdata.tag and new_tag:</div><div class='add'>+                fdata.tag = new_tag</div><div class='add'>+</div><div class='add'>+                if new_what:</div><div class='add'>+                    fdata.label = ""</div><div class='add'>+</div><div class='add'>+                    if "description" in self.data[fdata.key]:</div><div class='add'>+                        self.data[fdata.key]["description"] += "\n\n"</div><div class='add'>+</div><div class='add'>+                    if fdata.file_ref not in self.data[fdata.key]["file"]:</div><div class='add'>+                        self.data[fdata.key]["file"].append(fdata.file_ref)</div><div class='add'>+</div><div class='add'>+                    if self.debug == AbiDebug.WHAT_PARSING:</div><div class='add'>+                        self.log.debug("what: %s", fdata.what)</div><div class='add'>+</div><div class='add'>+                if not fdata.what:</div><div class='add'>+                    self.warn(fdata, "'What:' should come first:", line)</div><div class='add'>+                    return</div><div class='add'>+</div><div class='add'>+                if new_tag == "description":</div><div class='add'>+                    fdata.space = None</div><div class='add'>+</div><div class='add'>+                    if content:</div><div class='add'>+                        sep = sep.replace(":", " ")</div><div class='add'>+</div><div class='add'>+                        c = " " * len(new_tag) + sep + content</div><div class='add'>+                        c = c.expandtabs()</div><div class='add'>+</div><div class='add'>+                        match = self.re_start_spc.match(c)</div><div class='add'>+                        if match:</div><div class='add'>+                            # Preserve initial spaces for the first line</div><div class='add'>+                            fdata.space = match.group(1)</div><div class='add'>+                            content = match.group(2) + "\n"</div><div class='add'>+</div><div class='add'>+                self.data[fdata.key][fdata.tag] = content</div><div class='add'>+</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Store any contents before tags at the database</div><div class='add'>+        if not fdata.tag and "what" in fdata.nametag:</div><div class='add'>+            fdata.nametag["description"] += line</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if fdata.tag == "description":</div><div class='add'>+            content = line.expandtabs()</div><div class='add'>+</div><div class='add'>+            if self.re_whitespace.sub("", content) == "":</div><div class='add'>+                self.data[fdata.key][fdata.tag] += "\n"</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            if fdata.space is None:</div><div class='add'>+                match = self.re_start_spc.match(content)</div><div class='add'>+                if match:</div><div class='add'>+                    # Preserve initial spaces for the first line</div><div class='add'>+                    fdata.space = match.group(1)</div><div class='add'>+</div><div class='add'>+                    content = match.group(2) + "\n"</div><div class='add'>+            else:</div><div class='add'>+                if content.startswith(fdata.space):</div><div class='add'>+                    content = content[len(fdata.space):]</div><div class='add'>+</div><div class='add'>+                else:</div><div class='add'>+                    fdata.space = ""</div><div class='add'>+</div><div class='add'>+            if fdata.tag == "what":</div><div class='add'>+                w = content.strip("\n")</div><div class='add'>+                if w:</div><div class='add'>+                    self.data[fdata.key][fdata.tag].append(w)</div><div class='add'>+            else:</div><div class='add'>+                self.data[fdata.key][fdata.tag] += content</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        content = line.strip()</div><div class='add'>+        if fdata.tag:</div><div class='add'>+            if fdata.tag == "what":</div><div class='add'>+                w = content.strip("\n")</div><div class='add'>+                if w:</div><div class='add'>+                    self.data[fdata.key][fdata.tag].append(w)</div><div class='add'>+            else:</div><div class='add'>+                self.data[fdata.key][fdata.tag] += "\n" + content.rstrip("\n")</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Everything else is error</div><div class='add'>+        if content:</div><div class='add'>+            self.warn(fdata, "Unexpected content", line)</div><div class='add'>+</div><div class='add'>+    def parse_readme(self, nametag, fname):</div><div class='add'>+        """Parse ABI README file"""</div><div class='add'>+</div><div class='add'>+        nametag["what"] = ["Introduction"]</div><div class='add'>+        nametag["path"] = "README"</div><div class='add'>+        with open(fname, "r", encoding="utf8", errors="backslashreplace") as fp:</div><div class='add'>+            for line in fp:</div><div class='add'>+                match = self.re_tag.match(line)</div><div class='add'>+                if match:</div><div class='add'>+                    new = match.group(1).lower()</div><div class='add'>+</div><div class='add'>+                    match = self.re_valid.search(new)</div><div class='add'>+                    if match:</div><div class='add'>+                        nametag["description"] += "\n:" + line</div><div class='add'>+                        continue</div><div class='add'>+</div><div class='add'>+                nametag["description"] += line</div><div class='add'>+</div><div class='add'>+    def parse_file(self, fname, path, basename):</div><div class='add'>+        """Parse a single file"""</div><div class='add'>+</div><div class='add'>+        ref = f"abi_file_{path}_{basename}"</div><div class='add'>+        ref = self.re_unprintable.sub("_", ref).strip("_")</div><div class='add'>+</div><div class='add'>+        # Store per-file state into a namespace variable. This will be used</div><div class='add'>+        # by the per-line parser state machine and by the warning function.</div><div class='add'>+        fdata = Namespace</div><div class='add'>+</div><div class='add'>+        fdata.fname = fname</div><div class='add'>+        fdata.name = basename</div><div class='add'>+</div><div class='add'>+        pos = fname.find(ABI_DIR)</div><div class='add'>+        if pos &gt; 0:</div><div class='add'>+            f = fname[pos:]</div><div class='add'>+        else:</div><div class='add'>+            f = fname</div><div class='add'>+</div><div class='add'>+        fdata.file_ref = (f, ref)</div><div class='add'>+        self.file_refs[f] = ref</div><div class='add'>+</div><div class='add'>+        fdata.ln = 0</div><div class='add'>+        fdata.what_ln = 0</div><div class='add'>+        fdata.tag = ""</div><div class='add'>+        fdata.label = ""</div><div class='add'>+        fdata.what = []</div><div class='add'>+        fdata.key = None</div><div class='add'>+        fdata.xrefs = None</div><div class='add'>+        fdata.space = None</div><div class='add'>+        fdata.ftype = path.split("/")[0]</div><div class='add'>+</div><div class='add'>+        fdata.nametag = {}</div><div class='add'>+        fdata.nametag["what"] = [f"ABI file {path}/{basename}"]</div><div class='add'>+        fdata.nametag["type"] = "File"</div><div class='add'>+        fdata.nametag["path"] = fdata.ftype</div><div class='add'>+        fdata.nametag["file"] = [fdata.file_ref]</div><div class='add'>+        fdata.nametag["line_no"] = 1</div><div class='add'>+        fdata.nametag["description"] = ""</div><div class='add'>+        fdata.nametag["symbols"] = []</div><div class='add'>+</div><div class='add'>+        self.data[ref] = fdata.nametag</div><div class='add'>+</div><div class='add'>+        if self.debug &amp; AbiDebug.WHAT_OPEN:</div><div class='add'>+            self.log.debug("Opening file %s", fname)</div><div class='add'>+</div><div class='add'>+        if basename == "README":</div><div class='add'>+            self.parse_readme(fdata.nametag, fname)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        with open(fname, "r", encoding="utf8", errors="backslashreplace") as fp:</div><div class='add'>+            for line in fp:</div><div class='add'>+                fdata.ln += 1</div><div class='add'>+</div><div class='add'>+                self._parse_line(fdata, line)</div><div class='add'>+</div><div class='add'>+            if "description" in fdata.nametag:</div><div class='add'>+                fdata.nametag["description"] = fdata.nametag["description"].lstrip("\n")</div><div class='add'>+</div><div class='add'>+            if fdata.key:</div><div class='add'>+                if "description" not in self.data.get(fdata.key, {}):</div><div class='add'>+                    self.warn(fdata, f"{fdata.key} doesn't have a description")</div><div class='add'>+</div><div class='add'>+                for w in fdata.what:</div><div class='add'>+                    self.add_symbol(what=w, fname=fname, xref=fdata.key)</div><div class='add'>+</div><div class='add'>+    def _parse_abi(self, root=None):</div><div class='add'>+        """Internal function to parse documentation ABI recursively"""</div><div class='add'>+</div><div class='add'>+        if not root:</div><div class='add'>+            root = self.directory</div><div class='add'>+</div><div class='add'>+        with os.scandir(root) as obj:</div><div class='add'>+            for entry in obj:</div><div class='add'>+                name = os.path.join(root, entry.name)</div><div class='add'>+</div><div class='add'>+                if entry.is_dir():</div><div class='add'>+                    self._parse_abi(name)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if not entry.is_file():</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                basename = os.path.basename(name)</div><div class='add'>+</div><div class='add'>+                if basename.startswith("."):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if basename.endswith(self.ignore_suffixes):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                path = self.re_abi_dir.sub("", os.path.dirname(name))</div><div class='add'>+</div><div class='add'>+                self.parse_file(name, path, basename)</div><div class='add'>+</div><div class='add'>+    def parse_abi(self, root=None):</div><div class='add'>+        """Parse documentation ABI"""</div><div class='add'>+</div><div class='add'>+        self._parse_abi(root)</div><div class='add'>+</div><div class='add'>+        if self.debug &amp; AbiDebug.DUMP_ABI_STRUCTS:</div><div class='add'>+            self.log.debug(pformat(self.data))</div><div class='add'>+</div><div class='add'>+    def desc_txt(self, desc):</div><div class='add'>+        """Print description as found inside ABI files"""</div><div class='add'>+</div><div class='add'>+        desc = desc.strip(" \t\n")</div><div class='add'>+</div><div class='add'>+        return desc + "\n\n"</div><div class='add'>+</div><div class='add'>+    def xref(self, fname):</div><div class='add'>+        """</div><div class='add'>+        Converts a Documentation/ABI + basename into a ReST cross-reference</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        xref = self.file_refs.get(fname)</div><div class='add'>+        if not xref:</div><div class='add'>+            return None</div><div class='add'>+        else:</div><div class='add'>+            return xref</div><div class='add'>+</div><div class='add'>+    def desc_rst(self, desc):</div><div class='add'>+        """Enrich ReST output by creating cross-references"""</div><div class='add'>+</div><div class='add'>+        # Remove title markups from the description</div><div class='add'>+        # Having titles inside ABI files will only work if extra</div><div class='add'>+        # care would be taken in order to strictly follow the same</div><div class='add'>+        # level order for each markup.</div><div class='add'>+        desc = self.re_title_mark.sub("\n\n", "\n" + desc)</div><div class='add'>+        desc = desc.rstrip(" \t\n").lstrip("\n")</div><div class='add'>+</div><div class='add'>+        # Python's regex performance for non-compiled expressions is a lot</div><div class='add'>+        # than Perl, as Perl automatically caches them at their</div><div class='add'>+        # first usage. Here, we'll need to do the same, as otherwise the</div><div class='add'>+        # performance penalty is be high</div><div class='add'>+</div><div class='add'>+        new_desc = ""</div><div class='add'>+        for d in desc.split("\n"):</div><div class='add'>+            if d == "":</div><div class='add'>+                new_desc += "\n"</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            # Use cross-references for doc files where needed</div><div class='add'>+            d = self.re_doc.sub(r":doc:`/\1`", d)</div><div class='add'>+</div><div class='add'>+            # Use cross-references for ABI generated docs where needed</div><div class='add'>+            matches = self.re_abi.findall(d)</div><div class='add'>+            for m in matches:</div><div class='add'>+                abi = m[0] + m[1]</div><div class='add'>+</div><div class='add'>+                xref = self.file_refs.get(abi)</div><div class='add'>+                if not xref:</div><div class='add'>+                    # This may happen if ABI is on a separate directory,</div><div class='add'>+                    # like parsing ABI testing and symbol is at stable.</div><div class='add'>+                    # The proper solution is to move this part of the code</div><div class='add'>+                    # for it to be inside sphinx/kernel_abi.py</div><div class='add'>+                    self.log.info("Didn't find ABI reference for '%s'", abi)</div><div class='add'>+                else:</div><div class='add'>+                    new = self.re_escape.sub(r"\\\1", m[1])</div><div class='add'>+                    d = re.sub(fr"\b{abi}\b", f":ref:`{new} &lt;{xref}&gt;`", d)</div><div class='add'>+</div><div class='add'>+            # Seek for cross reference symbols like /sys/...</div><div class='add'>+            # Need to be careful to avoid doing it on a code block</div><div class='add'>+            if d[0] not in [" ", "\t"]:</div><div class='add'>+                matches = self.re_xref_node.findall(d)</div><div class='add'>+                for m in matches:</div><div class='add'>+                    # Finding ABI here is more complex due to wildcards</div><div class='add'>+                    xref = self.what_refs.get(m)</div><div class='add'>+                    if xref:</div><div class='add'>+                        new = self.re_escape.sub(r"\\\1", m)</div><div class='add'>+                        d = re.sub(fr"\b{m}\b", f":ref:`{new} &lt;{xref}&gt;`", d)</div><div class='add'>+</div><div class='add'>+            new_desc += d + "\n"</div><div class='add'>+</div><div class='add'>+        return new_desc + "\n\n"</div><div class='add'>+</div><div class='add'>+    def doc(self, output_in_txt=False, show_symbols=True, show_file=True,</div><div class='add'>+            filter_path=None):</div><div class='add'>+        """Print ABI at stdout"""</div><div class='add'>+</div><div class='add'>+        part = None</div><div class='add'>+        for key, v in sorted(self.data.items(),</div><div class='add'>+                             key=lambda x: (x[1].get("type", ""),</div><div class='add'>+                                            x[1].get("what"))):</div><div class='add'>+</div><div class='add'>+            wtype = v.get("type", "Symbol")</div><div class='add'>+            file_ref = v.get("file")</div><div class='add'>+            names = v.get("what", [""])</div><div class='add'>+</div><div class='add'>+            if wtype == "File":</div><div class='add'>+                if not show_file:</div><div class='add'>+                    continue</div><div class='add'>+            else:</div><div class='add'>+                if not show_symbols:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+            if filter_path:</div><div class='add'>+                if v.get("path") != filter_path:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+            msg = ""</div><div class='add'>+</div><div class='add'>+            if wtype != "File":</div><div class='add'>+                cur_part = names[0]</div><div class='add'>+                if cur_part.find("/") &gt;= 0:</div><div class='add'>+                    match = self.re_what.match(cur_part)</div><div class='add'>+                    if match:</div><div class='add'>+                        symbol = match.group(1).rstrip("/")</div><div class='add'>+                        cur_part = "Symbols under " + symbol</div><div class='add'>+</div><div class='add'>+                if cur_part and cur_part != part:</div><div class='add'>+                    part = cur_part</div><div class='add'>+                    msg += part + "\n"+ "-" * len(part) +"\n\n"</div><div class='add'>+</div><div class='add'>+                msg += f".. _{key}:\n\n"</div><div class='add'>+</div><div class='add'>+                max_len = 0</div><div class='add'>+                for i in range(0, len(names)):           # pylint: disable=C0200</div><div class='add'>+                    names[i] = "**" + self.re_escape.sub(r"\\\1", names[i]) + "**"</div><div class='add'>+</div><div class='add'>+                    max_len = max(max_len, len(names[i]))</div><div class='add'>+</div><div class='add'>+                msg += "+-" + "-" * max_len + "-+\n"</div><div class='add'>+                for name in names:</div><div class='add'>+                    msg += f"| {name}" + " " * (max_len - len(name)) + " |\n"</div><div class='add'>+                    msg += "+-" + "-" * max_len + "-+\n"</div><div class='add'>+                msg += "\n"</div><div class='add'>+</div><div class='add'>+            for ref in file_ref:</div><div class='add'>+                if wtype == "File":</div><div class='add'>+                    msg += f".. _{ref[1]}:\n\n"</div><div class='add'>+                else:</div><div class='add'>+                    base = os.path.basename(ref[0])</div><div class='add'>+                    msg += f"Defined on file :ref:`{base} &lt;{ref[1]}&gt;`\n\n"</div><div class='add'>+</div><div class='add'>+            if wtype == "File":</div><div class='add'>+                msg += names[0] +"\n" + "-" * len(names[0]) +"\n\n"</div><div class='add'>+</div><div class='add'>+            desc = v.get("description")</div><div class='add'>+            if not desc and wtype != "File":</div><div class='add'>+                msg += f"DESCRIPTION MISSING for {names[0]}\n\n"</div><div class='add'>+</div><div class='add'>+            if desc:</div><div class='add'>+                if output_in_txt:</div><div class='add'>+                    msg += self.desc_txt(desc)</div><div class='add'>+                else:</div><div class='add'>+                    msg += self.desc_rst(desc)</div><div class='add'>+</div><div class='add'>+            symbols = v.get("symbols")</div><div class='add'>+            if symbols:</div><div class='add'>+                msg += "Has the following ABI:\n\n"</div><div class='add'>+</div><div class='add'>+                for w, label in symbols:</div><div class='add'>+                    # Escape special chars from content</div><div class='add'>+                    content = self.re_escape.sub(r"\\\1", w)</div><div class='add'>+</div><div class='add'>+                    msg += f"- :ref:`{content} &lt;{label}&gt;`\n\n"</div><div class='add'>+</div><div class='add'>+            users = v.get("users")</div><div class='add'>+            if users and users.strip(" \t\n"):</div><div class='add'>+                users = users.strip("\n").replace('\n', '\n\t')</div><div class='add'>+                msg += f"Users:\n\t{users}\n\n"</div><div class='add'>+</div><div class='add'>+            ln = v.get("line_no", 1)</div><div class='add'>+</div><div class='add'>+            yield (msg, file_ref[0][0], ln)</div><div class='add'>+</div><div class='add'>+    def check_issues(self):</div><div class='add'>+        """Warn about duplicated ABI entries"""</div><div class='add'>+</div><div class='add'>+        for what, v in self.what_symbols.items():</div><div class='add'>+            files = v.get("file")</div><div class='add'>+            if not files:</div><div class='add'>+                # Should never happen if the parser works properly</div><div class='add'>+                self.log.warning("%s doesn't have a file associated", what)</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if len(files) == 1:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            f = []</div><div class='add'>+            for fname, lines in sorted(files.items()):</div><div class='add'>+                if not lines:</div><div class='add'>+                    f.append(f"{fname}")</div><div class='add'>+                elif len(lines) == 1:</div><div class='add'>+                    f.append(f"{fname}:{lines[0]}")</div><div class='add'>+                else:</div><div class='add'>+                    m = fname + "lines "</div><div class='add'>+                    m += ", ".join(str(x) for x in lines)</div><div class='add'>+                    f.append(m)</div><div class='add'>+</div><div class='add'>+            self.log.warning("%s is defined %d times: %s", what, len(f), "; ".join(f))</div><div class='add'>+</div><div class='add'>+    def search_symbols(self, expr):</div><div class='add'>+        """ Searches for ABI symbols """</div><div class='add'>+</div><div class='add'>+        regex = re.compile(expr, re.I)</div><div class='add'>+</div><div class='add'>+        found_keys = 0</div><div class='add'>+        for t in sorted(self.data.items(), key=lambda x: [0]):</div><div class='add'>+            v = t[1]</div><div class='add'>+</div><div class='add'>+            wtype = v.get("type", "")</div><div class='add'>+            if wtype == "File":</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            for what in v.get("what", [""]):</div><div class='add'>+                if regex.search(what):</div><div class='add'>+                    found_keys += 1</div><div class='add'>+</div><div class='add'>+                    kernelversion = v.get("kernelversion", "").strip(" \t\n")</div><div class='add'>+                    date = v.get("date", "").strip(" \t\n")</div><div class='add'>+                    contact = v.get("contact", "").strip(" \t\n")</div><div class='add'>+                    users = v.get("users", "").strip(" \t\n")</div><div class='add'>+                    desc = v.get("description", "").strip(" \t\n")</div><div class='add'>+</div><div class='add'>+                    files = []</div><div class='add'>+                    for f in v.get("file", ()):</div><div class='add'>+                        files.append(f[0])</div><div class='add'>+</div><div class='add'>+                    what = str(found_keys) + ". " + what</div><div class='add'>+                    title_tag = "-" * len(what)</div><div class='add'>+</div><div class='add'>+                    print(f"\n{what}\n{title_tag}\n")</div><div class='add'>+</div><div class='add'>+                    if kernelversion:</div><div class='add'>+                        print(f"Kernel version:\t\t{kernelversion}")</div><div class='add'>+</div><div class='add'>+                    if date:</div><div class='add'>+                        print(f"Date:\t\t\t{date}")</div><div class='add'>+</div><div class='add'>+                    if contact:</div><div class='add'>+                        print(f"Contact:\t\t{contact}")</div><div class='add'>+</div><div class='add'>+                    if users:</div><div class='add'>+                        print(f"Users:\t\t\t{users}")</div><div class='add'>+</div><div class='add'>+                    print("Defined on file(s):\t" + ", ".join(files))</div><div class='add'>+</div><div class='add'>+                    if desc:</div><div class='add'>+                        desc = desc.strip("\n")</div><div class='add'>+                        print(f"\n{desc}\n")</div><div class='add'>+</div><div class='add'>+        if not found_keys:</div><div class='add'>+            print(f"Regular expression /{expr}/ not found.")</div><div class='head'>diff --git a/tools/lib/python/abi/abi_regex.py b/tools/lib/python/abi/abi_regex.py<br/>new file mode 100644<br/>index 000000000000..d5553206de3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/abi/abi_regex.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/abi/abi_regex.py</a></div><div class='hunk'>@@ -0,0 +1,234 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# xxpylint: disable=R0903</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Convert ABI what into regular expressions</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import re</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from pprint import pformat</div><div class='add'>+</div><div class='add'>+from abi.abi_parser import AbiParser</div><div class='add'>+from abi.helpers import AbiDebug</div><div class='add'>+</div><div class='add'>+class AbiRegex(AbiParser):</div><div class='add'>+    """Extends AbiParser to search ABI nodes with regular expressions"""</div><div class='add'>+</div><div class='add'>+    # Escape only ASCII visible characters</div><div class='add'>+    escape_symbols = r"([\x21-\x29\x2b-\x2d\x3a-\x40\x5c\x60\x7b-\x7e])"</div><div class='add'>+    leave_others = "others"</div><div class='add'>+</div><div class='add'>+    # Tuples with regular expressions to be compiled and replacement data</div><div class='add'>+    re_whats = [</div><div class='add'>+        # Drop escape characters that might exist</div><div class='add'>+        (re.compile("\\\\"), ""),</div><div class='add'>+</div><div class='add'>+        # Temporarily escape dot characters</div><div class='add'>+        (re.compile(r"\."),  "\xf6"),</div><div class='add'>+</div><div class='add'>+        # Temporarily change [0-9]+ type of patterns</div><div class='add'>+        (re.compile(r"\[0\-9\]\+"),  "\xff"),</div><div class='add'>+</div><div class='add'>+        # Temporarily change [\d+-\d+] type of patterns</div><div class='add'>+        (re.compile(r"\[0\-\d+\]"),  "\xff"),</div><div class='add'>+        (re.compile(r"\[0:\d+\]"),  "\xff"),</div><div class='add'>+        (re.compile(r"\[(\d+)\]"),  "\xf4\\\\d+\xf5"),</div><div class='add'>+</div><div class='add'>+        # Temporarily change [0-9] type of patterns</div><div class='add'>+        (re.compile(r"\[(\d)\-(\d)\]"),  "\xf4\1-\2\xf5"),</div><div class='add'>+</div><div class='add'>+        # Handle multiple option patterns</div><div class='add'>+        (re.compile(r"[\{\&lt;\[]([\w_]+)(?:[,|]+([\w_]+)){1,}[\}\&gt;\]]"), r"(\1|\2)"),</div><div class='add'>+</div><div class='add'>+        # Handle wildcards</div><div class='add'>+        (re.compile(r"([^\/])\*"), "\\1\\\\w\xf7"),</div><div class='add'>+        (re.compile(r"/\*/"), "/.*/"),</div><div class='add'>+        (re.compile(r"/\xf6\xf6\xf6"), "/.*"),</div><div class='add'>+        (re.compile(r"\&lt;[^\&gt;]+\&gt;"), "\\\\w\xf7"),</div><div class='add'>+        (re.compile(r"\{[^\}]+\}"), "\\\\w\xf7"),</div><div class='add'>+        (re.compile(r"\[[^\]]+\]"), "\\\\w\xf7"),</div><div class='add'>+</div><div class='add'>+        (re.compile(r"XX+"), "\\\\w\xf7"),</div><div class='add'>+        (re.compile(r"([^A-Z])[XYZ]([^A-Z])"), "\\1\\\\w\xf7\\2"),</div><div class='add'>+        (re.compile(r"([^A-Z])[XYZ]$"), "\\1\\\\w\xf7"),</div><div class='add'>+        (re.compile(r"_[AB]_"), "_\\\\w\xf7_"),</div><div class='add'>+</div><div class='add'>+        # Recover [0-9] type of patterns</div><div class='add'>+        (re.compile(r"\xf4"), "["),</div><div class='add'>+        (re.compile(r"\xf5"),  "]"),</div><div class='add'>+</div><div class='add'>+        # Remove duplicated spaces</div><div class='add'>+        (re.compile(r"\s+"), r" "),</div><div class='add'>+</div><div class='add'>+        # Special case: drop comparison as in:</div><div class='add'>+        # What: foo = &lt;something&gt;</div><div class='add'>+        # (this happens on a few IIO definitions)</div><div class='add'>+        (re.compile(r"\s*\=.*$"), ""),</div><div class='add'>+</div><div class='add'>+        # Escape all other symbols</div><div class='add'>+        (re.compile(escape_symbols), r"\\\1"),</div><div class='add'>+        (re.compile(r"\\\\"), r"\\"),</div><div class='add'>+        (re.compile(r"\\([\[\]\(\)\|])"), r"\1"),</div><div class='add'>+        (re.compile(r"(\d+)\\(-\d+)"), r"\1\2"),</div><div class='add'>+</div><div class='add'>+        (re.compile(r"\xff"), r"\\d+"),</div><div class='add'>+</div><div class='add'>+        # Special case: IIO ABI which a parenthesis.</div><div class='add'>+        (re.compile(r"sqrt(.*)"), r"sqrt(.*)"),</div><div class='add'>+</div><div class='add'>+        # Simplify regexes with multiple .*</div><div class='add'>+        (re.compile(r"(?:\.\*){2,}"),  ""),</div><div class='add'>+</div><div class='add'>+        # Recover dot characters</div><div class='add'>+        (re.compile(r"\xf6"), "\\."),</div><div class='add'>+        # Recover plus characters</div><div class='add'>+        (re.compile(r"\xf7"), "+"),</div><div class='add'>+    ]</div><div class='add'>+    re_has_num = re.compile(r"\\d")</div><div class='add'>+</div><div class='add'>+    # Symbol name after escape_chars that are considered a devnode basename</div><div class='add'>+    re_symbol_name =  re.compile(r"(\w|\\[\.\-\:])+$")</div><div class='add'>+</div><div class='add'>+    # List of popular group names to be skipped to minimize regex group size</div><div class='add'>+    # Use AbiDebug.SUBGROUP_SIZE to detect those</div><div class='add'>+    skip_names = set(["devices", "hwmon"])</div><div class='add'>+</div><div class='add'>+    def regex_append(self, what, new):</div><div class='add'>+        """</div><div class='add'>+        Get a search group for a subset of regular expressions.</div><div class='add'>+</div><div class='add'>+        As ABI may have thousands of symbols, using a for to search all</div><div class='add'>+        regular expressions is at least O(n^2). When there are wildcards,</div><div class='add'>+        the complexity increases substantially, eventually becoming exponential.</div><div class='add'>+</div><div class='add'>+        To avoid spending too much time on them, use a logic to split</div><div class='add'>+        them into groups. The smaller the group, the better, as it would</div><div class='add'>+        mean that searches will be confined to a small number of regular</div><div class='add'>+        expressions.</div><div class='add'>+</div><div class='add'>+        The conversion to a regex subset is tricky, as we need something</div><div class='add'>+        that can be easily obtained from the sysfs symbol and from the</div><div class='add'>+        regular expression. So, we need to discard nodes that have</div><div class='add'>+        wildcards.</div><div class='add'>+</div><div class='add'>+        If it can't obtain a subgroup, place the regular expression inside</div><div class='add'>+        a special group (self.leave_others).</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        search_group = None</div><div class='add'>+</div><div class='add'>+        for search_group in reversed(new.split("/")):</div><div class='add'>+            if not search_group or search_group in self.skip_names:</div><div class='add'>+                continue</div><div class='add'>+            if self.re_symbol_name.match(search_group):</div><div class='add'>+                break</div><div class='add'>+</div><div class='add'>+        if not search_group:</div><div class='add'>+            search_group = self.leave_others</div><div class='add'>+</div><div class='add'>+        if self.debug &amp; AbiDebug.SUBGROUP_MAP:</div><div class='add'>+            self.log.debug("%s: mapped as %s", what, search_group)</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            if search_group not in self.regex_group:</div><div class='add'>+                self.regex_group[search_group] = []</div><div class='add'>+</div><div class='add'>+            self.regex_group[search_group].append(re.compile(new))</div><div class='add'>+            if self.search_string:</div><div class='add'>+                if what.find(self.search_string) &gt;= 0:</div><div class='add'>+                    print(f"What: {what}")</div><div class='add'>+        except re.PatternError:</div><div class='add'>+            self.log.warning("Ignoring '%s' as it produced an invalid regex:\n"</div><div class='add'>+                             "           '%s'", what, new)</div><div class='add'>+</div><div class='add'>+    def get_regexes(self, what):</div><div class='add'>+        """</div><div class='add'>+        Given an ABI devnode, return a list of all regular expressions that</div><div class='add'>+        may match it, based on the sub-groups created by regex_append()</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        re_list = []</div><div class='add'>+</div><div class='add'>+        patches = what.split("/")</div><div class='add'>+        patches.reverse()</div><div class='add'>+        patches.append(self.leave_others)</div><div class='add'>+</div><div class='add'>+        for search_group in patches:</div><div class='add'>+            if search_group in self.regex_group:</div><div class='add'>+                re_list += self.regex_group[search_group]</div><div class='add'>+</div><div class='add'>+        return re_list</div><div class='add'>+</div><div class='add'>+    def __init__(self, *args, **kwargs):</div><div class='add'>+        """</div><div class='add'>+        Override init method to get verbose argument</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.regex_group = None</div><div class='add'>+        self.search_string = None</div><div class='add'>+        self.re_string = None</div><div class='add'>+</div><div class='add'>+        if "search_string" in kwargs:</div><div class='add'>+            self.search_string = kwargs.get("search_string")</div><div class='add'>+            del kwargs["search_string"]</div><div class='add'>+</div><div class='add'>+            if self.search_string:</div><div class='add'>+</div><div class='add'>+                try:</div><div class='add'>+                    self.re_string = re.compile(self.search_string)</div><div class='add'>+                except re.PatternError as e:</div><div class='add'>+                    msg = f"{self.search_string} is not a valid regular expression"</div><div class='add'>+                    raise ValueError(msg) from e</div><div class='add'>+</div><div class='add'>+        super().__init__(*args, **kwargs)</div><div class='add'>+</div><div class='add'>+    def parse_abi(self, *args, **kwargs):</div><div class='add'>+</div><div class='add'>+        super().parse_abi(*args, **kwargs)</div><div class='add'>+</div><div class='add'>+        self.regex_group = {}</div><div class='add'>+</div><div class='add'>+        print("Converting ABI What fields into regexes...", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        for t in sorted(self.data.items(), key=lambda x: x[0]):</div><div class='add'>+            v = t[1]</div><div class='add'>+            if v.get("type") == "File":</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            v["regex"] = []</div><div class='add'>+</div><div class='add'>+            for what in v.get("what", []):</div><div class='add'>+                if not what.startswith("/sys"):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                new = what</div><div class='add'>+                for r, s in self.re_whats:</div><div class='add'>+                    try:</div><div class='add'>+                        new = r.sub(s, new)</div><div class='add'>+                    except re.PatternError as e:</div><div class='add'>+                        # Help debugging troubles with new regexes</div><div class='add'>+                        raise re.PatternError(f"{e}\nwhile re.sub('{r.pattern}', {s}, str)") from e</div><div class='add'>+</div><div class='add'>+                v["regex"].append(new)</div><div class='add'>+</div><div class='add'>+                if self.debug &amp; AbiDebug.REGEX:</div><div class='add'>+                    self.log.debug("%-90s &lt;== %s", new, what)</div><div class='add'>+</div><div class='add'>+                # Store regex into a subgroup to speedup searches</div><div class='add'>+                self.regex_append(what, new)</div><div class='add'>+</div><div class='add'>+        if self.debug &amp; AbiDebug.SUBGROUP_DICT:</div><div class='add'>+            self.log.debug("%s", pformat(self.regex_group))</div><div class='add'>+</div><div class='add'>+        if self.debug &amp; AbiDebug.SUBGROUP_SIZE:</div><div class='add'>+            biggestd_keys = sorted(self.regex_group.keys(),</div><div class='add'>+                                   key= lambda k: len(self.regex_group[k]),</div><div class='add'>+                                   reverse=True)</div><div class='add'>+</div><div class='add'>+            print("Top regex subgroups:", file=sys.stderr)</div><div class='add'>+            for k in biggestd_keys[:10]:</div><div class='add'>+                print(f"{k} has {len(self.regex_group[k])} elements", file=sys.stderr)</div><div class='head'>diff --git a/tools/lib/python/abi/helpers.py b/tools/lib/python/abi/helpers.py<br/>new file mode 100644<br/>index 000000000000..639b23e4ca33<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/abi/helpers.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/abi/helpers.py</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# pylint: disable=R0903</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Helper classes for ABI parser</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+ABI_DIR = "Documentation/ABI/"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class AbiDebug:</div><div class='add'>+    """Debug levels"""</div><div class='add'>+</div><div class='add'>+    WHAT_PARSING = 1</div><div class='add'>+    WHAT_OPEN = 2</div><div class='add'>+    DUMP_ABI_STRUCTS = 4</div><div class='add'>+    UNDEFINED = 8</div><div class='add'>+    REGEX = 16</div><div class='add'>+    SUBGROUP_MAP = 32</div><div class='add'>+    SUBGROUP_DICT = 64</div><div class='add'>+    SUBGROUP_SIZE = 128</div><div class='add'>+    GRAPH = 256</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+DEBUG_HELP = """</div><div class='add'>+1  - enable debug parsing logic</div><div class='add'>+2  - enable debug messages on file open</div><div class='add'>+4  - enable debug for ABI parse data</div><div class='add'>+8  - enable extra debug information to identify troubles</div><div class='add'>+     with ABI symbols found at the local machine that</div><div class='add'>+     weren't found on ABI documentation (used only for</div><div class='add'>+     undefined subcommand)</div><div class='add'>+16 - enable debug for what to regex conversion</div><div class='add'>+32 - enable debug for symbol regex subgroups</div><div class='add'>+64 - enable debug for sysfs graph tree variable</div><div class='add'>+"""</div><div class='head'>diff --git a/tools/lib/python/abi/system_symbols.py b/tools/lib/python/abi/system_symbols.py<br/>new file mode 100644<br/>index 000000000000..4a2554da217b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/abi/system_symbols.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/abi/system_symbols.py</a></div><div class='hunk'>@@ -0,0 +1,378 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# pylint: disable=R0902,R0912,R0914,R0915,R1702</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse ABI documentation and produce results from it.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from concurrent import futures</div><div class='add'>+from datetime import datetime</div><div class='add'>+from random import shuffle</div><div class='add'>+</div><div class='add'>+from abi.helpers import AbiDebug</div><div class='add'>+</div><div class='add'>+class SystemSymbols:</div><div class='add'>+    """Stores arguments for the class and initialize class vars"""</div><div class='add'>+</div><div class='add'>+    def graph_add_file(self, path, link=None):</div><div class='add'>+        """</div><div class='add'>+        add a file path to the sysfs graph stored at self.root</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if path in self.files:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        name = ""</div><div class='add'>+        ref = self.root</div><div class='add'>+        for edge in path.split("/"):</div><div class='add'>+            name += edge + "/"</div><div class='add'>+            if edge not in ref:</div><div class='add'>+                ref[edge] = {"__name": [name.rstrip("/")]}</div><div class='add'>+</div><div class='add'>+            ref = ref[edge]</div><div class='add'>+</div><div class='add'>+        if link and link not in ref["__name"]:</div><div class='add'>+            ref["__name"].append(link.rstrip("/"))</div><div class='add'>+</div><div class='add'>+        self.files.add(path)</div><div class='add'>+</div><div class='add'>+    def print_graph(self, root_prefix="", root=None, level=0):</div><div class='add'>+        """Prints a reference tree graph using UTF-8 characters"""</div><div class='add'>+</div><div class='add'>+        if not root:</div><div class='add'>+            root = self.root</div><div class='add'>+            level = 0</div><div class='add'>+</div><div class='add'>+        # Prevent endless traverse</div><div class='add'>+        if level &gt; 5:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if level &gt; 0:</div><div class='add'>+            prefix = "├──"</div><div class='add'>+            last_prefix = "└──"</div><div class='add'>+        else:</div><div class='add'>+            prefix = ""</div><div class='add'>+            last_prefix = ""</div><div class='add'>+</div><div class='add'>+        items = list(root.items())</div><div class='add'>+</div><div class='add'>+        names = root.get("__name", [])</div><div class='add'>+        for k, edge in items:</div><div class='add'>+            if k == "__name":</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if not k:</div><div class='add'>+                k = "/"</div><div class='add'>+</div><div class='add'>+            if len(names) &gt; 1:</div><div class='add'>+                k += " links: " + ",".join(names[1:])</div><div class='add'>+</div><div class='add'>+            if edge == items[-1][1]:</div><div class='add'>+                print(root_prefix + last_prefix + k)</div><div class='add'>+                p = root_prefix</div><div class='add'>+                if level &gt; 0:</div><div class='add'>+                    p += "   "</div><div class='add'>+                self.print_graph(p, edge, level + 1)</div><div class='add'>+            else:</div><div class='add'>+                print(root_prefix + prefix + k)</div><div class='add'>+                p = root_prefix + "│   "</div><div class='add'>+                self.print_graph(p, edge, level + 1)</div><div class='add'>+</div><div class='add'>+    def _walk(self, root):</div><div class='add'>+        """</div><div class='add'>+        Walk through sysfs to get all devnodes that aren't ignored.</div><div class='add'>+</div><div class='add'>+        By default, uses /sys as sysfs mounting point. If another</div><div class='add'>+        directory is used, it replaces them to /sys at the patches.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        with os.scandir(root) as obj:</div><div class='add'>+            for entry in obj:</div><div class='add'>+                path = os.path.join(root, entry.name)</div><div class='add'>+                if self.sysfs:</div><div class='add'>+                    p = path.replace(self.sysfs, "/sys", count=1)</div><div class='add'>+                else:</div><div class='add'>+                    p = path</div><div class='add'>+</div><div class='add'>+                if self.re_ignore.search(p):</div><div class='add'>+                    return</div><div class='add'>+</div><div class='add'>+                # Handle link first to avoid directory recursion</div><div class='add'>+                if entry.is_symlink():</div><div class='add'>+                    real = os.path.realpath(path)</div><div class='add'>+                    if not self.sysfs:</div><div class='add'>+                        self.aliases[path] = real</div><div class='add'>+                    else:</div><div class='add'>+                        real = real.replace(self.sysfs, "/sys", count=1)</div><div class='add'>+</div><div class='add'>+                    # Add absfile location to graph if it doesn't exist</div><div class='add'>+                    if not self.re_ignore.search(real):</div><div class='add'>+                        # Add link to the graph</div><div class='add'>+                        self.graph_add_file(real, p)</div><div class='add'>+</div><div class='add'>+                elif entry.is_file():</div><div class='add'>+                    self.graph_add_file(p)</div><div class='add'>+</div><div class='add'>+                elif entry.is_dir():</div><div class='add'>+                    self._walk(path)</div><div class='add'>+</div><div class='add'>+    def __init__(self, abi, sysfs="/sys", hints=False):</div><div class='add'>+        """</div><div class='add'>+        Initialize internal variables and get a list of all files inside</div><div class='add'>+        sysfs that can currently be parsed.</div><div class='add'>+</div><div class='add'>+        Please notice that there are several entries on sysfs that aren't</div><div class='add'>+        documented as ABI. Ignore those.</div><div class='add'>+</div><div class='add'>+        The real paths will be stored under self.files. Aliases will be</div><div class='add'>+        stored in separate, as self.aliases.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.abi = abi</div><div class='add'>+        self.log = abi.log</div><div class='add'>+</div><div class='add'>+        if sysfs != "/sys":</div><div class='add'>+            self.sysfs = sysfs.rstrip("/")</div><div class='add'>+        else:</div><div class='add'>+            self.sysfs = None</div><div class='add'>+</div><div class='add'>+        self.hints = hints</div><div class='add'>+</div><div class='add'>+        self.root = {}</div><div class='add'>+        self.aliases = {}</div><div class='add'>+        self.files = set()</div><div class='add'>+</div><div class='add'>+        dont_walk = [</div><div class='add'>+            # Those require root access and aren't documented at ABI</div><div class='add'>+            f"^{sysfs}/kernel/debug",</div><div class='add'>+            f"^{sysfs}/kernel/tracing",</div><div class='add'>+            f"^{sysfs}/fs/pstore",</div><div class='add'>+            f"^{sysfs}/fs/bpf",</div><div class='add'>+            f"^{sysfs}/fs/fuse",</div><div class='add'>+</div><div class='add'>+            # This is not documented at ABI</div><div class='add'>+            f"^{sysfs}/module",</div><div class='add'>+</div><div class='add'>+            f"^{sysfs}/fs/cgroup",  # this is big and has zero docs under ABI</div><div class='add'>+            f"^{sysfs}/firmware",   # documented elsewhere: ACPI, DT bindings</div><div class='add'>+            "sections|notes",       # aren't actually part of ABI</div><div class='add'>+</div><div class='add'>+            # kernel-parameters.txt - not easy to parse</div><div class='add'>+            "parameters",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        self.re_ignore = re.compile("|".join(dont_walk))</div><div class='add'>+</div><div class='add'>+        print(f"Reading {sysfs} directory contents...", file=sys.stderr)</div><div class='add'>+        self._walk(sysfs)</div><div class='add'>+</div><div class='add'>+    def check_file(self, refs, found):</div><div class='add'>+        """Check missing ABI symbols for a given sysfs file"""</div><div class='add'>+</div><div class='add'>+        res_list = []</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            for names in refs:</div><div class='add'>+                fname = names[0]</div><div class='add'>+</div><div class='add'>+                res = {</div><div class='add'>+                    "found": False,</div><div class='add'>+                    "fname": fname,</div><div class='add'>+                    "msg": "",</div><div class='add'>+                }</div><div class='add'>+                res_list.append(res)</div><div class='add'>+</div><div class='add'>+                re_what = self.abi.get_regexes(fname)</div><div class='add'>+                if not re_what:</div><div class='add'>+                    self.abi.log.warning(f"missing rules for {fname}")</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                for name in names:</div><div class='add'>+                    for r in re_what:</div><div class='add'>+                        if self.abi.debug &amp; AbiDebug.UNDEFINED:</div><div class='add'>+                            self.log.debug("check if %s matches '%s'", name, r.pattern)</div><div class='add'>+                        if r.match(name):</div><div class='add'>+                            res["found"] = True</div><div class='add'>+                            if found:</div><div class='add'>+                                res["msg"] += f"  {fname}: regex:\n\t"</div><div class='add'>+                            continue</div><div class='add'>+</div><div class='add'>+                if self.hints and not res["found"]:</div><div class='add'>+                    res["msg"] += f"  {fname} not found. Tested regexes:\n"</div><div class='add'>+                    for r in re_what:</div><div class='add'>+                        res["msg"] += "    " + r.pattern + "\n"</div><div class='add'>+</div><div class='add'>+        except KeyboardInterrupt:</div><div class='add'>+            pass</div><div class='add'>+</div><div class='add'>+        return res_list</div><div class='add'>+</div><div class='add'>+    def _ref_interactor(self, root):</div><div class='add'>+        """Recursive function to interact over the sysfs tree"""</div><div class='add'>+</div><div class='add'>+        for k, v in root.items():</div><div class='add'>+            if isinstance(v, dict):</div><div class='add'>+                yield from self._ref_interactor(v)</div><div class='add'>+</div><div class='add'>+            if root == self.root or k == "__name":</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if self.abi.re_string:</div><div class='add'>+                fname = v["__name"][0]</div><div class='add'>+                if self.abi.re_string.search(fname):</div><div class='add'>+                    yield v</div><div class='add'>+            else:</div><div class='add'>+                yield v</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def get_fileref(self, all_refs, chunk_size):</div><div class='add'>+        """Interactor to group refs into chunks"""</div><div class='add'>+</div><div class='add'>+        n = 0</div><div class='add'>+        refs = []</div><div class='add'>+</div><div class='add'>+        for ref in all_refs:</div><div class='add'>+            refs.append(ref)</div><div class='add'>+</div><div class='add'>+            n += 1</div><div class='add'>+            if n &gt;= chunk_size:</div><div class='add'>+                yield refs</div><div class='add'>+                n = 0</div><div class='add'>+                refs = []</div><div class='add'>+</div><div class='add'>+        yield refs</div><div class='add'>+</div><div class='add'>+    def check_undefined_symbols(self, max_workers=None, chunk_size=50,</div><div class='add'>+                                found=None, dry_run=None):</div><div class='add'>+        """Seach ABI for sysfs symbols missing documentation"""</div><div class='add'>+</div><div class='add'>+        self.abi.parse_abi()</div><div class='add'>+</div><div class='add'>+        if self.abi.debug &amp; AbiDebug.GRAPH:</div><div class='add'>+            self.print_graph()</div><div class='add'>+</div><div class='add'>+        all_refs = []</div><div class='add'>+        for ref in self._ref_interactor(self.root):</div><div class='add'>+            all_refs.append(ref["__name"])</div><div class='add'>+</div><div class='add'>+        if dry_run:</div><div class='add'>+            print("Would check", file=sys.stderr)</div><div class='add'>+            for ref in all_refs:</div><div class='add'>+                print(", ".join(ref))</div><div class='add'>+</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        print("Starting to search symbols (it may take several minutes):",</div><div class='add'>+              file=sys.stderr)</div><div class='add'>+        start = datetime.now()</div><div class='add'>+        old_elapsed = None</div><div class='add'>+</div><div class='add'>+        # Python doesn't support multithreading due to limitations on its</div><div class='add'>+        # global lock (GIL). While Python 3.13 finally made GIL optional,</div><div class='add'>+        # there are still issues related to it. Also, we want to have</div><div class='add'>+        # backward compatibility with older versions of Python.</div><div class='add'>+        #</div><div class='add'>+        # So, use instead multiprocess. However, Python is very slow passing</div><div class='add'>+        # data from/to multiple processes. Also, it may consume lots of memory</div><div class='add'>+        # if the data to be shared is not small.  So, we need to group workload</div><div class='add'>+        # in chunks that are big enough to generate performance gains while</div><div class='add'>+        # not being so big that would cause out-of-memory.</div><div class='add'>+</div><div class='add'>+        num_refs = len(all_refs)</div><div class='add'>+        print(f"Number of references to parse: {num_refs}", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        if not max_workers:</div><div class='add'>+            max_workers = os.cpu_count()</div><div class='add'>+        elif max_workers &gt; os.cpu_count():</div><div class='add'>+            max_workers = os.cpu_count()</div><div class='add'>+</div><div class='add'>+        max_workers = max(max_workers, 1)</div><div class='add'>+</div><div class='add'>+        max_chunk_size = int((num_refs + max_workers - 1) / max_workers)</div><div class='add'>+        chunk_size = min(chunk_size, max_chunk_size)</div><div class='add'>+        chunk_size = max(1, chunk_size)</div><div class='add'>+</div><div class='add'>+        if max_workers &gt; 1:</div><div class='add'>+            executor = futures.ProcessPoolExecutor</div><div class='add'>+</div><div class='add'>+            # Place references in a random order. This may help improving</div><div class='add'>+            # performance, by mixing complex/simple expressions when creating</div><div class='add'>+            # chunks</div><div class='add'>+            shuffle(all_refs)</div><div class='add'>+        else:</div><div class='add'>+            # Python has a high overhead with processes. When there's just</div><div class='add'>+            # one worker, it is faster to not create a new process.</div><div class='add'>+            # Yet, User still deserves to have a progress print. So, use</div><div class='add'>+            # python's "thread", which is actually a single process, using</div><div class='add'>+            # an internal schedule to switch between tasks. No performance</div><div class='add'>+            # gains for non-IO tasks, but still it can be quickly interrupted</div><div class='add'>+            # from time to time to display progress.</div><div class='add'>+            executor = futures.ThreadPoolExecutor</div><div class='add'>+</div><div class='add'>+        not_found = []</div><div class='add'>+        f_list = []</div><div class='add'>+        with executor(max_workers=max_workers) as exe:</div><div class='add'>+            for refs in self.get_fileref(all_refs, chunk_size):</div><div class='add'>+                if refs:</div><div class='add'>+                    try:</div><div class='add'>+                        f_list.append(exe.submit(self.check_file, refs, found))</div><div class='add'>+</div><div class='add'>+                    except KeyboardInterrupt:</div><div class='add'>+                        return</div><div class='add'>+</div><div class='add'>+            total = len(f_list)</div><div class='add'>+</div><div class='add'>+            if not total:</div><div class='add'>+                if self.abi.re_string:</div><div class='add'>+                    print(f"No ABI symbol matches {self.abi.search_string}")</div><div class='add'>+                else:</div><div class='add'>+                    self.abi.log.warning("No ABI symbols found")</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            print(f"{len(f_list):6d} jobs queued on {max_workers} workers",</div><div class='add'>+                  file=sys.stderr)</div><div class='add'>+</div><div class='add'>+            while f_list:</div><div class='add'>+                try:</div><div class='add'>+                    t = futures.wait(f_list, timeout=1,</div><div class='add'>+                                     return_when=futures.FIRST_COMPLETED)</div><div class='add'>+</div><div class='add'>+                    done = t[0]</div><div class='add'>+</div><div class='add'>+                    for fut in done:</div><div class='add'>+                        res_list = fut.result()</div><div class='add'>+</div><div class='add'>+                        for res in res_list:</div><div class='add'>+                            if not res["found"]:</div><div class='add'>+                                not_found.append(res["fname"])</div><div class='add'>+                            if res["msg"]:</div><div class='add'>+                                print(res["msg"])</div><div class='add'>+</div><div class='add'>+                        f_list.remove(fut)</div><div class='add'>+                except KeyboardInterrupt:</div><div class='add'>+                    return</div><div class='add'>+</div><div class='add'>+                except RuntimeError as e:</div><div class='add'>+                    self.abi.log.warning(f"Future: {e}")</div><div class='add'>+                    break</div><div class='add'>+</div><div class='add'>+                if sys.stderr.isatty():</div><div class='add'>+                    elapsed = str(datetime.now() - start).split(".", maxsplit=1)[0]</div><div class='add'>+                    if len(f_list) &lt; total:</div><div class='add'>+                        elapsed += f" ({total - len(f_list)}/{total} jobs completed).  "</div><div class='add'>+                    if elapsed != old_elapsed:</div><div class='add'>+                        print(elapsed + "\r", end="", flush=True,</div><div class='add'>+                              file=sys.stderr)</div><div class='add'>+                        old_elapsed = elapsed</div><div class='add'>+</div><div class='add'>+        elapsed = str(datetime.now() - start).split(".", maxsplit=1)[0]</div><div class='add'>+        print(elapsed, file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        for f in sorted(not_found):</div><div class='add'>+            print(f"{f} not found.")</div><div class='head'>diff --git a/tools/lib/python/feat/parse_features.py b/tools/lib/python/feat/parse_features.py<br/>new file mode 100755<br/>index 000000000000..b88c04d3e2fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/feat/parse_features.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/feat/parse_features.py</a></div><div class='hunk'>@@ -0,0 +1,494 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# pylint: disable=R0902,R0911,R0912,R0914,R0915</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Library to parse the Linux Feature files and produce a ReST book.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from glob import iglob</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class ParseFeature:</div><div class='add'>+    """</div><div class='add'>+    Parses Documentation/features, allowing to generate ReST documentation</div><div class='add'>+    from it.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    h_name = "Feature"</div><div class='add'>+    h_kconfig = "Kconfig"</div><div class='add'>+    h_description = "Description"</div><div class='add'>+    h_subsys = "Subsystem"</div><div class='add'>+    h_status = "Status"</div><div class='add'>+    h_arch = "Architecture"</div><div class='add'>+</div><div class='add'>+    # Sort order for status. Others will be mapped at the end.</div><div class='add'>+    status_map = {</div><div class='add'>+        "ok":   0,</div><div class='add'>+        "TODO": 1,</div><div class='add'>+        "N/A":  2,</div><div class='add'>+        # The only missing status is "..", which was mapped as "---",</div><div class='add'>+        # as this is an special ReST cell value. Let it get the</div><div class='add'>+        # default order (99).</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    def __init__(self, prefix, debug=0, enable_fname=False):</div><div class='add'>+        """</div><div class='add'>+        Sets internal variables</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.prefix = prefix</div><div class='add'>+        self.debug = debug</div><div class='add'>+        self.enable_fname = enable_fname</div><div class='add'>+</div><div class='add'>+        self.data = {}</div><div class='add'>+</div><div class='add'>+        # Initial maximum values use just the headers</div><div class='add'>+        self.max_size_name = len(self.h_name)</div><div class='add'>+        self.max_size_kconfig = len(self.h_kconfig)</div><div class='add'>+        self.max_size_description = len(self.h_description)</div><div class='add'>+        self.max_size_desc_word = 0</div><div class='add'>+        self.max_size_subsys = len(self.h_subsys)</div><div class='add'>+        self.max_size_status = len(self.h_status)</div><div class='add'>+        self.max_size_arch = len(self.h_arch)</div><div class='add'>+        self.max_size_arch_with_header = self.max_size_arch + self.max_size_arch</div><div class='add'>+        self.description_size = 1</div><div class='add'>+</div><div class='add'>+        self.msg = ""</div><div class='add'>+</div><div class='add'>+    def emit(self, msg="", end="\n"):</div><div class='add'>+        self.msg += msg + end</div><div class='add'>+</div><div class='add'>+    def parse_error(self, fname, ln, msg, data=None):</div><div class='add'>+        """</div><div class='add'>+        Displays an error message, printing file name and line</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if ln:</div><div class='add'>+            fname += f"#{ln}"</div><div class='add'>+</div><div class='add'>+        print(f"Warning: file {fname}: {msg}", file=sys.stderr, end="")</div><div class='add'>+</div><div class='add'>+        if data:</div><div class='add'>+            data = data.rstrip()</div><div class='add'>+            print(f":\n\t{data}", file=sys.stderr)</div><div class='add'>+        else:</div><div class='add'>+            print("", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+    def parse_feat_file(self, fname):</div><div class='add'>+        """Parses a single arch-support.txt feature file"""</div><div class='add'>+</div><div class='add'>+        if os.path.isdir(fname):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        base = os.path.basename(fname)</div><div class='add'>+</div><div class='add'>+        if base != "arch-support.txt":</div><div class='add'>+            if self.debug:</div><div class='add'>+                print(f"ignoring {fname}", file=sys.stderr)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        subsys = os.path.dirname(fname).split("/")[-2]</div><div class='add'>+        self.max_size_subsys = max(self.max_size_subsys, len(subsys))</div><div class='add'>+</div><div class='add'>+        feature_name = ""</div><div class='add'>+        kconfig = ""</div><div class='add'>+        description = ""</div><div class='add'>+        comments = ""</div><div class='add'>+        arch_table = {}</div><div class='add'>+</div><div class='add'>+        if self.debug &gt; 1:</div><div class='add'>+            print(f"Opening {fname}", file=sys.stderr)</div><div class='add'>+</div><div class='add'>+        if self.enable_fname:</div><div class='add'>+            full_fname = os.path.abspath(fname)</div><div class='add'>+            self.emit(f".. FILE {full_fname}")</div><div class='add'>+</div><div class='add'>+        with open(fname, encoding="utf-8") as f:</div><div class='add'>+            for ln, line in enumerate(f, start=1):</div><div class='add'>+                line = line.strip()</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\#\s+Feature\s+name:\s*(.*\S)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    feature_name = match.group(1)</div><div class='add'>+</div><div class='add'>+                    self.max_size_name = max(self.max_size_name,</div><div class='add'>+                                             len(feature_name))</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\#\s+Kconfig:\s*(.*\S)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    kconfig = match.group(1)</div><div class='add'>+</div><div class='add'>+                    self.max_size_kconfig = max(self.max_size_kconfig,</div><div class='add'>+                                                len(kconfig))</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\#\s+description:\s*(.*\S)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    description = match.group(1)</div><div class='add'>+</div><div class='add'>+                    self.max_size_description = max(self.max_size_description,</div><div class='add'>+                                                    len(description))</div><div class='add'>+</div><div class='add'>+                    words = re.split(r"\s+", line)[1:]</div><div class='add'>+                    for word in words:</div><div class='add'>+                        self.max_size_desc_word = max(self.max_size_desc_word,</div><div class='add'>+                                                        len(word))</div><div class='add'>+</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if re.search(r"^\\s*$", line):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if re.match(r"^\s*\-+\s*$", line):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if re.search(r"^\s*\|\s*arch\s*\|\s*status\s*\|\s*$", line):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\#\s*(.*)$", line)</div><div class='add'>+                if match:</div><div class='add'>+                    comments += match.group(1)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\s*\|\s*(\S+):\s*\|\s*(\S+)\s*\|\s*$", line)</div><div class='add'>+                if match:</div><div class='add'>+                    arch = match.group(1)</div><div class='add'>+                    status = match.group(2)</div><div class='add'>+</div><div class='add'>+                    self.max_size_status = max(self.max_size_status,</div><div class='add'>+                                               len(status))</div><div class='add'>+                    self.max_size_arch = max(self.max_size_arch, len(arch))</div><div class='add'>+</div><div class='add'>+                    if status == "..":</div><div class='add'>+                        status = "---"</div><div class='add'>+</div><div class='add'>+                    arch_table[arch] = status</div><div class='add'>+</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                self.parse_error(fname, ln, "Line is invalid", line)</div><div class='add'>+</div><div class='add'>+        if not feature_name:</div><div class='add'>+            self.parse_error(fname, 0, "Feature name not found")</div><div class='add'>+            return</div><div class='add'>+        if not subsys:</div><div class='add'>+            self.parse_error(fname, 0, "Subsystem not found")</div><div class='add'>+            return</div><div class='add'>+        if not kconfig:</div><div class='add'>+            self.parse_error(fname, 0, "Kconfig not found")</div><div class='add'>+            return</div><div class='add'>+        if not description:</div><div class='add'>+            self.parse_error(fname, 0, "Description not found")</div><div class='add'>+            return</div><div class='add'>+        if not arch_table:</div><div class='add'>+            self.parse_error(fname, 0, "Architecture table not found")</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        self.data[feature_name] = {</div><div class='add'>+            "where": fname,</div><div class='add'>+            "subsys": subsys,</div><div class='add'>+            "kconfig": kconfig,</div><div class='add'>+            "description": description,</div><div class='add'>+            "comments": comments,</div><div class='add'>+            "table": arch_table,</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        self.max_size_arch_with_header = self.max_size_arch + len(self.h_arch)</div><div class='add'>+</div><div class='add'>+    def parse(self):</div><div class='add'>+        """Parses all arch-support.txt feature files inside self.prefix"""</div><div class='add'>+</div><div class='add'>+        path = os.path.expanduser(self.prefix)</div><div class='add'>+</div><div class='add'>+        if self.debug &gt; 2:</div><div class='add'>+            print(f"Running parser for {path}")</div><div class='add'>+</div><div class='add'>+        example_path = os.path.join(path, "arch-support.txt")</div><div class='add'>+</div><div class='add'>+        for fname in iglob(os.path.join(path, "**"), recursive=True):</div><div class='add'>+            if fname != example_path:</div><div class='add'>+                self.parse_feat_file(fname)</div><div class='add'>+</div><div class='add'>+        return self.data</div><div class='add'>+</div><div class='add'>+    def output_arch_table(self, arch, feat=None):</div><div class='add'>+        """</div><div class='add'>+        Output feature(s) for a given architecture.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        title = f"Feature status on {arch} architecture"</div><div class='add'>+</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit(title)</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit()</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_subsys + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_name + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_kconfig + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_description)</div><div class='add'>+</div><div class='add'>+        self.emit(f"{self.h_subsys:&lt;{self.max_size_subsys}}  ", end="")</div><div class='add'>+        self.emit(f"{self.h_name:&lt;{self.max_size_name}}  ", end="")</div><div class='add'>+        self.emit(f"{self.h_kconfig:&lt;{self.max_size_kconfig}}  ", end="")</div><div class='add'>+        self.emit(f"{self.h_status:&lt;{self.max_size_status}}  ", end="")</div><div class='add'>+        self.emit(f"{self.h_description:&lt;{self.max_size_description}}")</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_subsys + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_name + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_kconfig + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_description)</div><div class='add'>+</div><div class='add'>+        sorted_features = sorted(self.data.keys(),</div><div class='add'>+                                 key=lambda x: (self.data[x]["subsys"],</div><div class='add'>+                                                x.lower()))</div><div class='add'>+</div><div class='add'>+        for name in sorted_features:</div><div class='add'>+            if feat and name != feat:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            arch_table = self.data[name]["table"]</div><div class='add'>+</div><div class='add'>+            if not arch in arch_table:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            self.emit(f"{self.data[name]['subsys']:&lt;{self.max_size_subsys}}  ",</div><div class='add'>+                  end="")</div><div class='add'>+            self.emit(f"{name:&lt;{self.max_size_name}}  ", end="")</div><div class='add'>+            self.emit(f"{self.data[name]['kconfig']:&lt;{self.max_size_kconfig}}  ",</div><div class='add'>+                  end="")</div><div class='add'>+            self.emit(f"{arch_table[arch]:&lt;{self.max_size_status}}  ",</div><div class='add'>+                  end="")</div><div class='add'>+            self.emit(f"{self.data[name]['description']}")</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_subsys + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_name + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_kconfig + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_description)</div><div class='add'>+</div><div class='add'>+        return self.msg</div><div class='add'>+</div><div class='add'>+    def output_feature(self, feat):</div><div class='add'>+        """</div><div class='add'>+        Output a feature on all architectures</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        title = f"Feature {feat}"</div><div class='add'>+</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit(title)</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit()</div><div class='add'>+</div><div class='add'>+        if not feat in self.data:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if self.data[feat]["subsys"]:</div><div class='add'>+            self.emit(f":Subsystem: {self.data[feat]['subsys']}")</div><div class='add'>+        if self.data[feat]["kconfig"]:</div><div class='add'>+            self.emit(f":Kconfig: {self.data[feat]['kconfig']}")</div><div class='add'>+</div><div class='add'>+        desc = self.data[feat]["description"]</div><div class='add'>+        desc = desc[0].upper() + desc[1:]</div><div class='add'>+        desc = desc.rstrip(". \t")</div><div class='add'>+        self.emit(f"\n{desc}.\n")</div><div class='add'>+</div><div class='add'>+        com = self.data[feat]["comments"].strip()</div><div class='add'>+        if com:</div><div class='add'>+            self.emit("Comments")</div><div class='add'>+            self.emit("--------")</div><div class='add'>+            self.emit(f"\n{com}\n")</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_arch + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status)</div><div class='add'>+</div><div class='add'>+        self.emit(f"{self.h_arch:&lt;{self.max_size_arch}}  ", end="")</div><div class='add'>+        self.emit(f"{self.h_status:&lt;{self.max_size_status}}")</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_arch + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status)</div><div class='add'>+</div><div class='add'>+        arch_table = self.data[feat]["table"]</div><div class='add'>+        for arch in sorted(arch_table.keys()):</div><div class='add'>+            self.emit(f"{arch:&lt;{self.max_size_arch}}  ", end="")</div><div class='add'>+            self.emit(f"{arch_table[arch]:&lt;{self.max_size_status}}")</div><div class='add'>+</div><div class='add'>+        self.emit("=" * self.max_size_arch + "  ", end="")</div><div class='add'>+        self.emit("=" * self.max_size_status)</div><div class='add'>+</div><div class='add'>+        return self.msg</div><div class='add'>+</div><div class='add'>+    def matrix_lines(self, desc_size, max_size_status, header):</div><div class='add'>+        """</div><div class='add'>+        Helper function to split element tables at the output matrix</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if header:</div><div class='add'>+            ln_marker = "="</div><div class='add'>+        else:</div><div class='add'>+            ln_marker = "-"</div><div class='add'>+</div><div class='add'>+        self.emit("+" + ln_marker * self.max_size_name + "+", end="")</div><div class='add'>+        self.emit(ln_marker * desc_size, end="")</div><div class='add'>+        self.emit("+" + ln_marker * max_size_status + "+")</div><div class='add'>+</div><div class='add'>+    def output_matrix(self):</div><div class='add'>+        """</div><div class='add'>+        Generates a set of tables, groped by subsystem, containing</div><div class='add'>+        what's the feature state on each architecture.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        title = "Feature status on all architectures"</div><div class='add'>+</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit(title)</div><div class='add'>+        self.emit("=" * len(title))</div><div class='add'>+        self.emit()</div><div class='add'>+</div><div class='add'>+        desc_title = f"{self.h_kconfig} / {self.h_description}"</div><div class='add'>+</div><div class='add'>+        desc_size = self.max_size_kconfig + 4</div><div class='add'>+        if not self.description_size:</div><div class='add'>+            desc_size = max(self.max_size_description, desc_size)</div><div class='add'>+        else:</div><div class='add'>+            desc_size = max(self.description_size, desc_size)</div><div class='add'>+</div><div class='add'>+        desc_size = max(self.max_size_desc_word, desc_size, len(desc_title))</div><div class='add'>+</div><div class='add'>+        notcompat = "Not compatible"</div><div class='add'>+        self.max_size_status = max(self.max_size_status, len(notcompat))</div><div class='add'>+</div><div class='add'>+        min_status_size = self.max_size_status + self.max_size_arch + 4</div><div class='add'>+        max_size_status = max(min_status_size, self.max_size_status)</div><div class='add'>+</div><div class='add'>+        h_status_per_arch = "Status per architecture"</div><div class='add'>+        max_size_status = max(max_size_status, len(h_status_per_arch))</div><div class='add'>+</div><div class='add'>+        cur_subsys = None</div><div class='add'>+        for name in sorted(self.data.keys(),</div><div class='add'>+                           key=lambda x: (self.data[x]["subsys"], x.lower())):</div><div class='add'>+            if not cur_subsys or cur_subsys != self.data[name]["subsys"]:</div><div class='add'>+                if cur_subsys:</div><div class='add'>+                    self.emit()</div><div class='add'>+</div><div class='add'>+                cur_subsys = self.data[name]["subsys"]</div><div class='add'>+</div><div class='add'>+                title = f"Subsystem: {cur_subsys}"</div><div class='add'>+                self.emit(title)</div><div class='add'>+                self.emit("=" * len(title))</div><div class='add'>+                self.emit()</div><div class='add'>+</div><div class='add'>+                self.matrix_lines(desc_size, max_size_status, 0)</div><div class='add'>+</div><div class='add'>+                self.emit(f"|{self.h_name:&lt;{self.max_size_name}}", end="")</div><div class='add'>+                self.emit(f"|{desc_title:&lt;{desc_size}}", end="")</div><div class='add'>+                self.emit(f"|{h_status_per_arch:&lt;{max_size_status}}|")</div><div class='add'>+</div><div class='add'>+                self.matrix_lines(desc_size, max_size_status, 1)</div><div class='add'>+</div><div class='add'>+            lines = []</div><div class='add'>+            descs = []</div><div class='add'>+            cur_status = ""</div><div class='add'>+            line = ""</div><div class='add'>+</div><div class='add'>+            arch_table = sorted(self.data[name]["table"].items(),</div><div class='add'>+                                key=lambda x: (self.status_map.get(x[1], 99),</div><div class='add'>+                                               x[0].lower()))</div><div class='add'>+</div><div class='add'>+            for arch, status in arch_table:</div><div class='add'>+                if status == "---":</div><div class='add'>+                    status = notcompat</div><div class='add'>+</div><div class='add'>+                if status != cur_status:</div><div class='add'>+                    if line != "":</div><div class='add'>+                        lines.append(line)</div><div class='add'>+                        line = ""</div><div class='add'>+                    line = f"- **{status}**: {arch}"</div><div class='add'>+                elif len(line) + len(arch) + 2 &lt; max_size_status:</div><div class='add'>+                    line += f", {arch}"</div><div class='add'>+                else:</div><div class='add'>+                    lines.append(line)</div><div class='add'>+                    line = f"  {arch}"</div><div class='add'>+                cur_status = status</div><div class='add'>+</div><div class='add'>+            if line != "":</div><div class='add'>+                lines.append(line)</div><div class='add'>+</div><div class='add'>+            description = self.data[name]["description"]</div><div class='add'>+            while len(description) &gt; desc_size:</div><div class='add'>+                desc_line = description[:desc_size]</div><div class='add'>+</div><div class='add'>+                last_space = desc_line.rfind(" ")</div><div class='add'>+                if last_space != -1:</div><div class='add'>+                    desc_line = desc_line[:last_space]</div><div class='add'>+                    descs.append(desc_line)</div><div class='add'>+                    description = description[last_space + 1:]</div><div class='add'>+                else:</div><div class='add'>+                    desc_line = desc_line[:-1]</div><div class='add'>+                    descs.append(desc_line + "\\")</div><div class='add'>+                    description = description[len(desc_line):]</div><div class='add'>+</div><div class='add'>+            if description:</div><div class='add'>+                descs.append(description)</div><div class='add'>+</div><div class='add'>+            while len(lines) &lt; 2 + len(descs):</div><div class='add'>+                lines.append("")</div><div class='add'>+</div><div class='add'>+            for ln, line in enumerate(lines):</div><div class='add'>+                col = ["", ""]</div><div class='add'>+</div><div class='add'>+                if not ln:</div><div class='add'>+                    col[0] = name</div><div class='add'>+                    col[1] = f"``{self.data[name]['kconfig']}``"</div><div class='add'>+                else:</div><div class='add'>+                    if ln &gt;= 2 and descs:</div><div class='add'>+                        col[1] = descs.pop(0)</div><div class='add'>+</div><div class='add'>+                self.emit(f"|{col[0]:&lt;{self.max_size_name}}", end="")</div><div class='add'>+                self.emit(f"|{col[1]:&lt;{desc_size}}", end="")</div><div class='add'>+                self.emit(f"|{line:&lt;{max_size_status}}|")</div><div class='add'>+</div><div class='add'>+            self.matrix_lines(desc_size, max_size_status, 0)</div><div class='add'>+</div><div class='add'>+        return self.msg</div><div class='add'>+</div><div class='add'>+    def list_arch_features(self, arch, feat):</div><div class='add'>+        """</div><div class='add'>+        Print a matrix of kernel feature support for the chosen architecture.</div><div class='add'>+        """</div><div class='add'>+        self.emit("#")</div><div class='add'>+        self.emit(f"# Kernel feature support matrix of the '{arch}' architecture:")</div><div class='add'>+        self.emit("#")</div><div class='add'>+</div><div class='add'>+        # Sort by subsystem, then by feature name (case‑insensitive)</div><div class='add'>+        for name in sorted(self.data.keys(),</div><div class='add'>+                           key=lambda n: (self.data[n]["subsys"].lower(),</div><div class='add'>+                                          n.lower())):</div><div class='add'>+            if feat and name != feat:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            feature = self.data[name]</div><div class='add'>+            arch_table = feature["table"]</div><div class='add'>+            status = arch_table.get(arch, "")</div><div class='add'>+            status = " " * ((4 - len(status)) // 2) + status</div><div class='add'>+</div><div class='add'>+            self.emit(f"{feature['subsys']:&gt;{self.max_size_subsys + 1}}/ ",</div><div class='add'>+                      end="")</div><div class='add'>+            self.emit(f"{name:&lt;{self.max_size_name}}: ", end="")</div><div class='add'>+            self.emit(f"{status:&lt;5}|   ", end="")</div><div class='add'>+            self.emit(f"{feature['kconfig']:&gt;{self.max_size_kconfig}} ",</div><div class='add'>+                      end="")</div><div class='add'>+            self.emit(f"#  {feature['description']}")</div><div class='add'>+</div><div class='add'>+        return self.msg</div><div class='head'>diff --git a/tools/lib/python/jobserver.py b/tools/lib/python/jobserver.py<br/>new file mode 100755<br/>index 000000000000..a24f30ef4fa8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/jobserver.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/jobserver.py</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+#</div><div class='add'>+# pylint: disable=C0103,C0209</div><div class='add'>+#</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Interacts with the POSIX jobserver during the Kernel build time.</div><div class='add'>+</div><div class='add'>+A "normal" jobserver task, like the one initiated by a make subrocess would do:</div><div class='add'>+</div><div class='add'>+    - open read/write file descriptors to communicate with the job server;</div><div class='add'>+    - ask for one slot by calling:</div><div class='add'>+        claim = os.read(reader, 1)</div><div class='add'>+    - when the job finshes, call:</div><div class='add'>+        os.write(writer, b"+")  # os.write(writer, claim)</div><div class='add'>+</div><div class='add'>+Here, the goal is different: This script aims to get the remaining number</div><div class='add'>+of slots available, using all of them to run a command which handle tasks in</div><div class='add'>+parallel. To to that, it has a loop that ends only after there are no</div><div class='add'>+slots left. It then increments the number by one, in order to allow a</div><div class='add'>+call equivalent to make -j$((claim+1)), e.g. having a parent make creating</div><div class='add'>+$claim child to do the actual work.</div><div class='add'>+</div><div class='add'>+The end goal here is to keep the total number of build tasks under the</div><div class='add'>+limit established by the initial make -j$n_proc call.</div><div class='add'>+</div><div class='add'>+See:</div><div class='add'>+    https://www.gnu.org/software/make/manual/html_node/POSIX-Jobserver.html#POSIX-Jobserver</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import errno</div><div class='add'>+import os</div><div class='add'>+import subprocess</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+class JobserverExec:</div><div class='add'>+    """</div><div class='add'>+    Claim all slots from make using POSIX Jobserver.</div><div class='add'>+</div><div class='add'>+    The main methods here are:</div><div class='add'>+    - open(): reserves all slots;</div><div class='add'>+    - close(): method returns all used slots back to make;</div><div class='add'>+    - run(): executes a command setting PARALLELISM=&lt;available slots jobs + 1&gt;</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self):</div><div class='add'>+        """Initialize internal vars"""</div><div class='add'>+        self.claim = 0</div><div class='add'>+        self.jobs = b""</div><div class='add'>+        self.reader = None</div><div class='add'>+        self.writer = None</div><div class='add'>+        self.is_open = False</div><div class='add'>+</div><div class='add'>+    def open(self):</div><div class='add'>+        """Reserve all available slots to be claimed later on"""</div><div class='add'>+</div><div class='add'>+        if self.is_open:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            # Fetch the make environment options.</div><div class='add'>+            flags = os.environ["MAKEFLAGS"]</div><div class='add'>+            # Look for "--jobserver=R,W"</div><div class='add'>+            # Note that GNU Make has used --jobserver-fds and --jobserver-auth</div><div class='add'>+            # so this handles all of them.</div><div class='add'>+            opts = [x for x in flags.split(" ") if x.startswith("--jobserver")]</div><div class='add'>+</div><div class='add'>+            # Parse out R,W file descriptor numbers and set them nonblocking.</div><div class='add'>+            # If the MAKEFLAGS variable contains multiple instances of the</div><div class='add'>+            # --jobserver-auth= option, the last one is relevant.</div><div class='add'>+            fds = opts[-1].split("=", 1)[1]</div><div class='add'>+</div><div class='add'>+            # Starting with GNU Make 4.4, named pipes are used for reader</div><div class='add'>+            # and writer.</div><div class='add'>+            # Example argument: --jobserver-auth=fifo:/tmp/GMfifo8134</div><div class='add'>+            _, _, path = fds.partition("fifo:")</div><div class='add'>+</div><div class='add'>+            if path:</div><div class='add'>+                self.reader = os.open(path, os.O_RDONLY | os.O_NONBLOCK)</div><div class='add'>+                self.writer = os.open(path, os.O_WRONLY)</div><div class='add'>+            else:</div><div class='add'>+                self.reader, self.writer = [int(x) for x in fds.split(",", 1)]</div><div class='add'>+                # Open a private copy of reader to avoid setting nonblocking</div><div class='add'>+                # on an unexpecting process with the same reader fd.</div><div class='add'>+                self.reader = os.open("/proc/self/fd/%d" % (self.reader),</div><div class='add'>+                                      os.O_RDONLY | os.O_NONBLOCK)</div><div class='add'>+</div><div class='add'>+            # Read out as many jobserver slots as possible</div><div class='add'>+            while True:</div><div class='add'>+                try:</div><div class='add'>+                    slot = os.read(self.reader, 8)</div><div class='add'>+                    self.jobs += slot</div><div class='add'>+                except (OSError, IOError) as e:</div><div class='add'>+                    if e.errno == errno.EWOULDBLOCK:</div><div class='add'>+                        # Stop at the end of the jobserver queue.</div><div class='add'>+                        break</div><div class='add'>+                    # If something went wrong, give back the jobs.</div><div class='add'>+                    if self.jobs:</div><div class='add'>+                        os.write(self.writer, self.jobs)</div><div class='add'>+                    raise e</div><div class='add'>+</div><div class='add'>+            # Add a bump for our caller's reserveration, since we're just going</div><div class='add'>+            # to sit here blocked on our child.</div><div class='add'>+            self.claim = len(self.jobs) + 1</div><div class='add'>+</div><div class='add'>+        except (KeyError, IndexError, ValueError, OSError, IOError):</div><div class='add'>+            # Any missing environment strings or bad fds should result in just</div><div class='add'>+            # not being parallel.</div><div class='add'>+            self.claim = None</div><div class='add'>+</div><div class='add'>+        self.is_open = True</div><div class='add'>+</div><div class='add'>+    def close(self):</div><div class='add'>+        """Return all reserved slots to Jobserver"""</div><div class='add'>+</div><div class='add'>+        if not self.is_open:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Return all the reserved slots.</div><div class='add'>+        if len(self.jobs):</div><div class='add'>+            os.write(self.writer, self.jobs)</div><div class='add'>+</div><div class='add'>+        self.is_open = False</div><div class='add'>+</div><div class='add'>+    def __enter__(self):</div><div class='add'>+        self.open()</div><div class='add'>+        return self</div><div class='add'>+</div><div class='add'>+    def __exit__(self, exc_type, exc_value, exc_traceback):</div><div class='add'>+        self.close()</div><div class='add'>+</div><div class='add'>+    def run(self, cmd, *args, **pwargs):</div><div class='add'>+        """</div><div class='add'>+        Run a command setting PARALLELISM env variable to the number of</div><div class='add'>+        available job slots (claim) + 1, e.g. it will reserve claim slots</div><div class='add'>+        to do the actual build work, plus one to monitor its children.</div><div class='add'>+        """</div><div class='add'>+        self.open()             # Ensure that self.claim is set</div><div class='add'>+</div><div class='add'>+        # We can only claim parallelism if there was a jobserver (i.e. a</div><div class='add'>+        # top-level "-jN" argument) and there were no other failures. Otherwise</div><div class='add'>+        # leave out the environment variable and let the child figure out what</div><div class='add'>+        # is best.</div><div class='add'>+        if self.claim:</div><div class='add'>+            os.environ["PARALLELISM"] = str(self.claim)</div><div class='add'>+</div><div class='add'>+        return subprocess.call(cmd, *args, **pwargs)</div><div class='head'>diff --git a/tools/lib/python/kdoc/__init__.py b/tools/lib/python/kdoc/__init__.py<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/__init__.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/__init__.py</a></div><div class='head'>diff --git a/tools/lib/python/kdoc/enrich_formatter.py b/tools/lib/python/kdoc/enrich_formatter.py<br/>new file mode 100644<br/>index 000000000000..bb171567a4ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/enrich_formatter.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/enrich_formatter.py</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2025 by Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Ancillary argparse HelpFormatter class that works on a similar way as</div><div class='add'>+argparse.RawDescriptionHelpFormatter, e.g. description maintains line</div><div class='add'>+breaks, but it also implement transformations to the help text. The</div><div class='add'>+actual transformations ar given by enrich_text(), if the output is tty.</div><div class='add'>+</div><div class='add'>+Currently, the follow transformations are done:</div><div class='add'>+</div><div class='add'>+    - Positional arguments are shown in upper cases;</div><div class='add'>+    - if output is TTY, ``var`` and positional arguments are shown prepended</div><div class='add'>+      by an ANSI SGR code. This is usually translated to bold. On some</div><div class='add'>+      terminals, like, konsole, this is translated into a colored bold text.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import re</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+class EnrichFormatter(argparse.HelpFormatter):</div><div class='add'>+    """</div><div class='add'>+    Better format the output, making easier to identify the positional args</div><div class='add'>+    and how they're used at the __doc__ description.</div><div class='add'>+    """</div><div class='add'>+    def __init__(self, *args, **kwargs):</div><div class='add'>+        """Initialize class and check if is TTY"""</div><div class='add'>+        super().__init__(*args, **kwargs)</div><div class='add'>+        self._tty = sys.stdout.isatty()</div><div class='add'>+</div><div class='add'>+    def enrich_text(self, text):</div><div class='add'>+        """Handle ReST markups (currently, only ``foo``)"""</div><div class='add'>+        if self._tty and text:</div><div class='add'>+            # Replace ``text`` with ANSI SGR (bold)</div><div class='add'>+            return re.sub(r'\`\`(.+?)\`\`',</div><div class='add'>+                          lambda m: f'\033[1m{m.group(1)}\033[0m', text)</div><div class='add'>+        return text</div><div class='add'>+</div><div class='add'>+    def _fill_text(self, text, width, indent):</div><div class='add'>+        """Enrich descriptions with markups on it"""</div><div class='add'>+        enriched = self.enrich_text(text)</div><div class='add'>+        return "\n".join(indent + line for line in enriched.splitlines())</div><div class='add'>+</div><div class='add'>+    def _format_usage(self, usage, actions, groups, prefix):</div><div class='add'>+        """Enrich positional arguments at usage: line"""</div><div class='add'>+</div><div class='add'>+        prog = self._prog</div><div class='add'>+        parts = []</div><div class='add'>+</div><div class='add'>+        for action in actions:</div><div class='add'>+            if action.option_strings:</div><div class='add'>+                opt = action.option_strings[0]</div><div class='add'>+                if action.nargs != 0:</div><div class='add'>+                    opt += f" {action.dest.upper()}"</div><div class='add'>+                parts.append(f"[{opt}]")</div><div class='add'>+            else:</div><div class='add'>+                # Positional argument</div><div class='add'>+                parts.append(self.enrich_text(f"``{action.dest.upper()}``"))</div><div class='add'>+</div><div class='add'>+        usage_text = f"{prefix or 'usage: '} {prog} {' '.join(parts)}\n"</div><div class='add'>+        return usage_text</div><div class='add'>+</div><div class='add'>+    def _format_action_invocation(self, action):</div><div class='add'>+        """Enrich argument names"""</div><div class='add'>+        if not action.option_strings:</div><div class='add'>+            return self.enrich_text(f"``{action.dest.upper()}``")</div><div class='add'>+</div><div class='add'>+        return ", ".join(action.option_strings)</div><div class='head'>diff --git a/tools/lib/python/kdoc/kdoc_files.py b/tools/lib/python/kdoc/kdoc_files.py<br/>new file mode 100644<br/>index 000000000000..bfe02baf1606<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/kdoc_files.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/kdoc_files.py</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+#</div><div class='add'>+# pylint: disable=R0903,R0913,R0914,R0917</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse lernel-doc tags on multiple kernel source files.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import argparse</div><div class='add'>+import logging</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+</div><div class='add'>+from kdoc.kdoc_parser import KernelDoc</div><div class='add'>+from kdoc.kdoc_output import OutputFormat</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class GlobSourceFiles:</div><div class='add'>+    """</div><div class='add'>+    Parse C source code file names and directories via an Interactor.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, srctree=None, valid_extensions=None):</div><div class='add'>+        """</div><div class='add'>+        Initialize valid extensions with a tuple.</div><div class='add'>+</div><div class='add'>+        If not defined, assume default C extensions (.c and .h)</div><div class='add'>+</div><div class='add'>+        It would be possible to use python's glob function, but it is</div><div class='add'>+        very slow, and it is not interactive. So, it would wait to read all</div><div class='add'>+        directories before actually do something.</div><div class='add'>+</div><div class='add'>+        So, let's use our own implementation.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not valid_extensions:</div><div class='add'>+            self.extensions = (".c", ".h")</div><div class='add'>+        else:</div><div class='add'>+            self.extensions = valid_extensions</div><div class='add'>+</div><div class='add'>+        self.srctree = srctree</div><div class='add'>+</div><div class='add'>+    def _parse_dir(self, dirname):</div><div class='add'>+        """Internal function to parse files recursively"""</div><div class='add'>+</div><div class='add'>+        with os.scandir(dirname) as obj:</div><div class='add'>+            for entry in obj:</div><div class='add'>+                name = os.path.join(dirname, entry.name)</div><div class='add'>+</div><div class='add'>+                if entry.is_dir(follow_symlinks=False):</div><div class='add'>+                    yield from self._parse_dir(name)</div><div class='add'>+</div><div class='add'>+                if not entry.is_file():</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                basename = os.path.basename(name)</div><div class='add'>+</div><div class='add'>+                if not basename.endswith(self.extensions):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                yield name</div><div class='add'>+</div><div class='add'>+    def parse_files(self, file_list, file_not_found_cb):</div><div class='add'>+        """</div><div class='add'>+        Define an iterator to parse all source files from file_list,</div><div class='add'>+        handling directories if any</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not file_list:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        for fname in file_list:</div><div class='add'>+            if self.srctree:</div><div class='add'>+                f = os.path.join(self.srctree, fname)</div><div class='add'>+            else:</div><div class='add'>+                f = fname</div><div class='add'>+</div><div class='add'>+            if os.path.isdir(f):</div><div class='add'>+                yield from self._parse_dir(f)</div><div class='add'>+            elif os.path.isfile(f):</div><div class='add'>+                yield f</div><div class='add'>+            elif file_not_found_cb:</div><div class='add'>+                file_not_found_cb(fname)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class KernelFiles():</div><div class='add'>+    """</div><div class='add'>+    Parse kernel-doc tags on multiple kernel source files.</div><div class='add'>+</div><div class='add'>+    There are two type of parsers defined here:</div><div class='add'>+        - self.parse_file(): parses both kernel-doc markups and</div><div class='add'>+          EXPORT_SYMBOL* macros;</div><div class='add'>+        - self.process_export_file(): parses only EXPORT_SYMBOL* macros.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def warning(self, msg):</div><div class='add'>+        """Ancillary routine to output a warning and increment error count"""</div><div class='add'>+</div><div class='add'>+        self.config.log.warning(msg)</div><div class='add'>+        self.errors += 1</div><div class='add'>+</div><div class='add'>+    def error(self, msg):</div><div class='add'>+        """Ancillary routine to output an error and increment error count"""</div><div class='add'>+</div><div class='add'>+        self.config.log.error(msg)</div><div class='add'>+        self.errors += 1</div><div class='add'>+</div><div class='add'>+    def parse_file(self, fname):</div><div class='add'>+        """</div><div class='add'>+        Parse a single Kernel source.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # Prevent parsing the same file twice if results are cached</div><div class='add'>+        if fname in self.files:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        doc = KernelDoc(self.config, fname)</div><div class='add'>+        export_table, entries = doc.parse_kdoc()</div><div class='add'>+</div><div class='add'>+        self.export_table[fname] = export_table</div><div class='add'>+</div><div class='add'>+        self.files.add(fname)</div><div class='add'>+        self.export_files.add(fname)      # parse_kdoc() already check exports</div><div class='add'>+</div><div class='add'>+        self.results[fname] = entries</div><div class='add'>+</div><div class='add'>+    def process_export_file(self, fname):</div><div class='add'>+        """</div><div class='add'>+        Parses EXPORT_SYMBOL* macros from a single Kernel source file.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # Prevent parsing the same file twice if results are cached</div><div class='add'>+        if fname in self.export_files:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        doc = KernelDoc(self.config, fname)</div><div class='add'>+        export_table = doc.parse_export()</div><div class='add'>+</div><div class='add'>+        if not export_table:</div><div class='add'>+            self.error(f"Error: Cannot check EXPORT_SYMBOL* on {fname}")</div><div class='add'>+            export_table = set()</div><div class='add'>+</div><div class='add'>+        self.export_table[fname] = export_table</div><div class='add'>+        self.export_files.add(fname)</div><div class='add'>+</div><div class='add'>+    def file_not_found_cb(self, fname):</div><div class='add'>+        """</div><div class='add'>+        Callback to warn if a file was not found.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.error(f"Cannot find file {fname}")</div><div class='add'>+</div><div class='add'>+    def __init__(self, verbose=False, out_style=None,</div><div class='add'>+                 werror=False, wreturn=False, wshort_desc=False,</div><div class='add'>+                 wcontents_before_sections=False,</div><div class='add'>+                 logger=None):</div><div class='add'>+        """</div><div class='add'>+        Initialize startup variables and parse all files</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not verbose:</div><div class='add'>+            verbose = bool(os.environ.get("KBUILD_VERBOSE", 0))</div><div class='add'>+</div><div class='add'>+        if out_style is None:</div><div class='add'>+            out_style = OutputFormat()</div><div class='add'>+</div><div class='add'>+        if not werror:</div><div class='add'>+            kcflags = os.environ.get("KCFLAGS", None)</div><div class='add'>+            if kcflags:</div><div class='add'>+                match = re.search(r"(\s|^)-Werror(\s|$)/", kcflags)</div><div class='add'>+                if match:</div><div class='add'>+                    werror = True</div><div class='add'>+</div><div class='add'>+            # reading this variable is for backwards compat just in case</div><div class='add'>+            # someone was calling it with the variable from outside the</div><div class='add'>+            # kernel's build system</div><div class='add'>+            kdoc_werror = os.environ.get("KDOC_WERROR", None)</div><div class='add'>+            if kdoc_werror:</div><div class='add'>+                werror = kdoc_werror</div><div class='add'>+</div><div class='add'>+        # Some variables are global to the parser logic as a whole as they are</div><div class='add'>+        # used to send control configuration to KernelDoc class. As such,</div><div class='add'>+        # those variables are read-only inside the KernelDoc.</div><div class='add'>+        self.config = argparse.Namespace</div><div class='add'>+</div><div class='add'>+        self.config.verbose = verbose</div><div class='add'>+        self.config.werror = werror</div><div class='add'>+        self.config.wreturn = wreturn</div><div class='add'>+        self.config.wshort_desc = wshort_desc</div><div class='add'>+        self.config.wcontents_before_sections = wcontents_before_sections</div><div class='add'>+</div><div class='add'>+        if not logger:</div><div class='add'>+            self.config.log = logging.getLogger("kernel-doc")</div><div class='add'>+        else:</div><div class='add'>+            self.config.log = logger</div><div class='add'>+</div><div class='add'>+        self.config.warning = self.warning</div><div class='add'>+</div><div class='add'>+        self.config.src_tree = os.environ.get("SRCTREE", None)</div><div class='add'>+</div><div class='add'>+        # Initialize variables that are internal to KernelFiles</div><div class='add'>+</div><div class='add'>+        self.out_style = out_style</div><div class='add'>+</div><div class='add'>+        self.errors = 0</div><div class='add'>+        self.results = {}</div><div class='add'>+</div><div class='add'>+        self.files = set()</div><div class='add'>+        self.export_files = set()</div><div class='add'>+        self.export_table = {}</div><div class='add'>+</div><div class='add'>+    def parse(self, file_list, export_file=None):</div><div class='add'>+        """</div><div class='add'>+        Parse all files</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        glob = GlobSourceFiles(srctree=self.config.src_tree)</div><div class='add'>+</div><div class='add'>+        for fname in glob.parse_files(file_list, self.file_not_found_cb):</div><div class='add'>+            self.parse_file(fname)</div><div class='add'>+</div><div class='add'>+        for fname in glob.parse_files(export_file, self.file_not_found_cb):</div><div class='add'>+            self.process_export_file(fname)</div><div class='add'>+</div><div class='add'>+    def out_msg(self, fname, name, arg):</div><div class='add'>+        """</div><div class='add'>+        Return output messages from a file name using the output style</div><div class='add'>+        filtering.</div><div class='add'>+</div><div class='add'>+        If output type was not handled by the styler, return None.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # NOTE: we can add rules here to filter out unwanted parts,</div><div class='add'>+        # although OutputFormat.msg already does that.</div><div class='add'>+</div><div class='add'>+        return self.out_style.msg(fname, name, arg)</div><div class='add'>+</div><div class='add'>+    def msg(self, enable_lineno=False, export=False, internal=False,</div><div class='add'>+            symbol=None, nosymbol=None, no_doc_sections=False,</div><div class='add'>+            filenames=None, export_file=None):</div><div class='add'>+        """</div><div class='add'>+        Interacts over the kernel-doc results and output messages,</div><div class='add'>+        returning kernel-doc markups on each interaction</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.out_style.set_config(self.config)</div><div class='add'>+</div><div class='add'>+        if not filenames:</div><div class='add'>+            filenames = sorted(self.results.keys())</div><div class='add'>+</div><div class='add'>+        glob = GlobSourceFiles(srctree=self.config.src_tree)</div><div class='add'>+</div><div class='add'>+        for fname in filenames:</div><div class='add'>+            function_table = set()</div><div class='add'>+</div><div class='add'>+            if internal or export:</div><div class='add'>+                if not export_file:</div><div class='add'>+                    export_file = [fname]</div><div class='add'>+</div><div class='add'>+                for f in glob.parse_files(export_file, self.file_not_found_cb):</div><div class='add'>+                    function_table |= self.export_table[f]</div><div class='add'>+</div><div class='add'>+            if symbol:</div><div class='add'>+                for s in symbol:</div><div class='add'>+                    function_table.add(s)</div><div class='add'>+</div><div class='add'>+            self.out_style.set_filter(export, internal, symbol, nosymbol,</div><div class='add'>+                                      function_table, enable_lineno,</div><div class='add'>+                                      no_doc_sections)</div><div class='add'>+</div><div class='add'>+            msg = ""</div><div class='add'>+            if fname not in self.results:</div><div class='add'>+                self.config.log.warning("No kernel-doc for file %s", fname)</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            symbols = self.results[fname]</div><div class='add'>+            self.out_style.set_symbols(symbols)</div><div class='add'>+</div><div class='add'>+            for arg in symbols:</div><div class='add'>+                m = self.out_msg(fname, arg.name, arg)</div><div class='add'>+</div><div class='add'>+                if m is None:</div><div class='add'>+                    ln = arg.get("ln", 0)</div><div class='add'>+                    dtype = arg.get('type', "")</div><div class='add'>+</div><div class='add'>+                    self.config.log.warning("%s:%d Can't handle %s",</div><div class='add'>+                                            fname, ln, dtype)</div><div class='add'>+                else:</div><div class='add'>+                    msg += m</div><div class='add'>+</div><div class='add'>+            if msg:</div><div class='add'>+                yield fname, msg</div><div class='head'>diff --git a/tools/lib/python/kdoc/kdoc_item.py b/tools/lib/python/kdoc/kdoc_item.py<br/>new file mode 100644<br/>index 000000000000..19805301cb2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/kdoc_item.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/kdoc_item.py</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# A class that will, eventually, encapsulate all of the parsed data that we</div><div class='add'>+# then pass into the output modules.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+class KdocItem:</div><div class='add'>+    def __init__(self, name, fname, type, start_line, **other_stuff):</div><div class='add'>+        self.name = name</div><div class='add'>+        self.fname = fname</div><div class='add'>+        self.type = type</div><div class='add'>+        self.declaration_start_line = start_line</div><div class='add'>+        self.sections = {}</div><div class='add'>+        self.sections_start_lines = {}</div><div class='add'>+        self.parameterlist = []</div><div class='add'>+        self.parameterdesc_start_lines = []</div><div class='add'>+        self.parameterdescs = {}</div><div class='add'>+        self.parametertypes = {}</div><div class='add'>+        #</div><div class='add'>+        # Just save everything else into our own dict so that the output</div><div class='add'>+        # side can grab it directly as before.  As we move things into more</div><div class='add'>+        # structured data, this will, hopefully, fade away.</div><div class='add'>+        #</div><div class='add'>+        self.other_stuff = other_stuff</div><div class='add'>+</div><div class='add'>+    def get(self, key, default = None):</div><div class='add'>+        return self.other_stuff.get(key, default)</div><div class='add'>+</div><div class='add'>+    def __getitem__(self, key):</div><div class='add'>+        return self.get(key)</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Tracking of section and parameter information.</div><div class='add'>+    #</div><div class='add'>+    def set_sections(self, sections, start_lines):</div><div class='add'>+        self.sections = sections</div><div class='add'>+        self.section_start_lines = start_lines</div><div class='add'>+</div><div class='add'>+    def set_params(self, names, descs, types, starts):</div><div class='add'>+        self.parameterlist = names</div><div class='add'>+        self.parameterdescs = descs</div><div class='add'>+        self.parametertypes = types</div><div class='add'>+        self.parameterdesc_start_lines = starts</div><div class='head'>diff --git a/tools/lib/python/kdoc/kdoc_output.py b/tools/lib/python/kdoc/kdoc_output.py<br/>new file mode 100644<br/>index 000000000000..b1aaa7fc3604<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/kdoc_output.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/kdoc_output.py</a></div><div class='hunk'>@@ -0,0 +1,824 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+#</div><div class='add'>+# pylint: disable=C0301,R0902,R0911,R0912,R0913,R0914,R0915,R0917</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Implement output filters to print kernel-doc documentation.</div><div class='add'>+</div><div class='add'>+The implementation uses a virtual base class (OutputFormat) which</div><div class='add'>+contains dispatches to virtual methods, and some code to filter</div><div class='add'>+out output messages.</div><div class='add'>+</div><div class='add'>+The actual implementation is done on one separate class per each type</div><div class='add'>+of output. Currently, there are output classes for ReST and man/troff.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+from datetime import datetime</div><div class='add'>+</div><div class='add'>+from kdoc.kdoc_parser import KernelDoc, type_param</div><div class='add'>+from kdoc.kdoc_re import KernRe</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+function_pointer = KernRe(r"([^\(]*\(\*)\s*\)\s*\(([^\)]*)\)", cache=False)</div><div class='add'>+</div><div class='add'>+# match expressions used to find embedded type information</div><div class='add'>+type_constant = KernRe(r"\b``([^\`]+)``\b", cache=False)</div><div class='add'>+type_constant2 = KernRe(r"\%([-_*\w]+)", cache=False)</div><div class='add'>+type_func = KernRe(r"(\w+)\(\)", cache=False)</div><div class='add'>+type_param_ref = KernRe(r"([\!~\*]?)\@(\w*((\.\w+)|(-&gt;\w+))*(\.\.\.)?)", cache=False)</div><div class='add'>+</div><div class='add'>+# Special RST handling for func ptr params</div><div class='add'>+type_fp_param = KernRe(r"\@(\w+)\(\)", cache=False)</div><div class='add'>+</div><div class='add'>+# Special RST handling for structs with func ptr params</div><div class='add'>+type_fp_param2 = KernRe(r"\@(\w+-&gt;\S+)\(\)", cache=False)</div><div class='add'>+</div><div class='add'>+type_env = KernRe(r"(\$\w+)", cache=False)</div><div class='add'>+type_enum = KernRe(r"\&amp;(enum\s*([_\w]+))", cache=False)</div><div class='add'>+type_struct = KernRe(r"\&amp;(struct\s*([_\w]+))", cache=False)</div><div class='add'>+type_typedef = KernRe(r"\&amp;(typedef\s*([_\w]+))", cache=False)</div><div class='add'>+type_union = KernRe(r"\&amp;(union\s*([_\w]+))", cache=False)</div><div class='add'>+type_member = KernRe(r"\&amp;([_\w]+)(\.|-&gt;)([_\w]+)", cache=False)</div><div class='add'>+type_fallback = KernRe(r"\&amp;([_\w]+)", cache=False)</div><div class='add'>+type_member_func = type_member + KernRe(r"\(\)", cache=False)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class OutputFormat:</div><div class='add'>+    """</div><div class='add'>+    Base class for OutputFormat. If used as-is, it means that only</div><div class='add'>+    warnings will be displayed.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # output mode.</div><div class='add'>+    OUTPUT_ALL          = 0 # output all symbols and doc sections</div><div class='add'>+    OUTPUT_INCLUDE      = 1 # output only specified symbols</div><div class='add'>+    OUTPUT_EXPORTED     = 2 # output exported symbols</div><div class='add'>+    OUTPUT_INTERNAL     = 3 # output non-exported symbols</div><div class='add'>+</div><div class='add'>+    # Virtual member to be overridden at the inherited classes</div><div class='add'>+    highlights = []</div><div class='add'>+</div><div class='add'>+    def __init__(self):</div><div class='add'>+        """Declare internal vars and set mode to OUTPUT_ALL"""</div><div class='add'>+</div><div class='add'>+        self.out_mode = self.OUTPUT_ALL</div><div class='add'>+        self.enable_lineno = None</div><div class='add'>+        self.nosymbol = {}</div><div class='add'>+        self.symbol = None</div><div class='add'>+        self.function_table = None</div><div class='add'>+        self.config = None</div><div class='add'>+        self.no_doc_sections = False</div><div class='add'>+</div><div class='add'>+        self.data = ""</div><div class='add'>+</div><div class='add'>+    def set_config(self, config):</div><div class='add'>+        """</div><div class='add'>+        Setup global config variables used by both parser and output.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.config = config</div><div class='add'>+</div><div class='add'>+    def set_filter(self, export, internal, symbol, nosymbol, function_table,</div><div class='add'>+                   enable_lineno, no_doc_sections):</div><div class='add'>+        """</div><div class='add'>+        Initialize filter variables according to the requested mode.</div><div class='add'>+</div><div class='add'>+        Only one choice is valid between export, internal and symbol.</div><div class='add'>+</div><div class='add'>+        The nosymbol filter can be used on all modes.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.enable_lineno = enable_lineno</div><div class='add'>+        self.no_doc_sections = no_doc_sections</div><div class='add'>+        self.function_table = function_table</div><div class='add'>+</div><div class='add'>+        if symbol:</div><div class='add'>+            self.out_mode = self.OUTPUT_INCLUDE</div><div class='add'>+        elif export:</div><div class='add'>+            self.out_mode = self.OUTPUT_EXPORTED</div><div class='add'>+        elif internal:</div><div class='add'>+            self.out_mode = self.OUTPUT_INTERNAL</div><div class='add'>+        else:</div><div class='add'>+            self.out_mode = self.OUTPUT_ALL</div><div class='add'>+</div><div class='add'>+        if nosymbol:</div><div class='add'>+            self.nosymbol = set(nosymbol)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def highlight_block(self, block):</div><div class='add'>+        """</div><div class='add'>+        Apply the RST highlights to a sub-block of text.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        for r, sub in self.highlights:</div><div class='add'>+            block = r.sub(sub, block)</div><div class='add'>+</div><div class='add'>+        return block</div><div class='add'>+</div><div class='add'>+    def out_warnings(self, args):</div><div class='add'>+        """</div><div class='add'>+        Output warnings for identifiers that will be displayed.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        for log_msg in args.warnings:</div><div class='add'>+            self.config.warning(log_msg)</div><div class='add'>+</div><div class='add'>+    def check_doc(self, name, args):</div><div class='add'>+        """Check if DOC should be output"""</div><div class='add'>+</div><div class='add'>+        if self.no_doc_sections:</div><div class='add'>+            return False</div><div class='add'>+</div><div class='add'>+        if name in self.nosymbol:</div><div class='add'>+            return False</div><div class='add'>+</div><div class='add'>+        if self.out_mode == self.OUTPUT_ALL:</div><div class='add'>+            self.out_warnings(args)</div><div class='add'>+            return True</div><div class='add'>+</div><div class='add'>+        if self.out_mode == self.OUTPUT_INCLUDE:</div><div class='add'>+            if name in self.function_table:</div><div class='add'>+                self.out_warnings(args)</div><div class='add'>+                return True</div><div class='add'>+</div><div class='add'>+        return False</div><div class='add'>+</div><div class='add'>+    def check_declaration(self, dtype, name, args):</div><div class='add'>+        """</div><div class='add'>+        Checks if a declaration should be output or not based on the</div><div class='add'>+        filtering criteria.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if name in self.nosymbol:</div><div class='add'>+            return False</div><div class='add'>+</div><div class='add'>+        if self.out_mode == self.OUTPUT_ALL:</div><div class='add'>+            self.out_warnings(args)</div><div class='add'>+            return True</div><div class='add'>+</div><div class='add'>+        if self.out_mode in [self.OUTPUT_INCLUDE, self.OUTPUT_EXPORTED]:</div><div class='add'>+            if name in self.function_table:</div><div class='add'>+                return True</div><div class='add'>+</div><div class='add'>+        if self.out_mode == self.OUTPUT_INTERNAL:</div><div class='add'>+            if dtype != "function":</div><div class='add'>+                self.out_warnings(args)</div><div class='add'>+                return True</div><div class='add'>+</div><div class='add'>+            if name not in self.function_table:</div><div class='add'>+                self.out_warnings(args)</div><div class='add'>+                return True</div><div class='add'>+</div><div class='add'>+        return False</div><div class='add'>+</div><div class='add'>+    def msg(self, fname, name, args):</div><div class='add'>+        """</div><div class='add'>+        Handles a single entry from kernel-doc parser</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.data = ""</div><div class='add'>+</div><div class='add'>+        dtype = args.type</div><div class='add'>+</div><div class='add'>+        if dtype == "doc":</div><div class='add'>+            self.out_doc(fname, name, args)</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        if not self.check_declaration(dtype, name, args):</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        if dtype == "function":</div><div class='add'>+            self.out_function(fname, name, args)</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        if dtype == "enum":</div><div class='add'>+            self.out_enum(fname, name, args)</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        if dtype == "typedef":</div><div class='add'>+            self.out_typedef(fname, name, args)</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        if dtype in ["struct", "union"]:</div><div class='add'>+            self.out_struct(fname, name, args)</div><div class='add'>+            return self.data</div><div class='add'>+</div><div class='add'>+        # Warn if some type requires an output logic</div><div class='add'>+        self.config.log.warning("doesn't know how to output '%s' block",</div><div class='add'>+                                dtype)</div><div class='add'>+</div><div class='add'>+        return None</div><div class='add'>+</div><div class='add'>+    # Virtual methods to be overridden by inherited classes</div><div class='add'>+    # At the base class, those do nothing.</div><div class='add'>+    def set_symbols(self, symbols):</div><div class='add'>+        """Get a list of all symbols from kernel_doc"""</div><div class='add'>+</div><div class='add'>+    def out_doc(self, fname, name, args):</div><div class='add'>+        """Outputs a DOC block"""</div><div class='add'>+</div><div class='add'>+    def out_function(self, fname, name, args):</div><div class='add'>+        """Outputs a function"""</div><div class='add'>+</div><div class='add'>+    def out_enum(self, fname, name, args):</div><div class='add'>+        """Outputs an enum"""</div><div class='add'>+</div><div class='add'>+    def out_typedef(self, fname, name, args):</div><div class='add'>+        """Outputs a typedef"""</div><div class='add'>+</div><div class='add'>+    def out_struct(self, fname, name, args):</div><div class='add'>+        """Outputs a struct"""</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class RestFormat(OutputFormat):</div><div class='add'>+    """Consts and functions used by ReST output"""</div><div class='add'>+</div><div class='add'>+    highlights = [</div><div class='add'>+        (type_constant, r"``\1``"),</div><div class='add'>+        (type_constant2, r"``\1``"),</div><div class='add'>+</div><div class='add'>+        # Note: need to escape () to avoid func matching later</div><div class='add'>+        (type_member_func, r":c:type:`\1\2\3\\(\\) &lt;\1&gt;`"),</div><div class='add'>+        (type_member, r":c:type:`\1\2\3 &lt;\1&gt;`"),</div><div class='add'>+        (type_fp_param, r"**\1\\(\\)**"),</div><div class='add'>+        (type_fp_param2, r"**\1\\(\\)**"),</div><div class='add'>+        (type_func, r"\1()"),</div><div class='add'>+        (type_enum, r":c:type:`\1 &lt;\2&gt;`"),</div><div class='add'>+        (type_struct, r":c:type:`\1 &lt;\2&gt;`"),</div><div class='add'>+        (type_typedef, r":c:type:`\1 &lt;\2&gt;`"),</div><div class='add'>+        (type_union, r":c:type:`\1 &lt;\2&gt;`"),</div><div class='add'>+</div><div class='add'>+        # in rst this can refer to any type</div><div class='add'>+        (type_fallback, r":c:type:`\1`"),</div><div class='add'>+        (type_param_ref, r"**\1\2**")</div><div class='add'>+    ]</div><div class='add'>+    blankline = "\n"</div><div class='add'>+</div><div class='add'>+    sphinx_literal = KernRe(r'^[^.].*::$', cache=False)</div><div class='add'>+    sphinx_cblock = KernRe(r'^\.\.\ +code-block::', cache=False)</div><div class='add'>+</div><div class='add'>+    def __init__(self):</div><div class='add'>+        """</div><div class='add'>+        Creates class variables.</div><div class='add'>+</div><div class='add'>+        Not really mandatory, but it is a good coding style and makes</div><div class='add'>+        pylint happy.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        super().__init__()</div><div class='add'>+        self.lineprefix = ""</div><div class='add'>+</div><div class='add'>+    def print_lineno(self, ln):</div><div class='add'>+        """Outputs a line number"""</div><div class='add'>+</div><div class='add'>+        if self.enable_lineno and ln is not None:</div><div class='add'>+            ln += 1</div><div class='add'>+            self.data += f".. LINENO {ln}\n"</div><div class='add'>+</div><div class='add'>+    def output_highlight(self, args):</div><div class='add'>+        """</div><div class='add'>+        Outputs a C symbol that may require being converted to ReST using</div><div class='add'>+        the self.highlights variable</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        input_text = args</div><div class='add'>+        output = ""</div><div class='add'>+        in_literal = False</div><div class='add'>+        litprefix = ""</div><div class='add'>+        block = ""</div><div class='add'>+</div><div class='add'>+        for line in input_text.strip("\n").split("\n"):</div><div class='add'>+</div><div class='add'>+            # If we're in a literal block, see if we should drop out of it.</div><div class='add'>+            # Otherwise, pass the line straight through unmunged.</div><div class='add'>+            if in_literal:</div><div class='add'>+                if line.strip():  # If the line is not blank</div><div class='add'>+                    # If this is the first non-blank line in a literal block,</div><div class='add'>+                    # figure out the proper indent.</div><div class='add'>+                    if not litprefix:</div><div class='add'>+                        r = KernRe(r'^(\s*)')</div><div class='add'>+                        if r.match(line):</div><div class='add'>+                            litprefix = '^' + r.group(1)</div><div class='add'>+                        else:</div><div class='add'>+                            litprefix = ""</div><div class='add'>+</div><div class='add'>+                        output += line + "\n"</div><div class='add'>+                    elif not KernRe(litprefix).match(line):</div><div class='add'>+                        in_literal = False</div><div class='add'>+                    else:</div><div class='add'>+                        output += line + "\n"</div><div class='add'>+                else:</div><div class='add'>+                    output += line + "\n"</div><div class='add'>+</div><div class='add'>+            # Not in a literal block (or just dropped out)</div><div class='add'>+            if not in_literal:</div><div class='add'>+                block += line + "\n"</div><div class='add'>+                if self.sphinx_literal.match(line) or self.sphinx_cblock.match(line):</div><div class='add'>+                    in_literal = True</div><div class='add'>+                    litprefix = ""</div><div class='add'>+                    output += self.highlight_block(block)</div><div class='add'>+                    block = ""</div><div class='add'>+</div><div class='add'>+        # Handle any remaining block</div><div class='add'>+        if block:</div><div class='add'>+            output += self.highlight_block(block)</div><div class='add'>+</div><div class='add'>+        # Print the output with the line prefix</div><div class='add'>+        for line in output.strip("\n").split("\n"):</div><div class='add'>+            self.data += self.lineprefix + line + "\n"</div><div class='add'>+</div><div class='add'>+    def out_section(self, args, out_docblock=False):</div><div class='add'>+        """</div><div class='add'>+        Outputs a block section.</div><div class='add'>+</div><div class='add'>+        This could use some work; it's used to output the DOC: sections, and</div><div class='add'>+        starts by putting out the name of the doc section itself, but that</div><div class='add'>+        tends to duplicate a header already in the template file.</div><div class='add'>+        """</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            # Skip sections that are in the nosymbol_table</div><div class='add'>+            if section in self.nosymbol:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if out_docblock:</div><div class='add'>+                if not self.out_mode == self.OUTPUT_INCLUDE:</div><div class='add'>+                    self.data += f".. _{section}:\n\n"</div><div class='add'>+                    self.data += f'{self.lineprefix}**{section}**\n\n'</div><div class='add'>+            else:</div><div class='add'>+                self.data += f'{self.lineprefix}**{section}**\n\n'</div><div class='add'>+</div><div class='add'>+            self.print_lineno(args.section_start_lines.get(section, 0))</div><div class='add'>+            self.output_highlight(text)</div><div class='add'>+            self.data += "\n"</div><div class='add'>+        self.data += "\n"</div><div class='add'>+</div><div class='add'>+    def out_doc(self, fname, name, args):</div><div class='add'>+        if not self.check_doc(name, args):</div><div class='add'>+            return</div><div class='add'>+        self.out_section(args, out_docblock=True)</div><div class='add'>+</div><div class='add'>+    def out_function(self, fname, name, args):</div><div class='add'>+</div><div class='add'>+        oldprefix = self.lineprefix</div><div class='add'>+        signature = ""</div><div class='add'>+</div><div class='add'>+        func_macro = args.get('func_macro', False)</div><div class='add'>+        if func_macro:</div><div class='add'>+            signature = name</div><div class='add'>+        else:</div><div class='add'>+            if args.get('functiontype'):</div><div class='add'>+                signature = args['functiontype'] + " "</div><div class='add'>+            signature += name + " ("</div><div class='add'>+</div><div class='add'>+        ln = args.declaration_start_line</div><div class='add'>+        count = 0</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            if count != 0:</div><div class='add'>+                signature += ", "</div><div class='add'>+            count += 1</div><div class='add'>+            dtype = args.parametertypes.get(parameter, "")</div><div class='add'>+</div><div class='add'>+            if function_pointer.search(dtype):</div><div class='add'>+                signature += function_pointer.group(1) + parameter + function_pointer.group(3)</div><div class='add'>+            else:</div><div class='add'>+                signature += dtype</div><div class='add'>+</div><div class='add'>+        if not func_macro:</div><div class='add'>+            signature += ")"</div><div class='add'>+</div><div class='add'>+        self.print_lineno(ln)</div><div class='add'>+        if args.get('typedef') or not args.get('functiontype'):</div><div class='add'>+            self.data += f".. c:macro:: {name}\n\n"</div><div class='add'>+</div><div class='add'>+            if args.get('typedef'):</div><div class='add'>+                self.data += "   **Typedef**: "</div><div class='add'>+                self.lineprefix = ""</div><div class='add'>+                self.output_highlight(args.get('purpose', ""))</div><div class='add'>+                self.data += "\n\n**Syntax**\n\n"</div><div class='add'>+                self.data += f"  ``{signature}``\n\n"</div><div class='add'>+            else:</div><div class='add'>+                self.data += f"``{signature}``\n\n"</div><div class='add'>+        else:</div><div class='add'>+            self.data += f".. c:function:: {signature}\n\n"</div><div class='add'>+</div><div class='add'>+        if not args.get('typedef'):</div><div class='add'>+            self.print_lineno(ln)</div><div class='add'>+            self.lineprefix = "   "</div><div class='add'>+            self.output_highlight(args.get('purpose', ""))</div><div class='add'>+            self.data += "\n"</div><div class='add'>+</div><div class='add'>+        # Put descriptive text into a container (HTML &lt;div&gt;) to help set</div><div class='add'>+        # function prototypes apart</div><div class='add'>+        self.lineprefix = "  "</div><div class='add'>+</div><div class='add'>+        if args.parameterlist:</div><div class='add'>+            self.data += ".. container:: kernelindent\n\n"</div><div class='add'>+            self.data += f"{self.lineprefix}**Parameters**\n\n"</div><div class='add'>+</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            parameter_name = KernRe(r'\[.*').sub('', parameter)</div><div class='add'>+            dtype = args.parametertypes.get(parameter, "")</div><div class='add'>+</div><div class='add'>+            if dtype:</div><div class='add'>+                self.data += f"{self.lineprefix}``{dtype}``\n"</div><div class='add'>+            else:</div><div class='add'>+                self.data += f"{self.lineprefix}``{parameter}``\n"</div><div class='add'>+</div><div class='add'>+            self.print_lineno(args.parameterdesc_start_lines.get(parameter_name, 0))</div><div class='add'>+</div><div class='add'>+            self.lineprefix = "    "</div><div class='add'>+            if parameter_name in args.parameterdescs and \</div><div class='add'>+               args.parameterdescs[parameter_name] != KernelDoc.undescribed:</div><div class='add'>+</div><div class='add'>+                self.output_highlight(args.parameterdescs[parameter_name])</div><div class='add'>+                self.data += "\n"</div><div class='add'>+            else:</div><div class='add'>+                self.data += f"{self.lineprefix}*undescribed*\n\n"</div><div class='add'>+            self.lineprefix = "  "</div><div class='add'>+</div><div class='add'>+        self.out_section(args)</div><div class='add'>+        self.lineprefix = oldprefix</div><div class='add'>+</div><div class='add'>+    def out_enum(self, fname, name, args):</div><div class='add'>+</div><div class='add'>+        oldprefix = self.lineprefix</div><div class='add'>+        ln = args.declaration_start_line</div><div class='add'>+</div><div class='add'>+        self.data += f"\n\n.. c:enum:: {name}\n\n"</div><div class='add'>+</div><div class='add'>+        self.print_lineno(ln)</div><div class='add'>+        self.lineprefix = "  "</div><div class='add'>+        self.output_highlight(args.get('purpose', ''))</div><div class='add'>+        self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".. container:: kernelindent\n\n"</div><div class='add'>+        outer = self.lineprefix + "  "</div><div class='add'>+        self.lineprefix = outer + "  "</div><div class='add'>+        self.data += f"{outer}**Constants**\n\n"</div><div class='add'>+</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            self.data += f"{outer}``{parameter}``\n"</div><div class='add'>+</div><div class='add'>+            if args.parameterdescs.get(parameter, '') != KernelDoc.undescribed:</div><div class='add'>+                self.output_highlight(args.parameterdescs[parameter])</div><div class='add'>+            else:</div><div class='add'>+                self.data += f"{self.lineprefix}*undescribed*\n\n"</div><div class='add'>+            self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.lineprefix = oldprefix</div><div class='add'>+        self.out_section(args)</div><div class='add'>+</div><div class='add'>+    def out_typedef(self, fname, name, args):</div><div class='add'>+</div><div class='add'>+        oldprefix = self.lineprefix</div><div class='add'>+        ln = args.declaration_start_line</div><div class='add'>+</div><div class='add'>+        self.data += f"\n\n.. c:type:: {name}\n\n"</div><div class='add'>+</div><div class='add'>+        self.print_lineno(ln)</div><div class='add'>+        self.lineprefix = "   "</div><div class='add'>+</div><div class='add'>+        self.output_highlight(args.get('purpose', ''))</div><div class='add'>+</div><div class='add'>+        self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.lineprefix = oldprefix</div><div class='add'>+        self.out_section(args)</div><div class='add'>+</div><div class='add'>+    def out_struct(self, fname, name, args):</div><div class='add'>+</div><div class='add'>+        purpose = args.get('purpose', "")</div><div class='add'>+        declaration = args.get('definition', "")</div><div class='add'>+        dtype = args.type</div><div class='add'>+        ln = args.declaration_start_line</div><div class='add'>+</div><div class='add'>+        self.data += f"\n\n.. c:{dtype}:: {name}\n\n"</div><div class='add'>+</div><div class='add'>+        self.print_lineno(ln)</div><div class='add'>+</div><div class='add'>+        oldprefix = self.lineprefix</div><div class='add'>+        self.lineprefix += "  "</div><div class='add'>+</div><div class='add'>+        self.output_highlight(purpose)</div><div class='add'>+        self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".. container:: kernelindent\n\n"</div><div class='add'>+        self.data += f"{self.lineprefix}**Definition**::\n\n"</div><div class='add'>+</div><div class='add'>+        self.lineprefix = self.lineprefix + "  "</div><div class='add'>+</div><div class='add'>+        declaration = declaration.replace("\t", self.lineprefix)</div><div class='add'>+</div><div class='add'>+        self.data += f"{self.lineprefix}{dtype} {name}" + ' {' + "\n"</div><div class='add'>+        self.data += f"{declaration}{self.lineprefix}" + "};\n\n"</div><div class='add'>+</div><div class='add'>+        self.lineprefix = "  "</div><div class='add'>+        self.data += f"{self.lineprefix}**Members**\n\n"</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            if not parameter or parameter.startswith("#"):</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            parameter_name = parameter.split("[", maxsplit=1)[0]</div><div class='add'>+</div><div class='add'>+            if args.parameterdescs.get(parameter_name) == KernelDoc.undescribed:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            self.print_lineno(args.parameterdesc_start_lines.get(parameter_name, 0))</div><div class='add'>+</div><div class='add'>+            self.data += f"{self.lineprefix}``{parameter}``\n"</div><div class='add'>+</div><div class='add'>+            self.lineprefix = "    "</div><div class='add'>+            self.output_highlight(args.parameterdescs[parameter_name])</div><div class='add'>+            self.lineprefix = "  "</div><div class='add'>+</div><div class='add'>+            self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.data += "\n"</div><div class='add'>+</div><div class='add'>+        self.lineprefix = oldprefix</div><div class='add'>+        self.out_section(args)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class ManFormat(OutputFormat):</div><div class='add'>+    """Consts and functions used by man pages output"""</div><div class='add'>+</div><div class='add'>+    highlights = (</div><div class='add'>+        (type_constant, r"\1"),</div><div class='add'>+        (type_constant2, r"\1"),</div><div class='add'>+        (type_func, r"\\fB\1\\fP"),</div><div class='add'>+        (type_enum, r"\\fI\1\\fP"),</div><div class='add'>+        (type_struct, r"\\fI\1\\fP"),</div><div class='add'>+        (type_typedef, r"\\fI\1\\fP"),</div><div class='add'>+        (type_union, r"\\fI\1\\fP"),</div><div class='add'>+        (type_param, r"\\fI\1\\fP"),</div><div class='add'>+        (type_param_ref, r"\\fI\1\2\\fP"),</div><div class='add'>+        (type_member, r"\\fI\1\2\3\\fP"),</div><div class='add'>+        (type_fallback, r"\\fI\1\\fP")</div><div class='add'>+    )</div><div class='add'>+    blankline = ""</div><div class='add'>+</div><div class='add'>+    date_formats = [</div><div class='add'>+        "%a %b %d %H:%M:%S %Z %Y",</div><div class='add'>+        "%a %b %d %H:%M:%S %Y",</div><div class='add'>+        "%Y-%m-%d",</div><div class='add'>+        "%b %d %Y",</div><div class='add'>+        "%B %d %Y",</div><div class='add'>+        "%m %d %Y",</div><div class='add'>+    ]</div><div class='add'>+</div><div class='add'>+    def __init__(self, modulename):</div><div class='add'>+        """</div><div class='add'>+        Creates class variables.</div><div class='add'>+</div><div class='add'>+        Not really mandatory, but it is a good coding style and makes</div><div class='add'>+        pylint happy.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        super().__init__()</div><div class='add'>+        self.modulename = modulename</div><div class='add'>+        self.symbols = []</div><div class='add'>+</div><div class='add'>+        dt = None</div><div class='add'>+        tstamp = os.environ.get("KBUILD_BUILD_TIMESTAMP")</div><div class='add'>+        if tstamp:</div><div class='add'>+            for fmt in self.date_formats:</div><div class='add'>+                try:</div><div class='add'>+                    dt = datetime.strptime(tstamp, fmt)</div><div class='add'>+                    break</div><div class='add'>+                except ValueError:</div><div class='add'>+                    pass</div><div class='add'>+</div><div class='add'>+        if not dt:</div><div class='add'>+            dt = datetime.now()</div><div class='add'>+</div><div class='add'>+        self.man_date = dt.strftime("%B %Y")</div><div class='add'>+</div><div class='add'>+    def arg_name(self, args, name):</div><div class='add'>+        """</div><div class='add'>+        Return the name that will be used for the man page.</div><div class='add'>+</div><div class='add'>+        As we may have the same name on different namespaces,</div><div class='add'>+        prepend the data type for all types except functions and typedefs.</div><div class='add'>+</div><div class='add'>+        The doc section is special: it uses the modulename.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        dtype = args.type</div><div class='add'>+</div><div class='add'>+        if dtype == "doc":</div><div class='add'>+            return self.modulename</div><div class='add'>+</div><div class='add'>+        if dtype in ["function", "typedef"]:</div><div class='add'>+            return name</div><div class='add'>+</div><div class='add'>+        return f"{dtype} {name}"</div><div class='add'>+</div><div class='add'>+    def set_symbols(self, symbols):</div><div class='add'>+        """</div><div class='add'>+        Get a list of all symbols from kernel_doc.</div><div class='add'>+</div><div class='add'>+        Man pages will uses it to add a SEE ALSO section with other</div><div class='add'>+        symbols at the same file.</div><div class='add'>+        """</div><div class='add'>+        self.symbols = symbols</div><div class='add'>+</div><div class='add'>+    def out_tail(self, fname, name, args):</div><div class='add'>+        """Adds a tail for all man pages"""</div><div class='add'>+</div><div class='add'>+        # SEE ALSO section</div><div class='add'>+        self.data += f'.SH "SEE ALSO"' + "\n.PP\n"</div><div class='add'>+        self.data += (f"Kernel file \\fB{args.fname}\\fR\n")</div><div class='add'>+        if len(self.symbols) &gt;= 2:</div><div class='add'>+            cur_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+            related = []</div><div class='add'>+            for arg in self.symbols:</div><div class='add'>+                out_name = self.arg_name(arg, arg.name)</div><div class='add'>+</div><div class='add'>+                if cur_name == out_name:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                related.append(f"\\fB{out_name}\\fR(9)")</div><div class='add'>+</div><div class='add'>+            self.data += ",\n".join(related) + "\n"</div><div class='add'>+</div><div class='add'>+        # TODO: does it make sense to add other sections? Maybe</div><div class='add'>+        # REPORTING ISSUES? LICENSE?</div><div class='add'>+</div><div class='add'>+    def msg(self, fname, name, args):</div><div class='add'>+        """</div><div class='add'>+        Handles a single entry from kernel-doc parser.</div><div class='add'>+</div><div class='add'>+        Add a tail at the end of man pages output.</div><div class='add'>+        """</div><div class='add'>+        super().msg(fname, name, args)</div><div class='add'>+        self.out_tail(fname, name, args)</div><div class='add'>+</div><div class='add'>+        return self.data</div><div class='add'>+</div><div class='add'>+    def output_highlight(self, block):</div><div class='add'>+        """</div><div class='add'>+        Outputs a C symbol that may require being highlighted with</div><div class='add'>+        self.highlights variable using troff syntax</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        contents = self.highlight_block(block)</div><div class='add'>+</div><div class='add'>+        if isinstance(contents, list):</div><div class='add'>+            contents = "\n".join(contents)</div><div class='add'>+</div><div class='add'>+        for line in contents.strip("\n").split("\n"):</div><div class='add'>+            line = KernRe(r"^\s*").sub("", line)</div><div class='add'>+            if not line:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            if line[0] == ".":</div><div class='add'>+                self.data += "\\&amp;" + line + "\n"</div><div class='add'>+            else:</div><div class='add'>+                self.data += line + "\n"</div><div class='add'>+</div><div class='add'>+    def out_doc(self, fname, name, args):</div><div class='add'>+        if not self.check_doc(name, args):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        out_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+        self.data += f'.TH "{self.modulename}" 9 "{out_name}" "{self.man_date}" "API Manual" LINUX' + "\n"</div><div class='add'>+</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            self.data += f'.SH "{section}"' + "\n"</div><div class='add'>+            self.output_highlight(text)</div><div class='add'>+</div><div class='add'>+    def out_function(self, fname, name, args):</div><div class='add'>+        """output function in man"""</div><div class='add'>+</div><div class='add'>+        out_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+        self.data += f'.TH "{name}" 9 "{out_name}" "{self.man_date}" "Kernel Hacker\'s Manual" LINUX' + "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH NAME\n"</div><div class='add'>+        self.data += f"{name} \\- {args['purpose']}\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH SYNOPSIS\n"</div><div class='add'>+        if args.get('functiontype', ''):</div><div class='add'>+            self.data += f'.B "{args["functiontype"]}" {name}' + "\n"</div><div class='add'>+        else:</div><div class='add'>+            self.data += f'.B "{name}' + "\n"</div><div class='add'>+</div><div class='add'>+        count = 0</div><div class='add'>+        parenth = "("</div><div class='add'>+        post = ","</div><div class='add'>+</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            if count == len(args.parameterlist) - 1:</div><div class='add'>+                post = ");"</div><div class='add'>+</div><div class='add'>+            dtype = args.parametertypes.get(parameter, "")</div><div class='add'>+            if function_pointer.match(dtype):</div><div class='add'>+                # Pointer-to-function</div><div class='add'>+                self.data += f'".BI "{parenth}{function_pointer.group(1)}" " ") ({function_pointer.group(2)}){post}"' + "\n"</div><div class='add'>+            else:</div><div class='add'>+                dtype = KernRe(r'([^\*])$').sub(r'\1 ', dtype)</div><div class='add'>+</div><div class='add'>+                self.data += f'.BI "{parenth}{dtype}"  "{post}"' + "\n"</div><div class='add'>+            count += 1</div><div class='add'>+            parenth = ""</div><div class='add'>+</div><div class='add'>+        if args.parameterlist:</div><div class='add'>+            self.data += ".SH ARGUMENTS\n"</div><div class='add'>+</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            parameter_name = re.sub(r'\[.*', '', parameter)</div><div class='add'>+</div><div class='add'>+            self.data += f'.IP "{parameter}" 12' + "\n"</div><div class='add'>+            self.output_highlight(args.parameterdescs.get(parameter_name, ""))</div><div class='add'>+</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            self.data += f'.SH "{section.upper()}"' + "\n"</div><div class='add'>+            self.output_highlight(text)</div><div class='add'>+</div><div class='add'>+    def out_enum(self, fname, name, args):</div><div class='add'>+        out_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+        self.data += f'.TH "{self.modulename}" 9 "{out_name}" "{self.man_date}" "API Manual" LINUX' + "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH NAME\n"</div><div class='add'>+        self.data += f"enum {name} \\- {args['purpose']}\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH SYNOPSIS\n"</div><div class='add'>+        self.data += f"enum {name}" + " {\n"</div><div class='add'>+</div><div class='add'>+        count = 0</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            self.data += f'.br\n.BI "    {parameter}"' + "\n"</div><div class='add'>+            if count == len(args.parameterlist) - 1:</div><div class='add'>+                self.data += "\n};\n"</div><div class='add'>+            else:</div><div class='add'>+                self.data += ", \n.br\n"</div><div class='add'>+</div><div class='add'>+            count += 1</div><div class='add'>+</div><div class='add'>+        self.data += ".SH Constants\n"</div><div class='add'>+</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            parameter_name = KernRe(r'\[.*').sub('', parameter)</div><div class='add'>+            self.data += f'.IP "{parameter}" 12' + "\n"</div><div class='add'>+            self.output_highlight(args.parameterdescs.get(parameter_name, ""))</div><div class='add'>+</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            self.data += f'.SH "{section}"' + "\n"</div><div class='add'>+            self.output_highlight(text)</div><div class='add'>+</div><div class='add'>+    def out_typedef(self, fname, name, args):</div><div class='add'>+        module = self.modulename</div><div class='add'>+        purpose = args.get('purpose')</div><div class='add'>+        out_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+        self.data += f'.TH "{module}" 9 "{out_name}" "{self.man_date}" "API Manual" LINUX' + "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH NAME\n"</div><div class='add'>+        self.data += f"typedef {name} \\- {purpose}\n"</div><div class='add'>+</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            self.data += f'.SH "{section}"' + "\n"</div><div class='add'>+            self.output_highlight(text)</div><div class='add'>+</div><div class='add'>+    def out_struct(self, fname, name, args):</div><div class='add'>+        module = self.modulename</div><div class='add'>+        purpose = args.get('purpose')</div><div class='add'>+        definition = args.get('definition')</div><div class='add'>+        out_name = self.arg_name(args, name)</div><div class='add'>+</div><div class='add'>+        self.data += f'.TH "{module}" 9 "{out_name}" "{self.man_date}" "API Manual" LINUX' + "\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH NAME\n"</div><div class='add'>+        self.data += f"{args.type} {name} \\- {purpose}\n"</div><div class='add'>+</div><div class='add'>+        # Replace tabs with two spaces and handle newlines</div><div class='add'>+        declaration = definition.replace("\t", "  ")</div><div class='add'>+        declaration = KernRe(r"\n").sub('"\n.br\n.BI "', declaration)</div><div class='add'>+</div><div class='add'>+        self.data += ".SH SYNOPSIS\n"</div><div class='add'>+        self.data += f"{args.type} {name} " + "{" + "\n.br\n"</div><div class='add'>+        self.data += f'.BI "{declaration}\n' + "};\n.br\n\n"</div><div class='add'>+</div><div class='add'>+        self.data += ".SH Members\n"</div><div class='add'>+        for parameter in args.parameterlist:</div><div class='add'>+            if parameter.startswith("#"):</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            parameter_name = re.sub(r"\[.*", "", parameter)</div><div class='add'>+</div><div class='add'>+            if args.parameterdescs.get(parameter_name) == KernelDoc.undescribed:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            self.data += f'.IP "{parameter}" 12' + "\n"</div><div class='add'>+            self.output_highlight(args.parameterdescs.get(parameter_name))</div><div class='add'>+</div><div class='add'>+        for section, text in args.sections.items():</div><div class='add'>+            self.data += f'.SH "{section}"' + "\n"</div><div class='add'>+            self.output_highlight(text)</div><div class='head'>diff --git a/tools/lib/python/kdoc/kdoc_parser.py b/tools/lib/python/kdoc/kdoc_parser.py<br/>new file mode 100644<br/>index 000000000000..500aafc50032<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/kdoc_parser.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/kdoc_parser.py</a></div><div class='hunk'>@@ -0,0 +1,1670 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+#</div><div class='add'>+# pylint: disable=C0301,C0302,R0904,R0912,R0913,R0914,R0915,R0917,R1702</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+kdoc_parser</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+Read a C language source or header FILE and extract embedded</div><div class='add'>+documentation comments</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import sys</div><div class='add'>+import re</div><div class='add'>+from pprint import pformat</div><div class='add'>+</div><div class='add'>+from kdoc.kdoc_re import NestedMatch, KernRe</div><div class='add'>+from kdoc.kdoc_item import KdocItem</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Regular expressions used to parse kernel-doc markups at KernelDoc class.</div><div class='add'>+#</div><div class='add'>+# Let's declare them in lowercase outside any class to make it easier to</div><div class='add'>+# convert from the Perl script.</div><div class='add'>+#</div><div class='add'>+# As those are evaluated at the beginning, no need to cache them</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+# Allow whitespace at end of comment start.</div><div class='add'>+doc_start = KernRe(r'^/\*\*\s*$', cache=False)</div><div class='add'>+</div><div class='add'>+doc_end = KernRe(r'\*/', cache=False)</div><div class='add'>+doc_com = KernRe(r'\s*\*\s*', cache=False)</div><div class='add'>+doc_com_body = KernRe(r'\s*\* ?', cache=False)</div><div class='add'>+doc_decl = doc_com + KernRe(r'(\w+)', cache=False)</div><div class='add'>+</div><div class='add'>+# @params and a strictly limited set of supported section names</div><div class='add'>+# Specifically:</div><div class='add'>+#   Match @word:</div><div class='add'>+#         @...:</div><div class='add'>+#         @{section-name}:</div><div class='add'>+# while trying to not match literal block starts like "example::"</div><div class='add'>+#</div><div class='add'>+known_section_names = 'description|context|returns?|notes?|examples?'</div><div class='add'>+known_sections = KernRe(known_section_names, flags = re.I)</div><div class='add'>+doc_sect = doc_com + \</div><div class='add'>+    KernRe(r'\s*(@[.\w]+|@\.\.\.|' + known_section_names + r')\s*:([^:].*)?$',</div><div class='add'>+           flags=re.I, cache=False)</div><div class='add'>+</div><div class='add'>+doc_content = doc_com_body + KernRe(r'(.*)', cache=False)</div><div class='add'>+doc_inline_start = KernRe(r'^\s*/\*\*\s*$', cache=False)</div><div class='add'>+doc_inline_sect = KernRe(r'\s*\*\s*(@\s*[\w][\w\.]*\s*):(.*)', cache=False)</div><div class='add'>+doc_inline_end = KernRe(r'^\s*\*/\s*$', cache=False)</div><div class='add'>+doc_inline_oneline = KernRe(r'^\s*/\*\*\s*(@[\w\s]+):\s*(.*)\s*\*/\s*$', cache=False)</div><div class='add'>+</div><div class='add'>+export_symbol = KernRe(r'^\s*EXPORT_SYMBOL(_GPL)?\s*\(\s*(\w+)\s*\)\s*', cache=False)</div><div class='add'>+export_symbol_ns = KernRe(r'^\s*EXPORT_SYMBOL_NS(_GPL)?\s*\(\s*(\w+)\s*,\s*"\S+"\)\s*', cache=False)</div><div class='add'>+</div><div class='add'>+type_param = KernRe(r"@(\w*((\.\w+)|(-&gt;\w+))*(\.\.\.)?)", cache=False)</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Tests for the beginning of a kerneldoc block in its various forms.</div><div class='add'>+#</div><div class='add'>+doc_block = doc_com + KernRe(r'DOC:\s*(.*)?', cache=False)</div><div class='add'>+doc_begin_data = KernRe(r"^\s*\*?\s*(struct|union|enum|typedef)\b\s*(\w*)", cache = False)</div><div class='add'>+doc_begin_func = KernRe(str(doc_com) +			# initial " * '</div><div class='add'>+                        r"(?:\w+\s*\*\s*)?" + 		# type (not captured)</div><div class='add'>+                        r'(?:define\s+)?' + 		# possible "define" (not captured)</div><div class='add'>+                        r'(\w+)\s*(?:\(\w*\))?\s*' +	# name and optional "(...)"</div><div class='add'>+                        r'(?:[-:].*)?$',		# description (not captured)</div><div class='add'>+                        cache = False)</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Here begins a long set of transformations to turn structure member prefixes</div><div class='add'>+# and macro invocations into something we can parse and generate kdoc for.</div><div class='add'>+#</div><div class='add'>+struct_args_pattern = r'([^,)]+)'</div><div class='add'>+</div><div class='add'>+struct_xforms = [</div><div class='add'>+    # Strip attributes</div><div class='add'>+    (KernRe(r"__attribute__\s*\(\([a-z0-9,_\*\s\(\)]*\)\)", flags=re.I | re.S, cache=False), ' '),</div><div class='add'>+    (KernRe(r'\s*__aligned\s*\([^;]*\)', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__counted_by\s*\([^;]*\)', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__counted_by_(le|be)\s*\([^;]*\)', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__packed\s*', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*CRYPTO_MINALIGN_ATTR', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__private', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__rcu', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*____cacheline_aligned_in_smp', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*____cacheline_aligned', re.S), ' '),</div><div class='add'>+    (KernRe(r'\s*__cacheline_group_(begin|end)\([^\)]+\);'), ''),</div><div class='add'>+    #</div><div class='add'>+    # Unwrap struct_group macros based on this definition:</div><div class='add'>+    # __struct_group(TAG, NAME, ATTRS, MEMBERS...)</div><div class='add'>+    # which has variants like: struct_group(NAME, MEMBERS...)</div><div class='add'>+    # Only MEMBERS arguments require documentation.</div><div class='add'>+    #</div><div class='add'>+    # Parsing them happens on two steps:</div><div class='add'>+    #</div><div class='add'>+    # 1. drop struct group arguments that aren't at MEMBERS,</div><div class='add'>+    #    storing them as STRUCT_GROUP(MEMBERS)</div><div class='add'>+    #</div><div class='add'>+    # 2. remove STRUCT_GROUP() ancillary macro.</div><div class='add'>+    #</div><div class='add'>+    # The original logic used to remove STRUCT_GROUP() using an</div><div class='add'>+    # advanced regex:</div><div class='add'>+    #</div><div class='add'>+    #   \bSTRUCT_GROUP(\(((?:(?&gt;[^)(]+)|(?1))*)\))[^;]*;</div><div class='add'>+    #</div><div class='add'>+    # with two patterns that are incompatible with</div><div class='add'>+    # Python re module, as it has:</div><div class='add'>+    #</div><div class='add'>+    #   - a recursive pattern: (?1)</div><div class='add'>+    #   - an atomic grouping: (?&gt;...)</div><div class='add'>+    #</div><div class='add'>+    # I tried a simpler version: but it didn't work either:</div><div class='add'>+    #   \bSTRUCT_GROUP\(([^\)]+)\)[^;]*;</div><div class='add'>+    #</div><div class='add'>+    # As it doesn't properly match the end parenthesis on some cases.</div><div class='add'>+    #</div><div class='add'>+    # So, a better solution was crafted: there's now a NestedMatch</div><div class='add'>+    # class that ensures that delimiters after a search are properly</div><div class='add'>+    # matched. So, the implementation to drop STRUCT_GROUP() will be</div><div class='add'>+    # handled in separate.</div><div class='add'>+    #</div><div class='add'>+    (KernRe(r'\bstruct_group\s*\(([^,]*,)', re.S), r'STRUCT_GROUP('),</div><div class='add'>+    (KernRe(r'\bstruct_group_attr\s*\(([^,]*,){2}', re.S), r'STRUCT_GROUP('),</div><div class='add'>+    (KernRe(r'\bstruct_group_tagged\s*\(([^,]*),([^,]*),', re.S), r'struct \1 \2; STRUCT_GROUP('),</div><div class='add'>+    (KernRe(r'\b__struct_group\s*\(([^,]*,){3}', re.S), r'STRUCT_GROUP('),</div><div class='add'>+    #</div><div class='add'>+    # Replace macros</div><div class='add'>+    #</div><div class='add'>+    # TODO: use NestedMatch for FOO($1, $2, ...) matches</div><div class='add'>+    #</div><div class='add'>+    # it is better to also move those to the NestedMatch logic,</div><div class='add'>+    # to ensure that parentheses will be properly matched.</div><div class='add'>+    #</div><div class='add'>+    (KernRe(r'__ETHTOOL_DECLARE_LINK_MODE_MASK\s*\(([^\)]+)\)', re.S),</div><div class='add'>+     r'DECLARE_BITMAP(\1, __ETHTOOL_LINK_MODE_MASK_NBITS)'),</div><div class='add'>+    (KernRe(r'DECLARE_PHY_INTERFACE_MASK\s*\(([^\)]+)\)', re.S),</div><div class='add'>+     r'DECLARE_BITMAP(\1, PHY_INTERFACE_MODE_MAX)'),</div><div class='add'>+    (KernRe(r'DECLARE_BITMAP\s*\(' + struct_args_pattern + r',\s*' + struct_args_pattern + r'\)',</div><div class='add'>+            re.S), r'unsigned long \1[BITS_TO_LONGS(\2)]'),</div><div class='add'>+    (KernRe(r'DECLARE_HASHTABLE\s*\(' + struct_args_pattern + r',\s*' + struct_args_pattern + r'\)',</div><div class='add'>+            re.S), r'unsigned long \1[1 &lt;&lt; ((\2) - 1)]'),</div><div class='add'>+    (KernRe(r'DECLARE_KFIFO\s*\(' + struct_args_pattern + r',\s*' + struct_args_pattern +</div><div class='add'>+            r',\s*' + struct_args_pattern + r'\)', re.S), r'\2 *\1'),</div><div class='add'>+    (KernRe(r'DECLARE_KFIFO_PTR\s*\(' + struct_args_pattern + r',\s*' +</div><div class='add'>+            struct_args_pattern + r'\)', re.S), r'\2 *\1'),</div><div class='add'>+    (KernRe(r'(?:__)?DECLARE_FLEX_ARRAY\s*\(' + struct_args_pattern + r',\s*' +</div><div class='add'>+            struct_args_pattern + r'\)', re.S), r'\1 \2[]'),</div><div class='add'>+    (KernRe(r'DEFINE_DMA_UNMAP_ADDR\s*\(' + struct_args_pattern + r'\)', re.S), r'dma_addr_t \1'),</div><div class='add'>+    (KernRe(r'DEFINE_DMA_UNMAP_LEN\s*\(' + struct_args_pattern + r'\)', re.S), r'__u32 \1'),</div><div class='add'>+]</div><div class='add'>+#</div><div class='add'>+# Regexes here are guaranteed to have the end delimiter matching</div><div class='add'>+# the start delimiter. Yet, right now, only one replace group</div><div class='add'>+# is allowed.</div><div class='add'>+#</div><div class='add'>+struct_nested_prefixes = [</div><div class='add'>+    (re.compile(r'\bSTRUCT_GROUP\('), r'\1'),</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Transforms for function prototypes</div><div class='add'>+#</div><div class='add'>+function_xforms  = [</div><div class='add'>+    (KernRe(r"^static +"), ""),</div><div class='add'>+    (KernRe(r"^extern +"), ""),</div><div class='add'>+    (KernRe(r"^asmlinkage +"), ""),</div><div class='add'>+    (KernRe(r"^inline +"), ""),</div><div class='add'>+    (KernRe(r"^__inline__ +"), ""),</div><div class='add'>+    (KernRe(r"^__inline +"), ""),</div><div class='add'>+    (KernRe(r"^__always_inline +"), ""),</div><div class='add'>+    (KernRe(r"^noinline +"), ""),</div><div class='add'>+    (KernRe(r"^__FORTIFY_INLINE +"), ""),</div><div class='add'>+    (KernRe(r"__init +"), ""),</div><div class='add'>+    (KernRe(r"__init_or_module +"), ""),</div><div class='add'>+    (KernRe(r"__deprecated +"), ""),</div><div class='add'>+    (KernRe(r"__flatten +"), ""),</div><div class='add'>+    (KernRe(r"__meminit +"), ""),</div><div class='add'>+    (KernRe(r"__must_check +"), ""),</div><div class='add'>+    (KernRe(r"__weak +"), ""),</div><div class='add'>+    (KernRe(r"__sched +"), ""),</div><div class='add'>+    (KernRe(r"_noprof"), ""),</div><div class='add'>+    (KernRe(r"__always_unused *"), ""),</div><div class='add'>+    (KernRe(r"__printf\s*\(\s*\d*\s*,\s*\d*\s*\) +"), ""),</div><div class='add'>+    (KernRe(r"__(?:re)?alloc_size\s*\(\s*\d+\s*(?:,\s*\d+\s*)?\) +"), ""),</div><div class='add'>+    (KernRe(r"__diagnose_as\s*\(\s*\S+\s*(?:,\s*\d+\s*)*\) +"), ""),</div><div class='add'>+    (KernRe(r"DECL_BUCKET_PARAMS\s*\(\s*(\S+)\s*,\s*(\S+)\s*\)"), r"\1, \2"),</div><div class='add'>+    (KernRe(r"__attribute_const__ +"), ""),</div><div class='add'>+    (KernRe(r"__attribute__\s*\(\((?:[\w\s]+(?:\([^)]*\))?\s*,?)+\)\)\s+"), ""),</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Apply a set of transforms to a block of text.</div><div class='add'>+#</div><div class='add'>+def apply_transforms(xforms, text):</div><div class='add'>+    for search, subst in xforms:</div><div class='add'>+        text = search.sub(subst, text)</div><div class='add'>+    return text</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# A little helper to get rid of excess white space</div><div class='add'>+#</div><div class='add'>+multi_space = KernRe(r'\s\s+')</div><div class='add'>+def trim_whitespace(s):</div><div class='add'>+    return multi_space.sub(' ', s.strip())</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Remove struct/enum members that have been marked "private".</div><div class='add'>+#</div><div class='add'>+def trim_private_members(text):</div><div class='add'>+    #</div><div class='add'>+    # First look for a "public:" block that ends a private region, then</div><div class='add'>+    # handle the "private until the end" case.</div><div class='add'>+    #</div><div class='add'>+    text = KernRe(r'/\*\s*private:.*?/\*\s*public:.*?\*/', flags=re.S).sub('', text)</div><div class='add'>+    text = KernRe(r'/\*\s*private:.*', flags=re.S).sub('', text)</div><div class='add'>+    #</div><div class='add'>+    # We needed the comments to do the above, but now we can take them out.</div><div class='add'>+    #</div><div class='add'>+    return KernRe(r'\s*/\*.*?\*/\s*', flags=re.S).sub('', text).strip()</div><div class='add'>+</div><div class='add'>+class state:</div><div class='add'>+    """</div><div class='add'>+    State machine enums</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # Parser states</div><div class='add'>+    NORMAL        = 0        # normal code</div><div class='add'>+    NAME          = 1        # looking for function name</div><div class='add'>+    DECLARATION   = 2        # We have seen a declaration which might not be done</div><div class='add'>+    BODY          = 3        # the body of the comment</div><div class='add'>+    SPECIAL_SECTION = 4      # doc section ending with a blank line</div><div class='add'>+    PROTO         = 5        # scanning prototype</div><div class='add'>+    DOCBLOCK      = 6        # documentation block</div><div class='add'>+    INLINE_NAME   = 7        # gathering doc outside main block</div><div class='add'>+    INLINE_TEXT   = 8	     # reading the body of inline docs</div><div class='add'>+</div><div class='add'>+    name = [</div><div class='add'>+        "NORMAL",</div><div class='add'>+        "NAME",</div><div class='add'>+        "DECLARATION",</div><div class='add'>+        "BODY",</div><div class='add'>+        "SPECIAL_SECTION",</div><div class='add'>+        "PROTO",</div><div class='add'>+        "DOCBLOCK",</div><div class='add'>+        "INLINE_NAME",</div><div class='add'>+        "INLINE_TEXT",</div><div class='add'>+    ]</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+SECTION_DEFAULT = "Description"  # default section</div><div class='add'>+</div><div class='add'>+class KernelEntry:</div><div class='add'>+</div><div class='add'>+    def __init__(self, config, fname, ln):</div><div class='add'>+        self.config = config</div><div class='add'>+        self.fname = fname</div><div class='add'>+</div><div class='add'>+        self._contents = []</div><div class='add'>+        self.prototype = ""</div><div class='add'>+</div><div class='add'>+        self.warnings = []</div><div class='add'>+</div><div class='add'>+        self.parameterlist = []</div><div class='add'>+        self.parameterdescs = {}</div><div class='add'>+        self.parametertypes = {}</div><div class='add'>+        self.parameterdesc_start_lines = {}</div><div class='add'>+</div><div class='add'>+        self.section_start_lines = {}</div><div class='add'>+        self.sections = {}</div><div class='add'>+</div><div class='add'>+        self.anon_struct_union = False</div><div class='add'>+</div><div class='add'>+        self.leading_space = None</div><div class='add'>+</div><div class='add'>+        self.fname = fname</div><div class='add'>+</div><div class='add'>+        # State flags</div><div class='add'>+        self.brcount = 0</div><div class='add'>+        self.declaration_start_line = ln + 1</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Management of section contents</div><div class='add'>+    #</div><div class='add'>+    def add_text(self, text):</div><div class='add'>+        self._contents.append(text)</div><div class='add'>+</div><div class='add'>+    def contents(self):</div><div class='add'>+        return '\n'.join(self._contents) + '\n'</div><div class='add'>+</div><div class='add'>+    # TODO: rename to emit_message after removal of kernel-doc.pl</div><div class='add'>+    def emit_msg(self, ln, msg, *, warning=True):</div><div class='add'>+        """Emit a message"""</div><div class='add'>+</div><div class='add'>+        log_msg = f"{self.fname}:{ln} {msg}"</div><div class='add'>+</div><div class='add'>+        if not warning:</div><div class='add'>+            self.config.log.info(log_msg)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Delegate warning output to output logic, as this way it</div><div class='add'>+        # will report warnings/info only for symbols that are output</div><div class='add'>+</div><div class='add'>+        self.warnings.append(log_msg)</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Begin a new section.</div><div class='add'>+    #</div><div class='add'>+    def begin_section(self, line_no, title = SECTION_DEFAULT, dump = False):</div><div class='add'>+        if dump:</div><div class='add'>+            self.dump_section(start_new = True)</div><div class='add'>+        self.section = title</div><div class='add'>+        self.new_start_line = line_no</div><div class='add'>+</div><div class='add'>+    def dump_section(self, start_new=True):</div><div class='add'>+        """</div><div class='add'>+        Dumps section contents to arrays/hashes intended for that purpose.</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # If we have accumulated no contents in the default ("description")</div><div class='add'>+        # section, don't bother.</div><div class='add'>+        #</div><div class='add'>+        if self.section == SECTION_DEFAULT and not self._contents:</div><div class='add'>+            return</div><div class='add'>+        name = self.section</div><div class='add'>+        contents = self.contents()</div><div class='add'>+</div><div class='add'>+        if type_param.match(name):</div><div class='add'>+            name = type_param.group(1)</div><div class='add'>+</div><div class='add'>+            self.parameterdescs[name] = contents</div><div class='add'>+            self.parameterdesc_start_lines[name] = self.new_start_line</div><div class='add'>+</div><div class='add'>+            self.new_start_line = 0</div><div class='add'>+</div><div class='add'>+        else:</div><div class='add'>+            if name in self.sections and self.sections[name] != "":</div><div class='add'>+                # Only warn on user-specified duplicate section names</div><div class='add'>+                if name != SECTION_DEFAULT:</div><div class='add'>+                    self.emit_msg(self.new_start_line,</div><div class='add'>+                                  f"duplicate section name '{name}'")</div><div class='add'>+                # Treat as a new paragraph - add a blank line</div><div class='add'>+                self.sections[name] += '\n' + contents</div><div class='add'>+            else:</div><div class='add'>+                self.sections[name] = contents</div><div class='add'>+                self.section_start_lines[name] = self.new_start_line</div><div class='add'>+                self.new_start_line = 0</div><div class='add'>+</div><div class='add'>+#        self.config.log.debug("Section: %s : %s", name, pformat(vars(self)))</div><div class='add'>+</div><div class='add'>+        if start_new:</div><div class='add'>+            self.section = SECTION_DEFAULT</div><div class='add'>+            self._contents = []</div><div class='add'>+</div><div class='add'>+python_warning = False</div><div class='add'>+</div><div class='add'>+class KernelDoc:</div><div class='add'>+    """</div><div class='add'>+    Read a C language source or header FILE and extract embedded</div><div class='add'>+    documentation comments.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # Section names</div><div class='add'>+</div><div class='add'>+    section_context = "Context"</div><div class='add'>+    section_return = "Return"</div><div class='add'>+</div><div class='add'>+    undescribed = "-- undescribed --"</div><div class='add'>+</div><div class='add'>+    def __init__(self, config, fname):</div><div class='add'>+        """Initialize internal variables"""</div><div class='add'>+</div><div class='add'>+        self.fname = fname</div><div class='add'>+        self.config = config</div><div class='add'>+</div><div class='add'>+        # Initial state for the state machines</div><div class='add'>+        self.state = state.NORMAL</div><div class='add'>+</div><div class='add'>+        # Store entry currently being processed</div><div class='add'>+        self.entry = None</div><div class='add'>+</div><div class='add'>+        # Place all potential outputs into an array</div><div class='add'>+        self.entries = []</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # We need Python 3.7 for its "dicts remember the insertion</div><div class='add'>+        # order" guarantee</div><div class='add'>+        #</div><div class='add'>+        global python_warning</div><div class='add'>+        if (not python_warning and</div><div class='add'>+            sys.version_info.major == 3 and sys.version_info.minor &lt; 7):</div><div class='add'>+</div><div class='add'>+            self.emit_msg(0,</div><div class='add'>+                          'Python 3.7 or later is required for correct results')</div><div class='add'>+            python_warning = True</div><div class='add'>+</div><div class='add'>+    def emit_msg(self, ln, msg, *, warning=True):</div><div class='add'>+        """Emit a message"""</div><div class='add'>+</div><div class='add'>+        if self.entry:</div><div class='add'>+            self.entry.emit_msg(ln, msg, warning=warning)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        log_msg = f"{self.fname}:{ln} {msg}"</div><div class='add'>+</div><div class='add'>+        if warning:</div><div class='add'>+            self.config.log.warning(log_msg)</div><div class='add'>+        else:</div><div class='add'>+            self.config.log.info(log_msg)</div><div class='add'>+</div><div class='add'>+    def dump_section(self, start_new=True):</div><div class='add'>+        """</div><div class='add'>+        Dumps section contents to arrays/hashes intended for that purpose.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if self.entry:</div><div class='add'>+            self.entry.dump_section(start_new)</div><div class='add'>+</div><div class='add'>+    # TODO: rename it to store_declaration after removal of kernel-doc.pl</div><div class='add'>+    def output_declaration(self, dtype, name, **args):</div><div class='add'>+        """</div><div class='add'>+        Stores the entry into an entry array.</div><div class='add'>+</div><div class='add'>+        The actual output and output filters will be handled elsewhere</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        item = KdocItem(name, self.fname, dtype,</div><div class='add'>+                        self.entry.declaration_start_line, **args)</div><div class='add'>+        item.warnings = self.entry.warnings</div><div class='add'>+</div><div class='add'>+        # Drop empty sections</div><div class='add'>+        # TODO: improve empty sections logic to emit warnings</div><div class='add'>+        sections = self.entry.sections</div><div class='add'>+        for section in ["Description", "Return"]:</div><div class='add'>+            if section in sections and not sections[section].rstrip():</div><div class='add'>+                del sections[section]</div><div class='add'>+        item.set_sections(sections, self.entry.section_start_lines)</div><div class='add'>+        item.set_params(self.entry.parameterlist, self.entry.parameterdescs,</div><div class='add'>+                        self.entry.parametertypes,</div><div class='add'>+                        self.entry.parameterdesc_start_lines)</div><div class='add'>+        self.entries.append(item)</div><div class='add'>+</div><div class='add'>+        self.config.log.debug("Output: %s:%s = %s", dtype, name, pformat(args))</div><div class='add'>+</div><div class='add'>+    def reset_state(self, ln):</div><div class='add'>+        """</div><div class='add'>+        Ancillary routine to create a new entry. It initializes all</div><div class='add'>+        variables used by the state machine.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Flush the warnings out before we proceed further</div><div class='add'>+        #</div><div class='add'>+        if self.entry and self.entry not in self.entries:</div><div class='add'>+            for log_msg in self.entry.warnings:</div><div class='add'>+                self.config.log.warning(log_msg)</div><div class='add'>+</div><div class='add'>+        self.entry = KernelEntry(self.config, self.fname, ln)</div><div class='add'>+</div><div class='add'>+        # State flags</div><div class='add'>+        self.state = state.NORMAL</div><div class='add'>+</div><div class='add'>+    def push_parameter(self, ln, decl_type, param, dtype,</div><div class='add'>+                       org_arg, declaration_name):</div><div class='add'>+        """</div><div class='add'>+        Store parameters and their descriptions at self.entry.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if self.entry.anon_struct_union and dtype == "" and param == "}":</div><div class='add'>+            return  # Ignore the ending }; from anonymous struct/union</div><div class='add'>+</div><div class='add'>+        self.entry.anon_struct_union = False</div><div class='add'>+</div><div class='add'>+        param = KernRe(r'[\[\)].*').sub('', param, count=1)</div><div class='add'>+</div><div class='add'>+        #</div><div class='add'>+        # Look at various "anonymous type" cases.</div><div class='add'>+        #</div><div class='add'>+        if dtype == '':</div><div class='add'>+            if param.endswith("..."):</div><div class='add'>+                if len(param) &gt; 3: # there is a name provided, use that</div><div class='add'>+                    param = param[:-3]</div><div class='add'>+                if not self.entry.parameterdescs.get(param):</div><div class='add'>+                    self.entry.parameterdescs[param] = "variable arguments"</div><div class='add'>+</div><div class='add'>+            elif (not param) or param == "void":</div><div class='add'>+                param = "void"</div><div class='add'>+                self.entry.parameterdescs[param] = "no arguments"</div><div class='add'>+</div><div class='add'>+            elif param in ["struct", "union"]:</div><div class='add'>+                # Handle unnamed (anonymous) union or struct</div><div class='add'>+                dtype = param</div><div class='add'>+                param = "{unnamed_" + param + "}"</div><div class='add'>+                self.entry.parameterdescs[param] = "anonymous\n"</div><div class='add'>+                self.entry.anon_struct_union = True</div><div class='add'>+</div><div class='add'>+        # Warn if parameter has no description</div><div class='add'>+        # (but ignore ones starting with # as these are not parameters</div><div class='add'>+        # but inline preprocessor statements)</div><div class='add'>+        if param not in self.entry.parameterdescs and not param.startswith("#"):</div><div class='add'>+            self.entry.parameterdescs[param] = self.undescribed</div><div class='add'>+</div><div class='add'>+            if "." not in param:</div><div class='add'>+                if decl_type == 'function':</div><div class='add'>+                    dname = f"{decl_type} parameter"</div><div class='add'>+                else:</div><div class='add'>+                    dname = f"{decl_type} member"</div><div class='add'>+</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"{dname} '{param}' not described in '{declaration_name}'")</div><div class='add'>+</div><div class='add'>+        # Strip spaces from param so that it is one continuous string on</div><div class='add'>+        # parameterlist. This fixes a problem where check_sections()</div><div class='add'>+        # cannot find a parameter like "addr[6 + 2]" because it actually</div><div class='add'>+        # appears as "addr[6", "+", "2]" on the parameter list.</div><div class='add'>+        # However, it's better to maintain the param string unchanged for</div><div class='add'>+        # output, so just weaken the string compare in check_sections()</div><div class='add'>+        # to ignore "[blah" in a parameter string.</div><div class='add'>+</div><div class='add'>+        self.entry.parameterlist.append(param)</div><div class='add'>+        org_arg = KernRe(r'\s\s+').sub(' ', org_arg)</div><div class='add'>+        self.entry.parametertypes[param] = org_arg</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def create_parameter_list(self, ln, decl_type, args,</div><div class='add'>+                              splitter, declaration_name):</div><div class='add'>+        """</div><div class='add'>+        Creates a list of parameters, storing them at self.entry.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # temporarily replace all commas inside function pointer definition</div><div class='add'>+        arg_expr = KernRe(r'(\([^\),]+),')</div><div class='add'>+        while arg_expr.search(args):</div><div class='add'>+            args = arg_expr.sub(r"\1#", args)</div><div class='add'>+</div><div class='add'>+        for arg in args.split(splitter):</div><div class='add'>+            # Ignore argument attributes</div><div class='add'>+            arg = KernRe(r'\sPOS0?\s').sub(' ', arg)</div><div class='add'>+</div><div class='add'>+            # Strip leading/trailing spaces</div><div class='add'>+            arg = arg.strip()</div><div class='add'>+            arg = KernRe(r'\s+').sub(' ', arg, count=1)</div><div class='add'>+</div><div class='add'>+            if arg.startswith('#'):</div><div class='add'>+                # Treat preprocessor directive as a typeless variable just to fill</div><div class='add'>+                # corresponding data structures "correctly". Catch it later in</div><div class='add'>+                # output_* subs.</div><div class='add'>+</div><div class='add'>+                # Treat preprocessor directive as a typeless variable</div><div class='add'>+                self.push_parameter(ln, decl_type, arg, "",</div><div class='add'>+                                    "", declaration_name)</div><div class='add'>+            #</div><div class='add'>+            # The pointer-to-function case.</div><div class='add'>+            #</div><div class='add'>+            elif KernRe(r'\(.+\)\s*\(').search(arg):</div><div class='add'>+                arg = arg.replace('#', ',')</div><div class='add'>+                r = KernRe(r'[^\(]+\(\*?\s*'  # Everything up to "(*"</div><div class='add'>+                           r'([\w\[\].]*)'    # Capture the name and possible [array]</div><div class='add'>+                           r'\s*\)')	      # Make sure the trailing ")" is there</div><div class='add'>+                if r.match(arg):</div><div class='add'>+                    param = r.group(1)</div><div class='add'>+                else:</div><div class='add'>+                    self.emit_msg(ln, f"Invalid param: {arg}")</div><div class='add'>+                    param = arg</div><div class='add'>+                dtype = arg.replace(param, '')</div><div class='add'>+                self.push_parameter(ln, decl_type, param, dtype, arg, declaration_name)</div><div class='add'>+            #</div><div class='add'>+            # The array-of-pointers case.  Dig the parameter name out from the middle</div><div class='add'>+            # of the declaration.</div><div class='add'>+            #</div><div class='add'>+            elif KernRe(r'\(.+\)\s*\[').search(arg):</div><div class='add'>+                r = KernRe(r'[^\(]+\(\s*\*\s*'		# Up to "(" and maybe "*"</div><div class='add'>+                           r'([\w.]*?)'			# The actual pointer name</div><div class='add'>+                           r'\s*(\[\s*\w+\s*\]\s*)*\)') # The [array portion]</div><div class='add'>+                if r.match(arg):</div><div class='add'>+                    param = r.group(1)</div><div class='add'>+                else:</div><div class='add'>+                    self.emit_msg(ln, f"Invalid param: {arg}")</div><div class='add'>+                    param = arg</div><div class='add'>+                dtype = arg.replace(param, '')</div><div class='add'>+                self.push_parameter(ln, decl_type, param, dtype, arg, declaration_name)</div><div class='add'>+            elif arg:</div><div class='add'>+                #</div><div class='add'>+                # Clean up extraneous spaces and split the string at commas; the first</div><div class='add'>+                # element of the resulting list will also include the type information.</div><div class='add'>+                #</div><div class='add'>+                arg = KernRe(r'\s*:\s*').sub(":", arg)</div><div class='add'>+                arg = KernRe(r'\s*\[').sub('[', arg)</div><div class='add'>+                args = KernRe(r'\s*,\s*').split(arg)</div><div class='add'>+                args[0] = re.sub(r'(\*+)\s*', r' \1', args[0])</div><div class='add'>+                #</div><div class='add'>+                # args[0] has a string of "type a".  If "a" includes an [array]</div><div class='add'>+                # declaration, we want to not be fooled by any white space inside</div><div class='add'>+                # the brackets, so detect and handle that case specially.</div><div class='add'>+                #</div><div class='add'>+                r = KernRe(r'^([^[\]]*\s+)(.*)$')</div><div class='add'>+                if r.match(args[0]):</div><div class='add'>+                    args[0] = r.group(2)</div><div class='add'>+                    dtype = r.group(1)</div><div class='add'>+                else:</div><div class='add'>+                    # No space in args[0]; this seems wrong but preserves previous behavior</div><div class='add'>+                    dtype = ''</div><div class='add'>+</div><div class='add'>+                bitfield_re = KernRe(r'(.*?):(\w+)')</div><div class='add'>+                for param in args:</div><div class='add'>+                    #</div><div class='add'>+                    # For pointers, shift the star(s) from the variable name to the</div><div class='add'>+                    # type declaration.</div><div class='add'>+                    #</div><div class='add'>+                    r = KernRe(r'^(\*+)\s*(.*)')</div><div class='add'>+                    if r.match(param):</div><div class='add'>+                        self.push_parameter(ln, decl_type, r.group(2),</div><div class='add'>+                                            f"{dtype} {r.group(1)}",</div><div class='add'>+                                            arg, declaration_name)</div><div class='add'>+                    #</div><div class='add'>+                    # Perform a similar shift for bitfields.</div><div class='add'>+                    #</div><div class='add'>+                    elif bitfield_re.search(param):</div><div class='add'>+                        if dtype != "":  # Skip unnamed bit-fields</div><div class='add'>+                            self.push_parameter(ln, decl_type, bitfield_re.group(1),</div><div class='add'>+                                                f"{dtype}:{bitfield_re.group(2)}",</div><div class='add'>+                                                arg, declaration_name)</div><div class='add'>+                    else:</div><div class='add'>+                        self.push_parameter(ln, decl_type, param, dtype,</div><div class='add'>+                                            arg, declaration_name)</div><div class='add'>+</div><div class='add'>+    def check_sections(self, ln, decl_name, decl_type):</div><div class='add'>+        """</div><div class='add'>+        Check for errors inside sections, emitting warnings if not found</div><div class='add'>+        parameters are described.</div><div class='add'>+        """</div><div class='add'>+        for section in self.entry.sections:</div><div class='add'>+            if section not in self.entry.parameterlist and \</div><div class='add'>+               not known_sections.search(section):</div><div class='add'>+                if decl_type == 'function':</div><div class='add'>+                    dname = f"{decl_type} parameter"</div><div class='add'>+                else:</div><div class='add'>+                    dname = f"{decl_type} member"</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"Excess {dname} '{section}' description in '{decl_name}'")</div><div class='add'>+</div><div class='add'>+    def check_return_section(self, ln, declaration_name, return_type):</div><div class='add'>+        """</div><div class='add'>+        If the function doesn't return void, warns about the lack of a</div><div class='add'>+        return description.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not self.config.wreturn:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Ignore an empty return type (It's a macro)</div><div class='add'>+        # Ignore functions with a "void" return type (but not "void *")</div><div class='add'>+        if not return_type or KernRe(r'void\s*\w*\s*$').search(return_type):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if not self.entry.sections.get("Return", None):</div><div class='add'>+            self.emit_msg(ln,</div><div class='add'>+                          f"No description found for return value of '{declaration_name}'")</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Split apart a structure prototype; returns (struct|union, name, members) or None</div><div class='add'>+    #</div><div class='add'>+    def split_struct_proto(self, proto):</div><div class='add'>+        type_pattern = r'(struct|union)'</div><div class='add'>+        qualifiers = [</div><div class='add'>+            "__attribute__",</div><div class='add'>+            "__packed",</div><div class='add'>+            "__aligned",</div><div class='add'>+            "____cacheline_aligned_in_smp",</div><div class='add'>+            "____cacheline_aligned",</div><div class='add'>+        ]</div><div class='add'>+        definition_body = r'\{(.*)\}\s*' + "(?:" + '|'.join(qualifiers) + ")?"</div><div class='add'>+</div><div class='add'>+        r = KernRe(type_pattern + r'\s+(\w+)\s*' + definition_body)</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            return (r.group(1), r.group(2), r.group(3))</div><div class='add'>+        else:</div><div class='add'>+            r = KernRe(r'typedef\s+' + type_pattern + r'\s*' + definition_body + r'\s*(\w+)\s*;')</div><div class='add'>+            if r.search(proto):</div><div class='add'>+                return (r.group(1), r.group(3), r.group(2))</div><div class='add'>+        return None</div><div class='add'>+    #</div><div class='add'>+    # Rewrite the members of a structure or union for easier formatting later on.</div><div class='add'>+    # Among other things, this function will turn a member like:</div><div class='add'>+    #</div><div class='add'>+    #  struct { inner_members; } foo;</div><div class='add'>+    #</div><div class='add'>+    # into:</div><div class='add'>+    #</div><div class='add'>+    #  struct foo; inner_members;</div><div class='add'>+    #</div><div class='add'>+    def rewrite_struct_members(self, members):</div><div class='add'>+        #</div><div class='add'>+        # Process struct/union members from the most deeply nested outward.  The</div><div class='add'>+        # trick is in the ^{ below - it prevents a match of an outer struct/union</div><div class='add'>+        # until the inner one has been munged (removing the "{" in the process).</div><div class='add'>+        #</div><div class='add'>+        struct_members = KernRe(r'(struct|union)'   # 0: declaration type</div><div class='add'>+                                r'([^\{\};]+)' 	    # 1: possible name</div><div class='add'>+                                r'(\{)'</div><div class='add'>+                                r'([^\{\}]*)'       # 3: Contents of declaration</div><div class='add'>+                                r'(\})'</div><div class='add'>+                                r'([^\{\};]*)(;)')  # 5: Remaining stuff after declaration</div><div class='add'>+        tuples = struct_members.findall(members)</div><div class='add'>+        while tuples:</div><div class='add'>+            for t in tuples:</div><div class='add'>+                newmember = ""</div><div class='add'>+                oldmember = "".join(t) # Reconstruct the original formatting</div><div class='add'>+                dtype, name, lbr, content, rbr, rest, semi = t</div><div class='add'>+                #</div><div class='add'>+                # Pass through each field name, normalizing the form and formatting.</div><div class='add'>+                #</div><div class='add'>+                for s_id in rest.split(','):</div><div class='add'>+                    s_id = s_id.strip()</div><div class='add'>+                    newmember += f"{dtype} {s_id}; "</div><div class='add'>+                    #</div><div class='add'>+                    # Remove bitfield/array/pointer info, getting the bare name.</div><div class='add'>+                    #</div><div class='add'>+                    s_id = KernRe(r'[:\[].*').sub('', s_id)</div><div class='add'>+                    s_id = KernRe(r'^\s*\**(\S+)\s*').sub(r'\1', s_id)</div><div class='add'>+                    #</div><div class='add'>+                    # Pass through the members of this inner structure/union.</div><div class='add'>+                    #</div><div class='add'>+                    for arg in content.split(';'):</div><div class='add'>+                        arg = arg.strip()</div><div class='add'>+                        #</div><div class='add'>+                        # Look for (type)(*name)(args) - pointer to function</div><div class='add'>+                        #</div><div class='add'>+                        r = KernRe(r'^([^\(]+\(\*?\s*)([\w.]*)(\s*\).*)')</div><div class='add'>+                        if r.match(arg):</div><div class='add'>+                            dtype, name, extra = r.group(1), r.group(2), r.group(3)</div><div class='add'>+                            # Pointer-to-function</div><div class='add'>+                            if not s_id:</div><div class='add'>+                                # Anonymous struct/union</div><div class='add'>+                                newmember += f"{dtype}{name}{extra}; "</div><div class='add'>+                            else:</div><div class='add'>+                                newmember += f"{dtype}{s_id}.{name}{extra}; "</div><div class='add'>+                        #</div><div class='add'>+                        # Otherwise a non-function member.</div><div class='add'>+                        #</div><div class='add'>+                        else:</div><div class='add'>+                            #</div><div class='add'>+                            # Remove bitmap and array portions and spaces around commas</div><div class='add'>+                            #</div><div class='add'>+                            arg = KernRe(r':\s*\d+\s*').sub('', arg)</div><div class='add'>+                            arg = KernRe(r'\[.*\]').sub('', arg)</div><div class='add'>+                            arg = KernRe(r'\s*,\s*').sub(',', arg)</div><div class='add'>+                            #</div><div class='add'>+                            # Look for a normal decl - "type name[,name...]"</div><div class='add'>+                            #</div><div class='add'>+                            r = KernRe(r'(.*)\s+([\S+,]+)')</div><div class='add'>+                            if r.search(arg):</div><div class='add'>+                                for name in r.group(2).split(','):</div><div class='add'>+                                    name = KernRe(r'^\s*\**(\S+)\s*').sub(r'\1', name)</div><div class='add'>+                                    if not s_id:</div><div class='add'>+                                        # Anonymous struct/union</div><div class='add'>+                                        newmember += f"{r.group(1)} {name}; "</div><div class='add'>+                                    else:</div><div class='add'>+                                        newmember += f"{r.group(1)} {s_id}.{name}; "</div><div class='add'>+                            else:</div><div class='add'>+                                newmember += f"{arg}; "</div><div class='add'>+                #</div><div class='add'>+                # At the end of the s_id loop, replace the original declaration with</div><div class='add'>+                # the munged version.</div><div class='add'>+                #</div><div class='add'>+                members = members.replace(oldmember, newmember)</div><div class='add'>+            #</div><div class='add'>+            # End of the tuple loop - search again and see if there are outer members</div><div class='add'>+            # that now turn up.</div><div class='add'>+            #</div><div class='add'>+            tuples = struct_members.findall(members)</div><div class='add'>+        return members</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Format the struct declaration into a standard form for inclusion in the</div><div class='add'>+    # resulting docs.</div><div class='add'>+    #</div><div class='add'>+    def format_struct_decl(self, declaration):</div><div class='add'>+        #</div><div class='add'>+        # Insert newlines, get rid of extra spaces.</div><div class='add'>+        #</div><div class='add'>+        declaration = KernRe(r'([\{;])').sub(r'\1\n', declaration)</div><div class='add'>+        declaration = KernRe(r'\}\s+;').sub('};', declaration)</div><div class='add'>+        #</div><div class='add'>+        # Format inline enums with each member on its own line.</div><div class='add'>+        #</div><div class='add'>+        r = KernRe(r'(enum\s+\{[^\}]+),([^\n])')</div><div class='add'>+        while r.search(declaration):</div><div class='add'>+            declaration = r.sub(r'\1,\n\2', declaration)</div><div class='add'>+        #</div><div class='add'>+        # Now go through and supply the right number of tabs</div><div class='add'>+        # for each line.</div><div class='add'>+        #</div><div class='add'>+        def_args = declaration.split('\n')</div><div class='add'>+        level = 1</div><div class='add'>+        declaration = ""</div><div class='add'>+        for clause in def_args:</div><div class='add'>+            clause = KernRe(r'\s+').sub(' ', clause.strip(), count=1)</div><div class='add'>+            if clause:</div><div class='add'>+                if '}' in clause and level &gt; 1:</div><div class='add'>+                    level -= 1</div><div class='add'>+                if not clause.startswith('#'):</div><div class='add'>+                    declaration += "\t" * level</div><div class='add'>+                declaration += "\t" + clause + "\n"</div><div class='add'>+                if "{" in clause and "}" not in clause:</div><div class='add'>+                    level += 1</div><div class='add'>+        return declaration</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def dump_struct(self, ln, proto):</div><div class='add'>+        """</div><div class='add'>+        Store an entry for a struct or union</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # Do the basic parse to get the pieces of the declaration.</div><div class='add'>+        #</div><div class='add'>+        struct_parts = self.split_struct_proto(proto)</div><div class='add'>+        if not struct_parts:</div><div class='add'>+            self.emit_msg(ln, f"{proto} error: Cannot parse struct or union!")</div><div class='add'>+            return</div><div class='add'>+        decl_type, declaration_name, members = struct_parts</div><div class='add'>+</div><div class='add'>+        if self.entry.identifier != declaration_name:</div><div class='add'>+            self.emit_msg(ln, f"expecting prototype for {decl_type} {self.entry.identifier}. "</div><div class='add'>+                          f"Prototype was for {decl_type} {declaration_name} instead\n")</div><div class='add'>+            return</div><div class='add'>+        #</div><div class='add'>+        # Go through the list of members applying all of our transformations.</div><div class='add'>+        #</div><div class='add'>+        members = trim_private_members(members)</div><div class='add'>+        members = apply_transforms(struct_xforms, members)</div><div class='add'>+</div><div class='add'>+        nested = NestedMatch()</div><div class='add'>+        for search, sub in struct_nested_prefixes:</div><div class='add'>+            members = nested.sub(search, sub, members)</div><div class='add'>+        #</div><div class='add'>+        # Deal with embedded struct and union members, and drop enums entirely.</div><div class='add'>+        #</div><div class='add'>+        declaration = members</div><div class='add'>+        members = self.rewrite_struct_members(members)</div><div class='add'>+        members = re.sub(r'(\{[^\{\}]*\})', '', members)</div><div class='add'>+        #</div><div class='add'>+        # Output the result and we are done.</div><div class='add'>+        #</div><div class='add'>+        self.create_parameter_list(ln, decl_type, members, ';',</div><div class='add'>+                                   declaration_name)</div><div class='add'>+        self.check_sections(ln, declaration_name, decl_type)</div><div class='add'>+        self.output_declaration(decl_type, declaration_name,</div><div class='add'>+                                definition=self.format_struct_decl(declaration),</div><div class='add'>+                                purpose=self.entry.declaration_purpose)</div><div class='add'>+</div><div class='add'>+    def dump_enum(self, ln, proto):</div><div class='add'>+        """</div><div class='add'>+        Stores an enum inside self.entries array.</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # Strip preprocessor directives.  Note that this depends on the</div><div class='add'>+        # trailing semicolon we added in process_proto_type().</div><div class='add'>+        #</div><div class='add'>+        proto = KernRe(r'#\s*((define|ifdef|if)\s+|endif)[^;]*;', flags=re.S).sub('', proto)</div><div class='add'>+        #</div><div class='add'>+        # Parse out the name and members of the enum.  Typedef form first.</div><div class='add'>+        #</div><div class='add'>+        r = KernRe(r'typedef\s+enum\s*\{(.*)\}\s*(\w*)\s*;')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            declaration_name = r.group(2)</div><div class='add'>+            members = trim_private_members(r.group(1))</div><div class='add'>+        #</div><div class='add'>+        # Failing that, look for a straight enum</div><div class='add'>+        #</div><div class='add'>+        else:</div><div class='add'>+            r = KernRe(r'enum\s+(\w*)\s*\{(.*)\}')</div><div class='add'>+            if r.match(proto):</div><div class='add'>+                declaration_name = r.group(1)</div><div class='add'>+                members = trim_private_members(r.group(2))</div><div class='add'>+        #</div><div class='add'>+        # OK, this isn't going to work.</div><div class='add'>+        #</div><div class='add'>+            else:</div><div class='add'>+                self.emit_msg(ln, f"{proto}: error: Cannot parse enum!")</div><div class='add'>+                return</div><div class='add'>+        #</div><div class='add'>+        # Make sure we found what we were expecting.</div><div class='add'>+        #</div><div class='add'>+        if self.entry.identifier != declaration_name:</div><div class='add'>+            if self.entry.identifier == "":</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"{proto}: wrong kernel-doc identifier on prototype")</div><div class='add'>+            else:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"expecting prototype for enum {self.entry.identifier}. "</div><div class='add'>+                              f"Prototype was for enum {declaration_name} instead")</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if not declaration_name:</div><div class='add'>+            declaration_name = "(anonymous)"</div><div class='add'>+        #</div><div class='add'>+        # Parse out the name of each enum member, and verify that we</div><div class='add'>+        # have a description for it.</div><div class='add'>+        #</div><div class='add'>+        member_set = set()</div><div class='add'>+        members = KernRe(r'\([^;)]*\)').sub('', members)</div><div class='add'>+        for arg in members.split(','):</div><div class='add'>+            if not arg:</div><div class='add'>+                continue</div><div class='add'>+            arg = KernRe(r'^\s*(\w+).*').sub(r'\1', arg)</div><div class='add'>+            self.entry.parameterlist.append(arg)</div><div class='add'>+            if arg not in self.entry.parameterdescs:</div><div class='add'>+                self.entry.parameterdescs[arg] = self.undescribed</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"Enum value '{arg}' not described in enum '{declaration_name}'")</div><div class='add'>+            member_set.add(arg)</div><div class='add'>+        #</div><div class='add'>+        # Ensure that every described member actually exists in the enum.</div><div class='add'>+        #</div><div class='add'>+        for k in self.entry.parameterdescs:</div><div class='add'>+            if k not in member_set:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"Excess enum value '@{k}' description in '{declaration_name}'")</div><div class='add'>+</div><div class='add'>+        self.output_declaration('enum', declaration_name,</div><div class='add'>+                                purpose=self.entry.declaration_purpose)</div><div class='add'>+</div><div class='add'>+    def dump_declaration(self, ln, prototype):</div><div class='add'>+        """</div><div class='add'>+        Stores a data declaration inside self.entries array.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if self.entry.decl_type == "enum":</div><div class='add'>+            self.dump_enum(ln, prototype)</div><div class='add'>+        elif self.entry.decl_type == "typedef":</div><div class='add'>+            self.dump_typedef(ln, prototype)</div><div class='add'>+        elif self.entry.decl_type in ["union", "struct"]:</div><div class='add'>+            self.dump_struct(ln, prototype)</div><div class='add'>+        else:</div><div class='add'>+            # This would be a bug</div><div class='add'>+            self.emit_message(ln, f'Unknown declaration type: {self.entry.decl_type}')</div><div class='add'>+</div><div class='add'>+    def dump_function(self, ln, prototype):</div><div class='add'>+        """</div><div class='add'>+        Stores a function or function macro inside self.entries array.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        found = func_macro = False</div><div class='add'>+        return_type = ''</div><div class='add'>+        decl_type = 'function'</div><div class='add'>+        #</div><div class='add'>+        # Apply the initial transformations.</div><div class='add'>+        #</div><div class='add'>+        prototype = apply_transforms(function_xforms, prototype)</div><div class='add'>+        #</div><div class='add'>+        # If we have a macro, remove the "#define" at the front.</div><div class='add'>+        #</div><div class='add'>+        new_proto = KernRe(r"^#\s*define\s+").sub("", prototype)</div><div class='add'>+        if new_proto != prototype:</div><div class='add'>+            prototype = new_proto</div><div class='add'>+            #</div><div class='add'>+            # Dispense with the simple "#define A B" case here; the key</div><div class='add'>+            # is the space after the name of the symbol being defined.</div><div class='add'>+            # NOTE that the seemingly misnamed "func_macro" indicates a</div><div class='add'>+            # macro *without* arguments.</div><div class='add'>+            #</div><div class='add'>+            r = KernRe(r'^(\w+)\s+')</div><div class='add'>+            if r.search(prototype):</div><div class='add'>+                return_type = ''</div><div class='add'>+                declaration_name = r.group(1)</div><div class='add'>+                func_macro = True</div><div class='add'>+                found = True</div><div class='add'>+</div><div class='add'>+        # Yes, this truly is vile.  We are looking for:</div><div class='add'>+        # 1. Return type (may be nothing if we're looking at a macro)</div><div class='add'>+        # 2. Function name</div><div class='add'>+        # 3. Function parameters.</div><div class='add'>+        #</div><div class='add'>+        # All the while we have to watch out for function pointer parameters</div><div class='add'>+        # (which IIRC is what the two sections are for), C types (these</div><div class='add'>+        # regexps don't even start to express all the possibilities), and</div><div class='add'>+        # so on.</div><div class='add'>+        #</div><div class='add'>+        # If you mess with these regexps, it's a good idea to check that</div><div class='add'>+        # the following functions' documentation still comes out right:</div><div class='add'>+        # - parport_register_device (function pointer parameters)</div><div class='add'>+        # - atomic_set (macro)</div><div class='add'>+        # - pci_match_device, __copy_to_user (long return type)</div><div class='add'>+</div><div class='add'>+        name = r'\w+'</div><div class='add'>+        type1 = r'(?:[\w\s]+)?'</div><div class='add'>+        type2 = r'(?:[\w\s]+\*+)+'</div><div class='add'>+        #</div><div class='add'>+        # Attempt to match first on (args) with no internal parentheses; this</div><div class='add'>+        # lets us easily filter out __acquires() and other post-args stuff.  If</div><div class='add'>+        # that fails, just grab the rest of the line to the last closing</div><div class='add'>+        # parenthesis.</div><div class='add'>+        #</div><div class='add'>+        proto_args = r'\(([^\(]*|.*)\)'</div><div class='add'>+        #</div><div class='add'>+        # (Except for the simple macro case) attempt to split up the prototype</div><div class='add'>+        # in the various ways we understand.</div><div class='add'>+        #</div><div class='add'>+        if not found:</div><div class='add'>+            patterns = [</div><div class='add'>+                rf'^()({name})\s*{proto_args}',</div><div class='add'>+                rf'^({type1})\s+({name})\s*{proto_args}',</div><div class='add'>+                rf'^({type2})\s*({name})\s*{proto_args}',</div><div class='add'>+            ]</div><div class='add'>+</div><div class='add'>+            for p in patterns:</div><div class='add'>+                r = KernRe(p)</div><div class='add'>+                if r.match(prototype):</div><div class='add'>+                    return_type = r.group(1)</div><div class='add'>+                    declaration_name = r.group(2)</div><div class='add'>+                    args = r.group(3)</div><div class='add'>+                    self.create_parameter_list(ln, decl_type, args, ',',</div><div class='add'>+                                               declaration_name)</div><div class='add'>+                    found = True</div><div class='add'>+                    break</div><div class='add'>+        #</div><div class='add'>+        # Parsing done; make sure that things are as we expect.</div><div class='add'>+        #</div><div class='add'>+        if not found:</div><div class='add'>+            self.emit_msg(ln,</div><div class='add'>+                          f"cannot understand function prototype: '{prototype}'")</div><div class='add'>+            return</div><div class='add'>+        if self.entry.identifier != declaration_name:</div><div class='add'>+            self.emit_msg(ln, f"expecting prototype for {self.entry.identifier}(). "</div><div class='add'>+                          f"Prototype was for {declaration_name}() instead")</div><div class='add'>+            return</div><div class='add'>+        self.check_sections(ln, declaration_name, "function")</div><div class='add'>+        self.check_return_section(ln, declaration_name, return_type)</div><div class='add'>+        #</div><div class='add'>+        # Store the result.</div><div class='add'>+        #</div><div class='add'>+        self.output_declaration(decl_type, declaration_name,</div><div class='add'>+                                typedef=('typedef' in return_type),</div><div class='add'>+                                functiontype=return_type,</div><div class='add'>+                                purpose=self.entry.declaration_purpose,</div><div class='add'>+                                func_macro=func_macro)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def dump_typedef(self, ln, proto):</div><div class='add'>+        """</div><div class='add'>+        Stores a typedef inside self.entries array.</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # We start by looking for function typedefs.</div><div class='add'>+        #</div><div class='add'>+        typedef_type = r'typedef((?:\s+[\w*]+\b){0,7}\s+(?:\w+\b|\*+))\s*'</div><div class='add'>+        typedef_ident = r'\*?\s*(\w\S+)\s*'</div><div class='add'>+        typedef_args = r'\s*\((.*)\);'</div><div class='add'>+</div><div class='add'>+        typedef1 = KernRe(typedef_type + r'\(' + typedef_ident + r'\)' + typedef_args)</div><div class='add'>+        typedef2 = KernRe(typedef_type + typedef_ident + typedef_args)</div><div class='add'>+</div><div class='add'>+        # Parse function typedef prototypes</div><div class='add'>+        for r in [typedef1, typedef2]:</div><div class='add'>+            if not r.match(proto):</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            return_type = r.group(1).strip()</div><div class='add'>+            declaration_name = r.group(2)</div><div class='add'>+            args = r.group(3)</div><div class='add'>+</div><div class='add'>+            if self.entry.identifier != declaration_name:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"expecting prototype for typedef {self.entry.identifier}. Prototype was for typedef {declaration_name} instead\n")</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            self.create_parameter_list(ln, 'function', args, ',', declaration_name)</div><div class='add'>+</div><div class='add'>+            self.output_declaration('function', declaration_name,</div><div class='add'>+                                    typedef=True,</div><div class='add'>+                                    functiontype=return_type,</div><div class='add'>+                                    purpose=self.entry.declaration_purpose)</div><div class='add'>+            return</div><div class='add'>+        #</div><div class='add'>+        # Not a function, try to parse a simple typedef.</div><div class='add'>+        #</div><div class='add'>+        r = KernRe(r'typedef.*\s+(\w+)\s*;')</div><div class='add'>+        if r.match(proto):</div><div class='add'>+            declaration_name = r.group(1)</div><div class='add'>+</div><div class='add'>+            if self.entry.identifier != declaration_name:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"expecting prototype for typedef {self.entry.identifier}. Prototype was for typedef {declaration_name} instead\n")</div><div class='add'>+                return</div><div class='add'>+</div><div class='add'>+            self.output_declaration('typedef', declaration_name,</div><div class='add'>+                                    purpose=self.entry.declaration_purpose)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        self.emit_msg(ln, "error: Cannot parse typedef!")</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def process_export(function_set, line):</div><div class='add'>+        """</div><div class='add'>+        process EXPORT_SYMBOL* tags</div><div class='add'>+</div><div class='add'>+        This method doesn't use any variable from the class, so declare it</div><div class='add'>+        with a staticmethod decorator.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # We support documenting some exported symbols with different</div><div class='add'>+        # names.  A horrible hack.</div><div class='add'>+        suffixes = [ '_noprof' ]</div><div class='add'>+</div><div class='add'>+        # Note: it accepts only one EXPORT_SYMBOL* per line, as having</div><div class='add'>+        # multiple export lines would violate Kernel coding style.</div><div class='add'>+</div><div class='add'>+        if export_symbol.search(line):</div><div class='add'>+            symbol = export_symbol.group(2)</div><div class='add'>+        elif export_symbol_ns.search(line):</div><div class='add'>+            symbol = export_symbol_ns.group(2)</div><div class='add'>+        else:</div><div class='add'>+            return False</div><div class='add'>+        #</div><div class='add'>+        # Found an export, trim out any special suffixes</div><div class='add'>+        #</div><div class='add'>+        for suffix in suffixes:</div><div class='add'>+            # Be backward compatible with Python &lt; 3.9</div><div class='add'>+            if symbol.endswith(suffix):</div><div class='add'>+                symbol = symbol[:-len(suffix)]</div><div class='add'>+        function_set.add(symbol)</div><div class='add'>+        return True</div><div class='add'>+</div><div class='add'>+    def process_normal(self, ln, line):</div><div class='add'>+        """</div><div class='add'>+        STATE_NORMAL: looking for the /** to begin everything.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        if not doc_start.match(line):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # start a new entry</div><div class='add'>+        self.reset_state(ln)</div><div class='add'>+</div><div class='add'>+        # next line is always the function name</div><div class='add'>+        self.state = state.NAME</div><div class='add'>+</div><div class='add'>+    def process_name(self, ln, line):</div><div class='add'>+        """</div><div class='add'>+        STATE_NAME: Looking for the "name - description" line</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # Check for a DOC: block and handle them specially.</div><div class='add'>+        #</div><div class='add'>+        if doc_block.search(line):</div><div class='add'>+</div><div class='add'>+            if not doc_block.group(1):</div><div class='add'>+                self.entry.begin_section(ln, "Introduction")</div><div class='add'>+            else:</div><div class='add'>+                self.entry.begin_section(ln, doc_block.group(1))</div><div class='add'>+</div><div class='add'>+            self.entry.identifier = self.entry.section</div><div class='add'>+            self.state = state.DOCBLOCK</div><div class='add'>+        #</div><div class='add'>+        # Otherwise we're looking for a normal kerneldoc declaration line.</div><div class='add'>+        #</div><div class='add'>+        elif doc_decl.search(line):</div><div class='add'>+            self.entry.identifier = doc_decl.group(1)</div><div class='add'>+</div><div class='add'>+            # Test for data declaration</div><div class='add'>+            if doc_begin_data.search(line):</div><div class='add'>+                self.entry.decl_type = doc_begin_data.group(1)</div><div class='add'>+                self.entry.identifier = doc_begin_data.group(2)</div><div class='add'>+            #</div><div class='add'>+            # Look for a function description</div><div class='add'>+            #</div><div class='add'>+            elif doc_begin_func.search(line):</div><div class='add'>+                self.entry.identifier = doc_begin_func.group(1)</div><div class='add'>+                self.entry.decl_type = "function"</div><div class='add'>+            #</div><div class='add'>+            # We struck out.</div><div class='add'>+            #</div><div class='add'>+            else:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"This comment starts with '/**', but isn't a kernel-doc comment. Refer to Documentation/doc-guide/kernel-doc.rst\n{line}")</div><div class='add'>+                self.state = state.NORMAL</div><div class='add'>+                return</div><div class='add'>+            #</div><div class='add'>+            # OK, set up for a new kerneldoc entry.</div><div class='add'>+            #</div><div class='add'>+            self.state = state.BODY</div><div class='add'>+            self.entry.identifier = self.entry.identifier.strip(" ")</div><div class='add'>+            # if there's no @param blocks need to set up default section here</div><div class='add'>+            self.entry.begin_section(ln + 1)</div><div class='add'>+            #</div><div class='add'>+            # Find the description portion, which *should* be there but</div><div class='add'>+            # isn't always.</div><div class='add'>+            # (We should be able to capture this from the previous parsing - someday)</div><div class='add'>+            #</div><div class='add'>+            r = KernRe("[-:](.*)")</div><div class='add'>+            if r.search(line):</div><div class='add'>+                self.entry.declaration_purpose = trim_whitespace(r.group(1))</div><div class='add'>+                self.state = state.DECLARATION</div><div class='add'>+            else:</div><div class='add'>+                self.entry.declaration_purpose = ""</div><div class='add'>+</div><div class='add'>+            if not self.entry.declaration_purpose and self.config.wshort_desc:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"missing initial short description on line:\n{line}")</div><div class='add'>+</div><div class='add'>+            if not self.entry.identifier and self.entry.decl_type != "enum":</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"wrong kernel-doc identifier on line:\n{line}")</div><div class='add'>+                self.state = state.NORMAL</div><div class='add'>+</div><div class='add'>+            if self.config.verbose:</div><div class='add'>+                self.emit_msg(ln,</div><div class='add'>+                              f"Scanning doc for {self.entry.decl_type} {self.entry.identifier}",</div><div class='add'>+                                  warning=False)</div><div class='add'>+        #</div><div class='add'>+        # Failed to find an identifier. Emit a warning</div><div class='add'>+        #</div><div class='add'>+        else:</div><div class='add'>+            self.emit_msg(ln, f"Cannot find identifier on line:\n{line}")</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Helper function to determine if a new section is being started.</div><div class='add'>+    #</div><div class='add'>+    def is_new_section(self, ln, line):</div><div class='add'>+        if doc_sect.search(line):</div><div class='add'>+            self.state = state.BODY</div><div class='add'>+            #</div><div class='add'>+            # Pick out the name of our new section, tweaking it if need be.</div><div class='add'>+            #</div><div class='add'>+            newsection = doc_sect.group(1)</div><div class='add'>+            if newsection.lower() == 'description':</div><div class='add'>+                newsection = 'Description'</div><div class='add'>+            elif newsection.lower() == 'context':</div><div class='add'>+                newsection = 'Context'</div><div class='add'>+                self.state = state.SPECIAL_SECTION</div><div class='add'>+            elif newsection.lower() in ["@return", "@returns",</div><div class='add'>+                                        "return", "returns"]:</div><div class='add'>+                newsection = "Return"</div><div class='add'>+                self.state = state.SPECIAL_SECTION</div><div class='add'>+            elif newsection[0] == '@':</div><div class='add'>+                self.state = state.SPECIAL_SECTION</div><div class='add'>+            #</div><div class='add'>+            # Initialize the contents, and get the new section going.</div><div class='add'>+            #</div><div class='add'>+            newcontents = doc_sect.group(2)</div><div class='add'>+            if not newcontents:</div><div class='add'>+                newcontents = ""</div><div class='add'>+            self.dump_section()</div><div class='add'>+            self.entry.begin_section(ln, newsection)</div><div class='add'>+            self.entry.leading_space = None</div><div class='add'>+</div><div class='add'>+            self.entry.add_text(newcontents.lstrip())</div><div class='add'>+            return True</div><div class='add'>+        return False</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # Helper function to detect (and effect) the end of a kerneldoc comment.</div><div class='add'>+    #</div><div class='add'>+    def is_comment_end(self, ln, line):</div><div class='add'>+        if doc_end.search(line):</div><div class='add'>+            self.dump_section()</div><div class='add'>+</div><div class='add'>+            # Look for doc_com + &lt;text&gt; + doc_end:</div><div class='add'>+            r = KernRe(r'\s*\*\s*[a-zA-Z_0-9:.]+\*/')</div><div class='add'>+            if r.match(line):</div><div class='add'>+                self.emit_msg(ln, f"suspicious ending line: {line}")</div><div class='add'>+</div><div class='add'>+            self.entry.prototype = ""</div><div class='add'>+            self.entry.new_start_line = ln + 1</div><div class='add'>+</div><div class='add'>+            self.state = state.PROTO</div><div class='add'>+            return True</div><div class='add'>+        return False</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def process_decl(self, ln, line):</div><div class='add'>+        """</div><div class='add'>+        STATE_DECLARATION: We've seen the beginning of a declaration</div><div class='add'>+        """</div><div class='add'>+        if self.is_new_section(ln, line) or self.is_comment_end(ln, line):</div><div class='add'>+            return</div><div class='add'>+        #</div><div class='add'>+        # Look for anything with the " * " line beginning.</div><div class='add'>+        #</div><div class='add'>+        if doc_content.search(line):</div><div class='add'>+            cont = doc_content.group(1)</div><div class='add'>+            #</div><div class='add'>+            # A blank line means that we have moved out of the declaration</div><div class='add'>+            # part of the comment (without any "special section" parameter</div><div class='add'>+            # descriptions).</div><div class='add'>+            #</div><div class='add'>+            if cont == "":</div><div class='add'>+                self.state = state.BODY</div><div class='add'>+            #</div><div class='add'>+            # Otherwise we have more of the declaration section to soak up.</div><div class='add'>+            #</div><div class='add'>+            else:</div><div class='add'>+                self.entry.declaration_purpose = \</div><div class='add'>+                    trim_whitespace(self.entry.declaration_purpose + ' ' + cont)</div><div class='add'>+        else:</div><div class='add'>+            # Unknown line, ignore</div><div class='add'>+            self.emit_msg(ln, f"bad line: {line}")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    def process_special(self, ln, line):</div><div class='add'>+        """</div><div class='add'>+        STATE_SPECIAL_SECTION: a section ending with a blank line</div><div class='add'>+        """</div><div class='add'>+        #</div><div class='add'>+        # If we have hit a blank line (only the " * " marker), then this</div><div class='add'>+        # section is done.</div><div class='add'>+        #</div><div class='add'>+        if KernRe(r"\s*\*\s*$").match(line):</div><div class='add'>+            self.entry.begin_section(ln, dump = True)</div><div class='add'>+            self.state = state.BODY</div><div class='add'>+            return</div><div class='add'>+        #</div><div class='add'>+        # Not a blank line, look for the other ways to end the section.</div><div class='add'>+        #</div><div class='add'>+        if self.is_new_section(ln, line) or self.is_comment_end(ln, line):</div><div class='add'>+            return</div><div class='add'>+        #</div><div class='add'>+        # OK, we should have a continuation of the text for this section.</div><div class='add'>+        #</div><div class='add'>+        if doc_content.search(line):</div><div class='add'>+            cont = doc_content.group(1)</div><div class='add'>+            #</div><div class='add'>+            # If the lines of text after the first in a special section have</div><div class='add'>+            # leading white space, we need to trim it out or Sphinx will get</div><div class='add'>+            # confused.  For the second line (the None case), see what we</div><div class='add'>+            # find there and remember it.</div><div class='add'>+            #</div><div class='add'>+            if self.entry.leading_space is None:</div><div class='add'>+                r = KernRe(r'^(\s+)')</div><div class='add'>+                if r.match(cont):</div><div class='add'>+                    self.entry.leading_space = len(r.group(1))</div><div class='add'>+                else:</div><div class='add'>+                    self.entry.leading_space = 0</div><div class='add'>+            #</div><div class='add'>+            # Otherwise, before trimming any leading chars, be *sure*</div><div class='add'>+            # that they are white space.  We should maybe warn if this</div><div class='add'>+            # isn't the case.</div><div class='add'>+            #</div><div class='add'>+            for i in range(0, self.entry.leading_space):</div><div class='add'>+                if cont[i] != " ":</div><div class='add'>+                    self.entry.leading_space = i</div><div class='add'>+                    break</div><div class='add'>+            #</div><div class='add'>+            # Add the trimmed result to the section and we're done.</div><div class='add'>+            #</div><div class='add'>+            self.entry.add_text(cont[self.entry.leading_space:])</div><div class='add'>+        else:</div><div class='add'>+            # Unknown line, ignore</div><div class='add'>+            self.emit_msg(ln, f"bad line: {line}")</div><div class='add'>+</div><div class='add'>+    def process_body(self, ln, line):</div><div class='add'>+        """</div><div class='add'>+        STATE_BODY: the bulk of a kerneldoc comment.</div><div class='add'>+        """</div><div class='add'>+        if self.is_new_section(ln, line) or self.is_comment_end(ln, line):</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if doc_content.search(line):</div><div class='add'>+            cont = doc_content.group(1)</div><div class='add'>+            self.entry.add_text(cont)</div><div class='add'>+        else:</div><div class='add'>+            # Unknown line, ignore</div><div class='add'>+            self.emit_msg(ln, f"bad line: {line}")</div><div class='add'>+</div><div class='add'>+    def process_inline_name(self, ln, line):</div><div class='add'>+        """STATE_INLINE_NAME: beginning of docbook comments within a prototype."""</div><div class='add'>+</div><div class='add'>+        if doc_inline_sect.search(line):</div><div class='add'>+            self.entry.begin_section(ln, doc_inline_sect.group(1))</div><div class='add'>+            self.entry.add_text(doc_inline_sect.group(2).lstrip())</div><div class='add'>+            self.state = state.INLINE_TEXT</div><div class='add'>+        elif doc_inline_end.search(line):</div><div class='add'>+            self.dump_section()</div><div class='add'>+            self.state = state.PROTO</div><div class='add'>+        elif doc_content.search(line):</div><div class='add'>+            self.emit_msg(ln, f"Incorrect use of kernel-doc format: {line}")</div><div class='add'>+            self.state = state.PROTO</div><div class='add'>+        # else ... ??</div><div class='add'>+</div><div class='add'>+    def process_inline_text(self, ln, line):</div><div class='add'>+        """STATE_INLINE_TEXT: docbook comments within a prototype."""</div><div class='add'>+</div><div class='add'>+        if doc_inline_end.search(line):</div><div class='add'>+            self.dump_section()</div><div class='add'>+            self.state = state.PROTO</div><div class='add'>+        elif doc_content.search(line):</div><div class='add'>+            self.entry.add_text(doc_content.group(1))</div><div class='add'>+        # else ... ??</div><div class='add'>+</div><div class='add'>+    def syscall_munge(self, ln, proto):         # pylint: disable=W0613</div><div class='add'>+        """</div><div class='add'>+        Handle syscall definitions</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        is_void = False</div><div class='add'>+</div><div class='add'>+        # Strip newlines/CR's</div><div class='add'>+        proto = re.sub(r'[\r\n]+', ' ', proto)</div><div class='add'>+</div><div class='add'>+        # Check if it's a SYSCALL_DEFINE0</div><div class='add'>+        if 'SYSCALL_DEFINE0' in proto:</div><div class='add'>+            is_void = True</div><div class='add'>+</div><div class='add'>+        # Replace SYSCALL_DEFINE with correct return type &amp; function name</div><div class='add'>+        proto = KernRe(r'SYSCALL_DEFINE.*\(').sub('long sys_', proto)</div><div class='add'>+</div><div class='add'>+        r = KernRe(r'long\s+(sys_.*?),')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            proto = KernRe(',').sub('(', proto, count=1)</div><div class='add'>+        elif is_void:</div><div class='add'>+            proto = KernRe(r'\)').sub('(void)', proto, count=1)</div><div class='add'>+</div><div class='add'>+        # Now delete all of the odd-numbered commas in the proto</div><div class='add'>+        # so that argument types &amp; names don't have a comma between them</div><div class='add'>+        count = 0</div><div class='add'>+        length = len(proto)</div><div class='add'>+</div><div class='add'>+        if is_void:</div><div class='add'>+            length = 0  # skip the loop if is_void</div><div class='add'>+</div><div class='add'>+        for ix in range(length):</div><div class='add'>+            if proto[ix] == ',':</div><div class='add'>+                count += 1</div><div class='add'>+                if count % 2 == 1:</div><div class='add'>+                    proto = proto[:ix] + ' ' + proto[ix + 1:]</div><div class='add'>+</div><div class='add'>+        return proto</div><div class='add'>+</div><div class='add'>+    def tracepoint_munge(self, ln, proto):</div><div class='add'>+        """</div><div class='add'>+        Handle tracepoint definitions</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        tracepointname = None</div><div class='add'>+        tracepointargs = None</div><div class='add'>+</div><div class='add'>+        # Match tracepoint name based on different patterns</div><div class='add'>+        r = KernRe(r'TRACE_EVENT\((.*?),')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            tracepointname = r.group(1)</div><div class='add'>+</div><div class='add'>+        r = KernRe(r'DEFINE_SINGLE_EVENT\((.*?),')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            tracepointname = r.group(1)</div><div class='add'>+</div><div class='add'>+        r = KernRe(r'DEFINE_EVENT\((.*?),(.*?),')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            tracepointname = r.group(2)</div><div class='add'>+</div><div class='add'>+        if tracepointname:</div><div class='add'>+            tracepointname = tracepointname.lstrip()</div><div class='add'>+</div><div class='add'>+        r = KernRe(r'TP_PROTO\((.*?)\)')</div><div class='add'>+        if r.search(proto):</div><div class='add'>+            tracepointargs = r.group(1)</div><div class='add'>+</div><div class='add'>+        if not tracepointname or not tracepointargs:</div><div class='add'>+            self.emit_msg(ln,</div><div class='add'>+                          f"Unrecognized tracepoint format:\n{proto}\n")</div><div class='add'>+        else:</div><div class='add'>+            proto = f"static inline void trace_{tracepointname}({tracepointargs})"</div><div class='add'>+            self.entry.identifier = f"trace_{self.entry.identifier}"</div><div class='add'>+</div><div class='add'>+        return proto</div><div class='add'>+</div><div class='add'>+    def process_proto_function(self, ln, line):</div><div class='add'>+        """Ancillary routine to process a function prototype"""</div><div class='add'>+</div><div class='add'>+        # strip C99-style comments to end of line</div><div class='add'>+        line = KernRe(r"//.*$", re.S).sub('', line)</div><div class='add'>+        #</div><div class='add'>+        # Soak up the line's worth of prototype text, stopping at { or ; if present.</div><div class='add'>+        #</div><div class='add'>+        if KernRe(r'\s*#\s*define').match(line):</div><div class='add'>+            self.entry.prototype = line</div><div class='add'>+        elif not line.startswith('#'):   # skip other preprocessor stuff</div><div class='add'>+            r = KernRe(r'([^\{]*)')</div><div class='add'>+            if r.match(line):</div><div class='add'>+                self.entry.prototype += r.group(1) + " "</div><div class='add'>+        #</div><div class='add'>+        # If we now have the whole prototype, clean it up and declare victory.</div><div class='add'>+        #</div><div class='add'>+        if '{' in line or ';' in line or KernRe(r'\s*#\s*define').match(line):</div><div class='add'>+            # strip comments and surrounding spaces</div><div class='add'>+            self.entry.prototype = KernRe(r'/\*.*\*/').sub('', self.entry.prototype).strip()</div><div class='add'>+            #</div><div class='add'>+            # Handle self.entry.prototypes for function pointers like:</div><div class='add'>+            #       int (*pcs_config)(struct foo)</div><div class='add'>+            # by turning it into</div><div class='add'>+            #	    int pcs_config(struct foo)</div><div class='add'>+            #</div><div class='add'>+            r = KernRe(r'^(\S+\s+)\(\s*\*(\S+)\)')</div><div class='add'>+            self.entry.prototype = r.sub(r'\1\2', self.entry.prototype)</div><div class='add'>+            #</div><div class='add'>+            # Handle special declaration syntaxes</div><div class='add'>+            #</div><div class='add'>+            if 'SYSCALL_DEFINE' in self.entry.prototype:</div><div class='add'>+                self.entry.prototype = self.syscall_munge(ln,</div><div class='add'>+                                                          self.entry.prototype)</div><div class='add'>+            else:</div><div class='add'>+                r = KernRe(r'TRACE_EVENT|DEFINE_EVENT|DEFINE_SINGLE_EVENT')</div><div class='add'>+                if r.search(self.entry.prototype):</div><div class='add'>+                    self.entry.prototype = self.tracepoint_munge(ln,</div><div class='add'>+                                                                 self.entry.prototype)</div><div class='add'>+            #</div><div class='add'>+            # ... and we're done</div><div class='add'>+            #</div><div class='add'>+            self.dump_function(ln, self.entry.prototype)</div><div class='add'>+            self.reset_state(ln)</div><div class='add'>+</div><div class='add'>+    def process_proto_type(self, ln, line):</div><div class='add'>+        """Ancillary routine to process a type"""</div><div class='add'>+</div><div class='add'>+        # Strip C99-style comments and surrounding whitespace</div><div class='add'>+        line = KernRe(r"//.*$", re.S).sub('', line).strip()</div><div class='add'>+        if not line:</div><div class='add'>+            return # nothing to see here</div><div class='add'>+</div><div class='add'>+        # To distinguish preprocessor directive from regular declaration later.</div><div class='add'>+        if line.startswith('#'):</div><div class='add'>+            line += ";"</div><div class='add'>+        #</div><div class='add'>+        # Split the declaration on any of { } or ;, and accumulate pieces</div><div class='add'>+        # until we hit a semicolon while not inside {brackets}</div><div class='add'>+        #</div><div class='add'>+        r = KernRe(r'(.*?)([{};])')</div><div class='add'>+        for chunk in r.split(line):</div><div class='add'>+            if chunk:  # Ignore empty matches</div><div class='add'>+                self.entry.prototype += chunk</div><div class='add'>+                #</div><div class='add'>+                # This cries out for a match statement ... someday after we can</div><div class='add'>+                # drop Python 3.9 ...</div><div class='add'>+                #</div><div class='add'>+                if chunk == '{':</div><div class='add'>+                    self.entry.brcount += 1</div><div class='add'>+                elif chunk == '}':</div><div class='add'>+                    self.entry.brcount -= 1</div><div class='add'>+                elif chunk == ';' and self.entry.brcount &lt;= 0:</div><div class='add'>+                    self.dump_declaration(ln, self.entry.prototype)</div><div class='add'>+                    self.reset_state(ln)</div><div class='add'>+                    return</div><div class='add'>+        #</div><div class='add'>+        # We hit the end of the line while still in the declaration; put</div><div class='add'>+        # in a space to represent the newline.</div><div class='add'>+        #</div><div class='add'>+        self.entry.prototype += ' '</div><div class='add'>+</div><div class='add'>+    def process_proto(self, ln, line):</div><div class='add'>+        """STATE_PROTO: reading a function/whatever prototype."""</div><div class='add'>+</div><div class='add'>+        if doc_inline_oneline.search(line):</div><div class='add'>+            self.entry.begin_section(ln, doc_inline_oneline.group(1))</div><div class='add'>+            self.entry.add_text(doc_inline_oneline.group(2))</div><div class='add'>+            self.dump_section()</div><div class='add'>+</div><div class='add'>+        elif doc_inline_start.search(line):</div><div class='add'>+            self.state = state.INLINE_NAME</div><div class='add'>+</div><div class='add'>+        elif self.entry.decl_type == 'function':</div><div class='add'>+            self.process_proto_function(ln, line)</div><div class='add'>+</div><div class='add'>+        else:</div><div class='add'>+            self.process_proto_type(ln, line)</div><div class='add'>+</div><div class='add'>+    def process_docblock(self, ln, line):</div><div class='add'>+        """STATE_DOCBLOCK: within a DOC: block."""</div><div class='add'>+</div><div class='add'>+        if doc_end.search(line):</div><div class='add'>+            self.dump_section()</div><div class='add'>+            self.output_declaration("doc", self.entry.identifier)</div><div class='add'>+            self.reset_state(ln)</div><div class='add'>+</div><div class='add'>+        elif doc_content.search(line):</div><div class='add'>+            self.entry.add_text(doc_content.group(1))</div><div class='add'>+</div><div class='add'>+    def parse_export(self):</div><div class='add'>+        """</div><div class='add'>+        Parses EXPORT_SYMBOL* macros from a single Kernel source file.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        export_table = set()</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            with open(self.fname, "r", encoding="utf8",</div><div class='add'>+                      errors="backslashreplace") as fp:</div><div class='add'>+</div><div class='add'>+                for line in fp:</div><div class='add'>+                    self.process_export(export_table, line)</div><div class='add'>+</div><div class='add'>+        except IOError:</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        return export_table</div><div class='add'>+</div><div class='add'>+    #</div><div class='add'>+    # The state/action table telling us which function to invoke in</div><div class='add'>+    # each state.</div><div class='add'>+    #</div><div class='add'>+    state_actions = {</div><div class='add'>+        state.NORMAL:			process_normal,</div><div class='add'>+        state.NAME:			process_name,</div><div class='add'>+        state.BODY:			process_body,</div><div class='add'>+        state.DECLARATION:		process_decl,</div><div class='add'>+        state.SPECIAL_SECTION:		process_special,</div><div class='add'>+        state.INLINE_NAME:		process_inline_name,</div><div class='add'>+        state.INLINE_TEXT:		process_inline_text,</div><div class='add'>+        state.PROTO:			process_proto,</div><div class='add'>+        state.DOCBLOCK:			process_docblock,</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+    def parse_kdoc(self):</div><div class='add'>+        """</div><div class='add'>+        Open and process each line of a C source file.</div><div class='add'>+        The parsing is controlled via a state machine, and the line is passed</div><div class='add'>+        to a different process function depending on the state. The process</div><div class='add'>+        function may update the state as needed.</div><div class='add'>+</div><div class='add'>+        Besides parsing kernel-doc tags, it also parses export symbols.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        prev = ""</div><div class='add'>+        prev_ln = None</div><div class='add'>+        export_table = set()</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            with open(self.fname, "r", encoding="utf8",</div><div class='add'>+                      errors="backslashreplace") as fp:</div><div class='add'>+                for ln, line in enumerate(fp):</div><div class='add'>+</div><div class='add'>+                    line = line.expandtabs().strip("\n")</div><div class='add'>+</div><div class='add'>+                    # Group continuation lines on prototypes</div><div class='add'>+                    if self.state == state.PROTO:</div><div class='add'>+                        if line.endswith("\\"):</div><div class='add'>+                            prev += line.rstrip("\\")</div><div class='add'>+                            if not prev_ln:</div><div class='add'>+                                prev_ln = ln</div><div class='add'>+                            continue</div><div class='add'>+</div><div class='add'>+                        if prev:</div><div class='add'>+                            ln = prev_ln</div><div class='add'>+                            line = prev + line</div><div class='add'>+                            prev = ""</div><div class='add'>+                            prev_ln = None</div><div class='add'>+</div><div class='add'>+                    self.config.log.debug("%d %s: %s",</div><div class='add'>+                                          ln, state.name[self.state],</div><div class='add'>+                                          line)</div><div class='add'>+</div><div class='add'>+                    # This is an optimization over the original script.</div><div class='add'>+                    # There, when export_file was used for the same file,</div><div class='add'>+                    # it was read twice. Here, we use the already-existing</div><div class='add'>+                    # loop to parse exported symbols as well.</div><div class='add'>+                    #</div><div class='add'>+                    if (self.state != state.NORMAL) or \</div><div class='add'>+                       not self.process_export(export_table, line):</div><div class='add'>+                        # Hand this line to the appropriate state handler</div><div class='add'>+                        self.state_actions[self.state](self, ln, line)</div><div class='add'>+</div><div class='add'>+        except OSError:</div><div class='add'>+            self.config.log.error(f"Error: Cannot open file {self.fname}")</div><div class='add'>+</div><div class='add'>+        return export_table, self.entries</div><div class='head'>diff --git a/tools/lib/python/kdoc/kdoc_re.py b/tools/lib/python/kdoc/kdoc_re.py<br/>new file mode 100644<br/>index 000000000000..2dfa1bf83d64<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/kdoc_re.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/kdoc_re.py</a></div><div class='hunk'>@@ -0,0 +1,270 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2025: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Regular expression ancillary classes.</div><div class='add'>+</div><div class='add'>+Those help caching regular expressions and do matching for kernel-doc.</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import re</div><div class='add'>+</div><div class='add'>+# Local cache for regular expressions</div><div class='add'>+re_cache = {}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class KernRe:</div><div class='add'>+    """</div><div class='add'>+    Helper class to simplify regex declaration and usage.</div><div class='add'>+</div><div class='add'>+    It calls re.compile for a given pattern. It also allows adding</div><div class='add'>+    regular expressions and define sub at class init time.</div><div class='add'>+</div><div class='add'>+    Regular expressions can be cached via an argument, helping to speedup</div><div class='add'>+    searches.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def _add_regex(self, string, flags):</div><div class='add'>+        """</div><div class='add'>+        Adds a new regex or reuses it from the cache.</div><div class='add'>+        """</div><div class='add'>+        self.regex = re_cache.get(string, None)</div><div class='add'>+        if not self.regex:</div><div class='add'>+            self.regex = re.compile(string, flags=flags)</div><div class='add'>+            if self.cache:</div><div class='add'>+                re_cache[string] = self.regex</div><div class='add'>+</div><div class='add'>+    def __init__(self, string, cache=True, flags=0):</div><div class='add'>+        """</div><div class='add'>+        Compile a regular expression and initialize internal vars.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.cache = cache</div><div class='add'>+        self.last_match = None</div><div class='add'>+</div><div class='add'>+        self._add_regex(string, flags)</div><div class='add'>+</div><div class='add'>+    def __str__(self):</div><div class='add'>+        """</div><div class='add'>+        Return the regular expression pattern.</div><div class='add'>+        """</div><div class='add'>+        return self.regex.pattern</div><div class='add'>+</div><div class='add'>+    def __add__(self, other):</div><div class='add'>+        """</div><div class='add'>+        Allows adding two regular expressions into one.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        return KernRe(str(self) + str(other), cache=self.cache or other.cache,</div><div class='add'>+                  flags=self.regex.flags | other.regex.flags)</div><div class='add'>+</div><div class='add'>+    def match(self, string):</div><div class='add'>+        """</div><div class='add'>+        Handles a re.match storing its results</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.last_match = self.regex.match(string)</div><div class='add'>+        return self.last_match</div><div class='add'>+</div><div class='add'>+    def search(self, string):</div><div class='add'>+        """</div><div class='add'>+        Handles a re.search storing its results</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        self.last_match = self.regex.search(string)</div><div class='add'>+        return self.last_match</div><div class='add'>+</div><div class='add'>+    def findall(self, string):</div><div class='add'>+        """</div><div class='add'>+        Alias to re.findall</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        return self.regex.findall(string)</div><div class='add'>+</div><div class='add'>+    def split(self, string):</div><div class='add'>+        """</div><div class='add'>+        Alias to re.split</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        return self.regex.split(string)</div><div class='add'>+</div><div class='add'>+    def sub(self, sub, string, count=0):</div><div class='add'>+        """</div><div class='add'>+        Alias to re.sub</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        return self.regex.sub(sub, string, count=count)</div><div class='add'>+</div><div class='add'>+    def group(self, num):</div><div class='add'>+        """</div><div class='add'>+        Returns the group results of the last match</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        return self.last_match.group(num)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class NestedMatch:</div><div class='add'>+    """</div><div class='add'>+    Finding nested delimiters is hard with regular expressions. It is</div><div class='add'>+    even harder on Python with its normal re module, as there are several</div><div class='add'>+    advanced regular expressions that are missing.</div><div class='add'>+</div><div class='add'>+    This is the case of this pattern:</div><div class='add'>+</div><div class='add'>+            '\\bSTRUCT_GROUP(\\(((?:(?&gt;[^)(]+)|(?1))*)\\))[^;]*;'</div><div class='add'>+</div><div class='add'>+    which is used to properly match open/close parentheses of the</div><div class='add'>+    string search STRUCT_GROUP(),</div><div class='add'>+</div><div class='add'>+    Add a class that counts pairs of delimiters, using it to match and</div><div class='add'>+    replace nested expressions.</div><div class='add'>+</div><div class='add'>+    The original approach was suggested by:</div><div class='add'>+        https://stackoverflow.com/questions/5454322/python-how-to-match-nested-parentheses-with-regex</div><div class='add'>+</div><div class='add'>+    Although I re-implemented it to make it more generic and match 3 types</div><div class='add'>+    of delimiters. The logic checks if delimiters are paired. If not, it</div><div class='add'>+    will ignore the search string.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # TODO: make NestedMatch handle multiple match groups</div><div class='add'>+    #</div><div class='add'>+    # Right now, regular expressions to match it are defined only up to</div><div class='add'>+    #       the start delimiter, e.g.:</div><div class='add'>+    #</div><div class='add'>+    #       \bSTRUCT_GROUP\(</div><div class='add'>+    #</div><div class='add'>+    # is similar to: STRUCT_GROUP\((.*)\)</div><div class='add'>+    # except that the content inside the match group is delimiter-aligned.</div><div class='add'>+    #</div><div class='add'>+    # The content inside parentheses is converted into a single replace</div><div class='add'>+    # group (e.g. r`\1').</div><div class='add'>+    #</div><div class='add'>+    # It would be nice to change such definition to support multiple</div><div class='add'>+    # match groups, allowing a regex equivalent to:</div><div class='add'>+    #</div><div class='add'>+    #   FOO\((.*), (.*), (.*)\)</div><div class='add'>+    #</div><div class='add'>+    # it is probably easier to define it not as a regular expression, but</div><div class='add'>+    # with some lexical definition like:</div><div class='add'>+    #</div><div class='add'>+    #   FOO(arg1, arg2, arg3)</div><div class='add'>+</div><div class='add'>+    DELIMITER_PAIRS = {</div><div class='add'>+        '{': '}',</div><div class='add'>+        '(': ')',</div><div class='add'>+        '[': ']',</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    RE_DELIM = re.compile(r'[\{\}\[\]\(\)]')</div><div class='add'>+</div><div class='add'>+    def _search(self, regex, line):</div><div class='add'>+        """</div><div class='add'>+        Finds paired blocks for a regex that ends with a delimiter.</div><div class='add'>+</div><div class='add'>+        The suggestion of using finditer to match pairs came from:</div><div class='add'>+        https://stackoverflow.com/questions/5454322/python-how-to-match-nested-parentheses-with-regex</div><div class='add'>+        but I ended using a different implementation to align all three types</div><div class='add'>+        of delimiters and seek for an initial regular expression.</div><div class='add'>+</div><div class='add'>+        The algorithm seeks for open/close paired delimiters and places them</div><div class='add'>+        into a stack, yielding a start/stop position of each match when the</div><div class='add'>+        stack is zeroed.</div><div class='add'>+</div><div class='add'>+        The algorithm should work fine for properly paired lines, but will</div><div class='add'>+        silently ignore end delimiters that precede a start delimiter.</div><div class='add'>+        This should be OK for kernel-doc parser, as unaligned delimiters</div><div class='add'>+        would cause compilation errors. So, we don't need to raise exceptions</div><div class='add'>+        to cover such issues.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        stack = []</div><div class='add'>+</div><div class='add'>+        for match_re in regex.finditer(line):</div><div class='add'>+            start = match_re.start()</div><div class='add'>+            offset = match_re.end()</div><div class='add'>+</div><div class='add'>+            d = line[offset - 1]</div><div class='add'>+            if d not in self.DELIMITER_PAIRS:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            end = self.DELIMITER_PAIRS[d]</div><div class='add'>+            stack.append(end)</div><div class='add'>+</div><div class='add'>+            for match in self.RE_DELIM.finditer(line[offset:]):</div><div class='add'>+                pos = match.start() + offset</div><div class='add'>+</div><div class='add'>+                d = line[pos]</div><div class='add'>+</div><div class='add'>+                if d in self.DELIMITER_PAIRS:</div><div class='add'>+                    end = self.DELIMITER_PAIRS[d]</div><div class='add'>+</div><div class='add'>+                    stack.append(end)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                # Does the end delimiter match what is expected?</div><div class='add'>+                if stack and d == stack[-1]:</div><div class='add'>+                    stack.pop()</div><div class='add'>+</div><div class='add'>+                    if not stack:</div><div class='add'>+                        yield start, offset, pos + 1</div><div class='add'>+                        break</div><div class='add'>+</div><div class='add'>+    def search(self, regex, line):</div><div class='add'>+        """</div><div class='add'>+        This is similar to re.search:</div><div class='add'>+</div><div class='add'>+        It matches a regex that it is followed by a delimiter,</div><div class='add'>+        returning occurrences only if all delimiters are paired.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        for t in self._search(regex, line):</div><div class='add'>+</div><div class='add'>+            yield line[t[0]:t[2]]</div><div class='add'>+</div><div class='add'>+    def sub(self, regex, sub, line, count=0):</div><div class='add'>+        """</div><div class='add'>+        This is similar to re.sub:</div><div class='add'>+</div><div class='add'>+        It matches a regex that it is followed by a delimiter,</div><div class='add'>+        replacing occurrences only if all delimiters are paired.</div><div class='add'>+</div><div class='add'>+        if r'\1' is used, it works just like re: it places there the</div><div class='add'>+        matched paired data with the delimiter stripped.</div><div class='add'>+</div><div class='add'>+        If count is different than zero, it will replace at most count</div><div class='add'>+        items.</div><div class='add'>+        """</div><div class='add'>+        out = ""</div><div class='add'>+</div><div class='add'>+        cur_pos = 0</div><div class='add'>+        n = 0</div><div class='add'>+</div><div class='add'>+        for start, end, pos in self._search(regex, line):</div><div class='add'>+            out += line[cur_pos:start]</div><div class='add'>+</div><div class='add'>+            # Value, ignoring start/end delimiters</div><div class='add'>+            value = line[end:pos - 1]</div><div class='add'>+</div><div class='add'>+            # replaces \1 at the sub string, if \1 is used there</div><div class='add'>+            new_sub = sub</div><div class='add'>+            new_sub = new_sub.replace(r'\1', value)</div><div class='add'>+</div><div class='add'>+            out += new_sub</div><div class='add'>+</div><div class='add'>+            # Drop end ';' if any</div><div class='add'>+            if line[pos] == ';':</div><div class='add'>+                pos += 1</div><div class='add'>+</div><div class='add'>+            cur_pos = pos</div><div class='add'>+            n += 1</div><div class='add'>+</div><div class='add'>+            if count and count &gt;= n:</div><div class='add'>+                break</div><div class='add'>+</div><div class='add'>+        # Append the remaining string</div><div class='add'>+        l = len(line)</div><div class='add'>+        out += line[cur_pos:l]</div><div class='add'>+</div><div class='add'>+        return out</div><div class='head'>diff --git a/tools/lib/python/kdoc/latex_fonts.py b/tools/lib/python/kdoc/latex_fonts.py<br/>new file mode 100755<br/>index 000000000000..29317f8006ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/latex_fonts.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/latex_fonts.py</a></div><div class='hunk'>@@ -0,0 +1,167 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+# Copyright (C) Akira Yokosawa, 2024</div><div class='add'>+#</div><div class='add'>+# Ported to Python by (c) Mauro Carvalho Chehab, 2025</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Detect problematic Noto CJK variable fonts.</div><div class='add'>+</div><div class='add'>+For "make pdfdocs", reports of build errors of translations.pdf started</div><div class='add'>+arriving early 2024 [1, 2].  It turned out that Fedora and openSUSE</div><div class='add'>+tumbleweed have started deploying variable-font [3] format of "Noto CJK"</div><div class='add'>+fonts [4, 5].  For PDF, a LaTeX package named xeCJK is used for CJK</div><div class='add'>+(Chinese, Japanese, Korean) pages.  xeCJK requires XeLaTeX/XeTeX, which</div><div class='add'>+does not (and likely never will) understand variable fonts for historical</div><div class='add'>+reasons.</div><div class='add'>+</div><div class='add'>+The build error happens even when both of variable- and non-variable-format</div><div class='add'>+fonts are found on the build system.  To make matters worse, Fedora enlists</div><div class='add'>+variable "Noto CJK" fonts in the requirements of langpacks-ja, -ko, -zh_CN,</div><div class='add'>+-zh_TW, etc.  Hence developers who have interest in CJK pages are more</div><div class='add'>+likely to encounter the build errors.</div><div class='add'>+</div><div class='add'>+This script is invoked from the error path of "make pdfdocs" and emits</div><div class='add'>+suggestions if variable-font files of "Noto CJK" fonts are in the list of</div><div class='add'>+fonts accessible from XeTeX.</div><div class='add'>+</div><div class='add'>+References:</div><div class='add'>+[1]: https://lore.kernel.org/r/8734tqsrt7.fsf@meer.lwn.net/</div><div class='add'>+[2]: https://lore.kernel.org/r/1708585803.600323099@f111.i.mail.ru/</div><div class='add'>+[3]: https://en.wikipedia.org/wiki/Variable_font</div><div class='add'>+[4]: https://fedoraproject.org/wiki/Changes/Noto_CJK_Variable_Fonts</div><div class='add'>+[5]: https://build.opensuse.org/request/show/1157217</div><div class='add'>+</div><div class='add'>+#===========================================================================</div><div class='add'>+Workarounds for building translations.pdf</div><div class='add'>+#===========================================================================</div><div class='add'>+</div><div class='add'>+* Denylist "variable font" Noto CJK fonts.</div><div class='add'>+  - Create $HOME/deny-vf/fontconfig/fonts.conf from template below, with</div><div class='add'>+    tweaks if necessary.  Remove leading "".</div><div class='add'>+  - Path of fontconfig/fonts.conf can be overridden by setting an env</div><div class='add'>+    variable FONTS_CONF_DENY_VF.</div><div class='add'>+</div><div class='add'>+    * Template:</div><div class='add'>+-----------------------------------------------------------------</div><div class='add'>+&lt;?xml version="1.0"?&gt;</div><div class='add'>+&lt;!DOCTYPE fontconfig SYSTEM "urn:fontconfig:fonts.dtd"&gt;</div><div class='add'>+&lt;fontconfig&gt;</div><div class='add'>+&lt;!--</div><div class='add'>+  Ignore variable-font glob (not to break xetex)</div><div class='add'>+--&gt;</div><div class='add'>+    &lt;selectfont&gt;</div><div class='add'>+        &lt;rejectfont&gt;</div><div class='add'>+            &lt;!--</div><div class='add'>+                for Fedora</div><div class='add'>+            --&gt;</div><div class='add'>+            &lt;glob&gt;/usr/share/fonts/google-noto-*-cjk-vf-fonts&lt;/glob&gt;</div><div class='add'>+            &lt;!--</div><div class='add'>+                for openSUSE tumbleweed</div><div class='add'>+            --&gt;</div><div class='add'>+            &lt;glob&gt;/usr/share/fonts/truetype/Noto*CJK*-VF.otf&lt;/glob&gt;</div><div class='add'>+        &lt;/rejectfont&gt;</div><div class='add'>+    &lt;/selectfont&gt;</div><div class='add'>+&lt;/fontconfig&gt;</div><div class='add'>+-----------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+    The denylisting is activated for "make pdfdocs".</div><div class='add'>+</div><div class='add'>+* For skipping CJK pages in PDF</div><div class='add'>+  - Uninstall texlive-xecjk.</div><div class='add'>+    Denylisting is not needed in this case.</div><div class='add'>+</div><div class='add'>+* For printing CJK pages in PDF</div><div class='add'>+  - Need non-variable "Noto CJK" fonts.</div><div class='add'>+    * Fedora</div><div class='add'>+      - google-noto-sans-cjk-fonts</div><div class='add'>+      - google-noto-serif-cjk-fonts</div><div class='add'>+    * openSUSE tumbleweed</div><div class='add'>+      - Non-variable "Noto CJK" fonts are not available as distro packages</div><div class='add'>+        as of April, 2024.  Fetch a set of font files from upstream Noto</div><div class='add'>+        CJK Font released at:</div><div class='add'>+          https://github.com/notofonts/noto-cjk/tree/main/Sans#super-otc</div><div class='add'>+        and at:</div><div class='add'>+          https://github.com/notofonts/noto-cjk/tree/main/Serif#super-otc</div><div class='add'>+        , then uncompress and deploy them.</div><div class='add'>+      - Remember to update fontconfig cache by running fc-cache.</div><div class='add'>+</div><div class='add'>+!!! Caution !!!</div><div class='add'>+    Uninstalling "variable font" packages can be dangerous.</div><div class='add'>+    They might be depended upon by other packages important for your work.</div><div class='add'>+    Denylisting should be less invasive, as it is effective only while</div><div class='add'>+    XeLaTeX runs in "make pdfdocs".</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import subprocess</div><div class='add'>+import textwrap</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+class LatexFontChecker:</div><div class='add'>+    """</div><div class='add'>+    Detect problems with CJK variable fonts that affect PDF builds for</div><div class='add'>+    translations.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, deny_vf=None):</div><div class='add'>+        if not deny_vf:</div><div class='add'>+            deny_vf = os.environ.get('FONTS_CONF_DENY_VF', "~/deny-vf")</div><div class='add'>+</div><div class='add'>+        self.environ = os.environ.copy()</div><div class='add'>+        self.environ['XDG_CONFIG_HOME'] = os.path.expanduser(deny_vf)</div><div class='add'>+</div><div class='add'>+        self.re_cjk = re.compile(r"([^:]+):\s*Noto\s+(Sans|Sans Mono|Serif) CJK")</div><div class='add'>+</div><div class='add'>+    def description(self):</div><div class='add'>+        return __doc__</div><div class='add'>+</div><div class='add'>+    def get_noto_cjk_vf_fonts(self):</div><div class='add'>+        """Get Noto CJK fonts"""</div><div class='add'>+</div><div class='add'>+        cjk_fonts = set()</div><div class='add'>+        cmd = ["fc-list", ":", "file", "family", "variable"]</div><div class='add'>+        try:</div><div class='add'>+            result = subprocess.run(cmd,stdout=subprocess.PIPE,</div><div class='add'>+                                    stderr=subprocess.PIPE,</div><div class='add'>+                                    universal_newlines=True,</div><div class='add'>+                                    env=self.environ,</div><div class='add'>+                                    check=True)</div><div class='add'>+</div><div class='add'>+        except subprocess.CalledProcessError as exc:</div><div class='add'>+            sys.exit(f"Error running fc-list: {repr(exc)}")</div><div class='add'>+</div><div class='add'>+        for line in result.stdout.splitlines():</div><div class='add'>+            if 'variable=True' not in line:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            match = self.re_cjk.search(line)</div><div class='add'>+            if match:</div><div class='add'>+                cjk_fonts.add(match.group(1))</div><div class='add'>+</div><div class='add'>+        return sorted(cjk_fonts)</div><div class='add'>+</div><div class='add'>+    def check(self):</div><div class='add'>+        """Check for problems with CJK fonts"""</div><div class='add'>+</div><div class='add'>+        fonts = textwrap.indent("\n".join(self.get_noto_cjk_vf_fonts()), "    ")</div><div class='add'>+        if not fonts:</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        rel_file = os.path.relpath(__file__, os.getcwd())</div><div class='add'>+</div><div class='add'>+        msg = "=" * 77 + "\n"</div><div class='add'>+        msg += 'XeTeX is confused by "variable font" files listed below:\n'</div><div class='add'>+        msg += fonts + "\n"</div><div class='add'>+        msg += textwrap.dedent(f"""</div><div class='add'>+                For CJK pages in PDF, they need to be hidden from XeTeX by denylisting.</div><div class='add'>+                Or, CJK pages can be skipped by uninstalling texlive-xecjk.</div><div class='add'>+</div><div class='add'>+                For more info on denylisting, other options, and variable font, run:</div><div class='add'>+</div><div class='add'>+                    tools/docs/check-variable-fonts.py -h</div><div class='add'>+            """)</div><div class='add'>+        msg += "=" * 77</div><div class='add'>+</div><div class='add'>+        return msg</div><div class='head'>diff --git a/tools/lib/python/kdoc/parse_data_structs.py b/tools/lib/python/kdoc/parse_data_structs.py<br/>new file mode 100755<br/>index 000000000000..25361996cd20<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/parse_data_structs.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/parse_data_structs.py</a></div><div class='hunk'>@@ -0,0 +1,482 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2016-2025 by Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;.</div><div class='add'>+# pylint: disable=R0912,R0915</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Parse a source file or header, creating ReStructured Text cross references.</div><div class='add'>+</div><div class='add'>+It accepts an optional file to change the default symbol reference or to</div><div class='add'>+suppress symbols from the output.</div><div class='add'>+</div><div class='add'>+It is capable of identifying defines, functions, structs, typedefs,</div><div class='add'>+enums and enum symbols and create cross-references for all of them.</div><div class='add'>+It is also capable of distinguish #define used for specifying a Linux</div><div class='add'>+ioctl.</div><div class='add'>+</div><div class='add'>+The optional rules file contains a set of rules like:</div><div class='add'>+</div><div class='add'>+    ignore ioctl VIDIOC_ENUM_FMT</div><div class='add'>+    replace ioctl VIDIOC_DQBUF vidioc_qbuf</div><div class='add'>+    replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det`</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class ParseDataStructs:</div><div class='add'>+    """</div><div class='add'>+    Creates an enriched version of a Kernel header file with cross-links</div><div class='add'>+    to each C data structure type.</div><div class='add'>+</div><div class='add'>+    It is meant to allow having a more comprehensive documentation, where</div><div class='add'>+    uAPI headers will create cross-reference links to the code.</div><div class='add'>+</div><div class='add'>+    It is capable of identifying defines, functions, structs, typedefs,</div><div class='add'>+    enums and enum symbols and create cross-references for all of them.</div><div class='add'>+    It is also capable of distinguish #define used for specifying a Linux</div><div class='add'>+    ioctl.</div><div class='add'>+</div><div class='add'>+    By default, it create rules for all symbols and defines, but it also</div><div class='add'>+    allows parsing an exception file. Such file contains a set of rules</div><div class='add'>+    using the syntax below:</div><div class='add'>+</div><div class='add'>+    1. Ignore rules:</div><div class='add'>+</div><div class='add'>+        ignore &lt;type&gt; &lt;symbol&gt;`</div><div class='add'>+</div><div class='add'>+    Removes the symbol from reference generation.</div><div class='add'>+</div><div class='add'>+    2. Replace rules:</div><div class='add'>+</div><div class='add'>+        replace &lt;type&gt; &lt;old_symbol&gt; &lt;new_reference&gt;</div><div class='add'>+</div><div class='add'>+       Replaces how old_symbol with a new reference. The new_reference can be:</div><div class='add'>+</div><div class='add'>+        - A simple symbol name;</div><div class='add'>+        - A full Sphinx reference.</div><div class='add'>+</div><div class='add'>+    3. Namespace rules</div><div class='add'>+</div><div class='add'>+        namespace &lt;namespace&gt;</div><div class='add'>+</div><div class='add'>+       Sets C namespace to be used during cross-reference generation. Can</div><div class='add'>+       be overridden by replace rules.</div><div class='add'>+</div><div class='add'>+    On ignore and replace rules, &lt;type&gt; can be:</div><div class='add'>+        - ioctl: for defines that end with _IO*, e.g. ioctl definitions</div><div class='add'>+        - define: for other defines</div><div class='add'>+        - symbol: for symbols defined within enums;</div><div class='add'>+        - typedef: for typedefs;</div><div class='add'>+        - enum: for the name of a non-anonymous enum;</div><div class='add'>+        - struct: for structs.</div><div class='add'>+</div><div class='add'>+    Examples:</div><div class='add'>+</div><div class='add'>+        ignore define __LINUX_MEDIA_H</div><div class='add'>+        ignore ioctl VIDIOC_ENUM_FMT</div><div class='add'>+        replace ioctl VIDIOC_DQBUF vidioc_qbuf</div><div class='add'>+        replace define V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ :c:type:`v4l2_event_motion_det`</div><div class='add'>+</div><div class='add'>+        namespace MC</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    # Parser regexes with multiple ways to capture enums and structs</div><div class='add'>+    RE_ENUMS = [</div><div class='add'>+        re.compile(r"^\s*enum\s+([\w_]+)\s*\{"),</div><div class='add'>+        re.compile(r"^\s*enum\s+([\w_]+)\s*$"),</div><div class='add'>+        re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*\{"),</div><div class='add'>+        re.compile(r"^\s*typedef\s*enum\s+([\w_]+)\s*$"),</div><div class='add'>+    ]</div><div class='add'>+    RE_STRUCTS = [</div><div class='add'>+        re.compile(r"^\s*struct\s+([_\w][\w\d_]+)\s*\{"),</div><div class='add'>+        re.compile(r"^\s*struct\s+([_\w][\w\d_]+)$"),</div><div class='add'>+        re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s*\{"),</div><div class='add'>+        re.compile(r"^\s*typedef\s*struct\s+([_\w][\w\d_]+)$"),</div><div class='add'>+    ]</div><div class='add'>+</div><div class='add'>+    # FIXME: the original code was written a long time before Sphinx C</div><div class='add'>+    # domain to have multiple namespaces. To avoid to much turn at the</div><div class='add'>+    # existing hyperlinks, the code kept using "c:type" instead of the</div><div class='add'>+    # right types. To change that, we need to change the types not only</div><div class='add'>+    # here, but also at the uAPI media documentation.</div><div class='add'>+    DEF_SYMBOL_TYPES = {</div><div class='add'>+        "ioctl": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":ref",</div><div class='add'>+            "description": "IOCTL Commands",</div><div class='add'>+        },</div><div class='add'>+        "define": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":ref",</div><div class='add'>+            "description": "Macros and Definitions",</div><div class='add'>+        },</div><div class='add'>+        # We're calling each definition inside an enum as "symbol"</div><div class='add'>+        "symbol": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":ref",</div><div class='add'>+            "description": "Enumeration values",</div><div class='add'>+        },</div><div class='add'>+        "typedef": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":c:type",</div><div class='add'>+            "description": "Type Definitions",</div><div class='add'>+        },</div><div class='add'>+        # This is the description of the enum itself</div><div class='add'>+        "enum": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":c:type",</div><div class='add'>+            "description": "Enumerations",</div><div class='add'>+        },</div><div class='add'>+        "struct": {</div><div class='add'>+            "prefix": "\\ ",</div><div class='add'>+            "suffix": "\\ ",</div><div class='add'>+            "ref_type": ":c:type",</div><div class='add'>+            "description": "Structures",</div><div class='add'>+        },</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    def __init__(self, debug: bool = False):</div><div class='add'>+        """Initialize internal vars"""</div><div class='add'>+        self.debug = debug</div><div class='add'>+        self.data = ""</div><div class='add'>+</div><div class='add'>+        self.symbols = {}</div><div class='add'>+</div><div class='add'>+        self.namespace = None</div><div class='add'>+        self.ignore = []</div><div class='add'>+        self.replace = []</div><div class='add'>+</div><div class='add'>+        for symbol_type in self.DEF_SYMBOL_TYPES:</div><div class='add'>+            self.symbols[symbol_type] = {}</div><div class='add'>+</div><div class='add'>+    def read_exceptions(self, fname: str):</div><div class='add'>+        if not fname:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        name = os.path.basename(fname)</div><div class='add'>+</div><div class='add'>+        with open(fname, "r", encoding="utf-8", errors="backslashreplace") as f:</div><div class='add'>+            for ln, line in enumerate(f):</div><div class='add'>+                ln += 1</div><div class='add'>+                line = line.strip()</div><div class='add'>+                if not line or line.startswith("#"):</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                # ignore rules</div><div class='add'>+                match = re.match(r"^ignore\s+(\w+)\s+(\S+)", line)</div><div class='add'>+</div><div class='add'>+                if match:</div><div class='add'>+                    self.ignore.append((ln, match.group(1), match.group(2)))</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                # replace rules</div><div class='add'>+                match = re.match(r"^replace\s+(\S+)\s+(\S+)\s+(\S+)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    self.replace.append((ln, match.group(1), match.group(2),</div><div class='add'>+                                         match.group(3)))</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^namespace\s+(\S+)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    self.namespace = match.group(1)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                sys.exit(f"{name}:{ln}: invalid line: {line}")</div><div class='add'>+</div><div class='add'>+    def apply_exceptions(self):</div><div class='add'>+        """</div><div class='add'>+        Process exceptions file with rules to ignore or replace references.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        # Handle ignore rules</div><div class='add'>+        for ln, c_type, symbol in self.ignore:</div><div class='add'>+            if c_type not in self.DEF_SYMBOL_TYPES:</div><div class='add'>+                sys.exit(f"{name}:{ln}: {c_type} is invalid")</div><div class='add'>+</div><div class='add'>+            d = self.symbols[c_type]</div><div class='add'>+            if symbol in d:</div><div class='add'>+                del d[symbol]</div><div class='add'>+</div><div class='add'>+        # Handle replace rules</div><div class='add'>+        for ln, c_type, old, new in self.replace:</div><div class='add'>+            if c_type not in self.DEF_SYMBOL_TYPES:</div><div class='add'>+                sys.exit(f"{name}:{ln}: {c_type} is invalid")</div><div class='add'>+</div><div class='add'>+            reftype = None</div><div class='add'>+</div><div class='add'>+            # Parse reference type when the type is specified</div><div class='add'>+</div><div class='add'>+            match = re.match(r"^\:c\:(\w+)\:\`(.+)\`", new)</div><div class='add'>+            if match:</div><div class='add'>+                reftype = f":c:{match.group(1)}"</div><div class='add'>+                new = match.group(2)</div><div class='add'>+            else:</div><div class='add'>+                match = re.search(r"(\:ref)\:\`(.+)\`", new)</div><div class='add'>+                if match:</div><div class='add'>+                    reftype = match.group(1)</div><div class='add'>+                    new = match.group(2)</div><div class='add'>+</div><div class='add'>+            # If the replacement rule doesn't have a type, get default</div><div class='add'>+            if not reftype:</div><div class='add'>+                reftype = self.DEF_SYMBOL_TYPES[c_type].get("ref_type")</div><div class='add'>+                if not reftype:</div><div class='add'>+                    reftype = self.DEF_SYMBOL_TYPES[c_type].get("real_type")</div><div class='add'>+</div><div class='add'>+            new_ref = f"{reftype}:`{old} &lt;{new}&gt;`"</div><div class='add'>+</div><div class='add'>+            # Change self.symbols to use the replacement rule</div><div class='add'>+            if old in self.symbols[c_type]:</div><div class='add'>+                (_, ln) = self.symbols[c_type][old]</div><div class='add'>+                self.symbols[c_type][old] = (new_ref, ln)</div><div class='add'>+            else:</div><div class='add'>+                print(f"{name}:{ln}: Warning: can't find {old} {c_type}")</div><div class='add'>+</div><div class='add'>+    def store_type(self, ln, symbol_type: str, symbol: str,</div><div class='add'>+                   ref_name: str = None, replace_underscores: bool = True):</div><div class='add'>+        """</div><div class='add'>+        Stores a new symbol at self.symbols under symbol_type.</div><div class='add'>+</div><div class='add'>+        By default, underscores are replaced by "-"</div><div class='add'>+        """</div><div class='add'>+        defs = self.DEF_SYMBOL_TYPES[symbol_type]</div><div class='add'>+</div><div class='add'>+        prefix = defs.get("prefix", "")</div><div class='add'>+        suffix = defs.get("suffix", "")</div><div class='add'>+        ref_type = defs.get("ref_type")</div><div class='add'>+</div><div class='add'>+        # Determine ref_link based on symbol type</div><div class='add'>+        if ref_type or self.namespace:</div><div class='add'>+            if not ref_name:</div><div class='add'>+                ref_name = symbol.lower()</div><div class='add'>+</div><div class='add'>+            # c-type references don't support hash</div><div class='add'>+            if ref_type == ":ref" and replace_underscores:</div><div class='add'>+                ref_name = ref_name.replace("_", "-")</div><div class='add'>+</div><div class='add'>+            # C domain references may have namespaces</div><div class='add'>+            if ref_type.startswith(":c:"):</div><div class='add'>+                if self.namespace:</div><div class='add'>+                    ref_name = f"{self.namespace}.{ref_name}"</div><div class='add'>+</div><div class='add'>+            if ref_type:</div><div class='add'>+                ref_link = f"{ref_type}:`{symbol} &lt;{ref_name}&gt;`"</div><div class='add'>+            else:</div><div class='add'>+                ref_link = f"`{symbol} &lt;{ref_name}&gt;`"</div><div class='add'>+        else:</div><div class='add'>+            ref_link = symbol</div><div class='add'>+</div><div class='add'>+        self.symbols[symbol_type][symbol] = (f"{prefix}{ref_link}{suffix}", ln)</div><div class='add'>+</div><div class='add'>+    def store_line(self, line):</div><div class='add'>+        """Stores a line at self.data, properly indented"""</div><div class='add'>+        line = "    " + line.expandtabs()</div><div class='add'>+        self.data += line.rstrip(" ")</div><div class='add'>+</div><div class='add'>+    def parse_file(self, file_in: str, exceptions: str = None):</div><div class='add'>+        """Reads a C source file and get identifiers"""</div><div class='add'>+        self.data = ""</div><div class='add'>+        is_enum = False</div><div class='add'>+        is_comment = False</div><div class='add'>+        multiline = ""</div><div class='add'>+</div><div class='add'>+        self.read_exceptions(exceptions)</div><div class='add'>+</div><div class='add'>+        with open(file_in, "r",</div><div class='add'>+                  encoding="utf-8", errors="backslashreplace") as f:</div><div class='add'>+            for line_no, line in enumerate(f):</div><div class='add'>+                self.store_line(line)</div><div class='add'>+                line = line.strip("\n")</div><div class='add'>+</div><div class='add'>+                # Handle continuation lines</div><div class='add'>+                if line.endswith(r"\\"):</div><div class='add'>+                    multiline += line[-1]</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if multiline:</div><div class='add'>+                    line = multiline + line</div><div class='add'>+                    multiline = ""</div><div class='add'>+</div><div class='add'>+                # Handle comments. They can be multilined</div><div class='add'>+                if not is_comment:</div><div class='add'>+                    if re.search(r"/\*.*", line):</div><div class='add'>+                        is_comment = True</div><div class='add'>+                    else:</div><div class='add'>+                        # Strip C99-style comments</div><div class='add'>+                        line = re.sub(r"(//.*)", "", line)</div><div class='add'>+</div><div class='add'>+                if is_comment:</div><div class='add'>+                    if re.search(r".*\*/", line):</div><div class='add'>+                        is_comment = False</div><div class='add'>+                    else:</div><div class='add'>+                        multiline = line</div><div class='add'>+                        continue</div><div class='add'>+</div><div class='add'>+                # At this point, line variable may be a multilined statement,</div><div class='add'>+                # if lines end with \ or if they have multi-line comments</div><div class='add'>+                # With that, it can safely remove the entire comments,</div><div class='add'>+                # and there's no need to use re.DOTALL for the logic below</div><div class='add'>+</div><div class='add'>+                line = re.sub(r"(/\*.*\*/)", "", line)</div><div class='add'>+                if not line.strip():</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                # It can be useful for debug purposes to print the file after</div><div class='add'>+                # having comments stripped and multi-lines grouped.</div><div class='add'>+                if self.debug &gt; 1:</div><div class='add'>+                    print(f"line {line_no + 1}: {line}")</div><div class='add'>+</div><div class='add'>+                # Now the fun begins: parse each type and store it.</div><div class='add'>+</div><div class='add'>+                # We opted for a two parsing logic here due to:</div><div class='add'>+                # 1. it makes easier to debug issues not-parsed symbols;</div><div class='add'>+                # 2. we want symbol replacement at the entire content, not</div><div class='add'>+                #    just when the symbol is detected.</div><div class='add'>+</div><div class='add'>+                if is_enum:</div><div class='add'>+                    match = re.match(r"^\s*([_\w][\w\d_]+)\s*[\,=]?", line)</div><div class='add'>+                    if match:</div><div class='add'>+                        self.store_type(line_no, "symbol", match.group(1))</div><div class='add'>+                    if "}" in line:</div><div class='add'>+                        is_enum = False</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\s*#\s*define\s+([\w_]+)\s+_IO", line)</div><div class='add'>+                if match:</div><div class='add'>+                    self.store_type(line_no, "ioctl", match.group(1),</div><div class='add'>+                                    replace_underscores=False)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\s*#\s*define\s+([\w_]+)(\s+|$)", line)</div><div class='add'>+                if match:</div><div class='add'>+                    self.store_type(line_no, "define", match.group(1))</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                match = re.match(r"^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);",</div><div class='add'>+                                 line)</div><div class='add'>+                if match:</div><div class='add'>+                    name = match.group(2).strip()</div><div class='add'>+                    symbol = match.group(3)</div><div class='add'>+                    self.store_type(line_no, "typedef", symbol, ref_name=name)</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                for re_enum in self.RE_ENUMS:</div><div class='add'>+                    match = re_enum.match(line)</div><div class='add'>+                    if match:</div><div class='add'>+                        self.store_type(line_no, "enum", match.group(1))</div><div class='add'>+                        is_enum = True</div><div class='add'>+                        break</div><div class='add'>+</div><div class='add'>+                for re_struct in self.RE_STRUCTS:</div><div class='add'>+                    match = re_struct.match(line)</div><div class='add'>+                    if match:</div><div class='add'>+                        self.store_type(line_no, "struct", match.group(1))</div><div class='add'>+                        break</div><div class='add'>+</div><div class='add'>+        self.apply_exceptions()</div><div class='add'>+</div><div class='add'>+    def debug_print(self):</div><div class='add'>+        """</div><div class='add'>+        Print debug information containing the replacement rules per symbol.</div><div class='add'>+        To make easier to check, group them per type.</div><div class='add'>+        """</div><div class='add'>+        if not self.debug:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        for c_type, refs in self.symbols.items():</div><div class='add'>+            if not refs:  # Skip empty dictionaries</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            print(f"{c_type}:")</div><div class='add'>+</div><div class='add'>+            for symbol, (ref, ln) in sorted(refs.items()):</div><div class='add'>+                print(f"  #{ln:&lt;5d} {symbol} -&gt; {ref}")</div><div class='add'>+</div><div class='add'>+            print()</div><div class='add'>+</div><div class='add'>+    def gen_output(self):</div><div class='add'>+        """Write the formatted output to a file."""</div><div class='add'>+</div><div class='add'>+        # Avoid extra blank lines</div><div class='add'>+        text = re.sub(r"\s+$", "", self.data) + "\n"</div><div class='add'>+        text = re.sub(r"\n\s+\n", "\n\n", text)</div><div class='add'>+</div><div class='add'>+        # Escape Sphinx special characters</div><div class='add'>+        text = re.sub(r"([\_\`\*\&lt;\&gt;\&amp;\\\\:\/\|\%\$\#\{\}\~\^])", r"\\\1", text)</div><div class='add'>+</div><div class='add'>+        # Source uAPI files may have special notes. Use bold font for them</div><div class='add'>+        text = re.sub(r"DEPRECATED", "**DEPRECATED**", text)</div><div class='add'>+</div><div class='add'>+        # Delimiters to catch the entire symbol after escaped</div><div class='add'>+        start_delim = r"([ \n\t\(=\*\@])"</div><div class='add'>+        end_delim = r"(\s|,|\\=|\\:|\;|\)|\}|\{)"</div><div class='add'>+</div><div class='add'>+        # Process all reference types</div><div class='add'>+        for ref_dict in self.symbols.values():</div><div class='add'>+            for symbol, (replacement, _) in ref_dict.items():</div><div class='add'>+                symbol = re.escape(re.sub(r"([\_\`\*\&lt;\&gt;\&amp;\\\\:\/])", r"\\\1", symbol))</div><div class='add'>+                text = re.sub(fr'{start_delim}{symbol}{end_delim}',</div><div class='add'>+                              fr'\1{replacement}\2', text)</div><div class='add'>+</div><div class='add'>+        # Remove "\ " where not needed: before spaces and at the end of lines</div><div class='add'>+        text = re.sub(r"\\ ([\n ])", r"\1", text)</div><div class='add'>+        text = re.sub(r" \\ ", " ", text)</div><div class='add'>+</div><div class='add'>+        return text</div><div class='add'>+</div><div class='add'>+    def gen_toc(self):</div><div class='add'>+        """</div><div class='add'>+        Create a list of symbols to be part of a TOC contents table</div><div class='add'>+        """</div><div class='add'>+        text = []</div><div class='add'>+</div><div class='add'>+        # Sort symbol types per description</div><div class='add'>+        symbol_descriptions = []</div><div class='add'>+        for k, v in self.DEF_SYMBOL_TYPES.items():</div><div class='add'>+            symbol_descriptions.append((v['description'], k))</div><div class='add'>+</div><div class='add'>+        symbol_descriptions.sort()</div><div class='add'>+</div><div class='add'>+        # Process each category</div><div class='add'>+        for description, c_type in symbol_descriptions:</div><div class='add'>+</div><div class='add'>+            refs = self.symbols[c_type]</div><div class='add'>+            if not refs:  # Skip empty categories</div><div class='add'>+                continue</div><div class='add'>+</div><div class='add'>+            text.append(f"{description}")</div><div class='add'>+            text.append("-" * len(description))</div><div class='add'>+            text.append("")</div><div class='add'>+</div><div class='add'>+            # Sort symbols alphabetically</div><div class='add'>+            for symbol, (ref, ln) in sorted(refs.items()):</div><div class='add'>+                text.append(f"- LINENO_{ln}: {ref}")</div><div class='add'>+</div><div class='add'>+            text.append("")  # Add empty line between categories</div><div class='add'>+</div><div class='add'>+        return "\n".join(text)</div><div class='add'>+</div><div class='add'>+    def write_output(self, file_in: str, file_out: str, toc: bool):</div><div class='add'>+        title = os.path.basename(file_in)</div><div class='add'>+</div><div class='add'>+        if toc:</div><div class='add'>+            text = self.gen_toc()</div><div class='add'>+        else:</div><div class='add'>+            text = self.gen_output()</div><div class='add'>+</div><div class='add'>+        with open(file_out, "w", encoding="utf-8", errors="backslashreplace") as f:</div><div class='add'>+            f.write(".. -*- coding: utf-8; mode: rst -*-\n\n")</div><div class='add'>+            f.write(f"{title}\n")</div><div class='add'>+            f.write("=" * len(title) + "\n\n")</div><div class='add'>+</div><div class='add'>+            if not toc:</div><div class='add'>+                f.write(".. parsed-literal::\n\n")</div><div class='add'>+</div><div class='add'>+            f.write(text)</div><div class='head'>diff --git a/tools/lib/python/kdoc/python_version.py b/tools/lib/python/kdoc/python_version.py<br/>new file mode 100644<br/>index 000000000000..e83088013db2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/python/kdoc/python_version.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/python/kdoc/python_version.py</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+# Copyright (c) 2017-2025 Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+Handle Python version check logic.</div><div class='add'>+</div><div class='add'>+Not all Python versions are supported by scripts. Yet, on some cases,</div><div class='add'>+like during documentation build, a newer version of python could be</div><div class='add'>+available.</div><div class='add'>+</div><div class='add'>+This class allows checking if the minimal requirements are followed.</div><div class='add'>+</div><div class='add'>+Better than that, PythonVersion.check_python() not only checks the minimal</div><div class='add'>+requirements, but it automatically switches to a the newest available</div><div class='add'>+Python version if present.</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+import os</div><div class='add'>+import re</div><div class='add'>+import subprocess</div><div class='add'>+import shlex</div><div class='add'>+import sys</div><div class='add'>+</div><div class='add'>+from glob import glob</div><div class='add'>+from textwrap import indent</div><div class='add'>+</div><div class='add'>+class PythonVersion:</div><div class='add'>+    """</div><div class='add'>+    Ancillary methods that checks for missing dependencies for different</div><div class='add'>+    types of types, like binaries, python modules, rpm deps, etc.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, version):</div><div class='add'>+        """Ïnitialize self.version tuple from a version string"""</div><div class='add'>+        self.version = self.parse_version(version)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def parse_version(version):</div><div class='add'>+        """Convert a major.minor.patch version into a tuple"""</div><div class='add'>+        return tuple(int(x) for x in version.split("."))</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def ver_str(version):</div><div class='add'>+        """Returns a version tuple as major.minor.patch"""</div><div class='add'>+        return ".".join([str(x) for x in version])</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def cmd_print(cmd, max_len=80):</div><div class='add'>+        cmd_line = []</div><div class='add'>+</div><div class='add'>+        for w in cmd:</div><div class='add'>+            w = shlex.quote(w)</div><div class='add'>+</div><div class='add'>+            if cmd_line:</div><div class='add'>+                if not max_len or len(cmd_line[-1]) + len(w) &lt; max_len:</div><div class='add'>+                    cmd_line[-1] += " " + w</div><div class='add'>+                    continue</div><div class='add'>+                else:</div><div class='add'>+                    cmd_line[-1] += " \\"</div><div class='add'>+                    cmd_line.append(w)</div><div class='add'>+            else:</div><div class='add'>+                cmd_line.append(w)</div><div class='add'>+</div><div class='add'>+        return "\n  ".join(cmd_line)</div><div class='add'>+</div><div class='add'>+    def __str__(self):</div><div class='add'>+        """Returns a version tuple as major.minor.patch from self.version"""</div><div class='add'>+        return self.ver_str(self.version)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def get_python_version(cmd):</div><div class='add'>+        """</div><div class='add'>+        Get python version from a Python binary. As we need to detect if</div><div class='add'>+        are out there newer python binaries, we can't rely on sys.release here.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        kwargs = {}</div><div class='add'>+        if sys.version_info &lt; (3, 7):</div><div class='add'>+            kwargs['universal_newlines'] = True</div><div class='add'>+        else:</div><div class='add'>+            kwargs['text'] = True</div><div class='add'>+</div><div class='add'>+        result = subprocess.run([cmd, "--version"],</div><div class='add'>+                                stdout = subprocess.PIPE,</div><div class='add'>+                                stderr = subprocess.PIPE,</div><div class='add'>+                                **kwargs, check=False)</div><div class='add'>+</div><div class='add'>+        version = result.stdout.strip()</div><div class='add'>+</div><div class='add'>+        match = re.search(r"(\d+\.\d+\.\d+)", version)</div><div class='add'>+        if match:</div><div class='add'>+            return PythonVersion.parse_version(match.group(1))</div><div class='add'>+</div><div class='add'>+        print(f"Can't parse version {version}")</div><div class='add'>+        return (0, 0, 0)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def find_python(min_version):</div><div class='add'>+        """</div><div class='add'>+        Detect if are out there any python 3.xy version newer than the</div><div class='add'>+        current one.</div><div class='add'>+</div><div class='add'>+        Note: this routine is limited to up to 2 digits for python3. We</div><div class='add'>+        may need to update it one day, hopefully on a distant future.</div><div class='add'>+        """</div><div class='add'>+        patterns = [</div><div class='add'>+            "python3.[0-9][0-9]",</div><div class='add'>+            "python3.[0-9]",</div><div class='add'>+        ]</div><div class='add'>+</div><div class='add'>+        python_cmd = []</div><div class='add'>+</div><div class='add'>+        # Seek for a python binary newer than min_version</div><div class='add'>+        for path in os.getenv("PATH", "").split(":"):</div><div class='add'>+            for pattern in patterns:</div><div class='add'>+                for cmd in glob(os.path.join(path, pattern)):</div><div class='add'>+                    if os.path.isfile(cmd) and os.access(cmd, os.X_OK):</div><div class='add'>+                        version = PythonVersion.get_python_version(cmd)</div><div class='add'>+                        if version &gt;= min_version:</div><div class='add'>+                            python_cmd.append((version, cmd))</div><div class='add'>+</div><div class='add'>+        return sorted(python_cmd, reverse=True)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def check_python(min_version, show_alternatives=False, bail_out=False,</div><div class='add'>+                     success_on_error=False):</div><div class='add'>+        """</div><div class='add'>+        Check if the current python binary satisfies our minimal requirement</div><div class='add'>+        for Sphinx build. If not, re-run with a newer version if found.</div><div class='add'>+        """</div><div class='add'>+        cur_ver = sys.version_info[:3]</div><div class='add'>+        if cur_ver &gt;= min_version:</div><div class='add'>+            ver = PythonVersion.ver_str(cur_ver)</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        python_ver = PythonVersion.ver_str(cur_ver)</div><div class='add'>+</div><div class='add'>+        available_versions = PythonVersion.find_python(min_version)</div><div class='add'>+        if not available_versions:</div><div class='add'>+            print(f"ERROR: Python version {python_ver} is not supported anymore\n")</div><div class='add'>+            print("       Can't find a new version. This script may fail")</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        script_path = os.path.abspath(sys.argv[0])</div><div class='add'>+</div><div class='add'>+        # Check possible alternatives</div><div class='add'>+        if available_versions:</div><div class='add'>+            new_python_cmd = available_versions[0][1]</div><div class='add'>+        else:</div><div class='add'>+            new_python_cmd = None</div><div class='add'>+</div><div class='add'>+        if show_alternatives and available_versions:</div><div class='add'>+            print("You could run, instead:")</div><div class='add'>+            for _, cmd in available_versions:</div><div class='add'>+                args = [cmd, script_path] + sys.argv[1:]</div><div class='add'>+</div><div class='add'>+                cmd_str = indent(PythonVersion.cmd_print(args), "  ")</div><div class='add'>+                print(f"{cmd_str}\n")</div><div class='add'>+</div><div class='add'>+        if bail_out:</div><div class='add'>+            msg = f"Python {python_ver} not supported. Bailing out"</div><div class='add'>+            if success_on_error:</div><div class='add'>+                print(msg, file=sys.stderr)</div><div class='add'>+                sys.exit(0)</div><div class='add'>+            else:</div><div class='add'>+                sys.exit(msg)</div><div class='add'>+</div><div class='add'>+        print(f"Python {python_ver} not supported. Changing to {new_python_cmd}")</div><div class='add'>+</div><div class='add'>+        # Restart script using the newer version</div><div class='add'>+        args = [new_python_cmd, script_path] + sys.argv[1:]</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            os.execv(new_python_cmd, args)</div><div class='add'>+        except OSError as e:</div><div class='add'>+            sys.exit(f"Failed to restart with {new_python_cmd}: {e}")</div><div class='head'>diff --git a/tools/lib/subcmd/help.c b/tools/lib/subcmd/help.c<br/>index 9ef569492560..ddaeb4eb3e24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/subcmd/help.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/subcmd/help.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/subcmd/help.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/subcmd/help.c</a></div><div class='hunk'>@@ -75,6 +75,9 @@ void exclude_cmds(struct cmdnames *cmds, struct cmdnames *excludes)</div><div class='ctx'> 	size_t ci, cj, ei;</div><div class='ctx'> 	int cmp;</div><div class='ctx'> </div><div class='add'>+	if (!excludes-&gt;cnt)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	ci = cj = ei = 0;</div><div class='ctx'> 	while (ci &lt; cmds-&gt;cnt &amp;&amp; ei &lt; excludes-&gt;cnt) {</div><div class='ctx'> 		cmp = strcmp(cmds-&gt;names[ci]-&gt;name, excludes-&gt;names[ei]-&gt;name);</div><div class='head'>diff --git a/tools/lib/thermal/Makefile b/tools/lib/thermal/Makefile<br/>index a1f5e388644d..41aa7a324ff4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/thermal/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/thermal/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/thermal/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/thermal/Makefile</a></div><div class='hunk'>@@ -46,8 +46,12 @@ else</div><div class='ctx'>   CFLAGS := -g -Wall</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+NL3_CFLAGS = $(shell pkg-config --cflags libnl-3.0 2&gt;/dev/null)</div><div class='add'>+ifeq ($(NL3_CFLAGS),)</div><div class='add'>+NL3_CFLAGS = -I/usr/include/libnl3</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> INCLUDES = \</div><div class='del'>--I/usr/include/libnl3 \</div><div class='ctx'> -I$(srctree)/tools/lib/thermal/include \</div><div class='ctx'> -I$(srctree)/tools/lib/ \</div><div class='ctx'> -I$(srctree)/tools/include \</div><div class='hunk'>@@ -59,6 +63,7 @@ INCLUDES = \</div><div class='ctx'> override CFLAGS += $(EXTRA_WARNINGS)</div><div class='ctx'> override CFLAGS += -Werror -Wall</div><div class='ctx'> override CFLAGS += -fPIC</div><div class='add'>+override CFLAGS += $(NL3_CFLAGS)</div><div class='ctx'> override CFLAGS += $(INCLUDES)</div><div class='ctx'> override CFLAGS += -fvisibility=hidden</div><div class='ctx'> override CFGLAS += -Wl,-L.</div><div class='hunk'>@@ -134,7 +139,7 @@ endef</div><div class='ctx'> install_lib: libs</div><div class='ctx'> 	$(call QUIET_INSTALL, $(LIBTHERMAL_ALL)) \</div><div class='ctx'> 		$(call do_install_mkdir,$(libdir_SQ)); \</div><div class='del'>-		cp -fpR $(LIBTHERMAL_ALL) $(DESTDIR)$(libdir_SQ)</div><div class='add'>+		cp -fR --preserve=mode,timestamp $(LIBTHERMAL_ALL) $(DESTDIR)$(libdir_SQ)</div><div class='ctx'> </div><div class='ctx'> install_headers:</div><div class='ctx'> 	$(call QUIET_INSTALL, headers) \</div><div class='head'>diff --git a/tools/lib/thermal/libthermal.map b/tools/lib/thermal/libthermal.map<br/>index d657176aa47f..1d3d0c04e4b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/lib/thermal/libthermal.map?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/lib/thermal/libthermal.map</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/lib/thermal/libthermal.map?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/lib/thermal/libthermal.map</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> LIBTHERMAL_0.0.1 {</div><div class='ctx'> 	global:</div><div class='del'>-		thermal_init;</div><div class='ctx'> 		for_each_thermal_zone;</div><div class='ctx'> 		for_each_thermal_trip;</div><div class='ctx'> 		for_each_thermal_cdev;</div><div class='hunk'>@@ -9,9 +8,12 @@ LIBTHERMAL_0.0.1 {</div><div class='ctx'> 		thermal_zone_find_by_id;</div><div class='ctx'> 		thermal_zone_discover;</div><div class='ctx'> 		thermal_init;</div><div class='add'>+		thermal_exit;</div><div class='add'>+		thermal_events_exit;</div><div class='ctx'> 		thermal_events_init;</div><div class='ctx'> 		thermal_events_handle;</div><div class='ctx'> 		thermal_events_fd;</div><div class='add'>+		thermal_cmd_exit;</div><div class='ctx'> 		thermal_cmd_init;</div><div class='ctx'> 		thermal_cmd_get_tz;</div><div class='ctx'> 		thermal_cmd_get_cdev;</div><div class='hunk'>@@ -22,6 +24,7 @@ LIBTHERMAL_0.0.1 {</div><div class='ctx'> 		thermal_cmd_threshold_add;</div><div class='ctx'> 		thermal_cmd_threshold_delete;</div><div class='ctx'> 		thermal_cmd_threshold_flush;</div><div class='add'>+		thermal_sampling_exit;</div><div class='ctx'> 		thermal_sampling_init;</div><div class='ctx'> 		thermal_sampling_handle;</div><div class='ctx'> 		thermal_sampling_fd;</div><div class='head'>diff --git a/tools/mm/page_owner_sort.c b/tools/mm/page_owner_sort.c<br/>index 880e36df0c11..14c67e9e84c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/mm/page_owner_sort.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/mm/page_owner_sort.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/mm/page_owner_sort.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/mm/page_owner_sort.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='hunk'>@@ -23,9 +24,6 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;getopt.h&gt;</div><div class='ctx'> </div><div class='del'>-#define bool int</div><div class='del'>-#define true 1</div><div class='del'>-#define false 0</div><div class='ctx'> #define TASK_COMM_LEN 16</div><div class='ctx'> </div><div class='ctx'> struct block_list {</div><div class='hunk'>@@ -669,14 +667,15 @@ int main(int argc, char **argv)</div><div class='ctx'> 		{ "pid", required_argument, NULL, 1 },</div><div class='ctx'> 		{ "tgid", required_argument, NULL, 2 },</div><div class='ctx'> 		{ "name", required_argument, NULL, 3 },</div><div class='del'>-		{ "cull",  required_argument, NULL, 4 },</div><div class='del'>-		{ "sort",  required_argument, NULL, 5 },</div><div class='add'>+		{ "cull", required_argument, NULL, 4 },</div><div class='add'>+		{ "sort", required_argument, NULL, 5 },</div><div class='add'>+		{ "help", no_argument, NULL, 'h' },</div><div class='ctx'> 		{ 0, 0, 0, 0},</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	compare_flag = COMP_NO_FLAG;</div><div class='ctx'> </div><div class='del'>-	while ((opt = getopt_long(argc, argv, "admnpstP", longopts, NULL)) != -1)</div><div class='add'>+	while ((opt = getopt_long(argc, argv, "admnpstPh", longopts, NULL)) != -1)</div><div class='ctx'> 		switch (opt) {</div><div class='ctx'> 		case 'a':</div><div class='ctx'> 			compare_flag |= COMP_ALLOC;</div><div class='hunk'>@@ -702,6 +701,9 @@ int main(int argc, char **argv)</div><div class='ctx'> 		case 'n':</div><div class='ctx'> 			compare_flag |= COMP_COMM;</div><div class='ctx'> 			break;</div><div class='add'>+		case 'h':</div><div class='add'>+			usage();</div><div class='add'>+			exit(0);</div><div class='ctx'> 		case 1:</div><div class='ctx'> 			filter = filter | FILTER_PID;</div><div class='ctx'> 			fc.pids = parse_nums_list(optarg, &amp;fc.pids_size);</div><div class='head'>diff --git a/tools/mm/slabinfo.c b/tools/mm/slabinfo.c<br/>index 1433eff99feb..80cdbd3db82d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/mm/slabinfo.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/mm/slabinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/mm/slabinfo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/mm/slabinfo.c</a></div><div class='hunk'>@@ -155,6 +155,7 @@ static void usage(void)</div><div class='ctx'> </div><div class='ctx'> static unsigned long read_obj(const char *name)</div><div class='ctx'> {</div><div class='add'>+	size_t len;</div><div class='ctx'> 	FILE *f = fopen(name, "r");</div><div class='ctx'> </div><div class='ctx'> 	if (!f) {</div><div class='hunk'>@@ -165,8 +166,10 @@ static unsigned long read_obj(const char *name)</div><div class='ctx'> 		if (!fgets(buffer, sizeof(buffer), f))</div><div class='ctx'> 			buffer[0] = 0;</div><div class='ctx'> 		fclose(f);</div><div class='del'>-		if (buffer[strlen(buffer)] == '\n')</div><div class='del'>-			buffer[strlen(buffer)] = 0;</div><div class='add'>+		len = strlen(buffer);</div><div class='add'>+</div><div class='add'>+		if (len &gt; 0 &amp;&amp; buffer[len - 1] == '\n')</div><div class='add'>+			buffer[len - 1] = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	return strlen(buffer);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/generators/__init__.py b/tools/net/sunrpc/xdrgen/generators/__init__.py<br/>index b98574a36a4a..e22632cf38fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/generators/__init__.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/generators/__init__.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/generators/__init__.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/generators/__init__.py</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> """Define a base code generator class"""</div><div class='ctx'> </div><div class='del'>-import sys</div><div class='add'>+from pathlib import Path</div><div class='ctx'> from jinja2 import Environment, FileSystemLoader, Template</div><div class='ctx'> </div><div class='ctx'> from xdr_ast import _XdrAst, Specification, _RpcProgram, _XdrTypeSpecifier</div><div class='hunk'>@@ -14,8 +14,11 @@ def create_jinja2_environment(language: str, xdr_type: str) -&gt; Environment:</div><div class='ctx'>     """Open a set of templates based on output language"""</div><div class='ctx'>     match language:</div><div class='ctx'>         case "C":</div><div class='add'>+            templates_dir = (</div><div class='add'>+                Path(__file__).parent.parent / "templates" / language / xdr_type</div><div class='add'>+            )</div><div class='ctx'>             environment = Environment(</div><div class='del'>-                loader=FileSystemLoader(sys.path[0] + "/templates/C/" + xdr_type + "/"),</div><div class='add'>+                loader=FileSystemLoader(templates_dir),</div><div class='ctx'>                 trim_blocks=True,</div><div class='ctx'>                 lstrip_blocks=True,</div><div class='ctx'>             )</div><div class='hunk'>@@ -48,9 +51,7 @@ def find_xdr_program_name(root: Specification) -&gt; str:</div><div class='ctx'> </div><div class='ctx'> def header_guard_infix(filename: str) -&gt; str:</div><div class='ctx'>     """Extract the header guard infix from the specification filename"""</div><div class='del'>-    basename = filename.split("/")[-1]</div><div class='del'>-    program = basename.replace(".x", "")</div><div class='del'>-    return program.upper()</div><div class='add'>+    return Path(filename).stem.upper()</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> def kernel_c_type(spec: _XdrTypeSpecifier) -&gt; str:</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/generators/union.py b/tools/net/sunrpc/xdrgen/generators/union.py<br/>index 2cca00e279cd..ad1f214ef22a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/generators/union.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/generators/union.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/generators/union.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/generators/union.py</a></div><div class='hunk'>@@ -8,7 +8,7 @@ from jinja2 import Environment</div><div class='ctx'> from generators import SourceGenerator</div><div class='ctx'> from generators import create_jinja2_environment, get_jinja2_template</div><div class='ctx'> </div><div class='del'>-from xdr_ast import _XdrBasic, _XdrUnion, _XdrVoid, get_header_name</div><div class='add'>+from xdr_ast import _XdrBasic, _XdrUnion, _XdrVoid, _XdrString, get_header_name</div><div class='ctx'> from xdr_ast import _XdrDeclaration, _XdrCaseSpec, public_apis, big_endian</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -40,13 +40,20 @@ def emit_union_case_spec_definition(</div><div class='ctx'>     """Emit a definition for an XDR union's case arm"""</div><div class='ctx'>     if isinstance(node.arm, _XdrVoid):</div><div class='ctx'>         return</div><div class='del'>-    assert isinstance(node.arm, _XdrBasic)</div><div class='add'>+    if isinstance(node.arm, _XdrString):</div><div class='add'>+        type_name = "char *"</div><div class='add'>+        classifier = ""</div><div class='add'>+    else:</div><div class='add'>+        type_name = node.arm.spec.type_name</div><div class='add'>+        classifier = node.arm.spec.c_classifier</div><div class='add'>+</div><div class='add'>+    assert isinstance(node.arm, (_XdrBasic, _XdrString))</div><div class='ctx'>     template = get_jinja2_template(environment, "definition", "case_spec")</div><div class='ctx'>     print(</div><div class='ctx'>         template.render(</div><div class='ctx'>             name=node.arm.name,</div><div class='del'>-            type=node.arm.spec.type_name,</div><div class='del'>-            classifier=node.arm.spec.c_classifier,</div><div class='add'>+            type=type_name,</div><div class='add'>+            classifier=classifier,</div><div class='ctx'>         )</div><div class='ctx'>     )</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +91,12 @@ def emit_union_case_spec_decoder(</div><div class='ctx'> </div><div class='ctx'>     if isinstance(node.arm, _XdrVoid):</div><div class='ctx'>         return</div><div class='add'>+    if isinstance(node.arm, _XdrString):</div><div class='add'>+        type_name = "char *"</div><div class='add'>+        classifier = ""</div><div class='add'>+    else:</div><div class='add'>+        type_name = node.arm.spec.type_name</div><div class='add'>+        classifier = node.arm.spec.c_classifier</div><div class='ctx'> </div><div class='ctx'>     if big_endian_discriminant:</div><div class='ctx'>         template = get_jinja2_template(environment, "decoder", "case_spec_be")</div><div class='hunk'>@@ -92,13 +105,13 @@ def emit_union_case_spec_decoder(</div><div class='ctx'>     for case in node.values:</div><div class='ctx'>         print(template.render(case=case))</div><div class='ctx'> </div><div class='del'>-    assert isinstance(node.arm, _XdrBasic)</div><div class='add'>+    assert isinstance(node.arm, (_XdrBasic, _XdrString))</div><div class='ctx'>     template = get_jinja2_template(environment, "decoder", node.arm.template)</div><div class='ctx'>     print(</div><div class='ctx'>         template.render(</div><div class='ctx'>             name=node.arm.name,</div><div class='del'>-            type=node.arm.spec.type_name,</div><div class='del'>-            classifier=node.arm.spec.c_classifier,</div><div class='add'>+            type=type_name,</div><div class='add'>+            classifier=classifier,</div><div class='ctx'>         )</div><div class='ctx'>     )</div><div class='ctx'> </div><div class='hunk'>@@ -169,7 +182,10 @@ def emit_union_case_spec_encoder(</div><div class='ctx'> </div><div class='ctx'>     if isinstance(node.arm, _XdrVoid):</div><div class='ctx'>         return</div><div class='del'>-</div><div class='add'>+    if isinstance(node.arm, _XdrString):</div><div class='add'>+        type_name = "char *"</div><div class='add'>+    else:</div><div class='add'>+        type_name = node.arm.spec.type_name</div><div class='ctx'>     if big_endian_discriminant:</div><div class='ctx'>         template = get_jinja2_template(environment, "encoder", "case_spec_be")</div><div class='ctx'>     else:</div><div class='hunk'>@@ -181,7 +197,7 @@ def emit_union_case_spec_encoder(</div><div class='ctx'>     print(</div><div class='ctx'>         template.render(</div><div class='ctx'>             name=node.arm.name,</div><div class='del'>-            type=node.arm.spec.type_name,</div><div class='add'>+            type=type_name,</div><div class='ctx'>         )</div><div class='ctx'>     )</div><div class='ctx'> </div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2<br/>index 5bf010665f84..3dbd724d7f17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/pointer/decoder/close.j2</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2<br/>index 5bf010665f84..3dbd724d7f17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/close.j2</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2<br/>index 5bf010665f84..3dbd724d7f17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/close.j2</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2 b/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2<br/>index 9a814de54ae8..65698e20d8cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/struct/decoder/variable_length_opaque.j2</a></div><div class='hunk'>@@ -2,5 +2,5 @@</div><div class='ctx'> {% if annotate %}</div><div class='ctx'> 	/* member {{ name }} (variable-length opaque) */</div><div class='ctx'> {% endif %}</div><div class='del'>-	if (!xdrgen_decode_opaque(xdr, (opaque *)ptr, {{ maxsize }}))</div><div class='add'>+	if (!xdrgen_decode_opaque(xdr, &amp;ptr-&gt;{{ name }}, {{ maxsize }}))</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2<br/>index 5bf010665f84..3dbd724d7f17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/struct/encoder/close.j2</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2<br/>index da4709403dc9..b215e157dfa7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/basic.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ name }} *ptr)</div><div class='ctx'> 	/* (basic) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdrgen_decode_{{ type }}(xdr, ptr);</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2<br/>index d7c80e472fe3..c8953719e626 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_array.j2</a></div><div class='hunk'>@@ -22,4 +22,4 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ classifier }}{{ name }} *ptr</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2<br/>index 8b4ff08c49e5..c854fc8c74e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/fixed_length_opaque.j2</a></div><div class='hunk'>@@ -13,5 +13,5 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ classifier }}{{ name }} *ptr</div><div class='ctx'> {% if annotate %}</div><div class='ctx'> 	/* (fixed-length opaque) */</div><div class='ctx'> {% endif %}</div><div class='del'>-	return xdr_stream_decode_opaque_fixed(xdr, ptr, {{ size }}) &gt;= 0;</div><div class='del'>-};</div><div class='add'>+	return xdr_stream_decode_opaque_fixed(xdr, ptr, {{ size }}) == 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2<br/>index 56c5a17d6a70..bcbc1758aae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/string.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ classifier }}{{ name }} *ptr</div><div class='ctx'> 	/* (variable-length string) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdrgen_decode_string(xdr, ptr, {{ maxsize }});</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2<br/>index e74ffdd98463..a59cc1f38eed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_array.j2</a></div><div class='hunk'>@@ -23,4 +23,4 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ classifier }}{{ name }} *ptr</div><div class='ctx'> 		if (!xdrgen_decode_{{ type }}(xdr, &amp;ptr-&gt;element[i]))</div><div class='ctx'> 			return false;</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2<br/>index f28f8b228ad5..eb05f53e1041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/decoder/variable_length_opaque.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_decode_{{ name }}(struct xdr_stream *xdr, {{ classifier }}{{ name }} *ptr</div><div class='ctx'> 	/* (variable-length opaque) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdrgen_decode_opaque(xdr, ptr, {{ maxsize }});</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2<br/>index 35effe67e4ef..0d21dd0b723a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/basic.j2</a></div><div class='hunk'>@@ -18,4 +18,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> 	/* (basic) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdrgen_encode_{{ type }}(xdr, value);</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2<br/>index 95202ad5ad2d..ec8cd6509514 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_array.j2</a></div><div class='hunk'>@@ -22,4 +22,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2<br/>index 9c66a11b9912..b53fa87e1858 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/fixed_length_opaque.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> 	/* (fixed-length opaque) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdr_stream_encode_opaque_fixed(xdr, value, {{ size }}) &gt;= 0;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2<br/>index 3d490ff180d0..28b81f1d0bd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/string.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> 	/* (variable-length string) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdr_stream_encode_opaque(xdr, value.data, value.len) &gt;= 0;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2<br/>index 2d2384f64918..ff093c281d51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_array.j2</a></div><div class='hunk'>@@ -27,4 +27,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> {% endif %}</div><div class='ctx'> 			return false;</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2 b/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2<br/>index 8508f13c95b9..2e89592fa702 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/typedef/encoder/variable_length_opaque.j2</a></div><div class='hunk'>@@ -14,4 +14,4 @@ xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const {{ classifier }}{{ name }</div><div class='ctx'> 	/* (variable-length opaque) */</div><div class='ctx'> {% endif %}</div><div class='ctx'> 	return xdr_stream_encode_opaque(xdr, value.data, value.len) &gt;= 0;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2<br/>new file mode 100644<br/>index 000000000000..816291184e8c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/union/declaration/close.j2</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+{# SPDX-License-Identifier: GPL-2.0 #}</div><div class='add'>+</div><div class='add'>+bool xdrgen_decode_{{ name }}(struct xdr_stream *xdr, struct {{ name }} *ptr);</div><div class='add'>+bool xdrgen_encode_{{ name }}(struct xdr_stream *xdr, const struct {{ name }} *value);</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2<br/>index fdc2dfd1843b..39d8d6c5094d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/union/decoder/close.j2</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2 b/tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2<br/>index fdc2dfd1843b..39d8d6c5094d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/union/encoder/close.j2</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='ctx'> {# SPDX-License-Identifier: GPL-2.0 #}</div><div class='ctx'> 	}</div><div class='ctx'> 	return true;</div><div class='del'>-};</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2 b/tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2<br/>new file mode 100644<br/>index 000000000000..2f035a64f1f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/templates/C/union/encoder/string.j2</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+{# SPDX-License-Identifier: GPL-2.0 #}</div><div class='add'>+{% if annotate %}</div><div class='add'>+		/* member {{ name }} (variable-length string) */</div><div class='add'>+{% endif %}</div><div class='add'>+		if (!xdrgen_encode_string(xdr, ptr-&gt;u.{{ name }}, {{ maxsize }}))</div><div class='add'>+			return false;</div><div class='head'>diff --git a/tools/net/sunrpc/xdrgen/xdrgen b/tools/net/sunrpc/xdrgen/xdrgen<br/>index 43762be39252..3afd0547d67c 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/xdrgen?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/sunrpc/xdrgen/xdrgen</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/sunrpc/xdrgen/xdrgen?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/sunrpc/xdrgen/xdrgen</a></div><div class='hunk'>@@ -10,8 +10,13 @@ __license__ = "GPL-2.0 only"</div><div class='ctx'> __version__ = "0.2"</div><div class='ctx'> </div><div class='ctx'> import sys</div><div class='add'>+from pathlib import Path</div><div class='ctx'> import argparse</div><div class='ctx'> </div><div class='add'>+_XDRGEN_DIR = Path(__file__).resolve().parent</div><div class='add'>+if str(_XDRGEN_DIR) not in sys.path:</div><div class='add'>+    sys.path.insert(0, str(_XDRGEN_DIR))</div><div class='add'>+</div><div class='ctx'> from subcmds import definitions</div><div class='ctx'> from subcmds import declarations</div><div class='ctx'> from subcmds import lint</div><div class='head'>diff --git a/tools/net/ynl/Makefile b/tools/net/ynl/Makefile<br/>index 211df5a93ad9..7736b492f559 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/Makefile</a></div><div class='hunk'>@@ -12,10 +12,13 @@ endif</div><div class='ctx'> libdir  ?= $(prefix)/$(libdir_relative)</div><div class='ctx'> includedir ?= $(prefix)/include</div><div class='ctx'> </div><div class='del'>-SUBDIRS = lib generated samples</div><div class='add'>+SPECDIR=../../../Documentation/netlink/specs</div><div class='add'>+</div><div class='add'>+SUBDIRS = lib generated samples ynltool tests</div><div class='ctx'> </div><div class='ctx'> all: $(SUBDIRS) libynl.a</div><div class='ctx'> </div><div class='add'>+ynltool: | lib generated libynl.a</div><div class='ctx'> samples: | lib generated</div><div class='ctx'> libynl.a: | lib generated</div><div class='ctx'> 	@echo -e "\tAR $@"</div><div class='hunk'>@@ -48,5 +51,27 @@ install: libynl.a lib/*.h</div><div class='ctx'> 	@echo -e "\tINSTALL pyynl"</div><div class='ctx'> 	@pip install --prefix=$(DESTDIR)$(prefix) .</div><div class='ctx'> 	@make -C generated install</div><div class='add'>+	@make -C tests install</div><div class='add'>+</div><div class='add'>+run_tests:</div><div class='add'>+	@$(MAKE) -C tests run_tests</div><div class='add'>+</div><div class='add'>+lint:</div><div class='add'>+	yamllint $(SPECDIR)</div><div class='add'>+</div><div class='add'>+schema_check:</div><div class='add'>+	@N=1; \</div><div class='add'>+	for spec in $(SPECDIR)/*.yaml ; do \</div><div class='add'>+		NAME=$$(basename $$spec) ; \</div><div class='add'>+		OUTPUT=$$(./pyynl/cli.py --spec $$spec --validate) ; \</div><div class='add'>+		if [ $$? -eq 0 ] ; then \</div><div class='add'>+			echo "ok $$N $$NAME schema validation" ; \</div><div class='add'>+		else \</div><div class='add'>+			echo "not ok $$N $$NAME schema validation" ; \</div><div class='add'>+			echo "$$OUTPUT" ; \</div><div class='add'>+			echo ; \</div><div class='add'>+		fi ; \</div><div class='add'>+		N=$$((N+1)) ; \</div><div class='add'>+	done</div><div class='ctx'> </div><div class='del'>-.PHONY: all clean distclean install $(SUBDIRS)</div><div class='add'>+.PHONY: all clean distclean install run_tests lint schema_check $(SUBDIRS)</div><div class='head'>diff --git a/tools/net/ynl/Makefile.deps b/tools/net/ynl/Makefile.deps<br/>index 90686e241157..865fd2e8519e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/Makefile.deps?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/Makefile.deps</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/Makefile.deps?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/Makefile.deps</a></div><div class='hunk'>@@ -31,6 +31,7 @@ CFLAGS_ovpn:=$(call get_hdr_inc,_LINUX_OVPN_H,ovpn.h)</div><div class='ctx'> CFLAGS_ovs_datapath:=$(call get_hdr_inc,__LINUX_OPENVSWITCH_H,openvswitch.h)</div><div class='ctx'> CFLAGS_ovs_flow:=$(call get_hdr_inc,__LINUX_OPENVSWITCH_H,openvswitch.h)</div><div class='ctx'> CFLAGS_ovs_vport:=$(call get_hdr_inc,__LINUX_OPENVSWITCH_H,openvswitch.h)</div><div class='add'>+CFLAGS_psp:=$(call get_hdr_inc,_LINUX_PSP_H,psp.h)</div><div class='ctx'> CFLAGS_rt-addr:=$(call get_hdr_inc,__LINUX_RTNETLINK_H,rtnetlink.h) \</div><div class='ctx'> 	$(call get_hdr_inc,__LINUX_IF_ADDR_H,if_addr.h)</div><div class='ctx'> CFLAGS_rt-link:=$(call get_hdr_inc,__LINUX_RTNETLINK_H,rtnetlink.h) \</div><div class='head'>diff --git a/tools/net/ynl/lib/ynl-priv.h b/tools/net/ynl/lib/ynl-priv.h<br/>index 824777d7e05e..ced7dce44efb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/lib/ynl-priv.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/lib/ynl-priv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/lib/ynl-priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/lib/ynl-priv.h</a></div><div class='hunk'>@@ -106,7 +106,6 @@ ynl_gemsg_start_req(struct ynl_sock *ys, __u32 id, __u8 cmd, __u8 version);</div><div class='ctx'> struct nlmsghdr *</div><div class='ctx'> ynl_gemsg_start_dump(struct ynl_sock *ys, __u32 id, __u8 cmd, __u8 version);</div><div class='ctx'> </div><div class='del'>-int ynl_attr_validate(struct ynl_parse_arg *yarg, const struct nlattr *attr);</div><div class='ctx'> int ynl_submsg_failed(struct ynl_parse_arg *yarg, const char *field_name,</div><div class='ctx'> 		      const char *sel_name);</div><div class='ctx'> </div><div class='hunk'>@@ -314,7 +313,7 @@ ynl_attr_put_str(struct nlmsghdr *nlh, unsigned int attr_type, const char *str)</div><div class='ctx'> 	struct nlattr *attr;</div><div class='ctx'> 	size_t len;</div><div class='ctx'> </div><div class='del'>-	len = strlen(str);</div><div class='add'>+	len = strlen(str) + 1;</div><div class='ctx'> 	if (__ynl_attr_put_overflow(nlh, len))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -322,7 +321,7 @@ ynl_attr_put_str(struct nlmsghdr *nlh, unsigned int attr_type, const char *str)</div><div class='ctx'> 	attr-&gt;nla_type = attr_type;</div><div class='ctx'> </div><div class='ctx'> 	strcpy((char *)ynl_attr_data(attr), str);</div><div class='del'>-	attr-&gt;nla_len = NLA_HDRLEN + NLA_ALIGN(len);</div><div class='add'>+	attr-&gt;nla_len = NLA_HDRLEN + len;</div><div class='ctx'> </div><div class='ctx'> 	nlh-&gt;nlmsg_len += NLMSG_ALIGN(attr-&gt;nla_len);</div><div class='ctx'> }</div><div class='hunk'>@@ -467,4 +466,13 @@ ynl_attr_put_sint(struct nlmsghdr *nlh, __u16 type, __s64 data)</div><div class='ctx'> 	else</div><div class='ctx'> 		ynl_attr_put_s64(nlh, type, data);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int __ynl_attr_validate(struct ynl_parse_arg *yarg, const struct nlattr *attr,</div><div class='add'>+			unsigned int type);</div><div class='add'>+</div><div class='add'>+static inline int ynl_attr_validate(struct ynl_parse_arg *yarg,</div><div class='add'>+				    const struct nlattr *attr)</div><div class='add'>+{</div><div class='add'>+	return __ynl_attr_validate(yarg, attr, ynl_attr_type(attr));</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/net/ynl/lib/ynl.c b/tools/net/ynl/lib/ynl.c<br/>index 2a169c3c0797..2bcd781111d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/lib/ynl.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/lib/ynl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/lib/ynl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/lib/ynl.c</a></div><div class='hunk'>@@ -360,15 +360,15 @@ static int ynl_cb_done(const struct nlmsghdr *nlh, struct ynl_parse_arg *yarg)</div><div class='ctx'> </div><div class='ctx'> /* Attribute validation */</div><div class='ctx'> </div><div class='del'>-int ynl_attr_validate(struct ynl_parse_arg *yarg, const struct nlattr *attr)</div><div class='add'>+int __ynl_attr_validate(struct ynl_parse_arg *yarg, const struct nlattr *attr,</div><div class='add'>+			unsigned int type)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ynl_policy_attr *policy;</div><div class='del'>-	unsigned int type, len;</div><div class='ctx'> 	unsigned char *data;</div><div class='add'>+	unsigned int len;</div><div class='ctx'> </div><div class='ctx'> 	data = ynl_attr_data(attr);</div><div class='ctx'> 	len = ynl_attr_data_len(attr);</div><div class='del'>-	type = ynl_attr_type(attr);</div><div class='ctx'> 	if (type &gt; yarg-&gt;rsp_policy-&gt;max_attr) {</div><div class='ctx'> 		yerr(yarg-&gt;ys, YNL_ERROR_INTERNAL,</div><div class='ctx'> 		     "Internal error, validating unknown attribute");</div><div class='head'>diff --git a/tools/net/ynl/pyynl/cli.py b/tools/net/ynl/pyynl/cli.py<br/>index 8c192e900bd3..af02a5b7e5a2 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/cli.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/cli.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/cli.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/cli.py</a></div><div class='hunk'>@@ -7,9 +7,10 @@ import os</div><div class='ctx'> import pathlib</div><div class='ctx'> import pprint</div><div class='ctx'> import sys</div><div class='add'>+import textwrap</div><div class='ctx'> </div><div class='ctx'> sys.path.append(pathlib.Path(__file__).resolve().parent.as_posix())</div><div class='del'>-from lib import YnlFamily, Netlink, NlError</div><div class='add'>+from lib import YnlFamily, Netlink, NlError, SpecFamily</div><div class='ctx'> </div><div class='ctx'> sys_schema_dir='/usr/share/ynl'</div><div class='ctx'> relative_schema_dir='../../../../Documentation/netlink'</div><div class='hunk'>@@ -39,6 +40,60 @@ class YnlEncoder(json.JSONEncoder):</div><div class='ctx'>         return json.JSONEncoder.default(self, obj)</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+def print_attr_list(ynl, attr_names, attr_set, indent=2):</div><div class='add'>+    """Print a list of attributes with their types and documentation."""</div><div class='add'>+    prefix = ' ' * indent</div><div class='add'>+    for attr_name in attr_names:</div><div class='add'>+        if attr_name in attr_set.attrs:</div><div class='add'>+            attr = attr_set.attrs[attr_name]</div><div class='add'>+            attr_info = f'{prefix}- {attr_name}: {attr.type}'</div><div class='add'>+            if 'enum' in attr.yaml:</div><div class='add'>+                enum_name = attr.yaml['enum']</div><div class='add'>+                attr_info += f" (enum: {enum_name})"</div><div class='add'>+                # Print enum values if available</div><div class='add'>+                if enum_name in ynl.consts:</div><div class='add'>+                    const = ynl.consts[enum_name]</div><div class='add'>+                    enum_values = list(const.entries.keys())</div><div class='add'>+                    attr_info += f"\n{prefix}  {const.type.capitalize()}: {', '.join(enum_values)}"</div><div class='add'>+</div><div class='add'>+            # Show nested attributes reference and recursively display them</div><div class='add'>+            nested_set_name = None</div><div class='add'>+            if attr.type == 'nest' and 'nested-attributes' in attr.yaml:</div><div class='add'>+                nested_set_name = attr.yaml['nested-attributes']</div><div class='add'>+                attr_info += f" -&gt; {nested_set_name}"</div><div class='add'>+</div><div class='add'>+            if attr.yaml.get('doc'):</div><div class='add'>+                doc_text = textwrap.indent(attr.yaml['doc'], prefix + '  ')</div><div class='add'>+                attr_info += f"\n{doc_text}"</div><div class='add'>+            print(attr_info)</div><div class='add'>+</div><div class='add'>+            # Recursively show nested attributes</div><div class='add'>+            if nested_set_name in ynl.attr_sets:</div><div class='add'>+                nested_set = ynl.attr_sets[nested_set_name]</div><div class='add'>+                # Filter out 'unspec' and other unused attrs</div><div class='add'>+                nested_names = [n for n in nested_set.attrs.keys()</div><div class='add'>+                                if nested_set.attrs[n].type != 'unused']</div><div class='add'>+                if nested_names:</div><div class='add'>+                    print_attr_list(ynl, nested_names, nested_set, indent + 4)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def print_mode_attrs(ynl, mode, mode_spec, attr_set, print_request=True):</div><div class='add'>+    """Print a given mode (do/dump/event/notify)."""</div><div class='add'>+    mode_title = mode.capitalize()</div><div class='add'>+</div><div class='add'>+    if print_request and 'request' in mode_spec and 'attributes' in mode_spec['request']:</div><div class='add'>+        print(f'\n{mode_title} request attributes:')</div><div class='add'>+        print_attr_list(ynl, mode_spec['request']['attributes'], attr_set)</div><div class='add'>+</div><div class='add'>+    if 'reply' in mode_spec and 'attributes' in mode_spec['reply']:</div><div class='add'>+        print(f'\n{mode_title} reply attributes:')</div><div class='add'>+        print_attr_list(ynl, mode_spec['reply']['attributes'], attr_set)</div><div class='add'>+</div><div class='add'>+    if 'attributes' in mode_spec:</div><div class='add'>+        print(f'\n{mode_title} attributes:')</div><div class='add'>+        print_attr_list(ynl, mode_spec['attributes'], attr_set)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> def main():</div><div class='ctx'>     description = """</div><div class='ctx'>     YNL CLI utility - a general purpose netlink utility that uses YAML</div><div class='hunk'>@@ -70,6 +125,9 @@ def main():</div><div class='ctx'>     group.add_argument('--dump', dest='dump', metavar='DUMP-OPERATION', type=str)</div><div class='ctx'>     group.add_argument('--list-ops', action='store_true')</div><div class='ctx'>     group.add_argument('--list-msgs', action='store_true')</div><div class='add'>+    group.add_argument('--list-attrs', dest='list_attrs', metavar='OPERATION', type=str,</div><div class='add'>+                       help='List attributes for an operation')</div><div class='add'>+    group.add_argument('--validate', action='store_true')</div><div class='ctx'> </div><div class='ctx'>     parser.add_argument('--duration', dest='duration', type=int,</div><div class='ctx'>                         help='when subscribed, watch for DURATION seconds')</div><div class='hunk'>@@ -111,15 +169,25 @@ def main():</div><div class='ctx'> </div><div class='ctx'>     if args.family:</div><div class='ctx'>         spec = f"{spec_dir()}/{args.family}.yaml"</div><div class='del'>-        if args.schema is None and spec.startswith(sys_schema_dir):</div><div class='del'>-            args.schema = '' # disable schema validation when installed</div><div class='del'>-        if args.process_unknown is None:</div><div class='del'>-            args.process_unknown = True</div><div class='ctx'>     else:</div><div class='ctx'>         spec = args.spec</div><div class='ctx'>     if not os.path.isfile(spec):</div><div class='ctx'>         raise Exception(f"Spec file {spec} does not exist")</div><div class='ctx'> </div><div class='add'>+    if args.validate:</div><div class='add'>+        try:</div><div class='add'>+            SpecFamily(spec, args.schema)</div><div class='add'>+        except Exception as error:</div><div class='add'>+            print(error)</div><div class='add'>+            exit(1)</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    if args.family: # set behaviour when using installed specs</div><div class='add'>+        if args.schema is None and spec.startswith(sys_schema_dir):</div><div class='add'>+            args.schema = '' # disable schema validation when installed</div><div class='add'>+        if args.process_unknown is None:</div><div class='add'>+            args.process_unknown = True</div><div class='add'>+</div><div class='ctx'>     ynl = YnlFamily(spec, args.schema, args.process_unknown,</div><div class='ctx'>                     recv_size=args.dbg_small_recv)</div><div class='ctx'>     if args.dbg_small_recv:</div><div class='hunk'>@@ -135,6 +203,28 @@ def main():</div><div class='ctx'>         for op_name, op in ynl.msgs.items():</div><div class='ctx'>             print(op_name, " [", ", ".join(op.modes), "]")</div><div class='ctx'> </div><div class='add'>+    if args.list_attrs:</div><div class='add'>+        op = ynl.msgs.get(args.list_attrs)</div><div class='add'>+        if not op:</div><div class='add'>+            print(f'Operation {args.list_attrs} not found')</div><div class='add'>+            exit(1)</div><div class='add'>+</div><div class='add'>+        print(f'Operation: {op.name}')</div><div class='add'>+        print(op.yaml['doc'])</div><div class='add'>+</div><div class='add'>+        for mode in ['do', 'dump', 'event']:</div><div class='add'>+            if mode in op.yaml:</div><div class='add'>+                print_mode_attrs(ynl, mode, op.yaml[mode], op.attr_set, True)</div><div class='add'>+</div><div class='add'>+        if 'notify' in op.yaml:</div><div class='add'>+            mode_spec = op.yaml['notify']</div><div class='add'>+            ref_spec = ynl.msgs.get(mode_spec).yaml.get('do')</div><div class='add'>+            if ref_spec:</div><div class='add'>+                print_mode_attrs(ynl, 'notify', ref_spec, op.attr_set, False)</div><div class='add'>+</div><div class='add'>+        if 'mcgrp' in op.yaml:</div><div class='add'>+            print(f"\nMulticast group: {op.yaml['mcgrp']}")</div><div class='add'>+</div><div class='ctx'>     try:</div><div class='ctx'>         if args.do:</div><div class='ctx'>             reply = ynl.do(args.do, attrs, args.flags)</div><div class='head'>diff --git a/tools/net/ynl/pyynl/ethtool.py b/tools/net/ynl/pyynl/ethtool.py<br/>index cab6b576c876..fd0f6b8d54d1 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ethtool.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ethtool.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ethtool.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/ethtool.py</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='ctx'> </div><div class='ctx'> import argparse</div><div class='del'>-import json</div><div class='ctx'> import pathlib</div><div class='ctx'> import pprint</div><div class='ctx'> import sys</div><div class='hunk'>@@ -45,13 +44,16 @@ def print_field(reply, *desc):</div><div class='ctx'>     Pretty-print a set of fields from the reply. desc specifies the</div><div class='ctx'>     fields and the optional type (bool/yn).</div><div class='ctx'>     """</div><div class='add'>+    if not reply:</div><div class='add'>+        return</div><div class='add'>+</div><div class='ctx'>     if len(desc) == 0:</div><div class='ctx'>         return print_field(reply, *zip(reply.keys(), reply.keys()))</div><div class='ctx'> </div><div class='ctx'>     for spec in desc:</div><div class='ctx'>         try:</div><div class='ctx'>             field, name, tp = spec</div><div class='del'>-        except:</div><div class='add'>+        except ValueError:</div><div class='ctx'>             field, name = spec</div><div class='ctx'>             tp = 'int'</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +158,6 @@ def main():</div><div class='ctx'>     global args</div><div class='ctx'>     args = parser.parse_args()</div><div class='ctx'> </div><div class='del'>-    script_abs_dir = os.path.dirname(os.path.abspath(sys.argv[0]))</div><div class='ctx'>     spec = os.path.join(spec_dir(), 'ethtool.yaml')</div><div class='ctx'>     schema = os.path.join(schema_dir(), 'genetlink-legacy.yaml')</div><div class='ctx'> </div><div class='hunk'>@@ -255,14 +256,14 @@ def main():</div><div class='ctx'>         reply = dumpit(ynl, args, 'channels-get')</div><div class='ctx'>         print(f'Channel parameters for {args.device}:')</div><div class='ctx'> </div><div class='del'>-        print(f'Pre-set maximums:')</div><div class='add'>+        print('Pre-set maximums:')</div><div class='ctx'>         print_field(reply,</div><div class='ctx'>             ('rx-max', 'RX'),</div><div class='ctx'>             ('tx-max', 'TX'),</div><div class='ctx'>             ('other-max', 'Other'),</div><div class='ctx'>             ('combined-max', 'Combined'))</div><div class='ctx'> </div><div class='del'>-        print(f'Current hardware settings:')</div><div class='add'>+        print('Current hardware settings:')</div><div class='ctx'>         print_field(reply,</div><div class='ctx'>             ('rx-count', 'RX'),</div><div class='ctx'>             ('tx-count', 'TX'),</div><div class='hunk'>@@ -276,14 +277,14 @@ def main():</div><div class='ctx'> </div><div class='ctx'>         print(f'Ring parameters for {args.device}:')</div><div class='ctx'> </div><div class='del'>-        print(f'Pre-set maximums:')</div><div class='add'>+        print('Pre-set maximums:')</div><div class='ctx'>         print_field(reply,</div><div class='ctx'>             ('rx-max', 'RX'),</div><div class='ctx'>             ('rx-mini-max', 'RX Mini'),</div><div class='ctx'>             ('rx-jumbo-max', 'RX Jumbo'),</div><div class='ctx'>             ('tx-max', 'TX'))</div><div class='ctx'> </div><div class='del'>-        print(f'Current hardware settings:')</div><div class='add'>+        print('Current hardware settings:')</div><div class='ctx'>         print_field(reply,</div><div class='ctx'>             ('rx', 'RX'),</div><div class='ctx'>             ('rx-mini', 'RX Mini'),</div><div class='hunk'>@@ -298,7 +299,7 @@ def main():</div><div class='ctx'>         return</div><div class='ctx'> </div><div class='ctx'>     if args.statistics:</div><div class='del'>-        print(f'NIC statistics:')</div><div class='add'>+        print('NIC statistics:')</div><div class='ctx'> </div><div class='ctx'>         # TODO: pass id?</div><div class='ctx'>         strset = dumpit(ynl, args, 'strset-get')</div><div class='head'>diff --git a/tools/net/ynl/pyynl/lib/__init__.py b/tools/net/ynl/pyynl/lib/__init__.py<br/>index 71518b9842ee..ec9ea00071be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/__init__.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/__init__.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/__init__.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/lib/__init__.py</a></div><div class='hunk'>@@ -4,6 +4,8 @@ from .nlspec import SpecAttr, SpecAttrSet, SpecEnumEntry, SpecEnumSet, \</div><div class='ctx'>     SpecFamily, SpecOperation, SpecSubMessage, SpecSubMessageFormat</div><div class='ctx'> from .ynl import YnlFamily, Netlink, NlError</div><div class='ctx'> </div><div class='add'>+from .doc_generator import YnlDocGenerator</div><div class='add'>+</div><div class='ctx'> __all__ = ["SpecAttr", "SpecAttrSet", "SpecEnumEntry", "SpecEnumSet",</div><div class='ctx'>            "SpecFamily", "SpecOperation", "SpecSubMessage", "SpecSubMessageFormat",</div><div class='del'>-           "YnlFamily", "Netlink", "NlError"]</div><div class='add'>+           "YnlFamily", "Netlink", "NlError", "YnlDocGenerator"]</div><div class='head'>diff --git a/tools/net/ynl/pyynl/lib/doc_generator.py b/tools/net/ynl/pyynl/lib/doc_generator.py<br/>new file mode 100644<br/>index 000000000000..3a16b8eb01ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/doc_generator.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/lib/doc_generator.py</a></div><div class='hunk'>@@ -0,0 +1,402 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# -*- coding: utf-8; mode: python -*-</div><div class='add'>+</div><div class='add'>+"""</div><div class='add'>+    Class to auto generate the documentation for Netlink specifications.</div><div class='add'>+</div><div class='add'>+    :copyright:  Copyright (C) 2023  Breno Leitao &lt;leitao@debian.org&gt;</div><div class='add'>+    :license:    GPL Version 2, June 1991 see linux/COPYING for details.</div><div class='add'>+</div><div class='add'>+    This class performs extensive parsing to the Linux kernel's netlink YAML</div><div class='add'>+    spec files, in an effort to avoid needing to heavily mark up the original</div><div class='add'>+    YAML file.</div><div class='add'>+</div><div class='add'>+    This code is split in two classes:</div><div class='add'>+        1) RST formatters: Use to convert a string to a RST output</div><div class='add'>+        2) YAML Netlink (YNL) doc generator: Generate docs from YAML data</div><div class='add'>+"""</div><div class='add'>+</div><div class='add'>+from typing import Any, Dict, List</div><div class='add'>+import yaml</div><div class='add'>+</div><div class='add'>+LINE_STR = '__lineno__'</div><div class='add'>+</div><div class='add'>+class NumberedSafeLoader(yaml.SafeLoader):              # pylint: disable=R0901</div><div class='add'>+    """Override the SafeLoader class to add line number to parsed data"""</div><div class='add'>+</div><div class='add'>+    def construct_mapping(self, node, *args, **kwargs):</div><div class='add'>+        mapping = super().construct_mapping(node, *args, **kwargs)</div><div class='add'>+        mapping[LINE_STR] = node.start_mark.line</div><div class='add'>+</div><div class='add'>+        return mapping</div><div class='add'>+</div><div class='add'>+class RstFormatters:</div><div class='add'>+    """RST Formatters"""</div><div class='add'>+</div><div class='add'>+    SPACE_PER_LEVEL = 4</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def headroom(level: int) -&gt; str:</div><div class='add'>+        """Return space to format"""</div><div class='add'>+        return " " * (level * RstFormatters.SPACE_PER_LEVEL)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def bold(text: str) -&gt; str:</div><div class='add'>+        """Format bold text"""</div><div class='add'>+        return f"**{text}**"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def inline(text: str) -&gt; str:</div><div class='add'>+        """Format inline text"""</div><div class='add'>+        return f"``{text}``"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def sanitize(text: str) -&gt; str:</div><div class='add'>+        """Remove newlines and multiple spaces"""</div><div class='add'>+        # This is useful for some fields that are spread across multiple lines</div><div class='add'>+        return str(text).replace("\n", " ").strip()</div><div class='add'>+</div><div class='add'>+    def rst_fields(self, key: str, value: str, level: int = 0) -&gt; str:</div><div class='add'>+        """Return a RST formatted field"""</div><div class='add'>+        return self.headroom(level) + f":{key}: {value}"</div><div class='add'>+</div><div class='add'>+    def rst_definition(self, key: str, value: Any, level: int = 0) -&gt; str:</div><div class='add'>+        """Format a single rst definition"""</div><div class='add'>+        return self.headroom(level) + key + "\n" + self.headroom(level + 1) + str(value)</div><div class='add'>+</div><div class='add'>+    def rst_paragraph(self, paragraph: str, level: int = 0) -&gt; str:</div><div class='add'>+        """Return a formatted paragraph"""</div><div class='add'>+        return self.headroom(level) + paragraph</div><div class='add'>+</div><div class='add'>+    def rst_bullet(self, item: str, level: int = 0) -&gt; str:</div><div class='add'>+        """Return a formatted a bullet"""</div><div class='add'>+        return self.headroom(level) + f"- {item}"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_subsection(title: str) -&gt; str:</div><div class='add'>+        """Add a sub-section to the document"""</div><div class='add'>+        return f"{title}\n" + "-" * len(title)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_subsubsection(title: str) -&gt; str:</div><div class='add'>+        """Add a sub-sub-section to the document"""</div><div class='add'>+        return f"{title}\n" + "~" * len(title)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_section(namespace: str, prefix: str, title: str) -&gt; str:</div><div class='add'>+        """Add a section to the document"""</div><div class='add'>+        return f".. _{namespace}-{prefix}-{title}:\n\n{title}\n" + "=" * len(title)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_subtitle(title: str) -&gt; str:</div><div class='add'>+        """Add a subtitle to the document"""</div><div class='add'>+        return "\n" + "-" * len(title) + f"\n{title}\n" + "-" * len(title) + "\n\n"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_title(title: str) -&gt; str:</div><div class='add'>+        """Add a title to the document"""</div><div class='add'>+        return "=" * len(title) + f"\n{title}\n" + "=" * len(title) + "\n\n"</div><div class='add'>+</div><div class='add'>+    def rst_list_inline(self, list_: List[str], level: int = 0) -&gt; str:</div><div class='add'>+        """Format a list using inlines"""</div><div class='add'>+        return self.headroom(level) + "[" + ", ".join(self.inline(i) for i in list_) + "]"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_ref(namespace: str, prefix: str, name: str) -&gt; str:</div><div class='add'>+        """Add a hyperlink to the document"""</div><div class='add'>+        mappings = {'enum': 'definition',</div><div class='add'>+                    'fixed-header': 'definition',</div><div class='add'>+                    'nested-attributes': 'attribute-set',</div><div class='add'>+                    'struct': 'definition'}</div><div class='add'>+        if prefix in mappings:</div><div class='add'>+            prefix = mappings[prefix]</div><div class='add'>+        return f":ref:`{namespace}-{prefix}-{name}`"</div><div class='add'>+</div><div class='add'>+    def rst_header(self) -&gt; str:</div><div class='add'>+        """The headers for all the auto generated RST files"""</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        lines.append(self.rst_paragraph(".. SPDX-License-Identifier: GPL-2.0"))</div><div class='add'>+        lines.append(self.rst_paragraph(".. NOTE: This document was auto-generated.\n\n"))</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_toctree(maxdepth: int = 2) -&gt; str:</div><div class='add'>+        """Generate a toctree RST primitive"""</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        lines.append(".. toctree::")</div><div class='add'>+        lines.append(f"   :maxdepth: {maxdepth}\n\n")</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_label(title: str) -&gt; str:</div><div class='add'>+        """Return a formatted label"""</div><div class='add'>+        return f".. _{title}:\n\n"</div><div class='add'>+</div><div class='add'>+    @staticmethod</div><div class='add'>+    def rst_lineno(lineno: int) -&gt; str:</div><div class='add'>+        """Return a lineno comment"""</div><div class='add'>+        return f".. LINENO {lineno}\n"</div><div class='add'>+</div><div class='add'>+class YnlDocGenerator:</div><div class='add'>+    """YAML Netlink specs Parser"""</div><div class='add'>+</div><div class='add'>+    fmt = RstFormatters()</div><div class='add'>+</div><div class='add'>+    def parse_mcast_group(self, mcast_group: List[Dict[str, Any]]) -&gt; str:</div><div class='add'>+        """Parse 'multicast' group list and return a formatted string"""</div><div class='add'>+        lines = []</div><div class='add'>+        for group in mcast_group:</div><div class='add'>+            lines.append(self.fmt.rst_bullet(group["name"]))</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_do(self, do_dict: Dict[str, Any], level: int = 0) -&gt; str:</div><div class='add'>+        """Parse 'do' section and return a formatted string"""</div><div class='add'>+        lines = []</div><div class='add'>+        if LINE_STR in do_dict:</div><div class='add'>+            lines.append(self.fmt.rst_lineno(do_dict[LINE_STR]))</div><div class='add'>+</div><div class='add'>+        for key in do_dict.keys():</div><div class='add'>+            if key == LINE_STR:</div><div class='add'>+                continue</div><div class='add'>+            lines.append(self.fmt.rst_paragraph(self.fmt.bold(key), level + 1))</div><div class='add'>+            if key in ['request', 'reply']:</div><div class='add'>+                lines.append(self.parse_do_attributes(do_dict[key], level + 1) + "\n")</div><div class='add'>+            else:</div><div class='add'>+                lines.append(self.fmt.headroom(level + 2) + do_dict[key] + "\n")</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_do_attributes(self, attrs: Dict[str, Any], level: int = 0) -&gt; str:</div><div class='add'>+        """Parse 'attributes' section"""</div><div class='add'>+        if "attributes" not in attrs:</div><div class='add'>+            return ""</div><div class='add'>+        lines = [self.fmt.rst_fields("attributes",</div><div class='add'>+                                     self.fmt.rst_list_inline(attrs["attributes"]),</div><div class='add'>+                                     level + 1)]</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_operations(self, operations: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='add'>+        """Parse operations block"""</div><div class='add'>+        preprocessed = ["name", "doc", "title", "do", "dump", "flags"]</div><div class='add'>+        linkable = ["fixed-header", "attribute-set"]</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        for operation in operations:</div><div class='add'>+            if LINE_STR in operation:</div><div class='add'>+                lines.append(self.fmt.rst_lineno(operation[LINE_STR]))</div><div class='add'>+</div><div class='add'>+            lines.append(self.fmt.rst_section(namespace, 'operation',</div><div class='add'>+                                              operation["name"]))</div><div class='add'>+            lines.append(self.fmt.rst_paragraph(operation["doc"]) + "\n")</div><div class='add'>+</div><div class='add'>+            for key in operation.keys():</div><div class='add'>+                if key == LINE_STR:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                if key in preprocessed:</div><div class='add'>+                    # Skip the special fields</div><div class='add'>+                    continue</div><div class='add'>+                value = operation[key]</div><div class='add'>+                if key in linkable:</div><div class='add'>+                    value = self.fmt.rst_ref(namespace, key, value)</div><div class='add'>+                lines.append(self.fmt.rst_fields(key, value, 0))</div><div class='add'>+            if 'flags' in operation:</div><div class='add'>+                lines.append(self.fmt.rst_fields('flags',</div><div class='add'>+                                                 self.fmt.rst_list_inline(operation['flags'])))</div><div class='add'>+</div><div class='add'>+            if "do" in operation:</div><div class='add'>+                lines.append(self.fmt.rst_paragraph(":do:", 0))</div><div class='add'>+                lines.append(self.parse_do(operation["do"], 0))</div><div class='add'>+            if "dump" in operation:</div><div class='add'>+                lines.append(self.fmt.rst_paragraph(":dump:", 0))</div><div class='add'>+                lines.append(self.parse_do(operation["dump"], 0))</div><div class='add'>+</div><div class='add'>+            # New line after fields</div><div class='add'>+            lines.append("\n")</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_entries(self, entries: List[Dict[str, Any]], level: int) -&gt; str:</div><div class='add'>+        """Parse a list of entries"""</div><div class='add'>+        ignored = ["pad"]</div><div class='add'>+        lines = []</div><div class='add'>+        for entry in entries:</div><div class='add'>+            if isinstance(entry, dict):</div><div class='add'>+                # entries could be a list or a dictionary</div><div class='add'>+                field_name = entry.get("name", "")</div><div class='add'>+                if field_name in ignored:</div><div class='add'>+                    continue</div><div class='add'>+                type_ = entry.get("type")</div><div class='add'>+                if type_:</div><div class='add'>+                    field_name += f" ({self.fmt.inline(type_)})"</div><div class='add'>+                lines.append(</div><div class='add'>+                    self.fmt.rst_fields(field_name,</div><div class='add'>+                                        self.fmt.sanitize(entry.get("doc", "")),</div><div class='add'>+                                        level)</div><div class='add'>+                )</div><div class='add'>+            elif isinstance(entry, list):</div><div class='add'>+                lines.append(self.fmt.rst_list_inline(entry, level))</div><div class='add'>+            else:</div><div class='add'>+                lines.append(self.fmt.rst_bullet(self.fmt.inline(self.fmt.sanitize(entry)),</div><div class='add'>+                                                 level))</div><div class='add'>+</div><div class='add'>+        lines.append("\n")</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_definitions(self, defs: Dict[str, Any], namespace: str) -&gt; str:</div><div class='add'>+        """Parse definitions section"""</div><div class='add'>+        preprocessed = ["name", "entries", "members"]</div><div class='add'>+        ignored = ["render-max"]  # This is not printed</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        for definition in defs:</div><div class='add'>+            if LINE_STR in definition:</div><div class='add'>+                lines.append(self.fmt.rst_lineno(definition[LINE_STR]))</div><div class='add'>+</div><div class='add'>+            lines.append(self.fmt.rst_section(namespace, 'definition', definition["name"]))</div><div class='add'>+            for k in definition.keys():</div><div class='add'>+                if k == LINE_STR:</div><div class='add'>+                    continue</div><div class='add'>+                if k in preprocessed + ignored:</div><div class='add'>+                    continue</div><div class='add'>+                lines.append(self.fmt.rst_fields(k, self.fmt.sanitize(definition[k]), 0))</div><div class='add'>+</div><div class='add'>+            # Field list needs to finish with a new line</div><div class='add'>+            lines.append("\n")</div><div class='add'>+            if "entries" in definition:</div><div class='add'>+                lines.append(self.fmt.rst_paragraph(":entries:", 0))</div><div class='add'>+                lines.append(self.parse_entries(definition["entries"], 1))</div><div class='add'>+            if "members" in definition:</div><div class='add'>+                lines.append(self.fmt.rst_paragraph(":members:", 0))</div><div class='add'>+                lines.append(self.parse_entries(definition["members"], 1))</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_attr_sets(self, entries: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='add'>+        """Parse attribute from attribute-set"""</div><div class='add'>+        preprocessed = ["name", "type"]</div><div class='add'>+        linkable = ["enum", "nested-attributes", "struct", "sub-message"]</div><div class='add'>+        ignored = ["checks"]</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        for entry in entries:</div><div class='add'>+            lines.append(self.fmt.rst_section(namespace, 'attribute-set',</div><div class='add'>+                                              entry["name"]))</div><div class='add'>+</div><div class='add'>+            if "doc" in entry:</div><div class='add'>+                lines.append(self.fmt.rst_paragraph(entry["doc"], 0) + "\n")</div><div class='add'>+</div><div class='add'>+            for attr in entry["attributes"]:</div><div class='add'>+                if LINE_STR in attr:</div><div class='add'>+                    lines.append(self.fmt.rst_lineno(attr[LINE_STR]))</div><div class='add'>+</div><div class='add'>+                type_ = attr.get("type")</div><div class='add'>+                attr_line = attr["name"]</div><div class='add'>+                if type_:</div><div class='add'>+                    # Add the attribute type in the same line</div><div class='add'>+                    attr_line += f" ({self.fmt.inline(type_)})"</div><div class='add'>+</div><div class='add'>+                lines.append(self.fmt.rst_subsubsection(attr_line))</div><div class='add'>+</div><div class='add'>+                for k in attr.keys():</div><div class='add'>+                    if k == LINE_STR:</div><div class='add'>+                        continue</div><div class='add'>+                    if k in preprocessed + ignored:</div><div class='add'>+                        continue</div><div class='add'>+                    if k in linkable:</div><div class='add'>+                        value = self.fmt.rst_ref(namespace, k, attr[k])</div><div class='add'>+                    else:</div><div class='add'>+                        value = self.fmt.sanitize(attr[k])</div><div class='add'>+                    lines.append(self.fmt.rst_fields(k, value, 0))</div><div class='add'>+                lines.append("\n")</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_sub_messages(self, entries: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='add'>+        """Parse sub-message definitions"""</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        for entry in entries:</div><div class='add'>+            lines.append(self.fmt.rst_section(namespace, 'sub-message',</div><div class='add'>+                                              entry["name"]))</div><div class='add'>+            for fmt in entry["formats"]:</div><div class='add'>+                value = fmt["value"]</div><div class='add'>+</div><div class='add'>+                lines.append(self.fmt.rst_bullet(self.fmt.bold(value)))</div><div class='add'>+                for attr in ['fixed-header', 'attribute-set']:</div><div class='add'>+                    if attr in fmt:</div><div class='add'>+                        lines.append(self.fmt.rst_fields(attr,</div><div class='add'>+                                                         self.fmt.rst_ref(namespace,</div><div class='add'>+                                                                          attr,</div><div class='add'>+                                                                          fmt[attr]),</div><div class='add'>+                                                         1))</div><div class='add'>+                lines.append("\n")</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    def parse_yaml(self, obj: Dict[str, Any]) -&gt; str:</div><div class='add'>+        """Format the whole YAML into a RST string"""</div><div class='add'>+        lines = []</div><div class='add'>+</div><div class='add'>+        # Main header</div><div class='add'>+        lineno = obj.get('__lineno__', 0)</div><div class='add'>+        lines.append(self.fmt.rst_lineno(lineno))</div><div class='add'>+</div><div class='add'>+        family = obj['name']</div><div class='add'>+</div><div class='add'>+        lines.append(self.fmt.rst_header())</div><div class='add'>+        lines.append(self.fmt.rst_label("netlink-" + family))</div><div class='add'>+</div><div class='add'>+        title = f"Family ``{family}`` netlink specification"</div><div class='add'>+        lines.append(self.fmt.rst_title(title))</div><div class='add'>+        lines.append(self.fmt.rst_paragraph(".. contents:: :depth: 3\n"))</div><div class='add'>+</div><div class='add'>+        if "doc" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Summary"))</div><div class='add'>+            lines.append(self.fmt.rst_paragraph(obj["doc"], 0))</div><div class='add'>+</div><div class='add'>+        # Operations</div><div class='add'>+        if "operations" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Operations"))</div><div class='add'>+            lines.append(self.parse_operations(obj["operations"]["list"],</div><div class='add'>+                                               family))</div><div class='add'>+</div><div class='add'>+        # Multicast groups</div><div class='add'>+        if "mcast-groups" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Multicast groups"))</div><div class='add'>+            lines.append(self.parse_mcast_group(obj["mcast-groups"]["list"]))</div><div class='add'>+</div><div class='add'>+        # Definitions</div><div class='add'>+        if "definitions" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Definitions"))</div><div class='add'>+            lines.append(self.parse_definitions(obj["definitions"], family))</div><div class='add'>+</div><div class='add'>+        # Attributes set</div><div class='add'>+        if "attribute-sets" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Attribute sets"))</div><div class='add'>+            lines.append(self.parse_attr_sets(obj["attribute-sets"], family))</div><div class='add'>+</div><div class='add'>+        # Sub-messages</div><div class='add'>+        if "sub-messages" in obj:</div><div class='add'>+            lines.append(self.fmt.rst_subtitle("Sub-messages"))</div><div class='add'>+            lines.append(self.parse_sub_messages(obj["sub-messages"], family))</div><div class='add'>+</div><div class='add'>+        return "\n".join(lines)</div><div class='add'>+</div><div class='add'>+    # Main functions</div><div class='add'>+    # ==============</div><div class='add'>+</div><div class='add'>+    def parse_yaml_file(self, filename: str) -&gt; str:</div><div class='add'>+        """Transform the YAML specified by filename into an RST-formatted string"""</div><div class='add'>+        with open(filename, "r", encoding="utf-8") as spec_file:</div><div class='add'>+            numbered_yaml = yaml.load(spec_file, Loader=NumberedSafeLoader)</div><div class='add'>+            content = self.parse_yaml(numbered_yaml)</div><div class='add'>+</div><div class='add'>+        return content</div><div class='head'>diff --git a/tools/net/ynl/pyynl/lib/nlspec.py b/tools/net/ynl/pyynl/lib/nlspec.py<br/>index 314ec8007496..85c17fe01e35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/nlspec.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/nlspec.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/nlspec.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/lib/nlspec.py</a></div><div class='hunk'>@@ -501,7 +501,7 @@ class SpecFamily(SpecElement):</div><div class='ctx'>         return SpecStruct(self, elem)</div><div class='ctx'> </div><div class='ctx'>     def new_sub_message(self, elem):</div><div class='del'>-        return SpecSubMessage(self, elem);</div><div class='add'>+        return SpecSubMessage(self, elem)</div><div class='ctx'> </div><div class='ctx'>     def new_operation(self, elem, req_val, rsp_val):</div><div class='ctx'>         return SpecOperation(self, elem, req_val, rsp_val)</div><div class='head'>diff --git a/tools/net/ynl/pyynl/lib/ynl.py b/tools/net/ynl/pyynl/lib/ynl.py<br/>index 8244a5f440b2..36d36eb7e3b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/ynl.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/lib/ynl.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/lib/ynl.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/lib/ynl.py</a></div><div class='hunk'>@@ -9,7 +9,6 @@ import socket</div><div class='ctx'> import struct</div><div class='ctx'> from struct import Struct</div><div class='ctx'> import sys</div><div class='del'>-import yaml</div><div class='ctx'> import ipaddress</div><div class='ctx'> import uuid</div><div class='ctx'> import queue</div><div class='hunk'>@@ -101,12 +100,21 @@ class Netlink:</div><div class='ctx'>                                   'bitfield32', 'sint', 'uint'])</div><div class='ctx'> </div><div class='ctx'> class NlError(Exception):</div><div class='del'>-  def __init__(self, nl_msg):</div><div class='del'>-    self.nl_msg = nl_msg</div><div class='del'>-    self.error = -nl_msg.error</div><div class='del'>-</div><div class='del'>-  def __str__(self):</div><div class='del'>-    return f"Netlink error: {os.strerror(self.error)}\n{self.nl_msg}"</div><div class='add'>+    def __init__(self, nl_msg):</div><div class='add'>+        self.nl_msg = nl_msg</div><div class='add'>+        self.error = -nl_msg.error</div><div class='add'>+</div><div class='add'>+    def __str__(self):</div><div class='add'>+        msg = "Netlink error: "</div><div class='add'>+</div><div class='add'>+        extack = self.nl_msg.extack.copy() if self.nl_msg.extack else {}</div><div class='add'>+        if 'msg' in extack:</div><div class='add'>+            msg += extack['msg'] + ': '</div><div class='add'>+            del extack['msg']</div><div class='add'>+        msg += os.strerror(self.error)</div><div class='add'>+        if extack:</div><div class='add'>+            msg += ' ' + str(extack)</div><div class='add'>+        return msg</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> class ConfigError(Exception):</div><div class='hunk'>@@ -562,11 +570,13 @@ class YnlFamily(SpecFamily):</div><div class='ctx'> </div><div class='ctx'>         if attr["type"] == 'nest':</div><div class='ctx'>             nl_type |= Netlink.NLA_F_NESTED</div><div class='del'>-            attr_payload = b''</div><div class='ctx'>             sub_space = attr['nested-attributes']</div><div class='del'>-            sub_attrs = SpaceAttrs(self.attr_sets[sub_space], value, search_attrs)</div><div class='del'>-            for subname, subvalue in value.items():</div><div class='del'>-                attr_payload += self._add_attr(sub_space, subname, subvalue, sub_attrs)</div><div class='add'>+            attr_payload = self._add_nest_attrs(value, sub_space, search_attrs)</div><div class='add'>+        elif attr['type'] == 'indexed-array' and attr['sub-type'] == 'nest':</div><div class='add'>+            nl_type |= Netlink.NLA_F_NESTED</div><div class='add'>+            sub_space = attr['nested-attributes']</div><div class='add'>+            attr_payload = self._encode_indexed_array(value, sub_space,</div><div class='add'>+                                                      search_attrs)</div><div class='ctx'>         elif attr["type"] == 'flag':</div><div class='ctx'>             if not value:</div><div class='ctx'>                 # If value is absent or false then skip attribute creation.</div><div class='hunk'>@@ -620,9 +630,28 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>         else:</div><div class='ctx'>             raise Exception(f'Unknown type at {space} {name} {value} {attr["type"]}')</div><div class='ctx'> </div><div class='add'>+        return self._add_attr_raw(nl_type, attr_payload)</div><div class='add'>+</div><div class='add'>+    def _add_attr_raw(self, nl_type, attr_payload):</div><div class='ctx'>         pad = b'\x00' * ((4 - len(attr_payload) % 4) % 4)</div><div class='ctx'>         return struct.pack('HH', len(attr_payload) + 4, nl_type) + attr_payload + pad</div><div class='ctx'> </div><div class='add'>+    def _add_nest_attrs(self, value, sub_space, search_attrs):</div><div class='add'>+        sub_attrs = SpaceAttrs(self.attr_sets[sub_space], value, search_attrs)</div><div class='add'>+        attr_payload = b''</div><div class='add'>+        for subname, subvalue in value.items():</div><div class='add'>+            attr_payload += self._add_attr(sub_space, subname, subvalue,</div><div class='add'>+                                           sub_attrs)</div><div class='add'>+        return attr_payload</div><div class='add'>+</div><div class='add'>+    def _encode_indexed_array(self, vals, sub_space, search_attrs):</div><div class='add'>+        attr_payload = b''</div><div class='add'>+        for i, val in enumerate(vals):</div><div class='add'>+            idx = i | Netlink.NLA_F_NESTED</div><div class='add'>+            val_payload = self._add_nest_attrs(val, sub_space, search_attrs)</div><div class='add'>+            attr_payload += self._add_attr_raw(idx, val_payload)</div><div class='add'>+        return attr_payload</div><div class='add'>+</div><div class='ctx'>     def _get_enum_or_unknown(self, enum, raw):</div><div class='ctx'>         try:</div><div class='ctx'>             name = enum.entries_by_val[raw].name</div><div class='hunk'>@@ -706,7 +735,7 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>             return attr.as_bin()</div><div class='ctx'> </div><div class='ctx'>     def _rsp_add(self, rsp, name, is_multi, decoded):</div><div class='del'>-        if is_multi == None:</div><div class='add'>+        if is_multi is None:</div><div class='ctx'>             if name in rsp and type(rsp[name]) is not list:</div><div class='ctx'>                 rsp[name] = [rsp[name]]</div><div class='ctx'>                 is_multi = True</div><div class='hunk'>@@ -739,14 +768,14 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>         decoded = {}</div><div class='ctx'>         offset = 0</div><div class='ctx'>         if msg_format.fixed_header:</div><div class='del'>-            decoded.update(self._decode_struct(attr.raw, msg_format.fixed_header));</div><div class='add'>+            decoded.update(self._decode_struct(attr.raw, msg_format.fixed_header))</div><div class='ctx'>             offset = self._struct_size(msg_format.fixed_header)</div><div class='ctx'>         if msg_format.attr_set:</div><div class='ctx'>             if msg_format.attr_set in self.attr_sets:</div><div class='ctx'>                 subdict = self._decode(NlAttrs(attr.raw, offset), msg_format.attr_set)</div><div class='ctx'>                 decoded.update(subdict)</div><div class='ctx'>             else:</div><div class='del'>-                raise Exception(f"Unknown attribute-set '{attr_space}' when decoding '{attr_spec.name}'")</div><div class='add'>+                raise Exception(f"Unknown attribute-set '{msg_format.attr_set}' when decoding '{attr_spec.name}'")</div><div class='ctx'>         return decoded</div><div class='ctx'> </div><div class='ctx'>     def _decode(self, attrs, space, outer_attrs = None):</div><div class='hunk'>@@ -936,7 +965,7 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>                 formatted = hex(raw)</div><div class='ctx'>             else:</div><div class='ctx'>                 formatted = bytes.hex(raw, ' ')</div><div class='del'>-        elif display_hint in [ 'ipv4', 'ipv6' ]:</div><div class='add'>+        elif display_hint in [ 'ipv4', 'ipv6', 'ipv4-or-v6' ]:</div><div class='ctx'>             formatted = format(ipaddress.ip_address(raw))</div><div class='ctx'>         elif display_hint == 'uuid':</div><div class='ctx'>             formatted = str(uuid.UUID(bytes=raw))</div><div class='hunk'>@@ -945,12 +974,26 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>         return formatted</div><div class='ctx'> </div><div class='ctx'>     def _from_string(self, string, attr_spec):</div><div class='del'>-        if attr_spec.display_hint in ['ipv4', 'ipv6']:</div><div class='add'>+        if attr_spec.display_hint in ['ipv4', 'ipv6', 'ipv4-or-v6']:</div><div class='ctx'>             ip = ipaddress.ip_address(string)</div><div class='ctx'>             if attr_spec['type'] == 'binary':</div><div class='ctx'>                 raw = ip.packed</div><div class='ctx'>             else:</div><div class='ctx'>                 raw = int(ip)</div><div class='add'>+        elif attr_spec.display_hint == 'hex':</div><div class='add'>+            if attr_spec['type'] == 'binary':</div><div class='add'>+                raw = bytes.fromhex(string)</div><div class='add'>+            else:</div><div class='add'>+                raw = int(string, 16)</div><div class='add'>+        elif attr_spec.display_hint == 'mac':</div><div class='add'>+            # Parse MAC address in format "00:11:22:33:44:55" or "001122334455"</div><div class='add'>+            if ':' in string:</div><div class='add'>+                mac_bytes = [int(x, 16) for x in string.split(':')]</div><div class='add'>+            else:</div><div class='add'>+                if len(string) % 2 != 0:</div><div class='add'>+                    raise Exception(f"Invalid MAC address format: {string}")</div><div class='add'>+                mac_bytes = [int(string[i:i+2], 16) for i in range(0, len(string), 2)]</div><div class='add'>+            raw = bytes(mac_bytes)</div><div class='ctx'>         else:</div><div class='ctx'>             raise Exception(f"Display hint '{attr_spec.display_hint}' not implemented"</div><div class='ctx'>                             f" when parsing '{attr_spec['name']}'")</div><div class='hunk'>@@ -1014,15 +1057,15 @@ class YnlFamily(SpecFamily):</div><div class='ctx'>                     self.check_ntf()</div><div class='ctx'> </div><div class='ctx'>     def operation_do_attributes(self, name):</div><div class='del'>-      """</div><div class='del'>-      For a given operation name, find and return a supported</div><div class='del'>-      set of attributes (as a dict).</div><div class='del'>-      """</div><div class='del'>-      op = self.find_operation(name)</div><div class='del'>-      if not op:</div><div class='del'>-        return None</div><div class='del'>-</div><div class='del'>-      return op['do']['request']['attributes'].copy()</div><div class='add'>+        """</div><div class='add'>+        For a given operation name, find and return a supported</div><div class='add'>+        set of attributes (as a dict).</div><div class='add'>+        """</div><div class='add'>+        op = self.find_operation(name)</div><div class='add'>+        if not op:</div><div class='add'>+            return None</div><div class='add'>+</div><div class='add'>+        return op['do']['request']['attributes'].copy()</div><div class='ctx'> </div><div class='ctx'>     def _encode_message(self, op, vals, flags, req_seq):</div><div class='ctx'>         nl_flags = Netlink.NLM_F_REQUEST | Netlink.NLM_F_ACK</div><div class='head'>diff --git a/tools/net/ynl/pyynl/ynl_gen_c.py b/tools/net/ynl/pyynl/ynl_gen_c.py<br/>index ef032e17fec4..b517d0c605ad 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ynl_gen_c.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ynl_gen_c.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ynl_gen_c.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/ynl_gen_c.py</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='ctx'> </div><div class='ctx'> import argparse</div><div class='del'>-import collections</div><div class='ctx'> import filecmp</div><div class='ctx'> import pathlib</div><div class='ctx'> import os</div><div class='hunk'>@@ -14,7 +13,7 @@ import yaml</div><div class='ctx'> </div><div class='ctx'> sys.path.append(pathlib.Path(__file__).resolve().parent.as_posix())</div><div class='ctx'> from lib import SpecFamily, SpecAttrSet, SpecAttr, SpecOperation, SpecEnumSet, SpecEnumEntry</div><div class='del'>-from lib import SpecSubMessage, SpecSubMessageFormat</div><div class='add'>+from lib import SpecSubMessage</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> def c_upper(name):</div><div class='hunk'>@@ -243,7 +242,7 @@ class Type(SpecAttr):</div><div class='ctx'>         raise Exception(f"Attr get not implemented for class type {self.type}")</div><div class='ctx'> </div><div class='ctx'>     def attr_get(self, ri, var, first):</div><div class='del'>-        lines, init_lines, local_vars = self._attr_get(ri, var)</div><div class='add'>+        lines, init_lines, _ = self._attr_get(ri, var)</div><div class='ctx'>         if type(lines) is str:</div><div class='ctx'>             lines = [lines]</div><div class='ctx'>         if type(init_lines) is str:</div><div class='hunk'>@@ -251,10 +250,6 @@ class Type(SpecAttr):</div><div class='ctx'> </div><div class='ctx'>         kw = 'if' if first else 'else if'</div><div class='ctx'>         ri.cw.block_start(line=f"{kw} (type == {self.enum_name})")</div><div class='del'>-        if local_vars:</div><div class='del'>-            for local in local_vars:</div><div class='del'>-                ri.cw.p(local)</div><div class='del'>-            ri.cw.nl()</div><div class='ctx'> </div><div class='ctx'>         if not self.is_multi_val():</div><div class='ctx'>             ri.cw.p("if (ynl_attr_validate(yarg, attr))")</div><div class='hunk'>@@ -398,7 +393,7 @@ class TypeScalar(Type):</div><div class='ctx'>         if 'enum' in self.attr:</div><div class='ctx'>             enum = self.family.consts[self.attr['enum']]</div><div class='ctx'>             low, high = enum.value_range()</div><div class='del'>-            if low == None and high == None:</div><div class='add'>+            if low is None and high is None:</div><div class='ctx'>                 self.checks['sparse'] = True</div><div class='ctx'>             else:</div><div class='ctx'>                 if 'min' not in self.checks:</div><div class='hunk'>@@ -485,7 +480,7 @@ class TypeString(Type):</div><div class='ctx'>         ri.cw.p(f"char *{self.c_name};")</div><div class='ctx'> </div><div class='ctx'>     def _attr_typol(self):</div><div class='del'>-        typol = f'.type = YNL_PT_NUL_STR, '</div><div class='add'>+        typol = '.type = YNL_PT_NUL_STR, '</div><div class='ctx'>         if self.is_selector:</div><div class='ctx'>             typol += '.is_selector = 1, '</div><div class='ctx'>         return typol</div><div class='hunk'>@@ -539,7 +534,7 @@ class TypeBinary(Type):</div><div class='ctx'>         ri.cw.p(f"void *{self.c_name};")</div><div class='ctx'> </div><div class='ctx'>     def _attr_typol(self):</div><div class='del'>-        return f'.type = YNL_PT_BINARY,'</div><div class='add'>+        return '.type = YNL_PT_BINARY,'</div><div class='ctx'> </div><div class='ctx'>     def _attr_policy(self, policy):</div><div class='ctx'>         if len(self.checks) == 0:</div><div class='hunk'>@@ -556,7 +551,7 @@ class TypeBinary(Type):</div><div class='ctx'>         elif 'exact-len' in self.checks:</div><div class='ctx'>             mem = 'NLA_POLICY_EXACT_LEN(' + self.get_limit_str('exact-len') + ')'</div><div class='ctx'>         elif 'min-len' in self.checks:</div><div class='del'>-            mem = '{ .len = ' + self.get_limit_str('min-len') + ', }'</div><div class='add'>+            mem = 'NLA_POLICY_MIN_LEN(' + self.get_limit_str('min-len') + ')'</div><div class='ctx'>         elif 'max-len' in self.checks:</div><div class='ctx'>             mem = 'NLA_POLICY_MAX_LEN(' + self.get_limit_str('max-len') + ')'</div><div class='ctx'> </div><div class='hunk'>@@ -636,10 +631,10 @@ class TypeBitfield32(Type):</div><div class='ctx'>         return "struct nla_bitfield32"</div><div class='ctx'> </div><div class='ctx'>     def _attr_typol(self):</div><div class='del'>-        return f'.type = YNL_PT_BITFIELD32, '</div><div class='add'>+        return '.type = YNL_PT_BITFIELD32, '</div><div class='ctx'> </div><div class='ctx'>     def _attr_policy(self, policy):</div><div class='del'>-        if not 'enum' in self.attr:</div><div class='add'>+        if 'enum' not in self.attr:</div><div class='ctx'>             raise Exception('Enum required for bitfield32 attr')</div><div class='ctx'>         enum = self.family.consts[self.attr['enum']]</div><div class='ctx'>         mask = enum.get_mask(as_flags=True)</div><div class='hunk'>@@ -725,7 +720,11 @@ class TypeMultiAttr(Type):</div><div class='ctx'>             return 'struct ynl_string *'</div><div class='ctx'>         elif self.attr['type'] in scalars:</div><div class='ctx'>             scalar_pfx = '__' if ri.ku_space == 'user' else ''</div><div class='del'>-            return scalar_pfx + self.attr['type']</div><div class='add'>+            if self.is_auto_scalar:</div><div class='add'>+                name = self.type[0] + '64'</div><div class='add'>+            else:</div><div class='add'>+                name = self.attr['type']</div><div class='add'>+            return scalar_pfx + name</div><div class='ctx'>         else:</div><div class='ctx'>             raise Exception(f"Sub-type {self.attr['type']} not supported yet")</div><div class='ctx'> </div><div class='hunk'>@@ -792,7 +791,7 @@ class TypeMultiAttr(Type):</div><div class='ctx'>                 f"{presence} = n_{self.c_name};"]</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-class TypeArrayNest(Type):</div><div class='add'>+class TypeIndexedArray(Type):</div><div class='ctx'>     def is_multi_val(self):</div><div class='ctx'>         return True</div><div class='ctx'> </div><div class='hunk'>@@ -816,21 +815,28 @@ class TypeArrayNest(Type):</div><div class='ctx'>                     f'unsigned int n_{self.c_name}']</div><div class='ctx'>         return super().arg_member(ri)</div><div class='ctx'> </div><div class='add'>+    def _attr_policy(self, policy):</div><div class='add'>+        if self.attr['sub-type'] == 'nest':</div><div class='add'>+            return f'NLA_POLICY_NESTED_ARRAY({self.nested_render_name}_nl_policy)'</div><div class='add'>+        return super()._attr_policy(policy)</div><div class='add'>+</div><div class='ctx'>     def _attr_typol(self):</div><div class='ctx'>         if self.attr['sub-type'] in scalars:</div><div class='ctx'>             return f'.type = YNL_PT_U{c_upper(self.sub_type[1:])}, '</div><div class='ctx'>         elif self.attr['sub-type'] == 'binary' and 'exact-len' in self.checks:</div><div class='ctx'>             return f'.type = YNL_PT_BINARY, .len = {self.checks["exact-len"]}, '</div><div class='del'>-        else:</div><div class='add'>+        elif self.attr['sub-type'] == 'nest':</div><div class='ctx'>             return f'.type = YNL_PT_NEST, .nest = &amp;{self.nested_render_name}_nest, '</div><div class='add'>+        else:</div><div class='add'>+            raise Exception(f"Typol for IndexedArray sub-type {self.attr['sub-type']} not supported, yet")</div><div class='ctx'> </div><div class='ctx'>     def _attr_get(self, ri, var):</div><div class='ctx'>         local_vars = ['const struct nlattr *attr2;']</div><div class='ctx'>         get_lines = [f'attr_{self.c_name} = attr;',</div><div class='ctx'>                      'ynl_attr_for_each_nested(attr2, attr) {',</div><div class='del'>-                     '\tif (ynl_attr_validate(yarg, attr2))',</div><div class='add'>+                     '\tif (__ynl_attr_validate(yarg, attr2, type))',</div><div class='ctx'>                      '\t\treturn YNL_PARSE_CB_ERROR;',</div><div class='del'>-                     f'\t{var}-&gt;_count.{self.c_name}++;',</div><div class='add'>+                     f'\tn_{self.c_name}++;',</div><div class='ctx'>                      '}']</div><div class='ctx'>         return get_lines, None, local_vars</div><div class='ctx'> </div><div class='hunk'>@@ -848,13 +854,25 @@ class TypeArrayNest(Type):</div><div class='ctx'>             ri.cw.p(f'for (i = 0; i &lt; {var}-&gt;_count.{self.c_name}; i++)')</div><div class='ctx'>             ri.cw.p(f"{self.nested_render_name}_put(nlh, i, &amp;{var}-&gt;{self.c_name}[i]);")</div><div class='ctx'>         else:</div><div class='del'>-            raise Exception(f"Put for ArrayNest sub-type {self.attr['sub-type']} not supported, yet")</div><div class='add'>+            raise Exception(f"Put for IndexedArray sub-type {self.attr['sub-type']} not supported, yet")</div><div class='ctx'>         ri.cw.p('ynl_attr_nest_end(nlh, array);')</div><div class='ctx'> </div><div class='ctx'>     def _setter_lines(self, ri, member, presence):</div><div class='ctx'>         return [f"{member} = {self.c_name};",</div><div class='ctx'>                 f"{presence} = n_{self.c_name};"]</div><div class='ctx'> </div><div class='add'>+    def free_needs_iter(self):</div><div class='add'>+        return self.sub_type == 'nest'</div><div class='add'>+</div><div class='add'>+    def _free_lines(self, ri, var, ref):</div><div class='add'>+        lines = []</div><div class='add'>+        if self.sub_type == 'nest':</div><div class='add'>+            lines += [</div><div class='add'>+                f"for (i = 0; i &lt; {var}-&gt;{ref}_count.{self.c_name}; i++)",</div><div class='add'>+                f'{self.nested_render_name}_free(&amp;{var}-&gt;{ref}{self.c_name}[i]);',</div><div class='add'>+            ]</div><div class='add'>+        lines += f"free({var}-&gt;{ref}{self.c_name});",</div><div class='add'>+        return lines</div><div class='ctx'> </div><div class='ctx'> class TypeNestTypeValue(Type):</div><div class='ctx'>     def _complex_member_type(self, ri):</div><div class='hunk'>@@ -909,7 +927,7 @@ class TypeSubMessage(TypeNest):</div><div class='ctx'>         else:</div><div class='ctx'>             sel_var = f"{var}-&gt;{sel}"</div><div class='ctx'>         get_lines = [f'if (!{sel_var})',</div><div class='del'>-                     f'return ynl_submsg_failed(yarg, "%s", "%s");' %</div><div class='add'>+                     'return ynl_submsg_failed(yarg, "%s", "%s");' %</div><div class='ctx'>                         (self.name, self['selector']),</div><div class='ctx'>                     f"if ({self.nested_render_name}_parse(&amp;parg, {sel_var}, attr))",</div><div class='ctx'>                      "return YNL_PARSE_CB_ERROR;"]</div><div class='hunk'>@@ -1125,7 +1143,7 @@ class AttrSet(SpecAttrSet):</div><div class='ctx'>             t = TypeNest(self.family, self, elem, value)</div><div class='ctx'>         elif elem['type'] == 'indexed-array' and 'sub-type' in elem:</div><div class='ctx'>             if elem["sub-type"] in ['binary', 'nest', 'u32']:</div><div class='del'>-                t = TypeArrayNest(self.family, self, elem, value)</div><div class='add'>+                t = TypeIndexedArray(self.family, self, elem, value)</div><div class='ctx'>             else:</div><div class='ctx'>                 raise Exception(f'new_attr: unsupported sub-type {elem["sub-type"]}')</div><div class='ctx'>         elif elem['type'] == 'nest-type-value':</div><div class='hunk'>@@ -1187,7 +1205,7 @@ class SubMessage(SpecSubMessage):</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> class Family(SpecFamily):</div><div class='del'>-    def __init__(self, file_name, exclude_ops):</div><div class='add'>+    def __init__(self, file_name, exclude_ops, fn_prefix):</div><div class='ctx'>         # Added by resolve:</div><div class='ctx'>         self.c_name = None</div><div class='ctx'>         delattr(self, "c_name")</div><div class='hunk'>@@ -1219,6 +1237,8 @@ class Family(SpecFamily):</div><div class='ctx'>         else:</div><div class='ctx'>             self.uapi_header_name = self.ident_name</div><div class='ctx'> </div><div class='add'>+        self.fn_prefix = fn_prefix if fn_prefix else f'{self.ident_name}-nl'</div><div class='add'>+</div><div class='ctx'>     def resolve(self):</div><div class='ctx'>         self.resolve_up(super())</div><div class='ctx'> </div><div class='hunk'>@@ -1563,7 +1583,7 @@ class RenderInfo:</div><div class='ctx'>                 if family.is_classic():</div><div class='ctx'>                     self.fixed_hdr_len = f"sizeof(struct {c_lower(fixed_hdr)})"</div><div class='ctx'>                 else:</div><div class='del'>-                    raise Exception(f"Per-op fixed header not supported, yet")</div><div class='add'>+                    raise Exception("Per-op fixed header not supported, yet")</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>         # 'do' and 'dump' response parsing is identical</div><div class='hunk'>@@ -2034,6 +2054,20 @@ def put_enum_to_str(family, cw, enum):</div><div class='ctx'>     _put_enum_to_str_helper(cw, enum.render_name, map_name, 'value', enum=enum)</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+def put_local_vars(struct):</div><div class='add'>+    local_vars = []</div><div class='add'>+    has_array = False</div><div class='add'>+    has_count = False</div><div class='add'>+    for _, arg in struct.member_list():</div><div class='add'>+        has_array |= arg.type == 'indexed-array'</div><div class='add'>+        has_count |= arg.presence_type() == 'count'</div><div class='add'>+    if has_array:</div><div class='add'>+        local_vars.append('struct nlattr *array;')</div><div class='add'>+    if has_count:</div><div class='add'>+        local_vars.append('unsigned int i;')</div><div class='add'>+    return local_vars</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> def put_req_nested_prototype(ri, struct, suffix=';'):</div><div class='ctx'>     func_args = ['struct nlmsghdr *nlh',</div><div class='ctx'>                  'unsigned int attr_type',</div><div class='hunk'>@@ -2056,15 +2090,7 @@ def put_req_nested(ri, struct):</div><div class='ctx'>         init_lines.append(f"hdr = ynl_nlmsg_put_extra_header(nlh, {struct_sz});")</div><div class='ctx'>         init_lines.append(f"memcpy(hdr, &amp;obj-&gt;_hdr, {struct_sz});")</div><div class='ctx'> </div><div class='del'>-    has_anest = False</div><div class='del'>-    has_count = False</div><div class='del'>-    for _, arg in struct.member_list():</div><div class='del'>-        has_anest |= arg.type == 'indexed-array'</div><div class='del'>-        has_count |= arg.presence_type() == 'count'</div><div class='del'>-    if has_anest:</div><div class='del'>-        local_vars.append('struct nlattr *array;')</div><div class='del'>-    if has_count:</div><div class='del'>-        local_vars.append('unsigned int i;')</div><div class='add'>+    local_vars += put_local_vars(struct)</div><div class='ctx'> </div><div class='ctx'>     put_req_nested_prototype(ri, struct, suffix='')</div><div class='ctx'>     ri.cw.block_start()</div><div class='hunk'>@@ -2099,35 +2125,43 @@ def _multi_parse(ri, struct, init_lines, local_vars):</div><div class='ctx'>             if ri.family.is_classic():</div><div class='ctx'>                 iter_line = f"ynl_attr_for_each(attr, nlh, sizeof({struct.fixed_header}))"</div><div class='ctx'>             else:</div><div class='del'>-                raise Exception(f"Per-op fixed header not supported, yet")</div><div class='add'>+                raise Exception("Per-op fixed header not supported, yet")</div><div class='ctx'> </div><div class='del'>-    array_nests = set()</div><div class='add'>+    indexed_arrays = set()</div><div class='ctx'>     multi_attrs = set()</div><div class='ctx'>     needs_parg = False</div><div class='add'>+    var_set = set()</div><div class='ctx'>     for arg, aspec in struct.member_list():</div><div class='ctx'>         if aspec['type'] == 'indexed-array' and 'sub-type' in aspec:</div><div class='ctx'>             if aspec["sub-type"] in {'binary', 'nest'}:</div><div class='del'>-                local_vars.append(f'const struct nlattr *attr_{aspec.c_name};')</div><div class='del'>-                array_nests.add(arg)</div><div class='add'>+                local_vars.append(f'const struct nlattr *attr_{aspec.c_name} = NULL;')</div><div class='add'>+                indexed_arrays.add(arg)</div><div class='ctx'>             elif aspec['sub-type'] in scalars:</div><div class='del'>-                local_vars.append(f'const struct nlattr *attr_{aspec.c_name};')</div><div class='del'>-                array_nests.add(arg)</div><div class='add'>+                local_vars.append(f'const struct nlattr *attr_{aspec.c_name} = NULL;')</div><div class='add'>+                indexed_arrays.add(arg)</div><div class='ctx'>             else:</div><div class='ctx'>                 raise Exception(f'Not supported sub-type {aspec["sub-type"]}')</div><div class='ctx'>         if 'multi-attr' in aspec:</div><div class='ctx'>             multi_attrs.add(arg)</div><div class='ctx'>         needs_parg |= 'nested-attributes' in aspec</div><div class='ctx'>         needs_parg |= 'sub-message' in aspec</div><div class='del'>-    if array_nests or multi_attrs:</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            _, _, l_vars = aspec._attr_get(ri, '')</div><div class='add'>+            var_set |= set(l_vars) if l_vars else set()</div><div class='add'>+        except Exception:</div><div class='add'>+            pass  # _attr_get() not implemented by simple types, ignore</div><div class='add'>+    local_vars += list(var_set)</div><div class='add'>+    if indexed_arrays or multi_attrs:</div><div class='ctx'>         local_vars.append('int i;')</div><div class='ctx'>     if needs_parg:</div><div class='ctx'>         local_vars.append('struct ynl_parse_arg parg;')</div><div class='ctx'>         init_lines.append('parg.ys = yarg-&gt;ys;')</div><div class='ctx'> </div><div class='del'>-    all_multi = array_nests | multi_attrs</div><div class='add'>+    all_multi = indexed_arrays | multi_attrs</div><div class='ctx'> </div><div class='del'>-    for anest in sorted(all_multi):</div><div class='del'>-        local_vars.append(f"unsigned int n_{struct[anest].c_name} = 0;")</div><div class='add'>+    for arg in sorted(all_multi):</div><div class='add'>+        local_vars.append(f"unsigned int n_{struct[arg].c_name} = 0;")</div><div class='ctx'> </div><div class='ctx'>     ri.cw.block_start()</div><div class='ctx'>     ri.cw.write_func_lvar(local_vars)</div><div class='hunk'>@@ -2147,8 +2181,8 @@ def _multi_parse(ri, struct, init_lines, local_vars):</div><div class='ctx'>         else:</div><div class='ctx'>             ri.cw.p('hdr = ynl_nlmsg_data_offset(nlh, sizeof(struct genlmsghdr));')</div><div class='ctx'>         ri.cw.p(f"memcpy(&amp;dst-&gt;_hdr, hdr, sizeof({struct.fixed_header}));")</div><div class='del'>-    for anest in sorted(all_multi):</div><div class='del'>-        aspec = struct[anest]</div><div class='add'>+    for arg in sorted(all_multi):</div><div class='add'>+        aspec = struct[arg]</div><div class='ctx'>         ri.cw.p(f"if (dst-&gt;{aspec.c_name})")</div><div class='ctx'>         ri.cw.p(f'return ynl_error_parse(yarg, "attribute already present ({struct.attr_set.name}.{aspec.name})");')</div><div class='ctx'> </div><div class='hunk'>@@ -2166,8 +2200,8 @@ def _multi_parse(ri, struct, init_lines, local_vars):</div><div class='ctx'>     ri.cw.block_end()</div><div class='ctx'>     ri.cw.nl()</div><div class='ctx'> </div><div class='del'>-    for anest in sorted(array_nests):</div><div class='del'>-        aspec = struct[anest]</div><div class='add'>+    for arg in sorted(indexed_arrays):</div><div class='add'>+        aspec = struct[arg]</div><div class='ctx'> </div><div class='ctx'>         ri.cw.block_start(line=f"if (n_{aspec.c_name})")</div><div class='ctx'>         ri.cw.p(f"dst-&gt;{aspec.c_name} = calloc(n_{aspec.c_name}, sizeof(*dst-&gt;{aspec.c_name}));")</div><div class='hunk'>@@ -2192,8 +2226,8 @@ def _multi_parse(ri, struct, init_lines, local_vars):</div><div class='ctx'>         ri.cw.block_end()</div><div class='ctx'>     ri.cw.nl()</div><div class='ctx'> </div><div class='del'>-    for anest in sorted(multi_attrs):</div><div class='del'>-        aspec = struct[anest]</div><div class='add'>+    for arg in sorted(multi_attrs):</div><div class='add'>+        aspec = struct[arg]</div><div class='ctx'>         ri.cw.block_start(line=f"if (n_{aspec.c_name})")</div><div class='ctx'>         ri.cw.p(f"dst-&gt;{aspec.c_name} = calloc(n_{aspec.c_name}, sizeof(*dst-&gt;{aspec.c_name}));")</div><div class='ctx'>         ri.cw.p(f"dst-&gt;_count.{aspec.c_name} = n_{aspec.c_name};")</div><div class='hunk'>@@ -2348,10 +2382,7 @@ def print_req(ri):</div><div class='ctx'>         local_vars += ['size_t hdr_len;',</div><div class='ctx'>                        'void *hdr;']</div><div class='ctx'> </div><div class='del'>-    for _, attr in ri.struct["request"].member_list():</div><div class='del'>-        if attr.presence_type() == 'count':</div><div class='del'>-            local_vars += ['unsigned int i;']</div><div class='del'>-            break</div><div class='add'>+    local_vars += put_local_vars(ri.struct['request'])</div><div class='ctx'> </div><div class='ctx'>     print_prototype(ri, direction, terminate=False)</div><div class='ctx'>     ri.cw.block_start()</div><div class='hunk'>@@ -2418,6 +2449,9 @@ def print_dump(ri):</div><div class='ctx'>         local_vars += ['size_t hdr_len;',</div><div class='ctx'>                        'void *hdr;']</div><div class='ctx'> </div><div class='add'>+    if 'request' in ri.op[ri.op_mode]:</div><div class='add'>+        local_vars += put_local_vars(ri.struct['request'])</div><div class='add'>+</div><div class='ctx'>     ri.cw.write_func_lvar(local_vars)</div><div class='ctx'> </div><div class='ctx'>     ri.cw.p('yds.yarg.ys = ys;')</div><div class='hunk'>@@ -2502,7 +2536,7 @@ def print_free_prototype(ri, direction, suffix=';'):</div><div class='ctx'> </div><div class='ctx'> def print_nlflags_set(ri, direction):</div><div class='ctx'>     name = op_prefix(ri, direction)</div><div class='del'>-    ri.cw.write_func_prot(f'static inline void', f"{name}_set_nlflags",</div><div class='add'>+    ri.cw.write_func_prot('static inline void', f"{name}_set_nlflags",</div><div class='ctx'>                           [f"struct {name} *req", "__u16 nl_flags"])</div><div class='ctx'>     ri.cw.block_start()</div><div class='ctx'>     ri.cw.p('req-&gt;_nlmsg_flags = nl_flags;')</div><div class='hunk'>@@ -2533,7 +2567,7 @@ def _print_type(ri, direction, struct):</div><div class='ctx'>             line = attr.presence_member(ri.ku_space, type_filter)</div><div class='ctx'>             if line:</div><div class='ctx'>                 if not meta_started:</div><div class='del'>-                    ri.cw.block_start(line=f"struct")</div><div class='add'>+                    ri.cw.block_start(line="struct")</div><div class='ctx'>                     meta_started = True</div><div class='ctx'>                 ri.cw.p(line)</div><div class='ctx'>         if meta_started:</div><div class='hunk'>@@ -2697,7 +2731,7 @@ def print_dump_type_free(ri):</div><div class='ctx'>     ri.cw.nl()</div><div class='ctx'> </div><div class='ctx'>     _free_type_members(ri, 'rsp', ri.struct['reply'], ref='obj.')</div><div class='del'>-    ri.cw.p(f'free(rsp);')</div><div class='add'>+    ri.cw.p('free(rsp);')</div><div class='ctx'>     ri.cw.block_end()</div><div class='ctx'>     ri.cw.block_end()</div><div class='ctx'>     ri.cw.nl()</div><div class='hunk'>@@ -2708,7 +2742,7 @@ def print_ntf_type_free(ri):</div><div class='ctx'>     ri.cw.block_start()</div><div class='ctx'>     _free_type_members_iter(ri, ri.struct['reply'])</div><div class='ctx'>     _free_type_members(ri, 'rsp', ri.struct['reply'], ref='obj.')</div><div class='del'>-    ri.cw.p(f'free(rsp);')</div><div class='add'>+    ri.cw.p('free(rsp);')</div><div class='ctx'>     ri.cw.block_end()</div><div class='ctx'>     ri.cw.nl()</div><div class='ctx'> </div><div class='hunk'>@@ -2803,8 +2837,6 @@ def print_kernel_policy_sparse_enum_validates(family, cw):</div><div class='ctx'>                 cw.p('/* Sparse enums validation callbacks */')</div><div class='ctx'>                 first = False</div><div class='ctx'> </div><div class='del'>-            sign = '' if attr.type[0] == 'u' else '_signed'</div><div class='del'>-            suffix = 'ULL' if attr.type[0] == 'u' else 'LL'</div><div class='ctx'>             cw.write_func_prot('static int', f'{c_lower(attr.enum_name)}_validate',</div><div class='ctx'>                                ['const struct nlattr *attr', 'struct netlink_ext_ack *extack'])</div><div class='ctx'>             cw.block_start()</div><div class='hunk'>@@ -2881,12 +2913,12 @@ def print_kernel_op_table_fwd(family, cw, terminate):</div><div class='ctx'>             continue</div><div class='ctx'> </div><div class='ctx'>         if 'do' in op:</div><div class='del'>-            name = c_lower(f"{family.ident_name}-nl-{op_name}-doit")</div><div class='add'>+            name = c_lower(f"{family.fn_prefix}-{op_name}-doit")</div><div class='ctx'>             cw.write_func_prot('int', name,</div><div class='ctx'>                                ['struct sk_buff *skb', 'struct genl_info *info'], suffix=';')</div><div class='ctx'> </div><div class='ctx'>         if 'dump' in op:</div><div class='del'>-            name = c_lower(f"{family.ident_name}-nl-{op_name}-dumpit")</div><div class='add'>+            name = c_lower(f"{family.fn_prefix}-{op_name}-dumpit")</div><div class='ctx'>             cw.write_func_prot('int', name,</div><div class='ctx'>                                ['struct sk_buff *skb', 'struct netlink_callback *cb'], suffix=';')</div><div class='ctx'>     cw.nl()</div><div class='hunk'>@@ -2912,7 +2944,7 @@ def print_kernel_op_table(family, cw):</div><div class='ctx'>                                             for x in op['dont-validate']])), )</div><div class='ctx'>             for op_mode in ['do', 'dump']:</div><div class='ctx'>                 if op_mode in op:</div><div class='del'>-                    name = c_lower(f"{family.ident_name}-nl-{op_name}-{op_mode}it")</div><div class='add'>+                    name = c_lower(f"{family.fn_prefix}-{op_name}-{op_mode}it")</div><div class='ctx'>                     members.append((op_mode + 'it', name))</div><div class='ctx'>             if family.kernel_policy == 'per-op':</div><div class='ctx'>                 struct = Struct(family, op['attribute-set'],</div><div class='hunk'>@@ -2950,7 +2982,7 @@ def print_kernel_op_table(family, cw):</div><div class='ctx'>                         members.append(('validate',</div><div class='ctx'>                                         ' | '.join([c_upper('genl-dont-validate-' + x)</div><div class='ctx'>                                                     for x in dont_validate])), )</div><div class='del'>-                name = c_lower(f"{family.ident_name}-nl-{op_name}-{op_mode}it")</div><div class='add'>+                name = c_lower(f"{family.fn_prefix}-{op_name}-{op_mode}it")</div><div class='ctx'>                 if 'pre' in op[op_mode]:</div><div class='ctx'>                     members.append((cb_names[op_mode]['pre'], c_lower(op[op_mode]['pre'])))</div><div class='ctx'>                 members.append((op_mode + 'it', name))</div><div class='hunk'>@@ -3211,8 +3243,9 @@ def render_uapi(family, cw):</div><div class='ctx'>             cw.block_end(line=';')</div><div class='ctx'>             cw.nl()</div><div class='ctx'>         elif const['type'] == 'const':</div><div class='add'>+            name_pfx = const.get('name-prefix', f"{family.ident_name}-")</div><div class='ctx'>             defines.append([c_upper(family.get('c-define-name',</div><div class='del'>-                                               f"{family.ident_name}-{const['name']}")),</div><div class='add'>+                                               f"{name_pfx}{const['name']}")),</div><div class='ctx'>                             const['value']])</div><div class='ctx'> </div><div class='ctx'>     if defines:</div><div class='hunk'>@@ -3324,7 +3357,7 @@ def render_user_family(family, cw, prototype):</div><div class='ctx'>     cw.block_start(f'{symbol} = ')</div><div class='ctx'>     cw.p(f'.name\t\t= "{family.c_name}",')</div><div class='ctx'>     if family.is_classic():</div><div class='del'>-        cw.p(f'.is_classic\t= true,')</div><div class='add'>+        cw.p('.is_classic\t= true,')</div><div class='ctx'>         cw.p(f'.classic_id\t= {family.get("protonum")},')</div><div class='ctx'>     if family.is_classic():</div><div class='ctx'>         if family.fixed_header:</div><div class='hunk'>@@ -3371,6 +3404,7 @@ def main():</div><div class='ctx'>                         help='Do not overwrite the output file if the new output is identical to the old')</div><div class='ctx'>     parser.add_argument('--exclude-op', action='append', default=[])</div><div class='ctx'>     parser.add_argument('-o', dest='out_file', type=str, default=None)</div><div class='add'>+    parser.add_argument('--function-prefix', dest='fn_prefix', type=str)</div><div class='ctx'>     args = parser.parse_args()</div><div class='ctx'> </div><div class='ctx'>     if args.header is None:</div><div class='hunk'>@@ -3379,7 +3413,7 @@ def main():</div><div class='ctx'>     exclude_ops = [re.compile(expr) for expr in args.exclude_op]</div><div class='ctx'> </div><div class='ctx'>     try:</div><div class='del'>-        parsed = Family(args.spec, exclude_ops)</div><div class='add'>+        parsed = Family(args.spec, exclude_ops, args.fn_prefix)</div><div class='ctx'>         if parsed.license != '((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)':</div><div class='ctx'>             print('Spec license:', parsed.license)</div><div class='ctx'>             print('License must be: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)')</div><div class='hunk'>@@ -3399,11 +3433,16 @@ def main():</div><div class='ctx'>     cw.p("/* Do not edit directly, auto-generated from: */")</div><div class='ctx'>     cw.p(f"/*\t{spec_kernel} */")</div><div class='ctx'>     cw.p(f"/* YNL-GEN {args.mode} {'header' if args.header else 'source'} */")</div><div class='del'>-    if args.exclude_op or args.user_header:</div><div class='add'>+    if args.exclude_op or args.user_header or args.fn_prefix:</div><div class='ctx'>         line = ''</div><div class='del'>-        line += ' --user-header '.join([''] + args.user_header)</div><div class='del'>-        line += ' --exclude-op '.join([''] + args.exclude_op)</div><div class='add'>+        if args.user_header:</div><div class='add'>+            line += ' --user-header '.join([''] + args.user_header)</div><div class='add'>+        if args.exclude_op:</div><div class='add'>+            line += ' --exclude-op '.join([''] + args.exclude_op)</div><div class='add'>+        if args.fn_prefix:</div><div class='add'>+            line += f' --function-prefix {args.fn_prefix}'</div><div class='ctx'>         cw.p(f'/* YNL-ARG{line} */')</div><div class='add'>+    cw.p('/* To regenerate run: tools/net/ynl/ynl-regen.sh */')</div><div class='ctx'>     cw.nl()</div><div class='ctx'> </div><div class='ctx'>     if args.mode == 'uapi':</div><div class='head'>diff --git a/tools/net/ynl/pyynl/ynl_gen_rst.py b/tools/net/ynl/pyynl/ynl_gen_rst.py<br/>index 0cb6348e28d3..90ae19aac89d 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ynl_gen_rst.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/pyynl/ynl_gen_rst.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/pyynl/ynl_gen_rst.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/pyynl/ynl_gen_rst.py</a></div><div class='hunk'>@@ -10,353 +10,17 @@</div><div class='ctx'> </div><div class='ctx'>     This script performs extensive parsing to the Linux kernel's netlink YAML</div><div class='ctx'>     spec files, in an effort to avoid needing to heavily mark up the original</div><div class='del'>-    YAML file.</div><div class='del'>-</div><div class='del'>-    This code is split in three big parts:</div><div class='del'>-        1) RST formatters: Use to convert a string to a RST output</div><div class='del'>-        2) Parser helpers: Functions to parse the YAML data structure</div><div class='del'>-        3) Main function and small helpers</div><div class='add'>+    YAML file. It uses the library code from scripts/lib.</div><div class='ctx'> """</div><div class='ctx'> </div><div class='del'>-from typing import Any, Dict, List</div><div class='ctx'> import os.path</div><div class='add'>+import pathlib</div><div class='ctx'> import sys</div><div class='ctx'> import argparse</div><div class='ctx'> import logging</div><div class='del'>-import yaml</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-SPACE_PER_LEVEL = 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-# RST Formatters</div><div class='del'>-# ==============</div><div class='del'>-def headroom(level: int) -&gt; str:</div><div class='del'>-    """Return space to format"""</div><div class='del'>-    return " " * (level * SPACE_PER_LEVEL)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def bold(text: str) -&gt; str:</div><div class='del'>-    """Format bold text"""</div><div class='del'>-    return f"**{text}**"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def inline(text: str) -&gt; str:</div><div class='del'>-    """Format inline text"""</div><div class='del'>-    return f"``{text}``"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def sanitize(text: str) -&gt; str:</div><div class='del'>-    """Remove newlines and multiple spaces"""</div><div class='del'>-    # This is useful for some fields that are spread across multiple lines</div><div class='del'>-    return str(text).replace("\n", " ").strip()</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_fields(key: str, value: str, level: int = 0) -&gt; str:</div><div class='del'>-    """Return a RST formatted field"""</div><div class='del'>-    return headroom(level) + f":{key}: {value}"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_definition(key: str, value: Any, level: int = 0) -&gt; str:</div><div class='del'>-    """Format a single rst definition"""</div><div class='del'>-    return headroom(level) + key + "\n" + headroom(level + 1) + str(value)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_paragraph(paragraph: str, level: int = 0) -&gt; str:</div><div class='del'>-    """Return a formatted paragraph"""</div><div class='del'>-    return headroom(level) + paragraph</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_bullet(item: str, level: int = 0) -&gt; str:</div><div class='del'>-    """Return a formatted a bullet"""</div><div class='del'>-    return headroom(level) + f"- {item}"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_subsection(title: str) -&gt; str:</div><div class='del'>-    """Add a sub-section to the document"""</div><div class='del'>-    return f"{title}\n" + "-" * len(title)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_subsubsection(title: str) -&gt; str:</div><div class='del'>-    """Add a sub-sub-section to the document"""</div><div class='del'>-    return f"{title}\n" + "~" * len(title)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_section(namespace: str, prefix: str, title: str) -&gt; str:</div><div class='del'>-    """Add a section to the document"""</div><div class='del'>-    return f".. _{namespace}-{prefix}-{title}:\n\n{title}\n" + "=" * len(title)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_subtitle(title: str) -&gt; str:</div><div class='del'>-    """Add a subtitle to the document"""</div><div class='del'>-    return "\n" + "-" * len(title) + f"\n{title}\n" + "-" * len(title) + "\n\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_title(title: str) -&gt; str:</div><div class='del'>-    """Add a title to the document"""</div><div class='del'>-    return "=" * len(title) + f"\n{title}\n" + "=" * len(title) + "\n\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_list_inline(list_: List[str], level: int = 0) -&gt; str:</div><div class='del'>-    """Format a list using inlines"""</div><div class='del'>-    return headroom(level) + "[" + ", ".join(inline(i) for i in list_) + "]"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_ref(namespace: str, prefix: str, name: str) -&gt; str:</div><div class='del'>-    """Add a hyperlink to the document"""</div><div class='del'>-    mappings = {'enum': 'definition',</div><div class='del'>-                'fixed-header': 'definition',</div><div class='del'>-                'nested-attributes': 'attribute-set',</div><div class='del'>-                'struct': 'definition'}</div><div class='del'>-    if prefix in mappings:</div><div class='del'>-        prefix = mappings[prefix]</div><div class='del'>-    return f":ref:`{namespace}-{prefix}-{name}`"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_header() -&gt; str:</div><div class='del'>-    """The headers for all the auto generated RST files"""</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    lines.append(rst_paragraph(".. SPDX-License-Identifier: GPL-2.0"))</div><div class='del'>-    lines.append(rst_paragraph(".. NOTE: This document was auto-generated.\n\n"))</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_toctree(maxdepth: int = 2) -&gt; str:</div><div class='del'>-    """Generate a toctree RST primitive"""</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    lines.append(".. toctree::")</div><div class='del'>-    lines.append(f"   :maxdepth: {maxdepth}\n\n")</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def rst_label(title: str) -&gt; str:</div><div class='del'>-    """Return a formatted label"""</div><div class='del'>-    return f".. _{title}:\n\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-# Parsers</div><div class='del'>-# =======</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_mcast_group(mcast_group: List[Dict[str, Any]]) -&gt; str:</div><div class='del'>-    """Parse 'multicast' group list and return a formatted string"""</div><div class='del'>-    lines = []</div><div class='del'>-    for group in mcast_group:</div><div class='del'>-        lines.append(rst_bullet(group["name"]))</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_do(do_dict: Dict[str, Any], level: int = 0) -&gt; str:</div><div class='del'>-    """Parse 'do' section and return a formatted string"""</div><div class='del'>-    lines = []</div><div class='del'>-    for key in do_dict.keys():</div><div class='del'>-        lines.append(rst_paragraph(bold(key), level + 1))</div><div class='del'>-        if key in ['request', 'reply']:</div><div class='del'>-            lines.append(parse_do_attributes(do_dict[key], level + 1) + "\n")</div><div class='del'>-        else:</div><div class='del'>-            lines.append(headroom(level + 2) + do_dict[key] + "\n")</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_do_attributes(attrs: Dict[str, Any], level: int = 0) -&gt; str:</div><div class='del'>-    """Parse 'attributes' section"""</div><div class='del'>-    if "attributes" not in attrs:</div><div class='del'>-        return ""</div><div class='del'>-    lines = [rst_fields("attributes", rst_list_inline(attrs["attributes"]), level + 1)]</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_operations(operations: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='del'>-    """Parse operations block"""</div><div class='del'>-    preprocessed = ["name", "doc", "title", "do", "dump", "flags"]</div><div class='del'>-    linkable = ["fixed-header", "attribute-set"]</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    for operation in operations:</div><div class='del'>-        lines.append(rst_section(namespace, 'operation', operation["name"]))</div><div class='del'>-        lines.append(rst_paragraph(operation["doc"]) + "\n")</div><div class='del'>-</div><div class='del'>-        for key in operation.keys():</div><div class='del'>-            if key in preprocessed:</div><div class='del'>-                # Skip the special fields</div><div class='del'>-                continue</div><div class='del'>-            value = operation[key]</div><div class='del'>-            if key in linkable:</div><div class='del'>-                value = rst_ref(namespace, key, value)</div><div class='del'>-            lines.append(rst_fields(key, value, 0))</div><div class='del'>-        if 'flags' in operation:</div><div class='del'>-            lines.append(rst_fields('flags', rst_list_inline(operation['flags'])))</div><div class='del'>-</div><div class='del'>-        if "do" in operation:</div><div class='del'>-            lines.append(rst_paragraph(":do:", 0))</div><div class='del'>-            lines.append(parse_do(operation["do"], 0))</div><div class='del'>-        if "dump" in operation:</div><div class='del'>-            lines.append(rst_paragraph(":dump:", 0))</div><div class='del'>-            lines.append(parse_do(operation["dump"], 0))</div><div class='del'>-</div><div class='del'>-        # New line after fields</div><div class='del'>-        lines.append("\n")</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_entries(entries: List[Dict[str, Any]], level: int) -&gt; str:</div><div class='del'>-    """Parse a list of entries"""</div><div class='del'>-    ignored = ["pad"]</div><div class='del'>-    lines = []</div><div class='del'>-    for entry in entries:</div><div class='del'>-        if isinstance(entry, dict):</div><div class='del'>-            # entries could be a list or a dictionary</div><div class='del'>-            field_name = entry.get("name", "")</div><div class='del'>-            if field_name in ignored:</div><div class='del'>-                continue</div><div class='del'>-            type_ = entry.get("type")</div><div class='del'>-            if type_:</div><div class='del'>-                field_name += f" ({inline(type_)})"</div><div class='del'>-            lines.append(</div><div class='del'>-                rst_fields(field_name, sanitize(entry.get("doc", "")), level)</div><div class='del'>-            )</div><div class='del'>-        elif isinstance(entry, list):</div><div class='del'>-            lines.append(rst_list_inline(entry, level))</div><div class='del'>-        else:</div><div class='del'>-            lines.append(rst_bullet(inline(sanitize(entry)), level))</div><div class='del'>-</div><div class='del'>-    lines.append("\n")</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_definitions(defs: Dict[str, Any], namespace: str) -&gt; str:</div><div class='del'>-    """Parse definitions section"""</div><div class='del'>-    preprocessed = ["name", "entries", "members"]</div><div class='del'>-    ignored = ["render-max"]  # This is not printed</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    for definition in defs:</div><div class='del'>-        lines.append(rst_section(namespace, 'definition', definition["name"]))</div><div class='del'>-        for k in definition.keys():</div><div class='del'>-            if k in preprocessed + ignored:</div><div class='del'>-                continue</div><div class='del'>-            lines.append(rst_fields(k, sanitize(definition[k]), 0))</div><div class='del'>-</div><div class='del'>-        # Field list needs to finish with a new line</div><div class='del'>-        lines.append("\n")</div><div class='del'>-        if "entries" in definition:</div><div class='del'>-            lines.append(rst_paragraph(":entries:", 0))</div><div class='del'>-            lines.append(parse_entries(definition["entries"], 1))</div><div class='del'>-        if "members" in definition:</div><div class='del'>-            lines.append(rst_paragraph(":members:", 0))</div><div class='del'>-            lines.append(parse_entries(definition["members"], 1))</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_attr_sets(entries: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='del'>-    """Parse attribute from attribute-set"""</div><div class='del'>-    preprocessed = ["name", "type"]</div><div class='del'>-    linkable = ["enum", "nested-attributes", "struct", "sub-message"]</div><div class='del'>-    ignored = ["checks"]</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    for entry in entries:</div><div class='del'>-        lines.append(rst_section(namespace, 'attribute-set', entry["name"]))</div><div class='del'>-        for attr in entry["attributes"]:</div><div class='del'>-            type_ = attr.get("type")</div><div class='del'>-            attr_line = attr["name"]</div><div class='del'>-            if type_:</div><div class='del'>-                # Add the attribute type in the same line</div><div class='del'>-                attr_line += f" ({inline(type_)})"</div><div class='del'>-</div><div class='del'>-            lines.append(rst_subsubsection(attr_line))</div><div class='del'>-</div><div class='del'>-            for k in attr.keys():</div><div class='del'>-                if k in preprocessed + ignored:</div><div class='del'>-                    continue</div><div class='del'>-                if k in linkable:</div><div class='del'>-                    value = rst_ref(namespace, k, attr[k])</div><div class='del'>-                else:</div><div class='del'>-                    value = sanitize(attr[k])</div><div class='del'>-                lines.append(rst_fields(k, value, 0))</div><div class='del'>-            lines.append("\n")</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_sub_messages(entries: List[Dict[str, Any]], namespace: str) -&gt; str:</div><div class='del'>-    """Parse sub-message definitions"""</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    for entry in entries:</div><div class='del'>-        lines.append(rst_section(namespace, 'sub-message', entry["name"]))</div><div class='del'>-        for fmt in entry["formats"]:</div><div class='del'>-            value = fmt["value"]</div><div class='del'>-</div><div class='del'>-            lines.append(rst_bullet(bold(value)))</div><div class='del'>-            for attr in ['fixed-header', 'attribute-set']:</div><div class='del'>-                if attr in fmt:</div><div class='del'>-                    lines.append(rst_fields(attr,</div><div class='del'>-                                            rst_ref(namespace, attr, fmt[attr]),</div><div class='del'>-                                            1))</div><div class='del'>-            lines.append("\n")</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-def parse_yaml(obj: Dict[str, Any]) -&gt; str:</div><div class='del'>-    """Format the whole YAML into a RST string"""</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    # Main header</div><div class='del'>-</div><div class='del'>-    lines.append(rst_header())</div><div class='del'>-</div><div class='del'>-    family = obj['name']</div><div class='del'>-</div><div class='del'>-    title = f"Family ``{family}`` netlink specification"</div><div class='del'>-    lines.append(rst_title(title))</div><div class='del'>-    lines.append(rst_paragraph(".. contents:: :depth: 3\n"))</div><div class='del'>-</div><div class='del'>-    if "doc" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Summary"))</div><div class='del'>-        lines.append(rst_paragraph(obj["doc"], 0))</div><div class='del'>-</div><div class='del'>-    # Operations</div><div class='del'>-    if "operations" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Operations"))</div><div class='del'>-        lines.append(parse_operations(obj["operations"]["list"], family))</div><div class='del'>-</div><div class='del'>-    # Multicast groups</div><div class='del'>-    if "mcast-groups" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Multicast groups"))</div><div class='del'>-        lines.append(parse_mcast_group(obj["mcast-groups"]["list"]))</div><div class='del'>-</div><div class='del'>-    # Definitions</div><div class='del'>-    if "definitions" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Definitions"))</div><div class='del'>-        lines.append(parse_definitions(obj["definitions"], family))</div><div class='del'>-</div><div class='del'>-    # Attributes set</div><div class='del'>-    if "attribute-sets" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Attribute sets"))</div><div class='del'>-        lines.append(parse_attr_sets(obj["attribute-sets"], family))</div><div class='del'>-</div><div class='del'>-    # Sub-messages</div><div class='del'>-    if "sub-messages" in obj:</div><div class='del'>-        lines.append(rst_subtitle("Sub-messages"))</div><div class='del'>-        lines.append(parse_sub_messages(obj["sub-messages"], family))</div><div class='del'>-</div><div class='del'>-    return "\n".join(lines)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-# Main functions</div><div class='del'>-# ==============</div><div class='ctx'> </div><div class='add'>+sys.path.append(pathlib.Path(__file__).resolve().parent.as_posix())</div><div class='add'>+from lib import YnlDocGenerator    # pylint: disable=C0413</div><div class='ctx'> </div><div class='ctx'> def parse_arguments() -&gt; argparse.Namespace:</div><div class='ctx'>     """Parse arguments from user"""</div><div class='hunk'>@@ -367,9 +31,6 @@ def parse_arguments() -&gt; argparse.Namespace:</div><div class='ctx'> </div><div class='ctx'>     # Index and input are mutually exclusive</div><div class='ctx'>     group = parser.add_mutually_exclusive_group()</div><div class='del'>-    group.add_argument(</div><div class='del'>-        "-x", "--index", action="store_true", help="Generate the index page"</div><div class='del'>-    )</div><div class='ctx'>     group.add_argument("-i", "--input", help="YAML file name")</div><div class='ctx'> </div><div class='ctx'>     args = parser.parse_args()</div><div class='hunk'>@@ -391,15 +52,6 @@ def parse_arguments() -&gt; argparse.Namespace:</div><div class='ctx'>     return args</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-def parse_yaml_file(filename: str) -&gt; str:</div><div class='del'>-    """Transform the YAML specified by filename into an RST-formatted string"""</div><div class='del'>-    with open(filename, "r", encoding="utf-8") as spec_file:</div><div class='del'>-        yaml_data = yaml.safe_load(spec_file)</div><div class='del'>-        content = parse_yaml(yaml_data)</div><div class='del'>-</div><div class='del'>-    return content</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> def write_to_rstfile(content: str, filename: str) -&gt; None:</div><div class='ctx'>     """Write the generated content into an RST file"""</div><div class='ctx'>     logging.debug("Saving RST file to %s", filename)</div><div class='hunk'>@@ -408,35 +60,17 @@ def write_to_rstfile(content: str, filename: str) -&gt; None:</div><div class='ctx'>         rst_file.write(content)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-def generate_main_index_rst(output: str) -&gt; None:</div><div class='del'>-    """Generate the `networking_spec/index` content and write to the file"""</div><div class='del'>-    lines = []</div><div class='del'>-</div><div class='del'>-    lines.append(rst_header())</div><div class='del'>-    lines.append(rst_label("specs"))</div><div class='del'>-    lines.append(rst_title("Netlink Family Specifications"))</div><div class='del'>-    lines.append(rst_toctree(1))</div><div class='del'>-</div><div class='del'>-    index_dir = os.path.dirname(output)</div><div class='del'>-    logging.debug("Looking for .rst files in %s", index_dir)</div><div class='del'>-    for filename in sorted(os.listdir(index_dir)):</div><div class='del'>-        if not filename.endswith(".rst") or filename == "index.rst":</div><div class='del'>-            continue</div><div class='del'>-        lines.append(f"   {filename.replace('.rst', '')}\n")</div><div class='del'>-</div><div class='del'>-    logging.debug("Writing an index file at %s", output)</div><div class='del'>-    write_to_rstfile("".join(lines), output)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> def main() -&gt; None:</div><div class='ctx'>     """Main function that reads the YAML files and generates the RST files"""</div><div class='ctx'> </div><div class='ctx'>     args = parse_arguments()</div><div class='ctx'> </div><div class='add'>+    parser = YnlDocGenerator()</div><div class='add'>+</div><div class='ctx'>     if args.input:</div><div class='ctx'>         logging.debug("Parsing %s", args.input)</div><div class='ctx'>         try:</div><div class='del'>-            content = parse_yaml_file(os.path.join(args.input))</div><div class='add'>+            content = parser.parse_yaml_file(os.path.join(args.input))</div><div class='ctx'>         except Exception as exception:</div><div class='ctx'>             logging.warning("Failed to parse %s.", args.input)</div><div class='ctx'>             logging.warning(exception)</div><div class='hunk'>@@ -444,10 +78,6 @@ def main() -&gt; None:</div><div class='ctx'> </div><div class='ctx'>         write_to_rstfile(content, args.output)</div><div class='ctx'> </div><div class='del'>-    if args.index:</div><div class='del'>-        # Generate the index RST file</div><div class='del'>-        generate_main_index_rst(args.output)</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> if __name__ == "__main__":</div><div class='ctx'>     main()</div><div class='head'>diff --git a/tools/net/ynl/samples/.gitignore b/tools/net/ynl/samples/.gitignore<br/>index 7f5fca7682d7..05087ee323ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/.gitignore?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/samples/.gitignore</a></div><div class='hunk'>@@ -7,3 +7,4 @@ rt-addr</div><div class='ctx'> rt-link</div><div class='ctx'> rt-route</div><div class='ctx'> tc</div><div class='add'>+tc-filter-add</div><div class='head'>diff --git a/tools/net/ynl/samples/Makefile b/tools/net/ynl/samples/Makefile<br/>index c9494a564da4..d76cbd41cbb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/samples/Makefile</a></div><div class='hunk'>@@ -19,6 +19,7 @@ include $(wildcard *.d)</div><div class='ctx'> all: $(BINS)</div><div class='ctx'> </div><div class='ctx'> CFLAGS_page-pool=$(CFLAGS_netdev)</div><div class='add'>+CFLAGS_tc-filter-add:=$(CFLAGS_tc)</div><div class='ctx'> </div><div class='ctx'> $(BINS): ../lib/ynl.a ../generated/protos.a $(SRCS)</div><div class='ctx'> 	@echo -e '\tCC sample $@'</div><div class='head'>diff --git a/tools/net/ynl/samples/page-pool.c b/tools/net/ynl/samples/page-pool.c<br/>deleted file mode 100644<br/>index e5d521320fbf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/page-pool.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/net/ynl/samples/page-pool.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,149 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#define _GNU_SOURCE</div><div class='del'>-</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;ynl.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;net/if.h&gt;</div><div class='del'>-</div><div class='del'>-#include "netdev-user.h"</div><div class='del'>-</div><div class='del'>-struct stat {</div><div class='del'>-	unsigned int ifc;</div><div class='del'>-</div><div class='del'>-	struct {</div><div class='del'>-		unsigned int cnt;</div><div class='del'>-		size_t refs, bytes;</div><div class='del'>-	} live[2];</div><div class='del'>-</div><div class='del'>-	size_t alloc_slow, alloc_fast, recycle_ring, recycle_cache;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct stats_array {</div><div class='del'>-	unsigned int i, max;</div><div class='del'>-	struct stat *s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct stat *find_ifc(struct stats_array *a, unsigned int ifindex)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; a-&gt;i; i++) {</div><div class='del'>-		if (a-&gt;s[i].ifc == ifindex)</div><div class='del'>-			return &amp;a-&gt;s[i];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	a-&gt;i++;</div><div class='del'>-	if (a-&gt;i == a-&gt;max) {</div><div class='del'>-		a-&gt;max *= 2;</div><div class='del'>-		a-&gt;s = reallocarray(a-&gt;s, a-&gt;max, sizeof(*a-&gt;s));</div><div class='del'>-	}</div><div class='del'>-	a-&gt;s[i].ifc = ifindex;</div><div class='del'>-	return &amp;a-&gt;s[i];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void count(struct stat *s, unsigned int l,</div><div class='del'>-		  struct netdev_page_pool_get_rsp *pp)</div><div class='del'>-{</div><div class='del'>-	s-&gt;live[l].cnt++;</div><div class='del'>-	if (pp-&gt;_present.inflight)</div><div class='del'>-		s-&gt;live[l].refs += pp-&gt;inflight;</div><div class='del'>-	if (pp-&gt;_present.inflight_mem)</div><div class='del'>-		s-&gt;live[l].bytes += pp-&gt;inflight_mem;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int main(int argc, char **argv)</div><div class='del'>-{</div><div class='del'>-	struct netdev_page_pool_stats_get_list *pp_stats;</div><div class='del'>-	struct netdev_page_pool_get_list *pools;</div><div class='del'>-	struct stats_array a = {};</div><div class='del'>-	struct ynl_error yerr;</div><div class='del'>-	struct ynl_sock *ys;</div><div class='del'>-</div><div class='del'>-	ys = ynl_sock_create(&amp;ynl_netdev_family, &amp;yerr);</div><div class='del'>-	if (!ys) {</div><div class='del'>-		fprintf(stderr, "YNL: %s\n", yerr.msg);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	a.max = 128;</div><div class='del'>-	a.s = calloc(a.max, sizeof(*a.s));</div><div class='del'>-	if (!a.s)</div><div class='del'>-		goto err_close;</div><div class='del'>-</div><div class='del'>-	pools = netdev_page_pool_get_dump(ys);</div><div class='del'>-	if (!pools)</div><div class='del'>-		goto err_free;</div><div class='del'>-</div><div class='del'>-	ynl_dump_foreach(pools, pp) {</div><div class='del'>-		struct stat *s = find_ifc(&amp;a, pp-&gt;ifindex);</div><div class='del'>-</div><div class='del'>-		count(s, 1, pp);</div><div class='del'>-		if (pp-&gt;_present.detach_time)</div><div class='del'>-			count(s, 0, pp);</div><div class='del'>-	}</div><div class='del'>-	netdev_page_pool_get_list_free(pools);</div><div class='del'>-</div><div class='del'>-	pp_stats = netdev_page_pool_stats_get_dump(ys);</div><div class='del'>-	if (!pp_stats)</div><div class='del'>-		goto err_free;</div><div class='del'>-</div><div class='del'>-	ynl_dump_foreach(pp_stats, pp) {</div><div class='del'>-		struct stat *s = find_ifc(&amp;a, pp-&gt;info.ifindex);</div><div class='del'>-</div><div class='del'>-		if (pp-&gt;_present.alloc_fast)</div><div class='del'>-			s-&gt;alloc_fast += pp-&gt;alloc_fast;</div><div class='del'>-		if (pp-&gt;_present.alloc_refill)</div><div class='del'>-			s-&gt;alloc_fast += pp-&gt;alloc_refill;</div><div class='del'>-		if (pp-&gt;_present.alloc_slow)</div><div class='del'>-			s-&gt;alloc_slow += pp-&gt;alloc_slow;</div><div class='del'>-		if (pp-&gt;_present.recycle_ring)</div><div class='del'>-			s-&gt;recycle_ring += pp-&gt;recycle_ring;</div><div class='del'>-		if (pp-&gt;_present.recycle_cached)</div><div class='del'>-			s-&gt;recycle_cache += pp-&gt;recycle_cached;</div><div class='del'>-	}</div><div class='del'>-	netdev_page_pool_stats_get_list_free(pp_stats);</div><div class='del'>-</div><div class='del'>-	for (unsigned int i = 0; i &lt; a.i; i++) {</div><div class='del'>-		char ifname[IF_NAMESIZE];</div><div class='del'>-		struct stat *s = &amp;a.s[i];</div><div class='del'>-		const char *name;</div><div class='del'>-		double recycle;</div><div class='del'>-</div><div class='del'>-		if (!s-&gt;ifc) {</div><div class='del'>-			name = "&lt;orphan&gt;\t";</div><div class='del'>-		} else {</div><div class='del'>-			name = if_indextoname(s-&gt;ifc, ifname);</div><div class='del'>-			if (name)</div><div class='del'>-				printf("%8s", name);</div><div class='del'>-			printf("[%u]\t", s-&gt;ifc);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		printf("page pools: %u (zombies: %u)\n",</div><div class='del'>-		       s-&gt;live[1].cnt, s-&gt;live[0].cnt);</div><div class='del'>-		printf("\t\trefs: %zu bytes: %zu (refs: %zu bytes: %zu)\n",</div><div class='del'>-		       s-&gt;live[1].refs, s-&gt;live[1].bytes,</div><div class='del'>-		       s-&gt;live[0].refs, s-&gt;live[0].bytes);</div><div class='del'>-</div><div class='del'>-		/* We don't know how many pages are sitting in cache and ring</div><div class='del'>-		 * so we will under-count the recycling rate a bit.</div><div class='del'>-		 */</div><div class='del'>-		recycle = (double)(s-&gt;recycle_ring + s-&gt;recycle_cache) /</div><div class='del'>-			(s-&gt;alloc_fast + s-&gt;alloc_slow) * 100;</div><div class='del'>-		printf("\t\trecycling: %.1lf%% (alloc: %zu:%zu recycle: %zu:%zu)\n",</div><div class='del'>-		       recycle, s-&gt;alloc_slow, s-&gt;alloc_fast,</div><div class='del'>-		       s-&gt;recycle_ring, s-&gt;recycle_cache);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ynl_sock_destroy(ys);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free:</div><div class='del'>-	free(a.s);</div><div class='del'>-err_close:</div><div class='del'>-	fprintf(stderr, "YNL: %s\n", ys-&gt;err.msg);</div><div class='del'>-	ynl_sock_destroy(ys);</div><div class='del'>-	return 2;</div><div class='del'>-}</div><div class='head'>diff --git a/tools/net/ynl/samples/tc-filter-add.c b/tools/net/ynl/samples/tc-filter-add.c<br/>new file mode 100644<br/>index 000000000000..97871e9e9edc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/samples/tc-filter-add.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/samples/tc-filter-add.c</a></div><div class='hunk'>@@ -0,0 +1,335 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;arpa/inet.h&gt;</div><div class='add'>+#include &lt;linux/pkt_sched.h&gt;</div><div class='add'>+#include &lt;linux/tc_act/tc_vlan.h&gt;</div><div class='add'>+#include &lt;linux/tc_act/tc_gact.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;net/if.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;ynl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tc-user.h"</div><div class='add'>+</div><div class='add'>+#define TC_HANDLE (0xFFFF &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+const char *vlan_act_name(struct tc_vlan *p)</div><div class='add'>+{</div><div class='add'>+	switch (p-&gt;v_action) {</div><div class='add'>+	case TCA_VLAN_ACT_POP:</div><div class='add'>+		return "pop";</div><div class='add'>+	case TCA_VLAN_ACT_PUSH:</div><div class='add'>+		return "push";</div><div class='add'>+	case TCA_VLAN_ACT_MODIFY:</div><div class='add'>+		return "modify";</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "not supported";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const char *gact_act_name(struct tc_gact *p)</div><div class='add'>+{</div><div class='add'>+	switch (p-&gt;action) {</div><div class='add'>+	case TC_ACT_SHOT:</div><div class='add'>+		return "drop";</div><div class='add'>+	case TC_ACT_OK:</div><div class='add'>+		return "ok";</div><div class='add'>+	case TC_ACT_PIPE:</div><div class='add'>+		return "pipe";</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "not supported";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_vlan(struct tc_act_vlan_attrs *vlan)</div><div class='add'>+{</div><div class='add'>+	printf("%s ", vlan_act_name(vlan-&gt;parms));</div><div class='add'>+	if (vlan-&gt;_present.push_vlan_id)</div><div class='add'>+		printf("id %u ", vlan-&gt;push_vlan_id);</div><div class='add'>+	if (vlan-&gt;_present.push_vlan_protocol)</div><div class='add'>+		printf("protocol %#x ", ntohs(vlan-&gt;push_vlan_protocol));</div><div class='add'>+	if (vlan-&gt;_present.push_vlan_priority)</div><div class='add'>+		printf("priority %u ", vlan-&gt;push_vlan_priority);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_gact(struct tc_act_gact_attrs *gact)</div><div class='add'>+{</div><div class='add'>+	struct tc_gact *p = gact-&gt;parms;</div><div class='add'>+</div><div class='add'>+	printf("%s ", gact_act_name(p));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flower_print(struct tc_flower_attrs *flower, const char *kind)</div><div class='add'>+{</div><div class='add'>+	struct tc_act_attrs *a;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	printf("%s:\n", kind);</div><div class='add'>+</div><div class='add'>+	if (flower-&gt;_present.key_vlan_id)</div><div class='add'>+		printf("  vlan_id: %u\n", flower-&gt;key_vlan_id);</div><div class='add'>+	if (flower-&gt;_present.key_vlan_prio)</div><div class='add'>+		printf("  vlan_prio: %u\n", flower-&gt;key_vlan_prio);</div><div class='add'>+	if (flower-&gt;_present.key_num_of_vlans)</div><div class='add'>+		printf("  num_of_vlans: %u\n", flower-&gt;key_num_of_vlans);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; flower-&gt;_count.act; i++) {</div><div class='add'>+		a = &amp;flower-&gt;act[i];</div><div class='add'>+		printf("action order: %i %s ", i + 1, a-&gt;kind);</div><div class='add'>+		if (a-&gt;options._present.vlan)</div><div class='add'>+			print_vlan(&amp;a-&gt;options.vlan);</div><div class='add'>+		else if (a-&gt;options._present.gact)</div><div class='add'>+			print_gact(&amp;a-&gt;options.gact);</div><div class='add'>+		printf("\n");</div><div class='add'>+	}</div><div class='add'>+	printf("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tc_filter_print(struct tc_gettfilter_rsp *f)</div><div class='add'>+{</div><div class='add'>+	struct tc_options_msg *opt = &amp;f-&gt;options;</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;_present.flower)</div><div class='add'>+		flower_print(&amp;opt-&gt;flower, f-&gt;kind);</div><div class='add'>+	else if (f-&gt;_len.kind)</div><div class='add'>+		printf("%s pref %u proto: %#x\n", f-&gt;kind,</div><div class='add'>+		       (f-&gt;_hdr.tcm_info &gt;&gt; 16),</div><div class='add'>+			ntohs(TC_H_MIN(f-&gt;_hdr.tcm_info)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_filter_add(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	struct tc_newtfilter_req *req;</div><div class='add'>+	struct tc_act_attrs *acts;</div><div class='add'>+	struct tc_vlan p = {</div><div class='add'>+		.action = TC_ACT_PIPE,</div><div class='add'>+		.v_action = TCA_VLAN_ACT_PUSH</div><div class='add'>+	};</div><div class='add'>+	__u16 flags = NLM_F_REQUEST | NLM_F_EXCL | NLM_F_CREATE;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	req = tc_newtfilter_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		fprintf(stderr, "tc_newtfilter_req_alloc failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(req, 0, sizeof(*req));</div><div class='add'>+</div><div class='add'>+	acts = tc_act_attrs_alloc(3);</div><div class='add'>+	if (!acts) {</div><div class='add'>+		fprintf(stderr, "tc_act_attrs_alloc\n");</div><div class='add'>+		tc_newtfilter_req_free(req);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(acts, 0, sizeof(*acts) * 3);</div><div class='add'>+</div><div class='add'>+	req-&gt;_hdr.tcm_ifindex = ifi;</div><div class='add'>+	req-&gt;_hdr.tcm_parent = TC_H_MAKE(TC_H_CLSACT, TC_H_MIN_INGRESS);</div><div class='add'>+	req-&gt;_hdr.tcm_info = TC_H_MAKE(1 &lt;&lt; 16, htons(ETH_P_8021Q));</div><div class='add'>+	req-&gt;chain = 0;</div><div class='add'>+</div><div class='add'>+	tc_newtfilter_req_set_nlflags(req, flags);</div><div class='add'>+	tc_newtfilter_req_set_kind(req, "flower");</div><div class='add'>+	tc_newtfilter_req_set_options_flower_key_vlan_id(req, 100);</div><div class='add'>+	tc_newtfilter_req_set_options_flower_key_vlan_prio(req, 5);</div><div class='add'>+	tc_newtfilter_req_set_options_flower_key_num_of_vlans(req, 3);</div><div class='add'>+</div><div class='add'>+	__tc_newtfilter_req_set_options_flower_act(req, acts, 3);</div><div class='add'>+</div><div class='add'>+	/* Skip action at index 0 because in TC, the action array</div><div class='add'>+	 * index starts at 1, with each index defining the action's</div><div class='add'>+	 * order. In contrast, in YNL indexed arrays start at index 0.</div><div class='add'>+	 */</div><div class='add'>+	tc_act_attrs_set_kind(&amp;acts[1], "vlan");</div><div class='add'>+	tc_act_attrs_set_options_vlan_parms(&amp;acts[1], &amp;p, sizeof(p));</div><div class='add'>+	tc_act_attrs_set_options_vlan_push_vlan_id(&amp;acts[1], 200);</div><div class='add'>+	tc_act_attrs_set_kind(&amp;acts[2], "vlan");</div><div class='add'>+	tc_act_attrs_set_options_vlan_parms(&amp;acts[2], &amp;p, sizeof(p));</div><div class='add'>+	tc_act_attrs_set_options_vlan_push_vlan_id(&amp;acts[2], 300);</div><div class='add'>+</div><div class='add'>+	tc_newtfilter_req_set_options_flower_flags(req, 0);</div><div class='add'>+	tc_newtfilter_req_set_options_flower_key_eth_type(req, htons(0x8100));</div><div class='add'>+</div><div class='add'>+	ret = tc_newtfilter(ys, req);</div><div class='add'>+	if (ret)</div><div class='add'>+		fprintf(stderr, "tc_newtfilter: %s\n", ys-&gt;err.msg);</div><div class='add'>+</div><div class='add'>+	tc_newtfilter_req_free(req);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_filter_show(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	struct tc_gettfilter_req_dump *req;</div><div class='add'>+	struct tc_gettfilter_list *rsp;</div><div class='add'>+</div><div class='add'>+	req = tc_gettfilter_req_dump_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		fprintf(stderr, "tc_gettfilter_req_dump_alloc failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(req, 0, sizeof(*req));</div><div class='add'>+</div><div class='add'>+	req-&gt;_hdr.tcm_ifindex = ifi;</div><div class='add'>+	req-&gt;_hdr.tcm_parent = TC_H_MAKE(TC_H_CLSACT, TC_H_MIN_INGRESS);</div><div class='add'>+	req-&gt;_present.chain = 1;</div><div class='add'>+	req-&gt;chain = 0;</div><div class='add'>+</div><div class='add'>+	rsp = tc_gettfilter_dump(ys, req);</div><div class='add'>+	tc_gettfilter_req_dump_free(req);</div><div class='add'>+	if (!rsp) {</div><div class='add'>+		fprintf(stderr, "YNL: %s\n", ys-&gt;err.msg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ynl_dump_empty(rsp))</div><div class='add'>+		fprintf(stderr, "Error: no filters reported\n");</div><div class='add'>+	else</div><div class='add'>+		ynl_dump_foreach(rsp, flt) tc_filter_print(flt);</div><div class='add'>+</div><div class='add'>+	tc_gettfilter_list_free(rsp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_filter_del(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	struct tc_deltfilter_req *req;</div><div class='add'>+	__u16 flags = NLM_F_REQUEST;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	req = tc_deltfilter_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		fprintf(stderr, "tc_deltfilter_req_alloc failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(req, 0, sizeof(*req));</div><div class='add'>+</div><div class='add'>+	req-&gt;_hdr.tcm_ifindex = ifi;</div><div class='add'>+	req-&gt;_hdr.tcm_parent = TC_H_MAKE(TC_H_CLSACT, TC_H_MIN_INGRESS);</div><div class='add'>+	req-&gt;_hdr.tcm_info = TC_H_MAKE(1 &lt;&lt; 16, htons(ETH_P_8021Q));</div><div class='add'>+	tc_deltfilter_req_set_nlflags(req, flags);</div><div class='add'>+</div><div class='add'>+	ret = tc_deltfilter(ys, req);</div><div class='add'>+	if (ret)</div><div class='add'>+		fprintf(stderr, "tc_deltfilter failed: %s\n", ys-&gt;err.msg);</div><div class='add'>+</div><div class='add'>+	tc_deltfilter_req_free(req);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_clsact_add(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	struct tc_newqdisc_req *req;</div><div class='add'>+	__u16 flags = NLM_F_REQUEST | NLM_F_EXCL | NLM_F_CREATE;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	req = tc_newqdisc_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		fprintf(stderr, "tc_newqdisc_req_alloc failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(req, 0, sizeof(*req));</div><div class='add'>+</div><div class='add'>+	req-&gt;_hdr.tcm_ifindex = ifi;</div><div class='add'>+	req-&gt;_hdr.tcm_parent = TC_H_CLSACT;</div><div class='add'>+	req-&gt;_hdr.tcm_handle = TC_HANDLE;</div><div class='add'>+	tc_newqdisc_req_set_nlflags(req, flags);</div><div class='add'>+	tc_newqdisc_req_set_kind(req, "clsact");</div><div class='add'>+</div><div class='add'>+	ret = tc_newqdisc(ys, req);</div><div class='add'>+	if (ret)</div><div class='add'>+		fprintf(stderr, "tc_newqdisc failed: %s\n", ys-&gt;err.msg);</div><div class='add'>+</div><div class='add'>+	tc_newqdisc_req_free(req);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_clsact_del(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	struct tc_delqdisc_req *req;</div><div class='add'>+	__u16 flags = NLM_F_REQUEST;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	req = tc_delqdisc_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		fprintf(stderr, "tc_delqdisc_req_alloc failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	memset(req, 0, sizeof(*req));</div><div class='add'>+</div><div class='add'>+	req-&gt;_hdr.tcm_ifindex = ifi;</div><div class='add'>+	req-&gt;_hdr.tcm_parent = TC_H_CLSACT;</div><div class='add'>+	req-&gt;_hdr.tcm_handle = TC_HANDLE;</div><div class='add'>+	tc_delqdisc_req_set_nlflags(req, flags);</div><div class='add'>+</div><div class='add'>+	ret = tc_delqdisc(ys, req);</div><div class='add'>+	if (ret)</div><div class='add'>+		fprintf(stderr, "tc_delqdisc failed: %s\n", ys-&gt;err.msg);</div><div class='add'>+</div><div class='add'>+	tc_delqdisc_req_free(req);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tc_filter_config(struct ynl_sock *ys, int ifi)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (tc_filter_add(ys, ifi))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	ret = tc_filter_show(ys, ifi);</div><div class='add'>+</div><div class='add'>+	if (tc_filter_del(ys, ifi))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int main(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	struct ynl_error yerr;</div><div class='add'>+	struct ynl_sock *ys;</div><div class='add'>+	int ifi, ret = 0;</div><div class='add'>+</div><div class='add'>+	if (argc &lt; 2) {</div><div class='add'>+		fprintf(stderr, "Usage: %s &lt;interface_name&gt;\n", argv[0]);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	ifi = if_nametoindex(argv[1]);</div><div class='add'>+	if (!ifi) {</div><div class='add'>+		perror("if_nametoindex");</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ys = ynl_sock_create(&amp;ynl_tc_family, &amp;yerr);</div><div class='add'>+	if (!ys) {</div><div class='add'>+		fprintf(stderr, "YNL: %s\n", yerr.msg);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tc_clsact_add(ys, ifi)) {</div><div class='add'>+		ret = 2;</div><div class='add'>+		goto err_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tc_filter_config(ys, ifi))</div><div class='add'>+		ret = 3;</div><div class='add'>+</div><div class='add'>+	if (tc_clsact_del(ys, ifi))</div><div class='add'>+		ret = 4;</div><div class='add'>+</div><div class='add'>+err_destroy:</div><div class='add'>+	ynl_sock_destroy(ys);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/ynl/tests/Makefile b/tools/net/ynl/tests/Makefile<br/>new file mode 100644<br/>index 000000000000..c1df2e001255<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/tests/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/tests/Makefile</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Makefile for YNL tests</div><div class='add'>+</div><div class='add'>+TESTS := \</div><div class='add'>+	test_ynl_cli.sh \</div><div class='add'>+	test_ynl_ethtool.sh \</div><div class='add'>+# end of TESTS</div><div class='add'>+</div><div class='add'>+all: $(TESTS)</div><div class='add'>+</div><div class='add'>+run_tests:</div><div class='add'>+	@for test in $(TESTS); do \</div><div class='add'>+		./$$test; \</div><div class='add'>+	done</div><div class='add'>+</div><div class='add'>+install: $(TESTS)</div><div class='add'>+	@mkdir -p $(DESTDIR)/usr/bin</div><div class='add'>+	@mkdir -p $(DESTDIR)/usr/share/kselftest</div><div class='add'>+	@cp ../../../testing/selftests/kselftest/ktap_helpers.sh $(DESTDIR)/usr/share/kselftest/</div><div class='add'>+	@for test in $(TESTS); do \</div><div class='add'>+		name=$$(basename $$test .sh); \</div><div class='add'>+		sed -e 's|^ynl=.*|ynl="ynl"|' \</div><div class='add'>+		    -e 's|^ynl_ethtool=.*|ynl_ethtool="ynl-ethtool"|' \</div><div class='add'>+		    -e 's|KSELFTEST_KTAP_HELPERS=.*|KSELFTEST_KTAP_HELPERS="/usr/share/kselftest/ktap_helpers.sh"|' \</div><div class='add'>+		    $$test &gt; $(DESTDIR)/usr/bin/$$name; \</div><div class='add'>+		chmod +x $(DESTDIR)/usr/bin/$$name; \</div><div class='add'>+	done</div><div class='add'>+</div><div class='add'>+clean distclean:</div><div class='add'>+	@# Nothing to clean</div><div class='add'>+</div><div class='add'>+.PHONY: all install clean run_tests</div><div class='head'>diff --git a/tools/net/ynl/tests/config b/tools/net/ynl/tests/config<br/>new file mode 100644<br/>index 000000000000..339f1309c03f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/tests/config?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/tests/config</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+CONFIG_DUMMY=m</div><div class='add'>+CONFIG_INET_DIAG=y</div><div class='add'>+CONFIG_IPV6=y</div><div class='add'>+CONFIG_NET_NS=y</div><div class='add'>+CONFIG_NETDEVSIM=m</div><div class='add'>+CONFIG_VETH=m</div><div class='head'>diff --git a/tools/net/ynl/tests/test_ynl_cli.sh b/tools/net/ynl/tests/test_ynl_cli.sh<br/>new file mode 100755<br/>index 000000000000..7c0722a08117<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/tests/test_ynl_cli.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/tests/test_ynl_cli.sh</a></div><div class='hunk'>@@ -0,0 +1,327 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Test YNL CLI functionality</div><div class='add'>+</div><div class='add'>+# Load KTAP test helpers</div><div class='add'>+KSELFTEST_KTAP_HELPERS="$(dirname "$(realpath "$0")")/../../../testing/selftests/kselftest/ktap_helpers.sh"</div><div class='add'>+# shellcheck source=../../../testing/selftests/kselftest/ktap_helpers.sh</div><div class='add'>+source "$KSELFTEST_KTAP_HELPERS"</div><div class='add'>+</div><div class='add'>+# Default ynl path for direct execution, can be overridden by make install</div><div class='add'>+ynl="../pyynl/cli.py"</div><div class='add'>+</div><div class='add'>+readonly NSIM_ID="1338"</div><div class='add'>+readonly NSIM_DEV_NAME="nsim${NSIM_ID}"</div><div class='add'>+readonly VETH_A="veth_a"</div><div class='add'>+readonly VETH_B="veth_b"</div><div class='add'>+</div><div class='add'>+testns="ynl-$(mktemp -u XXXXXX)"</div><div class='add'>+TESTS_NO=0</div><div class='add'>+</div><div class='add'>+# Test listing available families</div><div class='add'>+cli_list_families()</div><div class='add'>+{</div><div class='add'>+	if $ynl --list-families &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_pass "YNL CLI list families"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI list families"</div><div class='add'>+	fi</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test netdev family operations (dev-get, queue-get)</div><div class='add'>+cli_netdev_ops()</div><div class='add'>+{</div><div class='add'>+	local dev_output</div><div class='add'>+	local ifindex</div><div class='add'>+</div><div class='add'>+	ifindex=$(ip netns exec "$testns" cat /sys/class/net/"$NSIM_DEV_NAME"/ifindex 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	dev_output=$(ip netns exec "$testns" $ynl --family netdev \</div><div class='add'>+		--do dev-get --json "{\"ifindex\": $ifindex}" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$dev_output" | grep -q "ifindex"; then</div><div class='add'>+		ktap_test_fail "YNL CLI netdev operations (netdev dev-get output missing ifindex)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family netdev \</div><div class='add'>+		--dump queue-get --json "{\"ifindex\": $ifindex}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI netdev operations (failed to get netdev queue info)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL CLI netdev operations"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test ethtool family operations (rings-get, linkinfo-get)</div><div class='add'>+cli_ethtool_ops()</div><div class='add'>+{</div><div class='add'>+	local rings_output</div><div class='add'>+	local linkinfo_output</div><div class='add'>+</div><div class='add'>+	rings_output=$(ip netns exec "$testns" $ynl --family ethtool \</div><div class='add'>+		--do rings-get --json "{\"header\": {\"dev-name\": \"$NSIM_DEV_NAME\"}}" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$rings_output" | grep -q "header"; then</div><div class='add'>+		ktap_test_fail "YNL CLI ethtool operations (ethtool rings-get output missing header)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	linkinfo_output=$(ip netns exec "$testns" $ynl --family ethtool \</div><div class='add'>+		--do linkinfo-get --json "{\"header\": {\"dev-name\": \"$VETH_A\"}}" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$linkinfo_output" | grep -q "header"; then</div><div class='add'>+		ktap_test_fail "YNL CLI ethtool operations (ethtool linkinfo-get output missing header)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL CLI ethtool operations"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test rt-route family operations</div><div class='add'>+cli_rt_route_ops()</div><div class='add'>+{</div><div class='add'>+	local ifindex</div><div class='add'>+</div><div class='add'>+	if ! $ynl --list-families 2&gt;/dev/null | grep -q "rt-route"; then</div><div class='add'>+		ktap_test_skip "YNL CLI rt-route operations (rt-route family not available)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ifindex=$(ip netns exec "$testns" cat /sys/class/net/"$NSIM_DEV_NAME"/ifindex 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	# Add route: 192.0.2.0/24 dev $dev scope link</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family rt-route --do newroute --create \</div><div class='add'>+		--json "{\"dst\": \"192.0.2.0\", \"oif\": $ifindex, \"rtm-dst-len\": 24, \"rtm-family\": 2, \"rtm-scope\": 253, \"rtm-type\": 1, \"rtm-protocol\": 3, \"rtm-table\": 254}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI rt-route operations (failed to add route)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	local route_output</div><div class='add'>+	route_output=$(ip netns exec "$testns" $ynl --family rt-route --dump getroute 2&gt;/dev/null)</div><div class='add'>+	if echo "$route_output" | grep -q "192.0.2.0"; then</div><div class='add'>+		ktap_test_pass "YNL CLI rt-route operations"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI rt-route operations (failed to verify route)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip netns exec "$testns" $ynl --family rt-route --do delroute \</div><div class='add'>+		--json "{\"dst\": \"192.0.2.0\", \"oif\": $ifindex, \"rtm-dst-len\": 24, \"rtm-family\": 2, \"rtm-scope\": 253, \"rtm-type\": 1, \"rtm-protocol\": 3, \"rtm-table\": 254}" &amp;&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test rt-addr family operations</div><div class='add'>+cli_rt_addr_ops()</div><div class='add'>+{</div><div class='add'>+	local ifindex</div><div class='add'>+</div><div class='add'>+	if ! $ynl --list-families 2&gt;/dev/null | grep -q "rt-addr"; then</div><div class='add'>+		ktap_test_skip "YNL CLI rt-addr operations (rt-addr family not available)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ifindex=$(ip netns exec "$testns" cat /sys/class/net/"$NSIM_DEV_NAME"/ifindex 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family rt-addr --do newaddr \</div><div class='add'>+		--json "{\"ifa-index\": $ifindex, \"local\": \"192.0.2.100\", \"ifa-prefixlen\": 24, \"ifa-family\": 2}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI rt-addr operations (failed to add address)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	local addr_output</div><div class='add'>+	addr_output=$(ip netns exec "$testns" $ynl --family rt-addr --dump getaddr 2&gt;/dev/null)</div><div class='add'>+	if echo "$addr_output" | grep -q "192.0.2.100"; then</div><div class='add'>+		ktap_test_pass "YNL CLI rt-addr operations"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI rt-addr operations (failed to verify address)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip netns exec "$testns" $ynl --family rt-addr --do deladdr \</div><div class='add'>+		--json "{\"ifa-index\": $ifindex, \"local\": \"192.0.2.100\", \"ifa-prefixlen\": 24, \"ifa-family\": 2}" &amp;&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test rt-link family operations</div><div class='add'>+cli_rt_link_ops()</div><div class='add'>+{</div><div class='add'>+	if ! $ynl --list-families 2&gt;/dev/null | grep -q "rt-link"; then</div><div class='add'>+		ktap_test_skip "YNL CLI rt-link operations (rt-link family not available)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family rt-link --do newlink --create \</div><div class='add'>+		--json "{\"ifname\": \"dummy0\", \"linkinfo\": {\"kind\": \"dummy\"}}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI rt-link operations (failed to add link)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	local link_output</div><div class='add'>+	link_output=$(ip netns exec "$testns" $ynl --family rt-link --dump getlink 2&gt;/dev/null)</div><div class='add'>+	if echo "$link_output" | grep -q "$NSIM_DEV_NAME" &amp;&amp; echo "$link_output" | grep -q "dummy0"; then</div><div class='add'>+		ktap_test_pass "YNL CLI rt-link operations"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI rt-link operations (failed to verify link)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip netns exec "$testns" $ynl --family rt-link --do dellink \</div><div class='add'>+		--json "{\"ifname\": \"dummy0\"}" &amp;&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test rt-neigh family operations</div><div class='add'>+cli_rt_neigh_ops()</div><div class='add'>+{</div><div class='add'>+	local ifindex</div><div class='add'>+</div><div class='add'>+	if ! $ynl --list-families 2&gt;/dev/null | grep -q "rt-neigh"; then</div><div class='add'>+		ktap_test_skip "YNL CLI rt-neigh operations (rt-neigh family not available)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ifindex=$(ip netns exec "$testns" cat /sys/class/net/"$NSIM_DEV_NAME"/ifindex 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	# Add neighbor: 192.0.2.1 dev nsim1338 lladdr 11:22:33:44:55:66 PERMANENT</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family rt-neigh --do newneigh --create \</div><div class='add'>+		--json "{\"ndm-ifindex\": $ifindex, \"dst\": \"192.0.2.1\", \"lladdr\": \"11:22:33:44:55:66\", \"ndm-family\": 2, \"ndm-state\": 128}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI rt-neigh operations (failed to add neighbor)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	local neigh_output</div><div class='add'>+	neigh_output=$(ip netns exec "$testns" $ynl --family rt-neigh --dump getneigh 2&gt;/dev/null)</div><div class='add'>+	if echo "$neigh_output" | grep -q "192.0.2.1"; then</div><div class='add'>+		ktap_test_pass "YNL CLI rt-neigh operations"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI rt-neigh operations (failed to verify neighbor)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip netns exec "$testns" $ynl --family rt-neigh --do delneigh \</div><div class='add'>+		--json "{\"ndm-ifindex\": $ifindex, \"dst\": \"192.0.2.1\", \"lladdr\": \"11:22:33:44:55:66\", \"ndm-family\": 2}" &amp;&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test rt-rule family operations</div><div class='add'>+cli_rt_rule_ops()</div><div class='add'>+{</div><div class='add'>+	if ! $ynl --list-families 2&gt;/dev/null | grep -q "rt-rule"; then</div><div class='add'>+		ktap_test_skip "YNL CLI rt-rule operations (rt-rule family not available)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Add rule: from 192.0.2.0/24 lookup 100 none</div><div class='add'>+	if ! ip netns exec "$testns" $ynl --family rt-rule --do newrule \</div><div class='add'>+		--json "{\"family\": 2, \"src-len\": 24, \"src\": \"192.0.2.0\", \"table\": 100}" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL CLI rt-rule operations (failed to add rule)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	local rule_output</div><div class='add'>+	rule_output=$(ip netns exec "$testns" $ynl --family rt-rule --dump getrule 2&gt;/dev/null)</div><div class='add'>+	if echo "$rule_output" | grep -q "192.0.2.0"; then</div><div class='add'>+		ktap_test_pass "YNL CLI rt-rule operations"</div><div class='add'>+	else</div><div class='add'>+		ktap_test_fail "YNL CLI rt-rule operations (failed to verify rule)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip netns exec "$testns" $ynl --family rt-rule --do delrule \</div><div class='add'>+		--json "{\"family\": 2, \"src-len\": 24, \"src\": \"192.0.2.0\", \"table\": 100}" &amp;&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+# Test nlctrl family operations</div><div class='add'>+cli_nlctrl_ops()</div><div class='add'>+{</div><div class='add'>+	local family_output</div><div class='add'>+</div><div class='add'>+	if ! family_output=$($ynl --family nlctrl \</div><div class='add'>+		--do getfamily --json "{\"family-name\": \"netdev\"}" 2&gt;/dev/null); then</div><div class='add'>+		ktap_test_fail "YNL CLI nlctrl getfamily (failed to get nlctrl family info)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! echo "$family_output" | grep -q "family-name"; then</div><div class='add'>+		ktap_test_fail "YNL CLI nlctrl getfamily (nlctrl getfamily output missing family-name)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! echo "$family_output" | grep -q "family-id"; then</div><div class='add'>+		ktap_test_fail "YNL CLI nlctrl getfamily (nlctrl getfamily output missing family-id)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL CLI nlctrl getfamily"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+setup()</div><div class='add'>+{</div><div class='add'>+	modprobe netdevsim &amp;&gt; /dev/null</div><div class='add'>+	if ! [ -f /sys/bus/netdevsim/new_device ]; then</div><div class='add'>+		ktap_skip_all "netdevsim module not available"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns add "$testns" 2&gt;/dev/null; then</div><div class='add'>+		ktap_skip_all "failed to create test namespace"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "$NSIM_ID 1" | ip netns exec "$testns" tee /sys/bus/netdevsim/new_device &gt;/dev/null 2&gt;&amp;1 || {</div><div class='add'>+		ktap_skip_all "failed to create netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	local dev</div><div class='add'>+	dev=$(ip netns exec "$testns" ls /sys/bus/netdevsim/devices/netdevsim$NSIM_ID/net 2&gt;/dev/null | head -1)</div><div class='add'>+	if [[ -z "$dev" ]]; then</div><div class='add'>+		ktap_skip_all "failed to find netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip -netns "$testns" link set dev "$dev" name "$NSIM_DEV_NAME" 2&gt;/dev/null || {</div><div class='add'>+		ktap_skip_all "failed to rename netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ip -netns "$testns" link set dev "$NSIM_DEV_NAME" up 2&gt;/dev/null</div><div class='add'>+</div><div class='add'>+	if ! ip -n "$testns" link add "$VETH_A" type veth peer name "$VETH_B" 2&gt;/dev/null; then</div><div class='add'>+		ktap_skip_all "failed to create veth pair"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip -n "$testns" link set "$VETH_A" up 2&gt;/dev/null</div><div class='add'>+	ip -n "$testns" link set "$VETH_B" up 2&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+cleanup()</div><div class='add'>+{</div><div class='add'>+	ip netns exec "$testns" bash -c "echo $NSIM_ID &gt; /sys/bus/netdevsim/del_device" 2&gt;/dev/null || true</div><div class='add'>+	ip netns del "$testns" 2&gt;/dev/null || true</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+# Check if ynl command is available</div><div class='add'>+if ! command -v $ynl &amp;&gt;/dev/null &amp;&amp; [[ ! -x $ynl ]]; then</div><div class='add'>+	ktap_skip_all "ynl command not found: $ynl"</div><div class='add'>+	exit "$KSFT_SKIP"</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+trap cleanup EXIT</div><div class='add'>+</div><div class='add'>+ktap_print_header</div><div class='add'>+setup</div><div class='add'>+ktap_set_plan "${TESTS_NO}"</div><div class='add'>+</div><div class='add'>+cli_list_families</div><div class='add'>+cli_netdev_ops</div><div class='add'>+cli_ethtool_ops</div><div class='add'>+cli_rt_route_ops</div><div class='add'>+cli_rt_addr_ops</div><div class='add'>+cli_rt_link_ops</div><div class='add'>+cli_rt_neigh_ops</div><div class='add'>+cli_rt_rule_ops</div><div class='add'>+cli_nlctrl_ops</div><div class='add'>+</div><div class='add'>+ktap_finished</div><div class='head'>diff --git a/tools/net/ynl/tests/test_ynl_ethtool.sh b/tools/net/ynl/tests/test_ynl_ethtool.sh<br/>new file mode 100755<br/>index 000000000000..b826269017f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/tests/test_ynl_ethtool.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/tests/test_ynl_ethtool.sh</a></div><div class='hunk'>@@ -0,0 +1,222 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Test YNL ethtool functionality</div><div class='add'>+</div><div class='add'>+# Load KTAP test helpers</div><div class='add'>+KSELFTEST_KTAP_HELPERS="$(dirname "$(realpath "$0")")/../../../testing/selftests/kselftest/ktap_helpers.sh"</div><div class='add'>+# shellcheck source=../../../testing/selftests/kselftest/ktap_helpers.sh</div><div class='add'>+source "$KSELFTEST_KTAP_HELPERS"</div><div class='add'>+</div><div class='add'>+# Default ynl-ethtool path for direct execution, can be overridden by make install</div><div class='add'>+ynl_ethtool="../pyynl/ethtool.py"</div><div class='add'>+</div><div class='add'>+readonly NSIM_ID="1337"</div><div class='add'>+readonly NSIM_DEV_NAME="nsim${NSIM_ID}"</div><div class='add'>+readonly VETH_A="veth_a"</div><div class='add'>+readonly VETH_B="veth_b"</div><div class='add'>+</div><div class='add'>+testns="ynl-ethtool-$(mktemp -u XXXXXX)"</div><div class='add'>+TESTS_NO=0</div><div class='add'>+</div><div class='add'>+# Uses veth device as netdevsim doesn't support basic ethtool device info</div><div class='add'>+ethtool_device_info()</div><div class='add'>+{</div><div class='add'>+	local info_output</div><div class='add'>+</div><div class='add'>+	info_output=$(ip netns exec "$testns" $ynl_ethtool "$VETH_A" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$info_output" | grep -q "Settings for"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool device info (device info output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool device info"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_statistics()</div><div class='add'>+{</div><div class='add'>+	local stats_output</div><div class='add'>+</div><div class='add'>+	stats_output=$(ip netns exec "$testns" $ynl_ethtool --statistics "$NSIM_DEV_NAME" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$stats_output" | grep -q -E "(NIC statistics|packets|bytes)"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool statistics (statistics output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool statistics"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_ring_params()</div><div class='add'>+{</div><div class='add'>+	local ring_output</div><div class='add'>+</div><div class='add'>+	ring_output=$(ip netns exec "$testns" $ynl_ethtool --show-ring "$NSIM_DEV_NAME" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$ring_output" | grep -q -E "(Ring parameters|RX|TX)"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool ring parameters (ring parameters output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --set-ring "$NSIM_DEV_NAME" rx 64 2&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool ring parameters (set-ring command failed unexpectedly)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool ring parameters (show/set)"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_coalesce_params()</div><div class='add'>+{</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --show-coalesce "$NSIM_DEV_NAME" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool coalesce parameters (failed to get coalesce parameters)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --set-coalesce "$NSIM_DEV_NAME" rx-usecs 50 2&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool coalesce parameters (set-coalesce command failed unexpectedly)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool coalesce parameters (show/set)"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_pause_params()</div><div class='add'>+{</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --show-pause "$NSIM_DEV_NAME" &amp;&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool pause parameters (failed to get pause parameters)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --set-pause "$NSIM_DEV_NAME" tx 1 rx 1 2&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool pause parameters (set-pause command failed unexpectedly)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool pause parameters (show/set)"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_features_info()</div><div class='add'>+{</div><div class='add'>+	local features_output</div><div class='add'>+</div><div class='add'>+	features_output=$(ip netns exec "$testns" $ynl_ethtool --show-features "$NSIM_DEV_NAME" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$features_output" | grep -q -E "(Features|offload)"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool features info (features output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool features info (show/set)"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_channels_info()</div><div class='add'>+{</div><div class='add'>+	local channels_output</div><div class='add'>+</div><div class='add'>+	channels_output=$(ip netns exec "$testns" $ynl_ethtool --show-channels "$NSIM_DEV_NAME" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$channels_output" | grep -q -E "(Channel|Combined|RX|TX)"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool channels info (channels output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns exec "$testns" $ynl_ethtool --set-channels "$NSIM_DEV_NAME" combined-count 1 2&gt;/dev/null; then</div><div class='add'>+		ktap_test_fail "YNL ethtool channels info (set-channels command failed unexpectedly)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool channels info (show/set)"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+ethtool_time_stamping()</div><div class='add'>+{</div><div class='add'>+	local ts_output</div><div class='add'>+</div><div class='add'>+	ts_output=$(ip netns exec "$testns" $ynl_ethtool --show-time-stamping "$NSIM_DEV_NAME" 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+	if ! echo "$ts_output" | grep -q -E "(Time stamping|timestamping|SOF_TIMESTAMPING)"; then</div><div class='add'>+		ktap_test_fail "YNL ethtool time stamping (time stamping output missing expected content)"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ktap_test_pass "YNL ethtool time stamping"</div><div class='add'>+}</div><div class='add'>+TESTS_NO=$((TESTS_NO + 1))</div><div class='add'>+</div><div class='add'>+setup()</div><div class='add'>+{</div><div class='add'>+	modprobe netdevsim &amp;&gt; /dev/null</div><div class='add'>+	if ! [ -f /sys/bus/netdevsim/new_device ]; then</div><div class='add'>+		ktap_skip_all "netdevsim module not available"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! ip netns add "$testns" 2&gt;/dev/null; then</div><div class='add'>+		ktap_skip_all "failed to create test namespace"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "$NSIM_ID 1" | ip netns exec "$testns" tee /sys/bus/netdevsim/new_device &gt;/dev/null 2&gt;&amp;1 || {</div><div class='add'>+		ktap_skip_all "failed to create netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	local dev</div><div class='add'>+	dev=$(ip netns exec "$testns" ls /sys/bus/netdevsim/devices/netdevsim$NSIM_ID/net 2&gt;/dev/null | head -1)</div><div class='add'>+	if [[ -z "$dev" ]]; then</div><div class='add'>+		ktap_skip_all "failed to find netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip -netns "$testns" link set dev "$dev" name "$NSIM_DEV_NAME" 2&gt;/dev/null || {</div><div class='add'>+		ktap_skip_all "failed to rename netdevsim device"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ip -netns "$testns" link set dev "$NSIM_DEV_NAME" up 2&gt;/dev/null</div><div class='add'>+</div><div class='add'>+	if ! ip -n "$testns" link add "$VETH_A" type veth peer name "$VETH_B" 2&gt;/dev/null; then</div><div class='add'>+		ktap_skip_all "failed to create veth pair"</div><div class='add'>+		exit "$KSFT_SKIP"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	ip -n "$testns" link set "$VETH_A" up 2&gt;/dev/null</div><div class='add'>+	ip -n "$testns" link set "$VETH_B" up 2&gt;/dev/null</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+cleanup()</div><div class='add'>+{</div><div class='add'>+	ip netns exec "$testns" bash -c "echo $NSIM_ID &gt; /sys/bus/netdevsim/del_device" 2&gt;/dev/null || true</div><div class='add'>+	ip netns del "$testns" 2&gt;/dev/null || true</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+# Check if ynl-ethtool command is available</div><div class='add'>+if ! command -v $ynl_ethtool &amp;&gt;/dev/null &amp;&amp; [[ ! -x $ynl_ethtool ]]; then</div><div class='add'>+	ktap_skip_all "ynl-ethtool command not found: $ynl_ethtool"</div><div class='add'>+	exit "$KSFT_SKIP"</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+trap cleanup EXIT</div><div class='add'>+</div><div class='add'>+ktap_print_header</div><div class='add'>+setup</div><div class='add'>+ktap_set_plan "${TESTS_NO}"</div><div class='add'>+</div><div class='add'>+ethtool_device_info</div><div class='add'>+ethtool_statistics</div><div class='add'>+ethtool_ring_params</div><div class='add'>+ethtool_coalesce_params</div><div class='add'>+ethtool_pause_params</div><div class='add'>+ethtool_features_info</div><div class='add'>+ethtool_channels_info</div><div class='add'>+ethtool_time_stamping</div><div class='add'>+</div><div class='add'>+ktap_finished</div><div class='head'>diff --git a/tools/net/ynl/ynltool/.gitignore b/tools/net/ynl/ynltool/.gitignore<br/>new file mode 100644<br/>index 000000000000..690d399c921a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+ynltool</div><div class='add'>+*.d</div><div class='head'>diff --git a/tools/net/ynl/ynltool/Makefile b/tools/net/ynl/ynltool/Makefile<br/>new file mode 100644<br/>index 000000000000..f5b1de32daa5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/Makefile</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+include ../Makefile.deps</div><div class='add'>+</div><div class='add'>+INSTALL	?= install</div><div class='add'>+prefix  ?= /usr</div><div class='add'>+</div><div class='add'>+CC := gcc</div><div class='add'>+CFLAGS := -Wall -Wextra -Werror -O2</div><div class='add'>+ifeq ("$(DEBUG)","1")</div><div class='add'>+  CFLAGS += -g -fsanitize=address -fsanitize=leak -static-libasan</div><div class='add'>+endif</div><div class='add'>+CFLAGS += -I../lib -I../generated -I../../../include/uapi/</div><div class='add'>+</div><div class='add'>+SRC_VERSION := \</div><div class='add'>+	$(shell make --no-print-directory -sC ../../../.. kernelversion || \</div><div class='add'>+		echo "unknown")</div><div class='add'>+</div><div class='add'>+CFLAGS += -DSRC_VERSION='"$(SRC_VERSION)"'</div><div class='add'>+</div><div class='add'>+SRCS := $(wildcard *.c)</div><div class='add'>+OBJS := $(patsubst %.c,$(OUTPUT)%.o,$(SRCS))</div><div class='add'>+</div><div class='add'>+YNLTOOL := $(OUTPUT)ynltool</div><div class='add'>+</div><div class='add'>+include $(wildcard *.d)</div><div class='add'>+</div><div class='add'>+all: $(YNLTOOL)</div><div class='add'>+</div><div class='add'>+Q = @</div><div class='add'>+</div><div class='add'>+$(YNLTOOL): ../libynl.a $(OBJS)</div><div class='add'>+	$(Q)echo -e "\tLINK $@"</div><div class='add'>+	$(Q)$(CC) $(CFLAGS) -o $@ $(OBJS) ../libynl.a -lm</div><div class='add'>+</div><div class='add'>+%.o: %.c ../libynl.a</div><div class='add'>+	$(Q)echo -e "\tCC $@"</div><div class='add'>+	$(Q)$(COMPILE.c) -MMD -c -o $@ $&lt;</div><div class='add'>+</div><div class='add'>+../libynl.a:</div><div class='add'>+	$(Q)$(MAKE) -C ../</div><div class='add'>+</div><div class='add'>+clean:</div><div class='add'>+	rm -f *.o *.d *~</div><div class='add'>+</div><div class='add'>+distclean: clean</div><div class='add'>+	rm -f $(YNLTOOL)</div><div class='add'>+</div><div class='add'>+bindir ?= /usr/bin</div><div class='add'>+</div><div class='add'>+install: $(YNLTOOL)</div><div class='add'>+	$(INSTALL) -m 0755 $(YNLTOOL) $(DESTDIR)$(bindir)/$(YNLTOOL)</div><div class='add'>+</div><div class='add'>+.PHONY: all clean distclean</div><div class='add'>+.DEFAULT_GOAL=all</div><div class='head'>diff --git a/tools/net/ynl/ynltool/json_writer.c b/tools/net/ynl/ynltool/json_writer.c<br/>new file mode 100644<br/>index 000000000000..c8685e592cd3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/json_writer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/json_writer.c</a></div><div class='hunk'>@@ -0,0 +1,288 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Simple streaming JSON writer</div><div class='add'>+ *</div><div class='add'>+ * This takes care of the annoying bits of JSON syntax like the commas</div><div class='add'>+ * after elements</div><div class='add'>+ *</div><div class='add'>+ * Authors:	Stephen Hemminger &lt;stephen@networkplumber.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stdarg.h&gt;</div><div class='add'>+#include &lt;assert.h&gt;</div><div class='add'>+#include &lt;malloc.h&gt;</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='add'>+#include &lt;stdint.h&gt;</div><div class='add'>+</div><div class='add'>+#include "json_writer.h"</div><div class='add'>+</div><div class='add'>+struct json_writer {</div><div class='add'>+	FILE		*out;</div><div class='add'>+	unsigned	depth;</div><div class='add'>+	bool		pretty;</div><div class='add'>+	char		sep;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void jsonw_indent(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	unsigned i;</div><div class='add'>+	for (i = 0; i &lt; self-&gt;depth; ++i)</div><div class='add'>+		fputs("    ", self-&gt;out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jsonw_eol(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	if (!self-&gt;pretty)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	putc('\n', self-&gt;out);</div><div class='add'>+	jsonw_indent(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jsonw_eor(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	if (self-&gt;sep != '\0')</div><div class='add'>+		putc(self-&gt;sep, self-&gt;out);</div><div class='add'>+	self-&gt;sep = ',';</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jsonw_puts(json_writer_t *self, const char *str)</div><div class='add'>+{</div><div class='add'>+	putc('"', self-&gt;out);</div><div class='add'>+	for (; *str; ++str)</div><div class='add'>+		switch (*str) {</div><div class='add'>+		case '\t':</div><div class='add'>+			fputs("\\t", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '\n':</div><div class='add'>+			fputs("\\n", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '\r':</div><div class='add'>+			fputs("\\r", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '\f':</div><div class='add'>+			fputs("\\f", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '\b':</div><div class='add'>+			fputs("\\b", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '\\':</div><div class='add'>+			fputs("\\\\", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		case '"':</div><div class='add'>+			fputs("\\\"", self-&gt;out);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			putc(*str, self-&gt;out);</div><div class='add'>+		}</div><div class='add'>+	putc('"', self-&gt;out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+json_writer_t *jsonw_new(FILE *f)</div><div class='add'>+{</div><div class='add'>+	json_writer_t *self = malloc(sizeof(*self));</div><div class='add'>+	if (self) {</div><div class='add'>+		self-&gt;out = f;</div><div class='add'>+		self-&gt;depth = 0;</div><div class='add'>+		self-&gt;pretty = false;</div><div class='add'>+		self-&gt;sep = '\0';</div><div class='add'>+	}</div><div class='add'>+	return self;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_destroy(json_writer_t **self_p)</div><div class='add'>+{</div><div class='add'>+	json_writer_t *self = *self_p;</div><div class='add'>+</div><div class='add'>+	assert(self-&gt;depth == 0);</div><div class='add'>+	fputs("\n", self-&gt;out);</div><div class='add'>+	fflush(self-&gt;out);</div><div class='add'>+	free(self);</div><div class='add'>+	*self_p = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_pretty(json_writer_t *self, bool on)</div><div class='add'>+{</div><div class='add'>+	self-&gt;pretty = on;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_reset(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	assert(self-&gt;depth == 0);</div><div class='add'>+	self-&gt;sep = '\0';</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jsonw_begin(json_writer_t *self, int c)</div><div class='add'>+{</div><div class='add'>+	jsonw_eor(self);</div><div class='add'>+	putc(c, self-&gt;out);</div><div class='add'>+	++self-&gt;depth;</div><div class='add'>+	self-&gt;sep = '\0';</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jsonw_end(json_writer_t *self, int c)</div><div class='add'>+{</div><div class='add'>+	assert(self-&gt;depth &gt; 0);</div><div class='add'>+</div><div class='add'>+	--self-&gt;depth;</div><div class='add'>+	if (self-&gt;sep != '\0')</div><div class='add'>+		jsonw_eol(self);</div><div class='add'>+	putc(c, self-&gt;out);</div><div class='add'>+	self-&gt;sep = ',';</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_name(json_writer_t *self, const char *name)</div><div class='add'>+{</div><div class='add'>+	jsonw_eor(self);</div><div class='add'>+	jsonw_eol(self);</div><div class='add'>+	self-&gt;sep = '\0';</div><div class='add'>+	jsonw_puts(self, name);</div><div class='add'>+	putc(':', self-&gt;out);</div><div class='add'>+	if (self-&gt;pretty)</div><div class='add'>+		putc(' ', self-&gt;out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_vprintf_enquote(json_writer_t *self, const char *fmt, va_list ap)</div><div class='add'>+{</div><div class='add'>+	jsonw_eor(self);</div><div class='add'>+	putc('"', self-&gt;out);</div><div class='add'>+	vfprintf(self-&gt;out, fmt, ap);</div><div class='add'>+	putc('"', self-&gt;out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_printf(json_writer_t *self, const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	jsonw_eor(self);</div><div class='add'>+	vfprintf(self-&gt;out, fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_start_object(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	jsonw_begin(self, '{');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_end_object(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	jsonw_end(self, '}');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_start_array(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	jsonw_begin(self, '[');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_end_array(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	jsonw_end(self, ']');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_string(json_writer_t *self, const char *value)</div><div class='add'>+{</div><div class='add'>+	jsonw_eor(self);</div><div class='add'>+	jsonw_puts(self, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_bool(json_writer_t *self, bool val)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%s", val ? "true" : "false");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_null(json_writer_t *self)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "null");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_float_fmt(json_writer_t *self, const char *fmt, double num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, fmt, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_float(json_writer_t *self, double num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%g", num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_hu(json_writer_t *self, unsigned short num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%hu", num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_uint(json_writer_t *self, uint64_t num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%"PRIu64, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_lluint(json_writer_t *self, unsigned long long int num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%llu", num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_int(json_writer_t *self, int64_t num)</div><div class='add'>+{</div><div class='add'>+	jsonw_printf(self, "%"PRId64, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_string_field(json_writer_t *self, const char *prop, const char *val)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_string(self, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_bool_field(json_writer_t *self, const char *prop, bool val)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_bool(self, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_float_field(json_writer_t *self, const char *prop, double val)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_float(self, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_float_field_fmt(json_writer_t *self,</div><div class='add'>+			   const char *prop,</div><div class='add'>+			   const char *fmt,</div><div class='add'>+			   double val)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_float_fmt(self, fmt, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_uint_field(json_writer_t *self, const char *prop, uint64_t num)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_uint(self, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_hu_field(json_writer_t *self, const char *prop, unsigned short num)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_hu(self, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_lluint_field(json_writer_t *self,</div><div class='add'>+			const char *prop,</div><div class='add'>+			unsigned long long int num)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_lluint(self, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_int_field(json_writer_t *self, const char *prop, int64_t num)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_int(self, num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void jsonw_null_field(json_writer_t *self, const char *prop)</div><div class='add'>+{</div><div class='add'>+	jsonw_name(self, prop);</div><div class='add'>+	jsonw_null(self);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/ynl/ynltool/json_writer.h b/tools/net/ynl/ynltool/json_writer.h<br/>new file mode 100644<br/>index 000000000000..0f1e63c88f6a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/json_writer.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/json_writer.h</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * Simple streaming JSON writer</div><div class='add'>+ *</div><div class='add'>+ * This takes care of the annoying bits of JSON syntax like the commas</div><div class='add'>+ * after elements</div><div class='add'>+ *</div><div class='add'>+ * Authors:	Stephen Hemminger &lt;stephen@networkplumber.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _JSON_WRITER_H_</div><div class='add'>+#define _JSON_WRITER_H_</div><div class='add'>+</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stdint.h&gt;</div><div class='add'>+#include &lt;stdarg.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+</div><div class='add'>+/* Opaque class structure */</div><div class='add'>+typedef struct json_writer json_writer_t;</div><div class='add'>+</div><div class='add'>+/* Create a new JSON stream */</div><div class='add'>+json_writer_t *jsonw_new(FILE *f);</div><div class='add'>+/* End output to JSON stream */</div><div class='add'>+void jsonw_destroy(json_writer_t **self_p);</div><div class='add'>+</div><div class='add'>+/* Cause output to have pretty whitespace */</div><div class='add'>+void jsonw_pretty(json_writer_t *self, bool on);</div><div class='add'>+</div><div class='add'>+/* Reset separator to create new JSON */</div><div class='add'>+void jsonw_reset(json_writer_t *self);</div><div class='add'>+</div><div class='add'>+/* Add property name */</div><div class='add'>+void jsonw_name(json_writer_t *self, const char *name);</div><div class='add'>+</div><div class='add'>+/* Add value  */</div><div class='add'>+void __attribute__((format(printf, 2, 0))) jsonw_vprintf_enquote(json_writer_t *self,</div><div class='add'>+								 const char *fmt,</div><div class='add'>+								 va_list ap);</div><div class='add'>+void __attribute__((format(printf, 2, 3))) jsonw_printf(json_writer_t *self,</div><div class='add'>+							const char *fmt, ...);</div><div class='add'>+void jsonw_string(json_writer_t *self, const char *value);</div><div class='add'>+void jsonw_bool(json_writer_t *self, bool value);</div><div class='add'>+void jsonw_float(json_writer_t *self, double number);</div><div class='add'>+void jsonw_float_fmt(json_writer_t *self, const char *fmt, double num);</div><div class='add'>+void jsonw_uint(json_writer_t *self, uint64_t number);</div><div class='add'>+void jsonw_hu(json_writer_t *self, unsigned short number);</div><div class='add'>+void jsonw_int(json_writer_t *self, int64_t number);</div><div class='add'>+void jsonw_null(json_writer_t *self);</div><div class='add'>+void jsonw_lluint(json_writer_t *self, unsigned long long int num);</div><div class='add'>+</div><div class='add'>+/* Useful Combinations of name and value */</div><div class='add'>+void jsonw_string_field(json_writer_t *self, const char *prop, const char *val);</div><div class='add'>+void jsonw_bool_field(json_writer_t *self, const char *prop, bool value);</div><div class='add'>+void jsonw_float_field(json_writer_t *self, const char *prop, double num);</div><div class='add'>+void jsonw_uint_field(json_writer_t *self, const char *prop, uint64_t num);</div><div class='add'>+void jsonw_hu_field(json_writer_t *self, const char *prop, unsigned short num);</div><div class='add'>+void jsonw_int_field(json_writer_t *self, const char *prop, int64_t num);</div><div class='add'>+void jsonw_null_field(json_writer_t *self, const char *prop);</div><div class='add'>+void jsonw_lluint_field(json_writer_t *self, const char *prop,</div><div class='add'>+			unsigned long long int num);</div><div class='add'>+void jsonw_float_field_fmt(json_writer_t *self, const char *prop,</div><div class='add'>+			   const char *fmt, double val);</div><div class='add'>+</div><div class='add'>+/* Collections */</div><div class='add'>+void jsonw_start_object(json_writer_t *self);</div><div class='add'>+void jsonw_end_object(json_writer_t *self);</div><div class='add'>+</div><div class='add'>+void jsonw_start_array(json_writer_t *self);</div><div class='add'>+void jsonw_end_array(json_writer_t *self);</div><div class='add'>+</div><div class='add'>+/* Override default exception handling */</div><div class='add'>+typedef void (jsonw_err_handler_fn)(const char *);</div><div class='add'>+</div><div class='add'>+#endif /* _JSON_WRITER_H_ */</div><div class='head'>diff --git a/tools/net/ynl/ynltool/main.c b/tools/net/ynl/ynltool/main.c<br/>new file mode 100644<br/>index 000000000000..5d0f428eed0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/main.c</a></div><div class='hunk'>@@ -0,0 +1,242 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+/* Copyright (C) 2017-2018 Netronome Systems, Inc. */</div><div class='add'>+/* Copyright Meta Platforms, Inc. and affiliates */</div><div class='add'>+</div><div class='add'>+#include &lt;ctype.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;getopt.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;stdarg.h&gt;</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+const char *bin_name;</div><div class='add'>+static int last_argc;</div><div class='add'>+static char **last_argv;</div><div class='add'>+static int (*last_do_help)(int argc, char **argv);</div><div class='add'>+json_writer_t *json_wtr;</div><div class='add'>+bool pretty_output;</div><div class='add'>+bool json_output;</div><div class='add'>+</div><div class='add'>+static void __attribute__((noreturn)) clean_and_exit(int i)</div><div class='add'>+{</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_destroy(&amp;json_wtr);</div><div class='add'>+</div><div class='add'>+	exit(i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void usage(void)</div><div class='add'>+{</div><div class='add'>+	last_do_help(last_argc - 1, last_argv + 1);</div><div class='add'>+</div><div class='add'>+	clean_and_exit(-1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_help(int argc __attribute__((unused)),</div><div class='add'>+		   char **argv __attribute__((unused)))</div><div class='add'>+{</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_null(json_wtr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stderr,</div><div class='add'>+		"Usage: %s [OPTIONS] OBJECT { COMMAND | help }\n"</div><div class='add'>+		"       %s version\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"       OBJECT := { page-pool | qstats }\n"</div><div class='add'>+		"       " HELP_SPEC_OPTIONS "\n"</div><div class='add'>+		"",</div><div class='add'>+		bin_name, bin_name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_version(int argc __attribute__((unused)),</div><div class='add'>+		      char **argv __attribute__((unused)))</div><div class='add'>+{</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+		jsonw_name(json_wtr, "version");</div><div class='add'>+		jsonw_printf(json_wtr, SRC_VERSION);</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+	} else {</div><div class='add'>+		printf("%s " SRC_VERSION "\n", bin_name);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cmd commands[] = {</div><div class='add'>+	{ "help",	do_help },</div><div class='add'>+	{ "page-pool",	do_page_pool },</div><div class='add'>+	{ "qstats",	do_qstats },</div><div class='add'>+	{ "version",	do_version },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cmd_select(const struct cmd *cmds, int argc, char **argv,</div><div class='add'>+	       int (*help)(int argc, char **argv))</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	last_argc = argc;</div><div class='add'>+	last_argv = argv;</div><div class='add'>+	last_do_help = help;</div><div class='add'>+</div><div class='add'>+	if (argc &lt; 1 &amp;&amp; cmds[0].func)</div><div class='add'>+		return cmds[0].func(argc, argv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; cmds[i].cmd; i++) {</div><div class='add'>+		if (is_prefix(*argv, cmds[i].cmd)) {</div><div class='add'>+			if (!cmds[i].func) {</div><div class='add'>+				p_err("command '%s' is not available", cmds[i].cmd);</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+			return cmds[i].func(argc - 1, argv + 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	help(argc - 1, argv + 1);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool is_prefix(const char *pfx, const char *str)</div><div class='add'>+{</div><div class='add'>+	if (!pfx)</div><div class='add'>+		return false;</div><div class='add'>+	if (strlen(str) &lt; strlen(pfx))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !memcmp(str, pfx, strlen(pfx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Last argument MUST be NULL pointer */</div><div class='add'>+int detect_common_prefix(const char *arg, ...)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 0;</div><div class='add'>+	const char *ref;</div><div class='add'>+	char msg[256];</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	snprintf(msg, sizeof(msg), "ambiguous prefix: '%s' could be '", arg);</div><div class='add'>+	va_start(ap, arg);</div><div class='add'>+	while ((ref = va_arg(ap, const char *))) {</div><div class='add'>+		if (!is_prefix(arg, ref))</div><div class='add'>+			continue;</div><div class='add'>+		count++;</div><div class='add'>+		if (count &gt; 1)</div><div class='add'>+			strncat(msg, "' or '", sizeof(msg) - strlen(msg) - 1);</div><div class='add'>+		strncat(msg, ref, sizeof(msg) - strlen(msg) - 1);</div><div class='add'>+	}</div><div class='add'>+	va_end(ap);</div><div class='add'>+	strncat(msg, "'", sizeof(msg) - strlen(msg) - 1);</div><div class='add'>+</div><div class='add'>+	if (count &gt;= 2) {</div><div class='add'>+		p_err("%s", msg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void p_err(const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+		jsonw_name(json_wtr, "error");</div><div class='add'>+		jsonw_vprintf_enquote(json_wtr, fmt, ap);</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+	} else {</div><div class='add'>+		fprintf(stderr, "Error: ");</div><div class='add'>+		vfprintf(stderr, fmt, ap);</div><div class='add'>+		fprintf(stderr, "\n");</div><div class='add'>+	}</div><div class='add'>+	va_end(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void p_info(const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	vfprintf(stderr, fmt, ap);</div><div class='add'>+	fprintf(stderr, "\n");</div><div class='add'>+	va_end(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int main(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	static const struct option options[] = {</div><div class='add'>+		{ "json",	no_argument,	NULL,	'j' },</div><div class='add'>+		{ "help",	no_argument,	NULL,	'h' },</div><div class='add'>+		{ "pretty",	no_argument,	NULL,	'p' },</div><div class='add'>+		{ "version",	no_argument,	NULL,	'V' },</div><div class='add'>+		{ 0 }</div><div class='add'>+	};</div><div class='add'>+	bool version_requested = false;</div><div class='add'>+	int opt, ret;</div><div class='add'>+</div><div class='add'>+	setlinebuf(stdout);</div><div class='add'>+</div><div class='add'>+	last_do_help = do_help;</div><div class='add'>+	pretty_output = false;</div><div class='add'>+	json_output = false;</div><div class='add'>+	bin_name = "ynltool";</div><div class='add'>+</div><div class='add'>+	opterr = 0;</div><div class='add'>+	while ((opt = getopt_long(argc, argv, "Vhjp",</div><div class='add'>+				  options, NULL)) &gt;= 0) {</div><div class='add'>+		switch (opt) {</div><div class='add'>+		case 'V':</div><div class='add'>+			version_requested = true;</div><div class='add'>+			break;</div><div class='add'>+		case 'h':</div><div class='add'>+			return do_help(argc, argv);</div><div class='add'>+		case 'p':</div><div class='add'>+			pretty_output = true;</div><div class='add'>+			/* fall through */</div><div class='add'>+		case 'j':</div><div class='add'>+			if (!json_output) {</div><div class='add'>+				json_wtr = jsonw_new(stdout);</div><div class='add'>+				if (!json_wtr) {</div><div class='add'>+					p_err("failed to create JSON writer");</div><div class='add'>+					return -1;</div><div class='add'>+				}</div><div class='add'>+				json_output = true;</div><div class='add'>+			}</div><div class='add'>+			jsonw_pretty(json_wtr, pretty_output);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			p_err("unrecognized option '%s'", argv[optind - 1]);</div><div class='add'>+			if (json_output)</div><div class='add'>+				clean_and_exit(-1);</div><div class='add'>+			else</div><div class='add'>+				usage();</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	argc -= optind;</div><div class='add'>+	argv += optind;</div><div class='add'>+	if (argc &lt; 0)</div><div class='add'>+		usage();</div><div class='add'>+</div><div class='add'>+	if (version_requested)</div><div class='add'>+		ret = do_version(argc, argv);</div><div class='add'>+	else</div><div class='add'>+		ret = cmd_select(commands, argc, argv, do_help);</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_destroy(&amp;json_wtr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/ynl/ynltool/main.h b/tools/net/ynl/ynltool/main.h<br/>new file mode 100644<br/>index 000000000000..c7039f9ac55a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/main.h</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/* Copyright (C) 2017-2018 Netronome Systems, Inc. */</div><div class='add'>+/* Copyright Meta Platforms, Inc. and affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef __YNLTOOL_H</div><div class='add'>+#define __YNLTOOL_H</div><div class='add'>+</div><div class='add'>+#ifndef _GNU_SOURCE</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#endif</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+</div><div class='add'>+#include "json_writer.h"</div><div class='add'>+</div><div class='add'>+#define NEXT_ARG()	({ argc--; argv++; if (argc &lt; 0) usage(); })</div><div class='add'>+#define NEXT_ARGP()	({ (*argc)--; (*argv)++; if (*argc &lt; 0) usage(); })</div><div class='add'>+#define BAD_ARG()	({ p_err("what is '%s'?", *argv); -1; })</div><div class='add'>+#define GET_ARG()	({ argc--; *argv++; })</div><div class='add'>+#define REQ_ARGS(cnt)							\</div><div class='add'>+	({								\</div><div class='add'>+		int _cnt = (cnt);					\</div><div class='add'>+		bool _res;						\</div><div class='add'>+									\</div><div class='add'>+		if (argc &lt; _cnt) {					\</div><div class='add'>+			p_err("'%s' needs at least %d arguments, %d found", \</div><div class='add'>+			      argv[-1], _cnt, argc);			\</div><div class='add'>+			_res = false;					\</div><div class='add'>+		} else {						\</div><div class='add'>+			_res = true;					\</div><div class='add'>+		}							\</div><div class='add'>+		_res;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define HELP_SPEC_OPTIONS						\</div><div class='add'>+	"OPTIONS := { {-j|--json} [{-p|--pretty}] }"</div><div class='add'>+</div><div class='add'>+extern const char *bin_name;</div><div class='add'>+</div><div class='add'>+extern json_writer_t *json_wtr;</div><div class='add'>+extern bool json_output;</div><div class='add'>+extern bool pretty_output;</div><div class='add'>+</div><div class='add'>+void __attribute__((format(printf, 1, 2))) p_err(const char *fmt, ...);</div><div class='add'>+void __attribute__((format(printf, 1, 2))) p_info(const char *fmt, ...);</div><div class='add'>+</div><div class='add'>+bool is_prefix(const char *pfx, const char *str);</div><div class='add'>+int detect_common_prefix(const char *arg, ...);</div><div class='add'>+void usage(void) __attribute__((noreturn));</div><div class='add'>+</div><div class='add'>+struct cmd {</div><div class='add'>+	const char *cmd;</div><div class='add'>+	int (*func)(int argc, char **argv);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cmd_select(const struct cmd *cmds, int argc, char **argv,</div><div class='add'>+	       int (*help)(int argc, char **argv));</div><div class='add'>+</div><div class='add'>+/* subcommands */</div><div class='add'>+int do_page_pool(int argc, char **argv);</div><div class='add'>+int do_qstats(int argc, char **argv);</div><div class='add'>+</div><div class='add'>+#endif /* __YNLTOOL_H */</div><div class='head'>diff --git a/tools/net/ynl/ynltool/page-pool.c b/tools/net/ynl/ynltool/page-pool.c<br/>new file mode 100644<br/>index 000000000000..4b24492abab7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/page-pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/page-pool.c</a></div><div class='hunk'>@@ -0,0 +1,461 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;net/if.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;ynl.h&gt;</div><div class='add'>+#include "netdev-user.h"</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+struct pp_stat {</div><div class='add'>+	unsigned int ifc;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		unsigned int cnt;</div><div class='add'>+		size_t refs, bytes;</div><div class='add'>+	} live[2];</div><div class='add'>+</div><div class='add'>+	size_t alloc_slow, alloc_fast, recycle_ring, recycle_cache;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pp_stats_array {</div><div class='add'>+	unsigned int i, max;</div><div class='add'>+	struct pp_stat *s;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pp_stat *find_ifc(struct pp_stats_array *a, unsigned int ifindex)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; a-&gt;i; i++) {</div><div class='add'>+		if (a-&gt;s[i].ifc == ifindex)</div><div class='add'>+			return &amp;a-&gt;s[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a-&gt;i++;</div><div class='add'>+	if (a-&gt;i == a-&gt;max) {</div><div class='add'>+		a-&gt;max *= 2;</div><div class='add'>+		a-&gt;s = reallocarray(a-&gt;s, a-&gt;max, sizeof(*a-&gt;s));</div><div class='add'>+	}</div><div class='add'>+	a-&gt;s[i].ifc = ifindex;</div><div class='add'>+	return &amp;a-&gt;s[i];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void count_pool(struct pp_stat *s, unsigned int l,</div><div class='add'>+		       struct netdev_page_pool_get_rsp *pp)</div><div class='add'>+{</div><div class='add'>+	s-&gt;live[l].cnt++;</div><div class='add'>+	if (pp-&gt;_present.inflight)</div><div class='add'>+		s-&gt;live[l].refs += pp-&gt;inflight;</div><div class='add'>+	if (pp-&gt;_present.inflight_mem)</div><div class='add'>+		s-&gt;live[l].bytes += pp-&gt;inflight_mem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We don't know how many pages are sitting in cache and ring</div><div class='add'>+ * so we will under-count the recycling rate a bit.</div><div class='add'>+ */</div><div class='add'>+static void print_json_recycling_stats(struct pp_stat *s)</div><div class='add'>+{</div><div class='add'>+	double recycle;</div><div class='add'>+</div><div class='add'>+	if (s-&gt;alloc_fast + s-&gt;alloc_slow) {</div><div class='add'>+		recycle = (double)(s-&gt;recycle_ring + s-&gt;recycle_cache) /</div><div class='add'>+			(s-&gt;alloc_fast + s-&gt;alloc_slow) * 100;</div><div class='add'>+		jsonw_float_field(json_wtr, "recycling_pct", recycle);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_name(json_wtr, "alloc");</div><div class='add'>+	jsonw_start_object(json_wtr);</div><div class='add'>+	jsonw_uint_field(json_wtr, "slow", s-&gt;alloc_slow);</div><div class='add'>+	jsonw_uint_field(json_wtr, "fast", s-&gt;alloc_fast);</div><div class='add'>+	jsonw_end_object(json_wtr);</div><div class='add'>+</div><div class='add'>+	jsonw_name(json_wtr, "recycle");</div><div class='add'>+	jsonw_start_object(json_wtr);</div><div class='add'>+	jsonw_uint_field(json_wtr, "ring", s-&gt;recycle_ring);</div><div class='add'>+	jsonw_uint_field(json_wtr, "cache", s-&gt;recycle_cache);</div><div class='add'>+	jsonw_end_object(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_plain_recycling_stats(struct pp_stat *s)</div><div class='add'>+{</div><div class='add'>+	double recycle;</div><div class='add'>+</div><div class='add'>+	if (s-&gt;alloc_fast + s-&gt;alloc_slow) {</div><div class='add'>+		recycle = (double)(s-&gt;recycle_ring + s-&gt;recycle_cache) /</div><div class='add'>+			(s-&gt;alloc_fast + s-&gt;alloc_slow) * 100;</div><div class='add'>+		printf("recycling: %.1lf%% (alloc: %zu:%zu recycle: %zu:%zu)",</div><div class='add'>+		       recycle, s-&gt;alloc_slow, s-&gt;alloc_fast,</div><div class='add'>+		       s-&gt;recycle_ring, s-&gt;recycle_cache);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_json_stats(struct pp_stats_array *a)</div><div class='add'>+{</div><div class='add'>+	jsonw_start_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	for (unsigned int i = 0; i &lt; a-&gt;i; i++) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		struct pp_stat *s = &amp;a-&gt;s[i];</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+</div><div class='add'>+		if (!s-&gt;ifc) {</div><div class='add'>+			jsonw_string_field(json_wtr, "ifname", "&lt;orphan&gt;");</div><div class='add'>+			jsonw_uint_field(json_wtr, "ifindex", 0);</div><div class='add'>+		} else {</div><div class='add'>+			name = if_indextoname(s-&gt;ifc, ifname);</div><div class='add'>+			if (name)</div><div class='add'>+				jsonw_string_field(json_wtr, "ifname", name);</div><div class='add'>+			jsonw_uint_field(json_wtr, "ifindex", s-&gt;ifc);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		jsonw_uint_field(json_wtr, "page_pools", s-&gt;live[1].cnt);</div><div class='add'>+		jsonw_uint_field(json_wtr, "zombies", s-&gt;live[0].cnt);</div><div class='add'>+</div><div class='add'>+		jsonw_name(json_wtr, "live");</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+		jsonw_uint_field(json_wtr, "refs", s-&gt;live[1].refs);</div><div class='add'>+		jsonw_uint_field(json_wtr, "bytes", s-&gt;live[1].bytes);</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+</div><div class='add'>+		jsonw_name(json_wtr, "zombie");</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+		jsonw_uint_field(json_wtr, "refs", s-&gt;live[0].refs);</div><div class='add'>+		jsonw_uint_field(json_wtr, "bytes", s-&gt;live[0].bytes);</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+</div><div class='add'>+		if (s-&gt;alloc_fast || s-&gt;alloc_slow)</div><div class='add'>+			print_json_recycling_stats(s);</div><div class='add'>+</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_end_array(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_plain_stats(struct pp_stats_array *a)</div><div class='add'>+{</div><div class='add'>+	for (unsigned int i = 0; i &lt; a-&gt;i; i++) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		struct pp_stat *s = &amp;a-&gt;s[i];</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		if (!s-&gt;ifc) {</div><div class='add'>+			printf("&lt;orphan&gt;\t");</div><div class='add'>+		} else {</div><div class='add'>+			name = if_indextoname(s-&gt;ifc, ifname);</div><div class='add'>+			if (name)</div><div class='add'>+				printf("%8s", name);</div><div class='add'>+			printf("[%u]\t", s-&gt;ifc);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		printf("page pools: %u (zombies: %u)\n",</div><div class='add'>+		       s-&gt;live[1].cnt, s-&gt;live[0].cnt);</div><div class='add'>+		printf("\t\trefs: %zu bytes: %zu (refs: %zu bytes: %zu)\n",</div><div class='add'>+		       s-&gt;live[1].refs, s-&gt;live[1].bytes,</div><div class='add'>+		       s-&gt;live[0].refs, s-&gt;live[0].bytes);</div><div class='add'>+</div><div class='add'>+		if (s-&gt;alloc_fast || s-&gt;alloc_slow) {</div><div class='add'>+			printf("\t\t");</div><div class='add'>+			print_plain_recycling_stats(s);</div><div class='add'>+			printf("\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+find_pool_stat_in_list(struct netdev_page_pool_stats_get_list *pp_stats,</div><div class='add'>+		       __u64 pool_id, struct pp_stat *pstat)</div><div class='add'>+{</div><div class='add'>+	ynl_dump_foreach(pp_stats, pp) {</div><div class='add'>+		if (!pp-&gt;_present.info || !pp-&gt;info._present.id)</div><div class='add'>+			continue;</div><div class='add'>+		if (pp-&gt;info.id != pool_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		memset(pstat, 0, sizeof(*pstat));</div><div class='add'>+		if (pp-&gt;_present.alloc_fast)</div><div class='add'>+			pstat-&gt;alloc_fast = pp-&gt;alloc_fast;</div><div class='add'>+		if (pp-&gt;_present.alloc_refill)</div><div class='add'>+			pstat-&gt;alloc_fast += pp-&gt;alloc_refill;</div><div class='add'>+		if (pp-&gt;_present.alloc_slow)</div><div class='add'>+			pstat-&gt;alloc_slow = pp-&gt;alloc_slow;</div><div class='add'>+		if (pp-&gt;_present.recycle_ring)</div><div class='add'>+			pstat-&gt;recycle_ring = pp-&gt;recycle_ring;</div><div class='add'>+		if (pp-&gt;_present.recycle_cached)</div><div class='add'>+			pstat-&gt;recycle_cache = pp-&gt;recycle_cached;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+print_json_pool_list(struct netdev_page_pool_get_list *pools,</div><div class='add'>+		     struct netdev_page_pool_stats_get_list *pp_stats,</div><div class='add'>+		     bool zombies_only)</div><div class='add'>+{</div><div class='add'>+	jsonw_start_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	ynl_dump_foreach(pools, pp) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		struct pp_stat pstat;</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		if (zombies_only &amp;&amp; !pp-&gt;_present.detach_time)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+</div><div class='add'>+		jsonw_uint_field(json_wtr, "id", pp-&gt;id);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.ifindex) {</div><div class='add'>+			name = if_indextoname(pp-&gt;ifindex, ifname);</div><div class='add'>+			if (name)</div><div class='add'>+				jsonw_string_field(json_wtr, "ifname", name);</div><div class='add'>+			jsonw_uint_field(json_wtr, "ifindex", pp-&gt;ifindex);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.napi_id)</div><div class='add'>+			jsonw_uint_field(json_wtr, "napi_id", pp-&gt;napi_id);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.inflight)</div><div class='add'>+			jsonw_uint_field(json_wtr, "refs", pp-&gt;inflight);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.inflight_mem)</div><div class='add'>+			jsonw_uint_field(json_wtr, "bytes", pp-&gt;inflight_mem);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.detach_time)</div><div class='add'>+			jsonw_uint_field(json_wtr, "detach_time", pp-&gt;detach_time);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.dmabuf)</div><div class='add'>+			jsonw_uint_field(json_wtr, "dmabuf", pp-&gt;dmabuf);</div><div class='add'>+</div><div class='add'>+		if (find_pool_stat_in_list(pp_stats, pp-&gt;id, &amp;pstat) &amp;&amp;</div><div class='add'>+		    (pstat.alloc_fast || pstat.alloc_slow))</div><div class='add'>+			print_json_recycling_stats(&amp;pstat);</div><div class='add'>+</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_end_array(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+print_plain_pool_list(struct netdev_page_pool_get_list *pools,</div><div class='add'>+		      struct netdev_page_pool_stats_get_list *pp_stats,</div><div class='add'>+		      bool zombies_only)</div><div class='add'>+{</div><div class='add'>+	ynl_dump_foreach(pools, pp) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		struct pp_stat pstat;</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		if (zombies_only &amp;&amp; !pp-&gt;_present.detach_time)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		printf("pool id: %llu", pp-&gt;id);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.ifindex) {</div><div class='add'>+			name = if_indextoname(pp-&gt;ifindex, ifname);</div><div class='add'>+			if (name)</div><div class='add'>+				printf("  dev: %s", name);</div><div class='add'>+			printf("[%u]", pp-&gt;ifindex);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.napi_id)</div><div class='add'>+			printf("  napi: %llu", pp-&gt;napi_id);</div><div class='add'>+</div><div class='add'>+		printf("\n");</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.inflight || pp-&gt;_present.inflight_mem) {</div><div class='add'>+			printf("  inflight:");</div><div class='add'>+			if (pp-&gt;_present.inflight)</div><div class='add'>+				printf(" %llu pages", pp-&gt;inflight);</div><div class='add'>+			if (pp-&gt;_present.inflight_mem)</div><div class='add'>+				printf(" %llu bytes", pp-&gt;inflight_mem);</div><div class='add'>+			printf("\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.detach_time)</div><div class='add'>+			printf("  detached: %llu\n", pp-&gt;detach_time);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.dmabuf)</div><div class='add'>+			printf("  dmabuf: %u\n", pp-&gt;dmabuf);</div><div class='add'>+</div><div class='add'>+		if (find_pool_stat_in_list(pp_stats, pp-&gt;id, &amp;pstat) &amp;&amp;</div><div class='add'>+		    (pstat.alloc_fast || pstat.alloc_slow)) {</div><div class='add'>+			printf("  ");</div><div class='add'>+			print_plain_recycling_stats(&amp;pstat);</div><div class='add'>+			printf("\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aggregate_device_stats(struct pp_stats_array *a,</div><div class='add'>+				   struct netdev_page_pool_get_list *pools,</div><div class='add'>+				   struct netdev_page_pool_stats_get_list *pp_stats)</div><div class='add'>+{</div><div class='add'>+	ynl_dump_foreach(pools, pp) {</div><div class='add'>+		struct pp_stat *s = find_ifc(a, pp-&gt;ifindex);</div><div class='add'>+</div><div class='add'>+		count_pool(s, 1, pp);</div><div class='add'>+		if (pp-&gt;_present.detach_time)</div><div class='add'>+			count_pool(s, 0, pp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ynl_dump_foreach(pp_stats, pp) {</div><div class='add'>+		struct pp_stat *s = find_ifc(a, pp-&gt;info.ifindex);</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;_present.alloc_fast)</div><div class='add'>+			s-&gt;alloc_fast += pp-&gt;alloc_fast;</div><div class='add'>+		if (pp-&gt;_present.alloc_refill)</div><div class='add'>+			s-&gt;alloc_fast += pp-&gt;alloc_refill;</div><div class='add'>+		if (pp-&gt;_present.alloc_slow)</div><div class='add'>+			s-&gt;alloc_slow += pp-&gt;alloc_slow;</div><div class='add'>+		if (pp-&gt;_present.recycle_ring)</div><div class='add'>+			s-&gt;recycle_ring += pp-&gt;recycle_ring;</div><div class='add'>+		if (pp-&gt;_present.recycle_cached)</div><div class='add'>+			s-&gt;recycle_cache += pp-&gt;recycle_cached;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_stats(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	struct netdev_page_pool_stats_get_list *pp_stats;</div><div class='add'>+	struct netdev_page_pool_get_list *pools;</div><div class='add'>+	enum {</div><div class='add'>+		GROUP_BY_DEVICE,</div><div class='add'>+		GROUP_BY_POOL,</div><div class='add'>+	} group_by = GROUP_BY_DEVICE;</div><div class='add'>+	bool zombies_only = false;</div><div class='add'>+	struct pp_stats_array a = {};</div><div class='add'>+	struct ynl_error yerr;</div><div class='add'>+	struct ynl_sock *ys;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Parse options */</div><div class='add'>+	while (argc &gt; 0) {</div><div class='add'>+		if (is_prefix(*argv, "group-by")) {</div><div class='add'>+			NEXT_ARG();</div><div class='add'>+</div><div class='add'>+			if (!REQ_ARGS(1))</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			if (is_prefix(*argv, "device")) {</div><div class='add'>+				group_by = GROUP_BY_DEVICE;</div><div class='add'>+			} else if (is_prefix(*argv, "pp") ||</div><div class='add'>+				   is_prefix(*argv, "page-pool") ||</div><div class='add'>+				   is_prefix(*argv, "none")) {</div><div class='add'>+				group_by = GROUP_BY_POOL;</div><div class='add'>+			} else {</div><div class='add'>+				p_err("invalid group-by value '%s'", *argv);</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+			NEXT_ARG();</div><div class='add'>+		} else if (is_prefix(*argv, "zombies")) {</div><div class='add'>+			zombies_only = true;</div><div class='add'>+			group_by = GROUP_BY_POOL;</div><div class='add'>+			NEXT_ARG();</div><div class='add'>+		} else {</div><div class='add'>+			p_err("unknown option '%s'", *argv);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ys = ynl_sock_create(&amp;ynl_netdev_family, &amp;yerr);</div><div class='add'>+	if (!ys) {</div><div class='add'>+		p_err("YNL: %s", yerr.msg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pools = netdev_page_pool_get_dump(ys);</div><div class='add'>+	if (!pools) {</div><div class='add'>+		p_err("failed to get page pools: %s", ys-&gt;err.msg);</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pp_stats = netdev_page_pool_stats_get_dump(ys);</div><div class='add'>+	if (!pp_stats) {</div><div class='add'>+		p_err("failed to get page pool stats: %s", ys-&gt;err.msg);</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_free_pp_list;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If grouping by pool, print individual pools */</div><div class='add'>+	if (group_by == GROUP_BY_POOL) {</div><div class='add'>+		if (json_output)</div><div class='add'>+			print_json_pool_list(pools, pp_stats, zombies_only);</div><div class='add'>+		else</div><div class='add'>+			print_plain_pool_list(pools, pp_stats, zombies_only);</div><div class='add'>+	} else {</div><div class='add'>+		/* Aggregated stats mode (group-by device) */</div><div class='add'>+		a.max = 64;</div><div class='add'>+		a.s = calloc(a.max, sizeof(*a.s));</div><div class='add'>+		if (!a.s) {</div><div class='add'>+			p_err("failed to allocate stats array");</div><div class='add'>+			ret = -1;</div><div class='add'>+			goto exit_free_stats_list;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		aggregate_device_stats(&amp;a, pools, pp_stats);</div><div class='add'>+</div><div class='add'>+		if (json_output)</div><div class='add'>+			print_json_stats(&amp;a);</div><div class='add'>+		else</div><div class='add'>+			print_plain_stats(&amp;a);</div><div class='add'>+</div><div class='add'>+		free(a.s);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit_free_stats_list:</div><div class='add'>+	netdev_page_pool_stats_get_list_free(pp_stats);</div><div class='add'>+exit_free_pp_list:</div><div class='add'>+	netdev_page_pool_get_list_free(pools);</div><div class='add'>+exit_close:</div><div class='add'>+	ynl_sock_destroy(ys);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_help(int argc __attribute__((unused)),</div><div class='add'>+		   char **argv __attribute__((unused)))</div><div class='add'>+{</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_null(json_wtr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stderr,</div><div class='add'>+		"Usage: %s page-pool { COMMAND | help }\n"</div><div class='add'>+		"       %s page-pool stats [ OPTIONS ]\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"       OPTIONS := { group-by { device | page-pool | none } | zombies }\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"       stats                   - Display page pool statistics\n"</div><div class='add'>+		"       stats group-by device   - Group statistics by network device (default)\n"</div><div class='add'>+		"       stats group-by page-pool | pp | none\n"</div><div class='add'>+		"                               - Show individual page pool details (no grouping)\n"</div><div class='add'>+		"       stats zombies           - Show only zombie page pools (detached but with\n"</div><div class='add'>+		"                                 pages in flight). Implies group-by page-pool.\n"</div><div class='add'>+		"",</div><div class='add'>+		bin_name, bin_name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cmd page_pool_cmds[] = {</div><div class='add'>+	{ "help",	do_help },</div><div class='add'>+	{ "stats",	do_stats },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int do_page_pool(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	return cmd_select(page_pool_cmds, argc, argv, do_help);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/net/ynl/ynltool/qstats.c b/tools/net/ynl/ynltool/qstats.c<br/>new file mode 100644<br/>index 000000000000..31fb45709ffa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/net/ynl/ynltool/qstats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/net/ynl/ynltool/qstats.c</a></div><div class='hunk'>@@ -0,0 +1,621 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;net/if.h&gt;</div><div class='add'>+#include &lt;math.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;ynl.h&gt;</div><div class='add'>+#include "netdev-user.h"</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+static enum netdev_qstats_scope scope; /* default - device */</div><div class='add'>+</div><div class='add'>+struct queue_balance {</div><div class='add'>+	unsigned int ifindex;</div><div class='add'>+	enum netdev_queue_type type;</div><div class='add'>+	unsigned int queue_count;</div><div class='add'>+	__u64 *rx_packets;</div><div class='add'>+	__u64 *rx_bytes;</div><div class='add'>+	__u64 *tx_packets;</div><div class='add'>+	__u64 *tx_bytes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void print_json_qstats(struct netdev_qstats_get_list *qstats)</div><div class='add'>+{</div><div class='add'>+	jsonw_start_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	ynl_dump_foreach(qstats, qs) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		jsonw_start_object(json_wtr);</div><div class='add'>+</div><div class='add'>+		name = if_indextoname(qs-&gt;ifindex, ifname);</div><div class='add'>+		if (name)</div><div class='add'>+			jsonw_string_field(json_wtr, "ifname", name);</div><div class='add'>+		jsonw_uint_field(json_wtr, "ifindex", qs-&gt;ifindex);</div><div class='add'>+</div><div class='add'>+		if (qs-&gt;_present.queue_type)</div><div class='add'>+			jsonw_string_field(json_wtr, "queue-type",</div><div class='add'>+					   netdev_queue_type_str(qs-&gt;queue_type));</div><div class='add'>+		if (qs-&gt;_present.queue_id)</div><div class='add'>+			jsonw_uint_field(json_wtr, "queue-id", qs-&gt;queue_id);</div><div class='add'>+</div><div class='add'>+		if (qs-&gt;_present.rx_packets || qs-&gt;_present.rx_bytes ||</div><div class='add'>+		    qs-&gt;_present.rx_alloc_fail || qs-&gt;_present.rx_hw_drops ||</div><div class='add'>+		    qs-&gt;_present.rx_csum_complete || qs-&gt;_present.rx_hw_gro_packets) {</div><div class='add'>+			jsonw_name(json_wtr, "rx");</div><div class='add'>+			jsonw_start_object(json_wtr);</div><div class='add'>+			if (qs-&gt;_present.rx_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "packets", qs-&gt;rx_packets);</div><div class='add'>+			if (qs-&gt;_present.rx_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "bytes", qs-&gt;rx_bytes);</div><div class='add'>+			if (qs-&gt;_present.rx_alloc_fail)</div><div class='add'>+				jsonw_uint_field(json_wtr, "alloc-fail", qs-&gt;rx_alloc_fail);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_drops)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drops", qs-&gt;rx_hw_drops);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_drop_overruns)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drop-overruns", qs-&gt;rx_hw_drop_overruns);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_drop_ratelimits)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drop-ratelimits", qs-&gt;rx_hw_drop_ratelimits);</div><div class='add'>+			if (qs-&gt;_present.rx_csum_complete)</div><div class='add'>+				jsonw_uint_field(json_wtr, "csum-complete", qs-&gt;rx_csum_complete);</div><div class='add'>+			if (qs-&gt;_present.rx_csum_unnecessary)</div><div class='add'>+				jsonw_uint_field(json_wtr, "csum-unnecessary", qs-&gt;rx_csum_unnecessary);</div><div class='add'>+			if (qs-&gt;_present.rx_csum_none)</div><div class='add'>+				jsonw_uint_field(json_wtr, "csum-none", qs-&gt;rx_csum_none);</div><div class='add'>+			if (qs-&gt;_present.rx_csum_bad)</div><div class='add'>+				jsonw_uint_field(json_wtr, "csum-bad", qs-&gt;rx_csum_bad);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_gro_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gro-packets", qs-&gt;rx_hw_gro_packets);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_gro_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gro-bytes", qs-&gt;rx_hw_gro_bytes);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_gro_wire_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gro-wire-packets", qs-&gt;rx_hw_gro_wire_packets);</div><div class='add'>+			if (qs-&gt;_present.rx_hw_gro_wire_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gro-wire-bytes", qs-&gt;rx_hw_gro_wire_bytes);</div><div class='add'>+			jsonw_end_object(json_wtr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (qs-&gt;_present.tx_packets || qs-&gt;_present.tx_bytes ||</div><div class='add'>+		    qs-&gt;_present.tx_hw_drops || qs-&gt;_present.tx_csum_none ||</div><div class='add'>+		    qs-&gt;_present.tx_hw_gso_packets) {</div><div class='add'>+			jsonw_name(json_wtr, "tx");</div><div class='add'>+			jsonw_start_object(json_wtr);</div><div class='add'>+			if (qs-&gt;_present.tx_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "packets", qs-&gt;tx_packets);</div><div class='add'>+			if (qs-&gt;_present.tx_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "bytes", qs-&gt;tx_bytes);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_drops)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drops", qs-&gt;tx_hw_drops);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_drop_errors)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drop-errors", qs-&gt;tx_hw_drop_errors);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_drop_ratelimits)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-drop-ratelimits", qs-&gt;tx_hw_drop_ratelimits);</div><div class='add'>+			if (qs-&gt;_present.tx_csum_none)</div><div class='add'>+				jsonw_uint_field(json_wtr, "csum-none", qs-&gt;tx_csum_none);</div><div class='add'>+			if (qs-&gt;_present.tx_needs_csum)</div><div class='add'>+				jsonw_uint_field(json_wtr, "needs-csum", qs-&gt;tx_needs_csum);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_gso_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gso-packets", qs-&gt;tx_hw_gso_packets);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_gso_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gso-bytes", qs-&gt;tx_hw_gso_bytes);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_gso_wire_packets)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gso-wire-packets", qs-&gt;tx_hw_gso_wire_packets);</div><div class='add'>+			if (qs-&gt;_present.tx_hw_gso_wire_bytes)</div><div class='add'>+				jsonw_uint_field(json_wtr, "hw-gso-wire-bytes", qs-&gt;tx_hw_gso_wire_bytes);</div><div class='add'>+			if (qs-&gt;_present.tx_stop)</div><div class='add'>+				jsonw_uint_field(json_wtr, "stop", qs-&gt;tx_stop);</div><div class='add'>+			if (qs-&gt;_present.tx_wake)</div><div class='add'>+				jsonw_uint_field(json_wtr, "wake", qs-&gt;tx_wake);</div><div class='add'>+			jsonw_end_object(json_wtr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		jsonw_end_object(json_wtr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	jsonw_end_array(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_one(bool present, const char *name, unsigned long long val,</div><div class='add'>+		      int *line)</div><div class='add'>+{</div><div class='add'>+	if (!present)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!*line) {</div><div class='add'>+		printf("              ");</div><div class='add'>+		++(*line);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Don't waste space on tx- and rx- prefix, its implied by queue type */</div><div class='add'>+	if (scope == NETDEV_QSTATS_SCOPE_QUEUE &amp;&amp;</div><div class='add'>+	    (name[0] == 'r' || name[0] == 't') &amp;&amp;</div><div class='add'>+	    name[1] == 'x' &amp;&amp; name[2] == '-')</div><div class='add'>+		name += 3;</div><div class='add'>+</div><div class='add'>+	printf(" %15s: %15llu", name, val);</div><div class='add'>+</div><div class='add'>+	if (++(*line) == 3) {</div><div class='add'>+		printf("\n");</div><div class='add'>+		*line = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_plain_qstats(struct netdev_qstats_get_list *qstats)</div><div class='add'>+{</div><div class='add'>+	ynl_dump_foreach(qstats, qs) {</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		const char *name;</div><div class='add'>+		int n;</div><div class='add'>+</div><div class='add'>+		name = if_indextoname(qs-&gt;ifindex, ifname);</div><div class='add'>+		if (name)</div><div class='add'>+			printf("%s", name);</div><div class='add'>+		else</div><div class='add'>+			printf("ifindex:%u", qs-&gt;ifindex);</div><div class='add'>+</div><div class='add'>+		if (qs-&gt;_present.queue_type &amp;&amp; qs-&gt;_present.queue_id)</div><div class='add'>+			printf("\t%s-%-3u",</div><div class='add'>+			       netdev_queue_type_str(qs-&gt;queue_type),</div><div class='add'>+			       qs-&gt;queue_id);</div><div class='add'>+		else</div><div class='add'>+			printf("\t      ");</div><div class='add'>+</div><div class='add'>+		n = 1;</div><div class='add'>+</div><div class='add'>+		/* Basic counters */</div><div class='add'>+		print_one(qs-&gt;_present.rx_packets, "rx-packets", qs-&gt;rx_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_bytes, "rx-bytes", qs-&gt;rx_bytes, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_packets, "tx-packets", qs-&gt;tx_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_bytes, "tx-bytes", qs-&gt;tx_bytes, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* RX error/drop counters */</div><div class='add'>+		print_one(qs-&gt;_present.rx_alloc_fail, "rx-alloc-fail",</div><div class='add'>+			  qs-&gt;rx_alloc_fail, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_drops, "rx-hw-drops",</div><div class='add'>+			  qs-&gt;rx_hw_drops, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_drop_overruns, "rx-hw-drop-overruns",</div><div class='add'>+			  qs-&gt;rx_hw_drop_overruns, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_drop_ratelimits, "rx-hw-drop-ratelimits",</div><div class='add'>+			  qs-&gt;rx_hw_drop_ratelimits, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* RX checksum counters */</div><div class='add'>+		print_one(qs-&gt;_present.rx_csum_complete, "rx-csum-complete",</div><div class='add'>+			  qs-&gt;rx_csum_complete, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_csum_unnecessary, "rx-csum-unnecessary",</div><div class='add'>+			  qs-&gt;rx_csum_unnecessary, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_csum_none, "rx-csum-none",</div><div class='add'>+			  qs-&gt;rx_csum_none, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_csum_bad, "rx-csum-bad",</div><div class='add'>+			  qs-&gt;rx_csum_bad, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* RX GRO counters */</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_gro_packets, "rx-hw-gro-packets",</div><div class='add'>+			  qs-&gt;rx_hw_gro_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_gro_bytes, "rx-hw-gro-bytes",</div><div class='add'>+			  qs-&gt;rx_hw_gro_bytes, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_gro_wire_packets, "rx-hw-gro-wire-packets",</div><div class='add'>+			  qs-&gt;rx_hw_gro_wire_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.rx_hw_gro_wire_bytes, "rx-hw-gro-wire-bytes",</div><div class='add'>+			  qs-&gt;rx_hw_gro_wire_bytes, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* TX error/drop counters */</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_drops, "tx-hw-drops",</div><div class='add'>+			  qs-&gt;tx_hw_drops, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_drop_errors, "tx-hw-drop-errors",</div><div class='add'>+			  qs-&gt;tx_hw_drop_errors, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_drop_ratelimits, "tx-hw-drop-ratelimits",</div><div class='add'>+			  qs-&gt;tx_hw_drop_ratelimits, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* TX checksum counters */</div><div class='add'>+		print_one(qs-&gt;_present.tx_csum_none, "tx-csum-none",</div><div class='add'>+			  qs-&gt;tx_csum_none, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_needs_csum, "tx-needs-csum",</div><div class='add'>+			  qs-&gt;tx_needs_csum, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* TX GSO counters */</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_gso_packets, "tx-hw-gso-packets",</div><div class='add'>+			  qs-&gt;tx_hw_gso_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_gso_bytes, "tx-hw-gso-bytes",</div><div class='add'>+			  qs-&gt;tx_hw_gso_bytes, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_gso_wire_packets, "tx-hw-gso-wire-packets",</div><div class='add'>+			  qs-&gt;tx_hw_gso_wire_packets, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_hw_gso_wire_bytes, "tx-hw-gso-wire-bytes",</div><div class='add'>+			  qs-&gt;tx_hw_gso_wire_bytes, &amp;n);</div><div class='add'>+</div><div class='add'>+		/* TX queue control */</div><div class='add'>+		print_one(qs-&gt;_present.tx_stop, "tx-stop", qs-&gt;tx_stop, &amp;n);</div><div class='add'>+		print_one(qs-&gt;_present.tx_wake, "tx-wake", qs-&gt;tx_wake, &amp;n);</div><div class='add'>+</div><div class='add'>+		if (n)</div><div class='add'>+			printf("\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_show(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	struct netdev_qstats_get_list *qstats;</div><div class='add'>+	struct netdev_qstats_get_req *req;</div><div class='add'>+	struct ynl_error yerr;</div><div class='add'>+	struct ynl_sock *ys;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Parse options */</div><div class='add'>+	while (argc &gt; 0) {</div><div class='add'>+		if (is_prefix(*argv, "scope") || is_prefix(*argv, "group-by")) {</div><div class='add'>+			NEXT_ARG();</div><div class='add'>+</div><div class='add'>+			if (!REQ_ARGS(1))</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			if (is_prefix(*argv, "queue")) {</div><div class='add'>+				scope = NETDEV_QSTATS_SCOPE_QUEUE;</div><div class='add'>+			} else if (is_prefix(*argv, "device")) {</div><div class='add'>+				scope = 0;</div><div class='add'>+			} else {</div><div class='add'>+				p_err("invalid scope value '%s'", *argv);</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+			NEXT_ARG();</div><div class='add'>+		} else {</div><div class='add'>+			p_err("unknown option '%s'", *argv);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ys = ynl_sock_create(&amp;ynl_netdev_family, &amp;yerr);</div><div class='add'>+	if (!ys) {</div><div class='add'>+		p_err("YNL: %s", yerr.msg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = netdev_qstats_get_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		p_err("failed to allocate qstats request");</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (scope)</div><div class='add'>+		netdev_qstats_get_req_set_scope(req, scope);</div><div class='add'>+</div><div class='add'>+	qstats = netdev_qstats_get_dump(ys, req);</div><div class='add'>+	netdev_qstats_get_req_free(req);</div><div class='add'>+	if (!qstats) {</div><div class='add'>+		p_err("failed to get queue stats: %s", ys-&gt;err.msg);</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Print the stats as returned by the kernel */</div><div class='add'>+	if (json_output)</div><div class='add'>+		print_json_qstats(qstats);</div><div class='add'>+	else</div><div class='add'>+		print_plain_qstats(qstats);</div><div class='add'>+</div><div class='add'>+	netdev_qstats_get_list_free(qstats);</div><div class='add'>+exit_close:</div><div class='add'>+	ynl_sock_destroy(ys);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_stats(__u64 *values, unsigned int count,</div><div class='add'>+			  double *mean, double *stddev, __u64 *min, __u64 *max)</div><div class='add'>+{</div><div class='add'>+	double sum = 0.0, variance = 0.0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	*min = ~0ULL;</div><div class='add'>+	*max = 0;</div><div class='add'>+</div><div class='add'>+	if (count == 0) {</div><div class='add'>+		*mean = 0;</div><div class='add'>+		*stddev = 0;</div><div class='add'>+		*min = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		sum += values[i];</div><div class='add'>+		if (values[i] &lt; *min)</div><div class='add'>+			*min = values[i];</div><div class='add'>+		if (values[i] &gt; *max)</div><div class='add'>+			*max = values[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*mean = sum / count;</div><div class='add'>+</div><div class='add'>+	if (count &gt; 1) {</div><div class='add'>+		for (i = 0; i &lt; count; i++) {</div><div class='add'>+			double diff = values[i] - *mean;</div><div class='add'>+</div><div class='add'>+			variance += diff * diff;</div><div class='add'>+		}</div><div class='add'>+		*stddev = sqrt(variance / (count - 1));</div><div class='add'>+	} else {</div><div class='add'>+		*stddev = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_balance_stats(const char *name, enum netdev_queue_type type,</div><div class='add'>+				__u64 *values, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	double mean, stddev, cv, ns;</div><div class='add'>+	__u64 min, max;</div><div class='add'>+</div><div class='add'>+	if ((name[0] == 'r' &amp;&amp; type != NETDEV_QUEUE_TYPE_RX) ||</div><div class='add'>+	    (name[0] == 't' &amp;&amp; type != NETDEV_QUEUE_TYPE_TX))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	compute_stats(values, count, &amp;mean, &amp;stddev, &amp;min, &amp;max);</div><div class='add'>+</div><div class='add'>+	cv = mean &gt; 0 ? (stddev / mean) * 100.0 : 0.0;</div><div class='add'>+	ns = min + max &gt; 0 ? (double)2 * (max - min) / (max + min) * 100 : 0.0;</div><div class='add'>+</div><div class='add'>+	printf("  %-12s: cv=%.1f%% ns=%.1f%% stddev=%.0f\n",</div><div class='add'>+	       name, cv, ns, stddev);</div><div class='add'>+	printf("  %-12s  min=%llu max=%llu mean=%.0f\n",</div><div class='add'>+	       "", min, max, mean);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+print_balance_stats_json(const char *name, enum netdev_queue_type type,</div><div class='add'>+			 __u64 *values, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	double mean, stddev, cv, ns;</div><div class='add'>+	__u64 min, max;</div><div class='add'>+</div><div class='add'>+	if ((name[0] == 'r' &amp;&amp; type != NETDEV_QUEUE_TYPE_RX) ||</div><div class='add'>+	    (name[0] == 't' &amp;&amp; type != NETDEV_QUEUE_TYPE_TX))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	compute_stats(values, count, &amp;mean, &amp;stddev, &amp;min, &amp;max);</div><div class='add'>+</div><div class='add'>+	cv = mean &gt; 0 ? (stddev / mean) * 100.0 : 0.0;</div><div class='add'>+	ns = min + max &gt; 0 ? (double)2 * (max - min) / (max + min) * 100 : 0.0;</div><div class='add'>+</div><div class='add'>+	jsonw_name(json_wtr, name);</div><div class='add'>+	jsonw_start_object(json_wtr);</div><div class='add'>+	jsonw_uint_field(json_wtr, "queue-count", count);</div><div class='add'>+	jsonw_uint_field(json_wtr, "min", min);</div><div class='add'>+	jsonw_uint_field(json_wtr, "max", max);</div><div class='add'>+	jsonw_float_field(json_wtr, "mean", mean);</div><div class='add'>+	jsonw_float_field(json_wtr, "stddev", stddev);</div><div class='add'>+	jsonw_float_field(json_wtr, "coefficient-of-variation", cv);</div><div class='add'>+	jsonw_float_field(json_wtr, "normalized-spread", ns);</div><div class='add'>+	jsonw_end_object(json_wtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cmp_ifindex_type(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	const struct netdev_qstats_get_rsp *qa = a;</div><div class='add'>+	const struct netdev_qstats_get_rsp *qb = b;</div><div class='add'>+</div><div class='add'>+	if (qa-&gt;ifindex != qb-&gt;ifindex)</div><div class='add'>+		return qa-&gt;ifindex - qb-&gt;ifindex;</div><div class='add'>+	if (qa-&gt;queue_type != qb-&gt;queue_type)</div><div class='add'>+		return qa-&gt;queue_type - qb-&gt;queue_type;</div><div class='add'>+	return qa-&gt;queue_id - qb-&gt;queue_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_balance(int argc, char **argv __attribute__((unused)))</div><div class='add'>+{</div><div class='add'>+	struct netdev_qstats_get_list *qstats;</div><div class='add'>+	struct netdev_qstats_get_req *req;</div><div class='add'>+	struct netdev_qstats_get_rsp **sorted;</div><div class='add'>+	struct ynl_error yerr;</div><div class='add'>+	struct ynl_sock *ys;</div><div class='add'>+	unsigned int count = 0;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (argc &gt; 0) {</div><div class='add'>+		p_err("balance command takes no arguments");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ys = ynl_sock_create(&amp;ynl_netdev_family, &amp;yerr);</div><div class='add'>+	if (!ys) {</div><div class='add'>+		p_err("YNL: %s", yerr.msg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = netdev_qstats_get_req_alloc();</div><div class='add'>+	if (!req) {</div><div class='add'>+		p_err("failed to allocate qstats request");</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Always use queue scope for balance analysis */</div><div class='add'>+	netdev_qstats_get_req_set_scope(req, NETDEV_QSTATS_SCOPE_QUEUE);</div><div class='add'>+</div><div class='add'>+	qstats = netdev_qstats_get_dump(ys, req);</div><div class='add'>+	netdev_qstats_get_req_free(req);</div><div class='add'>+	if (!qstats) {</div><div class='add'>+		p_err("failed to get queue stats: %s", ys-&gt;err.msg);</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Count and sort queues */</div><div class='add'>+	ynl_dump_foreach(qstats, qs)</div><div class='add'>+		count++;</div><div class='add'>+</div><div class='add'>+	if (count == 0) {</div><div class='add'>+		if (json_output)</div><div class='add'>+			jsonw_start_array(json_wtr);</div><div class='add'>+		else</div><div class='add'>+			printf("No queue statistics available\n");</div><div class='add'>+		goto exit_free_qstats;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sorted = calloc(count, sizeof(*sorted));</div><div class='add'>+	if (!sorted) {</div><div class='add'>+		p_err("failed to allocate sorted array");</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto exit_free_qstats;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	ynl_dump_foreach(qstats, qs)</div><div class='add'>+		sorted[i++] = qs;</div><div class='add'>+</div><div class='add'>+	qsort(sorted, count, sizeof(*sorted), cmp_ifindex_type);</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_start_array(json_wtr);</div><div class='add'>+</div><div class='add'>+	/* Process each device/queue-type combination */</div><div class='add'>+	i = 0;</div><div class='add'>+	while (i &lt; count) {</div><div class='add'>+		__u64 *rx_packets, *rx_bytes, *tx_packets, *tx_bytes;</div><div class='add'>+		enum netdev_queue_type type = sorted[i]-&gt;queue_type;</div><div class='add'>+		unsigned int ifindex = sorted[i]-&gt;ifindex;</div><div class='add'>+		unsigned int queue_count = 0;</div><div class='add'>+		char ifname[IF_NAMESIZE];</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		/* Count queues for this device/type */</div><div class='add'>+		for (j = i; j &lt; count &amp;&amp; sorted[j]-&gt;ifindex == ifindex &amp;&amp;</div><div class='add'>+		     sorted[j]-&gt;queue_type == type; j++)</div><div class='add'>+			queue_count++;</div><div class='add'>+</div><div class='add'>+		/* Skip if no packets/bytes (inactive queues) */</div><div class='add'>+		if (!sorted[i]-&gt;_present.rx_packets &amp;&amp;</div><div class='add'>+		    !sorted[i]-&gt;_present.rx_bytes &amp;&amp;</div><div class='add'>+		    !sorted[i]-&gt;_present.tx_packets &amp;&amp;</div><div class='add'>+		    !sorted[i]-&gt;_present.tx_bytes)</div><div class='add'>+			goto next_ifc;</div><div class='add'>+</div><div class='add'>+		/* Allocate arrays for statistics */</div><div class='add'>+		rx_packets = calloc(queue_count, sizeof(*rx_packets));</div><div class='add'>+		rx_bytes   = calloc(queue_count, sizeof(*rx_bytes));</div><div class='add'>+		tx_packets = calloc(queue_count, sizeof(*tx_packets));</div><div class='add'>+		tx_bytes   = calloc(queue_count, sizeof(*tx_bytes));</div><div class='add'>+</div><div class='add'>+		if (!rx_packets || !rx_bytes || !tx_packets || !tx_bytes) {</div><div class='add'>+			p_err("failed to allocate statistics arrays");</div><div class='add'>+			free(rx_packets);</div><div class='add'>+			free(rx_bytes);</div><div class='add'>+			free(tx_packets);</div><div class='add'>+			free(tx_bytes);</div><div class='add'>+			ret = -1;</div><div class='add'>+			goto exit_free_sorted;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Collect statistics */</div><div class='add'>+		for (j = 0; j &lt; queue_count; j++) {</div><div class='add'>+			rx_packets[j] = sorted[i + j]-&gt;_present.rx_packets ?</div><div class='add'>+					sorted[i + j]-&gt;rx_packets : 0;</div><div class='add'>+			rx_bytes[j] = sorted[i + j]-&gt;_present.rx_bytes ?</div><div class='add'>+				      sorted[i + j]-&gt;rx_bytes : 0;</div><div class='add'>+			tx_packets[j] = sorted[i + j]-&gt;_present.tx_packets ?</div><div class='add'>+					sorted[i + j]-&gt;tx_packets : 0;</div><div class='add'>+			tx_bytes[j] = sorted[i + j]-&gt;_present.tx_bytes ?</div><div class='add'>+				      sorted[i + j]-&gt;tx_bytes : 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		name = if_indextoname(ifindex, ifname);</div><div class='add'>+</div><div class='add'>+		if (json_output) {</div><div class='add'>+			jsonw_start_object(json_wtr);</div><div class='add'>+			if (name)</div><div class='add'>+				jsonw_string_field(json_wtr, "ifname", name);</div><div class='add'>+			jsonw_uint_field(json_wtr, "ifindex", ifindex);</div><div class='add'>+			jsonw_string_field(json_wtr, "queue-type",</div><div class='add'>+					   netdev_queue_type_str(type));</div><div class='add'>+</div><div class='add'>+			print_balance_stats_json("rx-packets", type,</div><div class='add'>+						 rx_packets, queue_count);</div><div class='add'>+			print_balance_stats_json("rx-bytes", type,</div><div class='add'>+						 rx_bytes, queue_count);</div><div class='add'>+			print_balance_stats_json("tx-packets", type,</div><div class='add'>+						 tx_packets, queue_count);</div><div class='add'>+			print_balance_stats_json("tx-bytes", type,</div><div class='add'>+						 tx_bytes, queue_count);</div><div class='add'>+</div><div class='add'>+			jsonw_end_object(json_wtr);</div><div class='add'>+		} else {</div><div class='add'>+			if (name)</div><div class='add'>+				printf("%s", name);</div><div class='add'>+			else</div><div class='add'>+				printf("ifindex:%u", ifindex);</div><div class='add'>+			printf(" %s %d queues:\n",</div><div class='add'>+			       netdev_queue_type_str(type), queue_count);</div><div class='add'>+</div><div class='add'>+			print_balance_stats("rx-packets", type,</div><div class='add'>+					    rx_packets, queue_count);</div><div class='add'>+			print_balance_stats("rx-bytes", type,</div><div class='add'>+					    rx_bytes, queue_count);</div><div class='add'>+			print_balance_stats("tx-packets", type,</div><div class='add'>+					    tx_packets, queue_count);</div><div class='add'>+			print_balance_stats("tx-bytes", type,</div><div class='add'>+					    tx_bytes, queue_count);</div><div class='add'>+			printf("\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		free(rx_packets);</div><div class='add'>+		free(rx_bytes);</div><div class='add'>+		free(tx_packets);</div><div class='add'>+		free(tx_bytes);</div><div class='add'>+</div><div class='add'>+next_ifc:</div><div class='add'>+		i += queue_count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (json_output)</div><div class='add'>+		jsonw_end_array(json_wtr);</div><div class='add'>+</div><div class='add'>+exit_free_sorted:</div><div class='add'>+	free(sorted);</div><div class='add'>+exit_free_qstats:</div><div class='add'>+	netdev_qstats_get_list_free(qstats);</div><div class='add'>+exit_close:</div><div class='add'>+	ynl_sock_destroy(ys);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_help(int argc __attribute__((unused)),</div><div class='add'>+		   char **argv __attribute__((unused)))</div><div class='add'>+{</div><div class='add'>+	if (json_output) {</div><div class='add'>+		jsonw_null(json_wtr);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stderr,</div><div class='add'>+		"Usage: %s qstats { COMMAND | help }\n"</div><div class='add'>+		"       %s qstats [ show ] [ OPTIONS ]\n"</div><div class='add'>+		"       %s qstats balance\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"       OPTIONS := { scope queue | group-by { device | queue } }\n"</div><div class='add'>+		"\n"</div><div class='add'>+		"       show                  - Display queue statistics (default)\n"</div><div class='add'>+		"                               Statistics are aggregated for the entire device.\n"</div><div class='add'>+		"       show scope queue      - Display per-queue statistics\n"</div><div class='add'>+		"       show group-by device  - Display device-aggregated statistics (default)\n"</div><div class='add'>+		"       show group-by queue   - Display per-queue statistics\n"</div><div class='add'>+		"       balance               - Analyze traffic distribution balance.\n"</div><div class='add'>+		"",</div><div class='add'>+		bin_name, bin_name, bin_name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cmd qstats_cmds[] = {</div><div class='add'>+	{ "show",	do_show },</div><div class='add'>+	{ "balance",	do_balance },</div><div class='add'>+	{ "help",	do_help },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int do_qstats(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	return cmd_select(qstats_cmds, argc, argv, do_help);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/.gitignore b/tools/objtool/.gitignore<br/>index 4faa4dd72f35..73d883128511 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/.gitignore?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/.gitignore</a></div><div class='hunk'>@@ -1,5 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+arch/x86/lib/cpu-feature-names.c</div><div class='ctx'> arch/x86/lib/inat-tables.c</div><div class='ctx'> /objtool</div><div class='add'>+feature</div><div class='add'>+FEATURE-DUMP.objtool</div><div class='ctx'> fixdep</div><div class='ctx'> libsubcmd/</div><div class='head'>diff --git a/tools/objtool/Build b/tools/objtool/Build<br/>index a3cdf8af6635..600da051af12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/Build</a></div><div class='hunk'>@@ -8,13 +8,17 @@ objtool-y += builtin-check.o</div><div class='ctx'> objtool-y += elf.o</div><div class='ctx'> objtool-y += objtool.o</div><div class='ctx'> </div><div class='del'>-objtool-$(BUILD_ORC) += orc_gen.o</div><div class='del'>-objtool-$(BUILD_ORC) += orc_dump.o</div><div class='add'>+objtool-$(BUILD_DISAS) += disas.o</div><div class='add'>+objtool-$(BUILD_DISAS) += trace.o</div><div class='add'>+</div><div class='add'>+objtool-$(BUILD_ORC) += orc_gen.o orc_dump.o</div><div class='add'>+objtool-$(BUILD_KLP) += builtin-klp.o klp-diff.o klp-post-link.o</div><div class='ctx'> </div><div class='ctx'> objtool-y += libstring.o</div><div class='ctx'> objtool-y += libctype.o</div><div class='ctx'> objtool-y += str_error_r.o</div><div class='ctx'> objtool-y += librbtree.o</div><div class='add'>+objtool-y += signal.o</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)libstring.o: ../lib/string.c FORCE</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='head'>diff --git a/tools/objtool/Makefile b/tools/objtool/Makefile<br/>index 8c20361dd100..ad6e1ec706ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/Makefile</a></div><div class='hunk'>@@ -2,6 +2,28 @@</div><div class='ctx'> include ../scripts/Makefile.include</div><div class='ctx'> include ../scripts/Makefile.arch</div><div class='ctx'> </div><div class='add'>+ifeq ($(SRCARCH),x86)</div><div class='add'>+	BUILD_ORC    := y</div><div class='add'>+	ARCH_HAS_KLP := y</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifeq ($(SRCARCH),loongarch)</div><div class='add'>+	BUILD_ORC	   := y</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifeq ($(ARCH_HAS_KLP),y)</div><div class='add'>+	HAVE_XXHASH = $(shell printf "$(pound)include &lt;xxhash.h&gt;\nXXH3_state_t *state;int main() {}" | \</div><div class='add'>+		      $(HOSTCC) -xc - -o /dev/null -lxxhash 2&gt; /dev/null &amp;&amp; echo y || echo n)</div><div class='add'>+	ifeq ($(HAVE_XXHASH),y)</div><div class='add'>+		BUILD_KLP	 := y</div><div class='add'>+		LIBXXHASH_CFLAGS := $(shell $(HOSTPKG_CONFIG) libxxhash --cflags 2&gt;/dev/null) \</div><div class='add'>+				    -DBUILD_KLP</div><div class='add'>+		LIBXXHASH_LIBS   := $(shell $(HOSTPKG_CONFIG) libxxhash --libs 2&gt;/dev/null || echo -lxxhash)</div><div class='add'>+	endif</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+export BUILD_ORC BUILD_KLP</div><div class='add'>+</div><div class='ctx'> ifeq ($(srctree),)</div><div class='ctx'> srctree := $(patsubst %/,%,$(dir $(CURDIR)))</div><div class='ctx'> srctree := $(patsubst %/,%,$(dir $(srctree)))</div><div class='hunk'>@@ -23,6 +45,11 @@ LIBELF_LIBS  := $(shell $(HOSTPKG_CONFIG) libelf --libs 2&gt;/dev/null || echo -lel</div><div class='ctx'> </div><div class='ctx'> all: $(OBJTOOL)</div><div class='ctx'> </div><div class='add'>+WARNINGS := -Werror -Wall -Wextra -Wmissing-prototypes			\</div><div class='add'>+	    -Wmissing-declarations -Wwrite-strings			\</div><div class='add'>+	    -Wno-implicit-fallthrough -Wno-sign-compare			\</div><div class='add'>+	    -Wno-unused-parameter</div><div class='add'>+</div><div class='ctx'> INCLUDES := -I$(srctree)/tools/include \</div><div class='ctx'> 	    -I$(srctree)/tools/include/uapi \</div><div class='ctx'> 	    -I$(srctree)/tools/arch/$(HOSTARCH)/include/uapi \</div><div class='hunk'>@@ -30,11 +57,11 @@ INCLUDES := -I$(srctree)/tools/include \</div><div class='ctx'> 	    -I$(srctree)/tools/objtool/include \</div><div class='ctx'> 	    -I$(srctree)/tools/objtool/arch/$(SRCARCH)/include \</div><div class='ctx'> 	    -I$(LIBSUBCMD_OUTPUT)/include</div><div class='del'>-# Note, EXTRA_WARNINGS here was determined for CC and not HOSTCC, it</div><div class='del'>-# is passed here to match a legacy behavior.</div><div class='del'>-WARNINGS := $(EXTRA_WARNINGS) -Wno-switch-default -Wno-switch-enum -Wno-packed -Wno-nested-externs</div><div class='del'>-OBJTOOL_CFLAGS := -Werror $(WARNINGS) $(KBUILD_HOSTCFLAGS) -g $(INCLUDES) $(LIBELF_FLAGS)</div><div class='del'>-OBJTOOL_LDFLAGS := $(LIBELF_LIBS) $(LIBSUBCMD) $(KBUILD_HOSTLDFLAGS)</div><div class='add'>+</div><div class='add'>+OBJTOOL_CFLAGS  := -std=gnu11 -fomit-frame-pointer -O2 -g $(WARNINGS)	\</div><div class='add'>+		   $(INCLUDES) $(LIBELF_FLAGS) $(LIBXXHASH_CFLAGS) $(HOSTCFLAGS)</div><div class='add'>+</div><div class='add'>+OBJTOOL_LDFLAGS := $(LIBSUBCMD) $(LIBELF_LIBS) $(LIBXXHASH_LIBS) $(HOSTLDFLAGS)</div><div class='ctx'> </div><div class='ctx'> # Allow old libelf to be used:</div><div class='ctx'> elfshdr := $(shell echo '$(pound)include &lt;libelf.h&gt;' | $(HOSTCC) $(OBJTOOL_CFLAGS) -x c -E - 2&gt;/dev/null | grep elf_getshdr)</div><div class='hunk'>@@ -43,20 +70,32 @@ OBJTOOL_CFLAGS += $(if $(elfshdr),,-DLIBELF_USE_DEPRECATED)</div><div class='ctx'> # Always want host compilation.</div><div class='ctx'> HOST_OVERRIDES := CC="$(HOSTCC)" LD="$(HOSTLD)" AR="$(HOSTAR)"</div><div class='ctx'> </div><div class='del'>-AWK = awk</div><div class='del'>-MKDIR = mkdir</div><div class='add'>+#</div><div class='add'>+# To support disassembly, objtool needs libopcodes which is provided</div><div class='add'>+# with libbdf (binutils-dev or binutils-devel package).</div><div class='add'>+#</div><div class='add'>+FEATURE_USER = .objtool</div><div class='add'>+FEATURE_TESTS = libbfd disassembler-init-styled</div><div class='add'>+FEATURE_DISPLAY =</div><div class='add'>+include $(srctree)/tools/build/Makefile.feature</div><div class='add'>+</div><div class='add'>+ifeq ($(feature-disassembler-init-styled), 1)</div><div class='add'>+	OBJTOOL_CFLAGS += -DDISASM_INIT_STYLED</div><div class='add'>+endif</div><div class='ctx'> </div><div class='del'>-BUILD_ORC := n</div><div class='add'>+BUILD_DISAS := n</div><div class='ctx'> </div><div class='del'>-ifeq ($(SRCARCH),x86)</div><div class='del'>-	BUILD_ORC := y</div><div class='add'>+ifeq ($(feature-libbfd),1)</div><div class='add'>+	BUILD_DISAS := y</div><div class='add'>+	OBJTOOL_CFLAGS += -DDISAS -DPACKAGE="objtool"</div><div class='add'>+	OBJTOOL_LDFLAGS += -lopcodes</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifeq ($(SRCARCH),loongarch)</div><div class='del'>-	BUILD_ORC := y</div><div class='del'>-endif</div><div class='add'>+export BUILD_DISAS</div><div class='add'>+</div><div class='add'>+AWK = awk</div><div class='add'>+MKDIR = mkdir</div><div class='ctx'> </div><div class='del'>-export BUILD_ORC</div><div class='ctx'> export srctree OUTPUT CFLAGS SRCARCH AWK</div><div class='ctx'> include $(srctree)/tools/build/Makefile.include</div><div class='ctx'> </div><div class='hunk'>@@ -86,7 +125,10 @@ $(LIBSUBCMD)-clean:</div><div class='ctx'> clean: $(LIBSUBCMD)-clean</div><div class='ctx'> 	$(call QUIET_CLEAN, objtool) $(RM) $(OBJTOOL)</div><div class='ctx'> 	$(Q)find $(OUTPUT) -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete</div><div class='add'>+	$(Q)$(RM) $(OUTPUT)arch/x86/lib/cpu-feature-names.c $(OUTPUT)fixdep</div><div class='ctx'> 	$(Q)$(RM) $(OUTPUT)arch/x86/lib/inat-tables.c $(OUTPUT)fixdep</div><div class='add'>+	$(Q)$(RM) -- $(OUTPUT)FEATURE-DUMP.objtool</div><div class='add'>+	$(Q)$(RM) -r -- $(OUTPUT)feature</div><div class='ctx'> </div><div class='ctx'> FORCE:</div><div class='ctx'> </div><div class='head'>diff --git a/tools/objtool/arch/loongarch/decode.c b/tools/objtool/arch/loongarch/decode.c<br/>index b6fdc68053cc..6cd288150f49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/decode.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/decode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/decode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/loongarch/decode.c</a></div><div class='hunk'>@@ -1,13 +1,25 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='ctx'> #include &lt;asm/inst.h&gt;</div><div class='ctx'> #include &lt;asm/orc_types.h&gt;</div><div class='ctx'> #include &lt;linux/objtool_types.h&gt;</div><div class='ctx'> #include &lt;arch/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-int arch_ftrace_match(char *name)</div><div class='add'>+const char *arch_reg_name[CFI_NUM_REGS] = {</div><div class='add'>+	"zero", "ra", "tp", "sp",</div><div class='add'>+	"a0", "a1", "a2", "a3",</div><div class='add'>+	"a4", "a5", "a6", "a7",</div><div class='add'>+	"t0", "t1", "t2", "t3",</div><div class='add'>+	"t4", "t5", "t6", "t7",</div><div class='add'>+	"t8", "u0", "fp", "s0",</div><div class='add'>+	"s1", "s2", "s3", "s4",</div><div class='add'>+	"s5", "s6", "s7", "s8"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int arch_ftrace_match(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	return !strcmp(name, "_mcount");</div><div class='ctx'> }</div><div class='hunk'>@@ -17,9 +29,9 @@ unsigned long arch_jump_destination(struct instruction *insn)</div><div class='ctx'> 	return insn-&gt;offset + (insn-&gt;immediate &lt;&lt; 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long arch_dest_reloc_offset(int addend)</div><div class='add'>+s64 arch_insn_adjusted_addend(struct instruction *insn, struct reloc *reloc)</div><div class='ctx'> {</div><div class='del'>-	return addend;</div><div class='add'>+	return reloc_addend(reloc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool arch_pc_relative_reloc(struct reloc *reloc)</div><div class='hunk'>@@ -278,6 +290,25 @@ static bool decode_insn_reg2i16_fomat(union loongarch_instruction inst,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool decode_insn_reg3_fomat(union loongarch_instruction inst,</div><div class='add'>+				   struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	switch (inst.reg3_format.opcode) {</div><div class='add'>+	case amswapw_op:</div><div class='add'>+		if (inst.reg3_format.rd == LOONGARCH_GPR_ZERO &amp;&amp;</div><div class='add'>+		    inst.reg3_format.rk == LOONGARCH_GPR_RA &amp;&amp;</div><div class='add'>+		    inst.reg3_format.rj == LOONGARCH_GPR_ZERO) {</div><div class='add'>+			/* amswap.w $zero, $ra, $zero */</div><div class='add'>+			insn-&gt;type = INSN_BUG;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int arch_decode_instruction(struct objtool_file *file, const struct section *sec,</div><div class='ctx'> 			    unsigned long offset, unsigned int maxlen,</div><div class='ctx'> 			    struct instruction *insn)</div><div class='hunk'>@@ -309,11 +340,19 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (decode_insn_reg2i16_fomat(inst, insn))</div><div class='ctx'> 		return 0;</div><div class='add'>+	if (decode_insn_reg3_fomat(inst, insn))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	if (inst.word == 0)</div><div class='add'>+	if (inst.word == 0) {</div><div class='add'>+		/* andi $zero, $zero, 0x0 */</div><div class='ctx'> 		insn-&gt;type = INSN_NOP;</div><div class='del'>-	else if (inst.reg0i15_format.opcode == break_op) {</div><div class='del'>-		/* break */</div><div class='add'>+	} else if (inst.reg0i15_format.opcode == break_op &amp;&amp;</div><div class='add'>+		   inst.reg0i15_format.immediate == 0x0) {</div><div class='add'>+		/* break 0x0 */</div><div class='add'>+		insn-&gt;type = INSN_TRAP;</div><div class='add'>+	} else if (inst.reg0i15_format.opcode == break_op &amp;&amp;</div><div class='add'>+		   inst.reg0i15_format.immediate == 0x1) {</div><div class='add'>+		/* break 0x1 */</div><div class='ctx'> 		insn-&gt;type = INSN_BUG;</div><div class='ctx'> 	} else if (inst.reg2_format.opcode == ertn_op) {</div><div class='ctx'> 		/* ertn */</div><div class='hunk'>@@ -387,3 +426,14 @@ unsigned long arch_jump_table_sym_offset(struct reloc *reloc, struct reloc *tabl</div><div class='ctx'> 		return reloc-&gt;sym-&gt;offset + reloc_addend(reloc);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+int arch_disas_info_init(struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	return disas_info_init(dinfo, bfd_arch_loongarch,</div><div class='add'>+			       bfd_mach_loongarch32, bfd_mach_loongarch64,</div><div class='add'>+			       NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* DISAS */</div><div class='head'>diff --git a/tools/objtool/arch/loongarch/orc.c b/tools/objtool/arch/loongarch/orc.c<br/>index b58c5ff443c9..ffd3a3c858ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/orc.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/orc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/orc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/loongarch/orc.c</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='ctx'> #include &lt;objtool/orc.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='ctx'> int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi, struct instruction *insn)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/objtool/arch/loongarch/special.c b/tools/objtool/arch/loongarch/special.c<br/>index e39f86d97002..aba774109437 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/special.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/loongarch/special.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/loongarch/special.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/loongarch/special.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@ static void get_rodata_table_size_by_table_annotate(struct objtool_file *file,</div><div class='ctx'> 	struct table_info *next_table;</div><div class='ctx'> 	unsigned long tmp_insn_offset;</div><div class='ctx'> 	unsigned long tmp_rodata_offset;</div><div class='add'>+	bool is_valid_list = false;</div><div class='ctx'> </div><div class='ctx'> 	rsec = find_section_by_name(file-&gt;elf, ".rela.discard.tablejump_annotate");</div><div class='ctx'> 	if (!rsec)</div><div class='hunk'>@@ -35,6 +36,12 @@ static void get_rodata_table_size_by_table_annotate(struct objtool_file *file,</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;table_list);</div><div class='ctx'> </div><div class='ctx'> 	for_each_reloc(rsec, reloc) {</div><div class='add'>+		if (reloc-&gt;sym-&gt;sec-&gt;rodata)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (strcmp(insn-&gt;sec-&gt;name, reloc-&gt;sym-&gt;sec-&gt;name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		orig_table = malloc(sizeof(struct table_info));</div><div class='ctx'> 		if (!orig_table) {</div><div class='ctx'> 			WARN("malloc failed");</div><div class='hunk'>@@ -49,6 +56,22 @@ static void get_rodata_table_size_by_table_annotate(struct objtool_file *file,</div><div class='ctx'> </div><div class='ctx'> 		if (reloc_idx(reloc) + 1 == sec_num_entries(rsec))</div><div class='ctx'> 			break;</div><div class='add'>+</div><div class='add'>+		if (strcmp(insn-&gt;sec-&gt;name, (reloc + 1)-&gt;sym-&gt;sec-&gt;name)) {</div><div class='add'>+			list_for_each_entry(orig_table, &amp;table_list, jump_info) {</div><div class='add'>+				if (orig_table-&gt;insn_offset == insn-&gt;offset) {</div><div class='add'>+					is_valid_list = true;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!is_valid_list) {</div><div class='add'>+				list_del_init(&amp;table_list);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(orig_table, &amp;table_list, jump_info) {</div><div class='hunk'>@@ -171,3 +194,8 @@ struct reloc *arch_find_switch_table(struct objtool_file *file,</div><div class='ctx'> </div><div class='ctx'> 	return rodata_reloc;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const char *arch_cpu_feature_name(int feature_number)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/arch/powerpc/decode.c b/tools/objtool/arch/powerpc/decode.c<br/>index c851c51d4bd3..e534ac1123b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/powerpc/decode.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/powerpc/decode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/powerpc/decode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/powerpc/decode.c</a></div><div class='hunk'>@@ -3,20 +3,32 @@</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='ctx'> #include &lt;objtool/elf.h&gt;</div><div class='ctx'> #include &lt;objtool/arch.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='del'>-int arch_ftrace_match(char *name)</div><div class='add'>+const char *arch_reg_name[CFI_NUM_REGS] = {</div><div class='add'>+	"r0",  "sp",  "r2",  "r3",</div><div class='add'>+	"r4",  "r5",  "r6",  "r7",</div><div class='add'>+	"r8",  "r9",  "r10", "r11",</div><div class='add'>+	"r12", "r13", "r14", "r15",</div><div class='add'>+	"r16", "r17", "r18", "r19",</div><div class='add'>+	"r20", "r21", "r22", "r23",</div><div class='add'>+	"r24", "r25", "r26", "r27",</div><div class='add'>+	"r28", "r29", "r30", "r31",</div><div class='add'>+	"ra"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int arch_ftrace_match(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	return !strcmp(name, "_mcount");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long arch_dest_reloc_offset(int addend)</div><div class='add'>+s64 arch_insn_adjusted_addend(struct instruction *insn, struct reloc *reloc)</div><div class='ctx'> {</div><div class='del'>-	return addend;</div><div class='add'>+	return reloc_addend(reloc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool arch_callee_saved_reg(unsigned char reg)</div><div class='hunk'>@@ -128,3 +140,14 @@ unsigned int arch_reloc_size(struct reloc *reloc)</div><div class='ctx'> 		return 8;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+int arch_disas_info_init(struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	return disas_info_init(dinfo, bfd_arch_powerpc,</div><div class='add'>+			       bfd_mach_ppc, bfd_mach_ppc64,</div><div class='add'>+			       NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* DISAS */</div><div class='head'>diff --git a/tools/objtool/arch/powerpc/special.c b/tools/objtool/arch/powerpc/special.c<br/>index 51610689abf7..8f9bf61ca089 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/powerpc/special.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/powerpc/special.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/powerpc/special.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/powerpc/special.c</a></div><div class='hunk'>@@ -18,3 +18,8 @@ struct reloc *arch_find_switch_table(struct objtool_file *file,</div><div class='ctx'> {</div><div class='ctx'> 	exit(-1);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const char *arch_cpu_feature_name(int feature_number)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/arch/x86/Build b/tools/objtool/arch/x86/Build<br/>index 3dedb2fd8f3a..febee0b8ee0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/x86/Build</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-objtool-y += special.o</div><div class='ctx'> objtool-y += decode.o</div><div class='add'>+objtool-y += special.o</div><div class='ctx'> objtool-y += orc.o</div><div class='ctx'> </div><div class='ctx'> inat_tables_script = ../arch/x86/tools/gen-insn-attr-x86.awk</div><div class='hunk'>@@ -12,3 +12,14 @@ $(OUTPUT)arch/x86/lib/inat-tables.c: $(inat_tables_script) $(inat_tables_maps)</div><div class='ctx'> $(OUTPUT)arch/x86/decode.o: $(OUTPUT)arch/x86/lib/inat-tables.c</div><div class='ctx'> </div><div class='ctx'> CFLAGS_decode.o += -I$(OUTPUT)arch/x86/lib</div><div class='add'>+</div><div class='add'>+cpu_features = ../arch/x86/include/asm/cpufeatures.h</div><div class='add'>+cpu_features_script = ../arch/x86/tools/gen-cpu-feature-names-x86.awk</div><div class='add'>+</div><div class='add'>+$(OUTPUT)arch/x86/lib/cpu-feature-names.c: $(cpu_features_script) $(cpu_features)</div><div class='add'>+	$(call rule_mkdir)</div><div class='add'>+	$(Q)$(call echo-cmd,gen)$(AWK) -f $(cpu_features_script) $(cpu_features) &gt; $@</div><div class='add'>+</div><div class='add'>+$(OUTPUT)arch/x86/special.o: $(OUTPUT)arch/x86/lib/cpu-feature-names.c</div><div class='add'>+</div><div class='add'>+CFLAGS_special.o += -I$(OUTPUT)arch/x86/lib</div><div class='head'>diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decode.c<br/>index 98c4713c1b09..f4af82508228 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/decode.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/decode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/decode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/x86/decode.c</a></div><div class='hunk'>@@ -16,14 +16,22 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/orc_types.h&gt;</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='ctx'> #include &lt;objtool/elf.h&gt;</div><div class='ctx'> #include &lt;objtool/arch.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='ctx'> #include &lt;arch/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-int arch_ftrace_match(char *name)</div><div class='add'>+const char *arch_reg_name[CFI_NUM_REGS] = {</div><div class='add'>+	"rax", "rcx", "rdx", "rbx",</div><div class='add'>+	"rsp", "rbp", "rsi", "rdi",</div><div class='add'>+	"r8",  "r9",  "r10", "r11",</div><div class='add'>+	"r12", "r13", "r14", "r15",</div><div class='add'>+	"ra"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int arch_ftrace_match(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	return !strcmp(name, "__fentry__");</div><div class='ctx'> }</div><div class='hunk'>@@ -68,9 +76,65 @@ bool arch_callee_saved_reg(unsigned char reg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long arch_dest_reloc_offset(int addend)</div><div class='add'>+/* Undo the effects of __pa_symbol() if necessary */</div><div class='add'>+static unsigned long phys_to_virt(unsigned long pa)</div><div class='add'>+{</div><div class='add'>+	s64 va = pa;</div><div class='add'>+</div><div class='add'>+	if (va &gt; 0)</div><div class='add'>+		va &amp;= ~(0x80000000);</div><div class='add'>+</div><div class='add'>+	return va;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+s64 arch_insn_adjusted_addend(struct instruction *insn, struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	s64 addend = reloc_addend(reloc);</div><div class='add'>+</div><div class='add'>+	if (arch_pc_relative_reloc(reloc))</div><div class='add'>+		addend += insn-&gt;offset + insn-&gt;len - reloc_offset(reloc);</div><div class='add'>+</div><div class='add'>+	return phys_to_virt(addend);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void scan_for_insn(struct section *sec, unsigned long offset,</div><div class='add'>+			  unsigned long *insn_off, unsigned int *insn_len)</div><div class='add'>+{</div><div class='add'>+	unsigned long o = 0;</div><div class='add'>+	struct insn insn;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+</div><div class='add'>+		insn_decode(&amp;insn, sec-&gt;data-&gt;d_buf + o, sec_size(sec) - o,</div><div class='add'>+			    INSN_MODE_64);</div><div class='add'>+</div><div class='add'>+		if (o + insn.length &gt; offset) {</div><div class='add'>+			*insn_off = o;</div><div class='add'>+			*insn_len = insn.length;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		o += insn.length;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 arch_adjusted_addend(struct reloc *reloc)</div><div class='ctx'> {</div><div class='del'>-	return addend + 4;</div><div class='add'>+	unsigned int type = reloc_type(reloc);</div><div class='add'>+	s64 addend = reloc_addend(reloc);</div><div class='add'>+	unsigned long insn_off;</div><div class='add'>+	unsigned int insn_len;</div><div class='add'>+</div><div class='add'>+	if (type == R_X86_64_PLT32)</div><div class='add'>+		return addend + 4;</div><div class='add'>+</div><div class='add'>+	if (type != R_X86_64_PC32 || !is_text_sec(reloc-&gt;sec-&gt;base))</div><div class='add'>+		return addend;</div><div class='add'>+</div><div class='add'>+	scan_for_insn(reloc-&gt;sec-&gt;base, reloc_offset(reloc),</div><div class='add'>+		      &amp;insn_off, &amp;insn_len);</div><div class='add'>+</div><div class='add'>+	return addend + insn_off + insn_len - reloc_offset(reloc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned long arch_jump_destination(struct instruction *insn)</div><div class='hunk'>@@ -189,15 +253,6 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec</div><div class='ctx'> 	op2 = ins.opcode.bytes[1];</div><div class='ctx'> 	op3 = ins.opcode.bytes[2];</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * XXX hack, decoder is buggered and thinks 0xea is 7 bytes long.</div><div class='del'>-	 */</div><div class='del'>-	if (op1 == 0xea) {</div><div class='del'>-		insn-&gt;len = 1;</div><div class='del'>-		insn-&gt;type = INSN_BUG;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (ins.rex_prefix.nbytes) {</div><div class='ctx'> 		rex = ins.rex_prefix.bytes[0];</div><div class='ctx'> 		rex_w = X86_REX_W(rex) &gt;&gt; 3;</div><div class='hunk'>@@ -503,6 +558,12 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 0x90:</div><div class='add'>+		if (rex_b) /* XCHG %r8, %rax */</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (prefix == 0xf3) /* REP NOP := PAUSE */</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		insn-&gt;type = INSN_NOP;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -556,13 +617,14 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec</div><div class='ctx'> </div><div class='ctx'> 		} else if (op2 == 0x0b || op2 == 0xb9) {</div><div class='ctx'> </div><div class='del'>-			/* ud2 */</div><div class='add'>+			/* ud2, ud1 */</div><div class='ctx'> 			insn-&gt;type = INSN_BUG;</div><div class='ctx'> </div><div class='del'>-		} else if (op2 == 0x0d || op2 == 0x1f) {</div><div class='add'>+		} else if (op2 == 0x1f) {</div><div class='ctx'> </div><div class='del'>-			/* nopl/nopw */</div><div class='del'>-			insn-&gt;type = INSN_NOP;</div><div class='add'>+			/* 0f 1f /0 := NOPL */</div><div class='add'>+			if (modrm_reg == 0)</div><div class='add'>+				insn-&gt;type = INSN_NOP;</div><div class='ctx'> </div><div class='ctx'> 		} else if (op2 == 0x1e) {</div><div class='ctx'> </div><div class='hunk'>@@ -692,6 +754,10 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec</div><div class='ctx'> 		insn-&gt;type = INSN_SYSRET;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case 0xd6: /* udb */</div><div class='add'>+		insn-&gt;type = INSN_BUG;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case 0xe0: /* loopne */</div><div class='ctx'> 	case 0xe1: /* loope */</div><div class='ctx'> 	case 0xe2: /* loop */</div><div class='hunk'>@@ -880,3 +946,26 @@ unsigned int arch_reloc_size(struct reloc *reloc)</div><div class='ctx'> 		return 8;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool arch_absolute_reloc(struct elf *elf, struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	switch (reloc_type(reloc)) {</div><div class='add'>+	case R_X86_64_32:</div><div class='add'>+	case R_X86_64_32S:</div><div class='add'>+	case R_X86_64_64:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+int arch_disas_info_init(struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	return disas_info_init(dinfo, bfd_arch_i386,</div><div class='add'>+			       bfd_mach_i386_i386, bfd_mach_x86_64,</div><div class='add'>+			       "att");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* DISAS */</div><div class='head'>diff --git a/tools/objtool/arch/x86/orc.c b/tools/objtool/arch/x86/orc.c<br/>index 7176b9ec5b05..735e150ca6b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/orc.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/orc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/orc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/x86/orc.c</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='ctx'> #include &lt;objtool/orc.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='ctx'> int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi, struct instruction *insn)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/objtool/arch/x86/special.c b/tools/objtool/arch/x86/special.c<br/>index 06ca4a2659a4..e817a3fff449 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/special.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/arch/x86/special.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/arch/x86/special.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/arch/x86/special.c</a></div><div class='hunk'>@@ -4,6 +4,10 @@</div><div class='ctx'> #include &lt;objtool/special.h&gt;</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='add'>+#include &lt;asm/cpufeatures.h&gt;</div><div class='add'>+</div><div class='add'>+/* cpu feature name array generated from cpufeatures.h */</div><div class='add'>+#include "cpu-feature-names.c"</div><div class='ctx'> </div><div class='ctx'> void arch_handle_alternative(struct special_alt *alt)</div><div class='ctx'> {</div><div class='hunk'>@@ -89,7 +93,7 @@ struct reloc *arch_find_switch_table(struct objtool_file *file,</div><div class='ctx'> 	/* look for a relocation which references .rodata */</div><div class='ctx'> 	text_reloc = find_reloc_by_dest_range(file-&gt;elf, insn-&gt;sec,</div><div class='ctx'> 					      insn-&gt;offset, insn-&gt;len);</div><div class='del'>-	if (!text_reloc || text_reloc-&gt;sym-&gt;type != STT_SECTION ||</div><div class='add'>+	if (!text_reloc || !is_sec_sym(text_reloc-&gt;sym) ||</div><div class='ctx'> 	    !text_reloc-&gt;sym-&gt;sec-&gt;rodata)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -134,3 +138,9 @@ struct reloc *arch_find_switch_table(struct objtool_file *file,</div><div class='ctx'> 	*table_size = 0;</div><div class='ctx'> 	return rodata_reloc;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const char *arch_cpu_feature_name(int feature_number)</div><div class='add'>+{</div><div class='add'>+	return (feature_number &lt; ARRAY_SIZE(cpu_feature_names)) ?</div><div class='add'>+		cpu_feature_names[feature_number] : NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/builtin-check.c b/tools/objtool/builtin-check.c<br/>index 80239843e9f0..b780df513715 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/builtin-check.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/builtin-check.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/builtin-check.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/builtin-check.c</a></div><div class='hunk'>@@ -73,34 +73,41 @@ static int parse_hacks(const struct option *opt, const char *str, int unset)</div><div class='ctx'> </div><div class='ctx'> static const struct option check_options[] = {</div><div class='ctx'> 	OPT_GROUP("Actions:"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "checksum", &amp;opts.checksum, "generate per-function checksums"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "cfi", &amp;opts.cfi, "annotate kernel control flow integrity (kCFI) function preambles"),</div><div class='add'>+	OPT_STRING_OPTARG('d',	 "disas", &amp;opts.disas, "function-pattern", "disassemble functions", "*"),</div><div class='ctx'> 	OPT_CALLBACK_OPTARG('h', "hacks", NULL, NULL, "jump_label,noinstr,skylake", "patch toolchain bugs/limitations", parse_hacks),</div><div class='del'>-	OPT_BOOLEAN('i', "ibt", &amp;opts.ibt, "validate and annotate IBT"),</div><div class='del'>-	OPT_BOOLEAN('m', "mcount", &amp;opts.mcount, "annotate mcount/fentry calls for ftrace"),</div><div class='del'>-	OPT_BOOLEAN('n', "noinstr", &amp;opts.noinstr, "validate noinstr rules"),</div><div class='del'>-	OPT_BOOLEAN(0,   "orc", &amp;opts.orc, "generate ORC metadata"),</div><div class='del'>-	OPT_BOOLEAN('r', "retpoline", &amp;opts.retpoline, "validate and annotate retpoline usage"),</div><div class='del'>-	OPT_BOOLEAN(0,   "rethunk", &amp;opts.rethunk, "validate and annotate rethunk usage"),</div><div class='del'>-	OPT_BOOLEAN(0,   "unret", &amp;opts.unret, "validate entry unret placement"),</div><div class='del'>-	OPT_INTEGER(0,   "prefix", &amp;opts.prefix, "generate prefix symbols"),</div><div class='del'>-	OPT_BOOLEAN('l', "sls", &amp;opts.sls, "validate straight-line-speculation mitigations"),</div><div class='del'>-	OPT_BOOLEAN('s', "stackval", &amp;opts.stackval, "validate frame pointer rules"),</div><div class='del'>-	OPT_BOOLEAN('t', "static-call", &amp;opts.static_call, "annotate static calls"),</div><div class='del'>-	OPT_BOOLEAN('u', "uaccess", &amp;opts.uaccess, "validate uaccess rules for SMAP"),</div><div class='del'>-	OPT_BOOLEAN(0  , "cfi", &amp;opts.cfi, "annotate kernel control flow integrity (kCFI) function preambles"),</div><div class='del'>-	OPT_CALLBACK_OPTARG(0, "dump", NULL, NULL, "orc", "dump metadata", parse_dump),</div><div class='add'>+	OPT_BOOLEAN('i',	 "ibt", &amp;opts.ibt, "validate and annotate IBT"),</div><div class='add'>+	OPT_BOOLEAN('m',	 "mcount", &amp;opts.mcount, "annotate mcount/fentry calls for ftrace"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "noabs", &amp;opts.noabs, "reject absolute references in allocatable sections"),</div><div class='add'>+	OPT_BOOLEAN('n',	 "noinstr", &amp;opts.noinstr, "validate noinstr rules"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "orc", &amp;opts.orc, "generate ORC metadata"),</div><div class='add'>+	OPT_BOOLEAN('r',	 "retpoline", &amp;opts.retpoline, "validate and annotate retpoline usage"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "rethunk", &amp;opts.rethunk, "validate and annotate rethunk usage"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "unret", &amp;opts.unret, "validate entry unret placement"),</div><div class='add'>+	OPT_INTEGER(0,		 "prefix", &amp;opts.prefix, "generate prefix symbols"),</div><div class='add'>+	OPT_BOOLEAN('l',	 "sls", &amp;opts.sls, "validate straight-line-speculation mitigations"),</div><div class='add'>+	OPT_BOOLEAN('s',	 "stackval", &amp;opts.stackval, "validate frame pointer rules"),</div><div class='add'>+	OPT_BOOLEAN('t',	 "static-call", &amp;opts.static_call, "annotate static calls"),</div><div class='add'>+	OPT_BOOLEAN('u',	 "uaccess", &amp;opts.uaccess, "validate uaccess rules for SMAP"),</div><div class='add'>+	OPT_CALLBACK_OPTARG(0,	 "dump", NULL, NULL, "orc", "dump metadata", parse_dump),</div><div class='ctx'> </div><div class='ctx'> 	OPT_GROUP("Options:"),</div><div class='del'>-	OPT_BOOLEAN(0,   "backtrace", &amp;opts.backtrace, "unwind on error"),</div><div class='del'>-	OPT_BOOLEAN(0,   "dry-run", &amp;opts.dryrun, "don't write modifications"),</div><div class='del'>-	OPT_BOOLEAN(0,   "link", &amp;opts.link, "object is a linked object"),</div><div class='del'>-	OPT_BOOLEAN(0,   "module", &amp;opts.module, "object is part of a kernel module"),</div><div class='del'>-	OPT_BOOLEAN(0,   "mnop", &amp;opts.mnop, "nop out mcount call sites"),</div><div class='del'>-	OPT_BOOLEAN(0,   "no-unreachable", &amp;opts.no_unreachable, "skip 'unreachable instruction' warnings"),</div><div class='del'>-	OPT_STRING('o',  "output", &amp;opts.output, "file", "output file name"),</div><div class='del'>-	OPT_BOOLEAN(0,   "sec-address", &amp;opts.sec_address, "print section addresses in warnings"),</div><div class='del'>-	OPT_BOOLEAN(0,   "stats", &amp;opts.stats, "print statistics"),</div><div class='del'>-	OPT_BOOLEAN('v', "verbose", &amp;opts.verbose, "verbose warnings"),</div><div class='del'>-	OPT_BOOLEAN(0,   "Werror", &amp;opts.werror, "return error on warnings"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "backtrace", &amp;opts.backtrace, "unwind on error"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "backup", &amp;opts.backup, "create backup (.orig) file on warning/error"),</div><div class='add'>+	OPT_STRING(0,		 "debug-checksum", &amp;opts.debug_checksum,  "funcs", "enable checksum debug output"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "dry-run", &amp;opts.dryrun, "don't write modifications"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "link", &amp;opts.link, "object is a linked object"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "module", &amp;opts.module, "object is part of a kernel module"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "mnop", &amp;opts.mnop, "nop out mcount call sites"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "no-unreachable", &amp;opts.no_unreachable, "skip 'unreachable instruction' warnings"),</div><div class='add'>+	OPT_STRING('o',		 "output", &amp;opts.output, "file", "output file name"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "sec-address", &amp;opts.sec_address, "print section addresses in warnings"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "stats", &amp;opts.stats, "print statistics"),</div><div class='add'>+	OPT_STRING(0,		 "trace", &amp;opts.trace, "func", "trace function validation"),</div><div class='add'>+	OPT_BOOLEAN('v',	 "verbose", &amp;opts.verbose, "verbose warnings"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "werror", &amp;opts.werror, "return error on warnings"),</div><div class='add'>+	OPT_BOOLEAN(0,		 "wide", &amp;opts.wide, "wide output"),</div><div class='ctx'> </div><div class='ctx'> 	OPT_END(),</div><div class='ctx'> };</div><div class='hunk'>@@ -158,10 +165,25 @@ static bool opts_valid(void)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (opts.hack_jump_label	||</div><div class='add'>+#ifndef BUILD_KLP</div><div class='add'>+	if (opts.checksum) {</div><div class='add'>+		ERROR("--checksum not supported; install xxhash-devel/libxxhash-dev (version &gt;= 0.8) and recompile");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (opts.debug_checksum &amp;&amp; !opts.checksum) {</div><div class='add'>+		ERROR("--debug-checksum requires --checksum");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opts.checksum		||</div><div class='add'>+	    opts.disas			||</div><div class='add'>+	    opts.hack_jump_label	||</div><div class='ctx'> 	    opts.hack_noinstr		||</div><div class='ctx'> 	    opts.ibt			||</div><div class='ctx'> 	    opts.mcount			||</div><div class='add'>+	    opts.noabs			||</div><div class='ctx'> 	    opts.noinstr		||</div><div class='ctx'> 	    opts.orc			||</div><div class='ctx'> 	    opts.retpoline		||</div><div class='hunk'>@@ -241,15 +263,12 @@ static void save_argv(int argc, const char **argv)</div><div class='ctx'> 			ERROR_GLIBC("strdup(%s)", argv[i]);</div><div class='ctx'> 			exit(1);</div><div class='ctx'> 		}</div><div class='del'>-	};</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void print_args(void)</div><div class='add'>+int make_backup(void)</div><div class='ctx'> {</div><div class='del'>-	char *backup = NULL;</div><div class='del'>-</div><div class='del'>-	if (opts.output || opts.dryrun)</div><div class='del'>-		goto print;</div><div class='add'>+	char *backup;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make a backup before kbuild deletes the file so the error</div><div class='hunk'>@@ -258,33 +277,32 @@ void print_args(void)</div><div class='ctx'> 	backup = malloc(strlen(objname) + strlen(ORIG_SUFFIX) + 1);</div><div class='ctx'> 	if (!backup) {</div><div class='ctx'> 		ERROR_GLIBC("malloc");</div><div class='del'>-		goto print;</div><div class='add'>+		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	strcpy(backup, objname);</div><div class='ctx'> 	strcat(backup, ORIG_SUFFIX);</div><div class='del'>-	if (copy_file(objname, backup)) {</div><div class='del'>-		backup = NULL;</div><div class='del'>-		goto print;</div><div class='del'>-	}</div><div class='add'>+	if (copy_file(objname, backup))</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-print:</div><div class='ctx'> 	/*</div><div class='del'>-	 * Print the cmdline args to make it easier to recreate.  If '--output'</div><div class='del'>-	 * wasn't used, add it to the printed args with the backup as input.</div><div class='add'>+	 * Print the cmdline args to make it easier to recreate.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='ctx'> 	fprintf(stderr, "%s", orig_argv[0]);</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 1; i &lt; orig_argc; i++) {</div><div class='ctx'> 		char *arg = orig_argv[i];</div><div class='ctx'> </div><div class='del'>-		if (backup &amp;&amp; !strcmp(arg, objname))</div><div class='add'>+		/* Modify the printed args to use the backup */</div><div class='add'>+		if (!opts.output &amp;&amp; !strcmp(arg, objname))</div><div class='ctx'> 			fprintf(stderr, " %s -o %s", backup, objname);</div><div class='ctx'> 		else</div><div class='ctx'> 			fprintf(stderr, " %s", arg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	fprintf(stderr, "\n");</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int objtool_run(int argc, const char **argv)</div><div class='hunk'>@@ -330,5 +348,5 @@ int objtool_run(int argc, const char **argv)</div><div class='ctx'> 	if (!opts.dryrun &amp;&amp; file-&gt;elf-&gt;changed &amp;&amp; elf_write(file-&gt;elf))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return elf_close(file-&gt;elf);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/objtool/builtin-klp.c b/tools/objtool/builtin-klp.c<br/>new file mode 100644<br/>index 000000000000..56d5a5b92f72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/builtin-klp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/builtin-klp.c</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#include &lt;subcmd/parse-options.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;objtool/builtin.h&gt;</div><div class='add'>+#include &lt;objtool/objtool.h&gt;</div><div class='add'>+#include &lt;objtool/klp.h&gt;</div><div class='add'>+</div><div class='add'>+struct subcmd {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char *description;</div><div class='add'>+	int (*fn)(int, const char **);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct subcmd subcmds[] = {</div><div class='add'>+	{ "diff",		"Generate binary diff of two object files",		cmd_klp_diff, },</div><div class='add'>+	{ "post-link",		"Finalize klp symbols/relocs after module linking",	cmd_klp_post_link, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void cmd_klp_usage(void)</div><div class='add'>+{</div><div class='add'>+	fprintf(stderr, "usage: objtool klp &lt;subcommand&gt; [&lt;options&gt;]\n\n");</div><div class='add'>+	fprintf(stderr, "Subcommands:\n");</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(subcmds); i++) {</div><div class='add'>+		struct subcmd *cmd = &amp;subcmds[i];</div><div class='add'>+</div><div class='add'>+		fprintf(stderr, "  %s\t%s\n", cmd-&gt;name, cmd-&gt;description);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exit(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cmd_klp(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	argc--;</div><div class='add'>+	argv++;</div><div class='add'>+</div><div class='add'>+	if (!argc)</div><div class='add'>+		cmd_klp_usage();</div><div class='add'>+</div><div class='add'>+	if (argc) {</div><div class='add'>+		for (int i = 0; i &lt; ARRAY_SIZE(subcmds); i++) {</div><div class='add'>+			struct subcmd *cmd = &amp;subcmds[i];</div><div class='add'>+</div><div class='add'>+			if (!strcmp(cmd-&gt;name, argv[0]))</div><div class='add'>+				return cmd-&gt;fn(argc, argv);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd_klp_usage();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/check.c b/tools/objtool/check.c<br/>index d14f20ef1db1..3f7999317f4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/check.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/check.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/check.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/check.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'>  * Copyright (C) 2015-2017 Josh Poimboeuf &lt;jpoimboe@redhat.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define _GNU_SOURCE /* memmem() */</div><div class='add'>+#include &lt;fnmatch.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='hunk'>@@ -11,10 +13,13 @@</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='ctx'> #include &lt;objtool/cfi.h&gt;</div><div class='ctx'> #include &lt;objtool/arch.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='ctx'> #include &lt;objtool/special.h&gt;</div><div class='add'>+#include &lt;objtool/trace.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='add'>+#include &lt;objtool/checksum.h&gt;</div><div class='add'>+#include &lt;objtool/util.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/objtool_types.h&gt;</div><div class='ctx'> #include &lt;linux/hashtable.h&gt;</div><div class='hunk'>@@ -22,11 +27,6 @@</div><div class='ctx'> #include &lt;linux/static_call_types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-struct alternative {</div><div class='del'>-	struct alternative *next;</div><div class='del'>-	struct instruction *insn;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static unsigned long nr_cfi, nr_cfi_reused, nr_cfi_cache;</div><div class='ctx'> </div><div class='ctx'> static struct cfi_init_state initial_func_cfi;</div><div class='hunk'>@@ -34,6 +34,10 @@ static struct cfi_state init_cfi;</div><div class='ctx'> static struct cfi_state func_cfi;</div><div class='ctx'> static struct cfi_state force_undefined_cfi;</div><div class='ctx'> </div><div class='add'>+struct disas_context *objtool_disas_ctx;</div><div class='add'>+</div><div class='add'>+size_t sym_name_max_len;</div><div class='add'>+</div><div class='ctx'> struct instruction *find_insn(struct objtool_file *file,</div><div class='ctx'> 			      struct section *sec, unsigned long offset)</div><div class='ctx'> {</div><div class='hunk'>@@ -106,7 +110,7 @@ static struct instruction *prev_insn_same_sym(struct objtool_file *file,</div><div class='ctx'> #define for_each_insn(file, insn)					\</div><div class='ctx'> 	for (struct section *__sec, *__fake = (struct section *)1;	\</div><div class='ctx'> 	     __fake; __fake = NULL)					\</div><div class='del'>-		for_each_sec(file, __sec)				\</div><div class='add'>+		for_each_sec(file-&gt;elf, __sec)				\</div><div class='ctx'> 			sec_for_each_insn(file, __sec, insn)</div><div class='ctx'> </div><div class='ctx'> #define func_for_each_insn(file, func, insn)				\</div><div class='hunk'>@@ -131,15 +135,6 @@ static struct instruction *prev_insn_same_sym(struct objtool_file *file,</div><div class='ctx'> 	for (insn = next_insn_same_sec(file, insn); insn;		\</div><div class='ctx'> 	     insn = next_insn_same_sec(file, insn))</div><div class='ctx'> </div><div class='del'>-static inline struct symbol *insn_call_dest(struct instruction *insn)</div><div class='del'>-{</div><div class='del'>-	if (insn-&gt;type == INSN_JUMP_DYNAMIC ||</div><div class='del'>-	    insn-&gt;type == INSN_CALL_DYNAMIC)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return insn-&gt;_call_dest;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct reloc *insn_jump_table(struct instruction *insn)</div><div class='ctx'> {</div><div class='ctx'> 	if (insn-&gt;type == INSN_JUMP_DYNAMIC ||</div><div class='hunk'>@@ -186,20 +181,6 @@ static bool is_sibling_call(struct instruction *insn)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Checks if a string ends with another.</div><div class='del'>- */</div><div class='del'>-static bool str_ends_with(const char *s, const char *sub)</div><div class='del'>-{</div><div class='del'>-	const int slen = strlen(s);</div><div class='del'>-	const int sublen = strlen(sub);</div><div class='del'>-</div><div class='del'>-	if (sublen &gt; slen)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return !memcmp(s + slen - sublen, sub, sublen);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Checks if a function is a Rust "noreturn" one.</div><div class='ctx'>  */</div><div class='ctx'> static bool is_rust_noreturn(const struct symbol *func)</div><div class='hunk'>@@ -217,6 +198,7 @@ static bool is_rust_noreturn(const struct symbol *func)</div><div class='ctx'> 	 * these come from the Rust standard library).</div><div class='ctx'> 	 */</div><div class='ctx'> 	return str_ends_with(func-&gt;name, "_4core5sliceSp15copy_from_slice17len_mismatch_fail")		||</div><div class='add'>+	       str_ends_with(func-&gt;name, "_4core6option13expect_failed")				||</div><div class='ctx'> 	       str_ends_with(func-&gt;name, "_4core6option13unwrap_failed")				||</div><div class='ctx'> 	       str_ends_with(func-&gt;name, "_4core6result13unwrap_failed")				||</div><div class='ctx'> 	       str_ends_with(func-&gt;name, "_4core9panicking5panic")					||</div><div class='hunk'>@@ -261,7 +243,7 @@ static bool __dead_end_function(struct objtool_file *file, struct symbol *func,</div><div class='ctx'> 	if (!func)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (func-&gt;bind == STB_GLOBAL || func-&gt;bind == STB_WEAK) {</div><div class='add'>+	if (!is_local_sym(func)) {</div><div class='ctx'> 		if (is_rust_noreturn(func))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='hunk'>@@ -270,7 +252,7 @@ static bool __dead_end_function(struct objtool_file *file, struct symbol *func,</div><div class='ctx'> 				return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (func-&gt;bind == STB_WEAK)</div><div class='add'>+	if (is_weak_sym(func))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (!func-&gt;len)</div><div class='hunk'>@@ -430,14 +412,13 @@ static int decode_instructions(struct objtool_file *file)</div><div class='ctx'> 	struct symbol *func;</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	struct instruction *insn;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	for_each_sec(file, sec) {</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='ctx'> 		struct instruction *insns = NULL;</div><div class='ctx'> 		u8 prev_len = 0;</div><div class='ctx'> 		u8 idx = 0;</div><div class='ctx'> </div><div class='del'>-		if (!(sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR))</div><div class='add'>+		if (!is_text_sec(sec))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (strcmp(sec-&gt;name, ".altinstr_replacement") &amp;&amp;</div><div class='hunk'>@@ -460,9 +441,9 @@ static int decode_instructions(struct objtool_file *file)</div><div class='ctx'> 		if (!strcmp(sec-&gt;name, ".init.text") &amp;&amp; !opts.module)</div><div class='ctx'> 			sec-&gt;init = true;</div><div class='ctx'> </div><div class='del'>-		for (offset = 0; offset &lt; sec-&gt;sh.sh_size; offset += insn-&gt;len) {</div><div class='add'>+		for (offset = 0; offset &lt; sec_size(sec); offset += insn-&gt;len) {</div><div class='ctx'> 			if (!insns || idx == INSN_CHUNK_MAX) {</div><div class='del'>-				insns = calloc(sizeof(*insn), INSN_CHUNK_SIZE);</div><div class='add'>+				insns = calloc(INSN_CHUNK_SIZE, sizeof(*insn));</div><div class='ctx'> 				if (!insns) {</div><div class='ctx'> 					ERROR_GLIBC("calloc");</div><div class='ctx'> 					return -1;</div><div class='hunk'>@@ -479,11 +460,8 @@ static int decode_instructions(struct objtool_file *file)</div><div class='ctx'> 			insn-&gt;offset = offset;</div><div class='ctx'> 			insn-&gt;prev_len = prev_len;</div><div class='ctx'> </div><div class='del'>-			ret = arch_decode_instruction(file, sec, offset,</div><div class='del'>-						      sec-&gt;sh.sh_size - offset,</div><div class='del'>-						      insn);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (arch_decode_instruction(file, sec, offset, sec_size(sec) - offset, insn))</div><div class='add'>+				return -1;</div><div class='ctx'> </div><div class='ctx'> 			prev_len = insn-&gt;len;</div><div class='ctx'> </div><div class='hunk'>@@ -500,12 +478,12 @@ static int decode_instructions(struct objtool_file *file)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		sec_for_each_sym(sec, func) {</div><div class='del'>-			if (func-&gt;type != STT_NOTYPE &amp;&amp; func-&gt;type != STT_FUNC)</div><div class='add'>+			if (!is_notype_sym(func) &amp;&amp; !is_func_sym(func))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			if (func-&gt;offset == sec-&gt;sh.sh_size) {</div><div class='add'>+			if (func-&gt;offset == sec_size(sec)) {</div><div class='ctx'> 				/* Heuristic: likely an "end" symbol */</div><div class='del'>-				if (func-&gt;type == STT_NOTYPE)</div><div class='add'>+				if (is_notype_sym(func))</div><div class='ctx'> 					continue;</div><div class='ctx'> 				ERROR("%s(): STT_FUNC at end of section", func-&gt;name);</div><div class='ctx'> 				return -1;</div><div class='hunk'>@@ -521,7 +499,7 @@ static int decode_instructions(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 			sym_for_each_insn(file, func, insn) {</div><div class='ctx'> 				insn-&gt;sym = func;</div><div class='del'>-				if (func-&gt;type == STT_FUNC &amp;&amp;</div><div class='add'>+				if (is_func_sym(func) &amp;&amp;</div><div class='ctx'> 				    insn-&gt;type == INSN_ENDBR &amp;&amp;</div><div class='ctx'> 				    list_empty(&amp;insn-&gt;call_node)) {</div><div class='ctx'> 					if (insn-&gt;offset == func-&gt;offset) {</div><div class='hunk'>@@ -565,7 +543,7 @@ static int add_pv_ops(struct objtool_file *file, const char *symname)</div><div class='ctx'> 		idx = (reloc_offset(reloc) - sym-&gt;offset) / sizeof(unsigned long);</div><div class='ctx'> </div><div class='ctx'> 		func = reloc-&gt;sym;</div><div class='del'>-		if (func-&gt;type == STT_SECTION)</div><div class='add'>+		if (is_sec_sym(func))</div><div class='ctx'> 			func = find_symbol_by_offset(reloc-&gt;sym-&gt;sec,</div><div class='ctx'> 						     reloc_addend(reloc));</div><div class='ctx'> 		if (!func) {</div><div class='hunk'>@@ -599,7 +577,7 @@ static int init_pv_ops(struct objtool_file *file)</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *pv_ops;</div><div class='ctx'> 	struct symbol *sym;</div><div class='del'>-	int idx, nr, ret;</div><div class='add'>+	int idx, nr;</div><div class='ctx'> </div><div class='ctx'> 	if (!opts.noinstr)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -611,7 +589,7 @@ static int init_pv_ops(struct objtool_file *file)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	nr = sym-&gt;len / sizeof(unsigned long);</div><div class='del'>-	file-&gt;pv_ops = calloc(sizeof(struct pv_state), nr);</div><div class='add'>+	file-&gt;pv_ops = calloc(nr, sizeof(struct pv_state));</div><div class='ctx'> 	if (!file-&gt;pv_ops) {</div><div class='ctx'> 		ERROR_GLIBC("calloc");</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -621,14 +599,27 @@ static int init_pv_ops(struct objtool_file *file)</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;file-&gt;pv_ops[idx].targets);</div><div class='ctx'> </div><div class='ctx'> 	for (idx = 0; (pv_ops = pv_ops_tables[idx]); idx++) {</div><div class='del'>-		ret = add_pv_ops(file, pv_ops);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		if (add_pv_ops(file, pv_ops))</div><div class='add'>+			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_livepatch_module(struct objtool_file *file)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+</div><div class='add'>+	if (!opts.module)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	sec = find_section_by_name(file-&gt;elf, ".modinfo");</div><div class='add'>+	if (!sec)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return memmem(sec-&gt;data-&gt;d_buf, sec_size(sec), "\0livepatch=Y", 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int create_static_call_sections(struct objtool_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct static_call_site *site;</div><div class='hunk'>@@ -640,8 +631,14 @@ static int create_static_call_sections(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 	sec = find_section_by_name(file-&gt;elf, ".static_call_sites");</div><div class='ctx'> 	if (sec) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;file-&gt;static_call_list);</div><div class='del'>-		WARN("file already has .static_call_sites section, skipping");</div><div class='add'>+		/*</div><div class='add'>+		 * Livepatch modules may have already extracted the static call</div><div class='add'>+		 * site entries to take advantage of vmlinux static call</div><div class='add'>+		 * privileges.</div><div class='add'>+		 */</div><div class='add'>+		if (!file-&gt;klp)</div><div class='add'>+			WARN("file already has .static_call_sites section, skipping");</div><div class='add'>+</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -685,7 +682,7 @@ static int create_static_call_sections(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 		key_sym = find_symbol_by_name(file-&gt;elf, tmp);</div><div class='ctx'> 		if (!key_sym) {</div><div class='del'>-			if (!opts.module) {</div><div class='add'>+			if (!opts.module || file-&gt;klp) {</div><div class='ctx'> 				ERROR("static_call: can't find static_call_key symbol: %s", tmp);</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -828,7 +825,7 @@ static int create_ibt_endbr_seal_sections(struct objtool_file *file)</div><div class='ctx'> 		struct symbol *sym = insn-&gt;sym;</div><div class='ctx'> 		*site = 0;</div><div class='ctx'> </div><div class='del'>-		if (opts.module &amp;&amp; sym &amp;&amp; sym-&gt;type == STT_FUNC &amp;&amp;</div><div class='add'>+		if (opts.module &amp;&amp; sym &amp;&amp; is_func_sym(sym) &amp;&amp;</div><div class='ctx'> 		    insn-&gt;offset == sym-&gt;offset &amp;&amp;</div><div class='ctx'> 		    (!strcmp(sym-&gt;name, "init_module") ||</div><div class='ctx'> 		     !strcmp(sym-&gt;name, "cleanup_module"))) {</div><div class='hunk'>@@ -856,14 +853,13 @@ static int create_cfi_sections(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 	sec = find_section_by_name(file-&gt;elf, ".cfi_sites");</div><div class='ctx'> 	if (sec) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;file-&gt;call_list);</div><div class='ctx'> 		WARN("file already has .cfi_sites section, skipping");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idx = 0;</div><div class='del'>-	for_each_sym(file, sym) {</div><div class='del'>-		if (sym-&gt;type != STT_FUNC)</div><div class='add'>+	for_each_sym(file-&gt;elf, sym) {</div><div class='add'>+		if (!is_func_sym(sym))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (strncmp(sym-&gt;name, "__cfi_", 6))</div><div class='hunk'>@@ -878,8 +874,8 @@ static int create_cfi_sections(struct objtool_file *file)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	idx = 0;</div><div class='del'>-	for_each_sym(file, sym) {</div><div class='del'>-		if (sym-&gt;type != STT_FUNC)</div><div class='add'>+	for_each_sym(file-&gt;elf, sym) {</div><div class='add'>+		if (!is_func_sym(sym))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (strncmp(sym-&gt;name, "__cfi_", 6))</div><div class='hunk'>@@ -905,8 +901,13 @@ static int create_mcount_loc_sections(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 	sec = find_section_by_name(file-&gt;elf, "__mcount_loc");</div><div class='ctx'> 	if (sec) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;file-&gt;mcount_loc_list);</div><div class='del'>-		WARN("file already has __mcount_loc section, skipping");</div><div class='add'>+		/*</div><div class='add'>+		 * Livepatch modules have already extracted their __mcount_loc</div><div class='add'>+		 * entries to cover the !CONFIG_FTRACE_MCOUNT_USE_OBJTOOL case.</div><div class='add'>+		 */</div><div class='add'>+		if (!file-&gt;klp)</div><div class='add'>+			WARN("file already has __mcount_loc section, skipping");</div><div class='add'>+</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -950,7 +951,6 @@ static int create_direct_call_sections(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 	sec = find_section_by_name(file-&gt;elf, ".call_sites");</div><div class='ctx'> 	if (sec) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;file-&gt;call_list);</div><div class='ctx'> 		WARN("file already has .call_sites section, skipping");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -981,6 +981,59 @@ static int create_direct_call_sections(struct objtool_file *file)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef BUILD_KLP</div><div class='add'>+static int create_sym_checksum_section(struct objtool_file *file)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+	unsigned int idx = 0;</div><div class='add'>+	struct sym_checksum *checksum;</div><div class='add'>+	size_t entsize = sizeof(struct sym_checksum);</div><div class='add'>+</div><div class='add'>+	sec = find_section_by_name(file-&gt;elf, ".discard.sym_checksum");</div><div class='add'>+	if (sec) {</div><div class='add'>+		if (!opts.dryrun)</div><div class='add'>+			WARN("file already has .discard.sym_checksum section, skipping");</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_sym(file-&gt;elf, sym)</div><div class='add'>+		if (sym-&gt;csum.checksum)</div><div class='add'>+			idx++;</div><div class='add'>+</div><div class='add'>+	if (!idx)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sec = elf_create_section_pair(file-&gt;elf, ".discard.sym_checksum", entsize,</div><div class='add'>+				      idx, idx);</div><div class='add'>+	if (!sec)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	idx = 0;</div><div class='add'>+	for_each_sym(file-&gt;elf, sym) {</div><div class='add'>+		if (!sym-&gt;csum.checksum)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!elf_init_reloc(file-&gt;elf, sec-&gt;rsec, idx, idx * entsize,</div><div class='add'>+				    sym, 0, R_TEXT64))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		checksum = (struct sym_checksum *)sec-&gt;data-&gt;d_buf + idx;</div><div class='add'>+		checksum-&gt;addr = 0; /* reloc */</div><div class='add'>+		checksum-&gt;checksum = sym-&gt;csum.checksum;</div><div class='add'>+</div><div class='add'>+		mark_sec_changed(file-&gt;elf, sec, true);</div><div class='add'>+</div><div class='add'>+		idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int create_sym_checksum_section(struct objtool_file *file) { return -EINVAL; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Warnings shouldn't be reported for ignored functions.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1432,9 +1485,14 @@ static void add_return_call(struct objtool_file *file, struct instruction *insn,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_first_func_insn(struct objtool_file *file,</div><div class='del'>-			       struct instruction *insn, struct symbol *sym)</div><div class='add'>+			       struct instruction *insn)</div><div class='ctx'> {</div><div class='del'>-	if (insn-&gt;offset == sym-&gt;offset)</div><div class='add'>+	struct symbol *func = insn_func(insn);</div><div class='add'>+</div><div class='add'>+	if (!func)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;offset == func-&gt;offset)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* Allow direct CALL/JMP past ENDBR */</div><div class='hunk'>@@ -1442,7 +1500,7 @@ static bool is_first_func_insn(struct objtool_file *file,</div><div class='ctx'> 		struct instruction *prev = prev_insn_same_sym(file, insn);</div><div class='ctx'> </div><div class='ctx'> 		if (prev &amp;&amp; prev-&gt;type == INSN_ENDBR &amp;&amp;</div><div class='del'>-		    insn-&gt;offset == sym-&gt;offset + prev-&gt;len)</div><div class='add'>+		    insn-&gt;offset == func-&gt;offset + prev-&gt;len)</div><div class='ctx'> 			return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1450,44 +1508,22 @@ static bool is_first_func_insn(struct objtool_file *file,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * A sibling call is a tail-call to another symbol -- to differentiate from a</div><div class='del'>- * recursive tail-call which is to the same symbol.</div><div class='del'>- */</div><div class='del'>-static bool jump_is_sibling_call(struct objtool_file *file,</div><div class='del'>-				 struct instruction *from, struct instruction *to)</div><div class='del'>-{</div><div class='del'>-	struct symbol *fs = from-&gt;sym;</div><div class='del'>-	struct symbol *ts = to-&gt;sym;</div><div class='del'>-</div><div class='del'>-	/* Not a sibling call if from/to a symbol hole */</div><div class='del'>-	if (!fs || !ts)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* Not a sibling call if not targeting the start of a symbol. */</div><div class='del'>-	if (!is_first_func_insn(file, to, ts))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* Disallow sibling calls into STT_NOTYPE */</div><div class='del'>-	if (ts-&gt;type == STT_NOTYPE)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* Must not be self to be a sibling */</div><div class='del'>-	return fs-&gt;pfunc != ts-&gt;pfunc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Find the destination instructions for all jumps.</div><div class='ctx'>  */</div><div class='ctx'> static int add_jump_destinations(struct objtool_file *file)</div><div class='ctx'> {</div><div class='del'>-	struct instruction *insn, *jump_dest;</div><div class='add'>+	struct instruction *insn;</div><div class='ctx'> 	struct reloc *reloc;</div><div class='del'>-	struct section *dest_sec;</div><div class='del'>-	unsigned long dest_off;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	for_each_insn(file, insn) {</div><div class='ctx'> 		struct symbol *func = insn_func(insn);</div><div class='add'>+		struct instruction *dest_insn;</div><div class='add'>+		struct section *dest_sec;</div><div class='add'>+		struct symbol *dest_sym;</div><div class='add'>+		unsigned long dest_off;</div><div class='add'>+</div><div class='add'>+		if (!is_static_jump(insn))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (insn-&gt;jump_dest) {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1496,53 +1532,53 @@ static int add_jump_destinations(struct objtool_file *file)</div><div class='ctx'> 			 */</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (!is_static_jump(insn))</div><div class='del'>-			continue;</div><div class='ctx'> </div><div class='ctx'> 		reloc = insn_reloc(file, insn);</div><div class='ctx'> 		if (!reloc) {</div><div class='ctx'> 			dest_sec = insn-&gt;sec;</div><div class='ctx'> 			dest_off = arch_jump_destination(insn);</div><div class='del'>-		} else if (reloc-&gt;sym-&gt;type == STT_SECTION) {</div><div class='del'>-			dest_sec = reloc-&gt;sym-&gt;sec;</div><div class='del'>-			dest_off = arch_dest_reloc_offset(reloc_addend(reloc));</div><div class='del'>-		} else if (reloc-&gt;sym-&gt;retpoline_thunk) {</div><div class='del'>-			ret = add_retpoline_call(file, insn);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-			continue;</div><div class='del'>-		} else if (reloc-&gt;sym-&gt;return_thunk) {</div><div class='del'>-			add_return_call(file, insn, true);</div><div class='del'>-			continue;</div><div class='del'>-		} else if (func) {</div><div class='del'>-			/*</div><div class='del'>-			 * External sibling call or internal sibling call with</div><div class='del'>-			 * STT_FUNC reloc.</div><div class='del'>-			 */</div><div class='del'>-			ret = add_call_dest(file, insn, reloc-&gt;sym, true);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-			continue;</div><div class='del'>-		} else if (reloc-&gt;sym-&gt;sec-&gt;idx) {</div><div class='del'>-			dest_sec = reloc-&gt;sym-&gt;sec;</div><div class='del'>-			dest_off = reloc-&gt;sym-&gt;sym.st_value +</div><div class='del'>-				   arch_dest_reloc_offset(reloc_addend(reloc));</div><div class='add'>+			dest_sym = dest_sec-&gt;sym;</div><div class='ctx'> 		} else {</div><div class='del'>-			/* non-func asm code jumping to another file */</div><div class='del'>-			continue;</div><div class='add'>+			dest_sym = reloc-&gt;sym;</div><div class='add'>+			if (is_undef_sym(dest_sym)) {</div><div class='add'>+				if (dest_sym-&gt;retpoline_thunk) {</div><div class='add'>+					if (add_retpoline_call(file, insn))</div><div class='add'>+						return -1;</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				if (dest_sym-&gt;return_thunk) {</div><div class='add'>+					add_return_call(file, insn, true);</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				/* External symbol */</div><div class='add'>+				if (func) {</div><div class='add'>+					/* External sibling call */</div><div class='add'>+					if (add_call_dest(file, insn, dest_sym, true))</div><div class='add'>+						return -1;</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				/* Non-func asm code jumping to external symbol */</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			dest_sec = dest_sym-&gt;sec;</div><div class='add'>+			dest_off = dest_sym-&gt;offset + arch_insn_adjusted_addend(insn, reloc);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		jump_dest = find_insn(file, dest_sec, dest_off);</div><div class='del'>-		if (!jump_dest) {</div><div class='add'>+		dest_insn = find_insn(file, dest_sec, dest_off);</div><div class='add'>+		if (!dest_insn) {</div><div class='ctx'> 			struct symbol *sym = find_symbol_by_offset(dest_sec, dest_off);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * This is a special case for retbleed_untrain_ret().</div><div class='del'>-			 * It jumps to __x86_return_thunk(), but objtool</div><div class='del'>-			 * can't find the thunk's starting RET</div><div class='del'>-			 * instruction, because the RET is also in the</div><div class='del'>-			 * middle of another instruction.  Objtool only</div><div class='del'>-			 * knows about the outer instruction.</div><div class='add'>+			 * retbleed_untrain_ret() jumps to</div><div class='add'>+			 * __x86_return_thunk(), but objtool can't find</div><div class='add'>+			 * the thunk's starting RET instruction,</div><div class='add'>+			 * because the RET is also in the middle of</div><div class='add'>+			 * another instruction.  Objtool only knows</div><div class='add'>+			 * about the outer instruction.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (sym &amp;&amp; sym-&gt;embedded_insn) {</div><div class='ctx'> 				add_return_call(file, insn, false);</div><div class='hunk'>@@ -1550,76 +1586,52 @@ static int add_jump_destinations(struct objtool_file *file)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * GCOV/KCOV dead code can jump to the end of the</div><div class='del'>-			 * function/section.</div><div class='add'>+			 * GCOV/KCOV dead code can jump to the end of</div><div class='add'>+			 * the function/section.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (file-&gt;ignore_unreachables &amp;&amp; func &amp;&amp;</div><div class='ctx'> 			    dest_sec == insn-&gt;sec &amp;&amp;</div><div class='ctx'> 			    dest_off == func-&gt;offset + func-&gt;len)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			ERROR_INSN(insn, "can't find jump dest instruction at %s+0x%lx",</div><div class='del'>-				   dest_sec-&gt;name, dest_off);</div><div class='add'>+			ERROR_INSN(insn, "can't find jump dest instruction at %s",</div><div class='add'>+				   offstr(dest_sec, dest_off));</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * An intra-TU jump in retpoline.o might not have a relocation</div><div class='del'>-		 * for its jump dest, in which case the above</div><div class='del'>-		 * add_{retpoline,return}_call() didn't happen.</div><div class='del'>-		 */</div><div class='del'>-		if (jump_dest-&gt;sym &amp;&amp; jump_dest-&gt;offset == jump_dest-&gt;sym-&gt;offset) {</div><div class='del'>-			if (jump_dest-&gt;sym-&gt;retpoline_thunk) {</div><div class='del'>-				ret = add_retpoline_call(file, insn);</div><div class='del'>-				if (ret)</div><div class='del'>-					return ret;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-			if (jump_dest-&gt;sym-&gt;return_thunk) {</div><div class='del'>-				add_return_call(file, insn, true);</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='add'>+		if (!dest_sym || is_sec_sym(dest_sym)) {</div><div class='add'>+			dest_sym = dest_insn-&gt;sym;</div><div class='add'>+			if (!dest_sym)</div><div class='add'>+				goto set_jump_dest;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Cross-function jump.</div><div class='del'>-		 */</div><div class='del'>-		if (func &amp;&amp; insn_func(jump_dest) &amp;&amp; func != insn_func(jump_dest)) {</div><div class='add'>+		if (dest_sym-&gt;retpoline_thunk &amp;&amp; dest_insn-&gt;offset == dest_sym-&gt;offset) {</div><div class='add'>+			if (add_retpoline_call(file, insn))</div><div class='add'>+				return -1;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			/*</div><div class='del'>-			 * For GCC 8+, create parent/child links for any cold</div><div class='del'>-			 * subfunctions.  This is _mostly_ redundant with a</div><div class='del'>-			 * similar initialization in read_symbols().</div><div class='del'>-			 *</div><div class='del'>-			 * If a function has aliases, we want the *first* such</div><div class='del'>-			 * function in the symbol table to be the subfunction's</div><div class='del'>-			 * parent.  In that case we overwrite the</div><div class='del'>-			 * initialization done in read_symbols().</div><div class='del'>-			 *</div><div class='del'>-			 * However this code can't completely replace the</div><div class='del'>-			 * read_symbols() code because this doesn't detect the</div><div class='del'>-			 * case where the parent function's only reference to a</div><div class='del'>-			 * subfunction is through a jump table.</div><div class='del'>-			 */</div><div class='del'>-			if (!strstr(func-&gt;name, ".cold") &amp;&amp;</div><div class='del'>-			    strstr(insn_func(jump_dest)-&gt;name, ".cold")) {</div><div class='del'>-				func-&gt;cfunc = insn_func(jump_dest);</div><div class='del'>-				insn_func(jump_dest)-&gt;pfunc = func;</div><div class='del'>-			}</div><div class='add'>+		if (dest_sym-&gt;return_thunk &amp;&amp; dest_insn-&gt;offset == dest_sym-&gt;offset) {</div><div class='add'>+			add_return_call(file, insn, true);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (jump_is_sibling_call(file, insn, jump_dest)) {</div><div class='del'>-			/*</div><div class='del'>-			 * Internal sibling call without reloc or with</div><div class='del'>-			 * STT_SECTION reloc.</div><div class='del'>-			 */</div><div class='del'>-			ret = add_call_dest(file, insn, insn_func(jump_dest), true);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+		if (!insn-&gt;sym || insn-&gt;sym-&gt;pfunc == dest_sym-&gt;pfunc)</div><div class='add'>+			goto set_jump_dest;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Internal cross-function jump.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		if (is_first_func_insn(file, dest_insn)) {</div><div class='add'>+			/* Internal sibling call */</div><div class='add'>+			if (add_call_dest(file, insn, dest_sym, true))</div><div class='add'>+				return -1;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		insn-&gt;jump_dest = jump_dest;</div><div class='add'>+set_jump_dest:</div><div class='add'>+		insn-&gt;jump_dest = dest_insn;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1645,7 +1657,6 @@ static int add_call_destinations(struct objtool_file *file)</div><div class='ctx'> 	unsigned long dest_off;</div><div class='ctx'> 	struct symbol *dest;</div><div class='ctx'> 	struct reloc *reloc;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	for_each_insn(file, insn) {</div><div class='ctx'> 		struct symbol *func = insn_func(insn);</div><div class='hunk'>@@ -1657,9 +1668,8 @@ static int add_call_destinations(struct objtool_file *file)</div><div class='ctx'> 			dest_off = arch_jump_destination(insn);</div><div class='ctx'> 			dest = find_call_destination(insn-&gt;sec, dest_off);</div><div class='ctx'> </div><div class='del'>-			ret = add_call_dest(file, insn, dest, false);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (add_call_dest(file, insn, dest, false))</div><div class='add'>+				return -1;</div><div class='ctx'> </div><div class='ctx'> 			if (func &amp;&amp; func-&gt;ignore)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -1669,13 +1679,13 @@ static int add_call_destinations(struct objtool_file *file)</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (func &amp;&amp; insn_call_dest(insn)-&gt;type != STT_FUNC) {</div><div class='add'>+			if (func &amp;&amp; !is_func_sym(insn_call_dest(insn))) {</div><div class='ctx'> 				ERROR_INSN(insn, "unsupported call to non-function");</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-		} else if (reloc-&gt;sym-&gt;type == STT_SECTION) {</div><div class='del'>-			dest_off = arch_dest_reloc_offset(reloc_addend(reloc));</div><div class='add'>+		} else if (is_sec_sym(reloc-&gt;sym)) {</div><div class='add'>+			dest_off = arch_insn_adjusted_addend(insn, reloc);</div><div class='ctx'> 			dest = find_call_destination(reloc-&gt;sym-&gt;sec, dest_off);</div><div class='ctx'> 			if (!dest) {</div><div class='ctx'> 				ERROR_INSN(insn, "can't find call dest symbol at %s+0x%lx",</div><div class='hunk'>@@ -1683,19 +1693,16 @@ static int add_call_destinations(struct objtool_file *file)</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			ret = add_call_dest(file, insn, dest, false);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (add_call_dest(file, insn, dest, false))</div><div class='add'>+				return -1;</div><div class='ctx'> </div><div class='ctx'> 		} else if (reloc-&gt;sym-&gt;retpoline_thunk) {</div><div class='del'>-			ret = add_retpoline_call(file, insn);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (add_retpoline_call(file, insn))</div><div class='add'>+				return -1;</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='del'>-			ret = add_call_dest(file, insn, reloc-&gt;sym, false);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (add_call_dest(file, insn, reloc-&gt;sym, false))</div><div class='add'>+				return -1;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1744,6 +1751,7 @@ static int handle_group_alt(struct objtool_file *file,</div><div class='ctx'> 		orig_alt_group-&gt;last_insn = last_orig_insn;</div><div class='ctx'> 		orig_alt_group-&gt;nop = NULL;</div><div class='ctx'> 		orig_alt_group-&gt;ignore = orig_insn-&gt;ignore_alts;</div><div class='add'>+		orig_alt_group-&gt;feature = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (orig_alt_group-&gt;last_insn-&gt;offset + orig_alt_group-&gt;last_insn-&gt;len -</div><div class='ctx'> 		    orig_alt_group-&gt;first_insn-&gt;offset != special_alt-&gt;orig_len) {</div><div class='hunk'>@@ -1783,6 +1791,7 @@ static int handle_group_alt(struct objtool_file *file,</div><div class='ctx'> 		nop-&gt;type = INSN_NOP;</div><div class='ctx'> 		nop-&gt;sym = orig_insn-&gt;sym;</div><div class='ctx'> 		nop-&gt;alt_group = new_alt_group;</div><div class='add'>+		nop-&gt;fake = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!special_alt-&gt;new_len) {</div><div class='hunk'>@@ -1847,6 +1856,7 @@ end:</div><div class='ctx'> 	new_alt_group-&gt;nop = nop;</div><div class='ctx'> 	new_alt_group-&gt;ignore = (*new_insn)-&gt;ignore_alts;</div><div class='ctx'> 	new_alt_group-&gt;cfi = orig_alt_group-&gt;cfi;</div><div class='add'>+	new_alt_group-&gt;feature = special_alt-&gt;feature;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1911,8 +1921,9 @@ static int add_special_section_alts(struct objtool_file *file)</div><div class='ctx'> 	struct list_head special_alts;</div><div class='ctx'> 	struct instruction *orig_insn, *new_insn;</div><div class='ctx'> 	struct special_alt *special_alt, *tmp;</div><div class='add'>+	enum alternative_type alt_type;</div><div class='ctx'> 	struct alternative *alt;</div><div class='del'>-	int ret;</div><div class='add'>+	struct alternative *a;</div><div class='ctx'> </div><div class='ctx'> 	if (special_get_alts(file-&gt;elf, &amp;special_alts))</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1944,16 +1955,18 @@ static int add_special_section_alts(struct objtool_file *file)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			ret = handle_group_alt(file, special_alt, orig_insn,</div><div class='del'>-					       &amp;new_insn);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (handle_group_alt(file, special_alt, orig_insn, &amp;new_insn))</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			alt_type = ALT_TYPE_INSTRUCTIONS;</div><div class='ctx'> </div><div class='ctx'> 		} else if (special_alt-&gt;jump_or_nop) {</div><div class='del'>-			ret = handle_jump_alt(file, special_alt, orig_insn,</div><div class='del'>-					      &amp;new_insn);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (handle_jump_alt(file, special_alt, orig_insn, &amp;new_insn))</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			alt_type = ALT_TYPE_JUMP_TABLE;</div><div class='add'>+		} else {</div><div class='add'>+			alt_type = ALT_TYPE_EX_TABLE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		alt = calloc(1, sizeof(*alt));</div><div class='hunk'>@@ -1963,8 +1976,20 @@ static int add_special_section_alts(struct objtool_file *file)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		alt-&gt;insn = new_insn;</div><div class='del'>-		alt-&gt;next = orig_insn-&gt;alts;</div><div class='del'>-		orig_insn-&gt;alts = alt;</div><div class='add'>+		alt-&gt;type = alt_type;</div><div class='add'>+		alt-&gt;next = NULL;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Store alternatives in the same order they have been</div><div class='add'>+		 * defined.</div><div class='add'>+		 */</div><div class='add'>+		if (!orig_insn-&gt;alts) {</div><div class='add'>+			orig_insn-&gt;alts = alt;</div><div class='add'>+		} else {</div><div class='add'>+			for (a = orig_insn-&gt;alts; a-&gt;next; a = a-&gt;next)</div><div class='add'>+				;</div><div class='add'>+			a-&gt;next = alt;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		list_del(&amp;special_alt-&gt;list);</div><div class='ctx'> 		free(special_alt);</div><div class='hunk'>@@ -2141,15 +2166,13 @@ static int add_func_jump_tables(struct objtool_file *file,</div><div class='ctx'> 				  struct symbol *func)</div><div class='ctx'> {</div><div class='ctx'> 	struct instruction *insn;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	func_for_each_insn(file, func, insn) {</div><div class='ctx'> 		if (!insn_jump_table(insn))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ret = add_jump_table(file, insn);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		if (add_jump_table(file, insn))</div><div class='add'>+			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2163,19 +2186,17 @@ static int add_func_jump_tables(struct objtool_file *file,</div><div class='ctx'> static int add_jump_table_alts(struct objtool_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *func;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!file-&gt;rodata)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	for_each_sym(file, func) {</div><div class='del'>-		if (func-&gt;type != STT_FUNC)</div><div class='add'>+	for_each_sym(file-&gt;elf, func) {</div><div class='add'>+		if (!is_func_sym(func) || func-&gt;alias != func)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		mark_func_jump_tables(file, func);</div><div class='del'>-		ret = add_func_jump_tables(file, func);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		if (add_func_jump_tables(file, func))</div><div class='add'>+			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2209,14 +2230,14 @@ static int read_unwind_hints(struct objtool_file *file)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (sec-&gt;sh.sh_size % sizeof(struct unwind_hint)) {</div><div class='add'>+	if (sec_size(sec) % sizeof(struct unwind_hint)) {</div><div class='ctx'> 		ERROR("struct unwind_hint size mismatch");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	file-&gt;hints = true;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; sec-&gt;sh.sh_size / sizeof(struct unwind_hint); i++) {</div><div class='add'>+	for (i = 0; i &lt; sec_size(sec) / sizeof(struct unwind_hint); i++) {</div><div class='ctx'> 		hint = (struct unwind_hint *)sec-&gt;data-&gt;d_buf + i;</div><div class='ctx'> </div><div class='ctx'> 		reloc = find_reloc_by_dest(file-&gt;elf, sec, i * sizeof(*hint));</div><div class='hunk'>@@ -2225,14 +2246,7 @@ static int read_unwind_hints(struct objtool_file *file)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (reloc-&gt;sym-&gt;type == STT_SECTION) {</div><div class='del'>-			offset = reloc_addend(reloc);</div><div class='del'>-		} else if (reloc-&gt;sym-&gt;local_label) {</div><div class='del'>-			offset = reloc-&gt;sym-&gt;offset;</div><div class='del'>-		} else {</div><div class='del'>-			ERROR("unexpected relocation symbol type in %s", sec-&gt;rsec-&gt;name);</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='add'>+		offset = reloc-&gt;sym-&gt;offset + reloc_addend(reloc);</div><div class='ctx'> </div><div class='ctx'> 		insn = find_insn(file, reloc-&gt;sym-&gt;sec, offset);</div><div class='ctx'> 		if (!insn) {</div><div class='hunk'>@@ -2261,7 +2275,7 @@ static int read_unwind_hints(struct objtool_file *file)</div><div class='ctx'> 		if (hint-&gt;type == UNWIND_HINT_TYPE_REGS_PARTIAL) {</div><div class='ctx'> 			struct symbol *sym = find_symbol_by_offset(insn-&gt;sec, insn-&gt;offset);</div><div class='ctx'> </div><div class='del'>-			if (sym &amp;&amp; sym-&gt;bind == STB_GLOBAL) {</div><div class='add'>+			if (sym &amp;&amp; is_global_sym(sym)) {</div><div class='ctx'> 				if (opts.ibt &amp;&amp; insn-&gt;type != INSN_ENDBR &amp;&amp; !insn-&gt;noendbr) {</div><div class='ctx'> 					ERROR_INSN(insn, "UNWIND_HINT_IRET_REGS without ENDBR");</div><div class='ctx'> 					return -1;</div><div class='hunk'>@@ -2299,7 +2313,7 @@ static int read_annotate(struct objtool_file *file,</div><div class='ctx'> 	struct instruction *insn;</div><div class='ctx'> 	struct reloc *reloc;</div><div class='ctx'> 	uint64_t offset;</div><div class='del'>-	int type, ret;</div><div class='add'>+	int type;</div><div class='ctx'> </div><div class='ctx'> 	sec = find_section_by_name(file-&gt;elf, ".discard.annotate_insn");</div><div class='ctx'> 	if (!sec)</div><div class='hunk'>@@ -2317,10 +2331,13 @@ static int read_annotate(struct objtool_file *file,</div><div class='ctx'> 		sec-&gt;sh.sh_entsize = 8;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_reloc(sec-&gt;rsec, reloc) {</div><div class='del'>-		type = *(u32 *)(sec-&gt;data-&gt;d_buf + (reloc_idx(reloc) * sec-&gt;sh.sh_entsize) + 4);</div><div class='del'>-		type = bswap_if_needed(file-&gt;elf, type);</div><div class='add'>+	if (sec_num_entries(sec) != sec_num_entries(sec-&gt;rsec)) {</div><div class='add'>+		ERROR("bad .discard.annotate_insn section: missing relocs");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	for_each_reloc(sec-&gt;rsec, reloc) {</div><div class='add'>+		type = annotype(file-&gt;elf, sec, reloc);</div><div class='ctx'> 		offset = reloc-&gt;sym-&gt;offset + reloc_addend(reloc);</div><div class='ctx'> 		insn = find_insn(file, reloc-&gt;sym-&gt;sec, offset);</div><div class='ctx'> </div><div class='hunk'>@@ -2329,9 +2346,8 @@ static int read_annotate(struct objtool_file *file,</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = func(file, type, insn);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='add'>+		if (func(file, type, insn))</div><div class='add'>+			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2392,6 +2408,8 @@ static int __annotate_ifc(struct objtool_file *file, int type, struct instructio</div><div class='ctx'> </div><div class='ctx'> static int __annotate_late(struct objtool_file *file, int type, struct instruction *insn)</div><div class='ctx'> {</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case ANNOTYPE_NOENDBR:</div><div class='ctx'> 		/* early */</div><div class='hunk'>@@ -2433,6 +2451,15 @@ static int __annotate_late(struct objtool_file *file, int type, struct instructi</div><div class='ctx'> 		insn-&gt;dead_end = false;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case ANNOTYPE_NOCFI:</div><div class='add'>+		sym = insn-&gt;sym;</div><div class='add'>+		if (!sym) {</div><div class='add'>+			ERROR_INSN(insn, "dodgy NOCFI annotation");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		insn-&gt;sym-&gt;nocfi = 1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		ERROR_INSN(insn, "Unknown annotation type: %d", type);</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -2453,28 +2480,19 @@ static bool is_profiling_func(const char *name)</div><div class='ctx'> 	if (!strncmp(name, "__sanitizer_cov_", 16))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Some compilers currently do not remove __tsan_func_entry/exit nor</div><div class='del'>-	 * __tsan_atomic_signal_fence (used for barrier instrumentation) with</div><div class='del'>-	 * the __no_sanitize_thread attribute, remove them. Once the kernel's</div><div class='del'>-	 * minimum Clang version is 14.0, this can be removed.</div><div class='del'>-	 */</div><div class='del'>-	if (!strncmp(name, "__tsan_func_", 12) ||</div><div class='del'>-	    !strcmp(name, "__tsan_atomic_signal_fence"))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int classify_symbols(struct objtool_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *func;</div><div class='add'>+	size_t len;</div><div class='ctx'> </div><div class='del'>-	for_each_sym(file, func) {</div><div class='del'>-		if (func-&gt;type == STT_NOTYPE &amp;&amp; strstarts(func-&gt;name, ".L"))</div><div class='add'>+	for_each_sym(file-&gt;elf, func) {</div><div class='add'>+		if (is_notype_sym(func) &amp;&amp; strstarts(func-&gt;name, ".L"))</div><div class='ctx'> 			func-&gt;local_label = true;</div><div class='ctx'> </div><div class='del'>-		if (func-&gt;bind != STB_GLOBAL)</div><div class='add'>+		if (!is_global_sym(func))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (!strncmp(func-&gt;name, STATIC_CALL_TRAMP_PREFIX_STR,</div><div class='hunk'>@@ -2495,6 +2513,10 @@ static int classify_symbols(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 		if (is_profiling_func(func-&gt;name))</div><div class='ctx'> 			func-&gt;profiling_func = true;</div><div class='add'>+</div><div class='add'>+		len = strlen(func-&gt;name);</div><div class='add'>+		if (len &gt; sym_name_max_len)</div><div class='add'>+			sym_name_max_len = len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2515,7 +2537,7 @@ static void mark_rodata(struct objtool_file *file)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * .rodata.str1.* sections are ignored; they don't contain jump tables.</div><div class='ctx'> 	 */</div><div class='del'>-	for_each_sec(file, sec) {</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='ctx'> 		if ((!strncmp(sec-&gt;name, ".rodata", 7) &amp;&amp;</div><div class='ctx'> 		     !strstr(sec-&gt;name, ".str1.")) ||</div><div class='ctx'> 		    !strncmp(sec-&gt;name, ".data.rel.ro", 12)) {</div><div class='hunk'>@@ -2527,78 +2549,115 @@ static void mark_rodata(struct objtool_file *file)</div><div class='ctx'> 	file-&gt;rodata = found;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mark_holes(struct objtool_file *file)</div><div class='add'>+{</div><div class='add'>+	struct instruction *insn;</div><div class='add'>+	bool in_hole = false;</div><div class='add'>+</div><div class='add'>+	if (!opts.link)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Whole archive runs might encounter dead code from weak symbols.</div><div class='add'>+	 * This is where the linker will have dropped the weak symbol in</div><div class='add'>+	 * favour of a regular symbol, but leaves the code in place.</div><div class='add'>+	 */</div><div class='add'>+	for_each_insn(file, insn) {</div><div class='add'>+		if (insn-&gt;sym || !find_symbol_hole_containing(insn-&gt;sec, insn-&gt;offset)) {</div><div class='add'>+			in_hole = false;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Skip function padding and pfx code */</div><div class='add'>+		if (!in_hole &amp;&amp; insn-&gt;type == INSN_NOP)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		in_hole = true;</div><div class='add'>+		insn-&gt;hole = 1;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If this hole jumps to a .cold function, mark it ignore.</div><div class='add'>+		 */</div><div class='add'>+		if (insn-&gt;jump_dest) {</div><div class='add'>+			struct symbol *dest_func = insn_func(insn-&gt;jump_dest);</div><div class='add'>+</div><div class='add'>+			if (dest_func &amp;&amp; dest_func-&gt;cold)</div><div class='add'>+				dest_func-&gt;ignore = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool validate_branch_enabled(void)</div><div class='add'>+{</div><div class='add'>+	return opts.stackval ||</div><div class='add'>+	       opts.orc ||</div><div class='add'>+	       opts.uaccess ||</div><div class='add'>+	       opts.checksum;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int decode_sections(struct objtool_file *file)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	file-&gt;klp = is_livepatch_module(file);</div><div class='ctx'> </div><div class='ctx'> 	mark_rodata(file);</div><div class='ctx'> </div><div class='del'>-	ret = init_pv_ops(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (init_pv_ops(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Must be before add_{jump_call}_destination.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = classify_symbols(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (classify_symbols(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = decode_instructions(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (decode_instructions(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = add_ignores(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (add_ignores(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	add_uaccess_safe(file);</div><div class='ctx'> </div><div class='del'>-	ret = read_annotate(file, __annotate_early);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (read_annotate(file, __annotate_early))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Must be before add_jump_destinations(), which depends on 'func'</div><div class='ctx'> 	 * being set for alternatives, to enable proper sibling call detection.</div><div class='ctx'> 	 */</div><div class='del'>-	if (opts.stackval || opts.orc || opts.uaccess || opts.noinstr) {</div><div class='del'>-		ret = add_special_section_alts(file);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	if (validate_branch_enabled() || opts.noinstr || opts.hack_jump_label || opts.disas) {</div><div class='add'>+		if (add_special_section_alts(file))</div><div class='add'>+			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = add_jump_destinations(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (add_jump_destinations(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Must be before add_call_destination(); it changes INSN_CALL to</div><div class='ctx'> 	 * INSN_JUMP.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = read_annotate(file, __annotate_ifc);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (read_annotate(file, __annotate_ifc))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = add_call_destinations(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (add_call_destinations(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = add_jump_table_alts(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (add_jump_table_alts(file))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-	ret = read_unwind_hints(file);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (read_unwind_hints(file))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* Must be after add_jump_destinations() */</div><div class='add'>+	mark_holes(file);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Must be after add_call_destinations() such that it can override</div><div class='ctx'> 	 * dead_end_function() marks.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = read_annotate(file, __annotate_late);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (read_annotate(file, __annotate_late))</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3223,18 +3282,19 @@ static int propagate_alt_cfi(struct objtool_file *file, struct instruction *insn</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int handle_insn_ops(struct instruction *insn,</div><div class='del'>-			   struct instruction *next_insn,</div><div class='del'>-			   struct insn_state *state)</div><div class='add'>+static int noinline handle_insn_ops(struct instruction *insn,</div><div class='add'>+				    struct instruction *next_insn,</div><div class='add'>+				    struct insn_state *state)</div><div class='ctx'> {</div><div class='add'>+	struct insn_state prev_state __maybe_unused = *state;</div><div class='ctx'> 	struct stack_op *op;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (op = insn-&gt;stack_ops; op; op = op-&gt;next) {</div><div class='ctx'> </div><div class='ctx'> 		ret = update_cfi_state(insn, next_insn, &amp;state-&gt;cfi, op);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+			goto done;</div><div class='ctx'> </div><div class='ctx'> 		if (!opts.uaccess || !insn-&gt;alt_group)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -3244,7 +3304,8 @@ static int handle_insn_ops(struct instruction *insn,</div><div class='ctx'> 				state-&gt;uaccess_stack = 1;</div><div class='ctx'> 			} else if (state-&gt;uaccess_stack &gt;&gt; 31) {</div><div class='ctx'> 				WARN_INSN(insn, "PUSHF stack exhausted");</div><div class='del'>-				return 1;</div><div class='add'>+				ret = 1;</div><div class='add'>+				goto done;</div><div class='ctx'> 			}</div><div class='ctx'> 			state-&gt;uaccess_stack &lt;&lt;= 1;</div><div class='ctx'> 			state-&gt;uaccess_stack  |= state-&gt;uaccess;</div><div class='hunk'>@@ -3260,7 +3321,10 @@ static int handle_insn_ops(struct instruction *insn,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+done:</div><div class='add'>+	TRACE_INSN_STATE(insn, &amp;prev_state, state);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool insn_cfi_match(struct instruction *insn, struct cfi_state *cfi2)</div><div class='hunk'>@@ -3352,7 +3416,7 @@ static bool pv_call_dest(struct objtool_file *file, struct instruction *insn)</div><div class='ctx'> 	if (!reloc || strcmp(reloc-&gt;sym-&gt;name, "pv_ops"))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	idx = (arch_dest_reloc_offset(reloc_addend(reloc)) / sizeof(void *));</div><div class='add'>+	idx = arch_insn_adjusted_addend(insn, reloc) / sizeof(void *);</div><div class='ctx'> </div><div class='ctx'> 	if (file-&gt;pv_ops[idx].clean)</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -3514,9 +3578,14 @@ static bool skip_alt_group(struct instruction *insn)</div><div class='ctx'> {</div><div class='ctx'> 	struct instruction *alt_insn = insn-&gt;alts ? insn-&gt;alts-&gt;insn : NULL;</div><div class='ctx'> </div><div class='add'>+	if (!insn-&gt;alt_group)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	/* ANNOTATE_IGNORE_ALTERNATIVE */</div><div class='del'>-	if (insn-&gt;alt_group &amp;&amp; insn-&gt;alt_group-&gt;ignore)</div><div class='add'>+	if (insn-&gt;alt_group-&gt;ignore) {</div><div class='add'>+		TRACE_ALT(insn, "alt group ignored");</div><div class='ctx'> 		return true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For NOP patched with CLAC/STAC, only follow the latter to avoid</div><div class='hunk'>@@ -3538,256 +3607,398 @@ static bool skip_alt_group(struct instruction *insn)</div><div class='ctx'> 	return alt_insn-&gt;type == INSN_CLAC || alt_insn-&gt;type == INSN_STAC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Follow the branch starting at the given instruction, and recursively follow</div><div class='del'>- * any other branches (jumps).  Meanwhile, track the frame pointer state at</div><div class='del'>- * each instruction and validate all the rules described in</div><div class='del'>- * tools/objtool/Documentation/objtool.txt.</div><div class='del'>- */</div><div class='del'>-static int validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='del'>-			   struct instruction *insn, struct insn_state state)</div><div class='add'>+static int checksum_debug_init(struct objtool_file *file)</div><div class='ctx'> {</div><div class='del'>-	struct alternative *alt;</div><div class='del'>-	struct instruction *next_insn, *prev_insn = NULL;</div><div class='del'>-	struct section *sec;</div><div class='del'>-	u8 visited;</div><div class='del'>-	int ret;</div><div class='add'>+	char *dup, *s;</div><div class='ctx'> </div><div class='del'>-	if (func &amp;&amp; func-&gt;ignore)</div><div class='add'>+	if (!opts.debug_checksum)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	sec = insn-&gt;sec;</div><div class='add'>+	dup = strdup(opts.debug_checksum);</div><div class='add'>+	if (!dup) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	while (1) {</div><div class='del'>-		next_insn = next_insn_to_validate(file, insn);</div><div class='add'>+	s = dup;</div><div class='add'>+	while (*s) {</div><div class='add'>+		struct symbol *func;</div><div class='add'>+		char *comma;</div><div class='ctx'> </div><div class='del'>-		if (func &amp;&amp; insn_func(insn) &amp;&amp; func != insn_func(insn)-&gt;pfunc) {</div><div class='del'>-			/* Ignore KCFI type preambles, which always fall through */</div><div class='del'>-			if (!strncmp(func-&gt;name, "__cfi_", 6) ||</div><div class='del'>-			    !strncmp(func-&gt;name, "__pfx_", 6))</div><div class='del'>-				return 0;</div><div class='add'>+		comma = strchr(s, ',');</div><div class='add'>+		if (comma)</div><div class='add'>+			*comma = '\0';</div><div class='ctx'> </div><div class='del'>-			if (file-&gt;ignore_unreachables)</div><div class='del'>-				return 0;</div><div class='add'>+		func = find_symbol_by_name(file-&gt;elf, s);</div><div class='add'>+		if (!func || !is_func_sym(func))</div><div class='add'>+			WARN("--debug-checksum: can't find '%s'", s);</div><div class='add'>+		else</div><div class='add'>+			func-&gt;debug_checksum = 1;</div><div class='ctx'> </div><div class='del'>-			WARN("%s() falls through to next function %s()",</div><div class='del'>-			     func-&gt;name, insn_func(insn)-&gt;name);</div><div class='del'>-			func-&gt;warned = 1;</div><div class='add'>+		if (!comma)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='add'>+		s = comma + 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		visited = VISITED_BRANCH &lt;&lt; state.uaccess;</div><div class='del'>-		if (insn-&gt;visited &amp; VISITED_BRANCH_MASK) {</div><div class='del'>-			if (!insn-&gt;hint &amp;&amp; !insn_cfi_match(insn, &amp;state.cfi))</div><div class='del'>-				return 1;</div><div class='add'>+	free(dup);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			if (insn-&gt;visited &amp; visited)</div><div class='del'>-				return 0;</div><div class='del'>-		} else {</div><div class='del'>-			nr_insns_visited++;</div><div class='del'>-		}</div><div class='add'>+static void checksum_update_insn(struct objtool_file *file, struct symbol *func,</div><div class='add'>+				 struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	struct reloc *reloc = insn_reloc(file, insn);</div><div class='add'>+	unsigned long offset;</div><div class='add'>+	struct symbol *sym;</div><div class='ctx'> </div><div class='del'>-		if (state.noinstr)</div><div class='del'>-			state.instr += insn-&gt;instr;</div><div class='add'>+	if (insn-&gt;fake)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		if (insn-&gt;hint) {</div><div class='del'>-			if (insn-&gt;restore) {</div><div class='del'>-				struct instruction *save_insn, *i;</div><div class='add'>+	checksum_update(func, insn, insn-&gt;sec-&gt;data-&gt;d_buf + insn-&gt;offset, insn-&gt;len);</div><div class='ctx'> </div><div class='del'>-				i = insn;</div><div class='del'>-				save_insn = NULL;</div><div class='add'>+	if (!reloc) {</div><div class='add'>+		struct symbol *call_dest = insn_call_dest(insn);</div><div class='ctx'> </div><div class='del'>-				sym_for_each_insn_continue_reverse(file, func, i) {</div><div class='del'>-					if (i-&gt;save) {</div><div class='del'>-						save_insn = i;</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='add'>+		if (call_dest)</div><div class='add'>+			checksum_update(func, insn, call_dest-&gt;demangled_name,</div><div class='add'>+					strlen(call_dest-&gt;demangled_name));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-				if (!save_insn) {</div><div class='del'>-					WARN_INSN(insn, "no corresponding CFI save for CFI restore");</div><div class='del'>-					return 1;</div><div class='add'>+	sym = reloc-&gt;sym;</div><div class='add'>+	offset = arch_insn_adjusted_addend(insn, reloc);</div><div class='add'>+</div><div class='add'>+	if (is_string_sec(sym-&gt;sec)) {</div><div class='add'>+		char *str;</div><div class='add'>+</div><div class='add'>+		str = sym-&gt;sec-&gt;data-&gt;d_buf + sym-&gt;offset + offset;</div><div class='add'>+		checksum_update(func, insn, str, strlen(str));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_sec_sym(sym)) {</div><div class='add'>+		sym = find_symbol_containing(reloc-&gt;sym-&gt;sec, offset);</div><div class='add'>+		if (!sym)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		offset -= sym-&gt;offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	checksum_update(func, insn, sym-&gt;demangled_name, strlen(sym-&gt;demangled_name));</div><div class='add'>+	checksum_update(func, insn, &amp;offset, sizeof(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='add'>+			   struct instruction *insn, struct insn_state state);</div><div class='add'>+static int do_validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='add'>+			      struct instruction *insn, struct insn_state state);</div><div class='add'>+</div><div class='add'>+static int validate_insn(struct objtool_file *file, struct symbol *func,</div><div class='add'>+			 struct instruction *insn, struct insn_state *statep,</div><div class='add'>+			 struct instruction *prev_insn, struct instruction *next_insn,</div><div class='add'>+			 bool *dead_end)</div><div class='add'>+{</div><div class='add'>+	char *alt_name __maybe_unused = NULL;</div><div class='add'>+	struct alternative *alt;</div><div class='add'>+	u8 visited;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Any returns before the end of this function are effectively dead</div><div class='add'>+	 * ends, i.e. validate_branch() has reached the end of the branch.</div><div class='add'>+	 */</div><div class='add'>+	*dead_end = true;</div><div class='add'>+</div><div class='add'>+	visited = VISITED_BRANCH &lt;&lt; statep-&gt;uaccess;</div><div class='add'>+	if (insn-&gt;visited &amp; VISITED_BRANCH_MASK) {</div><div class='add'>+		if (!insn-&gt;hint &amp;&amp; !insn_cfi_match(insn, &amp;statep-&gt;cfi))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		if (insn-&gt;visited &amp; visited) {</div><div class='add'>+			TRACE_INSN(insn, "already visited");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		nr_insns_visited++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (statep-&gt;noinstr)</div><div class='add'>+		statep-&gt;instr += insn-&gt;instr;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;hint) {</div><div class='add'>+		if (insn-&gt;restore) {</div><div class='add'>+			struct instruction *save_insn, *i;</div><div class='add'>+</div><div class='add'>+			i = insn;</div><div class='add'>+			save_insn = NULL;</div><div class='add'>+</div><div class='add'>+			sym_for_each_insn_continue_reverse(file, func, i) {</div><div class='add'>+				if (i-&gt;save) {</div><div class='add'>+					save_insn = i;</div><div class='add'>+					break;</div><div class='ctx'> 				}</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-				if (!save_insn-&gt;visited) {</div><div class='del'>-					/*</div><div class='del'>-					 * If the restore hint insn is at the</div><div class='del'>-					 * beginning of a basic block and was</div><div class='del'>-					 * branched to from elsewhere, and the</div><div class='del'>-					 * save insn hasn't been visited yet,</div><div class='del'>-					 * defer following this branch for now.</div><div class='del'>-					 * It will be seen later via the</div><div class='del'>-					 * straight-line path.</div><div class='del'>-					 */</div><div class='del'>-					if (!prev_insn)</div><div class='del'>-						return 0;</div><div class='add'>+			if (!save_insn) {</div><div class='add'>+				WARN_INSN(insn, "no corresponding CFI save for CFI restore");</div><div class='add'>+				return 1;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-					WARN_INSN(insn, "objtool isn't smart enough to handle this CFI save/restore combo");</div><div class='del'>-					return 1;</div><div class='add'>+			if (!save_insn-&gt;visited) {</div><div class='add'>+				/*</div><div class='add'>+				 * If the restore hint insn is at the</div><div class='add'>+				 * beginning of a basic block and was</div><div class='add'>+				 * branched to from elsewhere, and the</div><div class='add'>+				 * save insn hasn't been visited yet,</div><div class='add'>+				 * defer following this branch for now.</div><div class='add'>+				 * It will be seen later via the</div><div class='add'>+				 * straight-line path.</div><div class='add'>+				 */</div><div class='add'>+				if (!prev_insn) {</div><div class='add'>+					TRACE_INSN(insn, "defer restore");</div><div class='add'>+					return 0;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='del'>-				insn-&gt;cfi = save_insn-&gt;cfi;</div><div class='del'>-				nr_cfi_reused++;</div><div class='add'>+				WARN_INSN(insn, "objtool isn't smart enough to handle this CFI save/restore combo");</div><div class='add'>+				return 1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			state.cfi = *insn-&gt;cfi;</div><div class='add'>+			insn-&gt;cfi = save_insn-&gt;cfi;</div><div class='add'>+			nr_cfi_reused++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		statep-&gt;cfi = *insn-&gt;cfi;</div><div class='add'>+	} else {</div><div class='add'>+		/* XXX track if we actually changed statep-&gt;cfi */</div><div class='add'>+</div><div class='add'>+		if (prev_insn &amp;&amp; !cficmp(prev_insn-&gt;cfi, &amp;statep-&gt;cfi)) {</div><div class='add'>+			insn-&gt;cfi = prev_insn-&gt;cfi;</div><div class='add'>+			nr_cfi_reused++;</div><div class='ctx'> 		} else {</div><div class='del'>-			/* XXX track if we actually changed state.cfi */</div><div class='add'>+			insn-&gt;cfi = cfi_hash_find_or_add(&amp;statep-&gt;cfi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			if (prev_insn &amp;&amp; !cficmp(prev_insn-&gt;cfi, &amp;state.cfi)) {</div><div class='del'>-				insn-&gt;cfi = prev_insn-&gt;cfi;</div><div class='del'>-				nr_cfi_reused++;</div><div class='del'>-			} else {</div><div class='del'>-				insn-&gt;cfi = cfi_hash_find_or_add(&amp;state.cfi);</div><div class='add'>+	insn-&gt;visited |= visited;</div><div class='add'>+</div><div class='add'>+	if (propagate_alt_cfi(file, insn))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;alts) {</div><div class='add'>+		for (alt = insn-&gt;alts; alt; alt = alt-&gt;next) {</div><div class='add'>+			TRACE_ALT_BEGIN(insn, alt, alt_name);</div><div class='add'>+			ret = validate_branch(file, func, alt-&gt;insn, *statep);</div><div class='add'>+			TRACE_ALT_END(insn, alt, alt_name);</div><div class='add'>+			if (ret) {</div><div class='add'>+				BT_INSN(insn, "(alt)");</div><div class='add'>+				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		TRACE_ALT_INFO_NOADDR(insn, "/ ", "DEFAULT");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		insn-&gt;visited |= visited;</div><div class='add'>+	if (skip_alt_group(insn))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		if (propagate_alt_cfi(file, insn))</div><div class='add'>+	if (handle_insn_ops(insn, next_insn, statep))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	switch (insn-&gt;type) {</div><div class='add'>+</div><div class='add'>+	case INSN_RETURN:</div><div class='add'>+		TRACE_INSN(insn, "return");</div><div class='add'>+		return validate_return(func, insn, statep);</div><div class='add'>+</div><div class='add'>+	case INSN_CALL:</div><div class='add'>+	case INSN_CALL_DYNAMIC:</div><div class='add'>+		if (insn-&gt;type == INSN_CALL)</div><div class='add'>+			TRACE_INSN(insn, "call");</div><div class='add'>+		else</div><div class='add'>+			TRACE_INSN(insn, "indirect call");</div><div class='add'>+</div><div class='add'>+		ret = validate_call(file, insn, statep);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (opts.stackval &amp;&amp; func &amp;&amp; !is_special_call(insn) &amp;&amp;</div><div class='add'>+		    !has_valid_stack_frame(statep)) {</div><div class='add'>+			WARN_INSN(insn, "call without frame pointer save/setup");</div><div class='ctx'> 			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (insn-&gt;alts) {</div><div class='del'>-			for (alt = insn-&gt;alts; alt; alt = alt-&gt;next) {</div><div class='del'>-				ret = validate_branch(file, func, alt-&gt;insn, state);</div><div class='del'>-				if (ret) {</div><div class='del'>-					BT_INSN(insn, "(alt)");</div><div class='del'>-					return ret;</div><div class='del'>-				}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case INSN_JUMP_CONDITIONAL:</div><div class='add'>+	case INSN_JUMP_UNCONDITIONAL:</div><div class='add'>+		if (is_sibling_call(insn)) {</div><div class='add'>+			TRACE_INSN(insn, "sibling call");</div><div class='add'>+			ret = validate_sibling_call(file, insn, statep);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+		} else if (insn-&gt;jump_dest) {</div><div class='add'>+			if (insn-&gt;type == INSN_JUMP_UNCONDITIONAL)</div><div class='add'>+				TRACE_INSN(insn, "unconditional jump");</div><div class='add'>+			else</div><div class='add'>+				TRACE_INSN(insn, "jump taken");</div><div class='add'>+</div><div class='add'>+			ret = validate_branch(file, func, insn-&gt;jump_dest, *statep);</div><div class='add'>+			if (ret) {</div><div class='add'>+				BT_INSN(insn, "(branch)");</div><div class='add'>+				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (skip_alt_group(insn))</div><div class='add'>+		if (insn-&gt;type == INSN_JUMP_UNCONDITIONAL)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='del'>-		if (handle_insn_ops(insn, next_insn, &amp;state))</div><div class='del'>-			return 1;</div><div class='del'>-</div><div class='del'>-		switch (insn-&gt;type) {</div><div class='del'>-</div><div class='del'>-		case INSN_RETURN:</div><div class='del'>-			return validate_return(func, insn, &amp;state);</div><div class='add'>+		TRACE_INSN(insn, "jump not taken");</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		case INSN_CALL:</div><div class='del'>-		case INSN_CALL_DYNAMIC:</div><div class='del'>-			ret = validate_call(file, insn, &amp;state);</div><div class='add'>+	case INSN_JUMP_DYNAMIC:</div><div class='add'>+	case INSN_JUMP_DYNAMIC_CONDITIONAL:</div><div class='add'>+		TRACE_INSN(insn, "indirect jump");</div><div class='add'>+		if (is_sibling_call(insn)) {</div><div class='add'>+			ret = validate_sibling_call(file, insn, statep);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			if (opts.stackval &amp;&amp; func &amp;&amp; !is_special_call(insn) &amp;&amp;</div><div class='del'>-			    !has_valid_stack_frame(&amp;state)) {</div><div class='del'>-				WARN_INSN(insn, "call without frame pointer save/setup");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+		if (insn-&gt;type == INSN_JUMP_DYNAMIC)</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='del'>-			break;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		case INSN_JUMP_CONDITIONAL:</div><div class='del'>-		case INSN_JUMP_UNCONDITIONAL:</div><div class='del'>-			if (is_sibling_call(insn)) {</div><div class='del'>-				ret = validate_sibling_call(file, insn, &amp;state);</div><div class='del'>-				if (ret)</div><div class='del'>-					return ret;</div><div class='add'>+	case INSN_SYSCALL:</div><div class='add'>+		TRACE_INSN(insn, "syscall");</div><div class='add'>+		if (func &amp;&amp; (!next_insn || !next_insn-&gt;hint)) {</div><div class='add'>+			WARN_INSN(insn, "unsupported instruction in callable function");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			} else if (insn-&gt;jump_dest) {</div><div class='del'>-				ret = validate_branch(file, func,</div><div class='del'>-						      insn-&gt;jump_dest, state);</div><div class='del'>-				if (ret) {</div><div class='del'>-					BT_INSN(insn, "(branch)");</div><div class='del'>-					return ret;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-			if (insn-&gt;type == INSN_JUMP_UNCONDITIONAL)</div><div class='del'>-				return 0;</div><div class='add'>+	case INSN_SYSRET:</div><div class='add'>+		TRACE_INSN(insn, "sysret");</div><div class='add'>+		if (func &amp;&amp; (!next_insn || !next_insn-&gt;hint)) {</div><div class='add'>+			WARN_INSN(insn, "unsupported instruction in callable function");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case INSN_STAC:</div><div class='add'>+		TRACE_INSN(insn, "stac");</div><div class='add'>+		if (!opts.uaccess)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		case INSN_JUMP_DYNAMIC:</div><div class='del'>-		case INSN_JUMP_DYNAMIC_CONDITIONAL:</div><div class='del'>-			if (is_sibling_call(insn)) {</div><div class='del'>-				ret = validate_sibling_call(file, insn, &amp;state);</div><div class='del'>-				if (ret)</div><div class='del'>-					return ret;</div><div class='del'>-			}</div><div class='add'>+		if (statep-&gt;uaccess) {</div><div class='add'>+			WARN_INSN(insn, "recursive UACCESS enable");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			if (insn-&gt;type == INSN_JUMP_DYNAMIC)</div><div class='del'>-				return 0;</div><div class='add'>+		statep-&gt;uaccess = true;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='add'>+	case INSN_CLAC:</div><div class='add'>+		TRACE_INSN(insn, "clac");</div><div class='add'>+		if (!opts.uaccess)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		case INSN_SYSCALL:</div><div class='del'>-			if (func &amp;&amp; (!next_insn || !next_insn-&gt;hint)) {</div><div class='del'>-				WARN_INSN(insn, "unsupported instruction in callable function");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+		if (!statep-&gt;uaccess &amp;&amp; func) {</div><div class='add'>+			WARN_INSN(insn, "redundant UACCESS disable");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			break;</div><div class='add'>+		if (func_uaccess_safe(func) &amp;&amp; !statep-&gt;uaccess_stack) {</div><div class='add'>+			WARN_INSN(insn, "UACCESS-safe disables UACCESS");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		case INSN_SYSRET:</div><div class='del'>-			if (func &amp;&amp; (!next_insn || !next_insn-&gt;hint)) {</div><div class='del'>-				WARN_INSN(insn, "unsupported instruction in callable function");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+		statep-&gt;uaccess = false;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-			return 0;</div><div class='add'>+	case INSN_STD:</div><div class='add'>+		TRACE_INSN(insn, "std");</div><div class='add'>+		if (statep-&gt;df) {</div><div class='add'>+			WARN_INSN(insn, "recursive STD");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		case INSN_STAC:</div><div class='del'>-			if (!opts.uaccess)</div><div class='del'>-				break;</div><div class='add'>+		statep-&gt;df = true;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-			if (state.uaccess) {</div><div class='del'>-				WARN_INSN(insn, "recursive UACCESS enable");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+	case INSN_CLD:</div><div class='add'>+		TRACE_INSN(insn, "cld");</div><div class='add'>+		if (!statep-&gt;df &amp;&amp; func) {</div><div class='add'>+			WARN_INSN(insn, "redundant CLD");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			state.uaccess = true;</div><div class='del'>-			break;</div><div class='add'>+		statep-&gt;df = false;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		case INSN_CLAC:</div><div class='del'>-			if (!opts.uaccess)</div><div class='del'>-				break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			if (!state.uaccess &amp;&amp; func) {</div><div class='del'>-				WARN_INSN(insn, "redundant UACCESS disable");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+	if (insn-&gt;dead_end)</div><div class='add'>+		TRACE_INSN(insn, "dead end");</div><div class='ctx'> </div><div class='del'>-			if (func_uaccess_safe(func) &amp;&amp; !state.uaccess_stack) {</div><div class='del'>-				WARN_INSN(insn, "UACCESS-safe disables UACCESS");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+	*dead_end = insn-&gt;dead_end;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			state.uaccess = false;</div><div class='del'>-			break;</div><div class='add'>+/*</div><div class='add'>+ * Follow the branch starting at the given instruction, and recursively follow</div><div class='add'>+ * any other branches (jumps).  Meanwhile, track the frame pointer state at</div><div class='add'>+ * each instruction and validate all the rules described in</div><div class='add'>+ * tools/objtool/Documentation/objtool.txt.</div><div class='add'>+ */</div><div class='add'>+static int do_validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='add'>+			      struct instruction *insn, struct insn_state state)</div><div class='add'>+{</div><div class='add'>+	struct instruction *next_insn, *prev_insn = NULL;</div><div class='add'>+	bool dead_end;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-		case INSN_STD:</div><div class='del'>-			if (state.df) {</div><div class='del'>-				WARN_INSN(insn, "recursive STD");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+	if (func &amp;&amp; func-&gt;ignore)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-			state.df = true;</div><div class='del'>-			break;</div><div class='add'>+	do {</div><div class='add'>+		insn-&gt;trace = 0;</div><div class='add'>+		next_insn = next_insn_to_validate(file, insn);</div><div class='ctx'> </div><div class='del'>-		case INSN_CLD:</div><div class='del'>-			if (!state.df &amp;&amp; func) {</div><div class='del'>-				WARN_INSN(insn, "redundant CLD");</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+		if (opts.checksum &amp;&amp; func &amp;&amp; insn-&gt;sec)</div><div class='add'>+			checksum_update_insn(file, func, insn);</div><div class='ctx'> </div><div class='del'>-			state.df = false;</div><div class='del'>-			break;</div><div class='add'>+		if (func &amp;&amp; insn_func(insn) &amp;&amp; func != insn_func(insn)-&gt;pfunc) {</div><div class='add'>+			/* Ignore KCFI type preambles, which always fall through */</div><div class='add'>+			if (is_prefix_func(func))</div><div class='add'>+				return 0;</div><div class='ctx'> </div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='add'>+			if (file-&gt;ignore_unreachables)</div><div class='add'>+				return 0;</div><div class='add'>+</div><div class='add'>+			WARN("%s() falls through to next function %s()",</div><div class='add'>+			     func-&gt;name, insn_func(insn)-&gt;name);</div><div class='add'>+			func-&gt;warned = 1;</div><div class='add'>+</div><div class='add'>+			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (insn-&gt;dead_end)</div><div class='del'>-			return 0;</div><div class='add'>+		ret = validate_insn(file, func, insn, &amp;state, prev_insn, next_insn,</div><div class='add'>+				    &amp;dead_end);</div><div class='add'>+</div><div class='add'>+		if (!insn-&gt;trace) {</div><div class='add'>+			if (ret)</div><div class='add'>+				TRACE_INSN(insn, "warning (%d)", ret);</div><div class='add'>+			else</div><div class='add'>+				TRACE_INSN(insn, NULL);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (!next_insn) {</div><div class='add'>+		if (!dead_end &amp;&amp; !next_insn) {</div><div class='ctx'> 			if (state.cfi.cfa.base == CFI_UNDEFINED)</div><div class='ctx'> 				return 0;</div><div class='ctx'> 			if (file-&gt;ignore_unreachables)</div><div class='hunk'>@@ -3795,15 +4006,28 @@ static int validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='ctx'> </div><div class='ctx'> 			WARN("%s%sunexpected end of section %s",</div><div class='ctx'> 			     func ? func-&gt;name : "", func ? "(): " : "",</div><div class='del'>-			     sec-&gt;name);</div><div class='add'>+			     insn-&gt;sec-&gt;name);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		prev_insn = insn;</div><div class='ctx'> 		insn = next_insn;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	} while (!dead_end);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_branch(struct objtool_file *file, struct symbol *func,</div><div class='add'>+			   struct instruction *insn, struct insn_state state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	trace_depth_inc();</div><div class='add'>+	ret = do_validate_branch(file, func, insn, state);</div><div class='add'>+	trace_depth_dec();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int validate_unwind_hint(struct objtool_file *file,</div><div class='hunk'>@@ -3811,7 +4035,13 @@ static int validate_unwind_hint(struct objtool_file *file,</div><div class='ctx'> 				  struct insn_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	if (insn-&gt;hint &amp;&amp; !insn-&gt;visited) {</div><div class='del'>-		int ret = validate_branch(file, insn_func(insn), insn, *state);</div><div class='add'>+		struct symbol *func = insn_func(insn);</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		if (opts.checksum)</div><div class='add'>+			checksum_init(func);</div><div class='add'>+</div><div class='add'>+		ret = validate_branch(file, func, insn, *state);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			BT_INSN(insn, "&lt;=== (hint)");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -4002,6 +4232,37 @@ static int validate_retpoline(struct objtool_file *file)</div><div class='ctx'> 		warnings++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!opts.cfi)</div><div class='add'>+		return warnings;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * kCFI call sites look like:</div><div class='add'>+	 *</div><div class='add'>+	 *     movl $(-0x12345678), %r10d</div><div class='add'>+	 *     addl -4(%r11), %r10d</div><div class='add'>+	 *     jz 1f</div><div class='add'>+	 *     ud2</div><div class='add'>+	 *  1: cs call __x86_indirect_thunk_r11</div><div class='add'>+	 *</div><div class='add'>+	 * Verify all indirect calls are kCFI adorned by checking for the</div><div class='add'>+	 * UD2. Notably, doing __nocfi calls to regular (cfi) functions is</div><div class='add'>+	 * broken.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(insn, &amp;file-&gt;retpoline_call_list, call_node) {</div><div class='add'>+		struct symbol *sym = insn-&gt;sym;</div><div class='add'>+</div><div class='add'>+		if (sym &amp;&amp; (sym-&gt;type == STT_NOTYPE ||</div><div class='add'>+			    sym-&gt;type == STT_FUNC) &amp;&amp; !sym-&gt;nocfi) {</div><div class='add'>+			struct instruction *prev =</div><div class='add'>+				prev_insn_same_sym(file, insn);</div><div class='add'>+</div><div class='add'>+			if (!prev || prev-&gt;type != INSN_BUG) {</div><div class='add'>+				WARN_INSN(insn, "no-cfi indirect call!");</div><div class='add'>+				warnings++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return warnings;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4024,7 +4285,8 @@ static bool ignore_unreachable_insn(struct objtool_file *file, struct instructio</div><div class='ctx'> 	struct instruction *prev_insn;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (insn-&gt;type == INSN_NOP || insn-&gt;type == INSN_TRAP || (func &amp;&amp; func-&gt;ignore))</div><div class='add'>+	if (insn-&gt;type == INSN_NOP || insn-&gt;type == INSN_TRAP ||</div><div class='add'>+	    insn-&gt;hole || (func &amp;&amp; func-&gt;ignore))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -4035,47 +4297,6 @@ static bool ignore_unreachable_insn(struct objtool_file *file, struct instructio</div><div class='ctx'> 	    !strcmp(insn-&gt;sec-&gt;name, ".altinstr_aux"))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Whole archive runs might encounter dead code from weak symbols.</div><div class='del'>-	 * This is where the linker will have dropped the weak symbol in</div><div class='del'>-	 * favour of a regular symbol, but leaves the code in place.</div><div class='del'>-	 *</div><div class='del'>-	 * In this case we'll find a piece of code (whole function) that is not</div><div class='del'>-	 * covered by a !section symbol. Ignore them.</div><div class='del'>-	 */</div><div class='del'>-	if (opts.link &amp;&amp; !func) {</div><div class='del'>-		int size = find_symbol_hole_containing(insn-&gt;sec, insn-&gt;offset);</div><div class='del'>-		unsigned long end = insn-&gt;offset + size;</div><div class='del'>-</div><div class='del'>-		if (!size) /* not a hole */</div><div class='del'>-			return false;</div><div class='del'>-</div><div class='del'>-		if (size &lt; 0) /* hole until the end */</div><div class='del'>-			return true;</div><div class='del'>-</div><div class='del'>-		sec_for_each_insn_continue(file, insn) {</div><div class='del'>-			/*</div><div class='del'>-			 * If we reach a visited instruction at or before the</div><div class='del'>-			 * end of the hole, ignore the unreachable.</div><div class='del'>-			 */</div><div class='del'>-			if (insn-&gt;visited)</div><div class='del'>-				return true;</div><div class='del'>-</div><div class='del'>-			if (insn-&gt;offset &gt;= end)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * If this hole jumps to a .cold function, mark it ignore too.</div><div class='del'>-			 */</div><div class='del'>-			if (insn-&gt;jump_dest &amp;&amp; insn_func(insn-&gt;jump_dest) &amp;&amp;</div><div class='del'>-			    strstr(insn_func(insn-&gt;jump_dest)-&gt;name, ".cold")) {</div><div class='del'>-				insn_func(insn-&gt;jump_dest)-&gt;ignore = true;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!func)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -4127,14 +4348,54 @@ static bool ignore_unreachable_insn(struct objtool_file *file, struct instructio</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int add_prefix_symbol(struct objtool_file *file, struct symbol *func)</div><div class='add'>+/*</div><div class='add'>+ * For FineIBT or kCFI, a certain number of bytes preceding the function may be</div><div class='add'>+ * NOPs.  Those NOPs may be rewritten at runtime and executed, so give them a</div><div class='add'>+ * proper function name: __pfx_&lt;func&gt;.</div><div class='add'>+ *</div><div class='add'>+ * The NOPs may not exist for the following cases:</div><div class='add'>+ *</div><div class='add'>+ *   - compiler cloned functions (*.cold, *.part0, etc)</div><div class='add'>+ *   - asm functions created with inline asm or without SYM_FUNC_START()</div><div class='add'>+ *</div><div class='add'>+ * Also, the function may already have a prefix from a previous objtool run</div><div class='add'>+ * (livepatch extracted functions, or manually running objtool multiple times).</div><div class='add'>+ *</div><div class='add'>+ * So return 0 if the NOPs are missing or the function already has a prefix</div><div class='add'>+ * symbol.</div><div class='add'>+ */</div><div class='add'>+static int create_prefix_symbol(struct objtool_file *file, struct symbol *func)</div><div class='ctx'> {</div><div class='ctx'> 	struct instruction *insn, *prev;</div><div class='add'>+	char name[SYM_NAME_LEN];</div><div class='ctx'> 	struct cfi_state *cfi;</div><div class='ctx'> </div><div class='add'>+	if (!is_func_sym(func) || is_prefix_func(func) ||</div><div class='add'>+	    func-&gt;cold || func-&gt;static_call_tramp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((strlen(func-&gt;name) + sizeof("__pfx_") &gt; SYM_NAME_LEN)) {</div><div class='add'>+		WARN("%s: symbol name too long, can't create __pfx_ symbol",</div><div class='add'>+		      func-&gt;name);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(name, SYM_NAME_LEN, "__pfx_%s", func-&gt;name))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (file-&gt;klp) {</div><div class='add'>+		struct symbol *pfx;</div><div class='add'>+</div><div class='add'>+		pfx = find_symbol_by_offset(func-&gt;sec, func-&gt;offset - opts.prefix);</div><div class='add'>+		if (pfx &amp;&amp; is_prefix_func(pfx) &amp;&amp; !strcmp(pfx-&gt;name, name))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	insn = find_insn(file, func-&gt;sec, func-&gt;offset);</div><div class='del'>-	if (!insn)</div><div class='add'>+	if (!insn) {</div><div class='add'>+		WARN("%s: can't find starting instruction", func-&gt;name);</div><div class='ctx'> 		return -1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (prev = prev_insn_same_sec(file, insn);</div><div class='ctx'> 	     prev;</div><div class='hunk'>@@ -4142,22 +4403,27 @@ static int add_prefix_symbol(struct objtool_file *file, struct symbol *func)</div><div class='ctx'> 		u64 offset;</div><div class='ctx'> </div><div class='ctx'> 		if (prev-&gt;type != INSN_NOP)</div><div class='del'>-			return -1;</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='ctx'> 		offset = func-&gt;offset - prev-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 		if (offset &gt; opts.prefix)</div><div class='del'>-			return -1;</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='ctx'> 		if (offset &lt; opts.prefix)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		elf_create_prefix_symbol(file-&gt;elf, func, opts.prefix);</div><div class='add'>+		if (!elf_create_symbol(file-&gt;elf, name, func-&gt;sec,</div><div class='add'>+				       GELF_ST_BIND(func-&gt;sym.st_info),</div><div class='add'>+				       GELF_ST_TYPE(func-&gt;sym.st_info),</div><div class='add'>+				       prev-&gt;offset, opts.prefix))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!prev)</div><div class='del'>-		return -1;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!insn-&gt;cfi) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -4175,20 +4441,18 @@ static int add_prefix_symbol(struct objtool_file *file, struct symbol *func)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int add_prefix_symbols(struct objtool_file *file)</div><div class='add'>+static int create_prefix_symbols(struct objtool_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *sec;</div><div class='ctx'> 	struct symbol *func;</div><div class='ctx'> </div><div class='del'>-	for_each_sec(file, sec) {</div><div class='del'>-		if (!(sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR))</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='add'>+		if (!is_text_sec(sec))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		sec_for_each_sym(sec, func) {</div><div class='del'>-			if (func-&gt;type != STT_FUNC)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			add_prefix_symbol(file, func);</div><div class='add'>+			if (create_prefix_symbol(file, func))</div><div class='add'>+				return -1;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4199,6 +4463,7 @@ static int validate_symbol(struct objtool_file *file, struct section *sec,</div><div class='ctx'> 			   struct symbol *sym, struct insn_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct instruction *insn;</div><div class='add'>+	struct symbol *func;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!sym-&gt;len) {</div><div class='hunk'>@@ -4216,9 +4481,26 @@ static int validate_symbol(struct objtool_file *file, struct section *sec,</div><div class='ctx'> 	if (opts.uaccess)</div><div class='ctx'> 		state-&gt;uaccess = sym-&gt;uaccess_safe;</div><div class='ctx'> </div><div class='del'>-	ret = validate_branch(file, insn_func(insn), insn, *state);</div><div class='add'>+	func = insn_func(insn);</div><div class='add'>+</div><div class='add'>+	if (opts.checksum)</div><div class='add'>+		checksum_init(func);</div><div class='add'>+</div><div class='add'>+	if (opts.trace &amp;&amp; !fnmatch(opts.trace, sym-&gt;name, 0)) {</div><div class='add'>+		trace_enable();</div><div class='add'>+		TRACE("%s: validation begin\n", sym-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = validate_branch(file, func, insn, *state);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		BT_INSN(insn, "&lt;=== (sym)");</div><div class='add'>+</div><div class='add'>+	TRACE("%s: validation %s\n\n", sym-&gt;name, ret ? "failed" : "end");</div><div class='add'>+	trace_disable();</div><div class='add'>+</div><div class='add'>+	if (opts.checksum)</div><div class='add'>+		checksum_finish(func);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4229,7 +4511,7 @@ static int validate_section(struct objtool_file *file, struct section *sec)</div><div class='ctx'> 	int warnings = 0;</div><div class='ctx'> </div><div class='ctx'> 	sec_for_each_sym(sec, func) {</div><div class='del'>-		if (func-&gt;type != STT_FUNC)</div><div class='add'>+		if (!is_func_sym(func))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		init_insn_state(file, &amp;state, sec);</div><div class='hunk'>@@ -4272,8 +4554,8 @@ static int validate_functions(struct objtool_file *file)</div><div class='ctx'> 	struct section *sec;</div><div class='ctx'> 	int warnings = 0;</div><div class='ctx'> </div><div class='del'>-	for_each_sec(file, sec) {</div><div class='del'>-		if (!(sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR))</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='add'>+		if (!is_text_sec(sec))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		warnings += validate_section(file, sec);</div><div class='hunk'>@@ -4400,12 +4682,7 @@ static int validate_ibt_insn(struct objtool_file *file, struct instruction *insn</div><div class='ctx'> 					      reloc_offset(reloc) + 1,</div><div class='ctx'> 					      (insn-&gt;offset + insn-&gt;len) - (reloc_offset(reloc) + 1))) {</div><div class='ctx'> </div><div class='del'>-		off = reloc-&gt;sym-&gt;offset;</div><div class='del'>-		if (reloc_type(reloc) == R_X86_64_PC32 ||</div><div class='del'>-		    reloc_type(reloc) == R_X86_64_PLT32)</div><div class='del'>-			off += arch_dest_reloc_offset(reloc_addend(reloc));</div><div class='del'>-		else</div><div class='del'>-			off += reloc_addend(reloc);</div><div class='add'>+		off = reloc-&gt;sym-&gt;offset + arch_insn_adjusted_addend(insn, reloc);</div><div class='ctx'> </div><div class='ctx'> 		dest = find_insn(file, reloc-&gt;sym-&gt;sec, off);</div><div class='ctx'> 		if (!dest)</div><div class='hunk'>@@ -4456,10 +4733,10 @@ static int validate_ibt(struct objtool_file *file)</div><div class='ctx'> 	for_each_insn(file, insn)</div><div class='ctx'> 		warnings += validate_ibt_insn(file, insn);</div><div class='ctx'> </div><div class='del'>-	for_each_sec(file, sec) {</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='ctx'> </div><div class='ctx'> 		/* Already done by validate_ibt_insn() */</div><div class='del'>-		if (sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR)</div><div class='add'>+		if (is_text_sec(sec))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (!sec-&gt;rsec)</div><div class='hunk'>@@ -4474,8 +4751,8 @@ static int validate_ibt(struct objtool_file *file)</div><div class='ctx'> 		    !strncmp(sec-&gt;name, ".debug", 6)			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".altinstructions")		||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".ibt_endbr_seal")		||</div><div class='add'>+		    !strcmp(sec-&gt;name, ".kcfi_traps")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".orc_unwind_ip")		||</div><div class='del'>-		    !strcmp(sec-&gt;name, ".parainstructions")		||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".retpoline_sites")		||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".smp_locks")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".static_call_sites")		||</div><div class='hunk'>@@ -4484,12 +4761,14 @@ static int validate_ibt(struct objtool_file *file)</div><div class='ctx'> 		    !strcmp(sec-&gt;name, "__bug_table")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, "__ex_table")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, "__jump_table")			||</div><div class='add'>+		    !strcmp(sec-&gt;name, "__klp_funcs")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, "__mcount_loc")			||</div><div class='del'>-		    !strcmp(sec-&gt;name, ".kcfi_traps")			||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".llvm.call-graph-profile")	||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, ".llvm_bb_addr_map")		||</div><div class='ctx'> 		    !strcmp(sec-&gt;name, "__tracepoints")			||</div><div class='del'>-		    strstr(sec-&gt;name, "__patchable_function_entries"))</div><div class='add'>+		    !strcmp(sec-&gt;name, ".return_sites")			||</div><div class='add'>+		    !strcmp(sec-&gt;name, ".call_sites")			||</div><div class='add'>+		    !strcmp(sec-&gt;name, "__patchable_function_entries"))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		for_each_reloc(sec-&gt;rsec, reloc)</div><div class='hunk'>@@ -4563,85 +4842,45 @@ static int validate_reachable_instructions(struct objtool_file *file)</div><div class='ctx'> 	return warnings;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* 'funcs' is a space-separated list of function names */</div><div class='del'>-static void disas_funcs(const char *funcs)</div><div class='add'>+__weak bool arch_absolute_reloc(struct elf *elf, struct reloc *reloc)</div><div class='ctx'> {</div><div class='del'>-	const char *objdump_str, *cross_compile;</div><div class='del'>-	int size, ret;</div><div class='del'>-	char *cmd;</div><div class='del'>-</div><div class='del'>-	cross_compile = getenv("CROSS_COMPILE");</div><div class='del'>-	if (!cross_compile)</div><div class='del'>-		cross_compile = "";</div><div class='del'>-</div><div class='del'>-	objdump_str = "%sobjdump -wdr %s | gawk -M -v _funcs='%s' '"</div><div class='del'>-			"BEGIN { split(_funcs, funcs); }"</div><div class='del'>-			"/^$/ { func_match = 0; }"</div><div class='del'>-			"/&lt;.*&gt;:/ { "</div><div class='del'>-				"f = gensub(/.*&lt;(.*)&gt;:/, \"\\\\1\", 1);"</div><div class='del'>-				"for (i in funcs) {"</div><div class='del'>-					"if (funcs[i] == f) {"</div><div class='del'>-						"func_match = 1;"</div><div class='del'>-						"base = strtonum(\"0x\" $1);"</div><div class='del'>-						"break;"</div><div class='del'>-					"}"</div><div class='del'>-				"}"</div><div class='del'>-			"}"</div><div class='del'>-			"{"</div><div class='del'>-				"if (func_match) {"</div><div class='del'>-					"addr = strtonum(\"0x\" $1);"</div><div class='del'>-					"printf(\"%%04x \", addr - base);"</div><div class='del'>-					"print;"</div><div class='del'>-				"}"</div><div class='del'>-			"}' 1&gt;&amp;2";</div><div class='del'>-</div><div class='del'>-	/* fake snprintf() to calculate the size */</div><div class='del'>-	size = snprintf(NULL, 0, objdump_str, cross_compile, objname, funcs) + 1;</div><div class='del'>-	if (size &lt;= 0) {</div><div class='del'>-		WARN("objdump string size calculation failed");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cmd = malloc(size);</div><div class='add'>+	unsigned int type = reloc_type(reloc);</div><div class='add'>+	size_t sz = elf_addr_size(elf);</div><div class='ctx'> </div><div class='del'>-	/* real snprintf() */</div><div class='del'>-	snprintf(cmd, size, objdump_str, cross_compile, objname, funcs);</div><div class='del'>-	ret = system(cmd);</div><div class='del'>-	if (ret) {</div><div class='del'>-		WARN("disassembly failed: %d", ret);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	return (sz == 8) ? (type == R_ABS64) : (type == R_ABS32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void disas_warned_funcs(struct objtool_file *file)</div><div class='add'>+static int check_abs_references(struct objtool_file *file)</div><div class='ctx'> {</div><div class='del'>-	struct symbol *sym;</div><div class='del'>-	char *funcs = NULL, *tmp;</div><div class='del'>-</div><div class='del'>-	for_each_sym(file, sym) {</div><div class='del'>-		if (sym-&gt;warned) {</div><div class='del'>-			if (!funcs) {</div><div class='del'>-				funcs = malloc(strlen(sym-&gt;name) + 1);</div><div class='del'>-				if (!funcs) {</div><div class='del'>-					ERROR_GLIBC("malloc");</div><div class='del'>-					return;</div><div class='del'>-				}</div><div class='del'>-				strcpy(funcs, sym-&gt;name);</div><div class='del'>-			} else {</div><div class='del'>-				tmp = malloc(strlen(funcs) + strlen(sym-&gt;name) + 2);</div><div class='del'>-				if (!tmp) {</div><div class='del'>-					ERROR_GLIBC("malloc");</div><div class='del'>-					return;</div><div class='del'>-				}</div><div class='del'>-				sprintf(tmp, "%s %s", funcs, sym-&gt;name);</div><div class='del'>-				free(funcs);</div><div class='del'>-				funcs = tmp;</div><div class='add'>+	struct section *sec;</div><div class='add'>+	struct reloc *reloc;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='add'>+		/* absolute references in non-loadable sections are fine */</div><div class='add'>+		if (!(sec-&gt;sh.sh_flags &amp; SHF_ALLOC))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* section must have an associated .rela section */</div><div class='add'>+		if (!sec-&gt;rsec)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Special case for compiler generated metadata that is not</div><div class='add'>+		 * consumed until after boot.</div><div class='add'>+		 */</div><div class='add'>+		if (!strcmp(sec-&gt;name, "__patchable_function_entries"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for_each_reloc(sec-&gt;rsec, reloc) {</div><div class='add'>+			if (arch_absolute_reloc(file-&gt;elf, reloc)) {</div><div class='add'>+				WARN("section %s has absolute relocation at offset 0x%llx",</div><div class='add'>+				     sec-&gt;name, (unsigned long long)reloc_offset(reloc));</div><div class='add'>+				ret++;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (funcs)</div><div class='del'>-		disas_funcs(funcs);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct insn_chunk {</div><div class='hunk'>@@ -4672,10 +4911,35 @@ static void free_insns(struct objtool_file *file)</div><div class='ctx'> 		free(chunk-&gt;addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const char *objtool_disas_insn(struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = objtool_disas_ctx;</div><div class='add'>+</div><div class='add'>+	if (!dctx)</div><div class='add'>+		return "";</div><div class='add'>+</div><div class='add'>+	disas_insn(dctx, insn);</div><div class='add'>+	return disas_result(dctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int check(struct objtool_file *file)</div><div class='ctx'> {</div><div class='add'>+	struct disas_context *disas_ctx = NULL;</div><div class='ctx'> 	int ret = 0, warnings = 0;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Create a disassembly context if we might disassemble any</div><div class='add'>+	 * instruction or function.</div><div class='add'>+	 */</div><div class='add'>+	if (opts.verbose || opts.backtrace || opts.trace || opts.disas) {</div><div class='add'>+		disas_ctx = disas_context_create(file);</div><div class='add'>+		if (!disas_ctx) {</div><div class='add'>+			opts.disas = false;</div><div class='add'>+			opts.trace = false;</div><div class='add'>+		}</div><div class='add'>+		objtool_disas_ctx = disas_ctx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	arch_initial_func_cfi_state(&amp;initial_func_cfi);</div><div class='ctx'> 	init_cfi_state(&amp;init_cfi);</div><div class='ctx'> 	init_cfi_state(&amp;func_cfi);</div><div class='hunk'>@@ -4691,6 +4955,10 @@ int check(struct objtool_file *file)</div><div class='ctx'> 	cfi_hash_add(&amp;init_cfi);</div><div class='ctx'> 	cfi_hash_add(&amp;func_cfi);</div><div class='ctx'> </div><div class='add'>+	ret = checksum_debug_init(file);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	ret = decode_sections(file);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -4701,7 +4969,7 @@ int check(struct objtool_file *file)</div><div class='ctx'> 	if (opts.retpoline)</div><div class='ctx'> 		warnings += validate_retpoline(file);</div><div class='ctx'> </div><div class='del'>-	if (opts.stackval || opts.orc || opts.uaccess) {</div><div class='add'>+	if (validate_branch_enabled()) {</div><div class='ctx'> 		int w = 0;</div><div class='ctx'> </div><div class='ctx'> 		w += validate_functions(file);</div><div class='hunk'>@@ -4766,7 +5034,7 @@ int check(struct objtool_file *file)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (opts.prefix) {</div><div class='del'>-		ret = add_prefix_symbols(file);</div><div class='add'>+		ret = create_prefix_symbols(file);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4777,14 +5045,21 @@ int check(struct objtool_file *file)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (opts.noabs)</div><div class='add'>+		warnings += check_abs_references(file);</div><div class='add'>+</div><div class='add'>+	if (opts.checksum) {</div><div class='add'>+		ret = create_sym_checksum_section(file);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (opts.orc &amp;&amp; nr_insns) {</div><div class='ctx'> 		ret = orc_create(file);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	free_insns(file);</div><div class='del'>-</div><div class='ctx'> 	if (opts.stats) {</div><div class='ctx'> 		printf("nr_insns_visited: %ld\n", nr_insns_visited);</div><div class='ctx'> 		printf("nr_cfi: %ld\n", nr_cfi);</div><div class='hunk'>@@ -4793,18 +5068,32 @@ int check(struct objtool_file *file)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (!ret &amp;&amp; !warnings)</div><div class='del'>-		return 0;</div><div class='add'>+	if (ret || warnings) {</div><div class='add'>+		if (opts.werror &amp;&amp; warnings)</div><div class='add'>+			ret = 1;</div><div class='ctx'> </div><div class='del'>-	if (opts.werror &amp;&amp; warnings)</div><div class='del'>-		ret = 1;</div><div class='add'>+		if (opts.verbose) {</div><div class='add'>+			if (opts.werror &amp;&amp; warnings)</div><div class='add'>+				WARN("%d warning(s) upgraded to errors", warnings);</div><div class='add'>+			disas_warned_funcs(disas_ctx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (opts.verbose) {</div><div class='del'>-		if (opts.werror &amp;&amp; warnings)</div><div class='del'>-			WARN("%d warning(s) upgraded to errors", warnings);</div><div class='del'>-		print_args();</div><div class='del'>-		disas_warned_funcs(file);</div><div class='add'>+	if (opts.disas)</div><div class='add'>+		disas_funcs(disas_ctx);</div><div class='add'>+</div><div class='add'>+	if (disas_ctx) {</div><div class='add'>+		disas_context_destroy(disas_ctx);</div><div class='add'>+		objtool_disas_ctx = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	free_insns(file);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; !warnings)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (opts.backup &amp;&amp; make_backup())</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/objtool/disas.c b/tools/objtool/disas.c<br/>new file mode 100644<br/>index 000000000000..2b5059f55e40<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/disas.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/disas.c</a></div><div class='hunk'>@@ -0,0 +1,1248 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015-2017 Josh Poimboeuf &lt;jpoimboe@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#include &lt;fnmatch.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/arch.h&gt;</div><div class='add'>+#include &lt;objtool/check.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='add'>+#include &lt;objtool/special.h&gt;</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;bfd.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;tools/dis-asm-compat.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Size of the buffer for storing the result of disassembling</div><div class='add'>+ * a single instruction.</div><div class='add'>+ */</div><div class='add'>+#define DISAS_RESULT_SIZE	1024</div><div class='add'>+</div><div class='add'>+struct disas_context {</div><div class='add'>+	struct objtool_file *file;</div><div class='add'>+	struct instruction *insn;</div><div class='add'>+	bool alt_applied;</div><div class='add'>+	char result[DISAS_RESULT_SIZE];</div><div class='add'>+	disassembler_ftype disassembler;</div><div class='add'>+	struct disassemble_info info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Maximum number of alternatives</div><div class='add'>+ */</div><div class='add'>+#define DISAS_ALT_MAX		5</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Maximum number of instructions per alternative</div><div class='add'>+ */</div><div class='add'>+#define DISAS_ALT_INSN_MAX	50</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Information to disassemble an alternative</div><div class='add'>+ */</div><div class='add'>+struct disas_alt {</div><div class='add'>+	struct instruction *orig_insn;		/* original instruction */</div><div class='add'>+	struct alternative *alt;		/* alternative or NULL if default code */</div><div class='add'>+	char *name;				/* name for this alternative */</div><div class='add'>+	int width;				/* formatting width */</div><div class='add'>+	struct {</div><div class='add'>+		char *str;			/* instruction string */</div><div class='add'>+		int offset;			/* instruction offset */</div><div class='add'>+		int nops;			/* number of nops */</div><div class='add'>+	} insn[DISAS_ALT_INSN_MAX];		/* alternative instructions */</div><div class='add'>+	int insn_idx;				/* index of the next instruction to print */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DALT_DEFAULT(dalt)	(!(dalt)-&gt;alt)</div><div class='add'>+#define DALT_INSN(dalt)		(DALT_DEFAULT(dalt) ? (dalt)-&gt;orig_insn : (dalt)-&gt;alt-&gt;insn)</div><div class='add'>+#define DALT_GROUP(dalt)	(DALT_INSN(dalt)-&gt;alt_group)</div><div class='add'>+#define DALT_ALTID(dalt)	((dalt)-&gt;orig_insn-&gt;offset)</div><div class='add'>+</div><div class='add'>+#define ALT_FLAGS_SHIFT		16</div><div class='add'>+#define ALT_FLAG_NOT		(1 &lt;&lt; 0)</div><div class='add'>+#define ALT_FLAG_DIRECT_CALL	(1 &lt;&lt; 1)</div><div class='add'>+#define ALT_FEATURE_MASK	((1 &lt;&lt; ALT_FLAGS_SHIFT) - 1)</div><div class='add'>+</div><div class='add'>+static int alt_feature(unsigned int ft_flags)</div><div class='add'>+{</div><div class='add'>+	return (ft_flags &amp; ALT_FEATURE_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alt_flags(unsigned int ft_flags)</div><div class='add'>+{</div><div class='add'>+	return (ft_flags &gt;&gt; ALT_FLAGS_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Wrapper around asprintf() to allocate and format a string.</div><div class='add'>+ * Return the allocated string or NULL on error.</div><div class='add'>+ */</div><div class='add'>+static char *strfmt(const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list ap;</div><div class='add'>+	char *str;</div><div class='add'>+	int rv;</div><div class='add'>+</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	rv = vasprintf(&amp;str, fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+</div><div class='add'>+	return rv == -1 ? NULL : str;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sprint_name(char *str, const char *name, unsigned long offset)</div><div class='add'>+{</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if (offset)</div><div class='add'>+		len = sprintf(str, "%s+0x%lx", name, offset);</div><div class='add'>+	else</div><div class='add'>+		len = sprintf(str, "%s", name);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DINFO_FPRINTF(dinfo, ...)	\</div><div class='add'>+	((*(dinfo)-&gt;fprintf_func)((dinfo)-&gt;stream, __VA_ARGS__))</div><div class='add'>+</div><div class='add'>+static int disas_result_fprintf(struct disas_context *dctx,</div><div class='add'>+				const char *fmt, va_list ap)</div><div class='add'>+{</div><div class='add'>+	char *buf = dctx-&gt;result;</div><div class='add'>+	int avail, len;</div><div class='add'>+</div><div class='add'>+	len = strlen(buf);</div><div class='add'>+	if (len &gt;= DISAS_RESULT_SIZE - 1) {</div><div class='add'>+		WARN_FUNC(dctx-&gt;insn-&gt;sec, dctx-&gt;insn-&gt;offset,</div><div class='add'>+			  "disassembly buffer is full");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	avail = DISAS_RESULT_SIZE - len;</div><div class='add'>+</div><div class='add'>+	len = vsnprintf(buf + len, avail, fmt, ap);</div><div class='add'>+	if (len &lt; 0 || len &gt;= avail) {</div><div class='add'>+		WARN_FUNC(dctx-&gt;insn-&gt;sec, dctx-&gt;insn-&gt;offset,</div><div class='add'>+			  "disassembly buffer is truncated");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int disas_fprintf(void *stream, const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list arg;</div><div class='add'>+	int rv;</div><div class='add'>+</div><div class='add'>+	va_start(arg, fmt);</div><div class='add'>+	rv = disas_result_fprintf(stream, fmt, arg);</div><div class='add'>+	va_end(arg);</div><div class='add'>+</div><div class='add'>+	return rv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For init_disassemble_info_compat().</div><div class='add'>+ */</div><div class='add'>+static int disas_fprintf_styled(void *stream,</div><div class='add'>+				enum disassembler_style style,</div><div class='add'>+				const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	va_list arg;</div><div class='add'>+	int rv;</div><div class='add'>+</div><div class='add'>+	va_start(arg, fmt);</div><div class='add'>+	rv = disas_result_fprintf(stream, fmt, arg);</div><div class='add'>+	va_end(arg);</div><div class='add'>+</div><div class='add'>+	return rv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disas_print_addr_sym(struct section *sec, struct symbol *sym,</div><div class='add'>+				 bfd_vma addr, struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	char symstr[1024];</div><div class='add'>+	char *str;</div><div class='add'>+</div><div class='add'>+	if (sym) {</div><div class='add'>+		sprint_name(symstr, sym-&gt;name, addr - sym-&gt;offset);</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;%s&gt;", addr, symstr);</div><div class='add'>+	} else {</div><div class='add'>+		str = offstr(sec, addr);</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;%s&gt;", addr, str);</div><div class='add'>+		free(str);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool disas_print_addr_alt(bfd_vma addr, struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = dinfo-&gt;application_data;</div><div class='add'>+	struct instruction *orig_first_insn;</div><div class='add'>+	struct alt_group *alt_group;</div><div class='add'>+	unsigned long offset;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check if we are processing an alternative at the original</div><div class='add'>+	 * instruction address (i.e. if alt_applied is true) and if</div><div class='add'>+	 * we are referencing an address inside the alternative.</div><div class='add'>+	 *</div><div class='add'>+	 * For example, this happens if there is a branch inside an</div><div class='add'>+	 * alternative. In that case, the address should be updated</div><div class='add'>+	 * to a reference inside the original instruction flow.</div><div class='add'>+	 */</div><div class='add'>+	if (!dctx-&gt;alt_applied)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	alt_group = dctx-&gt;insn-&gt;alt_group;</div><div class='add'>+	if (!alt_group || !alt_group-&gt;orig_group ||</div><div class='add'>+	    addr &lt; alt_group-&gt;first_insn-&gt;offset ||</div><div class='add'>+	    addr &gt; alt_group-&gt;last_insn-&gt;offset)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	orig_first_insn = alt_group-&gt;orig_group-&gt;first_insn;</div><div class='add'>+	offset = addr - alt_group-&gt;first_insn-&gt;offset;</div><div class='add'>+</div><div class='add'>+	addr = orig_first_insn-&gt;offset + offset;</div><div class='add'>+	sym = orig_first_insn-&gt;sym;</div><div class='add'>+</div><div class='add'>+	disas_print_addr_sym(orig_first_insn-&gt;sec, sym, addr, dinfo);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disas_print_addr_noreloc(bfd_vma addr,</div><div class='add'>+				     struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = dinfo-&gt;application_data;</div><div class='add'>+	struct instruction *insn = dctx-&gt;insn;</div><div class='add'>+	struct symbol *sym = NULL;</div><div class='add'>+</div><div class='add'>+	if (disas_print_addr_alt(addr, dinfo))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;sym &amp;&amp; addr &gt;= insn-&gt;sym-&gt;offset &amp;&amp;</div><div class='add'>+	    addr &lt; insn-&gt;sym-&gt;offset + insn-&gt;sym-&gt;len) {</div><div class='add'>+		sym = insn-&gt;sym;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disas_print_addr_sym(insn-&gt;sec, sym, addr, dinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disas_print_addr_reloc(bfd_vma addr, struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = dinfo-&gt;application_data;</div><div class='add'>+	struct instruction *insn = dctx-&gt;insn;</div><div class='add'>+	unsigned long offset;</div><div class='add'>+	struct reloc *reloc;</div><div class='add'>+	char symstr[1024];</div><div class='add'>+	char *str;</div><div class='add'>+</div><div class='add'>+	reloc = find_reloc_by_dest_range(dctx-&gt;file-&gt;elf, insn-&gt;sec,</div><div class='add'>+					 insn-&gt;offset, insn-&gt;len);</div><div class='add'>+	if (!reloc) {</div><div class='add'>+		/*</div><div class='add'>+		 * There is no relocation for this instruction although</div><div class='add'>+		 * the address to resolve points to the next instruction.</div><div class='add'>+		 * So this is an effective reference to the next IP, for</div><div class='add'>+		 * example: "lea 0x0(%rip),%rdi". The kernel can reference</div><div class='add'>+		 * the next IP with _THIS_IP_ macro.</div><div class='add'>+		 */</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;_THIS_IP_&gt;", addr);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = arch_insn_adjusted_addend(insn, reloc);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the relocation symbol is a section name (for example ".bss")</div><div class='add'>+	 * then we try to further resolve the name.</div><div class='add'>+	 */</div><div class='add'>+	if (reloc-&gt;sym-&gt;type == STT_SECTION) {</div><div class='add'>+		str = offstr(reloc-&gt;sym-&gt;sec, reloc-&gt;sym-&gt;offset + offset);</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;%s&gt;", addr, str);</div><div class='add'>+		free(str);</div><div class='add'>+	} else {</div><div class='add'>+		sprint_name(symstr, reloc-&gt;sym-&gt;name, offset);</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;%s&gt;", addr, symstr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Resolve an address into a "&lt;symbol&gt;+&lt;offset&gt;" string.</div><div class='add'>+ */</div><div class='add'>+static void disas_print_address(bfd_vma addr, struct disassemble_info *dinfo)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = dinfo-&gt;application_data;</div><div class='add'>+	struct instruction *insn = dctx-&gt;insn;</div><div class='add'>+	struct instruction *jump_dest;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+	bool is_reloc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the instruction is a call/jump and it references a</div><div class='add'>+	 * destination then this is likely the address we are looking</div><div class='add'>+	 * up. So check it first.</div><div class='add'>+	 */</div><div class='add'>+	jump_dest = insn-&gt;jump_dest;</div><div class='add'>+	if (jump_dest &amp;&amp; jump_dest-&gt;sym &amp;&amp; jump_dest-&gt;offset == addr) {</div><div class='add'>+		if (!disas_print_addr_alt(addr, dinfo))</div><div class='add'>+			disas_print_addr_sym(jump_dest-&gt;sec, jump_dest-&gt;sym,</div><div class='add'>+					     addr, dinfo);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the address points to the next instruction then there is</div><div class='add'>+	 * probably a relocation. It can be a false positive when the</div><div class='add'>+	 * current instruction is referencing the address of the next</div><div class='add'>+	 * instruction. This particular case will be handled in</div><div class='add'>+	 * disas_print_addr_reloc().</div><div class='add'>+	 */</div><div class='add'>+	is_reloc = (addr == insn-&gt;offset + insn-&gt;len);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The call destination offset can be the address we are looking</div><div class='add'>+	 * up, or 0 if there is a relocation.</div><div class='add'>+	 */</div><div class='add'>+	sym = insn_call_dest(insn);</div><div class='add'>+	if (sym &amp;&amp; (sym-&gt;offset == addr || (sym-&gt;offset == 0 &amp;&amp; is_reloc))) {</div><div class='add'>+		DINFO_FPRINTF(dinfo, "0x%lx &lt;%s&gt;", addr, sym-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is_reloc)</div><div class='add'>+		disas_print_addr_noreloc(addr, dinfo);</div><div class='add'>+	else</div><div class='add'>+		disas_print_addr_reloc(addr, dinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize disassemble info arch, mach (32 or 64-bit) and options.</div><div class='add'>+ */</div><div class='add'>+int disas_info_init(struct disassemble_info *dinfo,</div><div class='add'>+		    int arch, int mach32, int mach64,</div><div class='add'>+		    const char *options)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx = dinfo-&gt;application_data;</div><div class='add'>+	struct objtool_file *file = dctx-&gt;file;</div><div class='add'>+</div><div class='add'>+	dinfo-&gt;arch = arch;</div><div class='add'>+</div><div class='add'>+	switch (file-&gt;elf-&gt;ehdr.e_ident[EI_CLASS]) {</div><div class='add'>+	case ELFCLASS32:</div><div class='add'>+		dinfo-&gt;mach = mach32;</div><div class='add'>+		break;</div><div class='add'>+	case ELFCLASS64:</div><div class='add'>+		dinfo-&gt;mach = mach64;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dinfo-&gt;disassembler_options = options;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct disas_context *disas_context_create(struct objtool_file *file)</div><div class='add'>+{</div><div class='add'>+	struct disas_context *dctx;</div><div class='add'>+	struct disassemble_info *dinfo;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dctx = malloc(sizeof(*dctx));</div><div class='add'>+	if (!dctx) {</div><div class='add'>+		WARN("failed to allocate disassembly context");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dctx-&gt;file = file;</div><div class='add'>+	dinfo = &amp;dctx-&gt;info;</div><div class='add'>+</div><div class='add'>+	init_disassemble_info_compat(dinfo, dctx,</div><div class='add'>+				     disas_fprintf, disas_fprintf_styled);</div><div class='add'>+</div><div class='add'>+	dinfo-&gt;read_memory_func = buffer_read_memory;</div><div class='add'>+	dinfo-&gt;print_address_func = disas_print_address;</div><div class='add'>+	dinfo-&gt;application_data = dctx;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * bfd_openr() is not used to avoid doing ELF data processing</div><div class='add'>+	 * and caching that has already being done. Here, we just need</div><div class='add'>+	 * to identify the target file so we call an arch specific</div><div class='add'>+	 * function to fill some disassemble info (arch, mach).</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	dinfo-&gt;arch = bfd_arch_unknown;</div><div class='add'>+	dinfo-&gt;mach = 0;</div><div class='add'>+</div><div class='add'>+	err = arch_disas_info_init(dinfo);</div><div class='add'>+	if (err || dinfo-&gt;arch == bfd_arch_unknown || dinfo-&gt;mach == 0) {</div><div class='add'>+		WARN("failed to init disassembly arch");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dinfo-&gt;endian = (file-&gt;elf-&gt;ehdr.e_ident[EI_DATA] == ELFDATA2MSB) ?</div><div class='add'>+		BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE;</div><div class='add'>+</div><div class='add'>+	disassemble_init_for_target(dinfo);</div><div class='add'>+</div><div class='add'>+	dctx-&gt;disassembler = disassembler(dinfo-&gt;arch,</div><div class='add'>+					  dinfo-&gt;endian == BFD_ENDIAN_BIG,</div><div class='add'>+					  dinfo-&gt;mach, NULL);</div><div class='add'>+	if (!dctx-&gt;disassembler) {</div><div class='add'>+		WARN("failed to create disassembler function");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dctx;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	free(dctx);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void disas_context_destroy(struct disas_context *dctx)</div><div class='add'>+{</div><div class='add'>+	free(dctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+char *disas_result(struct disas_context *dctx)</div><div class='add'>+{</div><div class='add'>+	return dctx-&gt;result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DISAS_INSN_OFFSET_SPACE		10</div><div class='add'>+#define DISAS_INSN_SPACE		60</div><div class='add'>+</div><div class='add'>+#define DISAS_PRINSN(dctx, insn, depth)			\</div><div class='add'>+	disas_print_insn(stdout, dctx, insn, depth, "\n")</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print a message in the instruction flow. If sec is not NULL then the</div><div class='add'>+ * address at the section offset is printed in addition of the message,</div><div class='add'>+ * otherwise only the message is printed.</div><div class='add'>+ */</div><div class='add'>+static int disas_vprint(FILE *stream, struct section *sec, unsigned long offset,</div><div class='add'>+			int depth, const char *format, va_list ap)</div><div class='add'>+{</div><div class='add'>+	const char *addr_str;</div><div class='add'>+	int i, n;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = sym_name_max_len + DISAS_INSN_OFFSET_SPACE;</div><div class='add'>+	if (depth &lt; 0) {</div><div class='add'>+		len += depth;</div><div class='add'>+		depth = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	n = 0;</div><div class='add'>+</div><div class='add'>+	if (sec) {</div><div class='add'>+		addr_str = offstr(sec, offset);</div><div class='add'>+		n += fprintf(stream, "%6lx:  %-*s  ", offset, len, addr_str);</div><div class='add'>+		free((char *)addr_str);</div><div class='add'>+	} else {</div><div class='add'>+		len += DISAS_INSN_OFFSET_SPACE + 1;</div><div class='add'>+		n += fprintf(stream, "%-*s", len, "");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* print vertical bars to show the code flow */</div><div class='add'>+	for (i = 0; i &lt; depth; i++)</div><div class='add'>+		n += fprintf(stream, "| ");</div><div class='add'>+</div><div class='add'>+	if (format)</div><div class='add'>+		n += vfprintf(stream, format, ap);</div><div class='add'>+</div><div class='add'>+	return n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int disas_print(FILE *stream, struct section *sec, unsigned long offset,</div><div class='add'>+			int depth, const char *format, ...)</div><div class='add'>+{</div><div class='add'>+	va_list args;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	va_start(args, format);</div><div class='add'>+	len = disas_vprint(stream, sec, offset, depth, format, args);</div><div class='add'>+	va_end(args);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print a message in the instruction flow. If insn is not NULL then</div><div class='add'>+ * the instruction address is printed in addition of the message,</div><div class='add'>+ * otherwise only the message is printed. In all cases, the instruction</div><div class='add'>+ * itself is not printed.</div><div class='add'>+ */</div><div class='add'>+void disas_print_info(FILE *stream, struct instruction *insn, int depth,</div><div class='add'>+		      const char *format, ...)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+	unsigned long off;</div><div class='add'>+	va_list args;</div><div class='add'>+</div><div class='add'>+	if (insn) {</div><div class='add'>+		sec = insn-&gt;sec;</div><div class='add'>+		off = insn-&gt;offset;</div><div class='add'>+	} else {</div><div class='add'>+		sec = NULL;</div><div class='add'>+		off = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	va_start(args, format);</div><div class='add'>+	disas_vprint(stream, sec, off, depth, format, args);</div><div class='add'>+	va_end(args);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print an instruction address (offset and function), the instruction itself</div><div class='add'>+ * and an optional message.</div><div class='add'>+ */</div><div class='add'>+void disas_print_insn(FILE *stream, struct disas_context *dctx,</div><div class='add'>+		      struct instruction *insn, int depth,</div><div class='add'>+		      const char *format, ...)</div><div class='add'>+{</div><div class='add'>+	char fake_nop_insn[32];</div><div class='add'>+	const char *insn_str;</div><div class='add'>+	bool fake_nop;</div><div class='add'>+	va_list args;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Alternative can insert a fake nop, sometimes with no</div><div class='add'>+	 * associated section so nothing to disassemble.</div><div class='add'>+	 */</div><div class='add'>+	fake_nop = (!insn-&gt;sec &amp;&amp; insn-&gt;type == INSN_NOP);</div><div class='add'>+	if (fake_nop) {</div><div class='add'>+		snprintf(fake_nop_insn, 32, "&lt;fake nop&gt; (%d bytes)", insn-&gt;len);</div><div class='add'>+		insn_str = fake_nop_insn;</div><div class='add'>+	} else {</div><div class='add'>+		disas_insn(dctx, insn);</div><div class='add'>+		insn_str = disas_result(dctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* print the instruction */</div><div class='add'>+	len = (depth + 1) * 2 &lt; DISAS_INSN_SPACE ? DISAS_INSN_SPACE - (depth+1) * 2 : 1;</div><div class='add'>+	disas_print_info(stream, insn, depth, "%-*s", len, insn_str);</div><div class='add'>+</div><div class='add'>+	/* print message if any */</div><div class='add'>+	if (!format)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (strcmp(format, "\n") == 0) {</div><div class='add'>+		fprintf(stream, "\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(stream, " - ");</div><div class='add'>+	va_start(args, format);</div><div class='add'>+	vfprintf(stream, format, args);</div><div class='add'>+	va_end(args);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble a single instruction. Return the size of the instruction.</div><div class='add'>+ *</div><div class='add'>+ * If alt_applied is true then insn should be an instruction from of an</div><div class='add'>+ * alternative (i.e. insn-&gt;alt_group != NULL), and it is disassembled</div><div class='add'>+ * at the location of the original code it is replacing. When the</div><div class='add'>+ * instruction references any address inside the alternative then</div><div class='add'>+ * these references will be re-adjusted to replace the original code.</div><div class='add'>+ */</div><div class='add'>+static size_t disas_insn_common(struct disas_context *dctx,</div><div class='add'>+				struct instruction *insn,</div><div class='add'>+				bool alt_applied)</div><div class='add'>+{</div><div class='add'>+	disassembler_ftype disasm = dctx-&gt;disassembler;</div><div class='add'>+	struct disassemble_info *dinfo = &amp;dctx-&gt;info;</div><div class='add'>+</div><div class='add'>+	dctx-&gt;insn = insn;</div><div class='add'>+	dctx-&gt;alt_applied = alt_applied;</div><div class='add'>+	dctx-&gt;result[0] = '\0';</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;type == INSN_NOP) {</div><div class='add'>+		DINFO_FPRINTF(dinfo, "nop%d", insn-&gt;len);</div><div class='add'>+		return insn-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set the disassembler buffer to read data from the section</div><div class='add'>+	 * containing the instruction to disassemble.</div><div class='add'>+	 */</div><div class='add'>+	dinfo-&gt;buffer = insn-&gt;sec-&gt;data-&gt;d_buf;</div><div class='add'>+	dinfo-&gt;buffer_vma = 0;</div><div class='add'>+	dinfo-&gt;buffer_length = insn-&gt;sec-&gt;sh.sh_size;</div><div class='add'>+</div><div class='add'>+	return disasm(insn-&gt;offset, &amp;dctx-&gt;info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t disas_insn(struct disas_context *dctx, struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	return disas_insn_common(dctx, insn, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t disas_insn_alt(struct disas_context *dctx,</div><div class='add'>+			     struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	return disas_insn_common(dctx, insn, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct instruction *next_insn_same_alt(struct objtool_file *file,</div><div class='add'>+					      struct alt_group *alt_grp,</div><div class='add'>+					      struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	if (alt_grp-&gt;last_insn == insn || alt_grp-&gt;nop == insn)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return next_insn_same_sec(file, insn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define alt_for_each_insn(file, alt_grp, insn)			\</div><div class='add'>+	for (insn = alt_grp-&gt;first_insn; 			\</div><div class='add'>+	     insn;						\</div><div class='add'>+	     insn = next_insn_same_alt(file, alt_grp, insn))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Provide a name for the type of alternatives present at the</div><div class='add'>+ * specified instruction.</div><div class='add'>+ *</div><div class='add'>+ * An instruction can have alternatives with different types, for</div><div class='add'>+ * example alternative instructions and an exception table. In that</div><div class='add'>+ * case the name for the alternative instructions type is used.</div><div class='add'>+ *</div><div class='add'>+ * Return NULL if the instruction as no alternative.</div><div class='add'>+ */</div><div class='add'>+const char *disas_alt_type_name(struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	struct alternative *alt;</div><div class='add'>+	const char *name;</div><div class='add'>+</div><div class='add'>+	name = NULL;</div><div class='add'>+	for (alt = insn-&gt;alts; alt; alt = alt-&gt;next) {</div><div class='add'>+		if (alt-&gt;type == ALT_TYPE_INSTRUCTIONS) {</div><div class='add'>+			name = "alternative";</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (alt-&gt;type) {</div><div class='add'>+		case ALT_TYPE_EX_TABLE:</div><div class='add'>+			name = "ex_table";</div><div class='add'>+			break;</div><div class='add'>+		case ALT_TYPE_JUMP_TABLE:</div><div class='add'>+			name = "jump_table";</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			name = "unknown";</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Provide a name for an alternative.</div><div class='add'>+ */</div><div class='add'>+char *disas_alt_name(struct alternative *alt)</div><div class='add'>+{</div><div class='add'>+	char pfx[4] = { 0 };</div><div class='add'>+	char *str = NULL;</div><div class='add'>+	const char *name;</div><div class='add'>+	int feature;</div><div class='add'>+	int flags;</div><div class='add'>+	int num;</div><div class='add'>+</div><div class='add'>+	switch (alt-&gt;type) {</div><div class='add'>+</div><div class='add'>+	case ALT_TYPE_EX_TABLE:</div><div class='add'>+		str = strdup("EXCEPTION");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ALT_TYPE_JUMP_TABLE:</div><div class='add'>+		str = strdup("JUMP");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ALT_TYPE_INSTRUCTIONS:</div><div class='add'>+		/*</div><div class='add'>+		 * This is a non-default group alternative. Create a name</div><div class='add'>+		 * based on the feature and flags associated with this</div><div class='add'>+		 * alternative. Use either the feature name (it is available)</div><div class='add'>+		 * or the feature number. And add a prefix to show the flags</div><div class='add'>+		 * used.</div><div class='add'>+		 *</div><div class='add'>+		 * Prefix flags characters:</div><div class='add'>+		 *</div><div class='add'>+		 *   '!'  alternative used when feature not enabled</div><div class='add'>+		 *   '+'  direct call alternative</div><div class='add'>+		 *   '?'  unknown flag</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		if (!alt-&gt;insn-&gt;alt_group)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		feature = alt-&gt;insn-&gt;alt_group-&gt;feature;</div><div class='add'>+		num = alt_feature(feature);</div><div class='add'>+		flags = alt_flags(feature);</div><div class='add'>+		str = pfx;</div><div class='add'>+</div><div class='add'>+		if (flags &amp; ~(ALT_FLAG_NOT | ALT_FLAG_DIRECT_CALL))</div><div class='add'>+			*str++ = '?';</div><div class='add'>+		if (flags &amp; ALT_FLAG_DIRECT_CALL)</div><div class='add'>+			*str++ = '+';</div><div class='add'>+		if (flags &amp; ALT_FLAG_NOT)</div><div class='add'>+			*str++ = '!';</div><div class='add'>+</div><div class='add'>+		name = arch_cpu_feature_name(num);</div><div class='add'>+		if (!name)</div><div class='add'>+			str = strfmt("%sFEATURE 0x%X", pfx, num);</div><div class='add'>+		else</div><div class='add'>+			str = strfmt("%s%s", pfx, name);</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return str;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize an alternative. The default alternative should be initialized</div><div class='add'>+ * with alt=NULL.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_init(struct disas_alt *dalt,</div><div class='add'>+			  struct instruction *orig_insn,</div><div class='add'>+			  struct alternative *alt)</div><div class='add'>+{</div><div class='add'>+	dalt-&gt;orig_insn = orig_insn;</div><div class='add'>+	dalt-&gt;alt = alt;</div><div class='add'>+	dalt-&gt;insn_idx = 0;</div><div class='add'>+	dalt-&gt;name = alt ? disas_alt_name(alt) : strdup("DEFAULT");</div><div class='add'>+	if (!dalt-&gt;name)</div><div class='add'>+		return -1;</div><div class='add'>+	dalt-&gt;width = strlen(dalt-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int disas_alt_add_insn(struct disas_alt *dalt, int index, char *insn_str,</div><div class='add'>+			      int offset, int nops)</div><div class='add'>+{</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= DISAS_ALT_INSN_MAX) {</div><div class='add'>+		WARN("Alternative %lx.%s has more instructions than supported",</div><div class='add'>+		     DALT_ALTID(dalt), dalt-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = strlen(insn_str);</div><div class='add'>+	dalt-&gt;insn[index].str = insn_str;</div><div class='add'>+	dalt-&gt;insn[index].offset = offset;</div><div class='add'>+	dalt-&gt;insn[index].nops = nops;</div><div class='add'>+	if (len &gt; dalt-&gt;width)</div><div class='add'>+		dalt-&gt;width = len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int disas_alt_jump(struct disas_alt *dalt)</div><div class='add'>+{</div><div class='add'>+	struct instruction *orig_insn;</div><div class='add'>+	struct instruction *dest_insn;</div><div class='add'>+	char suffix[2] = { 0 };</div><div class='add'>+	char *str;</div><div class='add'>+	int nops;</div><div class='add'>+</div><div class='add'>+	orig_insn = dalt-&gt;orig_insn;</div><div class='add'>+	dest_insn = dalt-&gt;alt-&gt;insn;</div><div class='add'>+</div><div class='add'>+	if (orig_insn-&gt;type == INSN_NOP) {</div><div class='add'>+		if (orig_insn-&gt;len == 5)</div><div class='add'>+			suffix[0] = 'q';</div><div class='add'>+		str = strfmt("jmp%-3s %lx &lt;%s+0x%lx&gt;", suffix,</div><div class='add'>+			     dest_insn-&gt;offset, dest_insn-&gt;sym-&gt;name,</div><div class='add'>+			     dest_insn-&gt;offset - dest_insn-&gt;sym-&gt;offset);</div><div class='add'>+		nops = 0;</div><div class='add'>+	} else {</div><div class='add'>+		str = strfmt("nop%d", orig_insn-&gt;len);</div><div class='add'>+		nops = orig_insn-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!str)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	disas_alt_add_insn(dalt, 0, str, 0, nops);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble an exception table alternative.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_extable(struct disas_alt *dalt)</div><div class='add'>+{</div><div class='add'>+	struct instruction *alt_insn;</div><div class='add'>+	char *str;</div><div class='add'>+</div><div class='add'>+	alt_insn = dalt-&gt;alt-&gt;insn;</div><div class='add'>+	str = strfmt("resume at 0x%lx &lt;%s+0x%lx&gt;",</div><div class='add'>+		     alt_insn-&gt;offset, alt_insn-&gt;sym-&gt;name,</div><div class='add'>+		     alt_insn-&gt;offset - alt_insn-&gt;sym-&gt;offset);</div><div class='add'>+	if (!str)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	disas_alt_add_insn(dalt, 0, str, 0, 0);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble an alternative and store instructions in the disas_alt</div><div class='add'>+ * structure. Return the number of instructions in the alternative.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_group(struct disas_context *dctx, struct disas_alt *dalt)</div><div class='add'>+{</div><div class='add'>+	struct objtool_file *file;</div><div class='add'>+	struct instruction *insn;</div><div class='add'>+	int offset;</div><div class='add'>+	char *str;</div><div class='add'>+	int count;</div><div class='add'>+	int nops;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	file = dctx-&gt;file;</div><div class='add'>+	count = 0;</div><div class='add'>+	offset = 0;</div><div class='add'>+	nops = 0;</div><div class='add'>+</div><div class='add'>+	alt_for_each_insn(file, DALT_GROUP(dalt), insn) {</div><div class='add'>+</div><div class='add'>+		disas_insn_alt(dctx, insn);</div><div class='add'>+		str = strdup(disas_result(dctx));</div><div class='add'>+		if (!str)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		nops = insn-&gt;type == INSN_NOP ? insn-&gt;len : 0;</div><div class='add'>+		err = disas_alt_add_insn(dalt, count, str, offset, nops);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+		offset += insn-&gt;len;</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble the default alternative.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_default(struct disas_context *dctx, struct disas_alt *dalt)</div><div class='add'>+{</div><div class='add'>+	char *str;</div><div class='add'>+	int nops;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (DALT_GROUP(dalt))</div><div class='add'>+		return disas_alt_group(dctx, dalt);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Default alternative with no alt_group: this is the default</div><div class='add'>+	 * code associated with either a jump table or an exception</div><div class='add'>+	 * table and no other instruction alternatives. In that case</div><div class='add'>+	 * the default alternative is made of a single instruction.</div><div class='add'>+	 */</div><div class='add'>+	disas_insn(dctx, dalt-&gt;orig_insn);</div><div class='add'>+	str = strdup(disas_result(dctx));</div><div class='add'>+	if (!str)</div><div class='add'>+		return -1;</div><div class='add'>+	nops = dalt-&gt;orig_insn-&gt;type == INSN_NOP ? dalt-&gt;orig_insn-&gt;len : 0;</div><div class='add'>+	err = disas_alt_add_insn(dalt, 0, str, 0, nops);</div><div class='add'>+	if (err)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For each alternative, if there is an instruction at the specified</div><div class='add'>+ * offset then print this instruction, otherwise print a blank entry.</div><div class='add'>+ * The offset is an offset from the start of the alternative.</div><div class='add'>+ *</div><div class='add'>+ * Return the offset for the next instructions to print, or -1 if all</div><div class='add'>+ * instructions have been printed.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_print_insn(struct disas_alt *dalts, int alt_count,</div><div class='add'>+				int insn_count, int offset)</div><div class='add'>+{</div><div class='add'>+	struct disas_alt *dalt;</div><div class='add'>+	int offset_next;</div><div class='add'>+	char *str;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	offset_next = -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+		dalt = &amp;dalts[i];</div><div class='add'>+		j = dalt-&gt;insn_idx;</div><div class='add'>+		if (j == -1) {</div><div class='add'>+			printf("| %-*s ", dalt-&gt;width, "");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dalt-&gt;insn[j].offset == offset) {</div><div class='add'>+			str = dalt-&gt;insn[j].str;</div><div class='add'>+			printf("| %-*s ", dalt-&gt;width, str ?: "");</div><div class='add'>+			if (++j &lt; insn_count) {</div><div class='add'>+				dalt-&gt;insn_idx = j;</div><div class='add'>+			} else {</div><div class='add'>+				dalt-&gt;insn_idx = -1;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			printf("| %-*s ", dalt-&gt;width, "");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dalt-&gt;insn[j].offset &gt; 0 &amp;&amp;</div><div class='add'>+		    (offset_next == -1 ||</div><div class='add'>+		     (dalt-&gt;insn[j].offset &lt; offset_next)))</div><div class='add'>+			offset_next = dalt-&gt;insn[j].offset;</div><div class='add'>+	}</div><div class='add'>+	printf("\n");</div><div class='add'>+</div><div class='add'>+	return offset_next;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print all alternatives side-by-side.</div><div class='add'>+ */</div><div class='add'>+static void disas_alt_print_wide(char *alt_name, struct disas_alt *dalts, int alt_count,</div><div class='add'>+				 int insn_count)</div><div class='add'>+{</div><div class='add'>+	struct instruction *orig_insn;</div><div class='add'>+	int offset_next;</div><div class='add'>+	int offset;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	orig_insn = dalts[0].orig_insn;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Print an header with the name of each alternative.</div><div class='add'>+	 */</div><div class='add'>+	disas_print_info(stdout, orig_insn, -2, NULL);</div><div class='add'>+</div><div class='add'>+	if (strlen(alt_name) &gt; dalts[0].width)</div><div class='add'>+		dalts[0].width = strlen(alt_name);</div><div class='add'>+	printf("| %-*s ", dalts[0].width, alt_name);</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; alt_count; i++)</div><div class='add'>+		printf("| %-*s ", dalts[i].width, dalts[i].name);</div><div class='add'>+</div><div class='add'>+	printf("\n");</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Print instructions for each alternative.</div><div class='add'>+	 */</div><div class='add'>+	offset_next = 0;</div><div class='add'>+	do {</div><div class='add'>+		offset = offset_next;</div><div class='add'>+		disas_print(stdout, orig_insn-&gt;sec, orig_insn-&gt;offset + offset,</div><div class='add'>+			    -2, NULL);</div><div class='add'>+		offset_next = disas_alt_print_insn(dalts, alt_count, insn_count,</div><div class='add'>+						   offset);</div><div class='add'>+	} while (offset_next &gt; offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print all alternatives one above the other.</div><div class='add'>+ */</div><div class='add'>+static void disas_alt_print_compact(char *alt_name, struct disas_alt *dalts,</div><div class='add'>+				    int alt_count, int insn_count)</div><div class='add'>+{</div><div class='add'>+	struct instruction *orig_insn;</div><div class='add'>+	int width;</div><div class='add'>+	int i, j;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	orig_insn = dalts[0].orig_insn;</div><div class='add'>+</div><div class='add'>+	len = disas_print(stdout, orig_insn-&gt;sec, orig_insn-&gt;offset, 0, NULL);</div><div class='add'>+	printf("%s\n", alt_name);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If all alternatives have a single instruction then print each</div><div class='add'>+	 * alternative on a single line. Otherwise, print alternatives</div><div class='add'>+	 * one above the other with a clear separation.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (insn_count == 1) {</div><div class='add'>+		width = 0;</div><div class='add'>+		for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+			if (dalts[i].width &gt; width)</div><div class='add'>+				width = dalts[i].width;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+			printf("%*s= %-*s    (if %s)\n", len, "", width,</div><div class='add'>+			       dalts[i].insn[0].str, dalts[i].name);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+		printf("%*s= %s\n", len, "", dalts[i].name);</div><div class='add'>+		for (j = 0; j &lt; insn_count; j++) {</div><div class='add'>+			if (!dalts[i].insn[j].str)</div><div class='add'>+				break;</div><div class='add'>+			disas_print(stdout, orig_insn-&gt;sec,</div><div class='add'>+				    orig_insn-&gt;offset + dalts[i].insn[j].offset, 0,</div><div class='add'>+				    "| %s\n", dalts[i].insn[j].str);</div><div class='add'>+		}</div><div class='add'>+		printf("%*s|\n", len, "");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Trim NOPs in alternatives. This replaces trailing NOPs in alternatives</div><div class='add'>+ * with a single indication of the number of bytes covered with NOPs.</div><div class='add'>+ *</div><div class='add'>+ * Return the maximum numbers of instructions in all alternatives after</div><div class='add'>+ * trailing NOPs have been trimmed.</div><div class='add'>+ */</div><div class='add'>+static int disas_alt_trim_nops(struct disas_alt *dalts, int alt_count,</div><div class='add'>+			       int insn_count)</div><div class='add'>+{</div><div class='add'>+	struct disas_alt *dalt;</div><div class='add'>+	int nops_count;</div><div class='add'>+	const char *s;</div><div class='add'>+	int offset;</div><div class='add'>+	int count;</div><div class='add'>+	int nops;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	count = 0;</div><div class='add'>+	for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+		offset = 0;</div><div class='add'>+		nops = 0;</div><div class='add'>+		nops_count = 0;</div><div class='add'>+		dalt = &amp;dalts[i];</div><div class='add'>+		for (j = insn_count - 1; j &gt;= 0; j--) {</div><div class='add'>+			if (!dalt-&gt;insn[j].str || !dalt-&gt;insn[j].nops)</div><div class='add'>+				break;</div><div class='add'>+			offset = dalt-&gt;insn[j].offset;</div><div class='add'>+			free(dalt-&gt;insn[j].str);</div><div class='add'>+			dalt-&gt;insn[j].offset = 0;</div><div class='add'>+			dalt-&gt;insn[j].str = NULL;</div><div class='add'>+			nops += dalt-&gt;insn[j].nops;</div><div class='add'>+			nops_count++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * All trailing NOPs have been removed. If there was a single</div><div class='add'>+		 * NOP instruction then re-add it. If there was a block of</div><div class='add'>+		 * NOPs then indicate the number of bytes than the block</div><div class='add'>+		 * covers (nop*&lt;number-of-bytes&gt;).</div><div class='add'>+		 */</div><div class='add'>+		if (nops_count) {</div><div class='add'>+			s = nops_count == 1 ? "" : "*";</div><div class='add'>+			dalt-&gt;insn[j + 1].str = strfmt("nop%s%d", s, nops);</div><div class='add'>+			dalt-&gt;insn[j + 1].offset = offset;</div><div class='add'>+			dalt-&gt;insn[j + 1].nops = nops;</div><div class='add'>+			j++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j &gt; count)</div><div class='add'>+			count = j;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble an alternative.</div><div class='add'>+ *</div><div class='add'>+ * Return the last instruction in the default alternative so that</div><div class='add'>+ * disassembly can continue with the next instruction. Return NULL</div><div class='add'>+ * on error.</div><div class='add'>+ */</div><div class='add'>+static void *disas_alt(struct disas_context *dctx,</div><div class='add'>+		       struct instruction *orig_insn)</div><div class='add'>+{</div><div class='add'>+	struct disas_alt dalts[DISAS_ALT_MAX] = { 0 };</div><div class='add'>+	struct instruction *last_insn = NULL;</div><div class='add'>+	struct alternative *alt;</div><div class='add'>+	struct disas_alt *dalt;</div><div class='add'>+	int insn_count = 0;</div><div class='add'>+	int alt_count = 0;</div><div class='add'>+	char *alt_name;</div><div class='add'>+	int count;</div><div class='add'>+	int i, j;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	alt_name = strfmt("&lt;%s.%lx&gt;", disas_alt_type_name(orig_insn),</div><div class='add'>+			  orig_insn-&gt;offset);</div><div class='add'>+	if (!alt_name) {</div><div class='add'>+		WARN("Failed to define name for alternative at instruction 0x%lx",</div><div class='add'>+		     orig_insn-&gt;offset);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize and disassemble the default alternative.</div><div class='add'>+	 */</div><div class='add'>+	err = disas_alt_init(&amp;dalts[0], orig_insn, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		WARN("%s: failed to initialize default alternative", alt_name);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	insn_count = disas_alt_default(dctx, &amp;dalts[0]);</div><div class='add'>+	if (insn_count &lt; 0) {</div><div class='add'>+		WARN("%s: failed to disassemble default alternative", alt_name);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize and disassemble all other alternatives.</div><div class='add'>+	 */</div><div class='add'>+	i = 1;</div><div class='add'>+	for (alt = orig_insn-&gt;alts; alt; alt = alt-&gt;next) {</div><div class='add'>+		if (i &gt;= DISAS_ALT_MAX) {</div><div class='add'>+			WARN("%s has more alternatives than supported", alt_name);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dalt = &amp;dalts[i];</div><div class='add'>+		err = disas_alt_init(dalt, orig_insn, alt);</div><div class='add'>+		if (err) {</div><div class='add'>+			WARN("%s: failed to disassemble alternative", alt_name);</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		count = -1;</div><div class='add'>+		switch (dalt-&gt;alt-&gt;type) {</div><div class='add'>+		case ALT_TYPE_INSTRUCTIONS:</div><div class='add'>+			count = disas_alt_group(dctx, dalt);</div><div class='add'>+			break;</div><div class='add'>+		case ALT_TYPE_EX_TABLE:</div><div class='add'>+			count = disas_alt_extable(dalt);</div><div class='add'>+			break;</div><div class='add'>+		case ALT_TYPE_JUMP_TABLE:</div><div class='add'>+			count = disas_alt_jump(dalt);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (count &lt; 0) {</div><div class='add'>+			WARN("%s: failed to disassemble alternative %s",</div><div class='add'>+			     alt_name, dalt-&gt;name);</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		insn_count = count &gt; insn_count ? count : insn_count;</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+	alt_count = i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Print default and non-default alternatives.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	insn_count = disas_alt_trim_nops(dalts, alt_count, insn_count);</div><div class='add'>+</div><div class='add'>+	if (opts.wide)</div><div class='add'>+		disas_alt_print_wide(alt_name, dalts, alt_count, insn_count);</div><div class='add'>+	else</div><div class='add'>+		disas_alt_print_compact(alt_name, dalts, alt_count, insn_count);</div><div class='add'>+</div><div class='add'>+	last_insn = orig_insn-&gt;alt_group ? orig_insn-&gt;alt_group-&gt;last_insn :</div><div class='add'>+		orig_insn;</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	for (i = 0; i &lt; alt_count; i++) {</div><div class='add'>+		free(dalts[i].name);</div><div class='add'>+		for (j = 0; j &lt; insn_count; j++)</div><div class='add'>+			free(dalts[i].insn[j].str);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(alt_name);</div><div class='add'>+</div><div class='add'>+	return last_insn;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble a function.</div><div class='add'>+ */</div><div class='add'>+static void disas_func(struct disas_context *dctx, struct symbol *func)</div><div class='add'>+{</div><div class='add'>+	struct instruction *insn_start;</div><div class='add'>+	struct instruction *insn;</div><div class='add'>+</div><div class='add'>+	printf("%s:\n", func-&gt;name);</div><div class='add'>+	sym_for_each_insn(dctx-&gt;file, func, insn) {</div><div class='add'>+		if (insn-&gt;alts) {</div><div class='add'>+			insn_start = insn;</div><div class='add'>+			insn = disas_alt(dctx, insn);</div><div class='add'>+			if (insn)</div><div class='add'>+				continue;</div><div class='add'>+			/*</div><div class='add'>+			 * There was an error with disassembling</div><div class='add'>+			 * the alternative. Resume disassembling</div><div class='add'>+			 * at the current instruction, this will</div><div class='add'>+			 * disassemble the default alternative</div><div class='add'>+			 * only and continue with the code after</div><div class='add'>+			 * the alternative.</div><div class='add'>+			 */</div><div class='add'>+			insn = insn_start;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		DISAS_PRINSN(dctx, insn, 0);</div><div class='add'>+	}</div><div class='add'>+	printf("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Disassemble all warned functions.</div><div class='add'>+ */</div><div class='add'>+void disas_warned_funcs(struct disas_context *dctx)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	if (!dctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for_each_sym(dctx-&gt;file-&gt;elf, sym) {</div><div class='add'>+		if (sym-&gt;warned)</div><div class='add'>+			disas_func(dctx, sym);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void disas_funcs(struct disas_context *dctx)</div><div class='add'>+{</div><div class='add'>+	bool disas_all = !strcmp(opts.disas, "*");</div><div class='add'>+	struct section *sec;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	for_each_sec(dctx-&gt;file-&gt;elf, sec) {</div><div class='add'>+</div><div class='add'>+		if (!(sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		sec_for_each_sym(sec, sym) {</div><div class='add'>+			/*</div><div class='add'>+			 * If the function had a warning and the verbose</div><div class='add'>+			 * option is used then the function was already</div><div class='add'>+			 * disassemble.</div><div class='add'>+			 */</div><div class='add'>+			if (opts.verbose &amp;&amp; sym-&gt;warned)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (disas_all || fnmatch(opts.disas, sym-&gt;name, 0) == 0)</div><div class='add'>+				disas_func(dctx, sym);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/elf.c b/tools/objtool/elf.c<br/>index ca5d77db692a..6a8ed9c62323 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/elf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/elf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/elf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/elf.c</a></div><div class='hunk'>@@ -16,12 +16,17 @@</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='add'>+#include &lt;libgen.h&gt;</div><div class='add'>+#include &lt;ctype.h&gt;</div><div class='ctx'> #include &lt;linux/interval_tree_generic.h&gt;</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;objtool/elf.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='ctx'> </div><div class='add'>+#define ALIGN_UP(x, align_to) (((x) + ((align_to)-1)) &amp; ~((align_to)-1))</div><div class='add'>+#define ALIGN_UP_POW2(x) (1U &lt;&lt; ((8 * sizeof(x)) - __builtin_clz((x) - 1U)))</div><div class='add'>+#define MAX(a, b) ((a) &gt; (b) ? (a) : (b))</div><div class='add'>+</div><div class='ctx'> static inline u32 str_hash(const char *str)</div><div class='ctx'> {</div><div class='ctx'> 	return jhash(str, strlen(str), 0);</div><div class='hunk'>@@ -92,11 +97,12 @@ static inline unsigned long __sym_start(struct symbol *s)</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long __sym_last(struct symbol *s)</div><div class='ctx'> {</div><div class='del'>-	return s-&gt;offset + s-&gt;len - 1;</div><div class='add'>+	return s-&gt;offset + (s-&gt;len ? s-&gt;len - 1 : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> INTERVAL_TREE_DEFINE(struct symbol, node, unsigned long, __subtree_last,</div><div class='del'>-		     __sym_start, __sym_last, static, __sym)</div><div class='add'>+		     __sym_start, __sym_last, static inline __maybe_unused,</div><div class='add'>+		     __sym)</div><div class='ctx'> </div><div class='ctx'> #define __sym_for_each(_iter, _tree, _start, _end)			\</div><div class='ctx'> 	for (_iter = __sym_iter_first((_tree), (_start), (_end));	\</div><div class='hunk'>@@ -108,7 +114,7 @@ struct symbol_hole {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Find !section symbol where @offset is after it.</div><div class='add'>+ * Find the last symbol before @offset.</div><div class='ctx'>  */</div><div class='ctx'> static int symbol_hole_by_offset(const void *key, const struct rb_node *node)</div><div class='ctx'> {</div><div class='hunk'>@@ -119,8 +125,7 @@ static int symbol_hole_by_offset(const void *key, const struct rb_node *node)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	if (sh-&gt;key &gt;= s-&gt;offset + s-&gt;len) {</div><div class='del'>-		if (s-&gt;type != STT_SECTION)</div><div class='del'>-			sh-&gt;sym = s;</div><div class='add'>+		sh-&gt;sym = s;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -167,11 +172,11 @@ static struct symbol *find_symbol_by_index(struct elf *elf, unsigned int idx)</div><div class='ctx'> struct symbol *find_symbol_by_offset(struct section *sec, unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_root_cached *tree = (struct rb_root_cached *)&amp;sec-&gt;symbol_tree;</div><div class='del'>-	struct symbol *iter;</div><div class='add'>+	struct symbol *sym;</div><div class='ctx'> </div><div class='del'>-	__sym_for_each(iter, tree, offset, offset) {</div><div class='del'>-		if (iter-&gt;offset == offset &amp;&amp; iter-&gt;type != STT_SECTION)</div><div class='del'>-			return iter;</div><div class='add'>+	__sym_for_each(sym, tree, offset, offset) {</div><div class='add'>+		if (sym-&gt;offset == offset &amp;&amp; !is_sec_sym(sym))</div><div class='add'>+			return sym-&gt;alias;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -180,11 +185,11 @@ struct symbol *find_symbol_by_offset(struct section *sec, unsigned long offset)</div><div class='ctx'> struct symbol *find_func_by_offset(struct section *sec, unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_root_cached *tree = (struct rb_root_cached *)&amp;sec-&gt;symbol_tree;</div><div class='del'>-	struct symbol *iter;</div><div class='add'>+	struct symbol *func;</div><div class='ctx'> </div><div class='del'>-	__sym_for_each(iter, tree, offset, offset) {</div><div class='del'>-		if (iter-&gt;offset == offset &amp;&amp; iter-&gt;type == STT_FUNC)</div><div class='del'>-			return iter;</div><div class='add'>+	__sym_for_each(func, tree, offset, offset) {</div><div class='add'>+		if (func-&gt;offset == offset &amp;&amp; is_func_sym(func))</div><div class='add'>+			return func-&gt;alias;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -193,14 +198,29 @@ struct symbol *find_func_by_offset(struct section *sec, unsigned long offset)</div><div class='ctx'> struct symbol *find_symbol_containing(const struct section *sec, unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_root_cached *tree = (struct rb_root_cached *)&amp;sec-&gt;symbol_tree;</div><div class='del'>-	struct symbol *iter;</div><div class='add'>+	struct symbol *sym = NULL, *tmp;</div><div class='ctx'> </div><div class='del'>-	__sym_for_each(iter, tree, offset, offset) {</div><div class='del'>-		if (iter-&gt;type != STT_SECTION)</div><div class='del'>-			return iter;</div><div class='add'>+	__sym_for_each(tmp, tree, offset, offset) {</div><div class='add'>+		if (tmp-&gt;len) {</div><div class='add'>+			if (!sym) {</div><div class='add'>+				sym = tmp;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (sym-&gt;offset != tmp-&gt;offset || sym-&gt;len != tmp-&gt;len) {</div><div class='add'>+				/*</div><div class='add'>+				 * In the rare case of overlapping symbols,</div><div class='add'>+				 * pick the smaller one.</div><div class='add'>+				 *</div><div class='add'>+				 * TODO: outlaw overlapping symbols</div><div class='add'>+				 */</div><div class='add'>+				if (tmp-&gt;len &lt; sym-&gt;len)</div><div class='add'>+					sym = tmp;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return NULL;</div><div class='add'>+	return sym ? sym-&gt;alias : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -246,11 +266,11 @@ int find_symbol_hole_containing(const struct section *sec, unsigned long offset)</div><div class='ctx'> struct symbol *find_func_containing(struct section *sec, unsigned long offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_root_cached *tree = (struct rb_root_cached *)&amp;sec-&gt;symbol_tree;</div><div class='del'>-	struct symbol *iter;</div><div class='add'>+	struct symbol *func;</div><div class='ctx'> </div><div class='del'>-	__sym_for_each(iter, tree, offset, offset) {</div><div class='del'>-		if (iter-&gt;type == STT_FUNC)</div><div class='del'>-			return iter;</div><div class='add'>+	__sym_for_each(func, tree, offset, offset) {</div><div class='add'>+		if (is_func_sym(func))</div><div class='add'>+			return func-&gt;alias;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -268,6 +288,35 @@ struct symbol *find_symbol_by_name(const struct elf *elf, const char *name)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Find local symbol with matching STT_FILE */</div><div class='add'>+static struct symbol *find_local_symbol_by_file_and_name(const struct elf *elf,</div><div class='add'>+							 struct symbol *file,</div><div class='add'>+							 const char *name)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	elf_hash_for_each_possible(symbol_name, sym, name_hash, str_hash(name)) {</div><div class='add'>+		if (sym-&gt;bind == STB_LOCAL &amp;&amp; sym-&gt;file == file &amp;&amp;</div><div class='add'>+		    !strcmp(sym-&gt;name, name)) {</div><div class='add'>+			return sym;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct symbol *find_global_symbol_by_name(const struct elf *elf, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	elf_hash_for_each_possible(symbol_name, sym, name_hash, str_hash(name)) {</div><div class='add'>+		if (!strcmp(sym-&gt;name, name) &amp;&amp; !is_local_sym(sym))</div><div class='add'>+			return sym;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct reloc *find_reloc_by_dest_range(const struct elf *elf, struct section *sec,</div><div class='ctx'> 				     unsigned long offset, unsigned int len)</div><div class='ctx'> {</div><div class='hunk'>@@ -358,14 +407,14 @@ static int read_sections(struct elf *elf)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sec-&gt;sh.sh_size != 0 &amp;&amp; !is_dwarf_section(sec)) {</div><div class='add'>+		if (sec_size(sec) != 0 &amp;&amp; !is_dwarf_section(sec)) {</div><div class='ctx'> 			sec-&gt;data = elf_getdata(s, NULL);</div><div class='ctx'> 			if (!sec-&gt;data) {</div><div class='ctx'> 				ERROR_ELF("elf_getdata");</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (sec-&gt;data-&gt;d_off != 0 ||</div><div class='del'>-			    sec-&gt;data-&gt;d_size != sec-&gt;sh.sh_size) {</div><div class='add'>+			    sec-&gt;data-&gt;d_size != sec_size(sec)) {</div><div class='ctx'> 				ERROR("unexpected data attributes for %s", sec-&gt;name);</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -393,7 +442,38 @@ static int read_sections(struct elf *elf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void elf_add_symbol(struct elf *elf, struct symbol *sym)</div><div class='add'>+static const char *demangle_name(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	char *str;</div><div class='add'>+</div><div class='add'>+	if (!is_local_sym(sym))</div><div class='add'>+		return sym-&gt;name;</div><div class='add'>+</div><div class='add'>+	if (!is_func_sym(sym) &amp;&amp; !is_object_sym(sym))</div><div class='add'>+		return sym-&gt;name;</div><div class='add'>+</div><div class='add'>+	if (!strstarts(sym-&gt;name, "__UNIQUE_ID_") &amp;&amp; !strchr(sym-&gt;name, '.'))</div><div class='add'>+		return sym-&gt;name;</div><div class='add'>+</div><div class='add'>+	str = strdup(sym-&gt;name);</div><div class='add'>+	if (!str) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = strlen(str) - 1; i &gt;= 0; i--) {</div><div class='add'>+		char c = str[i];</div><div class='add'>+</div><div class='add'>+		if (!isdigit(c) &amp;&amp; c != '.') {</div><div class='add'>+			str[i + 1] = '\0';</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return str;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int elf_add_symbol(struct elf *elf, struct symbol *sym)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *entry;</div><div class='ctx'> 	struct rb_node *pnode;</div><div class='hunk'>@@ -405,14 +485,15 @@ static void elf_add_symbol(struct elf *elf, struct symbol *sym)</div><div class='ctx'> 	sym-&gt;type = GELF_ST_TYPE(sym-&gt;sym.st_info);</div><div class='ctx'> 	sym-&gt;bind = GELF_ST_BIND(sym-&gt;sym.st_info);</div><div class='ctx'> </div><div class='del'>-	if (sym-&gt;type == STT_FILE)</div><div class='add'>+	if (is_file_sym(sym))</div><div class='ctx'> 		elf-&gt;num_files++;</div><div class='ctx'> </div><div class='ctx'> 	sym-&gt;offset = sym-&gt;sym.st_value;</div><div class='ctx'> 	sym-&gt;len = sym-&gt;sym.st_size;</div><div class='ctx'> </div><div class='ctx'> 	__sym_for_each(iter, &amp;sym-&gt;sec-&gt;symbol_tree, sym-&gt;offset, sym-&gt;offset) {</div><div class='del'>-		if (iter-&gt;offset == sym-&gt;offset &amp;&amp; iter-&gt;type == sym-&gt;type)</div><div class='add'>+		if (!is_undef_sym(iter) &amp;&amp; iter-&gt;offset == sym-&gt;offset &amp;&amp;</div><div class='add'>+		    iter-&gt;type == sym-&gt;type &amp;&amp; iter-&gt;len == sym-&gt;len)</div><div class='ctx'> 			iter-&gt;alias = sym;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -423,21 +504,44 @@ static void elf_add_symbol(struct elf *elf, struct symbol *sym)</div><div class='ctx'> 	else</div><div class='ctx'> 		entry = &amp;sym-&gt;sec-&gt;symbol_list;</div><div class='ctx'> 	list_add(&amp;sym-&gt;list, entry);</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;sym-&gt;global_list, &amp;elf-&gt;symbols);</div><div class='ctx'> 	elf_hash_add(symbol, &amp;sym-&gt;hash, sym-&gt;idx);</div><div class='ctx'> 	elf_hash_add(symbol_name, &amp;sym-&gt;name_hash, str_hash(sym-&gt;name));</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Don't store empty STT_NOTYPE symbols in the rbtree.  They</div><div class='del'>-	 * can exist within a function, confusing the sorting.</div><div class='del'>-	 */</div><div class='del'>-	if (!sym-&gt;len)</div><div class='del'>-		__sym_remove(sym, &amp;sym-&gt;sec-&gt;symbol_tree);</div><div class='add'>+	if (is_func_sym(sym) &amp;&amp;</div><div class='add'>+	    (strstarts(sym-&gt;name, "__pfx_") ||</div><div class='add'>+	     strstarts(sym-&gt;name, "__cfi_") ||</div><div class='add'>+	     strstarts(sym-&gt;name, "__pi___pfx_") ||</div><div class='add'>+	     strstarts(sym-&gt;name, "__pi___cfi_")))</div><div class='add'>+		sym-&gt;prefix = 1;</div><div class='add'>+</div><div class='add'>+	if (strstarts(sym-&gt;name, ".klp.sym"))</div><div class='add'>+		sym-&gt;klp = 1;</div><div class='add'>+</div><div class='add'>+	if (!sym-&gt;klp &amp;&amp; !is_sec_sym(sym) &amp;&amp; strstr(sym-&gt;name, ".cold")) {</div><div class='add'>+		sym-&gt;cold = 1;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Clang doesn't mark cold subfunctions as STT_FUNC, which</div><div class='add'>+		 * breaks several objtool assumptions.  Fake it.</div><div class='add'>+		 */</div><div class='add'>+		sym-&gt;type = STT_FUNC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym-&gt;pfunc = sym-&gt;cfunc = sym;</div><div class='add'>+</div><div class='add'>+	sym-&gt;demangled_name = demangle_name(sym);</div><div class='add'>+	if (!sym-&gt;demangled_name)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int read_symbols(struct elf *elf)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *symtab, *symtab_shndx, *sec;</div><div class='del'>-	struct symbol *sym, *pfunc;</div><div class='add'>+	struct symbol *sym, *pfunc, *file = NULL;</div><div class='ctx'> 	int symbols_nr, i;</div><div class='ctx'> 	char *coldstr;</div><div class='ctx'> 	Elf_Data *shndx_data = NULL;</div><div class='hunk'>@@ -469,6 +573,9 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 		ERROR_GLIBC("calloc");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;elf-&gt;symbols);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; symbols_nr; i++) {</div><div class='ctx'> 		sym = &amp;elf-&gt;symbol_data[i];</div><div class='ctx'> </div><div class='hunk'>@@ -477,14 +584,14 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 		if (!gelf_getsymshndx(symtab-&gt;data, shndx_data, i, &amp;sym-&gt;sym,</div><div class='ctx'> 				      &amp;shndx)) {</div><div class='ctx'> 			ERROR_ELF("gelf_getsymshndx");</div><div class='del'>-			goto err;</div><div class='add'>+			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		sym-&gt;name = elf_strptr(elf-&gt;elf, symtab-&gt;sh.sh_link,</div><div class='ctx'> 				       sym-&gt;sym.st_name);</div><div class='ctx'> 		if (!sym-&gt;name) {</div><div class='ctx'> 			ERROR_ELF("elf_strptr");</div><div class='del'>-			goto err;</div><div class='add'>+			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if ((sym-&gt;sym.st_shndx &gt; SHN_UNDEF &amp;&amp;</div><div class='hunk'>@@ -496,7 +603,7 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 			sym-&gt;sec = find_section_by_index(elf, shndx);</div><div class='ctx'> 			if (!sym-&gt;sec) {</div><div class='ctx'> 				ERROR("couldn't find section for symbol %s", sym-&gt;name);</div><div class='del'>-				goto err;</div><div class='add'>+				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (GELF_ST_TYPE(sym-&gt;sym.st_info) == STT_SECTION) {</div><div class='ctx'> 				sym-&gt;name = sym-&gt;sec-&gt;name;</div><div class='hunk'>@@ -505,7 +612,13 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 		} else</div><div class='ctx'> 			sym-&gt;sec = find_section_by_index(elf, 0);</div><div class='ctx'> </div><div class='del'>-		elf_add_symbol(elf, sym);</div><div class='add'>+		if (elf_add_symbol(elf, sym))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		if (sym-&gt;type == STT_FILE)</div><div class='add'>+			file = sym;</div><div class='add'>+		else if (sym-&gt;bind == STB_LOCAL)</div><div class='add'>+			sym-&gt;file = file;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (opts.stats) {</div><div class='hunk'>@@ -518,18 +631,15 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 		sec_for_each_sym(sec, sym) {</div><div class='ctx'> 			char *pname;</div><div class='ctx'> 			size_t pnamelen;</div><div class='del'>-			if (sym-&gt;type != STT_FUNC)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (sym-&gt;pfunc == NULL)</div><div class='del'>-				sym-&gt;pfunc = sym;</div><div class='ctx'> </div><div class='del'>-			if (sym-&gt;cfunc == NULL)</div><div class='del'>-				sym-&gt;cfunc = sym;</div><div class='add'>+			if (!sym-&gt;cold)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='ctx'> 			coldstr = strstr(sym-&gt;name, ".cold");</div><div class='del'>-			if (!coldstr)</div><div class='del'>-				continue;</div><div class='add'>+			if (!coldstr) {</div><div class='add'>+				ERROR("%s(): cold subfunction without \".cold\"?", sym-&gt;name);</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			pnamelen = coldstr - sym-&gt;name;</div><div class='ctx'> 			pname = strndup(sym-&gt;name, pnamelen);</div><div class='hunk'>@@ -538,7 +648,9 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			pfunc = find_symbol_by_name(elf, pname);</div><div class='add'>+			pfunc = find_local_symbol_by_file_and_name(elf, sym-&gt;file, pname);</div><div class='add'>+			if (!pfunc)</div><div class='add'>+				pfunc = find_global_symbol_by_name(elf, pname);</div><div class='ctx'> 			free(pname);</div><div class='ctx'> </div><div class='ctx'> 			if (!pfunc) {</div><div class='hunk'>@@ -546,8 +658,9 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sym-&gt;pfunc = pfunc;</div><div class='add'>+			sym-&gt;pfunc = pfunc-&gt;alias;</div><div class='ctx'> 			pfunc-&gt;cfunc = sym;</div><div class='add'>+			pfunc-&gt;alias-&gt;cfunc = sym;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Unfortunately, -fnoreorder-functions puts the child</div><div class='hunk'>@@ -566,10 +679,6 @@ static int read_symbols(struct elf *elf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	free(sym);</div><div class='del'>-	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mark_group_syms(struct elf *elf)</div><div class='hunk'>@@ -583,7 +692,7 @@ static int mark_group_syms(struct elf *elf)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(sec, &amp;elf-&gt;sections, list) {</div><div class='add'>+	for_each_sec(elf, sec) {</div><div class='ctx'> 		if (sec-&gt;sh.sh_type == SHT_GROUP &amp;&amp;</div><div class='ctx'> 		    sec-&gt;sh.sh_link == symtab-&gt;idx) {</div><div class='ctx'> 			sym = find_symbol_by_index(elf, sec-&gt;sh.sh_info);</div><div class='hunk'>@@ -624,7 +733,7 @@ static int elf_update_sym_relocs(struct elf *elf, struct symbol *sym)</div><div class='ctx'> static int elf_update_symbol(struct elf *elf, struct section *symtab,</div><div class='ctx'> 			     struct section *symtab_shndx, struct symbol *sym)</div><div class='ctx'> {</div><div class='del'>-	Elf32_Word shndx = sym-&gt;sec ? sym-&gt;sec-&gt;idx : SHN_UNDEF;</div><div class='add'>+	Elf32_Word shndx;</div><div class='ctx'> 	Elf_Data *symtab_data = NULL, *shndx_data = NULL;</div><div class='ctx'> 	Elf64_Xword entsize = symtab-&gt;sh.sh_entsize;</div><div class='ctx'> 	int max_idx, idx = sym-&gt;idx;</div><div class='hunk'>@@ -632,8 +741,7 @@ static int elf_update_symbol(struct elf *elf, struct section *symtab,</div><div class='ctx'> 	bool is_special_shndx = sym-&gt;sym.st_shndx &gt;= SHN_LORESERVE &amp;&amp;</div><div class='ctx'> 				sym-&gt;sym.st_shndx != SHN_XINDEX;</div><div class='ctx'> </div><div class='del'>-	if (is_special_shndx)</div><div class='del'>-		shndx = sym-&gt;sym.st_shndx;</div><div class='add'>+	shndx = is_special_shndx ? sym-&gt;sym.st_shndx : sym-&gt;sec-&gt;idx;</div><div class='ctx'> </div><div class='ctx'> 	s = elf_getscn(elf-&gt;elf, symtab-&gt;idx);</div><div class='ctx'> 	if (!s) {</div><div class='hunk'>@@ -731,7 +839,7 @@ static int elf_update_symbol(struct elf *elf, struct section *symtab,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup extended section index magic and write the symbol */</div><div class='del'>-	if ((shndx &gt;= SHN_UNDEF &amp;&amp; shndx &lt; SHN_LORESERVE) || is_special_shndx) {</div><div class='add'>+	if (shndx &lt; SHN_LORESERVE || is_special_shndx) {</div><div class='ctx'> 		sym-&gt;sym.st_shndx = shndx;</div><div class='ctx'> 		if (!shndx_data)</div><div class='ctx'> 			shndx = 0;</div><div class='hunk'>@@ -751,24 +859,58 @@ static int elf_update_symbol(struct elf *elf, struct section *symtab,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct symbol *</div><div class='del'>-__elf_create_symbol(struct elf *elf, struct symbol *sym)</div><div class='add'>+struct symbol *elf_create_symbol(struct elf *elf, const char *name,</div><div class='add'>+				 struct section *sec, unsigned int bind,</div><div class='add'>+				 unsigned int type, unsigned long offset,</div><div class='add'>+				 size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *symtab, *symtab_shndx;</div><div class='ctx'> 	Elf32_Word first_non_local, new_idx;</div><div class='del'>-	struct symbol *old;</div><div class='add'>+	struct symbol *old, *sym;</div><div class='ctx'> </div><div class='del'>-	symtab = find_section_by_name(elf, ".symtab");</div><div class='del'>-	if (symtab) {</div><div class='del'>-		symtab_shndx = find_section_by_name(elf, ".symtab_shndx");</div><div class='add'>+	sym = calloc(1, sizeof(*sym));</div><div class='add'>+	if (!sym) {</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym-&gt;name = strdup(name);</div><div class='add'>+	if (!sym-&gt;name) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type != STT_SECTION) {</div><div class='add'>+		sym-&gt;sym.st_name = elf_add_string(elf, NULL, sym-&gt;name);</div><div class='add'>+		if (sym-&gt;sym.st_name == -1)</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sec) {</div><div class='add'>+		sym-&gt;sec = sec;</div><div class='ctx'> 	} else {</div><div class='add'>+		sym-&gt;sec = find_section_by_index(elf, 0);</div><div class='add'>+		if (!sym-&gt;sec) {</div><div class='add'>+			ERROR("no NULL section");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym-&gt;sym.st_info  = GELF_ST_INFO(bind, type);</div><div class='add'>+	sym-&gt;sym.st_value = offset;</div><div class='add'>+	sym-&gt;sym.st_size  = size;</div><div class='add'>+</div><div class='add'>+	symtab = find_section_by_name(elf, ".symtab");</div><div class='add'>+	if (!symtab) {</div><div class='ctx'> 		ERROR("no .symtab");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	symtab_shndx = find_section_by_name(elf, ".symtab_shndx");</div><div class='add'>+</div><div class='ctx'> 	new_idx = sec_num_entries(symtab);</div><div class='ctx'> </div><div class='del'>-	if (GELF_ST_BIND(sym-&gt;sym.st_info) != STB_LOCAL)</div><div class='add'>+	if (bind != STB_LOCAL)</div><div class='ctx'> 		goto non_local;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -806,10 +948,8 @@ __elf_create_symbol(struct elf *elf, struct symbol *sym)</div><div class='ctx'> </div><div class='ctx'> non_local:</div><div class='ctx'> 	sym-&gt;idx = new_idx;</div><div class='del'>-	if (elf_update_symbol(elf, symtab, symtab_shndx, sym)) {</div><div class='del'>-		ERROR("elf_update_symbol");</div><div class='add'>+	if (sym-&gt;idx &amp;&amp; elf_update_symbol(elf, symtab, symtab_shndx, sym))</div><div class='ctx'> 		return NULL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	symtab-&gt;sh.sh_size += symtab-&gt;sh.sh_entsize;</div><div class='ctx'> 	mark_sec_changed(elf, symtab, true);</div><div class='hunk'>@@ -819,70 +959,28 @@ non_local:</div><div class='ctx'> 		mark_sec_changed(elf, symtab_shndx, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sym;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct symbol *</div><div class='del'>-elf_create_section_symbol(struct elf *elf, struct section *sec)</div><div class='del'>-{</div><div class='del'>-	struct symbol *sym = calloc(1, sizeof(*sym));</div><div class='del'>-</div><div class='del'>-	if (!sym) {</div><div class='del'>-		ERROR_GLIBC("malloc");</div><div class='add'>+	if (elf_add_symbol(elf, sym))</div><div class='ctx'> 		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sym-&gt;name = sec-&gt;name;</div><div class='del'>-	sym-&gt;sec = sec;</div><div class='del'>-</div><div class='del'>-	// st_name 0</div><div class='del'>-	sym-&gt;sym.st_info = GELF_ST_INFO(STB_LOCAL, STT_SECTION);</div><div class='del'>-	// st_other 0</div><div class='del'>-	// st_value 0</div><div class='del'>-	// st_size 0</div><div class='del'>-</div><div class='del'>-	sym = __elf_create_symbol(elf, sym);</div><div class='del'>-	if (sym)</div><div class='del'>-		elf_add_symbol(elf, sym);</div><div class='ctx'> </div><div class='ctx'> 	return sym;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int elf_add_string(struct elf *elf, struct section *strtab, char *str);</div><div class='del'>-</div><div class='del'>-struct symbol *</div><div class='del'>-elf_create_prefix_symbol(struct elf *elf, struct symbol *orig, long size)</div><div class='add'>+struct symbol *elf_create_section_symbol(struct elf *elf, struct section *sec)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *sym = calloc(1, sizeof(*sym));</div><div class='del'>-	size_t namelen = strlen(orig-&gt;name) + sizeof("__pfx_");</div><div class='del'>-	char *name = malloc(namelen);</div><div class='ctx'> </div><div class='del'>-	if (!sym || !name) {</div><div class='del'>-		ERROR_GLIBC("malloc");</div><div class='add'>+	sym = elf_create_symbol(elf, sec-&gt;name, sec, STB_LOCAL, STT_SECTION, 0, 0);</div><div class='add'>+	if (!sym)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	snprintf(name, namelen, "__pfx_%s", orig-&gt;name);</div><div class='del'>-</div><div class='del'>-	sym-&gt;name = name;</div><div class='del'>-	sym-&gt;sec = orig-&gt;sec;</div><div class='del'>-</div><div class='del'>-	sym-&gt;sym.st_name = elf_add_string(elf, NULL, name);</div><div class='del'>-	sym-&gt;sym.st_info = orig-&gt;sym.st_info;</div><div class='del'>-	sym-&gt;sym.st_value = orig-&gt;sym.st_value - size;</div><div class='del'>-	sym-&gt;sym.st_size = size;</div><div class='del'>-</div><div class='del'>-	sym = __elf_create_symbol(elf, sym);</div><div class='del'>-	if (sym)</div><div class='del'>-		elf_add_symbol(elf, sym);</div><div class='add'>+	sec-&gt;sym = sym;</div><div class='ctx'> </div><div class='ctx'> 	return sym;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct reloc *elf_init_reloc(struct elf *elf, struct section *rsec,</div><div class='del'>-				    unsigned int reloc_idx,</div><div class='del'>-				    unsigned long offset, struct symbol *sym,</div><div class='del'>-				    s64 addend, unsigned int type)</div><div class='add'>+struct reloc *elf_init_reloc(struct elf *elf, struct section *rsec,</div><div class='add'>+			     unsigned int reloc_idx, unsigned long offset,</div><div class='add'>+			     struct symbol *sym, s64 addend, unsigned int type)</div><div class='ctx'> {</div><div class='ctx'> 	struct reloc *reloc, empty = { 0 };</div><div class='ctx'> </div><div class='hunk'>@@ -922,9 +1020,9 @@ struct reloc *elf_init_reloc_text_sym(struct elf *elf, struct section *sec,</div><div class='ctx'> 				      unsigned long insn_off)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *sym = insn_sec-&gt;sym;</div><div class='del'>-	int addend = insn_off;</div><div class='add'>+	s64 addend = insn_off;</div><div class='ctx'> </div><div class='del'>-	if (!(insn_sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR)) {</div><div class='add'>+	if (!is_text_sec(insn_sec)) {</div><div class='ctx'> 		ERROR("bad call to %s() for data symbol %s", __func__, sym-&gt;name);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -939,8 +1037,6 @@ struct reloc *elf_init_reloc_text_sym(struct elf *elf, struct section *sec,</div><div class='ctx'> 		sym = elf_create_section_symbol(elf, insn_sec);</div><div class='ctx'> 		if (!sym)</div><div class='ctx'> 			return NULL;</div><div class='del'>-</div><div class='del'>-		insn_sec-&gt;sym = sym;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return elf_init_reloc(elf, sec-&gt;rsec, reloc_idx, offset, sym, addend,</div><div class='hunk'>@@ -953,7 +1049,7 @@ struct reloc *elf_init_reloc_data_sym(struct elf *elf, struct section *sec,</div><div class='ctx'> 				      struct symbol *sym,</div><div class='ctx'> 				      s64 addend)</div><div class='ctx'> {</div><div class='del'>-	if (sym-&gt;sec &amp;&amp; (sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR)) {</div><div class='add'>+	if (is_text_sec(sec)) {</div><div class='ctx'> 		ERROR("bad call to %s() for text symbol %s", __func__, sym-&gt;name);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -986,12 +1082,16 @@ static int read_relocs(struct elf *elf)</div><div class='ctx'> </div><div class='ctx'> 		rsec-&gt;base-&gt;rsec = rsec;</div><div class='ctx'> </div><div class='del'>-		nr_reloc = 0;</div><div class='add'>+		/* nr_alloc_relocs=0: libelf owns d_buf */</div><div class='add'>+		rsec-&gt;nr_alloc_relocs = 0;</div><div class='add'>+</div><div class='ctx'> 		rsec-&gt;relocs = calloc(sec_num_entries(rsec), sizeof(*reloc));</div><div class='ctx'> 		if (!rsec-&gt;relocs) {</div><div class='ctx'> 			ERROR_GLIBC("calloc");</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		nr_reloc = 0;</div><div class='ctx'> 		for (i = 0; i &lt; sec_num_entries(rsec); i++) {</div><div class='ctx'> 			reloc = &amp;rsec-&gt;relocs[i];</div><div class='ctx'> </div><div class='hunk'>@@ -1044,6 +1144,12 @@ struct elf *elf_open_read(const char *name, int flags)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	elf-&gt;name = strdup(name);</div><div class='add'>+	if (!elf-&gt;name) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if ((flags &amp; O_ACCMODE) == O_RDONLY)</div><div class='ctx'> 		cmd = ELF_C_READ_MMAP;</div><div class='ctx'> 	else if ((flags &amp; O_ACCMODE) == O_RDWR)</div><div class='hunk'>@@ -1081,11 +1187,142 @@ err:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int elf_add_string(struct elf *elf, struct section *strtab, char *str)</div><div class='add'>+struct elf *elf_create_file(GElf_Ehdr *ehdr, const char *name)</div><div class='ctx'> {</div><div class='del'>-	Elf_Data *data;</div><div class='del'>-	Elf_Scn *s;</div><div class='del'>-	int len;</div><div class='add'>+	struct section *null, *symtab, *strtab, *shstrtab;</div><div class='add'>+	char *dir, *base, *tmp_name;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+	struct elf *elf;</div><div class='add'>+</div><div class='add'>+	elf_version(EV_CURRENT);</div><div class='add'>+</div><div class='add'>+	elf = calloc(1, sizeof(*elf));</div><div class='add'>+	if (!elf) {</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;elf-&gt;sections);</div><div class='add'>+</div><div class='add'>+	dir = strdup(name);</div><div class='add'>+	if (!dir) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dir = dirname(dir);</div><div class='add'>+</div><div class='add'>+	base = strdup(name);</div><div class='add'>+	if (!base) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	base = basename(base);</div><div class='add'>+</div><div class='add'>+	tmp_name = malloc(256);</div><div class='add'>+	if (!tmp_name) {</div><div class='add'>+		ERROR_GLIBC("malloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(tmp_name, 256, "%s/%s.XXXXXX", dir, base);</div><div class='add'>+</div><div class='add'>+	elf-&gt;fd = mkstemp(tmp_name);</div><div class='add'>+	if (elf-&gt;fd == -1) {</div><div class='add'>+		ERROR_GLIBC("can't create tmp file");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	elf-&gt;tmp_name = tmp_name;</div><div class='add'>+</div><div class='add'>+	elf-&gt;name = strdup(name);</div><div class='add'>+	if (!elf-&gt;name) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	elf-&gt;elf = elf_begin(elf-&gt;fd, ELF_C_WRITE, NULL);</div><div class='add'>+	if (!elf-&gt;elf) {</div><div class='add'>+		ERROR_ELF("elf_begin");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gelf_newehdr(elf-&gt;elf, ELFCLASS64)) {</div><div class='add'>+		ERROR_ELF("gelf_newehdr");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;elf-&gt;ehdr, ehdr, sizeof(elf-&gt;ehdr));</div><div class='add'>+</div><div class='add'>+	if (!gelf_update_ehdr(elf-&gt;elf, &amp;elf-&gt;ehdr)) {</div><div class='add'>+		ERROR_ELF("gelf_update_ehdr");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;elf-&gt;symbols);</div><div class='add'>+</div><div class='add'>+	if (!elf_alloc_hash(section,		1000) ||</div><div class='add'>+	    !elf_alloc_hash(section_name,	1000) ||</div><div class='add'>+	    !elf_alloc_hash(symbol,		10000) ||</div><div class='add'>+	    !elf_alloc_hash(symbol_name,	10000) ||</div><div class='add'>+	    !elf_alloc_hash(reloc,		100000))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	null		= elf_create_section(elf, NULL, 0, 0, SHT_NULL, 0, 0);</div><div class='add'>+	shstrtab	= elf_create_section(elf, NULL, 0, 0, SHT_STRTAB, 1, 0);</div><div class='add'>+	strtab		= elf_create_section(elf, NULL, 0, 0, SHT_STRTAB, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (!null || !shstrtab || !strtab)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	null-&gt;name	= "";</div><div class='add'>+	shstrtab-&gt;name	= ".shstrtab";</div><div class='add'>+	strtab-&gt;name	= ".strtab";</div><div class='add'>+</div><div class='add'>+	null-&gt;sh.sh_name	= elf_add_string(elf, shstrtab, null-&gt;name);</div><div class='add'>+	shstrtab-&gt;sh.sh_name	= elf_add_string(elf, shstrtab, shstrtab-&gt;name);</div><div class='add'>+	strtab-&gt;sh.sh_name	= elf_add_string(elf, shstrtab, strtab-&gt;name);</div><div class='add'>+</div><div class='add'>+	if (null-&gt;sh.sh_name == -1 || shstrtab-&gt;sh.sh_name == -1 || strtab-&gt;sh.sh_name == -1)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	elf_hash_add(section_name, &amp;null-&gt;name_hash,		str_hash(null-&gt;name));</div><div class='add'>+	elf_hash_add(section_name, &amp;strtab-&gt;name_hash,		str_hash(strtab-&gt;name));</div><div class='add'>+	elf_hash_add(section_name, &amp;shstrtab-&gt;name_hash,	str_hash(shstrtab-&gt;name));</div><div class='add'>+</div><div class='add'>+	if (elf_add_string(elf, strtab, "") == -1)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	symtab = elf_create_section(elf, ".symtab", 0x18, 0x18, SHT_SYMTAB, 0x8, 0);</div><div class='add'>+	if (!symtab)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	symtab-&gt;sh.sh_link = strtab-&gt;idx;</div><div class='add'>+	symtab-&gt;sh.sh_info = 1;</div><div class='add'>+</div><div class='add'>+	elf-&gt;ehdr.e_shstrndx = shstrtab-&gt;idx;</div><div class='add'>+	if (!gelf_update_ehdr(elf-&gt;elf, &amp;elf-&gt;ehdr)) {</div><div class='add'>+		ERROR_ELF("gelf_update_ehdr");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym = calloc(1, sizeof(*sym));</div><div class='add'>+	if (!sym) {</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym-&gt;name = "";</div><div class='add'>+	sym-&gt;sec = null;</div><div class='add'>+	elf_add_symbol(elf, sym);</div><div class='add'>+</div><div class='add'>+	return elf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int elf_add_string(struct elf *elf, struct section *strtab, const char *str)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset;</div><div class='ctx'> </div><div class='ctx'> 	if (!strtab)</div><div class='ctx'> 		strtab = find_section_by_name(elf, ".strtab");</div><div class='hunk'>@@ -1094,76 +1331,109 @@ static int elf_add_string(struct elf *elf, struct section *strtab, char *str)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	s = elf_getscn(elf-&gt;elf, strtab-&gt;idx);</div><div class='add'>+	if (!strtab-&gt;sh.sh_addralign) {</div><div class='add'>+		ERROR("'%s': invalid sh_addralign", strtab-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = ALIGN_UP(strtab-&gt;sh.sh_size, strtab-&gt;sh.sh_addralign);</div><div class='add'>+</div><div class='add'>+	if (!elf_add_data(elf, strtab, str, strlen(str) + 1))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *elf_add_data(struct elf *elf, struct section *sec, const void *data, size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned long offset;</div><div class='add'>+	Elf_Scn *s;</div><div class='add'>+</div><div class='add'>+	if (!sec-&gt;sh.sh_addralign) {</div><div class='add'>+		ERROR("'%s': invalid sh_addralign", sec-&gt;name);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s = elf_getscn(elf-&gt;elf, sec-&gt;idx);</div><div class='ctx'> 	if (!s) {</div><div class='ctx'> 		ERROR_ELF("elf_getscn");</div><div class='del'>-		return -1;</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data = elf_newdata(s);</div><div class='del'>-	if (!data) {</div><div class='add'>+	sec-&gt;data = elf_newdata(s);</div><div class='add'>+	if (!sec-&gt;data) {</div><div class='ctx'> 		ERROR_ELF("elf_newdata");</div><div class='del'>-		return -1;</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data-&gt;d_buf = str;</div><div class='del'>-	data-&gt;d_size = strlen(str) + 1;</div><div class='del'>-	data-&gt;d_align = 1;</div><div class='add'>+	sec-&gt;data-&gt;d_buf = calloc(1, size);</div><div class='add'>+	if (!sec-&gt;data-&gt;d_buf) {</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	len = strtab-&gt;sh.sh_size;</div><div class='del'>-	strtab-&gt;sh.sh_size += data-&gt;d_size;</div><div class='add'>+	if (data)</div><div class='add'>+		memcpy(sec-&gt;data-&gt;d_buf, data, size);</div><div class='ctx'> </div><div class='del'>-	mark_sec_changed(elf, strtab, true);</div><div class='add'>+	sec-&gt;data-&gt;d_size = size;</div><div class='add'>+	sec-&gt;data-&gt;d_align = 1;</div><div class='ctx'> </div><div class='del'>-	return len;</div><div class='add'>+	offset = ALIGN_UP(sec-&gt;sh.sh_size, sec-&gt;sh.sh_addralign);</div><div class='add'>+	sec-&gt;sh.sh_size = offset + size;</div><div class='add'>+</div><div class='add'>+	mark_sec_changed(elf, sec, true);</div><div class='add'>+</div><div class='add'>+	return sec-&gt;data-&gt;d_buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct section *elf_create_section(struct elf *elf, const char *name,</div><div class='del'>-				   size_t entsize, unsigned int nr)</div><div class='add'>+				   size_t size, size_t entsize,</div><div class='add'>+				   unsigned int type, unsigned int align,</div><div class='add'>+				   unsigned int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *sec, *shstrtab;</div><div class='del'>-	size_t size = entsize * nr;</div><div class='ctx'> 	Elf_Scn *s;</div><div class='ctx'> </div><div class='del'>-	sec = malloc(sizeof(*sec));</div><div class='add'>+	if (name &amp;&amp; find_section_by_name(elf, name)) {</div><div class='add'>+		ERROR("section '%s' already exists", name);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sec = calloc(1, sizeof(*sec));</div><div class='ctx'> 	if (!sec) {</div><div class='del'>-		ERROR_GLIBC("malloc");</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-	memset(sec, 0, sizeof(*sec));</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;sec-&gt;symbol_list);</div><div class='ctx'> </div><div class='add'>+	/* don't actually create the section, just the data structures */</div><div class='add'>+	if (type == SHT_NULL)</div><div class='add'>+		goto add;</div><div class='add'>+</div><div class='ctx'> 	s = elf_newscn(elf-&gt;elf);</div><div class='ctx'> 	if (!s) {</div><div class='ctx'> 		ERROR_ELF("elf_newscn");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sec-&gt;name = strdup(name);</div><div class='del'>-	if (!sec-&gt;name) {</div><div class='del'>-		ERROR_GLIBC("strdup");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	sec-&gt;idx = elf_ndxscn(s);</div><div class='ctx'> </div><div class='del'>-	sec-&gt;data = elf_newdata(s);</div><div class='del'>-	if (!sec-&gt;data) {</div><div class='del'>-		ERROR_ELF("elf_newdata");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='add'>+	if (size) {</div><div class='add'>+		sec-&gt;data = elf_newdata(s);</div><div class='add'>+		if (!sec-&gt;data) {</div><div class='add'>+			ERROR_ELF("elf_newdata");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	sec-&gt;data-&gt;d_size = size;</div><div class='del'>-	sec-&gt;data-&gt;d_align = 1;</div><div class='add'>+		sec-&gt;data-&gt;d_size = size;</div><div class='add'>+		sec-&gt;data-&gt;d_align = 1;</div><div class='ctx'> </div><div class='del'>-	if (size) {</div><div class='del'>-		sec-&gt;data-&gt;d_buf = malloc(size);</div><div class='add'>+		sec-&gt;data-&gt;d_buf = calloc(1, size);</div><div class='ctx'> 		if (!sec-&gt;data-&gt;d_buf) {</div><div class='del'>-			ERROR_GLIBC("malloc");</div><div class='add'>+			ERROR_GLIBC("calloc");</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='del'>-		memset(sec-&gt;data-&gt;d_buf, 0, size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!gelf_getshdr(s, &amp;sec-&gt;sh)) {</div><div class='hunk'>@@ -1173,34 +1443,152 @@ struct section *elf_create_section(struct elf *elf, const char *name,</div><div class='ctx'> </div><div class='ctx'> 	sec-&gt;sh.sh_size = size;</div><div class='ctx'> 	sec-&gt;sh.sh_entsize = entsize;</div><div class='del'>-	sec-&gt;sh.sh_type = SHT_PROGBITS;</div><div class='del'>-	sec-&gt;sh.sh_addralign = 1;</div><div class='del'>-	sec-&gt;sh.sh_flags = SHF_ALLOC;</div><div class='del'>-</div><div class='del'>-	/* Add section name to .shstrtab (or .strtab for Clang) */</div><div class='del'>-	shstrtab = find_section_by_name(elf, ".shstrtab");</div><div class='del'>-	if (!shstrtab)</div><div class='del'>-		shstrtab = find_section_by_name(elf, ".strtab");</div><div class='del'>-	if (!shstrtab) {</div><div class='del'>-		ERROR("can't find .shstrtab or .strtab section");</div><div class='del'>-		return NULL;</div><div class='add'>+	sec-&gt;sh.sh_type = type;</div><div class='add'>+	sec-&gt;sh.sh_addralign = align;</div><div class='add'>+	sec-&gt;sh.sh_flags = flags;</div><div class='add'>+</div><div class='add'>+	if (name) {</div><div class='add'>+		sec-&gt;name = strdup(name);</div><div class='add'>+		if (!sec-&gt;name) {</div><div class='add'>+			ERROR("strdup");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Add section name to .shstrtab (or .strtab for Clang) */</div><div class='add'>+		shstrtab = find_section_by_name(elf, ".shstrtab");</div><div class='add'>+		if (!shstrtab) {</div><div class='add'>+			shstrtab = find_section_by_name(elf, ".strtab");</div><div class='add'>+			if (!shstrtab) {</div><div class='add'>+				ERROR("can't find .shstrtab or .strtab");</div><div class='add'>+				return NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		sec-&gt;sh.sh_name = elf_add_string(elf, shstrtab, sec-&gt;name);</div><div class='add'>+		if (sec-&gt;sh.sh_name == -1)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		elf_hash_add(section_name, &amp;sec-&gt;name_hash, str_hash(sec-&gt;name));</div><div class='ctx'> 	}</div><div class='del'>-	sec-&gt;sh.sh_name = elf_add_string(elf, shstrtab, sec-&gt;name);</div><div class='del'>-	if (sec-&gt;sh.sh_name == -1)</div><div class='del'>-		return NULL;</div><div class='ctx'> </div><div class='add'>+add:</div><div class='ctx'> 	list_add_tail(&amp;sec-&gt;list, &amp;elf-&gt;sections);</div><div class='ctx'> 	elf_hash_add(section, &amp;sec-&gt;hash, sec-&gt;idx);</div><div class='del'>-	elf_hash_add(section_name, &amp;sec-&gt;name_hash, str_hash(sec-&gt;name));</div><div class='ctx'> </div><div class='ctx'> 	mark_sec_changed(elf, sec, true);</div><div class='ctx'> </div><div class='ctx'> 	return sec;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct section *elf_create_rela_section(struct elf *elf,</div><div class='del'>-					       struct section *sec,</div><div class='del'>-					       unsigned int reloc_nr)</div><div class='add'>+static int elf_alloc_reloc(struct elf *elf, struct section *rsec)</div><div class='add'>+{</div><div class='add'>+	struct reloc *old_relocs, *old_relocs_end, *new_relocs;</div><div class='add'>+	unsigned int nr_relocs_old = sec_num_entries(rsec);</div><div class='add'>+	unsigned int nr_relocs_new = nr_relocs_old + 1;</div><div class='add'>+	unsigned long nr_alloc;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	if (!rsec-&gt;data) {</div><div class='add'>+		rsec-&gt;data = elf_newdata(elf_getscn(elf-&gt;elf, rsec-&gt;idx));</div><div class='add'>+		if (!rsec-&gt;data) {</div><div class='add'>+			ERROR_ELF("elf_newdata");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rsec-&gt;data-&gt;d_align = 1;</div><div class='add'>+		rsec-&gt;data-&gt;d_type = ELF_T_RELA;</div><div class='add'>+		rsec-&gt;data-&gt;d_buf = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rsec-&gt;data-&gt;d_size = nr_relocs_new * elf_rela_size(elf);</div><div class='add'>+	rsec-&gt;sh.sh_size   = rsec-&gt;data-&gt;d_size;</div><div class='add'>+</div><div class='add'>+	nr_alloc = MAX(64, ALIGN_UP_POW2(nr_relocs_new));</div><div class='add'>+	if (nr_alloc &lt;= rsec-&gt;nr_alloc_relocs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (rsec-&gt;data-&gt;d_buf &amp;&amp; !rsec-&gt;nr_alloc_relocs) {</div><div class='add'>+		void *orig_buf = rsec-&gt;data-&gt;d_buf;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The original d_buf is owned by libelf so it can't be</div><div class='add'>+		 * realloced.</div><div class='add'>+		 */</div><div class='add'>+		rsec-&gt;data-&gt;d_buf = malloc(nr_alloc * elf_rela_size(elf));</div><div class='add'>+		if (!rsec-&gt;data-&gt;d_buf) {</div><div class='add'>+			ERROR_GLIBC("malloc");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		memcpy(rsec-&gt;data-&gt;d_buf, orig_buf,</div><div class='add'>+		       nr_relocs_old * elf_rela_size(elf));</div><div class='add'>+	} else {</div><div class='add'>+		rsec-&gt;data-&gt;d_buf = realloc(rsec-&gt;data-&gt;d_buf,</div><div class='add'>+					    nr_alloc * elf_rela_size(elf));</div><div class='add'>+		if (!rsec-&gt;data-&gt;d_buf) {</div><div class='add'>+			ERROR_GLIBC("realloc");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rsec-&gt;nr_alloc_relocs = nr_alloc;</div><div class='add'>+</div><div class='add'>+	old_relocs = rsec-&gt;relocs;</div><div class='add'>+	new_relocs = calloc(nr_alloc, sizeof(struct reloc));</div><div class='add'>+	if (!new_relocs) {</div><div class='add'>+		ERROR_GLIBC("calloc");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!old_relocs)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The struct reloc's address has changed.  Update all the symbols and</div><div class='add'>+	 * relocs which reference it.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	old_relocs_end = &amp;old_relocs[nr_relocs_old];</div><div class='add'>+	for_each_sym(elf, sym) {</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+		reloc = sym-&gt;relocs;</div><div class='add'>+		if (!reloc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (reloc &gt;= old_relocs &amp;&amp; reloc &lt; old_relocs_end)</div><div class='add'>+			sym-&gt;relocs = &amp;new_relocs[reloc - old_relocs];</div><div class='add'>+</div><div class='add'>+		while (1) {</div><div class='add'>+			struct reloc *next_reloc = sym_next_reloc(reloc);</div><div class='add'>+</div><div class='add'>+			if (!next_reloc)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (next_reloc &gt;= old_relocs &amp;&amp; next_reloc &lt; old_relocs_end)</div><div class='add'>+				set_sym_next_reloc(reloc, &amp;new_relocs[next_reloc - old_relocs]);</div><div class='add'>+</div><div class='add'>+			reloc = next_reloc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(new_relocs, old_relocs, nr_relocs_old * sizeof(struct reloc));</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; nr_relocs_old; i++) {</div><div class='add'>+		struct reloc *old = &amp;old_relocs[i];</div><div class='add'>+		struct reloc *new = &amp;new_relocs[i];</div><div class='add'>+		u32 key = reloc_hash(old);</div><div class='add'>+</div><div class='add'>+		elf_hash_del(reloc, &amp;old-&gt;hash, key);</div><div class='add'>+		elf_hash_add(reloc, &amp;new-&gt;hash, key);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(old_relocs);</div><div class='add'>+done:</div><div class='add'>+	rsec-&gt;relocs = new_relocs;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct section *elf_create_rela_section(struct elf *elf, struct section *sec,</div><div class='add'>+					unsigned int nr_relocs)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *rsec;</div><div class='ctx'> 	char *rsec_name;</div><div class='hunk'>@@ -1213,41 +1601,72 @@ static struct section *elf_create_rela_section(struct elf *elf,</div><div class='ctx'> 	strcpy(rsec_name, ".rela");</div><div class='ctx'> 	strcat(rsec_name, sec-&gt;name);</div><div class='ctx'> </div><div class='del'>-	rsec = elf_create_section(elf, rsec_name, elf_rela_size(elf), reloc_nr);</div><div class='add'>+	rsec = elf_create_section(elf, rsec_name, nr_relocs * elf_rela_size(elf),</div><div class='add'>+				  elf_rela_size(elf), SHT_RELA, elf_addr_size(elf),</div><div class='add'>+				  SHF_INFO_LINK);</div><div class='ctx'> 	free(rsec_name);</div><div class='ctx'> 	if (!rsec)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	rsec-&gt;data-&gt;d_type = ELF_T_RELA;</div><div class='del'>-	rsec-&gt;sh.sh_type = SHT_RELA;</div><div class='del'>-	rsec-&gt;sh.sh_addralign = elf_addr_size(elf);</div><div class='del'>-	rsec-&gt;sh.sh_link = find_section_by_name(elf, ".symtab")-&gt;idx;</div><div class='del'>-	rsec-&gt;sh.sh_info = sec-&gt;idx;</div><div class='del'>-	rsec-&gt;sh.sh_flags = SHF_INFO_LINK;</div><div class='add'>+	if (nr_relocs) {</div><div class='add'>+		rsec-&gt;data-&gt;d_type = ELF_T_RELA;</div><div class='ctx'> </div><div class='del'>-	rsec-&gt;relocs = calloc(sec_num_entries(rsec), sizeof(struct reloc));</div><div class='del'>-	if (!rsec-&gt;relocs) {</div><div class='del'>-		ERROR_GLIBC("calloc");</div><div class='del'>-		return NULL;</div><div class='add'>+		rsec-&gt;nr_alloc_relocs = nr_relocs;</div><div class='add'>+		rsec-&gt;relocs = calloc(nr_relocs, sizeof(struct reloc));</div><div class='add'>+		if (!rsec-&gt;relocs) {</div><div class='add'>+			ERROR_GLIBC("calloc");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rsec-&gt;sh.sh_link = find_section_by_name(elf, ".symtab")-&gt;idx;</div><div class='add'>+	rsec-&gt;sh.sh_info = sec-&gt;idx;</div><div class='add'>+</div><div class='ctx'> 	sec-&gt;rsec = rsec;</div><div class='ctx'> 	rsec-&gt;base = sec;</div><div class='ctx'> </div><div class='ctx'> 	return rsec;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct reloc *elf_create_reloc(struct elf *elf, struct section *sec,</div><div class='add'>+			       unsigned long offset,</div><div class='add'>+			       struct symbol *sym, s64 addend,</div><div class='add'>+			       unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct section *rsec = sec-&gt;rsec;</div><div class='add'>+</div><div class='add'>+	if (!rsec) {</div><div class='add'>+		rsec = elf_create_rela_section(elf, sec, 0);</div><div class='add'>+		if (!rsec)</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (find_reloc_by_dest(elf, sec, offset)) {</div><div class='add'>+		ERROR_FUNC(sec, offset, "duplicate reloc");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (elf_alloc_reloc(elf, rsec))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	mark_sec_changed(elf, rsec, true);</div><div class='add'>+</div><div class='add'>+	return elf_init_reloc(elf, rsec, sec_num_entries(rsec) - 1, offset, sym,</div><div class='add'>+			      addend, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct section *elf_create_section_pair(struct elf *elf, const char *name,</div><div class='ctx'> 					size_t entsize, unsigned int nr,</div><div class='del'>-					unsigned int reloc_nr)</div><div class='add'>+					unsigned int nr_relocs)</div><div class='ctx'> {</div><div class='ctx'> 	struct section *sec;</div><div class='ctx'> </div><div class='del'>-	sec = elf_create_section(elf, name, entsize, nr);</div><div class='add'>+	sec = elf_create_section(elf, name, nr * entsize, entsize,</div><div class='add'>+				 SHT_PROGBITS, 1, SHF_ALLOC);</div><div class='ctx'> 	if (!sec)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	if (!elf_create_rela_section(elf, sec, reloc_nr))</div><div class='add'>+	if (!elf_create_rela_section(elf, sec, nr_relocs))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	return sec;</div><div class='hunk'>@@ -1282,7 +1701,7 @@ int elf_write_insn(struct elf *elf, struct section *sec,</div><div class='ctx'>  */</div><div class='ctx'> static int elf_truncate_section(struct elf *elf, struct section *sec)</div><div class='ctx'> {</div><div class='del'>-	u64 size = sec-&gt;sh.sh_size;</div><div class='add'>+	u64 size = sec_size(sec);</div><div class='ctx'> 	bool truncated = false;</div><div class='ctx'> 	Elf_Data *data = NULL;</div><div class='ctx'> 	Elf_Scn *s;</div><div class='hunk'>@@ -1296,7 +1715,6 @@ static int elf_truncate_section(struct elf *elf, struct section *sec)</div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		/* get next data descriptor for the relevant section */</div><div class='ctx'> 		data = elf_getdata(s, data);</div><div class='del'>-</div><div class='ctx'> 		if (!data) {</div><div class='ctx'> 			if (size) {</div><div class='ctx'> 				ERROR("end of section data but non-zero size left\n");</div><div class='hunk'>@@ -1332,8 +1750,8 @@ int elf_write(struct elf *elf)</div><div class='ctx'> </div><div class='ctx'> 	/* Update changed relocation sections and section headers: */</div><div class='ctx'> 	list_for_each_entry(sec, &amp;elf-&gt;sections, list) {</div><div class='del'>-		if (sec-&gt;truncate)</div><div class='del'>-			elf_truncate_section(elf, sec);</div><div class='add'>+		if (sec-&gt;truncate &amp;&amp; elf_truncate_section(elf, sec))</div><div class='add'>+			return -1;</div><div class='ctx'> </div><div class='ctx'> 		if (sec_changed(sec)) {</div><div class='ctx'> 			s = elf_getscn(elf-&gt;elf, sec-&gt;idx);</div><div class='hunk'>@@ -1366,7 +1784,7 @@ int elf_write(struct elf *elf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void elf_close(struct elf *elf)</div><div class='add'>+int elf_close(struct elf *elf)</div><div class='ctx'> {</div><div class='ctx'> 	if (elf-&gt;elf)</div><div class='ctx'> 		elf_end(elf-&gt;elf);</div><div class='hunk'>@@ -1374,8 +1792,12 @@ void elf_close(struct elf *elf)</div><div class='ctx'> 	if (elf-&gt;fd &gt; 0)</div><div class='ctx'> 		close(elf-&gt;fd);</div><div class='ctx'> </div><div class='add'>+	if (elf-&gt;tmp_name &amp;&amp; rename(elf-&gt;tmp_name, elf-&gt;name))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * NOTE: All remaining allocations are leaked on purpose.  Objtool is</div><div class='ctx'> 	 * about to exit anyway.</div><div class='ctx'> 	 */</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/objtool/include/objtool/arch.h b/tools/objtool/include/objtool/arch.h<br/>index 01ef6f415adf..8866158975fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/arch.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/arch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/arch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/arch.h</a></div><div class='hunk'>@@ -71,7 +71,7 @@ struct stack_op {</div><div class='ctx'> </div><div class='ctx'> struct instruction;</div><div class='ctx'> </div><div class='del'>-int arch_ftrace_match(char *name);</div><div class='add'>+int arch_ftrace_match(const char *name);</div><div class='ctx'> </div><div class='ctx'> void arch_initial_func_cfi_state(struct cfi_init_state *state);</div><div class='ctx'> </div><div class='hunk'>@@ -83,7 +83,8 @@ bool arch_callee_saved_reg(unsigned char reg);</div><div class='ctx'> </div><div class='ctx'> unsigned long arch_jump_destination(struct instruction *insn);</div><div class='ctx'> </div><div class='del'>-unsigned long arch_dest_reloc_offset(int addend);</div><div class='add'>+s64 arch_insn_adjusted_addend(struct instruction *insn, struct reloc *reloc);</div><div class='add'>+u64 arch_adjusted_addend(struct reloc *reloc);</div><div class='ctx'> </div><div class='ctx'> const char *arch_nop_insn(int len);</div><div class='ctx'> const char *arch_ret_insn(int len);</div><div class='hunk'>@@ -97,8 +98,20 @@ bool arch_is_embedded_insn(struct symbol *sym);</div><div class='ctx'> int arch_rewrite_retpolines(struct objtool_file *file);</div><div class='ctx'> </div><div class='ctx'> bool arch_pc_relative_reloc(struct reloc *reloc);</div><div class='add'>+bool arch_absolute_reloc(struct elf *elf, struct reloc *reloc);</div><div class='ctx'> </div><div class='ctx'> unsigned int arch_reloc_size(struct reloc *reloc);</div><div class='ctx'> unsigned long arch_jump_table_sym_offset(struct reloc *reloc, struct reloc *table);</div><div class='ctx'> </div><div class='add'>+extern const char *arch_reg_name[CFI_NUM_REGS];</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+#include &lt;bfd.h&gt;</div><div class='add'>+#include &lt;dis-asm.h&gt;</div><div class='add'>+</div><div class='add'>+int arch_disas_info_init(struct disassemble_info *dinfo);</div><div class='add'>+</div><div class='add'>+#endif /* DISAS */</div><div class='add'>+</div><div class='ctx'> #endif /* _ARCH_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/builtin.h b/tools/objtool/include/objtool/builtin.h<br/>index 6b08666fa69d..b9e229ed4dc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/builtin.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/builtin.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/builtin.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/builtin.h</a></div><div class='hunk'>@@ -9,12 +9,15 @@</div><div class='ctx'> </div><div class='ctx'> struct opts {</div><div class='ctx'> 	/* actions: */</div><div class='add'>+	bool cfi;</div><div class='add'>+	bool checksum;</div><div class='ctx'> 	bool dump_orc;</div><div class='ctx'> 	bool hack_jump_label;</div><div class='ctx'> 	bool hack_noinstr;</div><div class='ctx'> 	bool hack_skylake;</div><div class='ctx'> 	bool ibt;</div><div class='ctx'> 	bool mcount;</div><div class='add'>+	bool noabs;</div><div class='ctx'> 	bool noinstr;</div><div class='ctx'> 	bool orc;</div><div class='ctx'> 	bool retpoline;</div><div class='hunk'>@@ -25,10 +28,12 @@ struct opts {</div><div class='ctx'> 	bool static_call;</div><div class='ctx'> 	bool uaccess;</div><div class='ctx'> 	int prefix;</div><div class='del'>-	bool cfi;</div><div class='add'>+	const char *disas;</div><div class='ctx'> </div><div class='ctx'> 	/* options: */</div><div class='ctx'> 	bool backtrace;</div><div class='add'>+	bool backup;</div><div class='add'>+	const char *debug_checksum;</div><div class='ctx'> 	bool dryrun;</div><div class='ctx'> 	bool link;</div><div class='ctx'> 	bool mnop;</div><div class='hunk'>@@ -37,8 +42,10 @@ struct opts {</div><div class='ctx'> 	const char *output;</div><div class='ctx'> 	bool sec_address;</div><div class='ctx'> 	bool stats;</div><div class='add'>+	const char *trace;</div><div class='ctx'> 	bool verbose;</div><div class='ctx'> 	bool werror;</div><div class='add'>+	bool wide;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct opts opts;</div><div class='hunk'>@@ -47,6 +54,8 @@ int cmd_parse_options(int argc, const char **argv, const char * const usage[]);</div><div class='ctx'> </div><div class='ctx'> int objtool_run(int argc, const char **argv);</div><div class='ctx'> </div><div class='del'>-void print_args(void);</div><div class='add'>+int make_backup(void);</div><div class='add'>+</div><div class='add'>+int cmd_klp(int argc, const char **argv);</div><div class='ctx'> </div><div class='ctx'> #endif /* _BUILTIN_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/check.h b/tools/objtool/include/objtool/check.h<br/>index 00fb745e7233..2e1346ad5e92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/check.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/check.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/check.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/check.h</a></div><div class='hunk'>@@ -36,6 +36,19 @@ struct alt_group {</div><div class='ctx'> 	struct cfi_state **cfi;</div><div class='ctx'> </div><div class='ctx'> 	bool ignore;</div><div class='add'>+	unsigned int feature;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum alternative_type {</div><div class='add'>+	ALT_TYPE_INSTRUCTIONS,</div><div class='add'>+	ALT_TYPE_JUMP_TABLE,</div><div class='add'>+	ALT_TYPE_EX_TABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct alternative {</div><div class='add'>+	struct alternative *next;</div><div class='add'>+	struct instruction *insn;</div><div class='add'>+	enum alternative_type type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define INSN_CHUNK_BITS		8</div><div class='hunk'>@@ -64,8 +77,11 @@ struct instruction {</div><div class='ctx'> 	    noendbr		: 1,</div><div class='ctx'> 	    unret		: 1,</div><div class='ctx'> 	    visited		: 4,</div><div class='del'>-	    no_reloc		: 1;</div><div class='del'>-		/* 10 bit hole */</div><div class='add'>+	    no_reloc		: 1,</div><div class='add'>+	    hole		: 1,</div><div class='add'>+	    fake		: 1,</div><div class='add'>+	    trace		: 1;</div><div class='add'>+		/* 9 bit hole */</div><div class='ctx'> </div><div class='ctx'> 	struct alt_group *alt_group;</div><div class='ctx'> 	struct instruction *jump_dest;</div><div class='hunk'>@@ -115,6 +131,15 @@ static inline bool is_jump(struct instruction *insn)</div><div class='ctx'> 	return is_static_jump(insn) || is_dynamic_jump(insn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct symbol *insn_call_dest(struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	if (insn-&gt;type == INSN_JUMP_DYNAMIC ||</div><div class='add'>+	    insn-&gt;type == INSN_CALL_DYNAMIC)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return insn-&gt;_call_dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct instruction *find_insn(struct objtool_file *file,</div><div class='ctx'> 			      struct section *sec, unsigned long offset);</div><div class='ctx'> </div><div class='hunk'>@@ -125,4 +150,14 @@ struct instruction *next_insn_same_sec(struct objtool_file *file, struct instruc</div><div class='ctx'> 	     insn &amp;&amp; insn-&gt;sec == _sec;					\</div><div class='ctx'> 	     insn = next_insn_same_sec(file, insn))</div><div class='ctx'> </div><div class='add'>+#define sym_for_each_insn(file, sym, insn)				\</div><div class='add'>+	for (insn = find_insn(file, sym-&gt;sec, sym-&gt;offset);		\</div><div class='add'>+	     insn &amp;&amp; insn-&gt;offset &lt; sym-&gt;offset + sym-&gt;len;		\</div><div class='add'>+	     insn = next_insn_same_sec(file, insn))</div><div class='add'>+</div><div class='add'>+const char *objtool_disas_insn(struct instruction *insn);</div><div class='add'>+</div><div class='add'>+extern size_t sym_name_max_len;</div><div class='add'>+extern struct disas_context *objtool_disas_ctx;</div><div class='add'>+</div><div class='ctx'> #endif /* _CHECK_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/checksum.h b/tools/objtool/include/objtool/checksum.h<br/>new file mode 100644<br/>index 000000000000..7fe21608722a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/checksum.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/checksum.h</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef _OBJTOOL_CHECKSUM_H</div><div class='add'>+#define _OBJTOOL_CHECKSUM_H</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/elf.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef BUILD_KLP</div><div class='add'>+</div><div class='add'>+static inline void checksum_init(struct symbol *func)</div><div class='add'>+{</div><div class='add'>+	if (func &amp;&amp; !func-&gt;csum.state) {</div><div class='add'>+		func-&gt;csum.state = XXH3_createState();</div><div class='add'>+		XXH3_64bits_reset(func-&gt;csum.state);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void checksum_update(struct symbol *func,</div><div class='add'>+				   struct instruction *insn,</div><div class='add'>+				   const void *data, size_t size)</div><div class='add'>+{</div><div class='add'>+	XXH3_64bits_update(func-&gt;csum.state, data, size);</div><div class='add'>+	dbg_checksum(func, insn, XXH3_64bits_digest(func-&gt;csum.state));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void checksum_finish(struct symbol *func)</div><div class='add'>+{</div><div class='add'>+	if (func &amp;&amp; func-&gt;csum.state) {</div><div class='add'>+		func-&gt;csum.checksum = XXH3_64bits_digest(func-&gt;csum.state);</div><div class='add'>+		func-&gt;csum.state = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* !BUILD_KLP */</div><div class='add'>+</div><div class='add'>+static inline void checksum_init(struct symbol *func) {}</div><div class='add'>+static inline void checksum_update(struct symbol *func,</div><div class='add'>+				   struct instruction *insn,</div><div class='add'>+				   const void *data, size_t size) {}</div><div class='add'>+static inline void checksum_finish(struct symbol *func) {}</div><div class='add'>+</div><div class='add'>+#endif /* !BUILD_KLP */</div><div class='add'>+</div><div class='add'>+#endif /* _OBJTOOL_CHECKSUM_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/checksum_types.h b/tools/objtool/include/objtool/checksum_types.h<br/>new file mode 100644<br/>index 000000000000..507efdd8ab5b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/checksum_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/checksum_types.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _OBJTOOL_CHECKSUM_TYPES_H</div><div class='add'>+#define _OBJTOOL_CHECKSUM_TYPES_H</div><div class='add'>+</div><div class='add'>+struct sym_checksum {</div><div class='add'>+	u64 addr;</div><div class='add'>+	u64 checksum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef BUILD_KLP</div><div class='add'>+</div><div class='add'>+#include &lt;xxhash.h&gt;</div><div class='add'>+</div><div class='add'>+struct checksum {</div><div class='add'>+	XXH3_state_t *state;</div><div class='add'>+	XXH64_hash_t checksum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#else /* !BUILD_KLP */</div><div class='add'>+</div><div class='add'>+struct checksum {};</div><div class='add'>+</div><div class='add'>+#endif /* !BUILD_KLP */</div><div class='add'>+</div><div class='add'>+#endif /* _OBJTOOL_CHECKSUM_TYPES_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/disas.h b/tools/objtool/include/objtool/disas.h<br/>new file mode 100644<br/>index 000000000000..e8f395eff159<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/disas.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/disas.h</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Oracle and/or its affiliates.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _DISAS_H</div><div class='add'>+#define _DISAS_H</div><div class='add'>+</div><div class='add'>+struct alternative;</div><div class='add'>+struct disas_context;</div><div class='add'>+struct disassemble_info;</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+struct disas_context *disas_context_create(struct objtool_file *file);</div><div class='add'>+void disas_context_destroy(struct disas_context *dctx);</div><div class='add'>+void disas_warned_funcs(struct disas_context *dctx);</div><div class='add'>+void disas_funcs(struct disas_context *dctx);</div><div class='add'>+int disas_info_init(struct disassemble_info *dinfo,</div><div class='add'>+		    int arch, int mach32, int mach64,</div><div class='add'>+		    const char *options);</div><div class='add'>+size_t disas_insn(struct disas_context *dctx, struct instruction *insn);</div><div class='add'>+char *disas_result(struct disas_context *dctx);</div><div class='add'>+void disas_print_info(FILE *stream, struct instruction *insn, int depth,</div><div class='add'>+		      const char *format, ...);</div><div class='add'>+void disas_print_insn(FILE *stream, struct disas_context *dctx,</div><div class='add'>+		      struct instruction *insn, int depth,</div><div class='add'>+		      const char *format, ...);</div><div class='add'>+char *disas_alt_name(struct alternative *alt);</div><div class='add'>+const char *disas_alt_type_name(struct instruction *insn);</div><div class='add'>+</div><div class='add'>+#else /* DISAS */</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+</div><div class='add'>+static inline struct disas_context *disas_context_create(struct objtool_file *file)</div><div class='add'>+{</div><div class='add'>+	WARN("Rebuild with libopcodes for disassembly support");</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disas_context_destroy(struct disas_context *dctx) {}</div><div class='add'>+static inline void disas_warned_funcs(struct disas_context *dctx) {}</div><div class='add'>+static inline void disas_funcs(struct disas_context *dctx) {}</div><div class='add'>+</div><div class='add'>+static inline int disas_info_init(struct disassemble_info *dinfo,</div><div class='add'>+				  int arch, int mach32, int mach64,</div><div class='add'>+				  const char *options)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline size_t disas_insn(struct disas_context *dctx,</div><div class='add'>+				struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline char *disas_result(struct disas_context *dctx)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disas_print_info(FILE *stream, struct instruction *insn,</div><div class='add'>+				    int depth, const char *format, ...) {}</div><div class='add'>+static inline void disas_print_insn(FILE *stream, struct disas_context *dctx,</div><div class='add'>+				    struct instruction *insn, int depth,</div><div class='add'>+				    const char *format, ...) {}</div><div class='add'>+static inline char *disas_alt_name(struct alternative *alt)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline const char *disas_alt_type_name(struct instruction *insn)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* DISAS */</div><div class='add'>+</div><div class='add'>+#endif /* _DISAS_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/elf.h b/tools/objtool/include/objtool/elf.h<br/>index 0a2fa3ac0079..e12c516bd320 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/elf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/elf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/elf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/elf.h</a></div><div class='hunk'>@@ -8,12 +8,21 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;gelf.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/hashtable.h&gt;</div><div class='ctx'> #include &lt;linux/rbtree.h&gt;</div><div class='ctx'> #include &lt;linux/jhash.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/endianness.h&gt;</div><div class='add'>+#include &lt;objtool/checksum_types.h&gt;</div><div class='ctx'> #include &lt;arch/elf.h&gt;</div><div class='ctx'> </div><div class='add'>+#define SEC_NAME_LEN		1024</div><div class='add'>+#define SYM_NAME_LEN		512</div><div class='add'>+</div><div class='add'>+#define bswap_if_needed(elf, val) __bswap_if_needed(&amp;elf-&gt;ehdr, val)</div><div class='add'>+</div><div class='ctx'> #ifdef LIBELF_USE_DEPRECATED</div><div class='ctx'> # define elf_getshdrnum    elf_getshnum</div><div class='ctx'> # define elf_getshdrstrndx elf_getshstrndx</div><div class='hunk'>@@ -40,24 +49,27 @@ struct section {</div><div class='ctx'> 	struct section *base, *rsec;</div><div class='ctx'> 	struct symbol *sym;</div><div class='ctx'> 	Elf_Data *data;</div><div class='del'>-	char *name;</div><div class='add'>+	const char *name;</div><div class='ctx'> 	int idx;</div><div class='ctx'> 	bool _changed, text, rodata, noinstr, init, truncate;</div><div class='ctx'> 	struct reloc *relocs;</div><div class='add'>+	unsigned long nr_alloc_relocs;</div><div class='add'>+	struct section *twin;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct symbol {</div><div class='ctx'> 	struct list_head list;</div><div class='add'>+	struct list_head global_list;</div><div class='ctx'> 	struct rb_node node;</div><div class='ctx'> 	struct elf_hash_node hash;</div><div class='ctx'> 	struct elf_hash_node name_hash;</div><div class='ctx'> 	GElf_Sym sym;</div><div class='ctx'> 	struct section *sec;</div><div class='del'>-	char *name;</div><div class='add'>+	const char *name, *demangled_name;</div><div class='ctx'> 	unsigned int idx, len;</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	unsigned long __subtree_last;</div><div class='del'>-	struct symbol *pfunc, *cfunc, *alias;</div><div class='add'>+	struct symbol *pfunc, *cfunc, *alias, *file;</div><div class='ctx'> 	unsigned char bind, type;</div><div class='ctx'> 	u8 uaccess_safe      : 1;</div><div class='ctx'> 	u8 static_call_tramp : 1;</div><div class='hunk'>@@ -70,9 +82,18 @@ struct symbol {</div><div class='ctx'> 	u8 local_label       : 1;</div><div class='ctx'> 	u8 frame_pointer     : 1;</div><div class='ctx'> 	u8 ignore	     : 1;</div><div class='add'>+	u8 nocfi             : 1;</div><div class='add'>+	u8 cold		     : 1;</div><div class='add'>+	u8 prefix	     : 1;</div><div class='add'>+	u8 debug_checksum    : 1;</div><div class='add'>+	u8 changed	     : 1;</div><div class='add'>+	u8 included	     : 1;</div><div class='add'>+	u8 klp		     : 1;</div><div class='ctx'> 	struct list_head pv_target;</div><div class='ctx'> 	struct reloc *relocs;</div><div class='ctx'> 	struct section *group_sec;</div><div class='add'>+	struct checksum csum;</div><div class='add'>+	struct symbol *twin, *clone;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct reloc {</div><div class='hunk'>@@ -87,9 +108,10 @@ struct elf {</div><div class='ctx'> 	GElf_Ehdr ehdr;</div><div class='ctx'> 	int fd;</div><div class='ctx'> 	bool changed;</div><div class='del'>-	char *name;</div><div class='add'>+	const char *name, *tmp_name;</div><div class='ctx'> 	unsigned int num_files;</div><div class='ctx'> 	struct list_head sections;</div><div class='add'>+	struct list_head symbols;</div><div class='ctx'> 	unsigned long num_relocs;</div><div class='ctx'> </div><div class='ctx'> 	int symbol_bits;</div><div class='hunk'>@@ -109,14 +131,37 @@ struct elf {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct elf *elf_open_read(const char *name, int flags);</div><div class='add'>+struct elf *elf_create_file(GElf_Ehdr *ehdr, const char *name);</div><div class='ctx'> </div><div class='ctx'> struct section *elf_create_section(struct elf *elf, const char *name,</div><div class='del'>-				   size_t entsize, unsigned int nr);</div><div class='add'>+				   size_t size, size_t entsize,</div><div class='add'>+				   unsigned int type, unsigned int align,</div><div class='add'>+				   unsigned int flags);</div><div class='ctx'> struct section *elf_create_section_pair(struct elf *elf, const char *name,</div><div class='ctx'> 					size_t entsize, unsigned int nr,</div><div class='ctx'> 					unsigned int reloc_nr);</div><div class='ctx'> </div><div class='del'>-struct symbol *elf_create_prefix_symbol(struct elf *elf, struct symbol *orig, long size);</div><div class='add'>+struct section *elf_create_rela_section(struct elf *elf, struct section *sec,</div><div class='add'>+					unsigned int reloc_nr);</div><div class='add'>+</div><div class='add'>+struct symbol *elf_create_symbol(struct elf *elf, const char *name,</div><div class='add'>+				 struct section *sec, unsigned int bind,</div><div class='add'>+				 unsigned int type, unsigned long offset,</div><div class='add'>+				 size_t size);</div><div class='add'>+struct symbol *elf_create_section_symbol(struct elf *elf, struct section *sec);</div><div class='add'>+</div><div class='add'>+void *elf_add_data(struct elf *elf, struct section *sec, const void *data,</div><div class='add'>+		   size_t size);</div><div class='add'>+</div><div class='add'>+unsigned int elf_add_string(struct elf *elf, struct section *strtab, const char *str);</div><div class='add'>+</div><div class='add'>+struct reloc *elf_create_reloc(struct elf *elf, struct section *sec,</div><div class='add'>+			       unsigned long offset, struct symbol *sym,</div><div class='add'>+			       s64 addend, unsigned int type);</div><div class='add'>+</div><div class='add'>+struct reloc *elf_init_reloc(struct elf *elf, struct section *rsec,</div><div class='add'>+			     unsigned int reloc_idx, unsigned long offset,</div><div class='add'>+			     struct symbol *sym, s64 addend, unsigned int type);</div><div class='ctx'> </div><div class='ctx'> struct reloc *elf_init_reloc_text_sym(struct elf *elf, struct section *sec,</div><div class='ctx'> 				      unsigned long offset,</div><div class='hunk'>@@ -130,16 +175,17 @@ struct reloc *elf_init_reloc_data_sym(struct elf *elf, struct section *sec,</div><div class='ctx'> 				      struct symbol *sym,</div><div class='ctx'> 				      s64 addend);</div><div class='ctx'> </div><div class='del'>-int elf_write_insn(struct elf *elf, struct section *sec,</div><div class='del'>-		   unsigned long offset, unsigned int len,</div><div class='del'>-		   const char *insn);</div><div class='add'>+int elf_write_insn(struct elf *elf, struct section *sec, unsigned long offset,</div><div class='add'>+		   unsigned int len, const char *insn);</div><div class='add'>+</div><div class='ctx'> int elf_write(struct elf *elf);</div><div class='del'>-void elf_close(struct elf *elf);</div><div class='add'>+int elf_close(struct elf *elf);</div><div class='ctx'> </div><div class='ctx'> struct section *find_section_by_name(const struct elf *elf, const char *name);</div><div class='ctx'> struct symbol *find_func_by_offset(struct section *sec, unsigned long offset);</div><div class='ctx'> struct symbol *find_symbol_by_offset(struct section *sec, unsigned long offset);</div><div class='ctx'> struct symbol *find_symbol_by_name(const struct elf *elf, const char *name);</div><div class='add'>+struct symbol *find_global_symbol_by_name(const struct elf *elf, const char *name);</div><div class='ctx'> struct symbol *find_symbol_containing(const struct section *sec, unsigned long offset);</div><div class='ctx'> int find_symbol_hole_containing(const struct section *sec, unsigned long offset);</div><div class='ctx'> struct reloc *find_reloc_by_dest(const struct elf *elf, struct section *sec, unsigned long offset);</div><div class='hunk'>@@ -177,11 +223,76 @@ static inline unsigned int elf_text_rela_type(struct elf *elf)</div><div class='ctx'> 	return elf_addr_size(elf) == 4 ? R_TEXT32 : R_TEXT64;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_undef_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return !sym-&gt;sec-&gt;idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_null_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return !sym-&gt;idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_sec_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_SECTION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_object_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_OBJECT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_func_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_FUNC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_file_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_FILE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_notype_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_NOTYPE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_global_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;bind == STB_GLOBAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_weak_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;bind == STB_WEAK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_local_sym(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;bind == STB_LOCAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_prefix_func(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;prefix;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool is_reloc_sec(struct section *sec)</div><div class='ctx'> {</div><div class='ctx'> 	return sec-&gt;sh.sh_type == SHT_RELA || sec-&gt;sh.sh_type == SHT_REL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_string_sec(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	return sec-&gt;sh.sh_flags &amp; SHF_STRINGS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_text_sec(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	return sec-&gt;sh.sh_flags &amp; SHF_EXECINSTR;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool sec_changed(struct section *sec)</div><div class='ctx'> {</div><div class='ctx'> 	return sec-&gt;_changed;</div><div class='hunk'>@@ -222,6 +333,11 @@ static inline bool is_32bit_reloc(struct reloc *reloc)</div><div class='ctx'> 	return reloc-&gt;sec-&gt;sh.sh_entsize &lt; 16;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned long sec_size(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	return sec-&gt;sh.sh_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define __get_reloc_field(reloc, field)					\</div><div class='ctx'> ({									\</div><div class='ctx'> 	is_32bit_reloc(reloc) ?						\</div><div class='hunk'>@@ -299,6 +415,15 @@ static inline void set_reloc_type(struct elf *elf, struct reloc *reloc, unsigned</div><div class='ctx'> 	mark_sec_changed(elf, reloc-&gt;sec, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned int annotype(struct elf *elf, struct section *sec,</div><div class='add'>+				    struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	unsigned int type;</div><div class='add'>+</div><div class='add'>+	type = *(u32 *)(sec-&gt;data-&gt;d_buf + (reloc_idx(reloc) * 8) + 4);</div><div class='add'>+	return bswap_if_needed(elf, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define RELOC_JUMP_TABLE_BIT 1UL</div><div class='ctx'> </div><div class='ctx'> /* Does reloc mark the beginning of a jump table? */</div><div class='hunk'>@@ -324,28 +449,54 @@ static inline void set_sym_next_reloc(struct reloc *reloc, struct reloc *next)</div><div class='ctx'> 	reloc-&gt;_sym_next_reloc = (unsigned long)next | bit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define for_each_sec(file, sec)						\</div><div class='del'>-	list_for_each_entry(sec, &amp;file-&gt;elf-&gt;sections, list)</div><div class='add'>+#define for_each_sec(elf, sec)						\</div><div class='add'>+	list_for_each_entry(sec, &amp;elf-&gt;sections, list)</div><div class='ctx'> </div><div class='ctx'> #define sec_for_each_sym(sec, sym)					\</div><div class='ctx'> 	list_for_each_entry(sym, &amp;sec-&gt;symbol_list, list)</div><div class='ctx'> </div><div class='del'>-#define for_each_sym(file, sym)						\</div><div class='del'>-	for (struct section *__sec, *__fake = (struct section *)1;	\</div><div class='del'>-	     __fake; __fake = NULL)					\</div><div class='del'>-		for_each_sec(file, __sec)				\</div><div class='del'>-			sec_for_each_sym(__sec, sym)</div><div class='add'>+#define sec_prev_sym(sym)						\</div><div class='add'>+	sym-&gt;sec &amp;&amp; sym-&gt;list.prev != &amp;sym-&gt;sec-&gt;symbol_list ?		\</div><div class='add'>+	list_prev_entry(sym, list) : NULL</div><div class='add'>+</div><div class='add'>+#define for_each_sym(elf, sym)						\</div><div class='add'>+	list_for_each_entry(sym, &amp;elf-&gt;symbols, global_list)</div><div class='add'>+</div><div class='add'>+#define for_each_sym_continue(elf, sym)					\</div><div class='add'>+	list_for_each_entry_continue(sym, &amp;elf-&gt;symbols, global_list)</div><div class='add'>+</div><div class='add'>+#define rsec_next_reloc(rsec, reloc)					\</div><div class='add'>+	reloc_idx(reloc) &lt; sec_num_entries(rsec) - 1 ? reloc + 1 : NULL</div><div class='ctx'> </div><div class='ctx'> #define for_each_reloc(rsec, reloc)					\</div><div class='del'>-	for (int __i = 0, __fake = 1; __fake; __fake = 0)		\</div><div class='del'>-		for (reloc = rsec-&gt;relocs;				\</div><div class='del'>-		     __i &lt; sec_num_entries(rsec);			\</div><div class='del'>-		     __i++, reloc++)</div><div class='add'>+	for (reloc = rsec-&gt;relocs; reloc; reloc = rsec_next_reloc(rsec, reloc))</div><div class='ctx'> </div><div class='ctx'> #define for_each_reloc_from(rsec, reloc)				\</div><div class='del'>-	for (int __i = reloc_idx(reloc);				\</div><div class='del'>-	     __i &lt; sec_num_entries(rsec);				\</div><div class='del'>-	     __i++, reloc++)</div><div class='add'>+	for (; reloc; reloc = rsec_next_reloc(rsec, reloc))</div><div class='add'>+</div><div class='add'>+#define for_each_reloc_continue(rsec, reloc)				\</div><div class='add'>+	for (reloc = rsec_next_reloc(rsec, reloc); reloc;		\</div><div class='add'>+	     reloc = rsec_next_reloc(rsec, reloc))</div><div class='add'>+</div><div class='add'>+#define sym_for_each_reloc(elf, sym, reloc)				\</div><div class='add'>+	for (reloc = find_reloc_by_dest_range(elf, sym-&gt;sec,		\</div><div class='add'>+					      sym-&gt;offset, sym-&gt;len);	\</div><div class='add'>+	     reloc &amp;&amp; reloc_offset(reloc) &lt;  sym-&gt;offset + sym-&gt;len;	\</div><div class='add'>+	     reloc = rsec_next_reloc(sym-&gt;sec-&gt;rsec, reloc))</div><div class='add'>+</div><div class='add'>+static inline struct symbol *get_func_prefix(struct symbol *func)</div><div class='add'>+{</div><div class='add'>+	struct symbol *prev;</div><div class='add'>+</div><div class='add'>+	if (!is_func_sym(func))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	prev = sec_prev_sym(func);</div><div class='add'>+	if (prev &amp;&amp; is_prefix_func(prev))</div><div class='add'>+		return prev;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define OFFSET_STRIDE_BITS	4</div><div class='ctx'> #define OFFSET_STRIDE		(1UL &lt;&lt; OFFSET_STRIDE_BITS)</div><div class='head'>diff --git a/tools/objtool/include/objtool/endianness.h b/tools/objtool/include/objtool/endianness.h<br/>index 4d2aa9b0fe2f..aebcd2338668 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/endianness.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/endianness.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/endianness.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/endianness.h</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;endian.h&gt;</div><div class='del'>-#include &lt;objtool/elf.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Does a byte swap if target file endianness doesn't match the host, i.e. cross</div><div class='hunk'>@@ -12,16 +11,16 @@</div><div class='ctx'>  * To be used for multi-byte values conversion, which are read from / about</div><div class='ctx'>  * to be written to a target native endianness ELF file.</div><div class='ctx'>  */</div><div class='del'>-static inline bool need_bswap(struct elf *elf)</div><div class='add'>+static inline bool need_bswap(GElf_Ehdr *ehdr)</div><div class='ctx'> {</div><div class='ctx'> 	return (__BYTE_ORDER == __LITTLE_ENDIAN) ^</div><div class='del'>-	       (elf-&gt;ehdr.e_ident[EI_DATA] == ELFDATA2LSB);</div><div class='add'>+	       (ehdr-&gt;e_ident[EI_DATA] == ELFDATA2LSB);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define bswap_if_needed(elf, val)					\</div><div class='add'>+#define __bswap_if_needed(ehdr, val)					\</div><div class='ctx'> ({									\</div><div class='ctx'> 	__typeof__(val) __ret;						\</div><div class='del'>-	bool __need_bswap = need_bswap(elf);				\</div><div class='add'>+	bool __need_bswap = need_bswap(ehdr);				\</div><div class='ctx'> 	switch (sizeof(val)) {						\</div><div class='ctx'> 	case 8:								\</div><div class='ctx'> 		__ret = __need_bswap ? bswap_64(val) : (val); break;	\</div><div class='head'>diff --git a/tools/objtool/include/objtool/klp.h b/tools/objtool/include/objtool/klp.h<br/>new file mode 100644<br/>index 000000000000..ad830a7ce55b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/klp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/klp.h</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef _OBJTOOL_KLP_H</div><div class='add'>+#define _OBJTOOL_KLP_H</div><div class='add'>+</div><div class='add'>+#define SHF_RELA_LIVEPATCH	0x00100000</div><div class='add'>+#define SHN_LIVEPATCH		0xff20</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __klp_objects and __klp_funcs are created by klp diff and used by the patch</div><div class='add'>+ * module init code to build the klp_patch, klp_object and klp_func structs</div><div class='add'>+ * needed by the livepatch API.</div><div class='add'>+ */</div><div class='add'>+#define KLP_OBJECTS_SEC	"__klp_objects"</div><div class='add'>+#define KLP_FUNCS_SEC	"__klp_funcs"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * __klp_relocs is an intermediate section which are created by klp diff and</div><div class='add'>+ * converted into KLP symbols/relas by "objtool klp post-link".  This is needed</div><div class='add'>+ * to work around the linker, which doesn't preserve SHN_LIVEPATCH or</div><div class='add'>+ * SHF_RELA_LIVEPATCH, nor does it support having two RELA sections for a</div><div class='add'>+ * single PROGBITS section.</div><div class='add'>+ */</div><div class='add'>+#define KLP_RELOCS_SEC	"__klp_relocs"</div><div class='add'>+#define KLP_STRINGS_SEC	".rodata.klp.str1.1"</div><div class='add'>+</div><div class='add'>+struct klp_reloc {</div><div class='add'>+	void *offset;</div><div class='add'>+	void *sym;</div><div class='add'>+	u32 type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cmd_klp_diff(int argc, const char **argv);</div><div class='add'>+int cmd_klp_post_link(int argc, const char **argv);</div><div class='add'>+</div><div class='add'>+#endif /* _OBJTOOL_KLP_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/objtool.h b/tools/objtool/include/objtool/objtool.h<br/>index c0dc86a78ff6..6dc12a59ad00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/objtool.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/objtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/objtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/objtool.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ struct objtool_file {</div><div class='ctx'> 	struct list_head mcount_loc_list;</div><div class='ctx'> 	struct list_head endbr_list;</div><div class='ctx'> 	struct list_head call_list;</div><div class='del'>-	bool ignore_unreachables, hints, rodata;</div><div class='add'>+	bool ignore_unreachables, hints, rodata, klp;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int nr_endbr;</div><div class='ctx'> 	unsigned int nr_endbr_int;</div><div class='hunk'>@@ -39,6 +39,10 @@ struct objtool_file {</div><div class='ctx'> 	struct pv_state *pv_ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+char *top_level_dir(const char *file);</div><div class='add'>+</div><div class='add'>+int init_signal_handler(void);</div><div class='add'>+</div><div class='ctx'> struct objtool_file *objtool_open_read(const char *_objname);</div><div class='ctx'> </div><div class='ctx'> int objtool_pv_add(struct objtool_file *file, int idx, struct symbol *func);</div><div class='head'>diff --git a/tools/objtool/include/objtool/special.h b/tools/objtool/include/objtool/special.h<br/>index 72d09c0adf1a..121c3761899c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/special.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/special.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/special.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/special.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@ struct special_alt {</div><div class='ctx'> 	struct section *new_sec;</div><div class='ctx'> 	unsigned long new_off;</div><div class='ctx'> </div><div class='del'>-	unsigned int orig_len, new_len; /* group only */</div><div class='add'>+	unsigned int orig_len, new_len, feature; /* group only */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int special_get_alts(struct elf *elf, struct list_head *alts);</div><div class='hunk'>@@ -38,4 +38,6 @@ bool arch_support_alt_relocation(struct special_alt *special_alt,</div><div class='ctx'> struct reloc *arch_find_switch_table(struct objtool_file *file,</div><div class='ctx'> 				     struct instruction *insn,</div><div class='ctx'> 				     unsigned long *table_size);</div><div class='add'>+const char *arch_cpu_feature_name(int feature_number);</div><div class='add'>+</div><div class='ctx'> #endif /* _SPECIAL_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/trace.h b/tools/objtool/include/objtool/trace.h<br/>new file mode 100644<br/>index 000000000000..70b574366797<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/trace.h</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Oracle and/or its affiliates.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _TRACE_H</div><div class='add'>+#define _TRACE_H</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/check.h&gt;</div><div class='add'>+#include &lt;objtool/disas.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef DISAS</div><div class='add'>+</div><div class='add'>+extern bool trace;</div><div class='add'>+extern int trace_depth;</div><div class='add'>+</div><div class='add'>+#define TRACE(fmt, ...)						\</div><div class='add'>+({	if (trace)						\</div><div class='add'>+		fprintf(stderr, fmt, ##__VA_ARGS__);		\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print the instruction address and a message. The instruction</div><div class='add'>+ * itself is not printed.</div><div class='add'>+ */</div><div class='add'>+#define TRACE_ADDR(insn, fmt, ...)				\</div><div class='add'>+({								\</div><div class='add'>+	if (trace) {						\</div><div class='add'>+		disas_print_info(stderr, insn, trace_depth - 1, \</div><div class='add'>+				 fmt "\n", ##__VA_ARGS__);	\</div><div class='add'>+	}							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Print the instruction address, the instruction and a message.</div><div class='add'>+ */</div><div class='add'>+#define TRACE_INSN(insn, fmt, ...)				\</div><div class='add'>+({								\</div><div class='add'>+	if (trace) {						\</div><div class='add'>+		disas_print_insn(stderr, objtool_disas_ctx,	\</div><div class='add'>+				 insn, trace_depth - 1,		\</div><div class='add'>+				 fmt, ##__VA_ARGS__);		\</div><div class='add'>+		fprintf(stderr, "\n");				\</div><div class='add'>+		insn-&gt;trace = 1;				\</div><div class='add'>+	}							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define TRACE_INSN_STATE(insn, sprev, snext)			\</div><div class='add'>+({								\</div><div class='add'>+	if (trace)						\</div><div class='add'>+		trace_insn_state(insn, sprev, snext);		\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT_FMT(pfx, fmt) pfx "&lt;%s.%lx&gt; " fmt</div><div class='add'>+#define TRACE_ALT_ARG(insn) disas_alt_type_name(insn), (insn)-&gt;offset</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT(insn, fmt, ...)				\</div><div class='add'>+	TRACE_INSN(insn, TRACE_ALT_FMT("", fmt),		\</div><div class='add'>+		   TRACE_ALT_ARG(insn), ##__VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT_INFO(insn, pfx, fmt, ...)			\</div><div class='add'>+	TRACE_ADDR(insn, TRACE_ALT_FMT(pfx, fmt),		\</div><div class='add'>+		   TRACE_ALT_ARG(insn), ##__VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT_INFO_NOADDR(insn, pfx, fmt, ...)		\</div><div class='add'>+	TRACE_ADDR(NULL, TRACE_ALT_FMT(pfx, fmt),		\</div><div class='add'>+		   TRACE_ALT_ARG(insn), ##__VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT_BEGIN(insn, alt, alt_name)			\</div><div class='add'>+({								\</div><div class='add'>+	if (trace) {						\</div><div class='add'>+		alt_name = disas_alt_name(alt);			\</div><div class='add'>+		trace_alt_begin(insn, alt, alt_name);		\</div><div class='add'>+	}							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define TRACE_ALT_END(insn, alt, alt_name)			\</div><div class='add'>+({								\</div><div class='add'>+	if (trace) {						\</div><div class='add'>+		trace_alt_end(insn, alt, alt_name);		\</div><div class='add'>+		free(alt_name);					\</div><div class='add'>+	}							\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static inline void trace_enable(void)</div><div class='add'>+{</div><div class='add'>+	trace = true;</div><div class='add'>+	trace_depth = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void trace_disable(void)</div><div class='add'>+{</div><div class='add'>+	trace = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void trace_depth_inc(void)</div><div class='add'>+{</div><div class='add'>+	if (trace)</div><div class='add'>+		trace_depth++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void trace_depth_dec(void)</div><div class='add'>+{</div><div class='add'>+	if (trace)</div><div class='add'>+		trace_depth--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void trace_insn_state(struct instruction *insn, struct insn_state *sprev,</div><div class='add'>+		      struct insn_state *snext);</div><div class='add'>+void trace_alt_begin(struct instruction *orig_insn, struct alternative *alt,</div><div class='add'>+		     char *alt_name);</div><div class='add'>+void trace_alt_end(struct instruction *orig_insn, struct alternative *alt,</div><div class='add'>+		   char *alt_name);</div><div class='add'>+</div><div class='add'>+#else /* DISAS */</div><div class='add'>+</div><div class='add'>+#define TRACE(fmt, ...) ({})</div><div class='add'>+#define TRACE_ADDR(insn, fmt, ...) ({})</div><div class='add'>+#define TRACE_INSN(insn, fmt, ...) ({})</div><div class='add'>+#define TRACE_INSN_STATE(insn, sprev, snext) ({})</div><div class='add'>+#define TRACE_ALT(insn, fmt, ...) ({})</div><div class='add'>+#define TRACE_ALT_INFO(insn, fmt, ...) ({})</div><div class='add'>+#define TRACE_ALT_INFO_NOADDR(insn, fmt, ...) ({})</div><div class='add'>+#define TRACE_ALT_BEGIN(insn, alt, alt_name) ({})</div><div class='add'>+#define TRACE_ALT_END(insn, alt, alt_name) ({})</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void trace_enable(void) {}</div><div class='add'>+static inline void trace_disable(void) {}</div><div class='add'>+static inline void trace_depth_inc(void) {}</div><div class='add'>+static inline void trace_depth_dec(void) {}</div><div class='add'>+static inline void trace_alt_begin(struct instruction *orig_insn,</div><div class='add'>+				   struct alternative *alt,</div><div class='add'>+				   char *alt_name) {};</div><div class='add'>+static inline void trace_alt_end(struct instruction *orig_insn,</div><div class='add'>+				 struct alternative *alt,</div><div class='add'>+				 char *alt_name) {};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _TRACE_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/util.h b/tools/objtool/include/objtool/util.h<br/>new file mode 100644<br/>index 000000000000..a0180b312f73<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/util.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/util.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef _UTIL_H</div><div class='add'>+#define _UTIL_H</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+</div><div class='add'>+#define snprintf_check(str, size, format, args...)			\</div><div class='add'>+({									\</div><div class='add'>+	int __ret = snprintf(str, size, format, args);			\</div><div class='add'>+	if (__ret &lt; 0)							\</div><div class='add'>+		ERROR_GLIBC("snprintf");				\</div><div class='add'>+	else if (__ret &gt;= size)						\</div><div class='add'>+		ERROR("snprintf() failed for '" format "'", args);	\</div><div class='add'>+	else								\</div><div class='add'>+		__ret = 0;						\</div><div class='add'>+	__ret;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#endif /* _UTIL_H */</div><div class='head'>diff --git a/tools/objtool/include/objtool/warn.h b/tools/objtool/include/objtool/warn.h<br/>index cb8fe846d9dd..25ff7942b4d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/warn.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/include/objtool/warn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/include/objtool/warn.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/include/objtool/warn.h</a></div><div class='hunk'>@@ -77,9 +77,11 @@ static inline char *offstr(struct section *sec, unsigned long offset)</div><div class='ctx'> #define WARN_INSN(insn, format, ...)					\</div><div class='ctx'> ({									\</div><div class='ctx'> 	struct instruction *_insn = (insn);				\</div><div class='del'>-	if (!_insn-&gt;sym || !_insn-&gt;sym-&gt;warned)				\</div><div class='add'>+	if (!_insn-&gt;sym || !_insn-&gt;sym-&gt;warned)	{			\</div><div class='ctx'> 		WARN_FUNC(_insn-&gt;sec, _insn-&gt;offset, format,		\</div><div class='ctx'> 			  ##__VA_ARGS__);				\</div><div class='add'>+		BT_INSN(_insn, "");					\</div><div class='add'>+	}								\</div><div class='ctx'> 	if (_insn-&gt;sym)							\</div><div class='ctx'> 		_insn-&gt;sym-&gt;warned = 1;					\</div><div class='ctx'> })</div><div class='hunk'>@@ -87,10 +89,15 @@ static inline char *offstr(struct section *sec, unsigned long offset)</div><div class='ctx'> #define BT_INSN(insn, format, ...)				\</div><div class='ctx'> ({								\</div><div class='ctx'> 	if (opts.verbose || opts.backtrace) {			\</div><div class='del'>-		struct instruction *_insn = (insn);		\</div><div class='del'>-		char *_str = offstr(_insn-&gt;sec, _insn-&gt;offset); \</div><div class='del'>-		WARN("  %s: " format, _str, ##__VA_ARGS__);	\</div><div class='del'>-		free(_str);					\</div><div class='add'>+		struct instruction *__insn = (insn);		\</div><div class='add'>+		char *_str = offstr(__insn-&gt;sec, __insn-&gt;offset); \</div><div class='add'>+		const char *_istr = objtool_disas_insn(__insn);	\</div><div class='add'>+		int _len;					\</div><div class='add'>+		_len = snprintf(NULL, 0, "  %s: " format,  _str, ##__VA_ARGS__);	\</div><div class='add'>+		_len = (_len &lt; 50) ? 50 - _len : 0;		\</div><div class='add'>+		WARN("  %s: " format "  %*s%s", _str, ##__VA_ARGS__, _len, "", _istr); \</div><div class='add'>+		free(_str);						\</div><div class='add'>+		__insn-&gt;trace = 1;				\</div><div class='ctx'> 	}							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='hunk'>@@ -102,4 +109,53 @@ static inline char *offstr(struct section *sec, unsigned long offset)</div><div class='ctx'> #define ERROR_FUNC(sec, offset, format, ...) __WARN_FUNC(ERROR_STR, sec, offset, format, ##__VA_ARGS__)</div><div class='ctx'> #define ERROR_INSN(insn, format, ...) WARN_FUNC(insn-&gt;sec, insn-&gt;offset, format, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='add'>+extern bool debug;</div><div class='add'>+extern int indent;</div><div class='add'>+</div><div class='add'>+static inline void unindent(int *unused) { indent--; }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Clang prior to 17 is being silly and considers many __cleanup() variables</div><div class='add'>+ * as unused (because they are, their sole purpose is to go out of scope).</div><div class='add'>+ *</div><div class='add'>+ * https://github.com/llvm/llvm-project/commit/877210faa447f4cc7db87812f8ed80e398fedd61</div><div class='add'>+ */</div><div class='add'>+#undef __cleanup</div><div class='add'>+#define __cleanup(func) __maybe_unused __attribute__((__cleanup__(func)))</div><div class='add'>+</div><div class='add'>+#define __dbg(format, ...)						\</div><div class='add'>+	fprintf(stderr,							\</div><div class='add'>+		"DEBUG: %s%s" format "\n",				\</div><div class='add'>+		objname ?: "",						\</div><div class='add'>+		objname ? ": " : "",					\</div><div class='add'>+		##__VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define dbg(args...)							\</div><div class='add'>+({									\</div><div class='add'>+	if (unlikely(debug))						\</div><div class='add'>+		__dbg(args);						\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define __dbg_indent(format, ...)					\</div><div class='add'>+({									\</div><div class='add'>+	if (unlikely(debug))						\</div><div class='add'>+		__dbg("%*s" format, indent * 8, "", ##__VA_ARGS__);	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define dbg_indent(args...)						\</div><div class='add'>+	int __cleanup(unindent) __dummy_##__COUNTER__;			\</div><div class='add'>+	__dbg_indent(args);						\</div><div class='add'>+	indent++</div><div class='add'>+</div><div class='add'>+#define dbg_checksum(func, insn, checksum)				\</div><div class='add'>+({									\</div><div class='add'>+	if (unlikely(insn-&gt;sym &amp;&amp; insn-&gt;sym-&gt;pfunc &amp;&amp;			\</div><div class='add'>+		     insn-&gt;sym-&gt;pfunc-&gt;debug_checksum)) {		\</div><div class='add'>+		char *insn_off = offstr(insn-&gt;sec, insn-&gt;offset);	\</div><div class='add'>+		__dbg("checksum: %s %s %016lx",				\</div><div class='add'>+		      func-&gt;name, insn_off, checksum);			\</div><div class='add'>+		free(insn_off);						\</div><div class='add'>+	}								\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #endif /* _WARN_H */</div><div class='head'>diff --git a/tools/objtool/klp-diff.c b/tools/objtool/klp-diff.c<br/>new file mode 100644<br/>index 000000000000..4d1f9e9977eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/klp-diff.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/klp-diff.c</a></div><div class='hunk'>@@ -0,0 +1,1723 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#define _GNU_SOURCE /* memmem() */</div><div class='add'>+#include &lt;subcmd/parse-options.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;libgen.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;ctype.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/objtool.h&gt;</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+#include &lt;objtool/arch.h&gt;</div><div class='add'>+#include &lt;objtool/klp.h&gt;</div><div class='add'>+#include &lt;objtool/util.h&gt;</div><div class='add'>+#include &lt;arch/special.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/objtool_types.h&gt;</div><div class='add'>+#include &lt;linux/livepatch_external.h&gt;</div><div class='add'>+#include &lt;linux/stringify.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/jhash.h&gt;</div><div class='add'>+</div><div class='add'>+#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)-&gt;MEMBER))</div><div class='add'>+</div><div class='add'>+struct elfs {</div><div class='add'>+	struct elf *orig, *patched, *out;</div><div class='add'>+	const char *modname;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct export {</div><div class='add'>+	struct hlist_node hash;</div><div class='add'>+	char *mod, *sym;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const klp_diff_usage[] = {</div><div class='add'>+	"objtool klp diff [&lt;options&gt;] &lt;in1.o&gt; &lt;in2.o&gt; &lt;out.o&gt;",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct option klp_diff_options[] = {</div><div class='add'>+	OPT_GROUP("Options:"),</div><div class='add'>+	OPT_BOOLEAN('d', "debug", &amp;debug, "enable debug output"),</div><div class='add'>+	OPT_END(),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_HASHTABLE(exports, 15);</div><div class='add'>+</div><div class='add'>+static inline u32 str_hash(const char *str)</div><div class='add'>+{</div><div class='add'>+	return jhash(str, strlen(str), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *escape_str(const char *orig)</div><div class='add'>+{</div><div class='add'>+	size_t len = 0;</div><div class='add'>+	const char *a;</div><div class='add'>+	char *b, *new;</div><div class='add'>+</div><div class='add'>+	for (a = orig; *a; a++) {</div><div class='add'>+		switch (*a) {</div><div class='add'>+		case '\001': len += 5; break;</div><div class='add'>+		case '\n':</div><div class='add'>+		case '\t':   len += 2; break;</div><div class='add'>+		default: len++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new = malloc(len + 1);</div><div class='add'>+	if (!new)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (a = orig, b = new; *a; a++) {</div><div class='add'>+		switch (*a) {</div><div class='add'>+		case '\001': memcpy(b, "&lt;SOH&gt;", 5); b += 5; break;</div><div class='add'>+		case '\n': *b++ = '\\'; *b++ = 'n'; break;</div><div class='add'>+		case '\t': *b++ = '\\'; *b++ = 't'; break;</div><div class='add'>+		default:   *b++ = *a;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*b = '\0';</div><div class='add'>+	return new;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_exports(void)</div><div class='add'>+{</div><div class='add'>+	const char *symvers = "Module.symvers";</div><div class='add'>+	char line[1024], *path = NULL;</div><div class='add'>+	unsigned int line_num = 1;</div><div class='add'>+	FILE *file;</div><div class='add'>+</div><div class='add'>+	file = fopen(symvers, "r");</div><div class='add'>+	if (!file) {</div><div class='add'>+		path = top_level_dir(symvers);</div><div class='add'>+		if (!path) {</div><div class='add'>+			ERROR("can't open '%s', \"objtool diff\" should be run from the kernel tree", symvers);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		file = fopen(path, "r");</div><div class='add'>+		if (!file) {</div><div class='add'>+			ERROR_GLIBC("fopen");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (fgets(line, 1024, file)) {</div><div class='add'>+		char *sym, *mod, *type;</div><div class='add'>+		struct export *export;</div><div class='add'>+</div><div class='add'>+		sym = strchr(line, '\t');</div><div class='add'>+		if (!sym) {</div><div class='add'>+			ERROR("malformed Module.symvers (sym) at line %d", line_num);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*sym++ = '\0';</div><div class='add'>+</div><div class='add'>+		mod = strchr(sym, '\t');</div><div class='add'>+		if (!mod) {</div><div class='add'>+			ERROR("malformed Module.symvers (mod) at line %d", line_num);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*mod++ = '\0';</div><div class='add'>+</div><div class='add'>+		type = strchr(mod, '\t');</div><div class='add'>+		if (!type) {</div><div class='add'>+			ERROR("malformed Module.symvers (type) at line %d", line_num);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*type++ = '\0';</div><div class='add'>+</div><div class='add'>+		if (*sym == '\0' || *mod == '\0') {</div><div class='add'>+			ERROR("malformed Module.symvers at line %d", line_num);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		export = calloc(1, sizeof(*export));</div><div class='add'>+		if (!export) {</div><div class='add'>+			ERROR_GLIBC("calloc");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		export-&gt;mod = strdup(mod);</div><div class='add'>+		if (!export-&gt;mod) {</div><div class='add'>+			ERROR_GLIBC("strdup");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		export-&gt;sym = strdup(sym);</div><div class='add'>+		if (!export-&gt;sym) {</div><div class='add'>+			ERROR_GLIBC("strdup");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hash_add(exports, &amp;export-&gt;hash, str_hash(sym));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(path);</div><div class='add'>+	fclose(file);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_sym_checksums(struct elf *elf)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+</div><div class='add'>+	sec = find_section_by_name(elf, ".discard.sym_checksum");</div><div class='add'>+	if (!sec) {</div><div class='add'>+		ERROR("'%s' missing .discard.sym_checksum section, file not processed by 'objtool --checksum'?",</div><div class='add'>+		      elf-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sec-&gt;rsec) {</div><div class='add'>+		ERROR("missing reloc section for .discard.sym_checksum");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sec_size(sec) % sizeof(struct sym_checksum)) {</div><div class='add'>+		ERROR("struct sym_checksum size mismatch");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; sec_size(sec) / sizeof(struct sym_checksum); i++) {</div><div class='add'>+		struct sym_checksum *sym_checksum;</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+		struct symbol *sym;</div><div class='add'>+</div><div class='add'>+		sym_checksum = (struct sym_checksum *)sec-&gt;data-&gt;d_buf + i;</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(elf, sec, i * sizeof(*sym_checksum));</div><div class='add'>+		if (!reloc) {</div><div class='add'>+			ERROR("can't find reloc for sym_checksum[%d]", i);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sym = reloc-&gt;sym;</div><div class='add'>+</div><div class='add'>+		if (is_sec_sym(sym)) {</div><div class='add'>+			ERROR("not sure how to handle section %s", sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (is_func_sym(sym))</div><div class='add'>+			sym-&gt;csum.checksum = sym_checksum-&gt;checksum;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct symbol *first_file_symbol(struct elf *elf)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	for_each_sym(elf, sym) {</div><div class='add'>+		if (is_file_sym(sym))</div><div class='add'>+			return sym;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct symbol *next_file_symbol(struct elf *elf, struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	for_each_sym_continue(elf, sym) {</div><div class='add'>+		if (is_file_sym(sym))</div><div class='add'>+			return sym;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Certain static local variables should never be correlated.  They will be</div><div class='add'>+ * used in place rather than referencing the originals.</div><div class='add'>+ */</div><div class='add'>+static bool is_uncorrelated_static_local(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	static const char * const vars[] = {</div><div class='add'>+		"__already_done.",</div><div class='add'>+		"__func__.",</div><div class='add'>+		"__key.",</div><div class='add'>+		"__warned.",</div><div class='add'>+		"_entry.",</div><div class='add'>+		"_entry_ptr.",</div><div class='add'>+		"_rs.",</div><div class='add'>+		"descriptor.",</div><div class='add'>+		"CSWTCH.",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!is_object_sym(sym) || !is_local_sym(sym))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(sym-&gt;sec-&gt;name, ".data.once"))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(vars); i++) {</div><div class='add'>+		if (strstarts(sym-&gt;name, vars[i]))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Clang emits several useless .Ltmp_* code labels.</div><div class='add'>+ */</div><div class='add'>+static bool is_clang_tmp_label(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return sym-&gt;type == STT_NOTYPE &amp;&amp;</div><div class='add'>+	       is_text_sec(sym-&gt;sec) &amp;&amp;</div><div class='add'>+	       strstarts(sym-&gt;name, ".Ltmp") &amp;&amp;</div><div class='add'>+	       isdigit(sym-&gt;name[5]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_special_section(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	static const char * const specials[] = {</div><div class='add'>+		".altinstructions",</div><div class='add'>+		".smp_locks",</div><div class='add'>+		"__bug_table",</div><div class='add'>+		"__ex_table",</div><div class='add'>+		"__jump_table",</div><div class='add'>+		"__mcount_loc",</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Extract .static_call_sites here to inherit non-module</div><div class='add'>+		 * preferential treatment.  The later static call processing</div><div class='add'>+		 * during klp module build will be skipped when it sees this</div><div class='add'>+		 * section already exists.</div><div class='add'>+		 */</div><div class='add'>+		".static_call_sites",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const char * const non_special_discards[] = {</div><div class='add'>+		".discard.addressable",</div><div class='add'>+		".discard.sym_checksum",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (is_text_sec(sec))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(specials); i++) {</div><div class='add'>+		if (!strcmp(sec-&gt;name, specials[i]))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Most .discard data sections are special */</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(non_special_discards); i++) {</div><div class='add'>+		if (!strcmp(sec-&gt;name, non_special_discards[i]))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return strstarts(sec-&gt;name, ".discard.");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These sections are referenced by special sections but aren't considered</div><div class='add'>+ * special sections themselves.</div><div class='add'>+ */</div><div class='add'>+static bool is_special_section_aux(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	static const char * const specials_aux[] = {</div><div class='add'>+		".altinstr_replacement",</div><div class='add'>+		".altinstr_aux",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(specials_aux); i++) {</div><div class='add'>+		if (!strcmp(sec-&gt;name, specials_aux[i]))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These symbols should never be correlated, so their local patched versions</div><div class='add'>+ * are used instead of linking to the originals.</div><div class='add'>+ */</div><div class='add'>+static bool dont_correlate(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	return is_file_sym(sym) ||</div><div class='add'>+	       is_null_sym(sym) ||</div><div class='add'>+	       is_sec_sym(sym) ||</div><div class='add'>+	       is_prefix_func(sym) ||</div><div class='add'>+	       is_uncorrelated_static_local(sym) ||</div><div class='add'>+	       is_clang_tmp_label(sym) ||</div><div class='add'>+	       is_string_sec(sym-&gt;sec) ||</div><div class='add'>+	       is_special_section(sym-&gt;sec) ||</div><div class='add'>+	       is_special_section_aux(sym-&gt;sec) ||</div><div class='add'>+	       strstarts(sym-&gt;name, "__initcall__");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For each symbol in the original kernel, find its corresponding "twin" in the</div><div class='add'>+ * patched kernel.</div><div class='add'>+ */</div><div class='add'>+static int correlate_symbols(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct symbol *file1_sym, *file2_sym;</div><div class='add'>+	struct symbol *sym1, *sym2;</div><div class='add'>+</div><div class='add'>+	/* Correlate locals */</div><div class='add'>+	for (file1_sym = first_file_symbol(e-&gt;orig),</div><div class='add'>+	     file2_sym = first_file_symbol(e-&gt;patched); ;</div><div class='add'>+	     file1_sym = next_file_symbol(e-&gt;orig, file1_sym),</div><div class='add'>+	     file2_sym = next_file_symbol(e-&gt;patched, file2_sym)) {</div><div class='add'>+</div><div class='add'>+		if (!file1_sym &amp;&amp; file2_sym) {</div><div class='add'>+			ERROR("FILE symbol mismatch: NULL != %s", file2_sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (file1_sym &amp;&amp; !file2_sym) {</div><div class='add'>+			ERROR("FILE symbol mismatch: %s != NULL", file1_sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!file1_sym)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (strcmp(file1_sym-&gt;name, file2_sym-&gt;name)) {</div><div class='add'>+			ERROR("FILE symbol mismatch: %s != %s", file1_sym-&gt;name, file2_sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		file1_sym-&gt;twin = file2_sym;</div><div class='add'>+		file2_sym-&gt;twin = file1_sym;</div><div class='add'>+</div><div class='add'>+		sym1 = file1_sym;</div><div class='add'>+</div><div class='add'>+		for_each_sym_continue(e-&gt;orig, sym1) {</div><div class='add'>+			if (is_file_sym(sym1) || !is_local_sym(sym1))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (dont_correlate(sym1))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			sym2 = file2_sym;</div><div class='add'>+			for_each_sym_continue(e-&gt;patched, sym2) {</div><div class='add'>+				if (is_file_sym(sym2) || !is_local_sym(sym2))</div><div class='add'>+					break;</div><div class='add'>+</div><div class='add'>+				if (sym2-&gt;twin || dont_correlate(sym2))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				if (strcmp(sym1-&gt;demangled_name, sym2-&gt;demangled_name))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				sym1-&gt;twin = sym2;</div><div class='add'>+				sym2-&gt;twin = sym1;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Correlate globals */</div><div class='add'>+	for_each_sym(e-&gt;orig, sym1) {</div><div class='add'>+		if (sym1-&gt;bind == STB_LOCAL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		sym2 = find_global_symbol_by_name(e-&gt;patched, sym1-&gt;name);</div><div class='add'>+</div><div class='add'>+		if (sym2 &amp;&amp; !sym2-&gt;twin &amp;&amp; !strcmp(sym1-&gt;name, sym2-&gt;name)) {</div><div class='add'>+			sym1-&gt;twin = sym2;</div><div class='add'>+			sym2-&gt;twin = sym1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_sym(e-&gt;orig, sym1) {</div><div class='add'>+		if (sym1-&gt;twin || dont_correlate(sym1))</div><div class='add'>+			continue;</div><div class='add'>+		WARN("no correlation: %s", sym1-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* "sympos" is used by livepatch to disambiguate duplicate symbol names */</div><div class='add'>+static unsigned long find_sympos(struct elf *elf, struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	bool vmlinux = str_ends_with(objname, "vmlinux.o");</div><div class='add'>+	unsigned long sympos = 0, nr_matches = 0;</div><div class='add'>+	bool has_dup = false;</div><div class='add'>+	struct symbol *s;</div><div class='add'>+</div><div class='add'>+	if (sym-&gt;bind != STB_LOCAL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (vmlinux &amp;&amp; sym-&gt;type == STT_FUNC) {</div><div class='add'>+		/*</div><div class='add'>+		 * HACK: Unfortunately, symbol ordering can differ between</div><div class='add'>+		 * vmlinux.o and vmlinux due to the linker script emitting</div><div class='add'>+		 * .text.unlikely* before .text*.  Count .text.unlikely* first.</div><div class='add'>+		 *</div><div class='add'>+		 * TODO: Disambiguate symbols more reliably (checksums?)</div><div class='add'>+		 */</div><div class='add'>+		for_each_sym(elf, s) {</div><div class='add'>+			if (strstarts(s-&gt;sec-&gt;name, ".text.unlikely") &amp;&amp;</div><div class='add'>+			    !strcmp(s-&gt;name, sym-&gt;name)) {</div><div class='add'>+				nr_matches++;</div><div class='add'>+				if (s == sym)</div><div class='add'>+					sympos = nr_matches;</div><div class='add'>+				else</div><div class='add'>+					has_dup = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		for_each_sym(elf, s) {</div><div class='add'>+			if (!strstarts(s-&gt;sec-&gt;name, ".text.unlikely") &amp;&amp;</div><div class='add'>+			    !strcmp(s-&gt;name, sym-&gt;name)) {</div><div class='add'>+				nr_matches++;</div><div class='add'>+				if (s == sym)</div><div class='add'>+					sympos = nr_matches;</div><div class='add'>+				else</div><div class='add'>+					has_dup = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for_each_sym(elf, s) {</div><div class='add'>+			if (!strcmp(s-&gt;name, sym-&gt;name)) {</div><div class='add'>+				nr_matches++;</div><div class='add'>+				if (s == sym)</div><div class='add'>+					sympos = nr_matches;</div><div class='add'>+				else</div><div class='add'>+					has_dup = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sympos) {</div><div class='add'>+		ERROR("can't find sympos for %s", sym-&gt;name);</div><div class='add'>+		return ULONG_MAX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return has_dup ? sympos : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clone_sym_relocs(struct elfs *e, struct symbol *patched_sym);</div><div class='add'>+</div><div class='add'>+static struct symbol *__clone_symbol(struct elf *elf, struct symbol *patched_sym,</div><div class='add'>+				     bool data_too)</div><div class='add'>+{</div><div class='add'>+	struct section *out_sec = NULL;</div><div class='add'>+	unsigned long offset = 0;</div><div class='add'>+	struct symbol *out_sym;</div><div class='add'>+</div><div class='add'>+	if (data_too &amp;&amp; !is_undef_sym(patched_sym)) {</div><div class='add'>+		struct section *patched_sec = patched_sym-&gt;sec;</div><div class='add'>+</div><div class='add'>+		out_sec = find_section_by_name(elf, patched_sec-&gt;name);</div><div class='add'>+		if (!out_sec) {</div><div class='add'>+			out_sec = elf_create_section(elf, patched_sec-&gt;name, 0,</div><div class='add'>+						     patched_sec-&gt;sh.sh_entsize,</div><div class='add'>+						     patched_sec-&gt;sh.sh_type,</div><div class='add'>+						     patched_sec-&gt;sh.sh_addralign,</div><div class='add'>+						     patched_sec-&gt;sh.sh_flags);</div><div class='add'>+			if (!out_sec)</div><div class='add'>+				return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (is_string_sec(patched_sym-&gt;sec)) {</div><div class='add'>+			out_sym = elf_create_section_symbol(elf, out_sec);</div><div class='add'>+			if (!out_sym)</div><div class='add'>+				return NULL;</div><div class='add'>+</div><div class='add'>+			goto sym_created;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!is_sec_sym(patched_sym))</div><div class='add'>+			offset = sec_size(out_sec);</div><div class='add'>+</div><div class='add'>+		if (patched_sym-&gt;len || is_sec_sym(patched_sym)) {</div><div class='add'>+			void *data = NULL;</div><div class='add'>+			size_t size;</div><div class='add'>+</div><div class='add'>+			/* bss doesn't have data */</div><div class='add'>+			if (patched_sym-&gt;sec-&gt;data-&gt;d_buf)</div><div class='add'>+				data = patched_sym-&gt;sec-&gt;data-&gt;d_buf + patched_sym-&gt;offset;</div><div class='add'>+</div><div class='add'>+			if (is_sec_sym(patched_sym))</div><div class='add'>+				size = sec_size(patched_sym-&gt;sec);</div><div class='add'>+			else</div><div class='add'>+				size = patched_sym-&gt;len;</div><div class='add'>+</div><div class='add'>+			if (!elf_add_data(elf, out_sec, data, size))</div><div class='add'>+				return NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	out_sym = elf_create_symbol(elf, patched_sym-&gt;name, out_sec,</div><div class='add'>+				    patched_sym-&gt;bind, patched_sym-&gt;type,</div><div class='add'>+				    offset, patched_sym-&gt;len);</div><div class='add'>+	if (!out_sym)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+sym_created:</div><div class='add'>+	patched_sym-&gt;clone = out_sym;</div><div class='add'>+	out_sym-&gt;clone = patched_sym;</div><div class='add'>+</div><div class='add'>+	return out_sym;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *sym_type(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	switch (sym-&gt;type) {</div><div class='add'>+	case STT_NOTYPE:  return "NOTYPE";</div><div class='add'>+	case STT_OBJECT:  return "OBJECT";</div><div class='add'>+	case STT_FUNC:    return "FUNC";</div><div class='add'>+	case STT_SECTION: return "SECTION";</div><div class='add'>+	case STT_FILE:    return "FILE";</div><div class='add'>+	default:	  return "UNKNOWN";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *sym_bind(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	switch (sym-&gt;bind) {</div><div class='add'>+	case STB_LOCAL:   return "LOCAL";</div><div class='add'>+	case STB_GLOBAL:  return "GLOBAL";</div><div class='add'>+	case STB_WEAK:    return "WEAK";</div><div class='add'>+	default:	  return "UNKNOWN";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copy a symbol to the output object, optionally including its data and</div><div class='add'>+ * relocations.</div><div class='add'>+ */</div><div class='add'>+static struct symbol *clone_symbol(struct elfs *e, struct symbol *patched_sym,</div><div class='add'>+				   bool data_too)</div><div class='add'>+{</div><div class='add'>+	struct symbol *pfx;</div><div class='add'>+</div><div class='add'>+	if (patched_sym-&gt;clone)</div><div class='add'>+		return patched_sym-&gt;clone;</div><div class='add'>+</div><div class='add'>+	dbg_indent("%s%s", patched_sym-&gt;name, data_too ? " [+DATA]" : "");</div><div class='add'>+</div><div class='add'>+	/* Make sure the prefix gets cloned first */</div><div class='add'>+	if (is_func_sym(patched_sym) &amp;&amp; data_too) {</div><div class='add'>+		pfx = get_func_prefix(patched_sym);</div><div class='add'>+		if (pfx)</div><div class='add'>+			clone_symbol(e, pfx, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!__clone_symbol(e-&gt;out, patched_sym, data_too))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (data_too &amp;&amp; clone_sym_relocs(e, patched_sym))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return patched_sym-&gt;clone;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mark_included_function(struct symbol *func)</div><div class='add'>+{</div><div class='add'>+	struct symbol *pfx;</div><div class='add'>+</div><div class='add'>+	func-&gt;included = 1;</div><div class='add'>+</div><div class='add'>+	/* Include prefix function */</div><div class='add'>+	pfx = get_func_prefix(func);</div><div class='add'>+	if (pfx)</div><div class='add'>+		pfx-&gt;included = 1;</div><div class='add'>+</div><div class='add'>+	/* Make sure .cold parent+child always stay together */</div><div class='add'>+	if (func-&gt;cfunc &amp;&amp; func-&gt;cfunc != func)</div><div class='add'>+		func-&gt;cfunc-&gt;included = 1;</div><div class='add'>+	if (func-&gt;pfunc &amp;&amp; func-&gt;pfunc != func)</div><div class='add'>+		func-&gt;pfunc-&gt;included = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copy all changed functions (and their dependencies) from the patched object</div><div class='add'>+ * to the output object.</div><div class='add'>+ */</div><div class='add'>+static int mark_changed_functions(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym_orig, *patched_sym;</div><div class='add'>+	bool changed = false;</div><div class='add'>+</div><div class='add'>+	/* Find changed functions */</div><div class='add'>+	for_each_sym(e-&gt;orig, sym_orig) {</div><div class='add'>+		if (!is_func_sym(sym_orig) || is_prefix_func(sym_orig))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		patched_sym = sym_orig-&gt;twin;</div><div class='add'>+		if (!patched_sym)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (sym_orig-&gt;csum.checksum != patched_sym-&gt;csum.checksum) {</div><div class='add'>+			patched_sym-&gt;changed = 1;</div><div class='add'>+			mark_included_function(patched_sym);</div><div class='add'>+			changed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Find added functions and print them */</div><div class='add'>+	for_each_sym(e-&gt;patched, patched_sym) {</div><div class='add'>+		if (!is_func_sym(patched_sym) || is_prefix_func(patched_sym))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!patched_sym-&gt;twin) {</div><div class='add'>+			printf("%s: new function: %s\n", objname, patched_sym-&gt;name);</div><div class='add'>+			mark_included_function(patched_sym);</div><div class='add'>+			changed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Print changed functions */</div><div class='add'>+	for_each_sym(e-&gt;patched, patched_sym) {</div><div class='add'>+		if (patched_sym-&gt;changed)</div><div class='add'>+			printf("%s: changed function: %s\n", objname, patched_sym-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !changed ? -1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clone_included_functions(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct symbol *patched_sym;</div><div class='add'>+</div><div class='add'>+	for_each_sym(e-&gt;patched, patched_sym) {</div><div class='add'>+		if (patched_sym-&gt;included) {</div><div class='add'>+			if (!clone_symbol(e, patched_sym, true))</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Determine whether a relocation should reference the section rather than the</div><div class='add'>+ * underlying symbol.</div><div class='add'>+ */</div><div class='add'>+static bool section_reference_needed(struct section *sec)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * String symbols are zero-length and uncorrelated.  It's easier to</div><div class='add'>+	 * deal with them as section symbols.</div><div class='add'>+	 */</div><div class='add'>+	if (is_string_sec(sec))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * .rodata has mostly anonymous data so there's no way to determine the</div><div class='add'>+	 * length of a needed reference.  just copy the whole section if needed.</div><div class='add'>+	 */</div><div class='add'>+	if (strstarts(sec-&gt;name, ".rodata"))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* UBSAN anonymous data */</div><div class='add'>+	if (strstarts(sec-&gt;name, ".data..Lubsan") ||	/* GCC */</div><div class='add'>+	    strstarts(sec-&gt;name, ".data..L__unnamed_"))	/* Clang */</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_reloc_allowed(struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	return section_reference_needed(reloc-&gt;sym-&gt;sec) == is_sec_sym(reloc-&gt;sym);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct export *find_export(struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	struct export *export;</div><div class='add'>+</div><div class='add'>+	hash_for_each_possible(exports, export, hash, str_hash(sym-&gt;name)) {</div><div class='add'>+		if (!strcmp(export-&gt;sym, sym-&gt;name))</div><div class='add'>+			return export;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *__find_modname(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+	char *name;</div><div class='add'>+</div><div class='add'>+	sec = find_section_by_name(e-&gt;orig, ".modinfo");</div><div class='add'>+	if (!sec) {</div><div class='add'>+		ERROR("missing .modinfo section");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	name = memmem(sec-&gt;data-&gt;d_buf, sec_size(sec), "\0name=", 6);</div><div class='add'>+	if (name)</div><div class='add'>+		return name + 6;</div><div class='add'>+</div><div class='add'>+	name = strdup(e-&gt;orig-&gt;name);</div><div class='add'>+	if (!name) {</div><div class='add'>+		ERROR_GLIBC("strdup");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (char *c = name; *c; c++) {</div><div class='add'>+		if (*c == '/')</div><div class='add'>+			name = c + 1;</div><div class='add'>+		else if (*c == '-')</div><div class='add'>+			*c = '_';</div><div class='add'>+		else if (*c == '.') {</div><div class='add'>+			*c = '\0';</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get the object's module name as defined by the kernel (and klp_object) */</div><div class='add'>+static const char *find_modname(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	const char *modname;</div><div class='add'>+</div><div class='add'>+	if (e-&gt;modname)</div><div class='add'>+		return e-&gt;modname;</div><div class='add'>+</div><div class='add'>+	modname = __find_modname(e);</div><div class='add'>+	e-&gt;modname = modname;</div><div class='add'>+	return modname;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copying a function from its native compiled environment to a kernel module</div><div class='add'>+ * removes its natural access to local functions/variables and unexported</div><div class='add'>+ * globals.  References to such symbols need to be converted to KLP relocs so</div><div class='add'>+ * the kernel arch relocation code knows to apply them and where to find the</div><div class='add'>+ * symbols.  Particularly, duplicate static symbols need to be disambiguated.</div><div class='add'>+ */</div><div class='add'>+static bool klp_reloc_needed(struct reloc *patched_reloc)</div><div class='add'>+{</div><div class='add'>+	struct symbol *patched_sym = patched_reloc-&gt;sym;</div><div class='add'>+	struct export *export;</div><div class='add'>+</div><div class='add'>+	/* no external symbol to reference */</div><div class='add'>+	if (dont_correlate(patched_sym))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* For included functions, a regular reloc will do. */</div><div class='add'>+	if (patched_sym-&gt;included)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If exported by a module, it has to be a klp reloc.  Thanks to the</div><div class='add'>+	 * clusterfunk that is late module patching, the patch module is</div><div class='add'>+	 * allowed to be loaded before any modules it depends on.</div><div class='add'>+	 *</div><div class='add'>+	 * If exported by vmlinux, a normal reloc will do.</div><div class='add'>+	 */</div><div class='add'>+	export = find_export(patched_sym);</div><div class='add'>+	if (export)</div><div class='add'>+		return strcmp(export-&gt;mod, "vmlinux");</div><div class='add'>+</div><div class='add'>+	if (!patched_sym-&gt;twin) {</div><div class='add'>+		/*</div><div class='add'>+		 * Presumably the symbol and its reference were added by the</div><div class='add'>+		 * patch.  The symbol could be defined in this .o or in another</div><div class='add'>+		 * .o in the patch module.</div><div class='add'>+		 *</div><div class='add'>+		 * This check needs to be *after* the export check due to the</div><div class='add'>+		 * possibility of the patch adding a new UNDEF reference to an</div><div class='add'>+		 * exported symbol.</div><div class='add'>+		 */</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Unexported symbol which lives in the original vmlinux or module. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int convert_reloc_sym_to_secsym(struct elf *elf, struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym = reloc-&gt;sym;</div><div class='add'>+	struct section *sec = sym-&gt;sec;</div><div class='add'>+</div><div class='add'>+	if (!sec-&gt;sym &amp;&amp; !elf_create_section_symbol(elf, sec))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	reloc-&gt;sym = sec-&gt;sym;</div><div class='add'>+	set_reloc_sym(elf, reloc, sym-&gt;idx);</div><div class='add'>+	set_reloc_addend(elf, reloc, sym-&gt;offset + reloc_addend(reloc));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int convert_reloc_secsym_to_sym(struct elf *elf, struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	struct symbol *sym = reloc-&gt;sym;</div><div class='add'>+	struct section *sec = sym-&gt;sec;</div><div class='add'>+</div><div class='add'>+	/* If the symbol has a dedicated section, it's easy to find */</div><div class='add'>+	sym = find_symbol_by_offset(sec, 0);</div><div class='add'>+	if (sym &amp;&amp; sym-&gt;len == sec_size(sec))</div><div class='add'>+		goto found_sym;</div><div class='add'>+</div><div class='add'>+	/* No dedicated section; find the symbol manually */</div><div class='add'>+	sym = find_symbol_containing(sec, arch_adjusted_addend(reloc));</div><div class='add'>+	if (!sym) {</div><div class='add'>+		/*</div><div class='add'>+		 * This can happen for special section references to weak code</div><div class='add'>+		 * whose symbol has been stripped by the linker.</div><div class='add'>+		 */</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+found_sym:</div><div class='add'>+	reloc-&gt;sym = sym;</div><div class='add'>+	set_reloc_sym(elf, reloc, sym-&gt;idx);</div><div class='add'>+	set_reloc_addend(elf, reloc, reloc_addend(reloc) - sym-&gt;offset);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Convert a relocation symbol reference to the needed format: either a section</div><div class='add'>+ * symbol or the underlying symbol itself.</div><div class='add'>+ */</div><div class='add'>+static int convert_reloc_sym(struct elf *elf, struct reloc *reloc)</div><div class='add'>+{</div><div class='add'>+	if (is_reloc_allowed(reloc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (section_reference_needed(reloc-&gt;sym-&gt;sec))</div><div class='add'>+		return convert_reloc_sym_to_secsym(elf, reloc);</div><div class='add'>+	else</div><div class='add'>+		return convert_reloc_secsym_to_sym(elf, reloc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Convert a regular relocation to a klp relocation (sort of).</div><div class='add'>+ */</div><div class='add'>+static int clone_reloc_klp(struct elfs *e, struct reloc *patched_reloc,</div><div class='add'>+			   struct section *sec, unsigned long offset,</div><div class='add'>+			   struct export *export)</div><div class='add'>+{</div><div class='add'>+	struct symbol *patched_sym = patched_reloc-&gt;sym;</div><div class='add'>+	s64 addend = reloc_addend(patched_reloc);</div><div class='add'>+	const char *sym_modname, *sym_orig_name;</div><div class='add'>+	static struct section *klp_relocs;</div><div class='add'>+	struct symbol *sym, *klp_sym;</div><div class='add'>+	unsigned long klp_reloc_off;</div><div class='add'>+	char sym_name[SYM_NAME_LEN];</div><div class='add'>+	struct klp_reloc klp_reloc;</div><div class='add'>+	unsigned long sympos;</div><div class='add'>+</div><div class='add'>+	if (!patched_sym-&gt;twin) {</div><div class='add'>+		ERROR("unexpected klp reloc for new symbol %s", patched_sym-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Keep the original reloc intact for now to avoid breaking objtool run</div><div class='add'>+	 * which relies on proper relocations for many of its features.  This</div><div class='add'>+	 * will be disabled later by "objtool klp post-link".</div><div class='add'>+	 *</div><div class='add'>+	 * Convert it to UNDEF (and WEAK to avoid modpost warnings).</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	sym = patched_sym-&gt;clone;</div><div class='add'>+	if (!sym) {</div><div class='add'>+		/* STB_WEAK: avoid modpost undefined symbol warnings */</div><div class='add'>+		sym = elf_create_symbol(e-&gt;out, patched_sym-&gt;name, NULL,</div><div class='add'>+					STB_WEAK, patched_sym-&gt;type, 0, 0);</div><div class='add'>+		if (!sym)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		patched_sym-&gt;clone = sym;</div><div class='add'>+		sym-&gt;clone = patched_sym;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!elf_create_reloc(e-&gt;out, sec, offset, sym, addend, reloc_type(patched_reloc)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Create the KLP symbol.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (export) {</div><div class='add'>+		sym_modname = export-&gt;mod;</div><div class='add'>+		sym_orig_name = export-&gt;sym;</div><div class='add'>+		sympos = 0;</div><div class='add'>+	} else {</div><div class='add'>+		sym_modname = find_modname(e);</div><div class='add'>+		if (!sym_modname)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		sym_orig_name = patched_sym-&gt;twin-&gt;name;</div><div class='add'>+		sympos = find_sympos(e-&gt;orig, patched_sym-&gt;twin);</div><div class='add'>+		if (sympos == ULONG_MAX)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* symbol format: .klp.sym.modname.sym_name,sympos */</div><div class='add'>+	if (snprintf_check(sym_name, SYM_NAME_LEN, KLP_SYM_PREFIX "%s.%s,%ld",</div><div class='add'>+		      sym_modname, sym_orig_name, sympos))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	klp_sym = find_symbol_by_name(e-&gt;out, sym_name);</div><div class='add'>+	if (!klp_sym) {</div><div class='add'>+		__dbg_indent("%s", sym_name);</div><div class='add'>+</div><div class='add'>+		/* STB_WEAK: avoid modpost undefined symbol warnings */</div><div class='add'>+		klp_sym = elf_create_symbol(e-&gt;out, sym_name, NULL,</div><div class='add'>+					    STB_WEAK, patched_sym-&gt;type, 0, 0);</div><div class='add'>+		if (!klp_sym)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Create the __klp_relocs entry.  This will be converted to an actual</div><div class='add'>+	 * KLP rela by "objtool klp post-link".</div><div class='add'>+	 *</div><div class='add'>+	 * This intermediate step is necessary to prevent corruption by the</div><div class='add'>+	 * linker, which doesn't know how to properly handle two rela sections</div><div class='add'>+	 * applying to the same base section.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!klp_relocs) {</div><div class='add'>+		klp_relocs = elf_create_section(e-&gt;out, KLP_RELOCS_SEC, 0,</div><div class='add'>+						0, SHT_PROGBITS, 8, SHF_ALLOC);</div><div class='add'>+		if (!klp_relocs)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	klp_reloc_off = sec_size(klp_relocs);</div><div class='add'>+	memset(&amp;klp_reloc, 0, sizeof(klp_reloc));</div><div class='add'>+</div><div class='add'>+	klp_reloc.type = reloc_type(patched_reloc);</div><div class='add'>+	if (!elf_add_data(e-&gt;out, klp_relocs, &amp;klp_reloc, sizeof(klp_reloc)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* klp_reloc.offset */</div><div class='add'>+	if (!sec-&gt;sym &amp;&amp; !elf_create_section_symbol(e-&gt;out, sec))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!elf_create_reloc(e-&gt;out, klp_relocs,</div><div class='add'>+			      klp_reloc_off + offsetof(struct klp_reloc, offset),</div><div class='add'>+			      sec-&gt;sym, offset, R_ABS64))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* klp_reloc.sym */</div><div class='add'>+	if (!elf_create_reloc(e-&gt;out, klp_relocs,</div><div class='add'>+			      klp_reloc_off + offsetof(struct klp_reloc, sym),</div><div class='add'>+			      klp_sym, addend, R_ABS64))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define dbg_clone_reloc(sec, offset, patched_sym, addend, export, klp)			\</div><div class='add'>+	dbg_indent("%s+0x%lx: %s%s0x%lx [%s%s%s%s%s%s]",				\</div><div class='add'>+		   sec-&gt;name, offset, patched_sym-&gt;name,				\</div><div class='add'>+		   addend &gt;= 0 ? "+" : "-", labs(addend),				\</div><div class='add'>+		   sym_type(patched_sym),						\</div><div class='add'>+		   patched_sym-&gt;type == STT_SECTION ? "" : " ",				\</div><div class='add'>+		   patched_sym-&gt;type == STT_SECTION ? "" : sym_bind(patched_sym),	\</div><div class='add'>+		   is_undef_sym(patched_sym) ? " UNDEF" : "",				\</div><div class='add'>+		   export ? " EXPORTED" : "",						\</div><div class='add'>+		   klp ? " KLP" : "")</div><div class='add'>+</div><div class='add'>+/* Copy a reloc and its symbol to the output object */</div><div class='add'>+static int clone_reloc(struct elfs *e, struct reloc *patched_reloc,</div><div class='add'>+			struct section *sec, unsigned long offset)</div><div class='add'>+{</div><div class='add'>+	struct symbol *patched_sym = patched_reloc-&gt;sym;</div><div class='add'>+	struct export *export = find_export(patched_sym);</div><div class='add'>+	long addend = reloc_addend(patched_reloc);</div><div class='add'>+	struct symbol *out_sym;</div><div class='add'>+	bool klp;</div><div class='add'>+</div><div class='add'>+	if (!is_reloc_allowed(patched_reloc)) {</div><div class='add'>+		ERROR_FUNC(patched_reloc-&gt;sec-&gt;base, reloc_offset(patched_reloc),</div><div class='add'>+			   "missing symbol for reference to %s+%ld",</div><div class='add'>+			   patched_sym-&gt;name, addend);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	klp = klp_reloc_needed(patched_reloc);</div><div class='add'>+</div><div class='add'>+	dbg_clone_reloc(sec, offset, patched_sym, addend, export, klp);</div><div class='add'>+</div><div class='add'>+	if (klp) {</div><div class='add'>+		if (clone_reloc_klp(e, patched_reloc, sec, offset, export))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Why !export sets 'data_too':</div><div class='add'>+	 *</div><div class='add'>+	 * Unexported non-klp symbols need to live in the patch module,</div><div class='add'>+	 * otherwise there will be unresolved symbols.  Notably, this includes:</div><div class='add'>+	 *</div><div class='add'>+	 *   - New functions/data</div><div class='add'>+	 *   - String sections</div><div class='add'>+	 *   - Special section entries</div><div class='add'>+	 *   - Uncorrelated static local variables</div><div class='add'>+	 *   - UBSAN sections</div><div class='add'>+	 */</div><div class='add'>+	out_sym = clone_symbol(e, patched_sym, patched_sym-&gt;included || !export);</div><div class='add'>+	if (!out_sym)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For strings, all references use section symbols, thanks to</div><div class='add'>+	 * section_reference_needed().  clone_symbol() has cloned an empty</div><div class='add'>+	 * version of the string section.  Now copy the string itself.</div><div class='add'>+	 */</div><div class='add'>+	if (is_string_sec(patched_sym-&gt;sec)) {</div><div class='add'>+		const char *str = patched_sym-&gt;sec-&gt;data-&gt;d_buf + addend;</div><div class='add'>+</div><div class='add'>+		__dbg_indent("\"%s\"", escape_str(str));</div><div class='add'>+</div><div class='add'>+		addend = elf_add_string(e-&gt;out, out_sym-&gt;sec, str);</div><div class='add'>+		if (addend == -1)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!elf_create_reloc(e-&gt;out, sec, offset, out_sym, addend,</div><div class='add'>+			      reloc_type(patched_reloc)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Copy all relocs needed for a symbol's contents */</div><div class='add'>+static int clone_sym_relocs(struct elfs *e, struct symbol *patched_sym)</div><div class='add'>+{</div><div class='add'>+	struct section *patched_rsec = patched_sym-&gt;sec-&gt;rsec;</div><div class='add'>+	struct reloc *patched_reloc;</div><div class='add'>+	unsigned long start, end;</div><div class='add'>+	struct symbol *out_sym;</div><div class='add'>+</div><div class='add'>+	out_sym = patched_sym-&gt;clone;</div><div class='add'>+	if (!out_sym) {</div><div class='add'>+		ERROR("no clone for %s", patched_sym-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!patched_rsec)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!is_sec_sym(patched_sym) &amp;&amp; !patched_sym-&gt;len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (is_string_sec(patched_sym-&gt;sec))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (is_sec_sym(patched_sym)) {</div><div class='add'>+		start = 0;</div><div class='add'>+		end = sec_size(patched_sym-&gt;sec);</div><div class='add'>+	} else {</div><div class='add'>+		start = patched_sym-&gt;offset;</div><div class='add'>+		end = start + patched_sym-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_reloc(patched_rsec, patched_reloc) {</div><div class='add'>+		unsigned long offset;</div><div class='add'>+</div><div class='add'>+		if (reloc_offset(patched_reloc) &lt; start ||</div><div class='add'>+		    reloc_offset(patched_reloc) &gt;= end)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Skip any reloc referencing .altinstr_aux.  Its code is</div><div class='add'>+		 * always patched by alternatives.  See ALTERNATIVE_TERNARY().</div><div class='add'>+		 */</div><div class='add'>+		if (patched_reloc-&gt;sym-&gt;sec &amp;&amp;</div><div class='add'>+		    !strcmp(patched_reloc-&gt;sym-&gt;sec-&gt;name, ".altinstr_aux"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (convert_reloc_sym(e-&gt;patched, patched_reloc)) {</div><div class='add'>+			ERROR_FUNC(patched_rsec-&gt;base, reloc_offset(patched_reloc),</div><div class='add'>+				   "failed to convert reloc sym '%s' to its proper format",</div><div class='add'>+				   patched_reloc-&gt;sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		offset = out_sym-&gt;offset + (reloc_offset(patched_reloc) - patched_sym-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if (clone_reloc(e, patched_reloc, out_sym-&gt;sec, offset))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int create_fake_symbol(struct elf *elf, struct section *sec,</div><div class='add'>+			      unsigned long offset, size_t size)</div><div class='add'>+{</div><div class='add'>+	char name[SYM_NAME_LEN];</div><div class='add'>+	unsigned int type;</div><div class='add'>+	static int ctr;</div><div class='add'>+	char *c;</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(name, SYM_NAME_LEN, "%s_%d", sec-&gt;name, ctr++))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (c = name; *c; c++)</div><div class='add'>+		if (*c == '.')</div><div class='add'>+			*c = '_';</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * STT_NOTYPE: Prevent objtool from validating .altinstr_replacement</div><div class='add'>+	 *	       while still allowing objdump to disassemble it.</div><div class='add'>+	 */</div><div class='add'>+	type = is_text_sec(sec) ? STT_NOTYPE : STT_OBJECT;</div><div class='add'>+	return elf_create_symbol(elf, name, sec, STB_LOCAL, type, offset, size) ? 0 : -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Special sections (alternatives, etc) are basically arrays of structs.</div><div class='add'>+ * For all the special sections, create a symbol for each struct entry.  This</div><div class='add'>+ * is a bit cumbersome, but it makes the extracting of the individual entries</div><div class='add'>+ * much more straightforward.</div><div class='add'>+ *</div><div class='add'>+ * There are three ways to identify the entry sizes for a special section:</div><div class='add'>+ *</div><div class='add'>+ * 1) ELF section header sh_entsize: Ideally this would be used almost</div><div class='add'>+ *    everywhere.  But unfortunately the toolchains make it difficult.  The</div><div class='add'>+ *    assembler .[push]section directive syntax only takes entsize when</div><div class='add'>+ *    combined with SHF_MERGE.  But Clang disallows combining SHF_MERGE with</div><div class='add'>+ *    SHF_WRITE.  And some special sections do need to be writable.</div><div class='add'>+ *</div><div class='add'>+ *    Another place this wouldn't work is .altinstr_replacement, whose entries</div><div class='add'>+ *    don't have a fixed size.</div><div class='add'>+ *</div><div class='add'>+ * 2) ANNOTATE_DATA_SPECIAL: This is a lightweight objtool annotation which</div><div class='add'>+ *    points to the beginning of each entry.  The size of the entry is then</div><div class='add'>+ *    inferred by the location of the subsequent annotation (or end of</div><div class='add'>+ *    section).</div><div class='add'>+ *</div><div class='add'>+ * 3) Simple array of pointers: If the special section is just a basic array of</div><div class='add'>+ *    pointers, the entry size can be inferred by the number of relocations.</div><div class='add'>+ *    No annotations needed.</div><div class='add'>+ *</div><div class='add'>+ * Note I also tried to create per-entry symbols at the time of creation, in</div><div class='add'>+ * the original [inline] asm.  Unfortunately, creating uniquely named symbols</div><div class='add'>+ * is trickier than one might think, especially with Clang inline asm.  I</div><div class='add'>+ * eventually just gave up trying to make that work, in favor of using</div><div class='add'>+ * ANNOTATE_DATA_SPECIAL and creating the symbols here after the fact.</div><div class='add'>+ */</div><div class='add'>+static int create_fake_symbols(struct elf *elf)</div><div class='add'>+{</div><div class='add'>+	struct section *sec;</div><div class='add'>+	struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 1) Make symbols for all the ANNOTATE_DATA_SPECIAL entries:</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	sec = find_section_by_name(elf, ".discard.annotate_data");</div><div class='add'>+	if (!sec || !sec-&gt;rsec)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for_each_reloc(sec-&gt;rsec, reloc) {</div><div class='add'>+		unsigned long offset, size;</div><div class='add'>+		struct reloc *next_reloc;</div><div class='add'>+</div><div class='add'>+		if (annotype(elf, sec, reloc) != ANNOTYPE_DATA_SPECIAL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		offset = reloc_addend(reloc);</div><div class='add'>+</div><div class='add'>+		size = 0;</div><div class='add'>+		next_reloc = reloc;</div><div class='add'>+		for_each_reloc_continue(sec-&gt;rsec, next_reloc) {</div><div class='add'>+			if (annotype(elf, sec, next_reloc) != ANNOTYPE_DATA_SPECIAL ||</div><div class='add'>+			    next_reloc-&gt;sym-&gt;sec != reloc-&gt;sym-&gt;sec)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			size = reloc_addend(next_reloc) - offset;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!size)</div><div class='add'>+			size = sec_size(reloc-&gt;sym-&gt;sec) - offset;</div><div class='add'>+</div><div class='add'>+		if (create_fake_symbol(elf, reloc-&gt;sym-&gt;sec, offset, size))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 2) Make symbols for sh_entsize, and simple arrays of pointers:</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for_each_sec(elf, sec) {</div><div class='add'>+		unsigned int entry_size;</div><div class='add'>+		unsigned long offset;</div><div class='add'>+</div><div class='add'>+		if (!is_special_section(sec) || find_symbol_by_offset(sec, 0))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!sec-&gt;rsec) {</div><div class='add'>+			ERROR("%s: missing special section relocations", sec-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		entry_size = sec-&gt;sh.sh_entsize;</div><div class='add'>+		if (!entry_size) {</div><div class='add'>+			entry_size = arch_reloc_size(sec-&gt;rsec-&gt;relocs);</div><div class='add'>+			if (sec_size(sec) != entry_size * sec_num_entries(sec-&gt;rsec)) {</div><div class='add'>+				ERROR("%s: missing special section entsize or annotations", sec-&gt;name);</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (offset = 0; offset &lt; sec_size(sec); offset += entry_size) {</div><div class='add'>+			if (create_fake_symbol(elf, sec, offset, entry_size))</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Keep a special section entry if it references an included function */</div><div class='add'>+static bool should_keep_special_sym(struct elf *elf, struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+	if (is_sec_sym(sym) || !sym-&gt;sec-&gt;rsec)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	sym_for_each_reloc(elf, sym, reloc) {</div><div class='add'>+		if (convert_reloc_sym(elf, reloc))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (is_func_sym(reloc-&gt;sym) &amp;&amp; reloc-&gt;sym-&gt;included)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Klp relocations aren't allowed for __jump_table and .static_call_sites if</div><div class='add'>+ * the referenced symbol lives in a kernel module, because such klp relocs may</div><div class='add'>+ * be applied after static branch/call init, resulting in code corruption.</div><div class='add'>+ *</div><div class='add'>+ * Validate a special section entry to avoid that.  Note that an inert</div><div class='add'>+ * tracepoint is harmless enough, in that case just skip the entry and print a</div><div class='add'>+ * warning.  Otherwise, return an error.</div><div class='add'>+ *</div><div class='add'>+ * This is only a temporary limitation which will be fixed when livepatch adds</div><div class='add'>+ * support for submodules: fully self-contained modules which are embedded in</div><div class='add'>+ * the top-level livepatch module's data and which can be loaded on demand when</div><div class='add'>+ * their corresponding to-be-patched module gets loaded.  Then klp relocs can</div><div class='add'>+ * be retired.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   -1: error: validation failed</div><div class='add'>+ *    1: warning: tracepoint skipped</div><div class='add'>+ *    0: success</div><div class='add'>+ */</div><div class='add'>+static int validate_special_section_klp_reloc(struct elfs *e, struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	bool static_branch = !strcmp(sym-&gt;sec-&gt;name, "__jump_table");</div><div class='add'>+	bool static_call   = !strcmp(sym-&gt;sec-&gt;name, ".static_call_sites");</div><div class='add'>+	struct symbol *code_sym = NULL;</div><div class='add'>+	unsigned long code_offset = 0;</div><div class='add'>+	struct reloc *reloc;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!static_branch &amp;&amp; !static_call)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sym_for_each_reloc(e-&gt;patched, sym, reloc) {</div><div class='add'>+		const char *sym_modname;</div><div class='add'>+		struct export *export;</div><div class='add'>+</div><div class='add'>+		/* Static branch/call keys are always STT_OBJECT */</div><div class='add'>+		if (reloc-&gt;sym-&gt;type != STT_OBJECT) {</div><div class='add'>+</div><div class='add'>+			/* Save code location which can be printed below */</div><div class='add'>+			if (reloc-&gt;sym-&gt;type == STT_FUNC &amp;&amp; !code_sym) {</div><div class='add'>+				code_sym = reloc-&gt;sym;</div><div class='add'>+				code_offset = reloc_addend(reloc);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!klp_reloc_needed(reloc))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		export = find_export(reloc-&gt;sym);</div><div class='add'>+		if (export) {</div><div class='add'>+			sym_modname = export-&gt;mod;</div><div class='add'>+		} else {</div><div class='add'>+			sym_modname = find_modname(e);</div><div class='add'>+			if (!sym_modname)</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* vmlinux keys are ok */</div><div class='add'>+		if (!strcmp(sym_modname, "vmlinux"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (static_branch) {</div><div class='add'>+			if (strstarts(reloc-&gt;sym-&gt;name, "__tracepoint_")) {</div><div class='add'>+				WARN("%s: disabling unsupported tracepoint %s",</div><div class='add'>+				     code_sym-&gt;name, reloc-&gt;sym-&gt;name + 13);</div><div class='add'>+				ret = 1;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ERROR("%s+0x%lx: unsupported static branch key %s.  Use static_key_enabled() instead",</div><div class='add'>+			      code_sym-&gt;name, code_offset, reloc-&gt;sym-&gt;name);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* static call */</div><div class='add'>+		if (strstarts(reloc-&gt;sym-&gt;name, "__SCK__tp_func_")) {</div><div class='add'>+			ret = 1;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ERROR("%s()+0x%lx: unsupported static call key %s.  Use KLP_STATIC_CALL() instead",</div><div class='add'>+		      code_sym-&gt;name, code_offset, reloc-&gt;sym-&gt;name);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clone_special_section(struct elfs *e, struct section *patched_sec)</div><div class='add'>+{</div><div class='add'>+	struct symbol *patched_sym;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Extract all special section symbols (and their dependencies) which</div><div class='add'>+	 * reference included functions.</div><div class='add'>+	 */</div><div class='add'>+	sec_for_each_sym(patched_sec, patched_sym) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		if (!is_object_sym(patched_sym))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!should_keep_special_sym(e-&gt;patched, patched_sym))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = validate_special_section_klp_reloc(e, patched_sym);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return -1;</div><div class='add'>+		if (ret &gt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!clone_symbol(e, patched_sym, true))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Extract only the needed bits from special sections */</div><div class='add'>+static int clone_special_sections(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct section *patched_sec;</div><div class='add'>+</div><div class='add'>+	if (create_fake_symbols(e-&gt;patched))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for_each_sec(e-&gt;patched, patched_sec) {</div><div class='add'>+		if (is_special_section(patched_sec)) {</div><div class='add'>+			if (clone_special_section(e, patched_sec))</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Create __klp_objects and __klp_funcs sections which are intermediate</div><div class='add'>+ * sections provided as input to the patch module's init code for building the</div><div class='add'>+ * klp_patch, klp_object and klp_func structs for the livepatch API.</div><div class='add'>+ */</div><div class='add'>+static int create_klp_sections(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	size_t obj_size  = sizeof(struct klp_object_ext);</div><div class='add'>+	size_t func_size = sizeof(struct klp_func_ext);</div><div class='add'>+	struct section *obj_sec, *funcs_sec, *str_sec;</div><div class='add'>+	struct symbol *funcs_sym, *str_sym, *sym;</div><div class='add'>+	char sym_name[SYM_NAME_LEN];</div><div class='add'>+	unsigned int nr_funcs = 0;</div><div class='add'>+	const char *modname;</div><div class='add'>+	void *obj_data;</div><div class='add'>+	s64 addend;</div><div class='add'>+</div><div class='add'>+	obj_sec  = elf_create_section_pair(e-&gt;out, KLP_OBJECTS_SEC, obj_size, 0, 0);</div><div class='add'>+	if (!obj_sec)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	funcs_sec = elf_create_section_pair(e-&gt;out, KLP_FUNCS_SEC, func_size, 0, 0);</div><div class='add'>+	if (!funcs_sec)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	funcs_sym = elf_create_section_symbol(e-&gt;out, funcs_sec);</div><div class='add'>+	if (!funcs_sym)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	str_sec = elf_create_section(e-&gt;out, KLP_STRINGS_SEC, 0, 0,</div><div class='add'>+				     SHT_PROGBITS, 1,</div><div class='add'>+				     SHF_ALLOC | SHF_STRINGS | SHF_MERGE);</div><div class='add'>+	if (!str_sec)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (elf_add_string(e-&gt;out, str_sec, "") == -1)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	str_sym = elf_create_section_symbol(e-&gt;out, str_sec);</div><div class='add'>+	if (!str_sym)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* allocate klp_object_ext */</div><div class='add'>+	obj_data = elf_add_data(e-&gt;out, obj_sec, NULL, obj_size);</div><div class='add'>+	if (!obj_data)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	modname = find_modname(e);</div><div class='add'>+	if (!modname)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* klp_object_ext.name */</div><div class='add'>+	if (strcmp(modname, "vmlinux")) {</div><div class='add'>+		addend = elf_add_string(e-&gt;out, str_sec, modname);</div><div class='add'>+		if (addend == -1)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, obj_sec,</div><div class='add'>+				      offsetof(struct klp_object_ext, name),</div><div class='add'>+				      str_sym, addend, R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* klp_object_ext.funcs */</div><div class='add'>+	if (!elf_create_reloc(e-&gt;out, obj_sec, offsetof(struct klp_object_ext, funcs),</div><div class='add'>+			      funcs_sym, 0, R_ABS64))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for_each_sym(e-&gt;out, sym) {</div><div class='add'>+		unsigned long offset = nr_funcs * func_size;</div><div class='add'>+		unsigned long sympos;</div><div class='add'>+		void *func_data;</div><div class='add'>+</div><div class='add'>+		if (!is_func_sym(sym) || sym-&gt;cold || !sym-&gt;clone || !sym-&gt;clone-&gt;changed)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* allocate klp_func_ext */</div><div class='add'>+		func_data = elf_add_data(e-&gt;out, funcs_sec, NULL, func_size);</div><div class='add'>+		if (!func_data)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		/* klp_func_ext.old_name */</div><div class='add'>+		addend = elf_add_string(e-&gt;out, str_sec, sym-&gt;clone-&gt;twin-&gt;name);</div><div class='add'>+		if (addend == -1)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, funcs_sec,</div><div class='add'>+				      offset + offsetof(struct klp_func_ext, old_name),</div><div class='add'>+				      str_sym, addend, R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		/* klp_func_ext.new_func */</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, funcs_sec,</div><div class='add'>+				      offset + offsetof(struct klp_func_ext, new_func),</div><div class='add'>+				      sym, 0, R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		/* klp_func_ext.sympos */</div><div class='add'>+		BUILD_BUG_ON(sizeof(sympos) != sizeof_field(struct klp_func_ext, sympos));</div><div class='add'>+		sympos = find_sympos(e-&gt;orig, sym-&gt;clone-&gt;twin);</div><div class='add'>+		if (sympos == ULONG_MAX)</div><div class='add'>+			return -1;</div><div class='add'>+		memcpy(func_data + offsetof(struct klp_func_ext, sympos), &amp;sympos,</div><div class='add'>+		       sizeof_field(struct klp_func_ext, sympos));</div><div class='add'>+</div><div class='add'>+		nr_funcs++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* klp_object_ext.nr_funcs */</div><div class='add'>+	BUILD_BUG_ON(sizeof(nr_funcs) != sizeof_field(struct klp_object_ext, nr_funcs));</div><div class='add'>+	memcpy(obj_data + offsetof(struct klp_object_ext, nr_funcs), &amp;nr_funcs,</div><div class='add'>+	       sizeof_field(struct klp_object_ext, nr_funcs));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Find callback pointers created by KLP_PRE_PATCH_CALLBACK() and</div><div class='add'>+	 * friends, and add them to the klp object.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(sym_name, SYM_NAME_LEN, KLP_PRE_PATCH_PREFIX "%s", modname))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	sym = find_symbol_by_name(e-&gt;out, sym_name);</div><div class='add'>+	if (sym) {</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(e-&gt;out, sym-&gt;sec, sym-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, obj_sec,</div><div class='add'>+				      offsetof(struct klp_object_ext, callbacks) +</div><div class='add'>+				      offsetof(struct klp_callbacks, pre_patch),</div><div class='add'>+				      reloc-&gt;sym, reloc_addend(reloc), R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(sym_name, SYM_NAME_LEN, KLP_POST_PATCH_PREFIX "%s", modname))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	sym = find_symbol_by_name(e-&gt;out, sym_name);</div><div class='add'>+	if (sym) {</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(e-&gt;out, sym-&gt;sec, sym-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, obj_sec,</div><div class='add'>+				      offsetof(struct klp_object_ext, callbacks) +</div><div class='add'>+				      offsetof(struct klp_callbacks, post_patch),</div><div class='add'>+				      reloc-&gt;sym, reloc_addend(reloc), R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(sym_name, SYM_NAME_LEN, KLP_PRE_UNPATCH_PREFIX "%s", modname))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	sym = find_symbol_by_name(e-&gt;out, sym_name);</div><div class='add'>+	if (sym) {</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(e-&gt;out, sym-&gt;sec, sym-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, obj_sec,</div><div class='add'>+				      offsetof(struct klp_object_ext, callbacks) +</div><div class='add'>+				      offsetof(struct klp_callbacks, pre_unpatch),</div><div class='add'>+				      reloc-&gt;sym, reloc_addend(reloc), R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (snprintf_check(sym_name, SYM_NAME_LEN, KLP_POST_UNPATCH_PREFIX "%s", modname))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	sym = find_symbol_by_name(e-&gt;out, sym_name);</div><div class='add'>+	if (sym) {</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(e-&gt;out, sym-&gt;sec, sym-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if (!elf_create_reloc(e-&gt;out, obj_sec,</div><div class='add'>+				      offsetof(struct klp_object_ext, callbacks) +</div><div class='add'>+				      offsetof(struct klp_callbacks, post_unpatch),</div><div class='add'>+				      reloc-&gt;sym, reloc_addend(reloc), R_ABS64))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copy all .modinfo import_ns= tags to ensure all namespaced exported symbols</div><div class='add'>+ * can be accessed via normal relocs.</div><div class='add'>+ */</div><div class='add'>+static int copy_import_ns(struct elfs *e)</div><div class='add'>+{</div><div class='add'>+	struct section *patched_sec, *out_sec = NULL;</div><div class='add'>+	char *import_ns, *data_end;</div><div class='add'>+</div><div class='add'>+	patched_sec = find_section_by_name(e-&gt;patched, ".modinfo");</div><div class='add'>+	if (!patched_sec)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	import_ns = patched_sec-&gt;data-&gt;d_buf;</div><div class='add'>+	if (!import_ns)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (data_end = import_ns + sec_size(patched_sec);</div><div class='add'>+	     import_ns &lt; data_end;</div><div class='add'>+	     import_ns += strlen(import_ns) + 1) {</div><div class='add'>+</div><div class='add'>+		import_ns = memmem(import_ns, data_end - import_ns, "import_ns=", 10);</div><div class='add'>+		if (!import_ns)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (!out_sec) {</div><div class='add'>+			out_sec = find_section_by_name(e-&gt;out, ".modinfo");</div><div class='add'>+			if (!out_sec) {</div><div class='add'>+				out_sec = elf_create_section(e-&gt;out, ".modinfo", 0,</div><div class='add'>+							     patched_sec-&gt;sh.sh_entsize,</div><div class='add'>+							     patched_sec-&gt;sh.sh_type,</div><div class='add'>+							     patched_sec-&gt;sh.sh_addralign,</div><div class='add'>+							     patched_sec-&gt;sh.sh_flags);</div><div class='add'>+				if (!out_sec)</div><div class='add'>+					return -1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!elf_add_data(e-&gt;out, out_sec, import_ns, strlen(import_ns) + 1))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cmd_klp_diff(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	struct elfs e = {0};</div><div class='add'>+</div><div class='add'>+	argc = parse_options(argc, argv, klp_diff_options, klp_diff_usage, 0);</div><div class='add'>+	if (argc != 3)</div><div class='add'>+		usage_with_options(klp_diff_usage, klp_diff_options);</div><div class='add'>+</div><div class='add'>+	objname = argv[0];</div><div class='add'>+</div><div class='add'>+	e.orig = elf_open_read(argv[0], O_RDONLY);</div><div class='add'>+	e.patched = elf_open_read(argv[1], O_RDONLY);</div><div class='add'>+	e.out = NULL;</div><div class='add'>+</div><div class='add'>+	if (!e.orig || !e.patched)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (read_exports())</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (read_sym_checksums(e.orig))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (read_sym_checksums(e.patched))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (correlate_symbols(&amp;e))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (mark_changed_functions(&amp;e))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	e.out = elf_create_file(&amp;e.orig-&gt;ehdr, argv[2]);</div><div class='add'>+	if (!e.out)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (clone_included_functions(&amp;e))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (clone_special_sections(&amp;e))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (create_klp_sections(&amp;e))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (copy_import_ns(&amp;e))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if  (elf_write(e.out))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return elf_close(e.out);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/klp-post-link.c b/tools/objtool/klp-post-link.c<br/>new file mode 100644<br/>index 000000000000..c013e39957b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/klp-post-link.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/klp-post-link.c</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Read the intermediate KLP reloc/symbol representations created by klp diff</div><div class='add'>+ * and convert them to the proper format required by livepatch.  This needs to</div><div class='add'>+ * run last to avoid linker wreckage.  Linkers don't tend to handle the "two</div><div class='add'>+ * rela sections for a single base section" case very well, nor do they like</div><div class='add'>+ * SHN_LIVEPATCH.</div><div class='add'>+ *</div><div class='add'>+ * This is the final tool in the livepatch module generation pipeline:</div><div class='add'>+ *</div><div class='add'>+ *   kernel builds -&gt; objtool klp diff -&gt; module link -&gt; objtool klp post-link</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;gelf.h&gt;</div><div class='add'>+#include &lt;objtool/objtool.h&gt;</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+#include &lt;objtool/klp.h&gt;</div><div class='add'>+#include &lt;objtool/util.h&gt;</div><div class='add'>+#include &lt;linux/livepatch_external.h&gt;</div><div class='add'>+</div><div class='add'>+static int fix_klp_relocs(struct elf *elf)</div><div class='add'>+{</div><div class='add'>+	struct section *symtab, *klp_relocs;</div><div class='add'>+</div><div class='add'>+	klp_relocs = find_section_by_name(elf, KLP_RELOCS_SEC);</div><div class='add'>+	if (!klp_relocs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	symtab = find_section_by_name(elf, ".symtab");</div><div class='add'>+	if (!symtab) {</div><div class='add'>+		ERROR("missing .symtab");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; sec_size(klp_relocs) / sizeof(struct klp_reloc); i++) {</div><div class='add'>+		struct klp_reloc *klp_reloc;</div><div class='add'>+		unsigned long klp_reloc_off;</div><div class='add'>+		struct section *sec, *tmp, *klp_rsec;</div><div class='add'>+		unsigned long offset;</div><div class='add'>+		struct reloc *reloc;</div><div class='add'>+		char sym_modname[64];</div><div class='add'>+		char rsec_name[SEC_NAME_LEN];</div><div class='add'>+		u64 addend;</div><div class='add'>+		struct symbol *sym, *klp_sym;</div><div class='add'>+</div><div class='add'>+		klp_reloc_off = i * sizeof(*klp_reloc);</div><div class='add'>+		klp_reloc = klp_relocs-&gt;data-&gt;d_buf + klp_reloc_off;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Read __klp_relocs[i]:</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* klp_reloc.sec_offset */</div><div class='add'>+		reloc = find_reloc_by_dest(elf, klp_relocs,</div><div class='add'>+					   klp_reloc_off + offsetof(struct klp_reloc, offset));</div><div class='add'>+		if (!reloc) {</div><div class='add'>+			ERROR("malformed " KLP_RELOCS_SEC " section");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sec = reloc-&gt;sym-&gt;sec;</div><div class='add'>+		offset = reloc_addend(reloc);</div><div class='add'>+</div><div class='add'>+		/* klp_reloc.sym */</div><div class='add'>+		reloc = find_reloc_by_dest(elf, klp_relocs,</div><div class='add'>+					   klp_reloc_off + offsetof(struct klp_reloc, sym));</div><div class='add'>+		if (!reloc) {</div><div class='add'>+			ERROR("malformed " KLP_RELOCS_SEC " section");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		klp_sym = reloc-&gt;sym;</div><div class='add'>+		addend = reloc_addend(reloc);</div><div class='add'>+</div><div class='add'>+		/* symbol format: .klp.sym.modname.sym_name,sympos */</div><div class='add'>+		if (sscanf(klp_sym-&gt;name + strlen(KLP_SYM_PREFIX), "%55[^.]", sym_modname) != 1)</div><div class='add'>+			ERROR("can't find modname in klp symbol '%s'", klp_sym-&gt;name);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Create the KLP rela:</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* section format: .klp.rela.sec_objname.section_name */</div><div class='add'>+		if (snprintf_check(rsec_name, SEC_NAME_LEN,</div><div class='add'>+				   KLP_RELOC_SEC_PREFIX "%s.%s",</div><div class='add'>+				   sym_modname, sec-&gt;name))</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		klp_rsec = find_section_by_name(elf, rsec_name);</div><div class='add'>+		if (!klp_rsec) {</div><div class='add'>+			klp_rsec = elf_create_section(elf, rsec_name, 0,</div><div class='add'>+						      elf_rela_size(elf),</div><div class='add'>+						      SHT_RELA, elf_addr_size(elf),</div><div class='add'>+						      SHF_ALLOC | SHF_INFO_LINK | SHF_RELA_LIVEPATCH);</div><div class='add'>+			if (!klp_rsec)</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			klp_rsec-&gt;sh.sh_link = symtab-&gt;idx;</div><div class='add'>+			klp_rsec-&gt;sh.sh_info = sec-&gt;idx;</div><div class='add'>+			klp_rsec-&gt;base = sec;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tmp = sec-&gt;rsec;</div><div class='add'>+		sec-&gt;rsec = klp_rsec;</div><div class='add'>+		if (!elf_create_reloc(elf, sec, offset, klp_sym, addend, klp_reloc-&gt;type))</div><div class='add'>+			return -1;</div><div class='add'>+		sec-&gt;rsec = tmp;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Fix up the corresponding KLP symbol:</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		klp_sym-&gt;sym.st_shndx = SHN_LIVEPATCH;</div><div class='add'>+		if (!gelf_update_sym(symtab-&gt;data, klp_sym-&gt;idx, &amp;klp_sym-&gt;sym)) {</div><div class='add'>+			ERROR_ELF("gelf_update_sym");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Disable the original non-KLP reloc by converting it to R_*_NONE:</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		reloc = find_reloc_by_dest(elf, sec, offset);</div><div class='add'>+		sym = reloc-&gt;sym;</div><div class='add'>+		sym-&gt;sym.st_shndx = SHN_LIVEPATCH;</div><div class='add'>+		set_reloc_type(elf, reloc, 0);</div><div class='add'>+		if (!gelf_update_sym(symtab-&gt;data, sym-&gt;idx, &amp;sym-&gt;sym)) {</div><div class='add'>+			ERROR_ELF("gelf_update_sym");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This runs on the livepatch module after all other linking has been done.  It</div><div class='add'>+ * converts the intermediate __klp_relocs section into proper KLP relocs to be</div><div class='add'>+ * processed by livepatch.  This needs to run last to avoid linker wreckage.</div><div class='add'>+ * Linkers don't tend to handle the "two rela sections for a single base</div><div class='add'>+ * section" case very well, nor do they appreciate SHN_LIVEPATCH.</div><div class='add'>+ */</div><div class='add'>+int cmd_klp_post_link(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	struct elf *elf;</div><div class='add'>+</div><div class='add'>+	argc--;</div><div class='add'>+	argv++;</div><div class='add'>+</div><div class='add'>+	if (argc != 1) {</div><div class='add'>+		fprintf(stderr, "%d\n", argc);</div><div class='add'>+		fprintf(stderr, "usage: objtool link &lt;file.ko&gt;\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	elf = elf_open_read(argv[0], O_RDWR);</div><div class='add'>+	if (!elf)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (fix_klp_relocs(elf))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (elf_write(elf))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return elf_close(elf);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/noreturns.h b/tools/objtool/noreturns.h<br/>index 6a922d046b8e..14f8ab653449 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/noreturns.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/noreturns.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/noreturns.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/noreturns.h</a></div><div class='hunk'>@@ -36,6 +36,7 @@ NORETURN(machine_real_restart)</div><div class='ctx'> NORETURN(make_task_dead)</div><div class='ctx'> NORETURN(mpt_halt_firmware)</div><div class='ctx'> NORETURN(mwait_play_dead)</div><div class='add'>+NORETURN(native_play_dead)</div><div class='ctx'> NORETURN(nmi_panic_self_stop)</div><div class='ctx'> NORETURN(panic)</div><div class='ctx'> NORETURN(vpanic)</div><div class='hunk'>@@ -45,7 +46,6 @@ NORETURN(rewind_stack_and_make_dead)</div><div class='ctx'> NORETURN(rust_begin_unwind)</div><div class='ctx'> NORETURN(rust_helper_BUG)</div><div class='ctx'> NORETURN(sev_es_terminate)</div><div class='del'>-NORETURN(snp_abort)</div><div class='ctx'> NORETURN(start_kernel)</div><div class='ctx'> NORETURN(stop_this_cpu)</div><div class='ctx'> NORETURN(usercopy_abort)</div><div class='head'>diff --git a/tools/objtool/objtool.c b/tools/objtool/objtool.c<br/>index 5c8b974ad0f9..1c3622117c33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/objtool.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/objtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/objtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/objtool.c</a></div><div class='hunk'>@@ -16,7 +16,8 @@</div><div class='ctx'> #include &lt;objtool/objtool.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='ctx'> </div><div class='del'>-bool help;</div><div class='add'>+bool debug;</div><div class='add'>+int indent;</div><div class='ctx'> </div><div class='ctx'> static struct objtool_file file;</div><div class='ctx'> </div><div class='hunk'>@@ -71,13 +72,54 @@ int objtool_pv_add(struct objtool_file *f, int idx, struct symbol *func)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+char *top_level_dir(const char *file)</div><div class='add'>+{</div><div class='add'>+	ssize_t len, self_len, file_len;</div><div class='add'>+	char self[PATH_MAX], *str;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	len = readlink("/proc/self/exe", self, sizeof(self) - 1);</div><div class='add'>+	if (len &lt;= 0)</div><div class='add'>+		return NULL;</div><div class='add'>+	self[len] = '\0';</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		char *s = strrchr(self, '/');</div><div class='add'>+		if (!s)</div><div class='add'>+			return NULL;</div><div class='add'>+		*s = '\0';</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self_len = strlen(self);</div><div class='add'>+	file_len = strlen(file);</div><div class='add'>+</div><div class='add'>+	str = malloc(self_len + file_len + 2);</div><div class='add'>+	if (!str)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	memcpy(str, self, self_len);</div><div class='add'>+	str[self_len] = '/';</div><div class='add'>+	strcpy(str + self_len + 1, file);</div><div class='add'>+</div><div class='add'>+	return str;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int main(int argc, const char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	static const char *UNUSED = "OBJTOOL_NOT_IMPLEMENTED";</div><div class='ctx'> </div><div class='add'>+	if (init_signal_handler())</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='ctx'> 	/* libsubcmd init */</div><div class='ctx'> 	exec_cmd_init("objtool", UNUSED, UNUSED, UNUSED);</div><div class='ctx'> 	pager_init(UNUSED);</div><div class='ctx'> </div><div class='add'>+	if (argc &gt; 1 &amp;&amp; !strcmp(argv[1], "klp")) {</div><div class='add'>+		argc--;</div><div class='add'>+		argv++;</div><div class='add'>+		return cmd_klp(argc, argv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return objtool_run(argc, argv);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/objtool/orc_dump.c b/tools/objtool/orc_dump.c<br/>index 1dd9fc18fe62..5a979f52425a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/orc_dump.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/orc_dump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/orc_dump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/orc_dump.c</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> #include &lt;objtool/objtool.h&gt;</div><div class='ctx'> #include &lt;objtool/orc.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='ctx'> int orc_dump(const char *filename)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/objtool/orc_gen.c b/tools/objtool/orc_gen.c<br/>index 922e6aac7cea..1045e1380ffd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/orc_gen.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/orc_gen.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/orc_gen.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/orc_gen.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;objtool/check.h&gt;</div><div class='ctx'> #include &lt;objtool/orc.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct orc_list_entry {</div><div class='ctx'> 	struct list_head list;</div><div class='hunk'>@@ -57,7 +56,7 @@ int orc_create(struct objtool_file *file)</div><div class='ctx'> </div><div class='ctx'> 	/* Build a deduplicated list of ORC entries: */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;orc_list);</div><div class='del'>-	for_each_sec(file, sec) {</div><div class='add'>+	for_each_sec(file-&gt;elf, sec) {</div><div class='ctx'> 		struct orc_entry orc, prev_orc = {0};</div><div class='ctx'> 		struct instruction *insn;</div><div class='ctx'> 		bool empty = true;</div><div class='hunk'>@@ -127,7 +126,11 @@ int orc_create(struct objtool_file *file)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> 	orc_sec = elf_create_section(file-&gt;elf, ".orc_unwind",</div><div class='del'>-				     sizeof(struct orc_entry), nr);</div><div class='add'>+				     nr * sizeof(struct orc_entry),</div><div class='add'>+				     sizeof(struct orc_entry),</div><div class='add'>+				     SHT_PROGBITS,</div><div class='add'>+				     1,</div><div class='add'>+				     SHF_ALLOC);</div><div class='ctx'> 	if (!orc_sec)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/objtool/signal.c b/tools/objtool/signal.c<br/>new file mode 100644<br/>index 000000000000..af5c65c0fb2d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/signal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/signal.c</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+/*</div><div class='add'>+ * signal.c: Register a sigaltstack for objtool, to be able to</div><div class='add'>+ *	     run a signal handler on a separate stack even if</div><div class='add'>+ *	     the main process stack has overflown. Print out</div><div class='add'>+ *	     stack overflow errors when this happens.</div><div class='add'>+ */</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;sys/resource.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/objtool.h&gt;</div><div class='add'>+#include &lt;objtool/warn.h&gt;</div><div class='add'>+</div><div class='add'>+static unsigned long stack_limit;</div><div class='add'>+</div><div class='add'>+static bool is_stack_overflow(void *fault_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long fault = (unsigned long)fault_addr;</div><div class='add'>+</div><div class='add'>+	/* Check if fault is in the guard page just below the limit. */</div><div class='add'>+	return fault &lt; stack_limit &amp;&amp; fault &gt;= stack_limit - 4096;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void signal_handler(int sig_num, siginfo_t *info, void *context)</div><div class='add'>+{</div><div class='add'>+	struct sigaction sa_dfl = {0};</div><div class='add'>+	const char *sig_name;</div><div class='add'>+	char msg[256];</div><div class='add'>+	int msg_len;</div><div class='add'>+</div><div class='add'>+	switch (sig_num) {</div><div class='add'>+	case SIGSEGV:	sig_name = "SIGSEGV";		break;</div><div class='add'>+	case SIGBUS:	sig_name = "SIGBUS";		break;</div><div class='add'>+	case SIGILL:	sig_name = "SIGILL";		break;</div><div class='add'>+	case SIGABRT:	sig_name = "SIGABRT";		break;</div><div class='add'>+	default:	sig_name = "Unknown signal";	break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_stack_overflow(info-&gt;si_addr)) {</div><div class='add'>+		msg_len = snprintf(msg, sizeof(msg),</div><div class='add'>+				   "%s: error: %s: objtool stack overflow!\n",</div><div class='add'>+				   objname, sig_name);</div><div class='add'>+	} else {</div><div class='add'>+		msg_len = snprintf(msg, sizeof(msg),</div><div class='add'>+				   "%s: error: %s: objtool crash!\n",</div><div class='add'>+				   objname, sig_name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg_len = write(STDERR_FILENO, msg, msg_len);</div><div class='add'>+</div><div class='add'>+	/* Re-raise the signal to trigger the core dump */</div><div class='add'>+	sa_dfl.sa_handler = SIG_DFL;</div><div class='add'>+	sigaction(sig_num, &amp;sa_dfl, NULL);</div><div class='add'>+	raise(sig_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_stack_limit(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long stack_start, stack_end;</div><div class='add'>+	struct rlimit rlim;</div><div class='add'>+	char line[256];</div><div class='add'>+	int ret = 0;</div><div class='add'>+	FILE *fp;</div><div class='add'>+</div><div class='add'>+	if (getrlimit(RLIMIT_STACK, &amp;rlim)) {</div><div class='add'>+		ERROR_GLIBC("getrlimit");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fp = fopen("/proc/self/maps", "r");</div><div class='add'>+	if (!fp) {</div><div class='add'>+		ERROR_GLIBC("fopen");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (fgets(line, sizeof(line), fp)) {</div><div class='add'>+		if (strstr(line, "[stack]")) {</div><div class='add'>+			if (sscanf(line, "%lx-%lx", &amp;stack_start, &amp;stack_end) != 2) {</div><div class='add'>+				ERROR_GLIBC("sscanf");</div><div class='add'>+				ret = -1;</div><div class='add'>+				goto done;</div><div class='add'>+			}</div><div class='add'>+			stack_limit = stack_end - rlim.rlim_cur;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = -1;</div><div class='add'>+	ERROR("/proc/self/maps: can't find [stack]");</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	fclose(fp);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int init_signal_handler(void)</div><div class='add'>+{</div><div class='add'>+	int signals[] = {SIGSEGV, SIGBUS, SIGILL, SIGABRT};</div><div class='add'>+	struct sigaction sa;</div><div class='add'>+	stack_t ss;</div><div class='add'>+</div><div class='add'>+	if (read_stack_limit())</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	ss.ss_sp = malloc(SIGSTKSZ);</div><div class='add'>+	if (!ss.ss_sp) {</div><div class='add'>+		ERROR_GLIBC("malloc");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	ss.ss_size = SIGSTKSZ;</div><div class='add'>+	ss.ss_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (sigaltstack(&amp;ss, NULL) == -1) {</div><div class='add'>+		ERROR_GLIBC("sigaltstack");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sa.sa_sigaction = signal_handler;</div><div class='add'>+	sigemptyset(&amp;sa.sa_mask);</div><div class='add'>+</div><div class='add'>+	sa.sa_flags = SA_ONSTACK | SA_SIGINFO;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(signals); i++) {</div><div class='add'>+		if (sigaction(signals[i], &amp;sa, NULL) == -1) {</div><div class='add'>+			ERROR_GLIBC("sigaction");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/special.c b/tools/objtool/special.c<br/>index c80fed8a840e..2a533afbc69a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/special.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/special.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/special.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/special.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> #include &lt;objtool/builtin.h&gt;</div><div class='ctx'> #include &lt;objtool/special.h&gt;</div><div class='ctx'> #include &lt;objtool/warn.h&gt;</div><div class='del'>-#include &lt;objtool/endianness.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct special_entry {</div><div class='ctx'> 	const char *sec;</div><div class='hunk'>@@ -82,6 +81,8 @@ static int get_alt_entry(struct elf *elf, const struct special_entry *entry,</div><div class='ctx'> 						   entry-&gt;orig_len);</div><div class='ctx'> 		alt-&gt;new_len = *(unsigned char *)(sec-&gt;data-&gt;d_buf + offset +</div><div class='ctx'> 						  entry-&gt;new_len);</div><div class='add'>+		alt-&gt;feature = *(unsigned int *)(sec-&gt;data-&gt;d_buf + offset +</div><div class='add'>+						 entry-&gt;feature);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	orig_reloc = find_reloc_by_dest(elf, sec, offset + entry-&gt;orig);</div><div class='hunk'>@@ -133,7 +134,7 @@ int special_get_alts(struct elf *elf, struct list_head *alts)</div><div class='ctx'> 	struct section *sec;</div><div class='ctx'> 	unsigned int nr_entries;</div><div class='ctx'> 	struct special_alt *alt;</div><div class='del'>-	int idx, ret;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(alts);</div><div class='ctx'> </div><div class='hunk'>@@ -142,12 +143,12 @@ int special_get_alts(struct elf *elf, struct list_head *alts)</div><div class='ctx'> 		if (!sec)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (sec-&gt;sh.sh_size % entry-&gt;size != 0) {</div><div class='add'>+		if (sec_size(sec) % entry-&gt;size != 0) {</div><div class='ctx'> 			ERROR("%s size not a multiple of %d", sec-&gt;name, entry-&gt;size);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		nr_entries = sec-&gt;sh.sh_size / entry-&gt;size;</div><div class='add'>+		nr_entries = sec_size(sec) / entry-&gt;size;</div><div class='ctx'> </div><div class='ctx'> 		for (idx = 0; idx &lt; nr_entries; idx++) {</div><div class='ctx'> 			alt = malloc(sizeof(*alt));</div><div class='hunk'>@@ -157,11 +158,8 @@ int special_get_alts(struct elf *elf, struct list_head *alts)</div><div class='ctx'> 			}</div><div class='ctx'> 			memset(alt, 0, sizeof(*alt));</div><div class='ctx'> </div><div class='del'>-			ret = get_alt_entry(elf, entry, sec, idx, alt);</div><div class='del'>-			if (ret &gt; 0)</div><div class='del'>-				continue;</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='add'>+			if (get_alt_entry(elf, entry, sec, idx, alt))</div><div class='add'>+				return -1;</div><div class='ctx'> </div><div class='ctx'> 			list_add_tail(&amp;alt-&gt;list, alts);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/tools/objtool/sync-check.sh b/tools/objtool/sync-check.sh<br/>index 81d120d05442..e38167ca56a9 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/sync-check.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/sync-check.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/sync-check.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/sync-check.sh</a></div><div class='hunk'>@@ -16,6 +16,8 @@ arch/x86/include/asm/orc_types.h</div><div class='ctx'> arch/x86/include/asm/emulate_prefix.h</div><div class='ctx'> arch/x86/lib/x86-opcode-map.txt</div><div class='ctx'> arch/x86/tools/gen-insn-attr-x86.awk</div><div class='add'>+include/linux/interval_tree_generic.h</div><div class='add'>+include/linux/livepatch_external.h</div><div class='ctx'> include/linux/static_call_types.h</div><div class='ctx'> "</div><div class='ctx'> </div><div class='head'>diff --git a/tools/objtool/trace.c b/tools/objtool/trace.c<br/>new file mode 100644<br/>index 000000000000..5dec44dab781<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/trace.c</a></div><div class='hunk'>@@ -0,0 +1,203 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Oracle and/or its affiliates.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;objtool/trace.h&gt;</div><div class='add'>+</div><div class='add'>+bool trace;</div><div class='add'>+int trace_depth;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Macros to trace CFI state attributes changes.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define TRACE_CFI_ATTR(attr, prev, next, fmt, ...)		\</div><div class='add'>+({								\</div><div class='add'>+	if ((prev)-&gt;attr != (next)-&gt;attr)			\</div><div class='add'>+		TRACE("%s=" fmt " ", #attr, __VA_ARGS__);	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define TRACE_CFI_ATTR_BOOL(attr, prev, next)			\</div><div class='add'>+	TRACE_CFI_ATTR(attr, prev, next,			\</div><div class='add'>+		       "%s", (next)-&gt;attr ? "true" : "false")</div><div class='add'>+</div><div class='add'>+#define TRACE_CFI_ATTR_NUM(attr, prev, next, fmt)		\</div><div class='add'>+	TRACE_CFI_ATTR(attr, prev, next, fmt, (next)-&gt;attr)</div><div class='add'>+</div><div class='add'>+#define CFI_REG_NAME_MAXLEN   16</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return the name of a register. Note that the same static buffer</div><div class='add'>+ * is returned if the name is dynamically generated.</div><div class='add'>+ */</div><div class='add'>+static const char *cfi_reg_name(unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	static char rname_buffer[CFI_REG_NAME_MAXLEN];</div><div class='add'>+	const char *rname;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case CFI_UNDEFINED:</div><div class='add'>+		return "&lt;undefined&gt;";</div><div class='add'>+	case CFI_CFA:</div><div class='add'>+		return "cfa";</div><div class='add'>+	case CFI_SP_INDIRECT:</div><div class='add'>+		return "(sp)";</div><div class='add'>+	case CFI_BP_INDIRECT:</div><div class='add'>+		return "(bp)";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &lt; CFI_NUM_REGS) {</div><div class='add'>+		rname = arch_reg_name[reg];</div><div class='add'>+		if (rname)</div><div class='add'>+			return rname;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (snprintf(rname_buffer, CFI_REG_NAME_MAXLEN, "r%d", reg) == -1)</div><div class='add'>+		return "&lt;error&gt;";</div><div class='add'>+</div><div class='add'>+	return (const char *)rname_buffer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Functions and macros to trace CFI registers changes.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void trace_cfi_reg(const char *prefix, int reg, const char *fmt,</div><div class='add'>+			  int base_prev, int offset_prev,</div><div class='add'>+			  int base_next, int offset_next)</div><div class='add'>+{</div><div class='add'>+	char *rname;</div><div class='add'>+</div><div class='add'>+	if (base_prev == base_next &amp;&amp; offset_prev == offset_next)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (prefix)</div><div class='add'>+		TRACE("%s:", prefix);</div><div class='add'>+</div><div class='add'>+	if (base_next == CFI_UNDEFINED) {</div><div class='add'>+		TRACE("%1$s=&lt;undef&gt; ", cfi_reg_name(reg));</div><div class='add'>+	} else {</div><div class='add'>+		rname = strdup(cfi_reg_name(reg));</div><div class='add'>+		TRACE(fmt, rname, cfi_reg_name(base_next), offset_next);</div><div class='add'>+		free(rname);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void trace_cfi_reg_val(const char *prefix, int reg,</div><div class='add'>+			      int base_prev, int offset_prev,</div><div class='add'>+			      int base_next, int offset_next)</div><div class='add'>+{</div><div class='add'>+	trace_cfi_reg(prefix, reg, "%1$s=%2$s%3$+d ",</div><div class='add'>+		      base_prev, offset_prev, base_next, offset_next);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void trace_cfi_reg_ref(const char *prefix, int reg,</div><div class='add'>+			      int base_prev, int offset_prev,</div><div class='add'>+			      int base_next, int offset_next)</div><div class='add'>+{</div><div class='add'>+	trace_cfi_reg(prefix, reg, "%1$s=(%2$s%3$+d) ",</div><div class='add'>+		      base_prev, offset_prev, base_next, offset_next);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TRACE_CFI_REG_VAL(reg, prev, next)				\</div><div class='add'>+	trace_cfi_reg_val(NULL, reg, prev.base, prev.offset,		\</div><div class='add'>+			  next.base, next.offset)</div><div class='add'>+</div><div class='add'>+#define TRACE_CFI_REG_REF(reg, prev, next)				\</div><div class='add'>+	trace_cfi_reg_ref(NULL, reg, prev.base, prev.offset,		\</div><div class='add'>+			  next.base, next.offset)</div><div class='add'>+</div><div class='add'>+void trace_insn_state(struct instruction *insn, struct insn_state *sprev,</div><div class='add'>+		      struct insn_state *snext)</div><div class='add'>+{</div><div class='add'>+	struct cfi_state *cprev, *cnext;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!memcmp(sprev, snext, sizeof(struct insn_state)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cprev = &amp;sprev-&gt;cfi;</div><div class='add'>+	cnext = &amp;snext-&gt;cfi;</div><div class='add'>+</div><div class='add'>+	disas_print_insn(stderr, objtool_disas_ctx, insn,</div><div class='add'>+			 trace_depth - 1, "state: ");</div><div class='add'>+</div><div class='add'>+	/* print registers changes */</div><div class='add'>+	TRACE_CFI_REG_VAL(CFI_CFA, cprev-&gt;cfa, cnext-&gt;cfa);</div><div class='add'>+	for (i = 0; i &lt; CFI_NUM_REGS; i++) {</div><div class='add'>+		TRACE_CFI_REG_VAL(i, cprev-&gt;vals[i], cnext-&gt;vals[i]);</div><div class='add'>+		TRACE_CFI_REG_REF(i, cprev-&gt;regs[i], cnext-&gt;regs[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* print attributes changes */</div><div class='add'>+	TRACE_CFI_ATTR_NUM(stack_size, cprev, cnext, "%d");</div><div class='add'>+	TRACE_CFI_ATTR_BOOL(drap, cprev, cnext);</div><div class='add'>+	if (cnext-&gt;drap) {</div><div class='add'>+		trace_cfi_reg_val("drap", cnext-&gt;drap_reg,</div><div class='add'>+				  cprev-&gt;drap_reg, cprev-&gt;drap_offset,</div><div class='add'>+				  cnext-&gt;drap_reg, cnext-&gt;drap_offset);</div><div class='add'>+	}</div><div class='add'>+	TRACE_CFI_ATTR_BOOL(bp_scratch, cprev, cnext);</div><div class='add'>+	TRACE_CFI_ATTR_NUM(instr, sprev, snext, "%d");</div><div class='add'>+	TRACE_CFI_ATTR_NUM(uaccess_stack, sprev, snext, "%u");</div><div class='add'>+</div><div class='add'>+	TRACE("\n");</div><div class='add'>+</div><div class='add'>+	insn-&gt;trace = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void trace_alt_begin(struct instruction *orig_insn, struct alternative *alt,</div><div class='add'>+		     char *alt_name)</div><div class='add'>+{</div><div class='add'>+	struct instruction *alt_insn;</div><div class='add'>+	char suffix[2];</div><div class='add'>+</div><div class='add'>+	alt_insn = alt-&gt;insn;</div><div class='add'>+</div><div class='add'>+	if (alt-&gt;type == ALT_TYPE_EX_TABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * When there is an exception table then the instruction</div><div class='add'>+		 * at the original location is executed but it can cause</div><div class='add'>+		 * an exception. In that case, the execution will be</div><div class='add'>+		 * redirected to the alternative instruction.</div><div class='add'>+		 *</div><div class='add'>+		 * The instruction at the original location can have</div><div class='add'>+		 * instruction alternatives, so we just print the location</div><div class='add'>+		 * of the instruction that can cause the exception and</div><div class='add'>+		 * not the instruction itself.</div><div class='add'>+		 */</div><div class='add'>+		TRACE_ALT_INFO_NOADDR(orig_insn, "/ ", "%s for instruction at 0x%lx &lt;%s+0x%lx&gt;",</div><div class='add'>+				      alt_name,</div><div class='add'>+				      orig_insn-&gt;offset, orig_insn-&gt;sym-&gt;name,</div><div class='add'>+				      orig_insn-&gt;offset - orig_insn-&gt;sym-&gt;offset);</div><div class='add'>+	} else {</div><div class='add'>+		TRACE_ALT_INFO_NOADDR(orig_insn, "/ ", "%s", alt_name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (alt-&gt;type == ALT_TYPE_JUMP_TABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * For a jump alternative, if the default instruction is</div><div class='add'>+		 * a NOP then it is replaced with the jmp instruction,</div><div class='add'>+		 * otherwise it is replaced with a NOP instruction.</div><div class='add'>+		 */</div><div class='add'>+		trace_depth++;</div><div class='add'>+		if (orig_insn-&gt;type == INSN_NOP) {</div><div class='add'>+			suffix[0] = (orig_insn-&gt;len == 5) ? 'q' : '\0';</div><div class='add'>+			TRACE_ADDR(orig_insn, "jmp%-3s %lx &lt;%s+0x%lx&gt;", suffix,</div><div class='add'>+				   alt_insn-&gt;offset, alt_insn-&gt;sym-&gt;name,</div><div class='add'>+				   alt_insn-&gt;offset - alt_insn-&gt;sym-&gt;offset);</div><div class='add'>+		} else {</div><div class='add'>+			TRACE_ADDR(orig_insn, "nop%d", orig_insn-&gt;len);</div><div class='add'>+			trace_depth--;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void trace_alt_end(struct instruction *orig_insn, struct alternative *alt,</div><div class='add'>+		   char *alt_name)</div><div class='add'>+{</div><div class='add'>+	if (alt-&gt;type == ALT_TYPE_JUMP_TABLE &amp;&amp; orig_insn-&gt;type == INSN_NOP)</div><div class='add'>+		trace_depth--;</div><div class='add'>+	TRACE_ALT_INFO_NOADDR(orig_insn, "\\ ", "%s", alt_name);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/objtool/weak.c b/tools/objtool/weak.c<br/>index d83f607733b0..d6562f292259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/objtool/weak.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/objtool/weak.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/objtool/weak.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/objtool/weak.c</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;objtool/objtool.h&gt;</div><div class='add'>+#include &lt;objtool/arch.h&gt;</div><div class='add'>+#include &lt;objtool/builtin.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define UNSUPPORTED(name)						\</div><div class='ctx'> ({									\</div><div class='hunk'>@@ -24,3 +26,8 @@ int __weak orc_create(struct objtool_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	UNSUPPORTED("ORC");</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int __weak cmd_klp(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	UNSUPPORTED("klp");</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/Documentation/Build.txt b/tools/perf/Documentation/Build.txt<br/>index 83dc87c662b6..57b226e7fc2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/Build.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/Build.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/Build.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/Build.txt</a></div><div class='hunk'>@@ -99,3 +99,18 @@ configuration paths for cross building:</div><div class='ctx'> In this case, the variable PKG_CONFIG_SYSROOT_DIR can be used alongside the</div><div class='ctx'> variable PKG_CONFIG_LIBDIR or PKG_CONFIG_PATH to prepend the sysroot path to</div><div class='ctx'> the library paths for cross compilation.</div><div class='add'>+</div><div class='add'>+5) Build with Clang</div><div class='add'>+===================</div><div class='add'>+By default, the makefile uses GCC as compiler. With specifying environment</div><div class='add'>+variables HOSTCC, CC and CXX, it allows to build perf with Clang.</div><div class='add'>+</div><div class='add'>+Using Clang for a native build:</div><div class='add'>+</div><div class='add'>+  $ HOSTCC=clang CC=clang CXX=clang++ make -C tools/perf</div><div class='add'>+</div><div class='add'>+Specifying ARCH and CROSS_COMPILE for cross compilation:</div><div class='add'>+</div><div class='add'>+  $ HOSTCC=clang CC=clang CXX=clang++ \</div><div class='add'>+    ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- \</div><div class='add'>+    make -C tools/perf</div><div class='head'>diff --git a/tools/perf/Documentation/android.txt b/tools/perf/Documentation/android.txt<br/>index 24a59998fc91..3f3cc7ac3d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/android.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/android.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/android.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/android.txt</a></div><div class='hunk'>@@ -1,78 +1,10 @@</div><div class='ctx'> How to compile perf for Android</div><div class='del'>-=========================================</div><div class='add'>+===============================</div><div class='ctx'> </div><div class='del'>-I. Set the Android NDK environment</div><div class='del'>-------------------------------------------------</div><div class='add'>+There are two ways to build perf and run it on Android:</div><div class='ctx'> </div><div class='del'>-(a). Use the Android NDK</div><div class='del'>-------------------------------------------------</div><div class='del'>-1. You need to download and install the Android Native Development Kit (NDK).</div><div class='del'>-Set the NDK variable to point to the path where you installed the NDK:</div><div class='del'>-  export NDK=/path/to/android-ndk</div><div class='add'>+- Method 1: Build perf with static linking. See Build.txt, section</div><div class='add'>+  "4) Cross compilation" for how to build a static perf binary.</div><div class='ctx'> </div><div class='del'>-2. Set cross-compiling environment variables for NDK toolchain and sysroot.</div><div class='del'>-For arm:</div><div class='del'>-  export NDK_TOOLCHAIN=${NDK}/toolchains/arm-linux-androideabi-4.9/prebuilt/linux-x86_64/bin/arm-linux-androideabi-</div><div class='del'>-  export NDK_SYSROOT=${NDK}/platforms/android-24/arch-arm</div><div class='del'>-For x86:</div><div class='del'>-  export NDK_TOOLCHAIN=${NDK}/toolchains/x86-4.9/prebuilt/linux-x86_64/bin/i686-linux-android-</div><div class='del'>-  export NDK_SYSROOT=${NDK}/platforms/android-24/arch-x86</div><div class='del'>-</div><div class='del'>-This method is only tested for Android NDK versions Revision 11b and later.</div><div class='del'>-perf uses some bionic enhancements that are not included in prior NDK versions.</div><div class='del'>-You can use method (b) described below instead.</div><div class='del'>-</div><div class='del'>-(b). Use the Android source tree</div><div class='del'>------------------------------------------------</div><div class='del'>-1. Download the master branch of the Android source tree.</div><div class='del'>-Set the environment for the target you want using:</div><div class='del'>-  source build/envsetup.sh</div><div class='del'>-  lunch</div><div class='del'>-</div><div class='del'>-2. Build your own NDK sysroot to contain latest bionic changes and set the</div><div class='del'>-NDK sysroot environment variable.</div><div class='del'>-  cd ${ANDROID_BUILD_TOP}/ndk</div><div class='del'>-For arm:</div><div class='del'>-  ./build/tools/build-ndk-sysroot.sh --abi=arm</div><div class='del'>-  export NDK_SYSROOT=${ANDROID_BUILD_TOP}/ndk/build/platforms/android-3/arch-arm</div><div class='del'>-For x86:</div><div class='del'>-  ./build/tools/build-ndk-sysroot.sh --abi=x86</div><div class='del'>-  export NDK_SYSROOT=${ANDROID_BUILD_TOP}/ndk/build/platforms/android-3/arch-x86</div><div class='del'>-</div><div class='del'>-3. Set the NDK toolchain environment variable.</div><div class='del'>-For arm:</div><div class='del'>-  export NDK_TOOLCHAIN=${ANDROID_TOOLCHAIN}/arm-linux-androideabi-</div><div class='del'>-For x86:</div><div class='del'>-  export NDK_TOOLCHAIN=${ANDROID_TOOLCHAIN}/i686-linux-android-</div><div class='del'>-</div><div class='del'>-II. Compile perf for Android</div><div class='del'>-------------------------------------------------</div><div class='del'>-You need to run make with the NDK toolchain and sysroot defined above:</div><div class='del'>-For arm:</div><div class='del'>-  make WERROR=0 ARCH=arm CROSS_COMPILE=${NDK_TOOLCHAIN} EXTRA_CFLAGS="-pie --sysroot=${NDK_SYSROOT}"</div><div class='del'>-For x86:</div><div class='del'>-  make WERROR=0 ARCH=x86 CROSS_COMPILE=${NDK_TOOLCHAIN} EXTRA_CFLAGS="-pie --sysroot=${NDK_SYSROOT}"</div><div class='del'>-</div><div class='del'>-III. Install perf</div><div class='del'>------------------------------------------------</div><div class='del'>-You need to connect to your Android device/emulator using adb.</div><div class='del'>-Install perf using:</div><div class='del'>-  adb push perf /data/perf</div><div class='del'>-</div><div class='del'>-If you also want to use perf-archive you need busybox tools for Android.</div><div class='del'>-For installing perf-archive, you first need to replace #!/bin/bash with #!/system/bin/sh:</div><div class='del'>-  sed 's/#!\/bin\/bash/#!\/system\/bin\/sh/g' perf-archive &gt;&gt; /tmp/perf-archive</div><div class='del'>-  chmod +x /tmp/perf-archive</div><div class='del'>-  adb push /tmp/perf-archive /data/perf-archive</div><div class='del'>-</div><div class='del'>-IV. Environment settings for running perf</div><div class='del'>-------------------------------------------------</div><div class='del'>-Some perf features need environment variables to run properly.</div><div class='del'>-You need to set these before running perf on the target:</div><div class='del'>-  adb shell</div><div class='del'>-  # PERF_PAGER=cat</div><div class='del'>-</div><div class='del'>-IV. Run perf</div><div class='del'>-------------------------------------------------</div><div class='del'>-Run perf on your device/emulator to which you previously connected using adb:</div><div class='del'>-  # ./data/perf</div><div class='add'>+- Method 2: Download the Android NDK and use the bundled Clang to</div><div class='add'>+  build perf. See Build.txt, section "5) Build with clang" for details.</div><div class='head'>diff --git a/tools/perf/Documentation/intel-acr.txt b/tools/perf/Documentation/intel-acr.txt<br/>new file mode 100644<br/>index 000000000000..72654fdd9a52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/intel-acr.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/intel-acr.txt</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+Intel Auto Counter Reload Support</div><div class='add'>+---------------------------------</div><div class='add'>+Support for Intel Auto Counter Reload in perf tools</div><div class='add'>+</div><div class='add'>+Auto counter reload provides a means for software to specify to hardware</div><div class='add'>+that certain counters, if supported, should be automatically reloaded</div><div class='add'>+upon overflow of chosen counters. By taking a sample only if the rate of</div><div class='add'>+one event exceeds some threshold relative to the rate of another event,</div><div class='add'>+this feature enables software to sample based on the relative rate of</div><div class='add'>+two or more events. To enable this, the user must provide a sample period</div><div class='add'>+term and a bitmask ("acr_mask") for each relevant event specifying the</div><div class='add'>+counters in an event group to reload if the event's specified sample</div><div class='add'>+period is exceeded.</div><div class='add'>+</div><div class='add'>+For example, if the user desires to measure a scenario when IPC &gt; 2,</div><div class='add'>+the event group might look like the one below:</div><div class='add'>+</div><div class='add'>+	perf record -e {cpu_atom/instructions,period=200000,acr_mask=0x2/, \</div><div class='add'>+	cpu_atom/cycles,period=100000,acr_mask=0x3/} -- true</div><div class='add'>+</div><div class='add'>+In this case, if the "instructions" counter exceeds the sample period of</div><div class='add'>+200000, the second counter, "cycles", will be reset and a sample will be</div><div class='add'>+taken. If "cycles" is exceeded first, both counters in the group will be</div><div class='add'>+reset. In this way, samples will only be taken for cases where IPC &gt; 2.</div><div class='add'>+</div><div class='add'>+The acr_mask term is a hexadecimal value representing a bitmask of the</div><div class='add'>+events in the group to be reset when the period is exceeded. In the</div><div class='add'>+example above, "instructions" is assigned an acr_mask of 0x2, meaning</div><div class='add'>+only the second event in the group is reloaded and a sample is taken</div><div class='add'>+for the first event. "cycles" is assigned an acr_mask of 0x3, meaning</div><div class='add'>+that both event counters will be reset if the sample period is exceeded</div><div class='add'>+first.</div><div class='add'>+</div><div class='add'>+ratio-to-prev Event Term</div><div class='add'>+------------------------</div><div class='add'>+To simplify this, an event term "ratio-to-prev" is provided which is used</div><div class='add'>+alongside the sample period term n or the -c/--count option. This would</div><div class='add'>+allow users to specify the desired relative rate between events as a</div><div class='add'>+ratio. Note: Both events compared must belong to the same PMU.</div><div class='add'>+</div><div class='add'>+The command above would then become</div><div class='add'>+</div><div class='add'>+	perf record -e {cpu_atom/instructions/, \</div><div class='add'>+	cpu_atom/cycles,period=100000,ratio-to-prev=0.5/} -- true</div><div class='add'>+</div><div class='add'>+ratio-to-prev is the ratio of the event using the term relative</div><div class='add'>+to the previous event in the group, which will always be 1,</div><div class='add'>+for a 1:0.5 or 2:1 ratio.</div><div class='add'>+</div><div class='add'>+To sample for IPC &lt; 2 for example, the events need to be reordered:</div><div class='add'>+</div><div class='add'>+	perf record -e {cpu_atom/cycles/, \</div><div class='add'>+	cpu_atom/instructions,period=200000,ratio-to-prev=2.0/} -- true</div><div class='head'>diff --git a/tools/perf/Documentation/perf-annotate.txt b/tools/perf/Documentation/perf-annotate.txt<br/>index 46090c5b42b4..547f1a268018 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-annotate.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-annotate.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-annotate.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-annotate.txt</a></div><div class='hunk'>@@ -170,7 +170,6 @@ include::itrace.txt[]</div><div class='ctx'> </div><div class='ctx'> --code-with-type::</div><div class='ctx'> 	Show data type info in code annotation (for memory instructions only).</div><div class='del'>-	Currently it only works with --stdio option.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> SEE ALSO</div><div class='head'>diff --git a/tools/perf/Documentation/perf-arm-spe.txt b/tools/perf/Documentation/perf-arm-spe.txt<br/>index 37afade4f1b2..8b02e5b983fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-arm-spe.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-arm-spe.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-arm-spe.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-arm-spe.txt</a></div><div class='hunk'>@@ -141,27 +141,65 @@ Config parameters</div><div class='ctx'> These are placed between the // in the event and comma separated. For example '-e</div><div class='ctx'> arm_spe/load_filter=1,min_latency=10/'</div><div class='ctx'> </div><div class='del'>-  branch_filter=1     - collect branches only (PMSFCR.B)</div><div class='del'>-  event_filter=&lt;mask&gt; - filter on specific events (PMSEVFR) - see bitfield description below</div><div class='add'>+  event_filter=&lt;mask&gt; - logical AND filter on specific events (PMSEVFR) - see bitfield description below</div><div class='add'>+  inv_event_filter=&lt;mask&gt; - logical OR to filter out specific events (PMSNEVFR, FEAT_SPEv1p2) - see bitfield description below</div><div class='ctx'>   jitter=1            - use jitter to avoid resonance when sampling (PMSIRR.RND)</div><div class='del'>-  load_filter=1       - collect loads only (PMSFCR.LD)</div><div class='ctx'>   min_latency=&lt;n&gt;     - collect only samples with this latency or higher* (PMSLATFR)</div><div class='ctx'>   pa_enable=1         - collect physical address (as well as VA) of loads/stores (PMSCR.PA) - requires privilege</div><div class='ctx'>   pct_enable=1        - collect physical timestamp instead of virtual timestamp (PMSCR.PCT) - requires privilege</div><div class='del'>-  store_filter=1      - collect stores only (PMSFCR.ST)</div><div class='ctx'>   ts_enable=1         - enable timestamping with value of generic timer (PMSCR.TS)</div><div class='ctx'>   discard=1           - enable SPE PMU events but don't collect sample data - see 'Discard mode' (PMBLIMITR.FM = DISCARD)</div><div class='add'>+  inv_data_src_filter=&lt;mask&gt; - mask to filter from 0-63 possible data sources (PMSDSFR, FEAT_SPE_FDS) - See 'Data source filtering'</div><div class='ctx'> </div><div class='ctx'> +++*+++ Latency is the total latency from the point at which sampling started on that instruction, rather</div><div class='ctx'> than only the execution latency.</div><div class='ctx'> </div><div class='del'>-Only some events can be filtered on; these include:</div><div class='del'>-</div><div class='del'>-  bit 1     - instruction retired (i.e. omit speculative instructions)</div><div class='add'>+Only some events can be filtered on using 'event_filter' bits. The overall</div><div class='add'>+filter is the logical AND of these bits, for example if bits 3 and 5 are set</div><div class='add'>+only samples that have both 'L1D cache refill' AND 'TLB walk' are recorded. When</div><div class='add'>+FEAT_SPEv1p2 is implemented 'inv_event_filter' can also be used to exclude</div><div class='add'>+events that have any (OR) of the filter's bits set. For example setting bits 3</div><div class='add'>+and 5 in 'inv_event_filter' will exclude any events that are either L1D cache</div><div class='add'>+refill OR TLB walk. If the same bit is set in both filters it's UNPREDICTABLE</div><div class='add'>+whether the sample is included or excluded. Filter bits for both event_filter</div><div class='add'>+and inv_event_filter are:</div><div class='add'>+</div><div class='add'>+  bit 1     - Instruction retired (i.e. omit speculative instructions)</div><div class='add'>+  bit 2     - L1D access (FEAT_SPEv1p4)</div><div class='ctx'>   bit 3     - L1D refill</div><div class='add'>+  bit 4     - TLB access (FEAT_SPEv1p4)</div><div class='ctx'>   bit 5     - TLB refill</div><div class='del'>-  bit 7     - mispredict</div><div class='del'>-  bit 11    - misaligned access</div><div class='add'>+  bit 6     - Not taken event (FEAT_SPEv1p2)</div><div class='add'>+  bit 7     - Mispredict</div><div class='add'>+  bit 8     - Last level cache access (FEAT_SPEv1p4)</div><div class='add'>+  bit 9     - Last level cache miss (FEAT_SPEv1p4)</div><div class='add'>+  bit 10    - Remote access (FEAT_SPEv1p4)</div><div class='add'>+  bit 11    - Misaligned access (FEAT_SPEv1p1)</div><div class='add'>+  bit 12-15 - IMPLEMENTATION DEFINED events (when implemented)</div><div class='add'>+  bit 16    - Transaction (FEAT_TME)</div><div class='add'>+  bit 17    - Partial or empty SME or SVE predicate (FEAT_SPEv1p1)</div><div class='add'>+  bit 18    - Empty SME or SVE predicate (FEAT_SPEv1p1)</div><div class='add'>+  bit 19    - L2D access (FEAT_SPEv1p4)</div><div class='add'>+  bit 20    - L2D miss (FEAT_SPEv1p4)</div><div class='add'>+  bit 21    - Cache data modified (FEAT_SPEv1p4)</div><div class='add'>+  bit 22    - Recently fetched (FEAT_SPEv1p4)</div><div class='add'>+  bit 23    - Data snooped (FEAT_SPEv1p4)</div><div class='add'>+  bit 24    - Streaming SVE mode event (when FEAT_SPE_SME is implemented), or</div><div class='add'>+              IMPLEMENTATION DEFINED event 24 (when implemented, only versions</div><div class='add'>+              less than FEAT_SPEv1p4)</div><div class='add'>+  bit 25    - SMCU or external coprocessor operation event when FEAT_SPE_SME is</div><div class='add'>+              implemented, or IMPLEMENTATION DEFINED event 25 (when implemented,</div><div class='add'>+              only versions less than FEAT_SPEv1p4)</div><div class='add'>+  bit 26-31 - IMPLEMENTATION DEFINED events (only versions less than FEAT_SPEv1p4)</div><div class='add'>+  bit 48-63 - IMPLEMENTATION DEFINED events (when implemented)</div><div class='add'>+</div><div class='add'>+For IMPLEMENTATION DEFINED bits, refer to the CPU TRM if these bits are</div><div class='add'>+implemented.</div><div class='add'>+</div><div class='add'>+The driver will reject events if requested filter bits require unimplemented SPE</div><div class='add'>+versions, but will not reject filter bits for unimplemented IMPDEF bits or when</div><div class='add'>+their related feature is not present (e.g. SME). For example, if FEAT_SPEv1p2 is</div><div class='add'>+not implemented, filtering on "Not taken event" (bit 6) will be rejected.</div><div class='ctx'> </div><div class='ctx'> So to sample just retired instructions:</div><div class='ctx'> </div><div class='hunk'>@@ -171,6 +209,31 @@ or just mispredicted branches:</div><div class='ctx'> </div><div class='ctx'>   perf record -e arm_spe/event_filter=0x80/ -- ./mybench</div><div class='ctx'> </div><div class='add'>+When set, the following filters can be used to select samples that match any of</div><div class='add'>+the operation types (OR filtering). If only one is set then only samples of that</div><div class='add'>+type are collected:</div><div class='add'>+</div><div class='add'>+  branch_filter=1     - Collect branches (PMSFCR.B)</div><div class='add'>+  load_filter=1       - Collect loads (PMSFCR.LD)</div><div class='add'>+  store_filter=1      - Collect stores (PMSFCR.ST)</div><div class='add'>+</div><div class='add'>+When extended filtering is supported (FEAT_SPE_EFT), SIMD and float</div><div class='add'>+pointer operations can also be selected:</div><div class='add'>+</div><div class='add'>+  simd_filter=1         - Collect SIMD loads, stores and operations (PMSFCR.SIMD)</div><div class='add'>+  float_filter=1        - Collect floating point loads, stores and operations (PMSFCR.FP)</div><div class='add'>+</div><div class='add'>+When extended filtering is supported (FEAT_SPE_EFT), operation type filters can</div><div class='add'>+be changed to AND using _mask fields. For example samples could be selected if</div><div class='add'>+they are store AND SIMD by setting 'store_filter=1,simd_filter=1,</div><div class='add'>+store_filter_mask=1,simd_filter_mask=1'. The new masks are as follows:</div><div class='add'>+</div><div class='add'>+  branch_filter_mask=1  - Change branch filter behavior from OR to AND (PMSFCR.Bm)</div><div class='add'>+  load_filter_mask=1    - Change load filter behavior from OR to AND (PMSFCR.LDm)</div><div class='add'>+  store_filter_mask=1   - Change store filter behavior from OR to AND (PMSFCR.STm)</div><div class='add'>+  simd_filter_mask=1    - Change SIMD filter behavior from OR to AND (PMSFCR.SIMDm)</div><div class='add'>+  float_filter_mask=1   - Change floating point filter behavior from OR to AND (PMSFCR.FPm)</div><div class='add'>+</div><div class='ctx'> Viewing the data</div><div class='ctx'> ~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -191,19 +254,29 @@ groups:</div><div class='ctx'>   36 branch</div><div class='ctx'>   0 remote-access</div><div class='ctx'>   900 memory</div><div class='add'>+  1800 instructions</div><div class='ctx'> </div><div class='ctx'> The arm_spe// and dummy:u events are implementation details and are expected to be empty.</div><div class='ctx'> </div><div class='del'>-To get a full list of unique samples that are not sorted into groups, set the itrace option to</div><div class='del'>-generate 'instruction' samples. The period option is also taken into account, so set it to 1</div><div class='del'>-instruction unless you want to further downsample the already sampled SPE data:</div><div class='add'>+The instructions group contains the full list of unique samples that are not</div><div class='add'>+sorted into other groups. To generate only this group use --itrace=i1i.</div><div class='ctx'> </div><div class='del'>-  perf report --itrace=i1i</div><div class='add'>+1i (1 instruction interval) signifies no further downsampling. Rather than an</div><div class='add'>+instruction interval, this generates a sample every n SPE samples. For example</div><div class='add'>+to generate the default set of events for every 100 SPE samples:</div><div class='add'>+</div><div class='add'>+  perf report --itrace==bxofmtMai100i</div><div class='add'>+</div><div class='add'>+Other period types, for example nanoseconds (ns) are not currently supported.</div><div class='ctx'> </div><div class='ctx'> Memory access details are also stored on the samples and this can be viewed with:</div><div class='ctx'> </div><div class='ctx'>   perf report --mem-mode</div><div class='ctx'> </div><div class='add'>+The latency value from the SPE sample is stored in the 'weight' field of the</div><div class='add'>+Perf samples and can be displayed in Perf script and report outputs by enabling</div><div class='add'>+its display from the command line.</div><div class='add'>+</div><div class='ctx'> Common errors</div><div class='ctx'> ~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +320,25 @@ to minimize output. Then run perf stat:</div><div class='ctx'>   perf record -e arm_spe/discard/ -a -N -B --no-bpf-event -o - &gt; /dev/null &amp;</div><div class='ctx'>   perf stat -e SAMPLE_FEED_LD</div><div class='ctx'> </div><div class='add'>+Data source filtering</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When FEAT_SPE_FDS is present, 'inv_data_src_filter' can be used as a mask to</div><div class='add'>+filter on a subset (0 - 63) of possible data source IDs. The full range of data</div><div class='add'>+sources is 0 - 65535 although these are unlikely to be used in practice. Data</div><div class='add'>+sources are IMPDEF so refer to the TRM for the mappings. Each bit N of the</div><div class='add'>+filter maps to data source N. The filter is an OR of all the bits, and the value</div><div class='add'>+provided inv_data_src_filter is inverted before writing to PMSDSFR_EL1 so that</div><div class='add'>+set bits exclude that data source and cleared bits include that data source.</div><div class='add'>+Therefore the default value of 0 is equivalent to no filtering (all data sources</div><div class='add'>+included).</div><div class='add'>+</div><div class='add'>+For example, to include only data sources 0 and 3, clear bits 0 and 3</div><div class='add'>+(0xFFFFFFFFFFFFFFF6)</div><div class='add'>+</div><div class='add'>+When 'inv_data_src_filter' is set to 0xFFFFFFFFFFFFFFFF, any samples with any</div><div class='add'>+data source set are excluded.</div><div class='add'>+</div><div class='ctx'> SEE ALSO</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/Documentation/perf-bench.txt b/tools/perf/Documentation/perf-bench.txt<br/>index 8331bd28b10e..1160224cb718 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-bench.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-bench.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-bench.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-bench.txt</a></div><div class='hunk'>@@ -177,11 +177,21 @@ Suite for evaluating performance of simple memory copy in various ways.</div><div class='ctx'> </div><div class='ctx'> Options of *memcpy*</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^</div><div class='del'>--l::</div><div class='add'>+-s::</div><div class='ctx'> --size::</div><div class='ctx'> Specify size of memory to copy (default: 1MB).</div><div class='ctx'> Available units are B, KB, MB, GB and TB (case insensitive).</div><div class='ctx'> </div><div class='add'>+-p::</div><div class='add'>+--page::</div><div class='add'>+Specify page-size for mapping memory buffers (default: 4KB).</div><div class='add'>+Available values are 4KB, 2MB, 1GB (case insensitive).</div><div class='add'>+</div><div class='add'>+-k::</div><div class='add'>+--chunk::</div><div class='add'>+Specify the chunk-size for each invocation. (default: 0, or full-extent)</div><div class='add'>+Available units are B, KB, MB, GB and TB (case insensitive).</div><div class='add'>+</div><div class='ctx'> -f::</div><div class='ctx'> --function::</div><div class='ctx'> Specify function to copy (default: default).</div><div class='hunk'>@@ -201,11 +211,21 @@ Suite for evaluating performance of simple memory set in various ways.</div><div class='ctx'> </div><div class='ctx'> Options of *memset*</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^</div><div class='del'>--l::</div><div class='add'>+-s::</div><div class='ctx'> --size::</div><div class='ctx'> Specify size of memory to set (default: 1MB).</div><div class='ctx'> Available units are B, KB, MB, GB and TB (case insensitive).</div><div class='ctx'> </div><div class='add'>+-p::</div><div class='add'>+--page::</div><div class='add'>+Specify page-size for mapping memory buffers (default: 4KB).</div><div class='add'>+Available values are 4KB, 2MB, 1GB (case insensitive).</div><div class='add'>+</div><div class='add'>+-k::</div><div class='add'>+--chunk::</div><div class='add'>+Specify the chunk-size for each invocation. (default: 0, or full-extent)</div><div class='add'>+Available units are B, KB, MB, GB and TB (case insensitive).</div><div class='add'>+</div><div class='ctx'> -f::</div><div class='ctx'> --function::</div><div class='ctx'> Specify function to set (default: default).</div><div class='hunk'>@@ -220,6 +240,40 @@ Repeat memset invocation this number of times.</div><div class='ctx'> --cycles::</div><div class='ctx'> Use perf's cpu-cycles event instead of gettimeofday syscall.</div><div class='ctx'> </div><div class='add'>+*mmap*::</div><div class='add'>+Suite for evaluating memory subsystem performance for mmap()'d memory.</div><div class='add'>+</div><div class='add'>+Options of *mmap*</div><div class='add'>+^^^^^^^^^^^^^^^^^</div><div class='add'>+-s::</div><div class='add'>+--size::</div><div class='add'>+Specify size of memory to set (default: 1MB).</div><div class='add'>+Available units are B, KB, MB, GB and TB (case insensitive).</div><div class='add'>+</div><div class='add'>+-p::</div><div class='add'>+--page::</div><div class='add'>+Specify page-size for mapping memory buffers (default: 4KB).</div><div class='add'>+Available values are 4KB, 2MB, 1GB (case insensitive).</div><div class='add'>+</div><div class='add'>+-r::</div><div class='add'>+--randomize::</div><div class='add'>+Specify seed to randomize page access offset (default: 0, or not randomized).</div><div class='add'>+</div><div class='add'>+-f::</div><div class='add'>+--function::</div><div class='add'>+Specify function to set (default: all).</div><div class='add'>+Available functions are 'demand' and 'populate', with the first</div><div class='add'>+demand faulting pages in the region and the second using an eager</div><div class='add'>+mapping.</div><div class='add'>+</div><div class='add'>+-l::</div><div class='add'>+--nr_loops::</div><div class='add'>+Repeat mmap() invocation this number of times.</div><div class='add'>+</div><div class='add'>+-c::</div><div class='add'>+--cycles::</div><div class='add'>+Use perf's cpu-cycles event instead of gettimeofday syscall.</div><div class='add'>+</div><div class='ctx'> SUITES FOR 'numa'</div><div class='ctx'> ~~~~~~~~~~~~~~~~~</div><div class='ctx'> *mem*::</div><div class='head'>diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt<br/>index f4af2dd6ab31..40b0f71a2c44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-c2c.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-c2c.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-c2c.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-c2c.txt</a></div><div class='hunk'>@@ -143,6 +143,13 @@ REPORT OPTIONS</div><div class='ctx'> 	feature, which causes cacheline sharing to behave like the cacheline</div><div class='ctx'> 	size is doubled.</div><div class='ctx'> </div><div class='add'>+-M::</div><div class='add'>+--disassembler-style=::</div><div class='add'>+	Set disassembler style for objdump.</div><div class='add'>+</div><div class='add'>+--objdump=&lt;path&gt;::</div><div class='add'>+        Path to objdump binary.</div><div class='add'>+</div><div class='ctx'> C2C RECORD</div><div class='ctx'> ----------</div><div class='ctx'> The perf c2c record command setup options related to HITM cacheline analysis</div><div class='head'>diff --git a/tools/perf/Documentation/perf-check.txt b/tools/perf/Documentation/perf-check.txt<br/>index ee92042082f7..09e1d35677f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-check.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-check.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-check.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-check.txt</a></div><div class='hunk'>@@ -50,12 +50,12 @@ feature::</div><div class='ctx'>                 dwarf                   /  HAVE_LIBDW_SUPPORT</div><div class='ctx'>                 dwarf_getlocations      /  HAVE_LIBDW_SUPPORT</div><div class='ctx'>                 dwarf-unwind            /  HAVE_DWARF_UNWIND_SUPPORT</div><div class='del'>-                auxtrace                /  HAVE_AUXTRACE_SUPPORT</div><div class='ctx'>                 libbfd                  /  HAVE_LIBBFD_SUPPORT</div><div class='ctx'>                 libbpf-strings          /  HAVE_LIBBPF_STRINGS_SUPPORT</div><div class='ctx'>                 libcapstone             /  HAVE_LIBCAPSTONE_SUPPORT</div><div class='ctx'>                 libdw-dwarf-unwind      /  HAVE_LIBDW_SUPPORT</div><div class='ctx'>                 libelf                  /  HAVE_LIBELF_SUPPORT</div><div class='add'>+                libLLVM                 /  HAVE_LIBLLVM_SUPPORT</div><div class='ctx'>                 libnuma                 /  HAVE_LIBNUMA_SUPPORT</div><div class='ctx'>                 libopencsd              /  HAVE_CSTRACE_SUPPORT</div><div class='ctx'>                 libperl                 /  HAVE_LIBPERL_SUPPORT</div><div class='head'>diff --git a/tools/perf/Documentation/perf-config.txt b/tools/perf/Documentation/perf-config.txt<br/>index c6f335659667..642d1c490d9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-config.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-config.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-config.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-config.txt</a></div><div class='hunk'>@@ -452,6 +452,9 @@ call-graph.*::</div><div class='ctx'> 		kernel space is controlled not by this option but by the</div><div class='ctx'> 		kernel config (CONFIG_UNWINDER_*).</div><div class='ctx'> </div><div class='add'>+		The 'defer' mode can be used with 'fp' mode to enable deferred</div><div class='add'>+		user callchains (like 'fp,defer').</div><div class='add'>+</div><div class='ctx'> 	call-graph.dump-size::</div><div class='ctx'> 		The size of stack to dump in order to do post-unwinding. Default is 8192 (byte).</div><div class='ctx'> 		When using dwarf into record-mode, the default size will be used if omitted.</div><div class='head'>diff --git a/tools/perf/Documentation/perf-diff.txt b/tools/perf/Documentation/perf-diff.txt<br/>index f3067a4af294..58efab72d2e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-diff.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-diff.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-diff.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-diff.txt</a></div><div class='hunk'>@@ -285,7 +285,7 @@ If specified the 'Weighted diff' column is displayed with value 'd' computed as:</div><div class='ctx'> </div><div class='ctx'>   - period being the hist entry period value</div><div class='ctx'> </div><div class='del'>-  - WEIGHT-A/WEIGHT-B being user supplied weights in the the '-c' option</div><div class='add'>+  - WEIGHT-A/WEIGHT-B being user supplied weights in the '-c' option</div><div class='ctx'>     behind ':' separator like '-c wdiff:1,2'.</div><div class='ctx'>     - WEIGHT-A being the weight of the data file</div><div class='ctx'>     - WEIGHT-B being the weight of the baseline data file</div><div class='head'>diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt<br/>index 28215306a78a..a4378a0cd914 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-list.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-list.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-list.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-list.txt</a></div><div class='hunk'>@@ -73,6 +73,7 @@ counted. The following modifiers exist:</div><div class='ctx'>  e - group or event are exclusive and do not share the PMU</div><div class='ctx'>  b - use BPF aggregration (see perf stat --bpf-counters)</div><div class='ctx'>  R - retire latency value of the event</div><div class='add'>+ X - don't regroup the event to match PMUs</div><div class='ctx'> </div><div class='ctx'> The 'p' modifier can be used for specifying how precise the instruction</div><div class='ctx'> address should be. The 'p' modifier can be specified multiple times:</div><div class='hunk'>@@ -392,6 +393,8 @@ Support raw format:</div><div class='ctx'> . '--raw-dump [hw|sw|cache|tracepoint|pmu|event_glob]', shows the raw-dump of</div><div class='ctx'>   a certain kind of events.</div><div class='ctx'> </div><div class='add'>+include::intel-acr.txt[]</div><div class='add'>+</div><div class='ctx'> SEE ALSO</div><div class='ctx'> --------</div><div class='ctx'> linkperf:perf-stat[1], linkperf:perf-top[1],</div><div class='head'>diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt<br/>index 067891bd7da6..e8b9aadbbfa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-record.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-record.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-record.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-record.txt</a></div><div class='hunk'>@@ -325,6 +325,10 @@ OPTIONS</div><div class='ctx'> 	by default.  User can change the number by passing it after comma</div><div class='ctx'> 	like "--call-graph fp,32".</div><div class='ctx'> </div><div class='add'>+	Also "defer" can be used with "fp" (like "--call-graph fp,defer") to</div><div class='add'>+	enable deferred user callchain which will collect user-space callchains</div><div class='add'>+	when the thread returns to the user space.</div><div class='add'>+</div><div class='ctx'> -q::</div><div class='ctx'> --quiet::</div><div class='ctx'> 	Don't print any warnings or messages, useful for scripting.</div><div class='head'>diff --git a/tools/perf/Documentation/perf-script.txt b/tools/perf/Documentation/perf-script.txt<br/>index 28bec7e78bc8..03d112960632 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-script.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-script.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-script.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-script.txt</a></div><div class='hunk'>@@ -527,6 +527,11 @@ include::itrace.txt[]</div><div class='ctx'> 	The known limitations include exception handing such as</div><div class='ctx'> 	setjmp/longjmp will have calls/returns not match.</div><div class='ctx'> </div><div class='add'>+--merge-callchains::</div><div class='add'>+	Enable merging deferred user callchains if available.  This is the</div><div class='add'>+	default behavior.  If you want to see separate CALLCHAIN_DEFERRED</div><div class='add'>+	records for some reason, use --no-merge-callchains explicitly.</div><div class='add'>+</div><div class='ctx'> :GMEXAMPLECMD: script</div><div class='ctx'> :GMEXAMPLESUBCMD:</div><div class='ctx'> include::guest-files.txt[]</div><div class='head'>diff --git a/tools/perf/Documentation/perf-timechart.txt b/tools/perf/Documentation/perf-timechart.txt<br/>index ef0c7565bd5c..ef2281c56743 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-timechart.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-timechart.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-timechart.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-timechart.txt</a></div><div class='hunk'>@@ -94,6 +94,9 @@ RECORD OPTIONS</div><div class='ctx'> -g::</div><div class='ctx'> --callchain::</div><div class='ctx'>         Do call-graph (stack chain/backtrace) recording</div><div class='add'>+-o::</div><div class='add'>+--output=::</div><div class='add'>+        Select the output file (default: perf.data)</div><div class='ctx'> </div><div class='ctx'> EXAMPLES</div><div class='ctx'> --------</div><div class='head'>diff --git a/tools/perf/Documentation/perf-trace.txt b/tools/perf/Documentation/perf-trace.txt<br/>index 973fede403a0..892c82a9bf40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-trace.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf-trace.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf-trace.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf-trace.txt</a></div><div class='hunk'>@@ -249,6 +249,10 @@ the thread executes on the designated CPUs. Default is to monitor all CPUs.</div><div class='ctx'> 	works well with -s/--summary option where no argument information is</div><div class='ctx'> 	required.</div><div class='ctx'> </div><div class='add'>+--max-summary=N::</div><div class='add'>+	Maximum number of lines in the summary mode.  Note that this applies to</div><div class='add'>+	each entry (thread or cgroup).</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> PAGEFAULTS</div><div class='ctx'> ----------</div><div class='head'>diff --git a/tools/perf/Documentation/perf.data-file-format.txt b/tools/perf/Documentation/perf.data-file-format.txt<br/>index cd95ba09f727..c9d4dec65344 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf.data-file-format.txt?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Documentation/perf.data-file-format.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Documentation/perf.data-file-format.txt?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Documentation/perf.data-file-format.txt</a></div><div class='hunk'>@@ -348,6 +348,16 @@ to special needs.</div><div class='ctx'> </div><div class='ctx'> struct perf_bpil, which contains detailed information about</div><div class='ctx'> a BPF program, including type, id, tag, jited/xlated instructions, etc.</div><div class='add'>+The format of data in HEADER_BPF_PROG_INFO is as follows:</div><div class='add'>+	u32 count</div><div class='add'>+</div><div class='add'>+	struct perf_bpil {</div><div class='add'>+		u32 info_len;	/* size of struct bpf_prog_info, when the tool is compiled */</div><div class='add'>+		u32 data_len;	/* total bytes allocated for data, round up to 8 bytes */</div><div class='add'>+		u64 arrays;	/* which arrays are included in data */</div><div class='add'>+		struct bpf_prog_info info;</div><div class='add'>+		u8  data[];</div><div class='add'>+	}[count];</div><div class='ctx'> </div><div class='ctx'>         HEADER_BPF_BTF = 26,</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config<br/>index 5a5832ee7b53..bd9f4804d56b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Makefile.config?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Makefile.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Makefile.config?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Makefile.config</a></div><div class='hunk'>@@ -23,8 +23,39 @@ HOSTCFLAGS := $(filter-out -Wnested-externs,$(EXTRA_WARNINGS))</div><div class='ctx'> # borrowed from kernel headers depends on it, e.g. put_unaligned_*().</div><div class='ctx'> CFLAGS += -fno-strict-aliasing</div><div class='ctx'> </div><div class='del'>-# Enabled Wthread-safety analysis for clang builds.</div><div class='add'>+# Set target flag and options when using clang as compiler.</div><div class='ctx'> ifeq ($(CC_NO_CLANG), 0)</div><div class='add'>+  CLANG_TARGET_FLAGS_arm	:= arm-linux-gnueabi</div><div class='add'>+  CLANG_TARGET_FLAGS_arm64	:= aarch64-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_m68k	:= m68k-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_mips	:= mipsel-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_powerpc	:= powerpc64le-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_riscv	:= riscv64-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_s390	:= s390x-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_x86	:= x86_64-linux-gnu</div><div class='add'>+  CLANG_TARGET_FLAGS_x86_64	:= x86_64-linux-gnu</div><div class='add'>+</div><div class='add'>+  # Default to host architecture if ARCH is not explicitly given.</div><div class='add'>+  ifeq ($(ARCH), $(HOSTARCH))</div><div class='add'>+    CLANG_TARGET_FLAGS := $(shell $(CLANG) -print-target-triple)</div><div class='add'>+  else</div><div class='add'>+    CLANG_TARGET_FLAGS := $(CLANG_TARGET_FLAGS_$(ARCH))</div><div class='add'>+  endif</div><div class='add'>+</div><div class='add'>+  ifeq ($(CROSS_COMPILE),)</div><div class='add'>+    ifeq ($(CLANG_TARGET_FLAGS),)</div><div class='add'>+      $(error Specify CROSS_COMPILE or add CLANG_TARGET_FLAGS for $(ARCH))</div><div class='add'>+    else</div><div class='add'>+      CLANG_FLAGS += --target=$(CLANG_TARGET_FLAGS)</div><div class='add'>+    endif # CLANG_TARGET_FLAGS</div><div class='add'>+  else</div><div class='add'>+    CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%))</div><div class='add'>+  endif # CROSS_COMPILE</div><div class='add'>+</div><div class='add'>+  CC := $(CLANG) $(CLANG_FLAGS) -fintegrated-as</div><div class='add'>+  CXX := $(CXX) $(CLANG_FLAGS) -fintegrated-as</div><div class='add'>+</div><div class='add'>+  # Enabled Wthread-safety analysis for clang builds.</div><div class='ctx'>   CFLAGS += -Wthread-safety</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -323,9 +354,6 @@ FEATURE_CHECK_LDFLAGS-libpython := $(PYTHON_EMBED_LDOPTS)</div><div class='ctx'> </div><div class='ctx'> FEATURE_CHECK_LDFLAGS-libaio = -lrt</div><div class='ctx'> </div><div class='del'>-FEATURE_CHECK_LDFLAGS-disassembler-four-args = -lbfd -lopcodes -ldl</div><div class='del'>-FEATURE_CHECK_LDFLAGS-disassembler-init-styled = -lbfd -lopcodes -ldl</div><div class='del'>-</div><div class='ctx'> CORE_CFLAGS += -fno-omit-frame-pointer</div><div class='ctx'> CORE_CFLAGS += -Wall</div><div class='ctx'> CORE_CFLAGS += -Wextra</div><div class='hunk'>@@ -417,10 +445,6 @@ ifeq ($(feature-eventfd), 1)</div><div class='ctx'>   CFLAGS += -DHAVE_EVENTFD_SUPPORT</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifeq ($(feature-get_current_dir_name), 1)</div><div class='del'>-  CFLAGS += -DHAVE_GET_CURRENT_DIR_NAME</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> ifeq ($(feature-gettid), 1)</div><div class='ctx'>   CFLAGS += -DHAVE_GETTID</div><div class='ctx'> endif</div><div class='hunk'>@@ -600,13 +624,6 @@ ifndef NO_LIBELF</div><div class='ctx'> 	  LIBBPF_INCLUDE = $(LIBBPF_DIR)/..</div><div class='ctx'>         endif</div><div class='ctx'>       endif</div><div class='del'>-</div><div class='del'>-      FEATURE_CHECK_CFLAGS-libbpf-strings="-I$(LIBBPF_INCLUDE)"</div><div class='del'>-      $(call feature_check,libbpf-strings)</div><div class='del'>-      ifeq ($(feature-libbpf-strings), 1)</div><div class='del'>-        $(call detected,CONFIG_LIBBPF_STRINGS)</div><div class='del'>-        CFLAGS += -DHAVE_LIBBPF_STRINGS_SUPPORT</div><div class='del'>-      endif</div><div class='ctx'>     endif</div><div class='ctx'>   endif # NO_LIBBPF</div><div class='ctx'> endif # NO_LIBELF</div><div class='hunk'>@@ -784,15 +801,10 @@ endif</div><div class='ctx'> </div><div class='ctx'> ifndef NO_SLANG</div><div class='ctx'>   ifneq ($(feature-libslang), 1)</div><div class='del'>-    ifneq ($(feature-libslang-include-subdir), 1)</div><div class='del'>-      $(warning slang not found, disables TUI support. Please install slang-devel, libslang-dev or libslang2-dev)</div><div class='del'>-      NO_SLANG := 1</div><div class='del'>-    else</div><div class='del'>-      CFLAGS += -DHAVE_SLANG_INCLUDE_SUBDIR</div><div class='del'>-    endif</div><div class='add'>+    $(warning slang not found, disables TUI support. Please install slang-devel, libslang-dev or libslang2-dev)</div><div class='add'>+    NO_SLANG := 1</div><div class='ctx'>   endif</div><div class='ctx'>   ifndef NO_SLANG</div><div class='del'>-    # Fedora has /usr/include/slang/slang.h, but ubuntu /usr/include/slang.h</div><div class='ctx'>     CFLAGS += -DHAVE_SLANG_SUPPORT</div><div class='ctx'>     EXTLIBS += -lslang</div><div class='ctx'>     $(call detected,CONFIG_SLANG)</div><div class='hunk'>@@ -817,9 +829,7 @@ ifdef GTK2</div><div class='ctx'>   endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifdef NO_LIBPERL</div><div class='del'>-  CFLAGS += -DNO_LIBPERL</div><div class='del'>-else</div><div class='add'>+ifdef LIBPERL</div><div class='ctx'>   PERL_EMBED_LDOPTS = $(shell perl -MExtUtils::Embed -e ldopts 2&gt;/dev/null)</div><div class='ctx'>   PERL_EMBED_LDFLAGS = $(call strip-libs,$(PERL_EMBED_LDOPTS))</div><div class='ctx'>   PERL_EMBED_LIBADD = $(call grep-libs,$(PERL_EMBED_LDOPTS))</div><div class='hunk'>@@ -829,17 +839,13 @@ else</div><div class='ctx'>   PERL_EMBED_LDOPTS := $(filter-out -specs=%,$(PERL_EMBED_LDOPTS))</div><div class='ctx'>   FLAGS_PERL_EMBED=$(PERL_EMBED_CCOPTS) $(PERL_EMBED_LDOPTS)</div><div class='ctx'> </div><div class='add'>+  $(call feature_check,libperl)</div><div class='ctx'>   ifneq ($(feature-libperl), 1)</div><div class='del'>-    CFLAGS += -DNO_LIBPERL</div><div class='del'>-    NO_LIBPERL := 1</div><div class='del'>-    $(warning Missing perl devel files. Disabling perl scripting support, please install perl-ExtUtils-Embed/libperl-dev)</div><div class='add'>+    $(error Missing perl devel files. Please install perl-ExtUtils-Embed/libperl-dev)</div><div class='ctx'>   else</div><div class='ctx'>     LDFLAGS += $(PERL_EMBED_LDFLAGS)</div><div class='ctx'>     EXTLIBS += $(PERL_EMBED_LIBADD)</div><div class='ctx'>     CFLAGS += -DHAVE_LIBPERL_SUPPORT</div><div class='del'>-    ifeq ($(CC_NO_CLANG), 0)</div><div class='del'>-      CFLAGS += -Wno-compound-token-split-by-macro</div><div class='del'>-    endif</div><div class='ctx'>     $(call detected,CONFIG_LIBPERL)</div><div class='ctx'>   endif</div><div class='ctx'> endif</div><div class='hunk'>@@ -921,6 +927,8 @@ ifdef BUILD_NONDISTRO</div><div class='ctx'> </div><div class='ctx'>   ifeq ($(feature-libbfd), 1)</div><div class='ctx'>     EXTLIBS += -lbfd -lopcodes</div><div class='add'>+    FEATURE_CHECK_LDFLAGS-disassembler-four-args = -lbfd -lopcodes -ldl</div><div class='add'>+    FEATURE_CHECK_LDFLAGS-disassembler-init-styled = -lbfd -lopcodes -ldl</div><div class='ctx'>   else</div><div class='ctx'>     # we are on a system that requires -liberty and (maybe) -lz</div><div class='ctx'>     # to link against -lbfd; test each case individually here</div><div class='hunk'>@@ -947,6 +955,7 @@ ifdef BUILD_NONDISTRO</div><div class='ctx'> </div><div class='ctx'>   CFLAGS += -DHAVE_LIBBFD_SUPPORT</div><div class='ctx'>   CXXFLAGS += -DHAVE_LIBBFD_SUPPORT</div><div class='add'>+  $(call detected,CONFIG_LIBBFD)</div><div class='ctx'> </div><div class='ctx'>   $(call feature_check,libbfd-buildid)</div><div class='ctx'> </div><div class='hunk'>@@ -955,6 +964,14 @@ ifdef BUILD_NONDISTRO</div><div class='ctx'>   else</div><div class='ctx'>     $(warning Old version of libbfd/binutils things like PE executable profiling will not be available)</div><div class='ctx'>   endif</div><div class='add'>+</div><div class='add'>+  ifeq ($(feature-disassembler-four-args), 1)</div><div class='add'>+    CFLAGS += -DDISASM_FOUR_ARGS_SIGNATURE</div><div class='add'>+  endif</div><div class='add'>+</div><div class='add'>+  ifeq ($(feature-disassembler-init-styled), 1)</div><div class='add'>+    CFLAGS += -DDISASM_INIT_STYLED</div><div class='add'>+  endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> ifndef NO_LIBLLVM</div><div class='hunk'>@@ -1046,14 +1063,6 @@ ifdef HAVE_KVM_STAT_SUPPORT</div><div class='ctx'>     CFLAGS += -DHAVE_KVM_STAT_SUPPORT</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifeq ($(feature-disassembler-four-args), 1)</div><div class='del'>-    CFLAGS += -DDISASM_FOUR_ARGS_SIGNATURE</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-ifeq ($(feature-disassembler-init-styled), 1)</div><div class='del'>-    CFLAGS += -DDISASM_INIT_STYLED</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> ifeq (${IS_64_BIT}, 1)</div><div class='ctx'>   ifndef NO_PERF_READ_VDSO32</div><div class='ctx'>     $(call feature_check,compile-32)</div><div class='hunk'>@@ -1103,19 +1112,6 @@ ifndef NO_CAPSTONE</div><div class='ctx'>   endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-ifndef NO_AUXTRACE</div><div class='del'>-  ifeq ($(SRCARCH),x86)</div><div class='del'>-    ifeq ($(feature-get_cpuid), 0)</div><div class='del'>-      $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc)</div><div class='del'>-      NO_AUXTRACE := 1</div><div class='del'>-    endif</div><div class='del'>-  endif</div><div class='del'>-  ifndef NO_AUXTRACE</div><div class='del'>-    $(call detected,CONFIG_AUXTRACE)</div><div class='del'>-    CFLAGS += -DHAVE_AUXTRACE_SUPPORT</div><div class='del'>-  endif</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> ifdef EXTRA_TESTS</div><div class='ctx'>     $(call detected,CONFIG_EXTRA_TESTS)</div><div class='ctx'>     CFLAGS += -DHAVE_EXTRA_TESTS</div><div class='hunk'>@@ -1181,20 +1177,6 @@ ifneq ($(NO_LIBTRACEEVENT),1)</div><div class='ctx'>   else</div><div class='ctx'>     $(error ERROR: libtraceevent is missing. Please install libtraceevent-dev/libtraceevent-devel and/or set LIBTRACEEVENT_DIR or build with NO_LIBTRACEEVENT=1)</div><div class='ctx'>   endif</div><div class='del'>-</div><div class='del'>-  ifeq ($(feature-libtracefs), 1)</div><div class='del'>-    CFLAGS +=  $(shell $(PKG_CONFIG) --cflags libtracefs)</div><div class='del'>-    LDFLAGS += $(shell $(PKG_CONFIG) --libs-only-L libtracefs)</div><div class='del'>-    EXTLIBS += $(shell $(PKG_CONFIG) --libs-only-l libtracefs)</div><div class='del'>-    LIBTRACEFS_VERSION := $(shell $(PKG_CONFIG) --modversion libtracefs).0.0</div><div class='del'>-    LIBTRACEFS_VERSION_1 := $(word 1, $(subst ., ,$(LIBTRACEFS_VERSION)))</div><div class='del'>-    LIBTRACEFS_VERSION_2 := $(word 2, $(subst ., ,$(LIBTRACEFS_VERSION)))</div><div class='del'>-    LIBTRACEFS_VERSION_3 := $(word 3, $(subst ., ,$(LIBTRACEFS_VERSION)))</div><div class='del'>-    LIBTRACEFS_VERSION_CPP := $(shell expr $(LIBTRACEFS_VERSION_1) \* 255 \* 255 + $(LIBTRACEFS_VERSION_2) \* 255 + $(LIBTRACEFS_VERSION_3))</div><div class='del'>-    CFLAGS += -DLIBTRACEFS_VERSION=$(LIBTRACEFS_VERSION_CPP)</div><div class='del'>-  else</div><div class='del'>-    $(warning libtracefs is missing. Please install libtracefs-dev/libtracefs-devel)</div><div class='del'>-  endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # Among the variables below, these:</div><div class='head'>diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf<br/>index e2150acc2c13..b3f481a626af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/Makefile.perf?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/Makefile.perf</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/Makefile.perf?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/Makefile.perf</a></div><div class='hunk'>@@ -17,7 +17,7 @@ include ../scripts/utilities.mak</div><div class='ctx'> #</div><div class='ctx'> # Define CROSS_COMPILE as prefix name of compiler if you want cross-builds.</div><div class='ctx'> #</div><div class='del'>-# Define NO_LIBPERL to disable perl script extension.</div><div class='add'>+# Define LIBPERL to enable perl script extension.</div><div class='ctx'> #</div><div class='ctx'> # Define NO_LIBPYTHON to disable python script extension.</div><div class='ctx'> #</div><div class='hunk'>@@ -84,8 +84,6 @@ include ../scripts/utilities.mak</div><div class='ctx'> #</div><div class='ctx'> # Define NO_LZMA if you do not want to support compressed (xz) kernel modules</div><div class='ctx'> #</div><div class='del'>-# Define NO_AUXTRACE if you do not want AUX area tracing support</div><div class='del'>-#</div><div class='ctx'> # Define NO_LIBBPF if you do not want BPF support</div><div class='ctx'> #</div><div class='ctx'> # Define NO_LIBCAP if you do not want process capabilities considered by perf</div><div class='hunk'>@@ -194,7 +192,7 @@ else</div><div class='ctx'>   # paths are used instead.</div><div class='ctx'>   ifdef CROSS_COMPILE</div><div class='ctx'>     ifeq ($(PKG_CONFIG_LIBDIR)$(PKG_CONFIG_PATH)$(PKG_CONFIG_SYSROOT_DIR),)</div><div class='del'>-      CROSS_ARCH = $(shell $(CC) -dumpmachine)</div><div class='add'>+      CROSS_ARCH = $(notdir $(CROSS_COMPILE:%-=%))</div><div class='ctx'>       PKG_CONFIG_LIBDIR := /usr/local/$(CROSS_ARCH)/lib/pkgconfig/</div><div class='ctx'>       PKG_CONFIG_LIBDIR := $(PKG_CONFIG_LIBDIR):/usr/local/lib/$(CROSS_ARCH)/pkgconfig/</div><div class='ctx'>       PKG_CONFIG_LIBDIR := $(PKG_CONFIG_LIBDIR):/usr/lib/$(CROSS_ARCH)/pkgconfig/</div><div class='hunk'>@@ -234,12 +232,12 @@ endif</div><div class='ctx'> # The fixdep build - we force fixdep tool to be built as</div><div class='ctx'> # the first target in the separate make session not to be</div><div class='ctx'> # disturbed by any parallel make jobs. Once fixdep is done</div><div class='del'>-# we issue the requested build with FIXDEP=1 variable.</div><div class='add'>+# we issue the requested build with FIXDEP_BUILT=1 variable.</div><div class='ctx'> #</div><div class='ctx'> # The fixdep build is disabled for $(NON_CONFIG_TARGETS)</div><div class='ctx'> # targets, because it's not necessary.</div><div class='ctx'> </div><div class='del'>-ifdef FIXDEP</div><div class='add'>+ifdef FIXDEP_BUILT</div><div class='ctx'>   force_fixdep := 0</div><div class='ctx'> else</div><div class='ctx'>   force_fixdep := $(config)</div><div class='hunk'>@@ -286,7 +284,7 @@ $(goals) all: sub-make</div><div class='ctx'> </div><div class='ctx'> sub-make: fixdep</div><div class='ctx'> 	@./check-headers.sh</div><div class='del'>-	$(Q)$(MAKE) FIXDEP=1 -f Makefile.perf $(goals)</div><div class='add'>+	$(Q)$(MAKE) FIXDEP_BUILT=1 -f Makefile.perf $(goals)</div><div class='ctx'> </div><div class='ctx'> else # force_fixdep</div><div class='ctx'> </div><div class='hunk'>@@ -941,7 +939,7 @@ $(OUTPUT)dlfilters/%.so: $(OUTPUT)dlfilters/%.o</div><div class='ctx'> ifndef NO_JVMTI</div><div class='ctx'> LIBJVMTI_IN := $(OUTPUT)jvmti/jvmti-in.o</div><div class='ctx'> </div><div class='del'>-$(LIBJVMTI_IN): FORCE</div><div class='add'>+$(LIBJVMTI_IN): prepare FORCE</div><div class='ctx'> 	$(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=jvmti obj=jvmti</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)$(LIBJVMTI): $(LIBJVMTI_IN)</div><div class='hunk'>@@ -1103,7 +1101,7 @@ endif</div><div class='ctx'> 		$(INSTALL) $(OUTPUT)perf-archive -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)'</div><div class='ctx'> 	$(call QUIET_INSTALL, perf-iostat) \</div><div class='ctx'> 		$(INSTALL) $(OUTPUT)perf-iostat -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)'</div><div class='del'>-ifndef NO_LIBPERL</div><div class='add'>+ifdef LIBPERL</div><div class='ctx'> 	$(call QUIET_INSTALL, perl-scripts) \</div><div class='ctx'> 		$(INSTALL) -d -m 755 '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace'; \</div><div class='ctx'> 		$(INSTALL) scripts/perl/Perf-Trace-Util/lib/Perf/Trace/* -m 644 -t '$(DESTDIR_SQ)$(perfexec_instdir_SQ)/scripts/perl/Perf-Trace-Util/lib/Perf/Trace'; \</div><div class='hunk'>@@ -1272,9 +1270,24 @@ endif # CONFIG_PERF_BPF_SKEL</div><div class='ctx'> bpf-skel-clean:</div><div class='ctx'> 	$(call QUIET_CLEAN, bpf-skel) $(RM) -r $(SKEL_TMP_OUT) $(SKELETONS) $(SKEL_OUT)/vmlinux.h</div><div class='ctx'> </div><div class='add'>+pmu-events-clean:</div><div class='add'>+ifeq ($(OUTPUT),)</div><div class='add'>+	$(call QUIET_CLEAN, pmu-events) $(RM) \</div><div class='add'>+		pmu-events/pmu-events.c \</div><div class='add'>+		pmu-events/metric_test.log \</div><div class='add'>+		pmu-events/test-empty-pmu-events.c \</div><div class='add'>+		pmu-events/empty-pmu-events.log</div><div class='add'>+else # When an OUTPUT directory is present, clean up the copied pmu-events/arch directory.</div><div class='add'>+	$(call QUIET_CLEAN, pmu-events) $(RM) -r $(OUTPUT)pmu-events/arch \</div><div class='add'>+		$(OUTPUT)pmu-events/pmu-events.c \</div><div class='add'>+		$(OUTPUT)pmu-events/metric_test.log \</div><div class='add'>+		$(OUTPUT)pmu-events/test-empty-pmu-events.c \</div><div class='add'>+		$(OUTPUT)pmu-events/empty-pmu-events.log</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> clean:: $(LIBAPI)-clean $(LIBBPF)-clean $(LIBSUBCMD)-clean $(LIBSYMBOL)-clean $(LIBPERF)-clean \</div><div class='ctx'> 		arm64-sysreg-defs-clean fixdep-clean python-clean bpf-skel-clean \</div><div class='del'>-		tests-coresight-targets-clean</div><div class='add'>+		tests-coresight-targets-clean pmu-events-clean</div><div class='ctx'> 	$(call QUIET_CLEAN, core-objs)  $(RM) $(LIBPERF_A) $(OUTPUT)perf-archive \</div><div class='ctx'> 		$(OUTPUT)perf-iostat $(LANG_BINDINGS)</div><div class='ctx'> 	$(Q)find $(or $(OUTPUT),.) -name '*.o' -delete -o -name '*.a' -delete -o \</div><div class='hunk'>@@ -1287,10 +1300,6 @@ clean:: $(LIBAPI)-clean $(LIBBPF)-clean $(LIBSUBCMD)-clean $(LIBSYMBOL)-clean $(</div><div class='ctx'> 		$(OUTPUT)FEATURE-DUMP $(OUTPUT)util/*-bison* $(OUTPUT)util/*-flex* \</div><div class='ctx'> 		$(OUTPUT)util/intel-pt-decoder/inat-tables.c \</div><div class='ctx'> 		$(OUTPUT)tests/llvm-src-{base,kbuild,prologue,relocation}.c \</div><div class='del'>-		$(OUTPUT)pmu-events/pmu-events.c \</div><div class='del'>-		$(OUTPUT)pmu-events/test-empty-pmu-events.c \</div><div class='del'>-		$(OUTPUT)pmu-events/empty-pmu-events.log \</div><div class='del'>-		$(OUTPUT)pmu-events/metric_test.log \</div><div class='ctx'> 		$(OUTPUT)$(fadvise_advice_array) \</div><div class='ctx'> 		$(OUTPUT)$(fsconfig_arrays) \</div><div class='ctx'> 		$(OUTPUT)$(fsmount_arrays) \</div><div class='head'>diff --git a/tools/perf/arch/arm/annotate/instructions.c b/tools/perf/arch/arm/annotate/instructions.c<br/>index cf91a43362b0..5e667b0f5512 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/annotate/instructions.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/annotate/instructions.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/annotate/instructions.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm/annotate/instructions.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;regex.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='head'>diff --git a/tools/perf/arch/arm/entry/syscalls/syscall.tbl b/tools/perf/arch/arm/entry/syscalls/syscall.tbl<br/>index 27c1d5ebcd91..b07e699aaa3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -482,3 +482,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/arm/util/Build b/tools/perf/arch/arm/util/Build<br/>index f7a8b37d1c68..fd695e1fdaee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm/util/Build</a></div><div class='hunk'>@@ -3,4 +3,4 @@ perf-util-y += perf_regs.o</div><div class='ctx'> perf-util-$(CONFIG_LOCAL_LIBUNWIND)    += unwind-libunwind.o</div><div class='ctx'> perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='ctx'> </div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += pmu.o auxtrace.o cs-etm.o</div><div class='add'>+perf-util-y += pmu.o auxtrace.o cs-etm.o</div><div class='head'>diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c<br/>index 3b8eca0ffb17..eb6404267f17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/auxtrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/auxtrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/auxtrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm/util/auxtrace.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;dirent.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;linux/coresight-pmu.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='head'>diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c<br/>index f70075c89aa0..9be8da5207f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm/util/pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm/util/pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm/util/pmu.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@ void perf_pmu__arch_init(struct perf_pmu *pmu)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_cpu_map *intersect, *online = cpu_map__online();</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='ctx'> 	if (!strcmp(pmu-&gt;name, CORESIGHT_ETM_PMU_NAME)) {</div><div class='ctx'> 		/* add ETM default config here */</div><div class='ctx'> 		pmu-&gt;auxtrace = true;</div><div class='hunk'>@@ -39,7 +38,6 @@ void perf_pmu__arch_init(struct perf_pmu *pmu)</div><div class='ctx'> 		pmu-&gt;selectable = true;</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	/* Workaround some ARM PMU's failing to correctly set CPU maps for online processors. */</div><div class='ctx'> 	intersect = perf_cpu_map__intersect(online, pmu-&gt;cpus);</div><div class='ctx'> 	perf_cpu_map__put(online);</div><div class='head'>diff --git a/tools/perf/arch/arm64/annotate/instructions.c b/tools/perf/arch/arm64/annotate/instructions.c<br/>index d465d093e7eb..16cb62d40bd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/annotate/instructions.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/annotate/instructions.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/annotate/instructions.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm64/annotate/instructions.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;regex.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='head'>diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build<br/>index a74521b79eaa..d63881081d2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm64/util/Build</a></div><div class='hunk'>@@ -1,13 +1,14 @@</div><div class='add'>+perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='add'>+perf-util-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o</div><div class='add'>+perf-util-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o</div><div class='add'>+perf-util-y += ../../arm/util/auxtrace.o</div><div class='add'>+perf-util-y += ../../arm/util/cs-etm.o</div><div class='add'>+perf-util-y += ../../arm/util/pmu.o</div><div class='add'>+perf-util-y += arm-spe.o</div><div class='ctx'> perf-util-y += header.o</div><div class='add'>+perf-util-y += hisi-ptt.o</div><div class='ctx'> perf-util-y += machine.o</div><div class='add'>+perf-util-y += mem-events.o</div><div class='ctx'> perf-util-y += perf_regs.o</div><div class='del'>-perf-util-y += tsc.o</div><div class='ctx'> perf-util-y += pmu.o</div><div class='del'>-perf-util-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o</div><div class='del'>-perf-util-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o</div><div class='del'>-perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='del'>-</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += ../../arm/util/pmu.o \</div><div class='del'>-			      ../../arm/util/auxtrace.o \</div><div class='del'>-			      ../../arm/util/cs-etm.o \</div><div class='del'>-			      arm-spe.o mem-events.o hisi-ptt.o</div><div class='add'>+perf-util-y += tsc.o</div><div class='head'>diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c<br/>index 4f2833b62ff5..d5ec1408d0ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/arm-spe.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/arm-spe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/arm-spe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm64/util/arm-spe.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;time.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../../../util/cpumap.h"</div><div class='hunk'>@@ -121,12 +122,17 @@ static int arm_spe_save_cpu_header(struct auxtrace_record *itr,</div><div class='ctx'> 		/* No Arm SPE PMU is found */</div><div class='ctx'> 		data[ARM_SPE_CPU_PMU_TYPE] = ULLONG_MAX;</div><div class='ctx'> 		data[ARM_SPE_CAP_MIN_IVAL] = 0;</div><div class='add'>+		data[ARM_SPE_CAP_EVENT_FILTER] = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		data[ARM_SPE_CPU_PMU_TYPE] = pmu-&gt;type;</div><div class='ctx'> </div><div class='ctx'> 		if (perf_pmu__scan_file(pmu, "caps/min_interval", "%lu", &amp;val) != 1)</div><div class='ctx'> 			val = 0;</div><div class='ctx'> 		data[ARM_SPE_CAP_MIN_IVAL] = val;</div><div class='add'>+</div><div class='add'>+		if (perf_pmu__scan_file(pmu, "caps/event_filter", "%lx", &amp;val) != 1)</div><div class='add'>+			val = 0;</div><div class='add'>+		data[ARM_SPE_CAP_EVENT_FILTER] = val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	free(cpuid);</div><div class='head'>diff --git a/tools/perf/arch/arm64/util/arm64_exception_types.h b/tools/perf/arch/arm64/util/arm64_exception_types.h<br/>index 27c981ebe401..bf827f19ace0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/arm64_exception_types.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/arm64_exception_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/arm64_exception_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm64/util/arm64_exception_types.h</a></div><div class='hunk'>@@ -31,9 +31,10 @@</div><div class='ctx'> #define ESR_ELx_EC_FP_ASIMD	(0x07)</div><div class='ctx'> #define ESR_ELx_EC_CP10_ID	(0x08)	/* EL2 only */</div><div class='ctx'> #define ESR_ELx_EC_PAC		(0x09)	/* EL2 and above */</div><div class='del'>-/* Unallocated EC: 0x0A - 0x0B */</div><div class='add'>+#define ESR_ELx_EC_OTHER	(0x0A)</div><div class='add'>+/* Unallocated EC: 0x0B */</div><div class='ctx'> #define ESR_ELx_EC_CP14_64	(0x0C)</div><div class='del'>-/* Unallocated EC: 0x0d */</div><div class='add'>+#define ESR_ELx_EC_BTI		(0x0D)</div><div class='ctx'> #define ESR_ELx_EC_ILL		(0x0E)</div><div class='ctx'> /* Unallocated EC: 0x0F - 0x10 */</div><div class='ctx'> #define ESR_ELx_EC_SVC32	(0x11)</div><div class='hunk'>@@ -46,7 +47,10 @@</div><div class='ctx'> #define ESR_ELx_EC_SYS64	(0x18)</div><div class='ctx'> #define ESR_ELx_EC_SVE		(0x19)</div><div class='ctx'> #define ESR_ELx_EC_ERET		(0x1a)	/* EL2 only */</div><div class='del'>-/* Unallocated EC: 0x1b - 0x1E */</div><div class='add'>+/* Unallocated EC: 0x1B */</div><div class='add'>+#define ESR_ELx_EC_FPAC		(0x1C)	/* EL1 and above */</div><div class='add'>+#define ESR_ELx_EC_SME		(0x1D)</div><div class='add'>+/* Unallocated EC: 0x1E */</div><div class='ctx'> #define ESR_ELx_EC_IMP_DEF	(0x1f)	/* EL3 only */</div><div class='ctx'> #define ESR_ELx_EC_IABT_LOW	(0x20)</div><div class='ctx'> #define ESR_ELx_EC_IABT_CUR	(0x21)</div><div class='hunk'>@@ -55,11 +59,12 @@</div><div class='ctx'> #define ESR_ELx_EC_DABT_LOW	(0x24)</div><div class='ctx'> #define ESR_ELx_EC_DABT_CUR	(0x25)</div><div class='ctx'> #define ESR_ELx_EC_SP_ALIGN	(0x26)</div><div class='del'>-/* Unallocated EC: 0x27 */</div><div class='add'>+#define ESR_ELx_EC_MOPS		(0x27)</div><div class='ctx'> #define ESR_ELx_EC_FP_EXC32	(0x28)</div><div class='ctx'> /* Unallocated EC: 0x29 - 0x2B */</div><div class='ctx'> #define ESR_ELx_EC_FP_EXC64	(0x2C)</div><div class='del'>-/* Unallocated EC: 0x2D - 0x2E */</div><div class='add'>+#define ESR_ELx_EC_GCS		(0x2D)</div><div class='add'>+/* Unallocated EC: 0x2E */</div><div class='ctx'> #define ESR_ELx_EC_SERROR	(0x2F)</div><div class='ctx'> #define ESR_ELx_EC_BREAKPT_LOW	(0x30)</div><div class='ctx'> #define ESR_ELx_EC_BREAKPT_CUR	(0x31)</div><div class='head'>diff --git a/tools/perf/arch/arm64/util/hisi-ptt.c b/tools/perf/arch/arm64/util/hisi-ptt.c<br/>index eac9739c87e6..fe457fd58c9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/hisi-ptt.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/arm64/util/hisi-ptt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/arm64/util/hisi-ptt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/arm64/util/hisi-ptt.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;time.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;internal/lib.h&gt; // page_size</div><div class='head'>diff --git a/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl b/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl<br/>index 1e8c44c7b614..7a7049c2c307 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl</a></div><div class='hunk'>@@ -382,3 +382,5 @@</div><div class='ctx'> 465	n64	listxattrat			sys_listxattrat</div><div class='ctx'> 466	n64	removexattrat			sys_removexattrat</div><div class='ctx'> 467	n64	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	n64	file_getattr			sys_file_getattr</div><div class='add'>+469	n64	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl b/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl<br/>index 9a084bdb8926..b453e80dfc00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/powerpc/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/powerpc/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -558,3 +558,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/powerpc/util/Build b/tools/perf/arch/powerpc/util/Build<br/>index fdd6a77a3432..3d0d5427aef7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/powerpc/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/powerpc/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/powerpc/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/powerpc/util/Build</a></div><div class='hunk'>@@ -10,3 +10,4 @@ perf-util-$(CONFIG_LIBDW) += skip-callchain-idx.o</div><div class='ctx'> </div><div class='ctx'> perf-util-$(CONFIG_LIBUNWIND) += unwind-libunwind.o</div><div class='ctx'> perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='add'>+perf-util-y += auxtrace.o</div><div class='head'>diff --git a/tools/perf/arch/powerpc/util/auxtrace.c b/tools/perf/arch/powerpc/util/auxtrace.c<br/>new file mode 100644<br/>index 000000000000..292ea335e4ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/powerpc/util/auxtrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/powerpc/util/auxtrace.c</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * VPA support</div><div class='add'>+ */</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../../util/evlist.h"</div><div class='add'>+#include "../../util/debug.h"</div><div class='add'>+#include "../../util/auxtrace.h"</div><div class='add'>+#include "../../util/powerpc-vpadtl.h"</div><div class='add'>+#include "../../util/record.h"</div><div class='add'>+#include &lt;internal/lib.h&gt; // page_size</div><div class='add'>+</div><div class='add'>+#define KiB(x) ((x) * 1024)</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+powerpc_vpadtl_recording_options(struct auxtrace_record *ar __maybe_unused,</div><div class='add'>+			struct evlist *evlist __maybe_unused,</div><div class='add'>+			struct record_opts *opts)</div><div class='add'>+{</div><div class='add'>+	opts-&gt;full_auxtrace = true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set auxtrace_mmap_pages to minimum</div><div class='add'>+	 * two pages</div><div class='add'>+	 */</div><div class='add'>+	if (!opts-&gt;auxtrace_mmap_pages) {</div><div class='add'>+		opts-&gt;auxtrace_mmap_pages = KiB(128) / page_size;</div><div class='add'>+		if (opts-&gt;mmap_pages == UINT_MAX)</div><div class='add'>+			opts-&gt;mmap_pages = KiB(256) / page_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t powerpc_vpadtl_info_priv_size(struct auxtrace_record *itr __maybe_unused,</div><div class='add'>+					struct evlist *evlist __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return VPADTL_AUXTRACE_PRIV_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+powerpc_vpadtl_info_fill(struct auxtrace_record *itr __maybe_unused,</div><div class='add'>+		struct perf_session *session __maybe_unused,</div><div class='add'>+		struct perf_record_auxtrace_info *auxtrace_info,</div><div class='add'>+		size_t priv_size __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	auxtrace_info-&gt;type = PERF_AUXTRACE_VPA_DTL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void powerpc_vpadtl_free(struct auxtrace_record *itr)</div><div class='add'>+{</div><div class='add'>+	free(itr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 powerpc_vpadtl_reference(struct auxtrace_record *itr __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct auxtrace_record *auxtrace_record__init(struct evlist *evlist,</div><div class='add'>+						int *err)</div><div class='add'>+{</div><div class='add'>+	struct auxtrace_record *aux;</div><div class='add'>+	struct evsel *pos;</div><div class='add'>+	int found = 0;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, pos) {</div><div class='add'>+		if (strstarts(pos-&gt;name, "vpa_dtl")) {</div><div class='add'>+			found = 1;</div><div class='add'>+			pos-&gt;needs_auxtrace_mmap = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To obtain the auxtrace buffer file descriptor, the auxtrace event</div><div class='add'>+	 * must come first.</div><div class='add'>+	 */</div><div class='add'>+	evlist__to_front(pos-&gt;evlist, pos);</div><div class='add'>+</div><div class='add'>+	aux = zalloc(sizeof(*aux));</div><div class='add'>+	if (aux == NULL) {</div><div class='add'>+		pr_debug("aux record is NULL\n");</div><div class='add'>+		*err = -ENOMEM;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aux-&gt;recording_options = powerpc_vpadtl_recording_options;</div><div class='add'>+	aux-&gt;info_priv_size = powerpc_vpadtl_info_priv_size;</div><div class='add'>+	aux-&gt;info_fill = powerpc_vpadtl_info_fill;</div><div class='add'>+	aux-&gt;free = powerpc_vpadtl_free;</div><div class='add'>+	aux-&gt;reference = powerpc_vpadtl_reference;</div><div class='add'>+	return aux;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/arch/s390/entry/syscalls/syscall.tbl b/tools/perf/arch/s390/entry/syscalls/syscall.tbl<br/>index a4569b96ef06..8a6744d658db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/s390/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -470,3 +470,5 @@</div><div class='ctx'> 465  common	listxattrat		sys_listxattrat			sys_listxattrat</div><div class='ctx'> 466  common	removexattrat		sys_removexattrat		sys_removexattrat</div><div class='ctx'> 467  common	open_tree_attr		sys_open_tree_attr		sys_open_tree_attr</div><div class='add'>+468  common	file_getattr		sys_file_getattr		sys_file_getattr</div><div class='add'>+469  common	file_setattr		sys_file_setattr		sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/s390/util/Build b/tools/perf/arch/s390/util/Build<br/>index 736c0ad09194..c64eb18dbdae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/s390/util/Build</a></div><div class='hunk'>@@ -7,4 +7,4 @@ perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='ctx'> perf-util-y += machine.o</div><div class='ctx'> perf-util-y += pmu.o</div><div class='ctx'> </div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += auxtrace.o</div><div class='add'>+perf-util-y += auxtrace.o</div><div class='head'>diff --git a/tools/perf/arch/s390/util/auxtrace.c b/tools/perf/arch/s390/util/auxtrace.c<br/>index 5068baa3e092..1a3676145066 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/util/auxtrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/s390/util/auxtrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/s390/util/auxtrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/s390/util/auxtrace.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='head'>diff --git a/tools/perf/arch/sh/entry/syscalls/syscall.tbl b/tools/perf/arch/sh/entry/syscalls/syscall.tbl<br/>index 52a7652fcff6..5e9c9eff5539 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/sh/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/sh/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/sh/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/sh/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -471,3 +471,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/sparc/entry/syscalls/syscall.tbl b/tools/perf/arch/sparc/entry/syscalls/syscall.tbl<br/>index 83e45eb6c095..ebb7d06d1044 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/sparc/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/sparc/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/sparc/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/sparc/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -513,3 +513,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/x86/annotate/instructions.c b/tools/perf/arch/x86/annotate/instructions.c<br/>index c6d403eae744..803f9351a3fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/annotate/instructions.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/annotate/instructions.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/annotate/instructions.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/annotate/instructions.c</a></div><div class='hunk'>@@ -248,6 +248,7 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 			tsr = &amp;state-&gt;regs[state-&gt;ret_reg];</div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("call [%x] return -&gt; reg%d",</div><div class='hunk'>@@ -284,6 +285,7 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 			    !strcmp(var_name, "this_cpu_off") &amp;&amp;</div><div class='ctx'> 			    tsr-&gt;kind == TSR_KIND_CONST) {</div><div class='ctx'> 				tsr-&gt;kind = TSR_KIND_PERCPU_BASE;</div><div class='add'>+				tsr-&gt;offset = 0;</div><div class='ctx'> 				tsr-&gt;ok = true;</div><div class='ctx'> 				imm_value = tsr-&gt;imm_value;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -291,6 +293,19 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 		else</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='add'>+		/* Ignore add to non-pointer or non-const types */</div><div class='add'>+		if (tsr-&gt;kind == TSR_KIND_POINTER ||</div><div class='add'>+		    (dwarf_tag(&amp;tsr-&gt;type) == DW_TAG_pointer_type &amp;&amp;</div><div class='add'>+		     src-&gt;reg1 != DWARF_REG_PC &amp;&amp; tsr-&gt;kind == TSR_KIND_TYPE &amp;&amp; !dst-&gt;mem_ref)) {</div><div class='add'>+			tsr-&gt;offset += imm_value;</div><div class='add'>+			pr_debug_dtp("add [%x] offset %#"PRIx64" to reg%d",</div><div class='add'>+				     insn_offset, imm_value, dst-&gt;reg1);</div><div class='add'>+			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (tsr-&gt;kind == TSR_KIND_CONST)</div><div class='add'>+			tsr-&gt;imm_value += imm_value;</div><div class='add'>+</div><div class='ctx'> 		if (tsr-&gt;kind != TSR_KIND_PERCPU_BASE)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -301,7 +316,8 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 			 * as a pointer.</div><div class='ctx'> 			 */</div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='del'>-			tsr-&gt;kind = TSR_KIND_POINTER;</div><div class='add'>+			tsr-&gt;kind = TSR_KIND_PERCPU_POINTER;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("add [%x] percpu %#"PRIx64" -&gt; reg%d",</div><div class='hunk'>@@ -311,6 +327,135 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!strncmp(dl-&gt;ins.name, "sub", 3)) {</div><div class='add'>+		u64 imm_value = -1ULL;</div><div class='add'>+</div><div class='add'>+		if (!has_reg_type(state, dst-&gt;reg1))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		tsr = &amp;state-&gt;regs[dst-&gt;reg1];</div><div class='add'>+		tsr-&gt;copied_from = -1;</div><div class='add'>+</div><div class='add'>+		if (src-&gt;imm)</div><div class='add'>+			imm_value = src-&gt;offset;</div><div class='add'>+		else if (has_reg_type(state, src-&gt;reg1) &amp;&amp;</div><div class='add'>+			 state-&gt;regs[src-&gt;reg1].kind == TSR_KIND_CONST)</div><div class='add'>+			imm_value = state-&gt;regs[src-&gt;reg1].imm_value;</div><div class='add'>+</div><div class='add'>+		if (tsr-&gt;kind == TSR_KIND_POINTER ||</div><div class='add'>+		    (dwarf_tag(&amp;tsr-&gt;type) == DW_TAG_pointer_type &amp;&amp;</div><div class='add'>+		     src-&gt;reg1 != DWARF_REG_PC &amp;&amp; tsr-&gt;kind == TSR_KIND_TYPE &amp;&amp; !dst-&gt;mem_ref)) {</div><div class='add'>+			tsr-&gt;offset -= imm_value;</div><div class='add'>+			pr_debug_dtp("sub [%x] offset %#"PRIx64" to reg%d",</div><div class='add'>+				     insn_offset, imm_value, dst-&gt;reg1);</div><div class='add'>+			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (tsr-&gt;kind == TSR_KIND_CONST)</div><div class='add'>+			tsr-&gt;imm_value -= imm_value;</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!strncmp(dl-&gt;ins.name, "lea", 3)) {</div><div class='add'>+		int sreg = src-&gt;reg1;</div><div class='add'>+		struct type_state_reg src_tsr;</div><div class='add'>+</div><div class='add'>+		if (!has_reg_type(state, sreg) ||</div><div class='add'>+		    !has_reg_type(state, dst-&gt;reg1) ||</div><div class='add'>+		    !src-&gt;mem_ref)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		src_tsr = state-&gt;regs[sreg];</div><div class='add'>+		tsr = &amp;state-&gt;regs[dst-&gt;reg1];</div><div class='add'>+</div><div class='add'>+		tsr-&gt;copied_from = -1;</div><div class='add'>+		tsr-&gt;ok = false;</div><div class='add'>+</div><div class='add'>+		/* Case 1: Based on stack pointer or frame pointer */</div><div class='add'>+		if (sreg == fbreg || sreg == state-&gt;stack_reg) {</div><div class='add'>+			struct type_state_stack *stack;</div><div class='add'>+			int offset = src-&gt;offset - fboff;</div><div class='add'>+</div><div class='add'>+			stack = find_stack_state(state, offset);</div><div class='add'>+			if (!stack)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			tsr-&gt;type = stack-&gt;type;</div><div class='add'>+			tsr-&gt;kind = TSR_KIND_POINTER;</div><div class='add'>+			tsr-&gt;offset = offset - stack-&gt;offset;</div><div class='add'>+			tsr-&gt;ok = true;</div><div class='add'>+</div><div class='add'>+			if (sreg == fbreg) {</div><div class='add'>+				pr_debug_dtp("lea [%x] address of -%#x(stack) -&gt; reg%d",</div><div class='add'>+					     insn_offset, -src-&gt;offset, dst-&gt;reg1);</div><div class='add'>+			} else {</div><div class='add'>+				pr_debug_dtp("lea [%x] address of %#x(reg%d) -&gt; reg%d",</div><div class='add'>+					     insn_offset, src-&gt;offset, sreg, dst-&gt;reg1);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='add'>+		}</div><div class='add'>+		/* Case 2: Based on a register holding a typed pointer */</div><div class='add'>+		else if (src_tsr.ok &amp;&amp; (src_tsr.kind == TSR_KIND_POINTER ||</div><div class='add'>+			 (dwarf_tag(&amp;src_tsr.type) == DW_TAG_pointer_type &amp;&amp;</div><div class='add'>+			  src_tsr.kind == TSR_KIND_TYPE))) {</div><div class='add'>+</div><div class='add'>+			if (src_tsr.kind == TSR_KIND_TYPE &amp;&amp;</div><div class='add'>+			    __die_get_real_type(&amp;state-&gt;regs[sreg].type, &amp;type_die) == NULL)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			if (src_tsr.kind == TSR_KIND_POINTER)</div><div class='add'>+				type_die = state-&gt;regs[sreg].type;</div><div class='add'>+</div><div class='add'>+			/* Check if the target type has a member at the new offset */</div><div class='add'>+			if (die_get_member_type(&amp;type_die,</div><div class='add'>+						src-&gt;offset + src_tsr.offset, &amp;type_die) == NULL)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			tsr-&gt;type = src_tsr.type;</div><div class='add'>+			tsr-&gt;kind = src_tsr.kind;</div><div class='add'>+			tsr-&gt;offset = src-&gt;offset + src_tsr.offset;</div><div class='add'>+			tsr-&gt;ok = true;</div><div class='add'>+</div><div class='add'>+			pr_debug_dtp("lea [%x] address of %s%#x(reg%d) -&gt; reg%d",</div><div class='add'>+						insn_offset, src-&gt;offset &lt; 0 ? "-" : "",</div><div class='add'>+						abs(src-&gt;offset), sreg, dst-&gt;reg1);</div><div class='add'>+</div><div class='add'>+			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Invalidate register states for other ops which may change pointers */</div><div class='add'>+	if (has_reg_type(state, dst-&gt;reg1) &amp;&amp; !dst-&gt;mem_ref &amp;&amp;</div><div class='add'>+	    dwarf_tag(&amp;state-&gt;regs[dst-&gt;reg1].type) == DW_TAG_pointer_type) {</div><div class='add'>+		if (!strncmp(dl-&gt;ins.name, "imul", 4) || !strncmp(dl-&gt;ins.name, "mul", 3) ||</div><div class='add'>+		    !strncmp(dl-&gt;ins.name, "idiv", 4) || !strncmp(dl-&gt;ins.name, "div", 3) ||</div><div class='add'>+		    !strncmp(dl-&gt;ins.name, "shl", 3)  || !strncmp(dl-&gt;ins.name, "shr", 3) ||</div><div class='add'>+		    !strncmp(dl-&gt;ins.name, "sar", 3)  || !strncmp(dl-&gt;ins.name, "and", 3) ||</div><div class='add'>+		    !strncmp(dl-&gt;ins.name, "or", 2)   || !strncmp(dl-&gt;ins.name, "neg", 3) ||</div><div class='add'>+		    !strncmp(dl-&gt;ins.name, "inc", 3)  || !strncmp(dl-&gt;ins.name, "dec", 3)) {</div><div class='add'>+			pr_debug_dtp("%s [%x] invalidate reg%d\n",</div><div class='add'>+						dl-&gt;ins.name, insn_offset, dst-&gt;reg1);</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].ok = false;</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].copied_from = -1;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!strncmp(dl-&gt;ins.name, "xor", 3) &amp;&amp; dst-&gt;reg1 == src-&gt;reg1) {</div><div class='add'>+			/* xor reg, reg clears the register */</div><div class='add'>+			pr_debug_dtp("xor [%x] clear reg%d\n",</div><div class='add'>+				     insn_offset, dst-&gt;reg1);</div><div class='add'>+</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].kind = TSR_KIND_CONST;</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].imm_value = 0;</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].ok = true;</div><div class='add'>+			state-&gt;regs[dst-&gt;reg1].copied_from = -1;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (strncmp(dl-&gt;ins.name, "mov", 3))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -345,6 +490,7 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> </div><div class='ctx'> 			if (var_addr == 40) {</div><div class='ctx'> 				tsr-&gt;kind = TSR_KIND_CANARY;</div><div class='add'>+				tsr-&gt;offset = 0;</div><div class='ctx'> 				tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 				pr_debug_dtp("mov [%x] stack canary -&gt; reg%d\n",</div><div class='hunk'>@@ -361,6 +507,7 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> </div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("mov [%x] this-cpu addr=%#"PRIx64" -&gt; reg%d",</div><div class='hunk'>@@ -372,6 +519,7 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 		if (src-&gt;imm) {</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_CONST;</div><div class='ctx'> 			tsr-&gt;imm_value = src-&gt;offset;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("mov [%x] imm=%#x -&gt; reg%d\n",</div><div class='hunk'>@@ -388,10 +536,11 @@ static void update_insn_state_x86(struct type_state *state,</div><div class='ctx'> 		tsr-&gt;type = state-&gt;regs[src-&gt;reg1].type;</div><div class='ctx'> 		tsr-&gt;kind = state-&gt;regs[src-&gt;reg1].kind;</div><div class='ctx'> 		tsr-&gt;imm_value = state-&gt;regs[src-&gt;reg1].imm_value;</div><div class='add'>+		tsr-&gt;offset = state-&gt;regs[src-&gt;reg1].offset;</div><div class='ctx'> 		tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 		/* To copy back the variable type later (hopefully) */</div><div class='del'>-		if (tsr-&gt;kind == TSR_KIND_TYPE)</div><div class='add'>+		if (tsr-&gt;kind == TSR_KIND_TYPE || tsr-&gt;kind == TSR_KIND_POINTER)</div><div class='ctx'> 			tsr-&gt;copied_from = src-&gt;reg1;</div><div class='ctx'> </div><div class='ctx'> 		pr_debug_dtp("mov [%x] reg%d -&gt; reg%d",</div><div class='hunk'>@@ -421,12 +570,14 @@ retry:</div><div class='ctx'> 			} else if (!stack-&gt;compound) {</div><div class='ctx'> 				tsr-&gt;type = stack-&gt;type;</div><div class='ctx'> 				tsr-&gt;kind = stack-&gt;kind;</div><div class='add'>+				tsr-&gt;offset = stack-&gt;ptr_offset;</div><div class='ctx'> 				tsr-&gt;ok = true;</div><div class='ctx'> 			} else if (die_get_member_type(&amp;stack-&gt;type,</div><div class='ctx'> 						       offset - stack-&gt;offset,</div><div class='ctx'> 						       &amp;type_die)) {</div><div class='ctx'> 				tsr-&gt;type = type_die;</div><div class='ctx'> 				tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+				tsr-&gt;offset = 0;</div><div class='ctx'> 				tsr-&gt;ok = true;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				tsr-&gt;ok = false;</div><div class='hunk'>@@ -446,15 +597,30 @@ retry:</div><div class='ctx'> 		else if (has_reg_type(state, sreg) &amp;&amp; state-&gt;regs[sreg].ok &amp;&amp;</div><div class='ctx'> 			 state-&gt;regs[sreg].kind == TSR_KIND_TYPE &amp;&amp;</div><div class='ctx'> 			 die_deref_ptr_type(&amp;state-&gt;regs[sreg].type,</div><div class='del'>-					    src-&gt;offset, &amp;type_die)) {</div><div class='add'>+					    src-&gt;offset + state-&gt;regs[sreg].offset, &amp;type_die)) {</div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("mov [%x] %#x(reg%d) -&gt; reg%d",</div><div class='ctx'> 				     insn_offset, src-&gt;offset, sreg, dst-&gt;reg1);</div><div class='ctx'> 			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='ctx'> 		}</div><div class='add'>+		/* Handle dereference of TSR_KIND_POINTER registers */</div><div class='add'>+		else if (has_reg_type(state, sreg) &amp;&amp; state-&gt;regs[sreg].ok &amp;&amp;</div><div class='add'>+			 state-&gt;regs[sreg].kind == TSR_KIND_POINTER &amp;&amp;</div><div class='add'>+			 die_get_member_type(&amp;state-&gt;regs[sreg].type,</div><div class='add'>+					     src-&gt;offset + state-&gt;regs[sreg].offset, &amp;type_die)) {</div><div class='add'>+			tsr-&gt;type = state-&gt;regs[sreg].type;</div><div class='add'>+			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = src-&gt;offset + state-&gt;regs[sreg].offset;</div><div class='add'>+			tsr-&gt;ok = true;</div><div class='add'>+</div><div class='add'>+			pr_debug_dtp("mov [%x] addr %#x(reg%d) -&gt; reg%d",</div><div class='add'>+				     insn_offset, src-&gt;offset, sreg, dst-&gt;reg1);</div><div class='add'>+			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='add'>+		}</div><div class='ctx'> 		/* Or check if it's a global variable */</div><div class='ctx'> 		else if (sreg == DWARF_REG_PC) {</div><div class='ctx'> 			struct map_symbol *ms = dloc-&gt;ms;</div><div class='hunk'>@@ -473,6 +639,7 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("mov [%x] global addr=%"PRIx64" -&gt; reg%d",</div><div class='hunk'>@@ -504,6 +671,7 @@ retry:</div><div class='ctx'> 			    die_get_member_type(&amp;type_die, offset, &amp;type_die)) {</div><div class='ctx'> 				tsr-&gt;type = type_die;</div><div class='ctx'> 				tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+				tsr-&gt;offset = 0;</div><div class='ctx'> 				tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 				if (src-&gt;multi_regs) {</div><div class='hunk'>@@ -521,11 +689,12 @@ retry:</div><div class='ctx'> 		}</div><div class='ctx'> 		/* And then dereference the calculated pointer if it has one */</div><div class='ctx'> 		else if (has_reg_type(state, sreg) &amp;&amp; state-&gt;regs[sreg].ok &amp;&amp;</div><div class='del'>-			 state-&gt;regs[sreg].kind == TSR_KIND_POINTER &amp;&amp;</div><div class='add'>+			 state-&gt;regs[sreg].kind == TSR_KIND_PERCPU_POINTER &amp;&amp;</div><div class='ctx'> 			 die_get_member_type(&amp;state-&gt;regs[sreg].type,</div><div class='ctx'> 					     src-&gt;offset, &amp;type_die)) {</div><div class='ctx'> 			tsr-&gt;type = type_die;</div><div class='ctx'> 			tsr-&gt;kind = TSR_KIND_TYPE;</div><div class='add'>+			tsr-&gt;offset = 0;</div><div class='ctx'> 			tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug_dtp("mov [%x] pointer %#x(reg%d) -&gt; reg%d",</div><div class='hunk'>@@ -548,6 +717,7 @@ retry:</div><div class='ctx'> 							&amp;var_name, &amp;offset) &amp;&amp;</div><div class='ctx'> 				    !strcmp(var_name, "__per_cpu_offset")) {</div><div class='ctx'> 					tsr-&gt;kind = TSR_KIND_PERCPU_BASE;</div><div class='add'>+					tsr-&gt;offset = 0;</div><div class='ctx'> 					tsr-&gt;ok = true;</div><div class='ctx'> </div><div class='ctx'> 					pr_debug_dtp("mov [%x] percpu base reg%d\n",</div><div class='hunk'>@@ -583,10 +753,10 @@ retry:</div><div class='ctx'> 				 */</div><div class='ctx'> 				if (!stack-&gt;compound)</div><div class='ctx'> 					set_stack_state(stack, offset, tsr-&gt;kind,</div><div class='del'>-							&amp;tsr-&gt;type);</div><div class='add'>+							&amp;tsr-&gt;type, tsr-&gt;offset);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				findnew_stack_state(state, offset, tsr-&gt;kind,</div><div class='del'>-						    &amp;tsr-&gt;type);</div><div class='add'>+						    &amp;tsr-&gt;type, tsr-&gt;offset);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (dst-&gt;reg1 == fbreg) {</div><div class='hunk'>@@ -596,6 +766,11 @@ retry:</div><div class='ctx'> 				pr_debug_dtp("mov [%x] reg%d -&gt; %#x(reg%d)",</div><div class='ctx'> 					     insn_offset, src-&gt;reg1, offset, dst-&gt;reg1);</div><div class='ctx'> 			}</div><div class='add'>+			if (tsr-&gt;offset != 0) {</div><div class='add'>+				pr_debug_dtp(" reg%d offset %#x -&gt;",</div><div class='add'>+					src-&gt;reg1, tsr-&gt;offset);</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			pr_debug_type_name(&amp;tsr-&gt;type, tsr-&gt;kind);</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl b/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl<br/>index ac007ea00979..4877e16da69a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/entry/syscalls/syscall_32.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/entry/syscalls/syscall_32.tbl</a></div><div class='hunk'>@@ -473,3 +473,5 @@</div><div class='ctx'> 465	i386	listxattrat		sys_listxattrat</div><div class='ctx'> 466	i386	removexattrat		sys_removexattrat</div><div class='ctx'> 467	i386	open_tree_attr		sys_open_tree_attr</div><div class='add'>+468	i386	file_getattr		sys_file_getattr</div><div class='add'>+469	i386	file_setattr		sys_file_setattr</div><div class='head'>diff --git a/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl b/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl<br/>index cfb5ca41e30d..ced2a1deecd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/entry/syscalls/syscall_64.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/entry/syscalls/syscall_64.tbl</a></div><div class='hunk'>@@ -345,6 +345,7 @@</div><div class='ctx'> 333	common	io_pgetevents		sys_io_pgetevents</div><div class='ctx'> 334	common	rseq			sys_rseq</div><div class='ctx'> 335	common	uretprobe		sys_uretprobe</div><div class='add'>+336	common	uprobe			sys_uprobe</div><div class='ctx'> # don't use numbers 387 through 423, add new calls after the last</div><div class='ctx'> # 'common' entry</div><div class='ctx'> 424	common	pidfd_send_signal	sys_pidfd_send_signal</div><div class='hunk'>@@ -391,6 +392,8 @@</div><div class='ctx'> 465	common	listxattrat		sys_listxattrat</div><div class='ctx'> 466	common	removexattrat		sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr		sys_open_tree_attr</div><div class='add'>+468	common	file_getattr		sys_file_getattr</div><div class='add'>+469	common	file_setattr		sys_file_setattr</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Due to a historical design error, certain syscalls are numbered differently</div><div class='head'>diff --git a/tools/perf/arch/x86/tests/Build b/tools/perf/arch/x86/tests/Build<br/>index 7790b3e20f4e..b017d1ca6e3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/tests/Build</a></div><div class='hunk'>@@ -3,9 +3,9 @@ perf-test-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o</div><div class='ctx'> </div><div class='ctx'> perf-test-y += arch-tests.o</div><div class='ctx'> perf-test-y += hybrid.o</div><div class='del'>-perf-test-$(CONFIG_AUXTRACE) += intel-pt-test.o</div><div class='add'>+perf-test-y += intel-pt-test.o</div><div class='ctx'> ifeq ($(CONFIG_EXTRA_TESTS),y)</div><div class='del'>-perf-test-$(CONFIG_AUXTRACE) += insn-x86.o</div><div class='add'>+perf-test-y += insn-x86.o</div><div class='ctx'> endif</div><div class='ctx'> perf-test-$(CONFIG_X86_64) += bp-modify.o</div><div class='ctx'> perf-test-y += amd-ibs-via-core-pmu.o</div><div class='head'>diff --git a/tools/perf/arch/x86/tests/arch-tests.c b/tools/perf/arch/x86/tests/arch-tests.c<br/>index 8f9cfeaa170f..c3e1619c5e79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/arch-tests.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/arch-tests.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/arch-tests.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/tests/arch-tests.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #include "tests/tests.h"</div><div class='ctx'> #include "arch-tests.h"</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='ctx'> #ifdef HAVE_EXTRA_TESTS</div><div class='ctx'> DEFINE_SUITE("x86 instruction decoder - new instructions", insn_x86);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -19,7 +18,6 @@ struct test_suite suite__intel_pt = {</div><div class='ctx'> 	.test_cases = intel_pt_tests,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='ctx'> #if defined(__x86_64__)</div><div class='ctx'> DEFINE_SUITE("x86 bp modify", bp_modify);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -39,12 +37,10 @@ struct test_suite *arch_tests[] = {</div><div class='ctx'> #ifdef HAVE_DWARF_UNWIND_SUPPORT</div><div class='ctx'> 	&amp;suite__dwarf_unwind,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='ctx'> #ifdef HAVE_EXTRA_TESTS</div><div class='ctx'> 	&amp;suite__insn_x86,</div><div class='ctx'> #endif</div><div class='ctx'> 	&amp;suite__intel_pt,</div><div class='del'>-#endif</div><div class='ctx'> #if defined(__x86_64__)</div><div class='ctx'> 	&amp;suite__bp_modify,</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/perf/arch/x86/tests/intel-pt-test.c b/tools/perf/arch/x86/tests/intel-pt-test.c<br/>index b217ed67cd4e..970997759ec2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/intel-pt-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/intel-pt-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/intel-pt-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/tests/intel-pt-test.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='del'>-#include &lt;cpuid.h&gt;</div><div class='ctx'> #include &lt;sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "intel-pt-decoder/intel-pt-pkt-decoder.h"</div><div class='hunk'>@@ -11,6 +10,7 @@</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "tests/tests.h"</div><div class='ctx'> #include "arch-tests.h"</div><div class='add'>+#include "../util/cpuid.h"</div><div class='ctx'> #include "cpumap.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -363,7 +363,7 @@ static int get_pt_caps(int cpu, struct pt_caps *caps)</div><div class='ctx'> 	memset(caps, 0, sizeof(*caps));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; INTEL_PT_SUBLEAF_CNT; i++) {</div><div class='del'>-		__get_cpuid_count(20, i, &amp;r.eax, &amp;r.ebx, &amp;r.ecx, &amp;r.edx);</div><div class='add'>+		cpuid(20, i, &amp;r.eax, &amp;r.ebx, &amp;r.ecx, &amp;r.edx);</div><div class='ctx'> 		pr_debug("CPU %d CPUID leaf 20 subleaf %d\n", cpu, i);</div><div class='ctx'> 		pr_debug("eax = 0x%08x\n", r.eax);</div><div class='ctx'> 		pr_debug("ebx = 0x%08x\n", r.ebx);</div><div class='hunk'>@@ -380,7 +380,7 @@ static bool is_hybrid(void)</div><div class='ctx'> 	unsigned int eax, ebx, ecx, edx = 0;</div><div class='ctx'> 	bool result;</div><div class='ctx'> </div><div class='del'>-	__get_cpuid_count(7, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	cpuid(7, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='ctx'> 	result = edx &amp; BIT(15);</div><div class='ctx'> 	pr_debug("Is %shybrid : CPUID leaf 7 subleaf 0 edx %#x (bit-15 indicates hybrid)\n",</div><div class='ctx'> 		 result ? "" : "not ", edx);</div><div class='head'>diff --git a/tools/perf/arch/x86/tests/topdown.c b/tools/perf/arch/x86/tests/topdown.c<br/>index 8d0ea7a4bbc1..3ee4e5e71be3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/topdown.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/tests/topdown.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/tests/topdown.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/tests/topdown.c</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include "arch-tests.h"</div><div class='ctx'> #include "../util/topdown.h"</div><div class='add'>+#include "debug.h"</div><div class='ctx'> #include "evlist.h"</div><div class='ctx'> #include "parse-events.h"</div><div class='ctx'> #include "pmu.h"</div><div class='head'>diff --git a/tools/perf/arch/x86/util/Build b/tools/perf/arch/x86/util/Build<br/>index 06d7c0205b3d..c0dc5965f362 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/Build</a></div><div class='hunk'>@@ -14,7 +14,7 @@ perf-util-y += iostat.o</div><div class='ctx'> perf-util-$(CONFIG_LOCAL_LIBUNWIND)    += unwind-libunwind.o</div><div class='ctx'> perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o</div><div class='ctx'> </div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += auxtrace.o</div><div class='add'>+perf-util-y += auxtrace.o</div><div class='ctx'> perf-util-y += archinsn.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += intel-pt.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += intel-bts.o</div><div class='add'>+perf-util-y += intel-pt.o</div><div class='add'>+perf-util-y += intel-bts.o</div><div class='head'>diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c<br/>index 9bc80fff3aa0..23a8e662a912 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/evsel.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/evsel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/evsel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/evsel.c</a></div><div class='hunk'>@@ -1,10 +1,15 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='add'>+#include "util/evlist.h"</div><div class='ctx'> #include "util/evsel.h"</div><div class='add'>+#include "util/evsel_config.h"</div><div class='ctx'> #include "util/env.h"</div><div class='ctx'> #include "util/pmu.h"</div><div class='ctx'> #include "util/pmus.h"</div><div class='add'>+#include "util/stat.h"</div><div class='add'>+#include "util/strbuf.h"</div><div class='ctx'> #include "linux/string.h"</div><div class='ctx'> #include "topdown.h"</div><div class='ctx'> #include "evsel.h"</div><div class='hunk'>@@ -67,6 +72,57 @@ int arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size)</div><div class='ctx'> 			 event_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void arch_evsel__apply_ratio_to_prev(struct evsel *evsel,</div><div class='add'>+				struct perf_event_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct perf_event_attr *prev_attr = NULL;</div><div class='add'>+	struct evsel *evsel_prev = NULL;</div><div class='add'>+	const char *name = "acr_mask";</div><div class='add'>+	int evsel_idx = 0;</div><div class='add'>+	__u64 ev_mask, pr_ev_mask;</div><div class='add'>+</div><div class='add'>+	if (!perf_pmu__has_format(evsel-&gt;pmu, name)) {</div><div class='add'>+		pr_err("'%s' does not have acr_mask format support\n", evsel-&gt;pmu-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (perf_pmu__format_type(evsel-&gt;pmu, name) !=</div><div class='add'>+			PERF_PMU_FORMAT_VALUE_CONFIG2) {</div><div class='add'>+		pr_err("'%s' does not have config2 format support\n", evsel-&gt;pmu-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	evsel_prev = evsel__prev(evsel);</div><div class='add'>+	if (!evsel_prev) {</div><div class='add'>+		pr_err("Previous event does not exist.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prev_attr = &amp;evsel_prev-&gt;core.attr;</div><div class='add'>+</div><div class='add'>+	if (prev_attr-&gt;config2) {</div><div class='add'>+		pr_err("'%s' has set config2 (acr_mask?) already, configuration not supported\n", evsel_prev-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * acr_mask (config2) is calculated using the event's index in</div><div class='add'>+	 * the event group. The first event will use the index of the</div><div class='add'>+	 * second event as its mask (e.g., 0x2), indicating that the</div><div class='add'>+	 * second event counter will be reset and a sample taken for</div><div class='add'>+	 * the first event if its counter overflows. The second event</div><div class='add'>+	 * will use the mask consisting of the first and second bits</div><div class='add'>+	 * (e.g., 0x3), meaning both counters will be reset if the</div><div class='add'>+	 * second event counter overflows.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	evsel_idx = evsel__group_idx(evsel);</div><div class='add'>+	ev_mask = 1ull &lt;&lt; evsel_idx;</div><div class='add'>+	pr_ev_mask = 1ull &lt;&lt; (evsel_idx - 1);</div><div class='add'>+</div><div class='add'>+	prev_attr-&gt;config2 = ev_mask;</div><div class='add'>+	attr-&gt;config2 = ev_mask | pr_ev_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ibs_l3miss_warn(void)</div><div class='ctx'> {</div><div class='ctx'> 	pr_warning(</div><div class='hunk'>@@ -102,13 +158,15 @@ void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int arch_evsel__open_strerror(struct evsel *evsel, char *msg, size_t size)</div><div class='add'>+static int amd_evsel__open_strerror(struct evsel *evsel, char *msg, size_t size)</div><div class='ctx'> {</div><div class='del'>-	if (!x86__is_amd_cpu())</div><div class='add'>+	struct perf_pmu *pmu;</div><div class='add'>+</div><div class='add'>+	if (evsel-&gt;core.attr.precise_ip == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!evsel-&gt;core.attr.precise_ip &amp;&amp;</div><div class='del'>-	    !(evsel-&gt;pmu &amp;&amp; !strncmp(evsel-&gt;pmu-&gt;name, "ibs", 3)))</div><div class='add'>+	pmu = evsel__find_pmu(evsel);</div><div class='add'>+	if (!pmu || strncmp(pmu-&gt;name, "ibs", 3))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* More verbose IBS errors. */</div><div class='hunk'>@@ -118,6 +176,54 @@ int arch_evsel__open_strerror(struct evsel *evsel, char *msg, size_t size)</div><div class='ctx'> 		return scnprintf(msg, size, "AMD IBS doesn't support privilege filtering. Try "</div><div class='ctx'> 				 "again without the privilege modifiers (like 'k') at the end.");</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_evsel__open_strerror(struct evsel *evsel, int err, char *msg, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct strbuf sb = STRBUF_INIT;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (err != EINVAL)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='add'>+	if (!topdown_sys_has_perf_metrics())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (arch_is_topdown_slots(evsel)) {</div><div class='add'>+		if (!evsel__is_group_leader(evsel)) {</div><div class='add'>+			evlist__uniquify_evsel_names(evsel-&gt;evlist, &amp;stat_config);</div><div class='add'>+			evlist__format_evsels(evsel-&gt;evlist, &amp;sb, 2048);</div><div class='add'>+			ret = scnprintf(msg, size, "Topdown slots event can only be group leader "</div><div class='add'>+					"in '%s'.", sb.buf);</div><div class='add'>+			strbuf_release(&amp;sb);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else if (arch_is_topdown_metrics(evsel)) {</div><div class='add'>+		struct evsel *pos;</div><div class='add'>+</div><div class='add'>+		evlist__for_each_entry(evsel-&gt;evlist, pos) {</div><div class='add'>+			if (pos == evsel || !arch_is_topdown_metrics(pos))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (pos-&gt;core.attr.config != evsel-&gt;core.attr.config)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			evlist__uniquify_evsel_names(evsel-&gt;evlist, &amp;stat_config);</div><div class='add'>+			evlist__format_evsels(evsel-&gt;evlist, &amp;sb, 2048);</div><div class='add'>+			ret = scnprintf(msg, size, "Perf metric event '%s' is duplicated "</div><div class='add'>+					"in the same group (only one event is allowed) in '%s'.",</div><div class='add'>+					evsel__name(evsel), sb.buf);</div><div class='add'>+			strbuf_release(&amp;sb);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int arch_evsel__open_strerror(struct evsel *evsel, int err, char *msg, size_t size)</div><div class='add'>+{</div><div class='add'>+	return x86__is_amd_cpu()</div><div class='add'>+		? amd_evsel__open_strerror(evsel, msg, size)</div><div class='add'>+		: intel_evsel__open_strerror(evsel, err, msg, size);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c<br/>index add33cb5d1da..b394ad9cc635 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/intel-pt.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/intel-pt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/intel-pt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/intel-pt.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;cpuid.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../../../util/session.h"</div><div class='ctx'> #include "../../../util/event.h"</div><div class='hunk'>@@ -34,6 +33,7 @@</div><div class='ctx'> #include &lt;internal/lib.h&gt; // page_size</div><div class='ctx'> #include "../../../util/intel-pt.h"</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='add'>+#include "cpuid.h"</div><div class='ctx'> </div><div class='ctx'> #define KiB(x) ((x) * 1024)</div><div class='ctx'> #define MiB(x) ((x) * 1024 * 1024)</div><div class='hunk'>@@ -72,7 +72,7 @@ static int intel_pt_parse_terms_with_default(const struct perf_pmu *pmu,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	parse_events_terms__init(&amp;terms);</div><div class='del'>-	err = parse_events_terms(&amp;terms, str, /*input=*/ NULL);</div><div class='add'>+	err = parse_events_terms(&amp;terms, str);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> </div><div class='hunk'>@@ -311,7 +311,7 @@ static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;</div><div class='ctx'> </div><div class='del'>-	__get_cpuid(0x15, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	cpuid(0x15, 0, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='ctx'> 	*n = ebx;</div><div class='ctx'> 	*d = eax;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/arch/x86/util/kvm-stat.c b/tools/perf/arch/x86/util/kvm-stat.c<br/>index 424716518b75..bff36f9345ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/kvm-stat.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/kvm-stat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/kvm-stat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/kvm-stat.c</a></div><div class='hunk'>@@ -3,9 +3,11 @@</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include "../../../util/kvm-stat.h"</div><div class='ctx'> #include "../../../util/evsel.h"</div><div class='add'>+#include "../../../util/env.h"</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='ctx'> #include &lt;asm/vmx.h&gt;</div><div class='ctx'> #include &lt;asm/kvm.h&gt;</div><div class='add'>+#include &lt;subcmd/parse-options.h&gt;</div><div class='ctx'> </div><div class='ctx'> define_exit_reasons_table(vmx_exit_reasons, VMX_EXIT_REASONS);</div><div class='ctx'> define_exit_reasons_table(svm_exit_reasons, SVM_EXIT_REASONS);</div><div class='hunk'>@@ -211,3 +213,52 @@ int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * After KVM supports PEBS for guest on Intel platforms</div><div class='add'>+ * (https://lore.kernel.org/all/20220411101946.20262-1-likexu@tencent.com/),</div><div class='add'>+ * host loses the capability to sample guest with PEBS since all PEBS related</div><div class='add'>+ * MSRs are switched to guest value after vm-entry, like IA32_DS_AREA MSR is</div><div class='add'>+ * switched to guest GVA at vm-entry. This would lead to "perf kvm record"</div><div class='add'>+ * fails to sample guest on Intel platforms since "cycles:P" event is used to</div><div class='add'>+ * sample guest by default.</div><div class='add'>+ *</div><div class='add'>+ * So, to avoid this issue explicitly use "cycles" instead of "cycles:P" event</div><div class='add'>+ * by default to sample guest on Intel platforms.</div><div class='add'>+ */</div><div class='add'>+int kvm_add_default_arch_event(int *argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	const char **tmp;</div><div class='add'>+	bool event = false;</div><div class='add'>+	int ret = 0, i, j = *argc;</div><div class='add'>+</div><div class='add'>+	const struct option event_options[] = {</div><div class='add'>+		OPT_BOOLEAN('e', "event", &amp;event, NULL),</div><div class='add'>+		OPT_BOOLEAN(0, "pfm-events", &amp;event, NULL),</div><div class='add'>+		OPT_END()</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!x86__is_intel_cpu())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tmp = calloc(j + 1, sizeof(char *));</div><div class='add'>+	if (!tmp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; j; i++)</div><div class='add'>+		tmp[i] = argv[i];</div><div class='add'>+</div><div class='add'>+	parse_options(j, tmp, event_options, NULL, PARSE_OPT_KEEP_UNKNOWN);</div><div class='add'>+	if (!event) {</div><div class='add'>+		argv[j++] = STRDUP_FAIL_EXIT("-e");</div><div class='add'>+		argv[j++] = STRDUP_FAIL_EXIT("cycles");</div><div class='add'>+		*argc += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(tmp);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	free(tmp);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/arch/x86/util/pmu.c b/tools/perf/arch/x86/util/pmu.c<br/>index 58113482654b..a3f96221758d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/pmu.c</a></div><div class='hunk'>@@ -273,7 +273,6 @@ void perf_pmu__arch_init(struct perf_pmu *pmu)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_pmu_caps *ldlat_cap;</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='ctx'> 	if (!strcmp(pmu-&gt;name, INTEL_PT_PMU_NAME)) {</div><div class='ctx'> 		pmu-&gt;auxtrace = true;</div><div class='ctx'> 		pmu-&gt;selectable = true;</div><div class='hunk'>@@ -283,7 +282,6 @@ void perf_pmu__arch_init(struct perf_pmu *pmu)</div><div class='ctx'> 		pmu-&gt;auxtrace = true;</div><div class='ctx'> 		pmu-&gt;selectable = true;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	if (x86__is_amd_cpu()) {</div><div class='ctx'> 		if (strcmp(pmu-&gt;name, "ibs_op"))</div><div class='head'>diff --git a/tools/perf/arch/x86/util/topdown.c b/tools/perf/arch/x86/util/topdown.c<br/>index 0d01b662627a..bafd285119d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/topdown.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/x86/util/topdown.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/x86/util/topdown.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/x86/util/topdown.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include "util/evlist.h"</div><div class='ctx'> #include "util/pmu.h"</div><div class='ctx'> #include "util/pmus.h"</div><div class='head'>diff --git a/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl b/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl<br/>index f657a77314f8..374e4cb788d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/arch/xtensa/entry/syscalls/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/arch/xtensa/entry/syscalls/syscall.tbl</a></div><div class='hunk'>@@ -438,3 +438,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/perf/bench/bench.h b/tools/perf/bench/bench.h<br/>index 9f736423af53..8519eb5a42fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/bench.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/bench.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/bench.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/bench.h</a></div><div class='hunk'>@@ -28,6 +28,7 @@ int bench_syscall_fork(int argc, const char **argv);</div><div class='ctx'> int bench_syscall_execve(int argc, const char **argv);</div><div class='ctx'> int bench_mem_memcpy(int argc, const char **argv);</div><div class='ctx'> int bench_mem_memset(int argc, const char **argv);</div><div class='add'>+int bench_mem_mmap(int argc, const char **argv);</div><div class='ctx'> int bench_mem_find_bit(int argc, const char **argv);</div><div class='ctx'> int bench_futex_hash(int argc, const char **argv);</div><div class='ctx'> int bench_futex_wake(int argc, const char **argv);</div><div class='head'>diff --git a/tools/perf/bench/evlist-open-close.c b/tools/perf/bench/evlist-open-close.c<br/>index bfaf50e4e519..faf9c34b4a5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/evlist-open-close.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/evlist-open-close.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/evlist-open-close.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/evlist-open-close.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='head'>diff --git a/tools/perf/bench/find-bit-bench.c b/tools/perf/bench/find-bit-bench.c<br/>index 7e25b0e413f6..e697c20951bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/find-bit-bench.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/find-bit-bench.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/find-bit-bench.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/find-bit-bench.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@ static noinline void workload(int val)</div><div class='ctx'> 	accumulator++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if (defined(__i386__) || defined(__x86_64__)) &amp;&amp; defined(__GCC_ASM_FLAG_OUTPUTS__)</div><div class='add'>+#if defined(__i386__) || defined(__x86_64__)</div><div class='ctx'> static bool asm_test_bit(long nr, const unsigned long *addr)</div><div class='ctx'> {</div><div class='ctx'> 	bool oldbit;</div><div class='head'>diff --git a/tools/perf/bench/futex.c b/tools/perf/bench/futex.c<br/>index 1481196a22f0..1968c9d00b5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/futex.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/futex.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/futex.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/futex.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;err.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;sys/prctl.h&gt;</div><div class='head'>diff --git a/tools/perf/bench/futex.h b/tools/perf/bench/futex.h<br/>index dd295d27044a..fcb72d682cf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/futex.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/futex.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/futex.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/futex.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #ifndef _FUTEX_H</div><div class='ctx'> #define _FUTEX_H</div><div class='ctx'> </div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/syscall.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='head'>diff --git a/tools/perf/bench/mem-functions.c b/tools/perf/bench/mem-functions.c<br/>index 19d45c377ac1..2908a3a796c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-functions.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-functions.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-functions.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/mem-functions.c</a></div><div class='hunk'>@@ -22,27 +22,39 @@</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/time.h&gt;</div><div class='add'>+#include &lt;sys/mman.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;linux/time64.h&gt;</div><div class='del'>-#include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;linux/log2.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define K 1024</div><div class='ctx'> </div><div class='add'>+#define PAGE_SHIFT_4KB		12</div><div class='add'>+#define PAGE_SHIFT_2MB		21</div><div class='add'>+#define PAGE_SHIFT_1GB		30</div><div class='add'>+</div><div class='ctx'> static const char	*size_str	= "1MB";</div><div class='ctx'> static const char	*function_str	= "all";</div><div class='del'>-static int		nr_loops	= 1;</div><div class='add'>+static const char	*page_size_str	= "4KB";</div><div class='add'>+static const char	*chunk_size_str	= "0";</div><div class='add'>+static unsigned int	nr_loops	= 1;</div><div class='ctx'> static bool		use_cycles;</div><div class='ctx'> static int		cycles_fd;</div><div class='add'>+static unsigned int	seed;</div><div class='ctx'> </div><div class='del'>-static const struct option options[] = {</div><div class='add'>+static const struct option bench_common_options[] = {</div><div class='ctx'> 	OPT_STRING('s', "size", &amp;size_str, "1MB",</div><div class='ctx'> 		    "Specify the size of the memory buffers. "</div><div class='ctx'> 		    "Available units: B, KB, MB, GB and TB (case insensitive)"),</div><div class='ctx'> </div><div class='add'>+	OPT_STRING('p', "page", &amp;page_size_str, "4KB",</div><div class='add'>+		    "Specify page-size for mapping memory buffers. "</div><div class='add'>+		    "Available sizes: 4KB, 2MB, 1GB (case insensitive)"),</div><div class='add'>+</div><div class='ctx'> 	OPT_STRING('f', "function", &amp;function_str, "all",</div><div class='ctx'> 		    "Specify the function to run, \"all\" runs all available functions, \"help\" lists them"),</div><div class='ctx'> </div><div class='del'>-	OPT_INTEGER('l', "nr_loops", &amp;nr_loops,</div><div class='add'>+	OPT_UINTEGER('l', "nr_loops", &amp;nr_loops,</div><div class='ctx'> 		    "Specify the number of loops to run. (default: 1)"),</div><div class='ctx'> </div><div class='ctx'> 	OPT_BOOLEAN('c', "cycles", &amp;use_cycles,</div><div class='hunk'>@@ -51,15 +63,56 @@ static const struct option options[] = {</div><div class='ctx'> 	OPT_END()</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct option bench_mem_options[] = {</div><div class='add'>+	OPT_STRING('k', "chunk", &amp;chunk_size_str, "0",</div><div class='add'>+		    "Specify the chunk-size for each invocation. "</div><div class='add'>+		    "Available units: B, KB, MB, GB and TB (case insensitive)"),</div><div class='add'>+	OPT_PARENT(bench_common_options),</div><div class='add'>+	OPT_END()</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union bench_clock {</div><div class='add'>+	u64		cycles;</div><div class='add'>+	struct timeval	tv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bench_params {</div><div class='add'>+	size_t		size;</div><div class='add'>+	size_t		size_total;</div><div class='add'>+	size_t		chunk_size;</div><div class='add'>+	unsigned int	nr_loops;</div><div class='add'>+	unsigned int	page_shift;</div><div class='add'>+	unsigned int	seed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bench_mem_info {</div><div class='add'>+	const struct function *functions;</div><div class='add'>+	int (*do_op)(const struct function *r, struct bench_params *p,</div><div class='add'>+		     void *src, void *dst, union bench_clock *rt);</div><div class='add'>+	const char *const *usage;</div><div class='add'>+	const struct option *options;</div><div class='add'>+	bool alloc_src;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef bool (*mem_init_t)(struct bench_mem_info *, struct bench_params *,</div><div class='add'>+			   void **, void **);</div><div class='add'>+typedef void (*mem_fini_t)(struct bench_mem_info *, struct bench_params *,</div><div class='add'>+			   void **, void **);</div><div class='ctx'> typedef void *(*memcpy_t)(void *, const void *, size_t);</div><div class='ctx'> typedef void *(*memset_t)(void *, int, size_t);</div><div class='add'>+typedef void (*mmap_op_t)(void *, size_t, unsigned int, bool);</div><div class='ctx'> </div><div class='ctx'> struct function {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	const char *desc;</div><div class='del'>-	union {</div><div class='del'>-		memcpy_t memcpy;</div><div class='del'>-		memset_t memset;</div><div class='add'>+	struct {</div><div class='add'>+		mem_init_t init;</div><div class='add'>+		mem_fini_t fini;</div><div class='add'>+		union {</div><div class='add'>+			memcpy_t memcpy;</div><div class='add'>+			memset_t memset;</div><div class='add'>+			mmap_op_t mmap_op;</div><div class='add'>+		};</div><div class='ctx'> 	} fn;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -91,6 +144,34 @@ static u64 get_cycles(void)</div><div class='ctx'> 	return clk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void clock_get(union bench_clock *t)</div><div class='add'>+{</div><div class='add'>+	if (use_cycles)</div><div class='add'>+		t-&gt;cycles = get_cycles();</div><div class='add'>+	else</div><div class='add'>+		BUG_ON(gettimeofday(&amp;t-&gt;tv, NULL));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static union bench_clock clock_diff(union bench_clock *s, union bench_clock *e)</div><div class='add'>+{</div><div class='add'>+	union bench_clock t;</div><div class='add'>+</div><div class='add'>+	if (use_cycles)</div><div class='add'>+		t.cycles = e-&gt;cycles - s-&gt;cycles;</div><div class='add'>+	else</div><div class='add'>+		timersub(&amp;e-&gt;tv, &amp;s-&gt;tv, &amp;t.tv);</div><div class='add'>+</div><div class='add'>+	return t;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clock_accum(union bench_clock *a, union bench_clock *b)</div><div class='add'>+{</div><div class='add'>+	if (use_cycles)</div><div class='add'>+		a-&gt;cycles += b-&gt;cycles;</div><div class='add'>+	else</div><div class='add'>+		timeradd(&amp;a-&gt;tv, &amp;b-&gt;tv, &amp;a-&gt;tv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static double timeval2double(struct timeval *ts)</div><div class='ctx'> {</div><div class='ctx'> 	return (double)ts-&gt;tv_sec + (double)ts-&gt;tv_usec / (double)USEC_PER_SEC;</div><div class='hunk'>@@ -107,54 +188,40 @@ static double timeval2double(struct timeval *ts)</div><div class='ctx'> 			printf(" %14lf GB/sec\n", x / K / K / K);	\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-struct bench_mem_info {</div><div class='del'>-	const struct function *functions;</div><div class='del'>-	u64 (*do_cycles)(const struct function *r, size_t size, void *src, void *dst);</div><div class='del'>-	double (*do_gettimeofday)(const struct function *r, size_t size, void *src, void *dst);</div><div class='del'>-	const char *const *usage;</div><div class='del'>-	bool alloc_src;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __bench_mem_function(struct bench_mem_info *info, int r_idx, size_t size, double size_total)</div><div class='add'>+static void __bench_mem_function(struct bench_mem_info *info, struct bench_params *p,</div><div class='add'>+				 int r_idx)</div><div class='ctx'> {</div><div class='ctx'> 	const struct function *r = &amp;info-&gt;functions[r_idx];</div><div class='ctx'> 	double result_bps = 0.0;</div><div class='del'>-	u64 result_cycles = 0;</div><div class='del'>-	void *src = NULL, *dst = zalloc(size);</div><div class='add'>+	union bench_clock rt = { 0 };</div><div class='add'>+	void *src = NULL, *dst = NULL;</div><div class='ctx'> </div><div class='ctx'> 	printf("# function '%s' (%s)\n", r-&gt;name, r-&gt;desc);</div><div class='ctx'> </div><div class='del'>-	if (dst == NULL)</div><div class='del'>-		goto out_alloc_failed;</div><div class='del'>-</div><div class='del'>-	if (info-&gt;alloc_src) {</div><div class='del'>-		src = zalloc(size);</div><div class='del'>-		if (src == NULL)</div><div class='del'>-			goto out_alloc_failed;</div><div class='del'>-	}</div><div class='add'>+	if (r-&gt;fn.init &amp;&amp; r-&gt;fn.init(info, p, &amp;src, &amp;dst))</div><div class='add'>+		goto out_init_failed;</div><div class='ctx'> </div><div class='ctx'> 	if (bench_format == BENCH_FORMAT_DEFAULT)</div><div class='ctx'> 		printf("# Copying %s bytes ...\n\n", size_str);</div><div class='ctx'> </div><div class='del'>-	if (use_cycles) {</div><div class='del'>-		result_cycles = info-&gt;do_cycles(r, size, src, dst);</div><div class='del'>-	} else {</div><div class='del'>-		result_bps = info-&gt;do_gettimeofday(r, size, src, dst);</div><div class='del'>-	}</div><div class='add'>+	if (info-&gt;do_op(r, p, src, dst, &amp;rt))</div><div class='add'>+		goto out_test_failed;</div><div class='ctx'> </div><div class='ctx'> 	switch (bench_format) {</div><div class='ctx'> 	case BENCH_FORMAT_DEFAULT:</div><div class='ctx'> 		if (use_cycles) {</div><div class='del'>-			printf(" %14lf cycles/byte\n", (double)result_cycles/size_total);</div><div class='add'>+			printf(" %14lf cycles/byte\n", (double)rt.cycles/(double)p-&gt;size_total);</div><div class='ctx'> 		} else {</div><div class='add'>+			result_bps = (double)p-&gt;size_total/timeval2double(&amp;rt.tv);</div><div class='ctx'> 			print_bps(result_bps);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BENCH_FORMAT_SIMPLE:</div><div class='ctx'> 		if (use_cycles) {</div><div class='del'>-			printf("%lf\n", (double)result_cycles/size_total);</div><div class='add'>+			printf("%lf\n", (double)rt.cycles/(double)p-&gt;size_total);</div><div class='ctx'> 		} else {</div><div class='add'>+			result_bps = (double)p-&gt;size_total/timeval2double(&amp;rt.tv);</div><div class='ctx'> 			printf("%lf\n", result_bps);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -164,22 +231,23 @@ static void __bench_mem_function(struct bench_mem_info *info, int r_idx, size_t</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out_test_failed:</div><div class='ctx'> out_free:</div><div class='del'>-	free(src);</div><div class='del'>-	free(dst);</div><div class='add'>+	if (r-&gt;fn.fini) r-&gt;fn.fini(info, p, &amp;src, &amp;dst);</div><div class='ctx'> 	return;</div><div class='del'>-out_alloc_failed:</div><div class='del'>-	printf("# Memory allocation failed - maybe size (%s) is too large?\n", size_str);</div><div class='add'>+out_init_failed:</div><div class='add'>+	printf("# Memory allocation failed - maybe size (%s) %s?\n", size_str,</div><div class='add'>+			p-&gt;page_shift != PAGE_SHIFT_4KB ? "has insufficient hugepages" : "is too large");</div><div class='ctx'> 	goto out_free;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bench_mem_common(int argc, const char **argv, struct bench_mem_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	size_t size;</div><div class='del'>-	double size_total;</div><div class='add'>+	struct bench_params p = { 0 };</div><div class='add'>+	unsigned int page_size;</div><div class='ctx'> </div><div class='del'>-	argc = parse_options(argc, argv, options, info-&gt;usage, 0);</div><div class='add'>+	argc = parse_options(argc, argv, info-&gt;options, info-&gt;usage, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (use_cycles) {</div><div class='ctx'> 		i = init_cycles();</div><div class='hunk'>@@ -189,17 +257,37 @@ static int bench_mem_common(int argc, const char **argv, struct bench_mem_info *</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	size = (size_t)perf_atoll((char *)size_str);</div><div class='del'>-	size_total = (double)size * nr_loops;</div><div class='add'>+	p.nr_loops = nr_loops;</div><div class='add'>+	p.size = (size_t)perf_atoll((char *)size_str);</div><div class='ctx'> </div><div class='del'>-	if ((s64)size &lt;= 0) {</div><div class='add'>+	if ((s64)p.size &lt;= 0) {</div><div class='ctx'> 		fprintf(stderr, "Invalid size:%s\n", size_str);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='add'>+	p.size_total = p.size * p.nr_loops;</div><div class='add'>+</div><div class='add'>+	p.chunk_size = (size_t)perf_atoll((char *)chunk_size_str);</div><div class='add'>+	if ((s64)p.chunk_size &lt; 0 || (s64)p.chunk_size &gt; (s64)p.size) {</div><div class='add'>+		fprintf(stderr, "Invalid chunk_size:%s\n", chunk_size_str);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	if (!p.chunk_size)</div><div class='add'>+		p.chunk_size = p.size;</div><div class='add'>+</div><div class='add'>+	page_size = (unsigned int)perf_atoll((char *)page_size_str);</div><div class='add'>+	if (page_size != (1 &lt;&lt; PAGE_SHIFT_4KB) &amp;&amp;</div><div class='add'>+	    page_size != (1 &lt;&lt; PAGE_SHIFT_2MB) &amp;&amp;</div><div class='add'>+	    page_size != (1 &lt;&lt; PAGE_SHIFT_1GB)) {</div><div class='add'>+		fprintf(stderr, "Invalid page-size:%s\n", page_size_str);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	p.page_shift = ilog2(page_size);</div><div class='add'>+</div><div class='add'>+	p.seed = seed;</div><div class='ctx'> </div><div class='ctx'> 	if (!strncmp(function_str, "all", 3)) {</div><div class='ctx'> 		for (i = 0; info-&gt;functions[i].name; i++)</div><div class='del'>-			__bench_mem_function(info, i, size, size_total);</div><div class='add'>+			__bench_mem_function(info, &amp;p, i);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +306,7 @@ static int bench_mem_common(int argc, const char **argv, struct bench_mem_info *</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__bench_mem_function(info, i, size, size_total);</div><div class='add'>+	__bench_mem_function(info, &amp;p, i);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -235,47 +323,81 @@ static void memcpy_prefault(memcpy_t fn, size_t size, void *src, void *dst)</div><div class='ctx'> 	fn(dst, src, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 do_memcpy_cycles(const struct function *r, size_t size, void *src, void *dst)</div><div class='add'>+static int do_memcpy(const struct function *r, struct bench_params *p,</div><div class='add'>+		     void *src, void *dst, union bench_clock *rt)</div><div class='ctx'> {</div><div class='del'>-	u64 cycle_start = 0ULL, cycle_end = 0ULL;</div><div class='add'>+	union bench_clock start, end;</div><div class='ctx'> 	memcpy_t fn = r-&gt;fn.memcpy;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	memcpy_prefault(fn, size, src, dst);</div><div class='add'>+	memcpy_prefault(fn, p-&gt;size, src, dst);</div><div class='add'>+</div><div class='add'>+	clock_get(&amp;start);</div><div class='add'>+	for (unsigned int i = 0; i &lt; p-&gt;nr_loops; ++i)</div><div class='add'>+		for (size_t off = 0; off &lt; p-&gt;size; off += p-&gt;chunk_size)</div><div class='add'>+			fn(dst + off, src + off, min(p-&gt;chunk_size, p-&gt;size - off));</div><div class='add'>+	clock_get(&amp;end);</div><div class='ctx'> </div><div class='del'>-	cycle_start = get_cycles();</div><div class='del'>-	for (i = 0; i &lt; nr_loops; ++i)</div><div class='del'>-		fn(dst, src, size);</div><div class='del'>-	cycle_end = get_cycles();</div><div class='add'>+	*rt = clock_diff(&amp;start, &amp;end);</div><div class='ctx'> </div><div class='del'>-	return cycle_end - cycle_start;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static double do_memcpy_gettimeofday(const struct function *r, size_t size, void *src, void *dst)</div><div class='add'>+static void *bench_mmap(size_t size, bool populate, unsigned int page_shift)</div><div class='ctx'> {</div><div class='del'>-	struct timeval tv_start, tv_end, tv_diff;</div><div class='del'>-	memcpy_t fn = r-&gt;fn.memcpy;</div><div class='del'>-	int i;</div><div class='add'>+	void *p;</div><div class='add'>+	int extra = populate ? MAP_POPULATE : 0;</div><div class='add'>+</div><div class='add'>+	if (page_shift != PAGE_SHIFT_4KB)</div><div class='add'>+		extra |= MAP_HUGETLB | (page_shift &lt;&lt; MAP_HUGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	p = mmap(NULL, size, PROT_READ|PROT_WRITE,</div><div class='add'>+		 extra | MAP_PRIVATE | MAP_ANONYMOUS, 0, 0);</div><div class='add'>+</div><div class='add'>+	return p == MAP_FAILED ? NULL : p;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bench_munmap(void *p, size_t size)</div><div class='add'>+{</div><div class='add'>+	if (p)</div><div class='add'>+		munmap(p, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mem_alloc(struct bench_mem_info *info, struct bench_params *p,</div><div class='add'>+		      void **src, void **dst)</div><div class='add'>+{</div><div class='add'>+	bool failed;</div><div class='ctx'> </div><div class='del'>-	memcpy_prefault(fn, size, src, dst);</div><div class='add'>+	*dst = bench_mmap(p-&gt;size, true, p-&gt;page_shift);</div><div class='add'>+	failed = *dst == NULL;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(gettimeofday(&amp;tv_start, NULL));</div><div class='del'>-	for (i = 0; i &lt; nr_loops; ++i)</div><div class='del'>-		fn(dst, src, size);</div><div class='del'>-	BUG_ON(gettimeofday(&amp;tv_end, NULL));</div><div class='add'>+	if (info-&gt;alloc_src) {</div><div class='add'>+		*src = bench_mmap(p-&gt;size, true, p-&gt;page_shift);</div><div class='add'>+		failed = failed || *src == NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return failed;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	timersub(&amp;tv_end, &amp;tv_start, &amp;tv_diff);</div><div class='add'>+static void mem_free(struct bench_mem_info *info __maybe_unused,</div><div class='add'>+		     struct bench_params *p __maybe_unused,</div><div class='add'>+		     void **src, void **dst)</div><div class='add'>+{</div><div class='add'>+	bench_munmap(*dst, p-&gt;size);</div><div class='add'>+	bench_munmap(*src, p-&gt;size);</div><div class='ctx'> </div><div class='del'>-	return (double)(((double)size * nr_loops) / timeval2double(&amp;tv_diff));</div><div class='add'>+	*dst = *src = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct function memcpy_functions[] = {</div><div class='ctx'> 	{ .name		= "default",</div><div class='ctx'> 	  .desc		= "Default memcpy() provided by glibc",</div><div class='add'>+	  .fn.init	= mem_alloc,</div><div class='add'>+	  .fn.fini	= mem_free,</div><div class='ctx'> 	  .fn.memcpy	= memcpy },</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_ARCH_X86_64_SUPPORT</div><div class='del'>-# define MEMCPY_FN(_fn, _name, _desc) {.name = _name, .desc = _desc, .fn.memcpy = _fn},</div><div class='add'>+# define MEMCPY_FN(_fn, _init, _fini, _name, _desc)	\</div><div class='add'>+	{.name = _name, .desc = _desc, .fn.memcpy = _fn, .fn.init = _init, .fn.fini = _fini },</div><div class='ctx'> # include "mem-memcpy-x86-64-asm-def.h"</div><div class='ctx'> # undef MEMCPY_FN</div><div class='ctx'> #endif</div><div class='hunk'>@@ -292,55 +414,36 @@ int bench_mem_memcpy(int argc, const char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	struct bench_mem_info info = {</div><div class='ctx'> 		.functions		= memcpy_functions,</div><div class='del'>-		.do_cycles		= do_memcpy_cycles,</div><div class='del'>-		.do_gettimeofday	= do_memcpy_gettimeofday,</div><div class='add'>+		.do_op			= do_memcpy,</div><div class='ctx'> 		.usage			= bench_mem_memcpy_usage,</div><div class='add'>+		.options		= bench_mem_options,</div><div class='ctx'> 		.alloc_src              = true,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return bench_mem_common(argc, argv, &amp;info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 do_memset_cycles(const struct function *r, size_t size, void *src __maybe_unused, void *dst)</div><div class='del'>-{</div><div class='del'>-	u64 cycle_start = 0ULL, cycle_end = 0ULL;</div><div class='del'>-	memset_t fn = r-&gt;fn.memset;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We prefault the freshly allocated memory range here,</div><div class='del'>-	 * to not measure page fault overhead:</div><div class='del'>-	 */</div><div class='del'>-	fn(dst, -1, size);</div><div class='del'>-</div><div class='del'>-	cycle_start = get_cycles();</div><div class='del'>-	for (i = 0; i &lt; nr_loops; ++i)</div><div class='del'>-		fn(dst, i, size);</div><div class='del'>-	cycle_end = get_cycles();</div><div class='del'>-</div><div class='del'>-	return cycle_end - cycle_start;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static double do_memset_gettimeofday(const struct function *r, size_t size, void *src __maybe_unused, void *dst)</div><div class='add'>+static int do_memset(const struct function *r, struct bench_params *p,</div><div class='add'>+		     void *src __maybe_unused, void *dst, union bench_clock *rt)</div><div class='ctx'> {</div><div class='del'>-	struct timeval tv_start, tv_end, tv_diff;</div><div class='add'>+	union bench_clock start, end;</div><div class='ctx'> 	memset_t fn = r-&gt;fn.memset;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We prefault the freshly allocated memory range here,</div><div class='ctx'> 	 * to not measure page fault overhead:</div><div class='ctx'> 	 */</div><div class='del'>-	fn(dst, -1, size);</div><div class='add'>+	fn(dst, -1, p-&gt;size);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(gettimeofday(&amp;tv_start, NULL));</div><div class='del'>-	for (i = 0; i &lt; nr_loops; ++i)</div><div class='del'>-		fn(dst, i, size);</div><div class='del'>-	BUG_ON(gettimeofday(&amp;tv_end, NULL));</div><div class='add'>+	clock_get(&amp;start);</div><div class='add'>+	for (unsigned int i = 0; i &lt; p-&gt;nr_loops; ++i)</div><div class='add'>+		for (size_t off = 0; off &lt; p-&gt;size; off += p-&gt;chunk_size)</div><div class='add'>+			fn(dst + off, i, min(p-&gt;chunk_size, p-&gt;size - off));</div><div class='add'>+	clock_get(&amp;end);</div><div class='ctx'> </div><div class='del'>-	timersub(&amp;tv_end, &amp;tv_start, &amp;tv_diff);</div><div class='add'>+	*rt = clock_diff(&amp;start, &amp;end);</div><div class='ctx'> </div><div class='del'>-	return (double)(((double)size * nr_loops) / timeval2double(&amp;tv_diff));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char * const bench_mem_memset_usage[] = {</div><div class='hunk'>@@ -351,10 +454,13 @@ static const char * const bench_mem_memset_usage[] = {</div><div class='ctx'> static const struct function memset_functions[] = {</div><div class='ctx'> 	{ .name		= "default",</div><div class='ctx'> 	  .desc		= "Default memset() provided by glibc",</div><div class='add'>+	  .fn.init	= mem_alloc,</div><div class='add'>+	  .fn.fini	= mem_free,</div><div class='ctx'> 	  .fn.memset	= memset },</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_ARCH_X86_64_SUPPORT</div><div class='del'>-# define MEMSET_FN(_fn, _name, _desc) { .name = _name, .desc = _desc, .fn.memset = _fn },</div><div class='add'>+# define MEMSET_FN(_fn, _init, _fini, _name, _desc) \</div><div class='add'>+	{.name = _name, .desc = _desc, .fn.memset = _fn, .fn.init = _init, .fn.fini = _fini },</div><div class='ctx'> # include "mem-memset-x86-64-asm-def.h"</div><div class='ctx'> # undef MEMSET_FN</div><div class='ctx'> #endif</div><div class='hunk'>@@ -366,9 +472,91 @@ int bench_mem_memset(int argc, const char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	struct bench_mem_info info = {</div><div class='ctx'> 		.functions		= memset_functions,</div><div class='del'>-		.do_cycles		= do_memset_cycles,</div><div class='del'>-		.do_gettimeofday	= do_memset_gettimeofday,</div><div class='add'>+		.do_op			= do_memset,</div><div class='ctx'> 		.usage			= bench_mem_memset_usage,</div><div class='add'>+		.options		= bench_mem_options,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return bench_mem_common(argc, argv, &amp;info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mmap_page_touch(void *dst, size_t size, unsigned int page_shift, bool random)</div><div class='add'>+{</div><div class='add'>+	unsigned long npages = size / (1 &lt;&lt; page_shift);</div><div class='add'>+	unsigned long offset = 0, r = 0;</div><div class='add'>+</div><div class='add'>+	for (unsigned long i = 0; i &lt; npages; i++) {</div><div class='add'>+		if (random)</div><div class='add'>+			r = rand() % (1 &lt;&lt; page_shift);</div><div class='add'>+</div><div class='add'>+		*((char *)dst + offset + r) = *(char *)(dst + offset + r) + i;</div><div class='add'>+		offset += 1 &lt;&lt; page_shift;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int do_mmap(const struct function *r, struct bench_params *p,</div><div class='add'>+		  void *src __maybe_unused, void *dst __maybe_unused,</div><div class='add'>+		  union bench_clock *accum)</div><div class='add'>+{</div><div class='add'>+	union bench_clock start, end, diff;</div><div class='add'>+	mmap_op_t fn = r-&gt;fn.mmap_op;</div><div class='add'>+	bool populate = strcmp(r-&gt;name, "populate") == 0;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;seed)</div><div class='add'>+		srand(p-&gt;seed);</div><div class='add'>+</div><div class='add'>+	for (unsigned int i = 0; i &lt; p-&gt;nr_loops; i++) {</div><div class='add'>+		clock_get(&amp;start);</div><div class='add'>+		dst = bench_mmap(p-&gt;size, populate, p-&gt;page_shift);</div><div class='add'>+		if (!dst)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		fn(dst, p-&gt;size, p-&gt;page_shift, p-&gt;seed);</div><div class='add'>+		clock_get(&amp;end);</div><div class='add'>+		diff = clock_diff(&amp;start, &amp;end);</div><div class='add'>+		clock_accum(accum, &amp;diff);</div><div class='add'>+</div><div class='add'>+		bench_munmap(dst, p-&gt;size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out:</div><div class='add'>+	printf("# Memory allocation failed - maybe size (%s) %s?\n", size_str,</div><div class='add'>+			p-&gt;page_shift != PAGE_SHIFT_4KB ? "has insufficient hugepages" : "is too large");</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const bench_mem_mmap_usage[] = {</div><div class='add'>+	"perf bench mem mmap &lt;options&gt;",</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct function mmap_functions[] = {</div><div class='add'>+	{ .name		= "demand",</div><div class='add'>+	  .desc		= "Demand loaded mmap()",</div><div class='add'>+	  .fn.mmap_op	= mmap_page_touch },</div><div class='add'>+</div><div class='add'>+	{ .name		= "populate",</div><div class='add'>+	  .desc		= "Eagerly populated mmap()",</div><div class='add'>+	  .fn.mmap_op	= mmap_page_touch },</div><div class='add'>+</div><div class='add'>+	{ .name = NULL, }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int bench_mem_mmap(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	static const struct option bench_mmap_options[] = {</div><div class='add'>+		OPT_UINTEGER('r', "randomize", &amp;seed,</div><div class='add'>+			    "Seed to randomize page access offset."),</div><div class='add'>+		OPT_PARENT(bench_common_options),</div><div class='add'>+		OPT_END()</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct bench_mem_info info = {</div><div class='add'>+		.functions		= mmap_functions,</div><div class='add'>+		.do_op			= do_mmap,</div><div class='add'>+		.usage			= bench_mem_mmap_usage,</div><div class='add'>+		.options		= bench_mmap_options,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return bench_mem_common(argc, argv, &amp;info);</div><div class='head'>diff --git a/tools/perf/bench/mem-memcpy-arch.h b/tools/perf/bench/mem-memcpy-arch.h<br/>index 5bcaec5601a8..852e48cfd8fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memcpy-arch.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memcpy-arch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memcpy-arch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/mem-memcpy-arch.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_ARCH_X86_64_SUPPORT</div><div class='ctx'> </div><div class='del'>-#define MEMCPY_FN(fn, name, desc)		\</div><div class='add'>+#define MEMCPY_FN(fn, init, fini, name, desc)		\</div><div class='ctx'> 	void *fn(void *, const void *, size_t);</div><div class='ctx'> </div><div class='ctx'> #include "mem-memcpy-x86-64-asm-def.h"</div><div class='head'>diff --git a/tools/perf/bench/mem-memcpy-x86-64-asm-def.h b/tools/perf/bench/mem-memcpy-x86-64-asm-def.h<br/>index 6188e19d3129..f43038f4448b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memcpy-x86-64-asm-def.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memcpy-x86-64-asm-def.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memcpy-x86-64-asm-def.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/mem-memcpy-x86-64-asm-def.h</a></div><div class='hunk'>@@ -1,9 +1,13 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> </div><div class='ctx'> MEMCPY_FN(memcpy_orig,</div><div class='add'>+	mem_alloc,</div><div class='add'>+	mem_free,</div><div class='ctx'> 	"x86-64-unrolled",</div><div class='ctx'> 	"unrolled memcpy() in arch/x86/lib/memcpy_64.S")</div><div class='ctx'> </div><div class='ctx'> MEMCPY_FN(__memcpy,</div><div class='add'>+	mem_alloc,</div><div class='add'>+	mem_free,</div><div class='ctx'> 	"x86-64-movsq",</div><div class='ctx'> 	"movsq-based memcpy() in arch/x86/lib/memcpy_64.S")</div><div class='head'>diff --git a/tools/perf/bench/mem-memset-arch.h b/tools/perf/bench/mem-memset-arch.h<br/>index 53f45482663f..278c5da12d63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memset-arch.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memset-arch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memset-arch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/mem-memset-arch.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_ARCH_X86_64_SUPPORT</div><div class='ctx'> </div><div class='del'>-#define MEMSET_FN(fn, name, desc)		\</div><div class='add'>+#define MEMSET_FN(fn, init, fini, name, desc)	\</div><div class='ctx'> 	void *fn(void *, int, size_t);</div><div class='ctx'> </div><div class='ctx'> #include "mem-memset-x86-64-asm-def.h"</div><div class='head'>diff --git a/tools/perf/bench/mem-memset-x86-64-asm-def.h b/tools/perf/bench/mem-memset-x86-64-asm-def.h<br/>index 247c72fdfb9d..80ad1b7ea770 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memset-x86-64-asm-def.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/mem-memset-x86-64-asm-def.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/mem-memset-x86-64-asm-def.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/mem-memset-x86-64-asm-def.h</a></div><div class='hunk'>@@ -1,9 +1,13 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> </div><div class='ctx'> MEMSET_FN(memset_orig,</div><div class='add'>+	mem_alloc,</div><div class='add'>+	mem_free,</div><div class='ctx'> 	"x86-64-unrolled",</div><div class='ctx'> 	"unrolled memset() in arch/x86/lib/memset_64.S")</div><div class='ctx'> </div><div class='ctx'> MEMSET_FN(__memset,</div><div class='add'>+	mem_alloc,</div><div class='add'>+	mem_free,</div><div class='ctx'> 	"x86-64-stosq",</div><div class='ctx'> 	"movsq-based memset() in arch/x86/lib/memset_64.S")</div><div class='head'>diff --git a/tools/perf/bench/pmu-scan.c b/tools/perf/bench/pmu-scan.c<br/>index 9e4d36486f62..14a464ad8cea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/pmu-scan.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/pmu-scan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/pmu-scan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/pmu-scan.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2023 Google LLC.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include "bench.h"</div><div class='ctx'> #include "util/debug.h"</div><div class='head'>diff --git a/tools/perf/bench/synthesize.c b/tools/perf/bench/synthesize.c<br/>index b3d493697675..265d49a913d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/synthesize.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/bench/synthesize.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/bench/synthesize.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/bench/synthesize.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2019 Google LLC.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include "bench.h"</div><div class='ctx'> #include "../util/debug.h"</div><div class='head'>diff --git a/tools/perf/builtin-annotate.c b/tools/perf/builtin-annotate.c<br/>index 5d57d2913f3d..9c27bb30b708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-annotate.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-annotate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-annotate.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-annotate.c</a></div><div class='hunk'>@@ -313,7 +313,8 @@ out_put:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_feature_event(struct perf_session *session,</div><div class='add'>+static int process_feature_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (event-&gt;feat.feat_id &lt; HEADER_LAST_FEATURE)</div><div class='hunk'>@@ -519,7 +520,7 @@ find_next:</div><div class='ctx'> 			/* skip missing symbols */</div><div class='ctx'> 			nd = rb_next(nd);</div><div class='ctx'> 		} else if (use_browser == 1) {</div><div class='del'>-			key = hist_entry__tui_annotate(he, evsel, NULL);</div><div class='add'>+			key = hist_entry__tui_annotate(he, evsel, NULL, NO_ADDR);</div><div class='ctx'> </div><div class='ctx'> 			switch (key) {</div><div class='ctx'> 			case -1:</div><div class='hunk'>@@ -917,11 +918,6 @@ int cmd_annotate(int argc, const char **argv)</div><div class='ctx'> 		symbol_conf.annotate_data_sample = true;</div><div class='ctx'> 	} else if (annotate_opts.code_with_type) {</div><div class='ctx'> 		symbol_conf.annotate_data_member = true;</div><div class='del'>-</div><div class='del'>-		if (!annotate.use_stdio) {</div><div class='del'>-			pr_err("--code-with-type only works with --stdio.\n");</div><div class='del'>-			goto out_delete;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	setup_browser(true);</div><div class='head'>diff --git a/tools/perf/builtin-bench.c b/tools/perf/builtin-bench.c<br/>index 2c1a9f3d847a..02dea1b88228 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-bench.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-bench.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-bench.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-bench.c</a></div><div class='hunk'>@@ -65,6 +65,7 @@ static struct bench mem_benchmarks[] = {</div><div class='ctx'> 	{ "memcpy",	"Benchmark for memcpy() functions",		bench_mem_memcpy	},</div><div class='ctx'> 	{ "memset",	"Benchmark for memset() functions",		bench_mem_memset	},</div><div class='ctx'> 	{ "find_bit",	"Benchmark for find_bit() functions",		bench_mem_find_bit	},</div><div class='add'>+	{ "mmap",	"Benchmark for mmap() mappings",		bench_mem_mmap		},</div><div class='ctx'> 	{ "all",	"Run all memory access benchmarks",		NULL			},</div><div class='ctx'> 	{ NULL,		NULL,						NULL			}</div><div class='ctx'> };</div><div class='head'>diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c<br/>index 9e9ff471ddd1..d390ae4e3ec8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-c2c.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-c2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-c2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-c2c.c</a></div><div class='hunk'>@@ -45,6 +45,8 @@</div><div class='ctx'> #include "pmus.h"</div><div class='ctx'> #include "string2.h"</div><div class='ctx'> #include "util/util.h"</div><div class='add'>+#include "util/symbol.h"</div><div class='add'>+#include "util/annotate.h"</div><div class='ctx'> </div><div class='ctx'> struct c2c_hists {</div><div class='ctx'> 	struct hists		hists;</div><div class='hunk'>@@ -62,6 +64,7 @@ struct compute_stats {</div><div class='ctx'> </div><div class='ctx'> struct c2c_hist_entry {</div><div class='ctx'> 	struct c2c_hists	*hists;</div><div class='add'>+	struct evsel		*evsel;</div><div class='ctx'> 	struct c2c_stats	 stats;</div><div class='ctx'> 	unsigned long		*cpuset;</div><div class='ctx'> 	unsigned long		*nodeset;</div><div class='hunk'>@@ -225,6 +228,12 @@ he__get_c2c_hists(struct hist_entry *he,</div><div class='ctx'> 	return hists;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void c2c_he__set_evsel(struct c2c_hist_entry *c2c_he,</div><div class='add'>+				struct evsel *evsel)</div><div class='add'>+{</div><div class='add'>+	c2c_he-&gt;evsel = evsel;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void c2c_he__set_cpu(struct c2c_hist_entry *c2c_he,</div><div class='ctx'> 			    struct perf_sample *sample)</div><div class='ctx'> {</div><div class='hunk'>@@ -275,6 +284,33 @@ static void compute_stats(struct c2c_hist_entry *c2c_he,</div><div class='ctx'> 		update_stats(&amp;cstats-&gt;load, weight);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Return true if annotation is possible. When list is NULL,</div><div class='add'>+ * it means that we are called at the c2c_browser level,</div><div class='add'>+ * in that case we allow annotation to be initialized. When list</div><div class='add'>+ * is non-NULL, it means that we are called at the cacheline_browser</div><div class='add'>+ * level, in that case we allow annotation only if use_browser</div><div class='add'>+ * is set and symbol information is available.</div><div class='add'>+ */</div><div class='add'>+static bool perf_c2c__has_annotation(struct perf_hpp_list *list)</div><div class='add'>+{</div><div class='add'>+	if (use_browser != 1)</div><div class='add'>+		return false;</div><div class='add'>+	return !list || list-&gt;sym;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void perf_c2c__evsel_hists_inc_stats(struct evsel *evsel,</div><div class='add'>+					    struct hist_entry *he,</div><div class='add'>+					    struct perf_sample *sample)</div><div class='add'>+{</div><div class='add'>+	struct hists *evsel_hists = evsel__hists(evsel);</div><div class='add'>+</div><div class='add'>+	hists__inc_nr_samples(evsel_hists, he-&gt;filtered);</div><div class='add'>+	evsel_hists-&gt;stats.total_period += sample-&gt;period;</div><div class='add'>+	if (!he-&gt;filtered)</div><div class='add'>+		evsel_hists-&gt;stats.total_non_filtered_period += sample-&gt;period;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 				union perf_event *event,</div><div class='ctx'> 				struct perf_sample *sample,</div><div class='hunk'>@@ -286,7 +322,7 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 	struct c2c_stats stats = { .nr_entries = 0, };</div><div class='ctx'> 	struct hist_entry *he;</div><div class='ctx'> 	struct addr_location al;</div><div class='del'>-	struct mem_info *mi, *mi_dup;</div><div class='add'>+	struct mem_info *mi = NULL;</div><div class='ctx'> 	struct callchain_cursor *cursor;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -313,20 +349,15 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The mi object is released in hists__add_entry_ops,</div><div class='del'>-	 * if it gets sorted out into existing data, so we need</div><div class='del'>-	 * to take the copy now.</div><div class='del'>-	 */</div><div class='del'>-	mi_dup = mem_info__get(mi);</div><div class='del'>-</div><div class='ctx'> 	c2c_decode_stats(&amp;stats, mi);</div><div class='ctx'> </div><div class='ctx'> 	he = hists__add_entry_ops(&amp;c2c_hists-&gt;hists, &amp;c2c_entry_ops,</div><div class='ctx'> 				  &amp;al, NULL, NULL, mi, NULL,</div><div class='ctx'> 				  sample, true);</div><div class='del'>-	if (he == NULL)</div><div class='del'>-		goto free_mi;</div><div class='add'>+	if (he == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	c2c_he = container_of(he, struct c2c_hist_entry, he);</div><div class='ctx'> 	c2c_add_stats(&amp;c2c_he-&gt;stats, &amp;stats);</div><div class='hunk'>@@ -334,8 +365,15 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> </div><div class='ctx'> 	c2c_he__set_cpu(c2c_he, sample);</div><div class='ctx'> 	c2c_he__set_node(c2c_he, sample);</div><div class='add'>+	c2c_he__set_evsel(c2c_he, evsel);</div><div class='ctx'> </div><div class='ctx'> 	hists__inc_nr_samples(&amp;c2c_hists-&gt;hists, he-&gt;filtered);</div><div class='add'>+</div><div class='add'>+	if (perf_c2c__has_annotation(NULL)) {</div><div class='add'>+		perf_c2c__evsel_hists_inc_stats(evsel, he, sample);</div><div class='add'>+		addr_map_symbol__inc_samples(mem_info__iaddr(mi), sample, evsel);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = hist_entry__append_callchain(he, sample);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='hunk'>@@ -350,17 +388,19 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 		int cpu = sample-&gt;cpu == (unsigned int) -1 ? 0 : sample-&gt;cpu;</div><div class='ctx'> 		int node = c2c.cpu2node[cpu];</div><div class='ctx'> </div><div class='del'>-		mi = mi_dup;</div><div class='del'>-</div><div class='ctx'> 		c2c_hists = he__get_c2c_hists(he, c2c.cl_sort, 2, machine-&gt;env);</div><div class='del'>-		if (!c2c_hists)</div><div class='del'>-			goto free_mi;</div><div class='add'>+		if (!c2c_hists) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		he = hists__add_entry_ops(&amp;c2c_hists-&gt;hists, &amp;c2c_entry_ops,</div><div class='ctx'> 					  &amp;al, NULL, NULL, mi, NULL,</div><div class='ctx'> 					  sample, true);</div><div class='del'>-		if (he == NULL)</div><div class='del'>-			goto free_mi;</div><div class='add'>+		if (he == NULL) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		c2c_he = container_of(he, struct c2c_hist_entry, he);</div><div class='ctx'> 		c2c_add_stats(&amp;c2c_he-&gt;stats, &amp;stats);</div><div class='hunk'>@@ -371,20 +411,16 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> </div><div class='ctx'> 		c2c_he__set_cpu(c2c_he, sample);</div><div class='ctx'> 		c2c_he__set_node(c2c_he, sample);</div><div class='add'>+		c2c_he__set_evsel(c2c_he, evsel);</div><div class='ctx'> </div><div class='ctx'> 		hists__inc_nr_samples(&amp;c2c_hists-&gt;hists, he-&gt;filtered);</div><div class='ctx'> 		ret = hist_entry__append_callchain(he, sample);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+	mem_info__put(mi);</div><div class='ctx'> 	addr_location__exit(&amp;al);</div><div class='ctx'> 	return ret;</div><div class='del'>-</div><div class='del'>-free_mi:</div><div class='del'>-	mem_info__put(mi_dup);</div><div class='del'>-	mem_info__put(mi);</div><div class='del'>-	ret = -ENOMEM;</div><div class='del'>-	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char * const c2c_usage[] = {</div><div class='hunk'>@@ -1997,6 +2033,9 @@ static int c2c_hists__init_sort(struct perf_hpp_list *hpp_list, char *name, stru</div><div class='ctx'> 	if (dim == &amp;dim_dso)</div><div class='ctx'> 		hpp_list-&gt;dso = 1;</div><div class='ctx'> </div><div class='add'>+	if (dim == &amp;dim_symbol || dim == &amp;dim_iaddr)</div><div class='add'>+		hpp_list-&gt;sym = 1;</div><div class='add'>+</div><div class='ctx'> 	perf_hpp_list__register_sort_field(hpp_list, &amp;c2c_fmt-&gt;fmt);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2550,6 +2589,44 @@ static void perf_c2c__hists_fprintf(FILE *out, struct perf_session *session)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_SLANG_SUPPORT</div><div class='add'>+</div><div class='add'>+static int perf_c2c__toggle_annotation(struct hist_browser *browser)</div><div class='add'>+{</div><div class='add'>+	struct hist_entry *he = browser-&gt;he_selection;</div><div class='add'>+	struct symbol *sym = NULL;</div><div class='add'>+	struct annotated_source *src = NULL;</div><div class='add'>+	struct c2c_hist_entry *c2c_he = NULL;</div><div class='add'>+	u64 al_addr = NO_ADDR;</div><div class='add'>+</div><div class='add'>+	if (!perf_c2c__has_annotation(he-&gt;hists-&gt;hpp_list)) {</div><div class='add'>+		ui_browser__help_window(&amp;browser-&gt;b, "No annotation support");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (he == NULL) {</div><div class='add'>+		ui_browser__help_window(&amp;browser-&gt;b, "No entry selected for annotation");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sym = he-&gt;ms.sym;</div><div class='add'>+	if (sym == NULL) {</div><div class='add'>+		ui_browser__help_window(&amp;browser-&gt;b, "Can not annotate, no symbol found");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	src = symbol__hists(sym, 0);</div><div class='add'>+	if (src == NULL) {</div><div class='add'>+		ui_browser__help_window(&amp;browser-&gt;b, "Failed to initialize annotation source");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (he-&gt;mem_info)</div><div class='add'>+		al_addr = mem_info__iaddr(he-&gt;mem_info)-&gt;al_addr;</div><div class='add'>+</div><div class='add'>+	c2c_he = container_of(he, struct c2c_hist_entry, he);</div><div class='add'>+	return hist_entry__tui_annotate(he, c2c_he-&gt;evsel, NULL, al_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void c2c_browser__update_nr_entries(struct hist_browser *hb)</div><div class='ctx'> {</div><div class='ctx'> 	u64 nr_entries = 0;</div><div class='hunk'>@@ -2617,6 +2694,7 @@ static int perf_c2c__browse_cacheline(struct hist_entry *he)</div><div class='ctx'> 	" ENTER         Toggle callchains (if present) \n"</div><div class='ctx'> 	" n             Toggle Node details info \n"</div><div class='ctx'> 	" s             Toggle full length of symbol and source line columns \n"</div><div class='add'>+	" a             Toggle annotation view \n"</div><div class='ctx'> 	" q             Return back to cacheline list \n";</div><div class='ctx'> </div><div class='ctx'> 	if (!he)</div><div class='hunk'>@@ -2651,6 +2729,9 @@ static int perf_c2c__browse_cacheline(struct hist_entry *he)</div><div class='ctx'> 			c2c.node_info = (c2c.node_info + 1) % 3;</div><div class='ctx'> 			setup_nodes_header();</div><div class='ctx'> 			break;</div><div class='add'>+		case 'a':</div><div class='add'>+			perf_c2c__toggle_annotation(browser);</div><div class='add'>+			break;</div><div class='ctx'> 		case 'q':</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		case '?':</div><div class='hunk'>@@ -3006,6 +3087,7 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 	const char *display = NULL;</div><div class='ctx'> 	const char *coalesce = NULL;</div><div class='ctx'> 	bool no_source = false;</div><div class='add'>+	const char *disassembler_style = NULL, *objdump_path = NULL;</div><div class='ctx'> 	const struct option options[] = {</div><div class='ctx'> 	OPT_STRING('k', "vmlinux", &amp;symbol_conf.vmlinux_name,</div><div class='ctx'> 		   "file", "vmlinux pathname"),</div><div class='hunk'>@@ -3033,6 +3115,10 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 	OPT_BOOLEAN(0, "stitch-lbr", &amp;c2c.stitch_lbr,</div><div class='ctx'> 		    "Enable LBR callgraph stitching approach"),</div><div class='ctx'> 	OPT_BOOLEAN(0, "double-cl", &amp;chk_double_cl, "Detect adjacent cacheline false sharing"),</div><div class='add'>+	OPT_STRING('M', "disassembler-style", &amp;disassembler_style, "disassembler style",</div><div class='add'>+		   "Specify disassembler style (e.g. -M intel for intel syntax)"),</div><div class='add'>+	OPT_STRING(0, "objdump", &amp;objdump_path, "path",</div><div class='add'>+		   "objdump binary to use for disassembly and annotations"),</div><div class='ctx'> 	OPT_PARENT(c2c_options),</div><div class='ctx'> 	OPT_END()</div><div class='ctx'> 	};</div><div class='hunk'>@@ -3040,6 +3126,12 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 	const char *output_str, *sort_str = NULL;</div><div class='ctx'> 	struct perf_env *env;</div><div class='ctx'> </div><div class='add'>+	annotation_options__init();</div><div class='add'>+</div><div class='add'>+	err = hists__init();</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	argc = parse_options(argc, argv, options, report_c2c_usage,</div><div class='ctx'> 			     PARSE_OPT_STOP_AT_NON_OPTION);</div><div class='ctx'> 	if (argc)</div><div class='hunk'>@@ -3052,6 +3144,27 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 	if (c2c.stats_only)</div><div class='ctx'> 		c2c.use_stdio = true;</div><div class='ctx'> </div><div class='add'>+	/**</div><div class='add'>+	 * Annotation related options disassembler_style, objdump_path are set</div><div class='add'>+	 * in the c2c_options, so we can use them here.</div><div class='add'>+	 */</div><div class='add'>+	if (disassembler_style) {</div><div class='add'>+		annotate_opts.disassembler_style = strdup(disassembler_style);</div><div class='add'>+		if (!annotate_opts.disassembler_style) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			pr_err("Failed to allocate memory for annotation options\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (objdump_path) {</div><div class='add'>+		annotate_opts.objdump_path = strdup(objdump_path);</div><div class='add'>+		if (!annotate_opts.objdump_path) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			pr_err("Failed to allocate memory for annotation options\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = symbol__validate_sym_arguments();</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -3126,6 +3239,38 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_mem2node;</div><div class='ctx'> </div><div class='add'>+	if (c2c.use_stdio)</div><div class='add'>+		use_browser = 0;</div><div class='add'>+	else</div><div class='add'>+		use_browser = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Only in the TUI browser we are doing integrated annotation,</div><div class='add'>+	 * so don't allocate extra space that won't be used in the stdio</div><div class='add'>+	 * implementation.</div><div class='add'>+	 */</div><div class='add'>+	if (perf_c2c__has_annotation(NULL)) {</div><div class='add'>+		int ret = symbol__annotation_init();</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out_mem2node;</div><div class='add'>+		/*</div><div class='add'>+		 * For searching by name on the "Browse map details".</div><div class='add'>+		 * providing it only in verbose mode not to bloat too</div><div class='add'>+		 * much struct symbol.</div><div class='add'>+		 */</div><div class='add'>+		if (verbose &gt; 0) {</div><div class='add'>+			/*</div><div class='add'>+			 * XXX: Need to provide a less kludgy way to ask for</div><div class='add'>+			 * more space per symbol, the u32 is for the index on</div><div class='add'>+			 * the ui browser.</div><div class='add'>+			 * See symbol__browser_index.</div><div class='add'>+			 */</div><div class='add'>+			symbol_conf.priv_size += sizeof(u32);</div><div class='add'>+		}</div><div class='add'>+		annotation_config__init();</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (symbol__init(env) &lt; 0)</div><div class='ctx'> 		goto out_mem2node;</div><div class='ctx'> </div><div class='hunk'>@@ -3135,11 +3280,6 @@ static int perf_c2c__report(int argc, const char **argv)</div><div class='ctx'> 		goto out_mem2node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (c2c.use_stdio)</div><div class='del'>-		use_browser = 0;</div><div class='del'>-	else</div><div class='del'>-		use_browser = 1;</div><div class='del'>-</div><div class='ctx'> 	setup_browser(false);</div><div class='ctx'> </div><div class='ctx'> 	err = perf_session__process_events(session);</div><div class='hunk'>@@ -3210,6 +3350,7 @@ out_mem2node:</div><div class='ctx'> out_session:</div><div class='ctx'> 	perf_session__delete(session);</div><div class='ctx'> out:</div><div class='add'>+	annotation_options__exit();</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/builtin-check.c b/tools/perf/builtin-check.c<br/>index b1e205871ab1..d19769a8f689 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-check.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-check.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-check.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-check.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include "builtin.h"</div><div class='ctx'> #include "color.h"</div><div class='add'>+#include "util/bpf-utils.h"</div><div class='ctx'> #include "util/debug.h"</div><div class='ctx'> #include "util/header.h"</div><div class='ctx'> #include &lt;tools/config.h&gt;</div><div class='hunk'>@@ -41,15 +42,15 @@ struct feature_status supported_features[] = {</div><div class='ctx'> 	FEATURE_STATUS("dwarf", HAVE_LIBDW_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("dwarf_getlocations", HAVE_LIBDW_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("dwarf-unwind", HAVE_DWARF_UNWIND_SUPPORT),</div><div class='del'>-	FEATURE_STATUS("auxtrace", HAVE_AUXTRACE_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS_TIP("libbfd", HAVE_LIBBFD_SUPPORT, "Deprecated, license incompatibility, use BUILD_NONDISTRO=1 and install binutils-dev[el]"),</div><div class='ctx'> 	FEATURE_STATUS("libbpf-strings", HAVE_LIBBPF_STRINGS_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libcapstone", HAVE_LIBCAPSTONE_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libdw-dwarf-unwind", HAVE_LIBDW_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libelf", HAVE_LIBELF_SUPPORT),</div><div class='add'>+	FEATURE_STATUS("libLLVM", HAVE_LIBLLVM_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libnuma", HAVE_LIBNUMA_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libopencsd", HAVE_CSTRACE_SUPPORT),</div><div class='del'>-	FEATURE_STATUS("libperl", HAVE_LIBPERL_SUPPORT),</div><div class='add'>+	FEATURE_STATUS_TIP("libperl", HAVE_LIBPERL_SUPPORT, "Deprecated, use LIBPERL=1 and install perl-ExtUtils-Embed/libperl-dev to build with it"),</div><div class='ctx'> 	FEATURE_STATUS("libpfm4", HAVE_LIBPFM),</div><div class='ctx'> 	FEATURE_STATUS("libpython", HAVE_LIBPYTHON_SUPPORT),</div><div class='ctx'> 	FEATURE_STATUS("libslang", HAVE_SLANG_SUPPORT),</div><div class='head'>diff --git a/tools/perf/builtin-evlist.c b/tools/perf/builtin-evlist.c<br/>index a9bd7bbef5a9..fb6e2c3c24c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-evlist.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-evlist.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-evlist.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-evlist.c</a></div><div class='hunk'>@@ -19,7 +19,8 @@</div><div class='ctx'> #include "util/tool.h"</div><div class='ctx'> #include "util/util.h"</div><div class='ctx'> </div><div class='del'>-static int process_header_feature(struct perf_session *session __maybe_unused,</div><div class='add'>+static int process_header_feature(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				  struct perf_session *session __maybe_unused,</div><div class='ctx'> 				  union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	session_done = 1;</div><div class='head'>diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c<br/>index 40ba6a94f719..aa7be4fb5838 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-inject.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-inject.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-inject.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-inject.c</a></div><div class='hunk'>@@ -197,18 +197,20 @@ static int perf_event__drop_oe(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int perf_event__repipe_op2_synth(struct perf_session *session,</div><div class='add'>+static int perf_event__repipe_op2_synth(const struct perf_tool *tool,</div><div class='add'>+					struct perf_session *session __maybe_unused,</div><div class='ctx'> 					union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	return perf_event__repipe_synth(session-&gt;tool, event);</div><div class='add'>+	return perf_event__repipe_synth(tool, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int perf_event__repipe_op4_synth(struct perf_session *session,</div><div class='add'>+static int perf_event__repipe_op4_synth(const struct perf_tool *tool,</div><div class='add'>+					struct perf_session *session __maybe_unused,</div><div class='ctx'> 					union perf_event *event,</div><div class='ctx'> 					u64 data __maybe_unused,</div><div class='ctx'> 					const char *str __maybe_unused)</div><div class='ctx'> {</div><div class='del'>-	return perf_event__repipe_synth(session-&gt;tool, event);</div><div class='add'>+	return perf_event__repipe_synth(tool, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int perf_event__repipe_attr(const struct perf_tool *tool,</div><div class='hunk'>@@ -237,8 +239,6 @@ static int perf_event__repipe_event_update(const struct perf_tool *tool,</div><div class='ctx'> 	return perf_event__repipe_synth(tool, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='del'>-</div><div class='ctx'> static int copy_bytes(struct perf_inject *inject, struct perf_data *data, off_t size)</div><div class='ctx'> {</div><div class='ctx'> 	char buf[4096];</div><div class='hunk'>@@ -258,12 +258,11 @@ static int copy_bytes(struct perf_inject *inject, struct perf_data *data, off_t</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static s64 perf_event__repipe_auxtrace(struct perf_session *session,</div><div class='add'>+static s64 perf_event__repipe_auxtrace(const struct perf_tool *tool,</div><div class='add'>+				       struct perf_session *session,</div><div class='ctx'> 				       union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='del'>-	struct perf_inject *inject = container_of(tool, struct perf_inject,</div><div class='del'>-						  tool);</div><div class='add'>+	struct perf_inject *inject = container_of(tool, struct perf_inject, tool);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	inject-&gt;have_auxtrace = true;</div><div class='hunk'>@@ -296,18 +295,6 @@ static s64 perf_event__repipe_auxtrace(struct perf_session *session,</div><div class='ctx'> 	return event-&gt;auxtrace.size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static s64</div><div class='del'>-perf_event__repipe_auxtrace(struct perf_session *session __maybe_unused,</div><div class='del'>-			    union perf_event *event __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int perf_event__repipe(const struct perf_tool *tool,</div><div class='ctx'> 			      union perf_event *event,</div><div class='ctx'> 			      struct perf_sample *sample __maybe_unused,</div><div class='hunk'>@@ -661,12 +648,13 @@ static int perf_event__repipe_exit(const struct perf_tool *tool,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_LIBTRACEEVENT</div><div class='del'>-static int perf_event__repipe_tracing_data(struct perf_session *session,</div><div class='add'>+static int perf_event__repipe_tracing_data(const struct perf_tool *tool,</div><div class='add'>+					   struct perf_session *session,</div><div class='ctx'> 					   union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	perf_event__repipe_synth(session-&gt;tool, event);</div><div class='add'>+	perf_event__repipe_synth(tool, event);</div><div class='ctx'> </div><div class='del'>-	return perf_event__process_tracing_data(session, event);</div><div class='add'>+	return perf_event__process_tracing_data(tool, session, event);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1348,7 +1336,7 @@ static int process_build_id(const struct perf_tool *tool,</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_inject *inject = container_of(tool, struct perf_inject, tool);</div><div class='ctx'> </div><div class='del'>-	return perf_event__process_build_id(inject-&gt;session, event);</div><div class='add'>+	return perf_event__process_build_id(tool, inject-&gt;session, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int synthesize_build_id(struct perf_inject *inject, struct dso *dso, pid_t machine_pid)</div><div class='hunk'>@@ -1780,9 +1768,10 @@ static int host__repipe(const struct perf_tool *tool,</div><div class='ctx'> 	return perf_event__repipe(tool, event, sample, machine);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int host__finished_init(struct perf_session *session, union perf_event *event)</div><div class='add'>+static int host__finished_init(const struct perf_tool *tool, struct perf_session *session,</div><div class='add'>+			       union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	struct perf_inject *inject = container_of(session-&gt;tool, struct perf_inject, tool);</div><div class='add'>+	struct perf_inject *inject = container_of(tool, struct perf_inject, tool);</div><div class='ctx'> 	struct guest_session *gs = &amp;inject-&gt;guest_session;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1829,7 +1818,7 @@ static int host__finished_init(struct perf_session *session, union perf_event *e</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return perf_event__repipe_op2_synth(session, event);</div><div class='add'>+	return perf_event__repipe_op2_synth(tool, session, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2538,6 +2527,7 @@ int cmd_inject(int argc, const char **argv)</div><div class='ctx'> 	inject.tool.auxtrace		= perf_event__repipe_auxtrace;</div><div class='ctx'> 	inject.tool.bpf_metadata	= perf_event__repipe_op2_synth;</div><div class='ctx'> 	inject.tool.dont_split_sample_group = true;</div><div class='add'>+	inject.tool.merge_deferred_callchains = false;</div><div class='ctx'> 	inject.session = __perf_session__new(&amp;data, &amp;inject.tool,</div><div class='ctx'> 					     /*trace_event_repipe=*/inject.output.is_pipe,</div><div class='ctx'> 					     /*host_env=*/NULL);</div><div class='head'>diff --git a/tools/perf/builtin-kvm.c b/tools/perf/builtin-kvm.c<br/>index 7b15b4a705e4..c61369d54dd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-kvm.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-kvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-kvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-kvm.c</a></div><div class='hunk'>@@ -1636,14 +1636,6 @@ exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define STRDUP_FAIL_EXIT(s)		\</div><div class='del'>-	({	char *_p;		\</div><div class='del'>-	_p = strdup(s);		\</div><div class='del'>-		if (!_p)		\</div><div class='del'>-			return -ENOMEM;	\</div><div class='del'>-		_p;			\</div><div class='del'>-	})</div><div class='del'>-</div><div class='ctx'> int __weak setup_kvm_events_tp(struct perf_kvm_stat *kvm __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1688,7 +1680,7 @@ kvm_events_record(struct perf_kvm_stat *kvm, int argc, const char **argv)</div><div class='ctx'> 		rec_argv[i] = STRDUP_FAIL_EXIT(record_args[i]);</div><div class='ctx'> </div><div class='ctx'> 	for (j = 0; j &lt; events_tp_size; j++) {</div><div class='del'>-		rec_argv[i++] = "-e";</div><div class='add'>+		rec_argv[i++] = STRDUP_FAIL_EXIT("-e");</div><div class='ctx'> 		rec_argv[i++] = STRDUP_FAIL_EXIT(kvm_events_tp[j]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1696,7 +1688,7 @@ kvm_events_record(struct perf_kvm_stat *kvm, int argc, const char **argv)</div><div class='ctx'> 	rec_argv[i++] = STRDUP_FAIL_EXIT(kvm-&gt;file_name);</div><div class='ctx'> </div><div class='ctx'> 	for (j = 1; j &lt; (unsigned int)argc; j++, i++)</div><div class='del'>-		rec_argv[i] = argv[j];</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[j]);</div><div class='ctx'> </div><div class='ctx'> 	set_option_flag(record_options, 'e', "event", PARSE_OPT_HIDDEN);</div><div class='ctx'> 	set_option_flag(record_options, 0, "filter", PARSE_OPT_HIDDEN);</div><div class='hunk'>@@ -1719,7 +1711,13 @@ kvm_events_record(struct perf_kvm_stat *kvm, int argc, const char **argv)</div><div class='ctx'> 	set_option_flag(record_options, 0, "transaction", PARSE_OPT_DISABLED);</div><div class='ctx'> </div><div class='ctx'> 	record_usage = kvm_stat_record_usage;</div><div class='del'>-	return cmd_record(i, rec_argv);</div><div class='add'>+	ret = cmd_record(i, rec_argv);</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2000,58 +1998,122 @@ static int __cmd_record(const char *file_name, int argc, const char **argv)</div><div class='ctx'> 	int rec_argc, i = 0, j, ret;</div><div class='ctx'> 	const char **rec_argv;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_add_default_arch_event(&amp;argc, argv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	rec_argc = argc + 2;</div><div class='add'>+	/*</div><div class='add'>+	 * Besides the 2 more options "-o" and "filename",</div><div class='add'>+	 * kvm_add_default_arch_event() may add 2 extra options,</div><div class='add'>+	 * so allocate 4 more items.</div><div class='add'>+	 */</div><div class='add'>+	rec_argc = argc + 2 + 2;</div><div class='ctx'> 	rec_argv = calloc(rec_argc + 1, sizeof(char *));</div><div class='del'>-	rec_argv[i++] = strdup("record");</div><div class='del'>-	rec_argv[i++] = strdup("-o");</div><div class='del'>-	rec_argv[i++] = strdup(file_name);</div><div class='add'>+	if (!rec_argv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("record");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("-o");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT(file_name);</div><div class='ctx'> 	for (j = 1; j &lt; argc; j++, i++)</div><div class='del'>-		rec_argv[i] = argv[j];</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[j]);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(i != rec_argc);</div><div class='add'>+	BUG_ON(i + 2 != rec_argc);</div><div class='add'>+</div><div class='add'>+	ret = kvm_add_default_arch_event(&amp;i, rec_argv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto EXIT;</div><div class='add'>+</div><div class='add'>+	ret = cmd_record(i, rec_argv);</div><div class='ctx'> </div><div class='del'>-	return cmd_record(i, rec_argv);</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __cmd_report(const char *file_name, int argc, const char **argv)</div><div class='ctx'> {</div><div class='del'>-	int rec_argc, i = 0, j;</div><div class='add'>+	int rec_argc, i = 0, j, ret;</div><div class='ctx'> 	const char **rec_argv;</div><div class='ctx'> </div><div class='ctx'> 	rec_argc = argc + 2;</div><div class='ctx'> 	rec_argv = calloc(rec_argc + 1, sizeof(char *));</div><div class='del'>-	rec_argv[i++] = strdup("report");</div><div class='del'>-	rec_argv[i++] = strdup("-i");</div><div class='del'>-	rec_argv[i++] = strdup(file_name);</div><div class='add'>+	if (!rec_argv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("report");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("-i");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT(file_name);</div><div class='ctx'> 	for (j = 1; j &lt; argc; j++, i++)</div><div class='del'>-		rec_argv[i] = argv[j];</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[j]);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(i != rec_argc);</div><div class='ctx'> </div><div class='del'>-	return cmd_report(i, rec_argv);</div><div class='add'>+	ret = cmd_report(i, rec_argv);</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> __cmd_buildid_list(const char *file_name, int argc, const char **argv)</div><div class='ctx'> {</div><div class='del'>-	int rec_argc, i = 0, j;</div><div class='add'>+	int rec_argc, i = 0, j, ret;</div><div class='ctx'> 	const char **rec_argv;</div><div class='ctx'> </div><div class='ctx'> 	rec_argc = argc + 2;</div><div class='ctx'> 	rec_argv = calloc(rec_argc + 1, sizeof(char *));</div><div class='del'>-	rec_argv[i++] = strdup("buildid-list");</div><div class='del'>-	rec_argv[i++] = strdup("-i");</div><div class='del'>-	rec_argv[i++] = strdup(file_name);</div><div class='add'>+	if (!rec_argv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("buildid-list");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT("-i");</div><div class='add'>+	rec_argv[i++] = STRDUP_FAIL_EXIT(file_name);</div><div class='ctx'> 	for (j = 1; j &lt; argc; j++, i++)</div><div class='del'>-		rec_argv[i] = argv[j];</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[j]);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(i != rec_argc);</div><div class='ctx'> </div><div class='del'>-	return cmd_buildid_list(i, rec_argv);</div><div class='add'>+	ret = cmd_buildid_list(i, rec_argv);</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __cmd_top(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	int rec_argc, i = 0, ret;</div><div class='add'>+	const char **rec_argv;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * kvm_add_default_arch_event() may add 2 extra options, so</div><div class='add'>+	 * allocate 2 more pointers in adavance.</div><div class='add'>+	 */</div><div class='add'>+	rec_argc = argc + 2;</div><div class='add'>+	rec_argv = calloc(rec_argc + 1, sizeof(char *));</div><div class='add'>+	if (!rec_argv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; argc; i++)</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[i]);</div><div class='add'>+</div><div class='add'>+	BUG_ON(i != argc);</div><div class='add'>+</div><div class='add'>+	ret = kvm_add_default_arch_event(&amp;i, rec_argv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto EXIT;</div><div class='add'>+</div><div class='add'>+	ret = cmd_top(i, rec_argv);</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int cmd_kvm(int argc, const char **argv)</div><div class='hunk'>@@ -2114,7 +2176,7 @@ int cmd_kvm(int argc, const char **argv)</div><div class='ctx'> 	else if (strlen(argv[0]) &gt; 2 &amp;&amp; strstarts("diff", argv[0]))</div><div class='ctx'> 		return cmd_diff(argc, argv);</div><div class='ctx'> 	else if (!strcmp(argv[0], "top"))</div><div class='del'>-		return cmd_top(argc, argv);</div><div class='add'>+		return __cmd_top(argc, argv);</div><div class='ctx'> 	else if (strlen(argv[0]) &gt; 2 &amp;&amp; strstarts("buildid-list", argv[0]))</div><div class='ctx'> 		return __cmd_buildid_list(file_name, argc, argv);</div><div class='ctx'> #if defined(HAVE_KVM_STAT_SUPPORT) &amp;&amp; defined(HAVE_LIBTRACEEVENT)</div><div class='head'>diff --git a/tools/perf/builtin-kwork.c b/tools/perf/builtin-kwork.c<br/>index d2e08de5976d..7f3068264568 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-kwork.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-kwork.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-kwork.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-kwork.c</a></div><div class='hunk'>@@ -2273,12 +2273,23 @@ static void setup_event_list(struct perf_kwork *kwork,</div><div class='ctx'> 	pr_debug("\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define STRDUP_FAIL_EXIT(s)		\</div><div class='add'>+	({	char *_p;		\</div><div class='add'>+		_p = strdup(s);		\</div><div class='add'>+		if (!_p) {		\</div><div class='add'>+			ret = -ENOMEM;	\</div><div class='add'>+			goto EXIT;	\</div><div class='add'>+		}			\</div><div class='add'>+		_p;			\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> static int perf_kwork__record(struct perf_kwork *kwork,</div><div class='ctx'> 			      int argc, const char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	const char **rec_argv;</div><div class='ctx'> 	unsigned int rec_argc, i, j;</div><div class='ctx'> 	struct kwork_class *class;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	const char *const record_args[] = {</div><div class='ctx'> 		"record",</div><div class='hunk'>@@ -2298,17 +2309,17 @@ static int perf_kwork__record(struct perf_kwork *kwork,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(record_args); i++)</div><div class='del'>-		rec_argv[i] = strdup(record_args[i]);</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(record_args[i]);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(class, &amp;kwork-&gt;class_list, list) {</div><div class='ctx'> 		for (j = 0; j &lt; class-&gt;nr_tracepoints; j++) {</div><div class='del'>-			rec_argv[i++] = strdup("-e");</div><div class='del'>-			rec_argv[i++] = strdup(class-&gt;tp_handlers[j].name);</div><div class='add'>+			rec_argv[i++] = STRDUP_FAIL_EXIT("-e");</div><div class='add'>+			rec_argv[i++] = STRDUP_FAIL_EXIT(class-&gt;tp_handlers[j].name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (j = 1; j &lt; (unsigned int)argc; j++, i++)</div><div class='del'>-		rec_argv[i] = argv[j];</div><div class='add'>+		rec_argv[i] = STRDUP_FAIL_EXIT(argv[j]);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(i != rec_argc);</div><div class='ctx'> </div><div class='hunk'>@@ -2317,7 +2328,13 @@ static int perf_kwork__record(struct perf_kwork *kwork,</div><div class='ctx'> 		pr_debug("%s ", rec_argv[j]);</div><div class='ctx'> 	pr_debug("\n");</div><div class='ctx'> </div><div class='del'>-	return cmd_record(i, rec_argv);</div><div class='add'>+	ret = cmd_record(i, rec_argv);</div><div class='add'>+</div><div class='add'>+EXIT:</div><div class='add'>+	for (i = 0; i &lt; rec_argc; i++)</div><div class='add'>+		free((void *)rec_argv[i]);</div><div class='add'>+	free(rec_argv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int cmd_kwork(int argc, const char **argv)</div><div class='head'>diff --git a/tools/perf/builtin-list.c b/tools/perf/builtin-list.c<br/>index caf42276bd0f..5cbca0bacd35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-list.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-list.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-list.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-list.c</a></div><div class='hunk'>@@ -130,7 +130,7 @@ static void default_print_event(void *ps, const char *topic,</div><div class='ctx'> 	if (deprecated &amp;&amp; !print_state-&gt;deprecated)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (print_state-&gt;pmu_glob &amp;&amp; pmu_name &amp;&amp; !strglobmatch(pmu_name, print_state-&gt;pmu_glob))</div><div class='add'>+	if (print_state-&gt;pmu_glob &amp;&amp; (!pmu_name || !strglobmatch(pmu_name, print_state-&gt;pmu_glob)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (print_state-&gt;exclude_abi &amp;&amp; pmu_type &lt; PERF_TYPE_MAX &amp;&amp; pmu_type != PERF_TYPE_RAW)</div><div class='hunk'>@@ -283,8 +283,8 @@ static void default_print_metric(void *ps,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct json_print_state {</div><div class='del'>-	/** @fp: File to write output to. */</div><div class='del'>-	FILE *fp;</div><div class='add'>+	/** The shared print_state */</div><div class='add'>+	struct print_state common;</div><div class='ctx'> 	/** Should a separator be printed prior to the next item? */</div><div class='ctx'> 	bool need_sep;</div><div class='ctx'> };</div><div class='hunk'>@@ -292,7 +292,7 @@ struct json_print_state {</div><div class='ctx'> static void json_print_start(void *ps)</div><div class='ctx'> {</div><div class='ctx'> 	struct json_print_state *print_state = ps;</div><div class='del'>-	FILE *fp = print_state-&gt;fp;</div><div class='add'>+	FILE *fp = print_state-&gt;common.fp;</div><div class='ctx'> </div><div class='ctx'> 	fprintf(fp, "[\n");</div><div class='ctx'> }</div><div class='hunk'>@@ -300,7 +300,7 @@ static void json_print_start(void *ps)</div><div class='ctx'> static void json_print_end(void *ps)</div><div class='ctx'> {</div><div class='ctx'> 	struct json_print_state *print_state = ps;</div><div class='del'>-	FILE *fp = print_state-&gt;fp;</div><div class='add'>+	FILE *fp = print_state-&gt;common.fp;</div><div class='ctx'> </div><div class='ctx'> 	fprintf(fp, "%s]\n", print_state-&gt;need_sep ? "\n" : "");</div><div class='ctx'> }</div><div class='hunk'>@@ -370,9 +370,26 @@ static void json_print_event(void *ps, const char *topic,</div><div class='ctx'> {</div><div class='ctx'> 	struct json_print_state *print_state = ps;</div><div class='ctx'> 	bool need_sep = false;</div><div class='del'>-	FILE *fp = print_state-&gt;fp;</div><div class='add'>+	FILE *fp = print_state-&gt;common.fp;</div><div class='ctx'> 	struct strbuf buf;</div><div class='ctx'> </div><div class='add'>+	if (deprecated &amp;&amp; !print_state-&gt;common.deprecated)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (print_state-&gt;common.pmu_glob &amp;&amp;</div><div class='add'>+	    (!pmu_name || !strglobmatch(pmu_name, print_state-&gt;common.pmu_glob)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (print_state-&gt;common.exclude_abi &amp;&amp; pmu_type &lt; PERF_TYPE_MAX &amp;&amp;</div><div class='add'>+	    pmu_type != PERF_TYPE_RAW)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (print_state-&gt;common.event_glob &amp;&amp;</div><div class='add'>+	    (!event_name || !strglobmatch(event_name, print_state-&gt;common.event_glob)) &amp;&amp;</div><div class='add'>+	    (!event_alias || !strglobmatch(event_alias, print_state-&gt;common.event_glob)) &amp;&amp;</div><div class='add'>+	    (!topic || !strglobmatch_nocase(topic, print_state-&gt;common.event_glob)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	strbuf_init(&amp;buf, 0);</div><div class='ctx'> 	fprintf(fp, "%s{\n", print_state-&gt;need_sep ? ",\n" : "");</div><div class='ctx'> 	print_state-&gt;need_sep = true;</div><div class='hunk'>@@ -446,9 +463,16 @@ static void json_print_metric(void *ps __maybe_unused, const char *group,</div><div class='ctx'> {</div><div class='ctx'> 	struct json_print_state *print_state = ps;</div><div class='ctx'> 	bool need_sep = false;</div><div class='del'>-	FILE *fp = print_state-&gt;fp;</div><div class='add'>+	FILE *fp = print_state-&gt;common.fp;</div><div class='ctx'> 	struct strbuf buf;</div><div class='ctx'> </div><div class='add'>+	if (print_state-&gt;common.event_glob &amp;&amp;</div><div class='add'>+	    (!print_state-&gt;common.metrics || !name ||</div><div class='add'>+	     !strglobmatch(name, print_state-&gt;common.event_glob)) &amp;&amp;</div><div class='add'>+	    (!print_state-&gt;common.metricgroups || !group ||</div><div class='add'>+	     !strglobmatch(group, print_state-&gt;common.event_glob)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	strbuf_init(&amp;buf, 0);</div><div class='ctx'> 	fprintf(fp, "%s{\n", print_state-&gt;need_sep ? ",\n" : "");</div><div class='ctx'> 	print_state-&gt;need_sep = true;</div><div class='hunk'>@@ -521,10 +545,12 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 		.fp = stdout,</div><div class='ctx'> 		.desc = true,</div><div class='ctx'> 	};</div><div class='del'>-	struct print_state json_ps = {</div><div class='del'>-		.fp = stdout,</div><div class='add'>+	struct json_print_state json_ps = {</div><div class='add'>+		.common = {</div><div class='add'>+			.fp = stdout,</div><div class='add'>+		},</div><div class='ctx'> 	};</div><div class='del'>-	void *ps = &amp;default_ps;</div><div class='add'>+	struct print_state *ps = &amp;default_ps;</div><div class='ctx'> 	struct print_callbacks print_cb = {</div><div class='ctx'> 		.print_start = default_print_start,</div><div class='ctx'> 		.print_end = default_print_end,</div><div class='hunk'>@@ -572,9 +598,11 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 	argc = parse_options(argc, argv, list_options, list_usage,</div><div class='ctx'> 			     PARSE_OPT_STOP_AT_NON_OPTION);</div><div class='ctx'> </div><div class='add'>+	if (json)</div><div class='add'>+		ps = &amp;json_ps.common;</div><div class='add'>+</div><div class='ctx'> 	if (output_path) {</div><div class='del'>-		default_ps.fp = fopen(output_path, "w");</div><div class='del'>-		json_ps.fp = default_ps.fp;</div><div class='add'>+		ps-&gt;fp = fopen(output_path, "w");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	setup_pager();</div><div class='hunk'>@@ -590,14 +618,13 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 			.print_metric = json_print_metric,</div><div class='ctx'> 			.skip_duplicate_pmus = json_skip_duplicate_pmus,</div><div class='ctx'> 		};</div><div class='del'>-		ps = &amp;json_ps;</div><div class='ctx'> 	} else {</div><div class='del'>-		default_ps.last_topic = strdup("");</div><div class='del'>-		assert(default_ps.last_topic);</div><div class='del'>-		default_ps.visited_metrics = strlist__new(NULL, NULL);</div><div class='del'>-		assert(default_ps.visited_metrics);</div><div class='add'>+		ps-&gt;last_topic = strdup("");</div><div class='add'>+		assert(ps-&gt;last_topic);</div><div class='add'>+		ps-&gt;visited_metrics = strlist__new(NULL, NULL);</div><div class='add'>+		assert(ps-&gt;visited_metrics);</div><div class='ctx'> 		if (unit_name)</div><div class='del'>-			default_ps.pmu_glob = strdup(unit_name);</div><div class='add'>+			ps-&gt;pmu_glob = strdup(unit_name);</div><div class='ctx'> 		else if (cputype) {</div><div class='ctx'> 			const struct perf_pmu *pmu = perf_pmus__pmu_for_pmu_filter(cputype);</div><div class='ctx'> </div><div class='hunk'>@@ -606,14 +633,16 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 				ret = -1;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='del'>-			default_ps.pmu_glob = strdup(pmu-&gt;name);</div><div class='add'>+			ps-&gt;pmu_glob = strdup(pmu-&gt;name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	print_cb.print_start(ps);</div><div class='ctx'> </div><div class='ctx'> 	if (argc == 0) {</div><div class='del'>-		default_ps.metrics = true;</div><div class='del'>-		default_ps.metricgroups = true;</div><div class='add'>+		if (!unit_name) {</div><div class='add'>+			ps-&gt;metrics = true;</div><div class='add'>+			ps-&gt;metricgroups = true;</div><div class='add'>+		}</div><div class='ctx'> 		print_events(&amp;print_cb, ps);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -633,41 +662,58 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 			zfree(&amp;default_ps.pmu_glob);</div><div class='ctx'> 			default_ps.pmu_glob = old_pmu_glob;</div><div class='ctx'> 		} else if (strcmp(argv[i], "hw") == 0 ||</div><div class='del'>-			 strcmp(argv[i], "hardware") == 0)</div><div class='del'>-			print_symbol_events(&amp;print_cb, ps, PERF_TYPE_HARDWARE,</div><div class='del'>-					event_symbols_hw, PERF_COUNT_HW_MAX);</div><div class='del'>-		else if (strcmp(argv[i], "sw") == 0 ||</div><div class='add'>+			   strcmp(argv[i], "hardware") == 0) {</div><div class='add'>+			char *old_event_glob = ps-&gt;event_glob;</div><div class='add'>+</div><div class='add'>+			ps-&gt;event_glob = strdup("legacy hardware");</div><div class='add'>+			if (!ps-&gt;event_glob) {</div><div class='add'>+				ret = -1;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='add'>+			zfree(&amp;ps-&gt;event_glob);</div><div class='add'>+			ps-&gt;event_glob = old_event_glob;</div><div class='add'>+		} else if (strcmp(argv[i], "sw") == 0 ||</div><div class='ctx'> 			 strcmp(argv[i], "software") == 0) {</div><div class='del'>-			char *old_pmu_glob = default_ps.pmu_glob;</div><div class='add'>+			char *old_pmu_glob = ps-&gt;pmu_glob;</div><div class='ctx'> 			static const char * const sw_globs[] = { "software", "tool" };</div><div class='ctx'> </div><div class='ctx'> 			for (size_t j = 0; j &lt; ARRAY_SIZE(sw_globs); j++) {</div><div class='del'>-				default_ps.pmu_glob = strdup(sw_globs[j]);</div><div class='del'>-				if (!default_ps.pmu_glob) {</div><div class='add'>+				ps-&gt;pmu_glob = strdup(sw_globs[j]);</div><div class='add'>+				if (!ps-&gt;pmu_glob) {</div><div class='ctx'> 					ret = -1;</div><div class='ctx'> 					goto out;</div><div class='ctx'> 				}</div><div class='ctx'> 				perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='del'>-				zfree(&amp;default_ps.pmu_glob);</div><div class='add'>+				zfree(&amp;ps-&gt;pmu_glob);</div><div class='ctx'> 			}</div><div class='del'>-			default_ps.pmu_glob = old_pmu_glob;</div><div class='add'>+			ps-&gt;pmu_glob = old_pmu_glob;</div><div class='ctx'> 		} else if (strcmp(argv[i], "cache") == 0 ||</div><div class='del'>-			 strcmp(argv[i], "hwcache") == 0)</div><div class='del'>-			print_hwcache_events(&amp;print_cb, ps);</div><div class='del'>-		else if (strcmp(argv[i], "pmu") == 0) {</div><div class='del'>-			default_ps.exclude_abi = true;</div><div class='add'>+			   strcmp(argv[i], "hwcache") == 0) {</div><div class='add'>+			char *old_event_glob = ps-&gt;event_glob;</div><div class='add'>+</div><div class='add'>+			ps-&gt;event_glob = strdup("legacy cache");</div><div class='add'>+			if (!ps-&gt;event_glob) {</div><div class='add'>+				ret = -1;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='ctx'> 			perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='del'>-			default_ps.exclude_abi = false;</div><div class='add'>+			zfree(&amp;ps-&gt;event_glob);</div><div class='add'>+			ps-&gt;event_glob = old_event_glob;</div><div class='add'>+		} else if (strcmp(argv[i], "pmu") == 0) {</div><div class='add'>+			ps-&gt;exclude_abi = true;</div><div class='add'>+			perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='add'>+			ps-&gt;exclude_abi = false;</div><div class='ctx'> 		} else if (strcmp(argv[i], "sdt") == 0)</div><div class='ctx'> 			print_sdt_events(&amp;print_cb, ps);</div><div class='ctx'> 		else if (strcmp(argv[i], "metric") == 0 || strcmp(argv[i], "metrics") == 0) {</div><div class='del'>-			default_ps.metricgroups = false;</div><div class='del'>-			default_ps.metrics = true;</div><div class='add'>+			ps-&gt;metricgroups = false;</div><div class='add'>+			ps-&gt;metrics = true;</div><div class='ctx'> 			metricgroup__print(&amp;print_cb, ps);</div><div class='ctx'> 		} else if (strcmp(argv[i], "metricgroup") == 0 ||</div><div class='ctx'> 			   strcmp(argv[i], "metricgroups") == 0) {</div><div class='del'>-			default_ps.metricgroups = true;</div><div class='del'>-			default_ps.metrics = false;</div><div class='add'>+			ps-&gt;metricgroups = true;</div><div class='add'>+			ps-&gt;metrics = false;</div><div class='ctx'> 			metricgroup__print(&amp;print_cb, ps);</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef HAVE_LIBPFM</div><div class='hunk'>@@ -675,43 +721,40 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> 			print_libpfm_events(&amp;print_cb, ps);</div><div class='ctx'> #endif</div><div class='ctx'> 		else if ((sep = strchr(argv[i], ':')) != NULL) {</div><div class='del'>-			char *old_pmu_glob = default_ps.pmu_glob;</div><div class='del'>-			char *old_event_glob = default_ps.event_glob;</div><div class='add'>+			char *old_pmu_glob = ps-&gt;pmu_glob;</div><div class='add'>+			char *old_event_glob = ps-&gt;event_glob;</div><div class='ctx'> </div><div class='del'>-			default_ps.event_glob = strdup(argv[i]);</div><div class='del'>-			if (!default_ps.event_glob) {</div><div class='add'>+			ps-&gt;event_glob = strdup(argv[i]);</div><div class='add'>+			if (!ps-&gt;event_glob) {</div><div class='ctx'> 				ret = -1;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			default_ps.pmu_glob = strdup("tracepoint");</div><div class='del'>-			if (!default_ps.pmu_glob) {</div><div class='del'>-				zfree(&amp;default_ps.event_glob);</div><div class='add'>+			ps-&gt;pmu_glob = strdup("tracepoint");</div><div class='add'>+			if (!ps-&gt;pmu_glob) {</div><div class='add'>+				zfree(&amp;ps-&gt;event_glob);</div><div class='ctx'> 				ret = -1;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 			perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='del'>-			zfree(&amp;default_ps.pmu_glob);</div><div class='del'>-			default_ps.pmu_glob = old_pmu_glob;</div><div class='add'>+			zfree(&amp;ps-&gt;pmu_glob);</div><div class='add'>+			ps-&gt;pmu_glob = old_pmu_glob;</div><div class='ctx'> 			print_sdt_events(&amp;print_cb, ps);</div><div class='del'>-			default_ps.metrics = true;</div><div class='del'>-			default_ps.metricgroups = true;</div><div class='add'>+			ps-&gt;metrics = true;</div><div class='add'>+			ps-&gt;metricgroups = true;</div><div class='ctx'> 			metricgroup__print(&amp;print_cb, ps);</div><div class='del'>-			zfree(&amp;default_ps.event_glob);</div><div class='del'>-			default_ps.event_glob = old_event_glob;</div><div class='add'>+			zfree(&amp;ps-&gt;event_glob);</div><div class='add'>+			ps-&gt;event_glob = old_event_glob;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (asprintf(&amp;s, "*%s*", argv[i]) &lt; 0) {</div><div class='ctx'> 				printf("Critical: Not enough memory! Trying to continue...\n");</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-			default_ps.event_glob = s;</div><div class='del'>-			print_symbol_events(&amp;print_cb, ps, PERF_TYPE_HARDWARE,</div><div class='del'>-					event_symbols_hw, PERF_COUNT_HW_MAX);</div><div class='del'>-			print_hwcache_events(&amp;print_cb, ps);</div><div class='add'>+			ps-&gt;event_glob = s;</div><div class='ctx'> 			perf_pmus__print_pmu_events(&amp;print_cb, ps);</div><div class='ctx'> 			print_sdt_events(&amp;print_cb, ps);</div><div class='del'>-			default_ps.metrics = true;</div><div class='del'>-			default_ps.metricgroups = true;</div><div class='add'>+			ps-&gt;metrics = true;</div><div class='add'>+			ps-&gt;metricgroups = true;</div><div class='ctx'> 			metricgroup__print(&amp;print_cb, ps);</div><div class='ctx'> 			free(s);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -719,12 +762,12 @@ int cmd_list(int argc, const char **argv)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	print_cb.print_end(ps);</div><div class='del'>-	free(default_ps.pmu_glob);</div><div class='del'>-	free(default_ps.last_topic);</div><div class='del'>-	free(default_ps.last_metricgroups);</div><div class='del'>-	strlist__delete(default_ps.visited_metrics);</div><div class='add'>+	free(ps-&gt;pmu_glob);</div><div class='add'>+	free(ps-&gt;last_topic);</div><div class='add'>+	free(ps-&gt;last_metricgroups);</div><div class='add'>+	strlist__delete(ps-&gt;visited_metrics);</div><div class='ctx'> 	if (output_path)</div><div class='del'>-		fclose(default_ps.fp);</div><div class='add'>+		fclose(ps-&gt;fp);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/builtin-lock.c b/tools/perf/builtin-lock.c<br/>index fd49703021fd..e8962c985d34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-lock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-lock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-lock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-lock.c</a></div><div class='hunk'>@@ -1867,6 +1867,7 @@ static int __cmd_report(bool display_info)</div><div class='ctx'> 	eops.sample		 = process_sample_event;</div><div class='ctx'> 	eops.comm		 = perf_event__process_comm;</div><div class='ctx'> 	eops.mmap		 = perf_event__process_mmap;</div><div class='add'>+	eops.mmap2		 = perf_event__process_mmap2;</div><div class='ctx'> 	eops.namespaces		 = perf_event__process_namespaces;</div><div class='ctx'> 	eops.tracing_data	 = perf_event__process_tracing_data;</div><div class='ctx'> 	session = perf_session__new(&amp;data, &amp;eops);</div><div class='hunk'>@@ -2009,6 +2010,7 @@ static int __cmd_contention(int argc, const char **argv)</div><div class='ctx'> 		.owner = show_lock_owner,</div><div class='ctx'> 		.cgroups = RB_ROOT,</div><div class='ctx'> 	};</div><div class='add'>+	struct perf_env host_env;</div><div class='ctx'> </div><div class='ctx'> 	lockhash_table = calloc(LOCKHASH_SIZE, sizeof(*lockhash_table));</div><div class='ctx'> 	if (!lockhash_table)</div><div class='hunk'>@@ -2022,9 +2024,13 @@ static int __cmd_contention(int argc, const char **argv)</div><div class='ctx'> 	eops.sample		 = process_sample_event;</div><div class='ctx'> 	eops.comm		 = perf_event__process_comm;</div><div class='ctx'> 	eops.mmap		 = perf_event__process_mmap;</div><div class='add'>+	eops.mmap2		 = perf_event__process_mmap2;</div><div class='ctx'> 	eops.tracing_data	 = perf_event__process_tracing_data;</div><div class='ctx'> </div><div class='del'>-	session = perf_session__new(use_bpf ? NULL : &amp;data, &amp;eops);</div><div class='add'>+	perf_env__init(&amp;host_env);</div><div class='add'>+	session = __perf_session__new(use_bpf ? NULL : &amp;data, &amp;eops,</div><div class='add'>+				/*trace_event_repipe=*/false, &amp;host_env);</div><div class='add'>+</div><div class='ctx'> 	if (IS_ERR(session)) {</div><div class='ctx'> 		pr_err("Initializing perf session failed\n");</div><div class='ctx'> 		err = PTR_ERR(session);</div><div class='hunk'>@@ -2142,6 +2148,7 @@ out_delete:</div><div class='ctx'> 	evlist__delete(con.evlist);</div><div class='ctx'> 	lock_contention_finish(&amp;con);</div><div class='ctx'> 	perf_session__delete(session);</div><div class='add'>+	perf_env__exit(&amp;host_env);</div><div class='ctx'> 	zfree(&amp;lockhash_table);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/builtin-mem.c b/tools/perf/builtin-mem.c<br/>index c6496adff3fe..d43500b92a7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-mem.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-mem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-mem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-mem.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='head'>diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c<br/>index 7ea3a11aca70..2584d0d8bc82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-record.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-record.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-record.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-record.c</a></div><div class='hunk'>@@ -730,8 +730,6 @@ static void record__sig_exit(void)</div><div class='ctx'> 	raise(signr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='del'>-</div><div class='ctx'> static int record__process_auxtrace(const struct perf_tool *tool,</div><div class='ctx'> 				    struct mmap *map,</div><div class='ctx'> 				    union perf_event *event, void *data1,</div><div class='hunk'>@@ -889,40 +887,6 @@ static int record__auxtrace_init(struct record *rec)</div><div class='ctx'> 	return auxtrace_parse_filters(rec-&gt;evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int record__auxtrace_mmap_read(struct record *rec __maybe_unused,</div><div class='del'>-			       struct mmap *map __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void record__read_auxtrace_snapshot(struct record *rec __maybe_unused,</div><div class='del'>-				    bool on_exit __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_record__snapshot_start(struct auxtrace_record *itr __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int record__auxtrace_snapshot_exit(struct record *rec __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int record__auxtrace_init(struct record *rec __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int record__config_text_poke(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel;</div><div class='hunk'>@@ -983,7 +947,6 @@ static int record__config_tracking_events(struct record *rec)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (opts-&gt;target.initial_delay || target__has_cpu(&amp;opts-&gt;target) ||</div><div class='ctx'> 	    perf_pmus__num_core_pmus() &gt; 1) {</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * User space tasks can migrate between CPUs, so when tracing</div><div class='ctx'> 		 * selected CPUs, sideband for all CPUs is still needed.</div><div class='hunk'>@@ -1388,10 +1351,27 @@ static int record__open(struct record *rec)</div><div class='ctx'> 	struct perf_session *session = rec-&gt;session;</div><div class='ctx'> 	struct record_opts *opts = &amp;rec-&gt;opts;</div><div class='ctx'> 	int rc = 0;</div><div class='add'>+	bool skipped = false;</div><div class='add'>+	bool removed_tracking = false;</div><div class='ctx'> </div><div class='ctx'> 	evlist__for_each_entry(evlist, pos) {</div><div class='add'>+		if (removed_tracking) {</div><div class='add'>+			/*</div><div class='add'>+			 * Normally the head of the list has tracking enabled</div><div class='add'>+			 * for sideband data like mmaps. If this event is</div><div class='add'>+			 * removed, make sure to add tracking to the next</div><div class='add'>+			 * processed event.</div><div class='add'>+			 */</div><div class='add'>+			if (!pos-&gt;tracking) {</div><div class='add'>+				pos-&gt;tracking = true;</div><div class='add'>+				evsel__config(pos, opts, &amp;callchain_param);</div><div class='add'>+			}</div><div class='add'>+			removed_tracking = false;</div><div class='add'>+		}</div><div class='ctx'> try_again:</div><div class='ctx'> 		if (evsel__open(pos, pos-&gt;core.cpus, pos-&gt;core.threads) &lt; 0) {</div><div class='add'>+			bool report_error = true;</div><div class='add'>+</div><div class='ctx'> 			if (evsel__fallback(pos, &amp;opts-&gt;target, errno, msg, sizeof(msg))) {</div><div class='ctx'> 				if (verbose &gt; 0)</div><div class='ctx'> 					ui__warning("%s\n", msg);</div><div class='hunk'>@@ -1403,15 +1383,72 @@ try_again:</div><div class='ctx'> 			        pos = evlist__reset_weak_group(evlist, pos, true);</div><div class='ctx'> 				goto try_again;</div><div class='ctx'> 			}</div><div class='del'>-			rc = -errno;</div><div class='del'>-			evsel__open_strerror(pos, &amp;opts-&gt;target, errno, msg, sizeof(msg));</div><div class='del'>-			ui__error("%s\n", msg);</div><div class='del'>-			goto out;</div><div class='add'>+#if defined(__aarch64__) || defined(__arm__)</div><div class='add'>+			if (strstr(evsel__name(pos), "cycles")) {</div><div class='add'>+				struct evsel *pos2;</div><div class='add'>+				/*</div><div class='add'>+				 * Unfortunately ARM has many events named</div><div class='add'>+				 * "cycles" on PMUs like the system-level (L3)</div><div class='add'>+				 * cache which don't support sampling. Only</div><div class='add'>+				 * display such failures to open when there is</div><div class='add'>+				 * only 1 cycles event or verbose is enabled.</div><div class='add'>+				 */</div><div class='add'>+				evlist__for_each_entry(evlist, pos2) {</div><div class='add'>+					if (pos2 == pos)</div><div class='add'>+						continue;</div><div class='add'>+					if (strstr(evsel__name(pos2), "cycles")) {</div><div class='add'>+						report_error = false;</div><div class='add'>+						break;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+#endif</div><div class='add'>+			if (report_error || verbose &gt; 0) {</div><div class='add'>+				ui__error("Failure to open event '%s' on PMU '%s' which will be "</div><div class='add'>+					  "removed.\n%s\n",</div><div class='add'>+					  evsel__name(pos), evsel__pmu_name(pos), msg);</div><div class='add'>+			}</div><div class='add'>+			if (pos-&gt;tracking)</div><div class='add'>+				removed_tracking = true;</div><div class='add'>+			pos-&gt;skippable = true;</div><div class='add'>+			skipped = true;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		pos-&gt;supported = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (skipped) {</div><div class='add'>+		struct evsel *tmp;</div><div class='add'>+		int idx = 0;</div><div class='add'>+		bool evlist_empty = true;</div><div class='add'>+</div><div class='add'>+		/* Remove evsels that failed to open and update indices. */</div><div class='add'>+		evlist__for_each_entry_safe(evlist, tmp, pos) {</div><div class='add'>+			if (pos-&gt;skippable) {</div><div class='add'>+				evlist__remove(evlist, pos);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Note, dummy events may be command line parsed or</div><div class='add'>+			 * added by the tool. We care about supporting `perf</div><div class='add'>+			 * record -e dummy` which may be used as a permission</div><div class='add'>+			 * check. Dummy events that are added to the command</div><div class='add'>+			 * line and opened along with other events that fail,</div><div class='add'>+			 * will still fail as if the dummy events were tool</div><div class='add'>+			 * added events for the sake of code simplicity.</div><div class='add'>+			 */</div><div class='add'>+			if (!evsel__is_dummy_event(pos))</div><div class='add'>+				evlist_empty = false;</div><div class='add'>+		}</div><div class='add'>+		evlist__for_each_entry(evlist, pos) {</div><div class='add'>+			pos-&gt;core.idx = idx++;</div><div class='add'>+		}</div><div class='add'>+		/* If list is empty then fail. */</div><div class='add'>+		if (evlist_empty) {</div><div class='add'>+			ui__error("Failure to open any events for recording.\n");</div><div class='add'>+			rc = -1;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	if (symbol_conf.kptr_restrict &amp;&amp; !evlist__exclude_kernel(evlist)) {</div><div class='ctx'> 		pr_warning(</div><div class='ctx'> "WARNING: Kernel address maps (/proc/{kallsyms,modules}) are restricted,\n"</div><div class='hunk'>@@ -1817,15 +1854,14 @@ record__finish_output(struct record *rec)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Buildid scanning disabled or build ID in kernel and synthesized map events. */</div><div class='del'>-	if (!rec-&gt;no_buildid) {</div><div class='add'>+	if (!rec-&gt;no_buildid || !rec-&gt;no_buildid_cache) {</div><div class='ctx'> 		process_buildids(rec);</div><div class='ctx'> </div><div class='ctx'> 		if (rec-&gt;buildid_all)</div><div class='ctx'> 			perf_session__dsos_hit_all(rec-&gt;session);</div><div class='ctx'> 	}</div><div class='ctx'> 	perf_session__write_header(rec-&gt;session, rec-&gt;evlist, fd, true);</div><div class='del'>-</div><div class='del'>-	return;</div><div class='add'>+	perf_session__cache_build_ids(rec-&gt;session);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int record__synthesize_workload(struct record *rec, bool tail)</div><div class='hunk'>@@ -2885,11 +2921,11 @@ out_free_threads:</div><div class='ctx'> 		rec-&gt;bytes_written += off_cpu_write(rec-&gt;session);</div><div class='ctx'> </div><div class='ctx'> 	record__read_lost_samples(rec);</div><div class='del'>-	record__synthesize(rec, true);</div><div class='ctx'> 	/* this will be recalculated during process_buildids() */</div><div class='ctx'> 	rec-&gt;samples = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!err) {</div><div class='add'>+		record__synthesize(rec, true);</div><div class='ctx'> 		if (!rec-&gt;timestamp_filename) {</div><div class='ctx'> 			record__finish_output(rec);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -3010,7 +3046,7 @@ static int perf_record_config(const char *var, const char *value, void *cb)</div><div class='ctx'> 		else if (!strcmp(value, "no-cache"))</div><div class='ctx'> 			rec-&gt;no_buildid_cache = true;</div><div class='ctx'> 		else if (!strcmp(value, "skip"))</div><div class='del'>-			rec-&gt;no_buildid = true;</div><div class='add'>+			rec-&gt;no_buildid = rec-&gt;no_buildid_cache = true;</div><div class='ctx'> 		else if (!strcmp(value, "mmap"))</div><div class='ctx'> 			rec-&gt;buildid_mmap = true;</div><div class='ctx'> 		else if (!strcmp(value, "no-mmap"))</div><div class='hunk'>@@ -4119,24 +4155,25 @@ int cmd_record(int argc, const char **argv)</div><div class='ctx'> 		record.opts.record_switch_events = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!rec-&gt;buildid_mmap) {</div><div class='del'>-		pr_debug("Disabling build id in synthesized mmap2 events.\n");</div><div class='del'>-		symbol_conf.no_buildid_mmap2 = true;</div><div class='del'>-	} else if (rec-&gt;buildid_mmap_set) {</div><div class='del'>-		/*</div><div class='del'>-		 * Explicitly passing --buildid-mmap disables buildid processing</div><div class='del'>-		 * and cache generation.</div><div class='del'>-		 */</div><div class='del'>-		rec-&gt;no_buildid = true;</div><div class='del'>-	}</div><div class='ctx'> 	if (rec-&gt;buildid_mmap &amp;&amp; !perf_can_record_build_id()) {</div><div class='ctx'> 		pr_warning("Missing support for build id in kernel mmap events.\n"</div><div class='ctx'> 			   "Disable this warning with --no-buildid-mmap\n");</div><div class='ctx'> 		rec-&gt;buildid_mmap = false;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (rec-&gt;buildid_mmap) {</div><div class='ctx'> 		/* Enable perf_event_attr::build_id bit. */</div><div class='ctx'> 		rec-&gt;opts.build_id = true;</div><div class='add'>+		/* Disable build-ID table in the header. */</div><div class='add'>+		rec-&gt;no_buildid = true;</div><div class='add'>+	} else {</div><div class='add'>+		pr_debug("Disabling build id in synthesized mmap2 events.\n");</div><div class='add'>+		symbol_conf.no_buildid_mmap2 = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rec-&gt;no_buildid_set &amp;&amp; rec-&gt;no_buildid) {</div><div class='add'>+		/* -B implies -N for historic reasons. */</div><div class='add'>+		rec-&gt;no_buildid_cache = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rec-&gt;opts.record_cgroup &amp;&amp; !perf_can_record_cgroup()) {</div><div class='hunk'>@@ -4233,7 +4270,7 @@ int cmd_record(int argc, const char **argv)</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (rec-&gt;no_buildid_cache || rec-&gt;no_buildid) {</div><div class='add'>+	if (rec-&gt;no_buildid_cache) {</div><div class='ctx'> 		disable_buildid_cache();</div><div class='ctx'> 	} else if (rec-&gt;switch_output.enabled) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -4268,9 +4305,13 @@ int cmd_record(int argc, const char **argv)</div><div class='ctx'> 		record.opts.tail_synthesize = true;</div><div class='ctx'> </div><div class='ctx'> 	if (rec-&gt;evlist-&gt;core.nr_entries == 0) {</div><div class='del'>-		err = parse_event(rec-&gt;evlist, "cycles:P");</div><div class='del'>-		if (err)</div><div class='add'>+		struct evlist *def_evlist = evlist__new_default();</div><div class='add'>+</div><div class='add'>+		if (!def_evlist)</div><div class='ctx'> 			goto out;</div><div class='add'>+</div><div class='add'>+		evlist__splice_list_tail(rec-&gt;evlist, &amp;def_evlist-&gt;core.entries);</div><div class='add'>+		evlist__delete(def_evlist);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rec-&gt;opts.target.tid &amp;&amp; !rec-&gt;opts.no_inherit_set)</div><div class='head'>diff --git a/tools/perf/builtin-report.c b/tools/perf/builtin-report.c<br/>index 35df04dad2fd..add6b1c2aaf0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-report.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-report.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-report.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-report.c</a></div><div class='hunk'>@@ -240,10 +240,11 @@ static void setup_forced_leader(struct report *report,</div><div class='ctx'> 		evlist__force_leader(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_feature_event(struct perf_session *session,</div><div class='add'>+static int process_feature_event(const struct perf_tool *tool,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	struct report *rep = container_of(session-&gt;tool, struct report, tool);</div><div class='add'>+	struct report *rep = container_of(tool, struct report, tool);</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;feat.feat_id &lt; HEADER_LAST_FEATURE)</div><div class='ctx'> 		return perf_event__process_feature(session, event);</div><div class='hunk'>@@ -1613,6 +1614,7 @@ repeat:</div><div class='ctx'> 	report.tool.event_update	 = perf_event__process_event_update;</div><div class='ctx'> 	report.tool.feature		 = process_feature_event;</div><div class='ctx'> 	report.tool.ordering_requires_timestamps = true;</div><div class='add'>+	report.tool.merge_deferred_callchains = !dump_trace;</div><div class='ctx'> </div><div class='ctx'> 	session = perf_session__new(&amp;data, &amp;report.tool);</div><div class='ctx'> 	if (IS_ERR(session)) {</div><div class='head'>diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c<br/>index f166d6cbc083..eca3b1c58c4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-sched.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-sched.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-sched.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-sched.c</a></div><div class='hunk'>@@ -1532,35 +1532,24 @@ static int process_sched_wakeup_ignore(const struct perf_tool *tool __maybe_unus</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-union map_priv {</div><div class='del'>-	void	*ptr;</div><div class='del'>-	bool	 color;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static bool thread__has_color(struct thread *thread)</div><div class='ctx'> {</div><div class='del'>-	union map_priv priv = {</div><div class='del'>-		.ptr = thread__priv(thread),</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return priv.color;</div><div class='add'>+	return thread__priv(thread) != NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct thread*</div><div class='ctx'> map__findnew_thread(struct perf_sched *sched, struct machine *machine, pid_t pid, pid_t tid)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread *thread = machine__findnew_thread(machine, pid, tid);</div><div class='del'>-	union map_priv priv = {</div><div class='del'>-		.color = false,</div><div class='del'>-	};</div><div class='add'>+	bool color = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!sched-&gt;map.color_pids || !thread || thread__priv(thread))</div><div class='ctx'> 		return thread;</div><div class='ctx'> </div><div class='ctx'> 	if (thread_map__has(sched-&gt;map.color_pids, tid))</div><div class='del'>-		priv.color = true;</div><div class='add'>+		color = true;</div><div class='ctx'> </div><div class='del'>-	thread__set_priv(thread, priv.ptr);</div><div class='add'>+	thread__set_priv(thread, color ? ((void*)1) : NULL);</div><div class='ctx'> 	return thread;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c<br/>index d9fbdcf72f25..62e43d3c5ad7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-script.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-script.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-script.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-script.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include "util/path.h"</div><div class='ctx'> #include "util/event.h"</div><div class='ctx'> #include "util/mem-info.h"</div><div class='add'>+#include "util/metricgroup.h"</div><div class='ctx'> #include "ui/ui.h"</div><div class='ctx'> #include "print_binary.h"</div><div class='ctx'> #include "print_insn.h"</div><div class='hunk'>@@ -43,6 +44,7 @@</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> #include &lt;linux/time64.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;sys/utsname.h&gt;</div><div class='ctx'> #include "asm/bug.h"</div><div class='ctx'> #include "util/mem-events.h"</div><div class='hunk'>@@ -223,7 +225,7 @@ enum {</div><div class='ctx'> 	OUTPUT_TYPE_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-// We need to refactor the evsel-&gt;priv use in in 'perf script' to allow for</div><div class='add'>+// We need to refactor the evsel-&gt;priv use in 'perf script' to allow for</div><div class='ctx'> // using that area, that is being used only in some cases.</div><div class='ctx'> #define OUTPUT_TYPE_UNSET -1</div><div class='ctx'> </div><div class='hunk'>@@ -340,16 +342,8 @@ struct evsel_script {</div><div class='ctx'>        char *filename;</div><div class='ctx'>        FILE *fp;</div><div class='ctx'>        u64  samples;</div><div class='del'>-       /* For metric output */</div><div class='del'>-       u64  val;</div><div class='del'>-       int  gnum;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline struct evsel_script *evsel_script(struct evsel *evsel)</div><div class='del'>-{</div><div class='del'>-	return (struct evsel_script *)evsel-&gt;priv;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct evsel_script *evsel_script__new(struct evsel *evsel, struct perf_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel_script *es = zalloc(sizeof(*es));</div><div class='hunk'>@@ -1224,7 +1218,6 @@ static int any_dump_insn(struct evsel *evsel __maybe_unused,</div><div class='ctx'> 			 u8 *inbuf, int inlen, int *lenp,</div><div class='ctx'> 			 FILE *fp)</div><div class='ctx'> {</div><div class='del'>-#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='ctx'> 	if (PRINT_FIELD(BRSTACKDISASM)) {</div><div class='ctx'> 		int printed = fprintf_insn_asm(x-&gt;machine, x-&gt;thread, x-&gt;cpumode, x-&gt;is64bit,</div><div class='ctx'> 					       (uint8_t *)inbuf, inlen, ip, lenp,</div><div class='hunk'>@@ -1233,7 +1226,6 @@ static int any_dump_insn(struct evsel *evsel __maybe_unused,</div><div class='ctx'> 		if (printed &gt; 0)</div><div class='ctx'> 			return printed;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	return fprintf(fp, "%s", dump_insn(x, ip, inbuf, inlen, lenp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2003,6 +1995,25 @@ static int perf_sample__fprintf_synth_iflag_chg(struct perf_sample *sample, FILE</div><div class='ctx'> 	return len + perf_sample__fprintf_pt_spacing(len, fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int perf_sample__fprintf_synth_vpadtl(struct perf_sample *data, FILE *fp)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl_entry *dtl = (struct powerpc_vpadtl_entry *)data-&gt;raw_data;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = fprintf(fp, "timebase: %" PRIu64 " dispatch_reason:%s, preempt_reason:%s,\n"</div><div class='add'>+			"enqueue_to_dispatch_time:%d, ready_to_enqueue_time:%d,"</div><div class='add'>+			"waiting_to_ready_time:%d, processor_id: %d",</div><div class='add'>+			get_unaligned_be64(&amp;dtl-&gt;timebase),</div><div class='add'>+			dispatch_reasons[dtl-&gt;dispatch_reason],</div><div class='add'>+			preempt_reasons[dtl-&gt;preempt_reason],</div><div class='add'>+			be32_to_cpu(dtl-&gt;enqueue_to_dispatch_time),</div><div class='add'>+			be32_to_cpu(dtl-&gt;ready_to_enqueue_time),</div><div class='add'>+			be32_to_cpu(dtl-&gt;waiting_to_ready_time),</div><div class='add'>+			be16_to_cpu(dtl-&gt;processor_id));</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int perf_sample__fprintf_synth(struct perf_sample *sample,</div><div class='ctx'> 				      struct evsel *evsel, FILE *fp)</div><div class='ctx'> {</div><div class='hunk'>@@ -2025,6 +2036,8 @@ static int perf_sample__fprintf_synth(struct perf_sample *sample,</div><div class='ctx'> 		return perf_sample__fprintf_synth_evt(sample, fp);</div><div class='ctx'> 	case PERF_SYNTH_INTEL_IFLAG_CHG:</div><div class='ctx'> 		return perf_sample__fprintf_synth_iflag_chg(sample, fp);</div><div class='add'>+	case PERF_SYNTH_POWERPC_VPA_DTL:</div><div class='add'>+		return perf_sample__fprintf_synth_vpadtl(sample, fp);</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2104,13 +2117,161 @@ static void script_new_line(struct perf_stat_config *config __maybe_unused,</div><div class='ctx'> 	fputs("\tmetric: ", mctx-&gt;fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void perf_sample__fprint_metric(struct perf_script *script,</div><div class='del'>-				       struct thread *thread,</div><div class='add'>+struct script_find_metrics_args {</div><div class='add'>+	struct evlist *evlist;</div><div class='add'>+	bool system_wide;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct evsel *map_metric_evsel_to_script_evsel(struct evlist *script_evlist,</div><div class='add'>+						      struct evsel *metric_evsel)</div><div class='add'>+{</div><div class='add'>+	struct evsel *script_evsel;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(script_evlist, script_evsel) {</div><div class='add'>+		/* Skip if perf_event_attr differ. */</div><div class='add'>+		if (metric_evsel-&gt;core.attr.type != script_evsel-&gt;core.attr.type)</div><div class='add'>+			continue;</div><div class='add'>+		if (metric_evsel-&gt;core.attr.config != script_evsel-&gt;core.attr.config)</div><div class='add'>+			continue;</div><div class='add'>+		/* Skip if the script event has a metric_id that doesn't match. */</div><div class='add'>+		if (script_evsel-&gt;metric_id &amp;&amp;</div><div class='add'>+		    strcmp(evsel__metric_id(metric_evsel), evsel__metric_id(script_evsel))) {</div><div class='add'>+			pr_debug("Skipping matching evsel due to differing metric ids '%s' vs '%s'\n",</div><div class='add'>+				 evsel__metric_id(metric_evsel), evsel__metric_id(script_evsel));</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		return script_evsel;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int script_find_metrics(const struct pmu_metric *pm,</div><div class='add'>+			       const struct pmu_metrics_table *table __maybe_unused,</div><div class='add'>+			       void *data)</div><div class='add'>+{</div><div class='add'>+	struct script_find_metrics_args *args = data;</div><div class='add'>+	struct evlist *script_evlist = args-&gt;evlist;</div><div class='add'>+	struct evlist *metric_evlist = evlist__new();</div><div class='add'>+	struct evsel *metric_evsel;</div><div class='add'>+	int ret = metricgroup__parse_groups(metric_evlist,</div><div class='add'>+					/*pmu=*/"all",</div><div class='add'>+					pm-&gt;metric_name,</div><div class='add'>+					/*metric_no_group=*/false,</div><div class='add'>+					/*metric_no_merge=*/false,</div><div class='add'>+					/*metric_no_threshold=*/true,</div><div class='add'>+					/*user_requested_cpu_list=*/NULL,</div><div class='add'>+					args-&gt;system_wide,</div><div class='add'>+					/*hardware_aware_grouping=*/false);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Metric parsing failed but continue the search. */</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check the script_evlist has an entry for each metric_evlist entry. If</div><div class='add'>+	 * the script evsel was already set up avoid changing data that may</div><div class='add'>+	 * break it.</div><div class='add'>+	 */</div><div class='add'>+	evlist__for_each_entry(metric_evlist, metric_evsel) {</div><div class='add'>+		struct evsel *script_evsel =</div><div class='add'>+			map_metric_evsel_to_script_evsel(script_evlist, metric_evsel);</div><div class='add'>+		struct evsel *new_metric_leader;</div><div class='add'>+</div><div class='add'>+		if (!script_evsel) {</div><div class='add'>+			pr_debug("Skipping metric '%s' as evsel '%s' / '%s' is missing\n",</div><div class='add'>+				pm-&gt;metric_name, evsel__name(metric_evsel),</div><div class='add'>+				evsel__metric_id(metric_evsel));</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (script_evsel-&gt;metric_leader == NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (metric_evsel-&gt;metric_leader == metric_evsel) {</div><div class='add'>+			new_metric_leader = script_evsel;</div><div class='add'>+		} else {</div><div class='add'>+			new_metric_leader =</div><div class='add'>+				map_metric_evsel_to_script_evsel(script_evlist,</div><div class='add'>+								 metric_evsel-&gt;metric_leader);</div><div class='add'>+		}</div><div class='add'>+		/* Mismatching evsel leaders. */</div><div class='add'>+		if (script_evsel-&gt;metric_leader != new_metric_leader) {</div><div class='add'>+			pr_debug("Skipping metric '%s' due to mismatching evsel metric leaders '%s' vs '%s'\n",</div><div class='add'>+				pm-&gt;metric_name, evsel__metric_id(metric_evsel),</div><div class='add'>+				evsel__metric_id(script_evsel));</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Metric events match those in the script evlist, copy metric evsel</div><div class='add'>+	 * data into the script evlist.</div><div class='add'>+	 */</div><div class='add'>+	evlist__for_each_entry(metric_evlist, metric_evsel) {</div><div class='add'>+		struct evsel *script_evsel =</div><div class='add'>+			map_metric_evsel_to_script_evsel(script_evlist, metric_evsel);</div><div class='add'>+		struct metric_event *metric_me = metricgroup__lookup(&amp;metric_evlist-&gt;metric_events,</div><div class='add'>+								     metric_evsel,</div><div class='add'>+								     /*create=*/false);</div><div class='add'>+</div><div class='add'>+		if (script_evsel-&gt;metric_id == NULL) {</div><div class='add'>+			script_evsel-&gt;metric_id = metric_evsel-&gt;metric_id;</div><div class='add'>+			metric_evsel-&gt;metric_id = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (script_evsel-&gt;metric_leader == NULL) {</div><div class='add'>+			if (metric_evsel-&gt;metric_leader == metric_evsel) {</div><div class='add'>+				script_evsel-&gt;metric_leader = script_evsel;</div><div class='add'>+			} else {</div><div class='add'>+				script_evsel-&gt;metric_leader =</div><div class='add'>+					map_metric_evsel_to_script_evsel(script_evlist,</div><div class='add'>+								       metric_evsel-&gt;metric_leader);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (metric_me) {</div><div class='add'>+			struct metric_expr *expr;</div><div class='add'>+			struct metric_event *script_me =</div><div class='add'>+				metricgroup__lookup(&amp;script_evlist-&gt;metric_events,</div><div class='add'>+						    script_evsel,</div><div class='add'>+						    /*create=*/true);</div><div class='add'>+</div><div class='add'>+			if (!script_me) {</div><div class='add'>+				/*</div><div class='add'>+				 * As the metric_expr is created, the only</div><div class='add'>+				 * failure is a lack of memory.</div><div class='add'>+				 */</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			list_splice_init(&amp;metric_me-&gt;head, &amp;script_me-&gt;head);</div><div class='add'>+			list_for_each_entry(expr, &amp;script_me-&gt;head, nd) {</div><div class='add'>+				for (int i = 0; expr-&gt;metric_events[i]; i++) {</div><div class='add'>+					expr-&gt;metric_events[i] =</div><div class='add'>+						map_metric_evsel_to_script_evsel(script_evlist,</div><div class='add'>+									expr-&gt;metric_events[i]);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	pr_debug("Found metric '%s' whose evsels match those of in the perf data\n",</div><div class='add'>+		 pm-&gt;metric_name);</div><div class='add'>+	evlist__delete(metric_evlist);</div><div class='add'>+out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct aggr_cpu_id script_aggr_cpu_id_get(struct perf_stat_config *config __maybe_unused,</div><div class='add'>+						    struct perf_cpu cpu)</div><div class='add'>+{</div><div class='add'>+	return aggr_cpu_id__global(cpu, /*data=*/NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void perf_sample__fprint_metric(struct thread *thread,</div><div class='ctx'> 				       struct evsel *evsel,</div><div class='ctx'> 				       struct perf_sample *sample,</div><div class='ctx'> 				       FILE *fp)</div><div class='ctx'> {</div><div class='del'>-	struct evsel *leader = evsel__leader(evsel);</div><div class='add'>+	static bool init_metrics;</div><div class='ctx'> 	struct perf_stat_output_ctx ctx = {</div><div class='ctx'> 		.print_metric = script_print_metric,</div><div class='ctx'> 		.new_line = script_new_line,</div><div class='hunk'>@@ -2122,23 +2283,84 @@ static void perf_sample__fprint_metric(struct perf_script *script,</div><div class='ctx'> 			 },</div><div class='ctx'> 		.force_header = false,</div><div class='ctx'> 	};</div><div class='del'>-	struct evsel *ev2;</div><div class='del'>-	u64 val;</div><div class='add'>+	struct perf_counts_values *count, *old_count;</div><div class='add'>+	int cpu_map_idx, thread_map_idx, aggr_idx;</div><div class='add'>+	struct evsel *pos;</div><div class='add'>+</div><div class='add'>+	if (!init_metrics) {</div><div class='add'>+		/* One time initialization of stat_config and metric data. */</div><div class='add'>+		struct script_find_metrics_args args = {</div><div class='add'>+			.evlist = evsel-&gt;evlist,</div><div class='add'>+			.system_wide = perf_thread_map__pid(evsel-&gt;core.threads, /*idx=*/0) == -1,</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+		if (!stat_config.output)</div><div class='add'>+			stat_config.output = stdout;</div><div class='add'>+</div><div class='add'>+		if (!stat_config.aggr_map) {</div><div class='add'>+			/* TODO: currently only global aggregation is supported. */</div><div class='add'>+			assert(stat_config.aggr_mode == AGGR_GLOBAL);</div><div class='add'>+			stat_config.aggr_get_id = script_aggr_cpu_id_get;</div><div class='add'>+			stat_config.aggr_map =</div><div class='add'>+				cpu_aggr_map__new(evsel-&gt;evlist-&gt;core.user_requested_cpus,</div><div class='add'>+						  aggr_cpu_id__global, /*data=*/NULL,</div><div class='add'>+						  /*needs_sort=*/false);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		metricgroup__for_each_metric(pmu_metrics_table__find(), script_find_metrics, &amp;args);</div><div class='add'>+		init_metrics = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!evsel-&gt;stats)</div><div class='del'>-		evlist__alloc_stats(&amp;stat_config, script-&gt;session-&gt;evlist, /*alloc_raw=*/false);</div><div class='del'>-	if (evsel_script(leader)-&gt;gnum++ == 0)</div><div class='del'>-		perf_stat__reset_shadow_stats();</div><div class='del'>-	val = sample-&gt;period * evsel-&gt;scale;</div><div class='del'>-	evsel_script(evsel)-&gt;val = val;</div><div class='del'>-	if (evsel_script(leader)-&gt;gnum == leader-&gt;core.nr_members) {</div><div class='del'>-		for_each_group_member (ev2, leader) {</div><div class='del'>-			perf_stat__print_shadow_stats(&amp;stat_config, ev2,</div><div class='del'>-						      evsel_script(ev2)-&gt;val,</div><div class='del'>-						      sample-&gt;cpu,</div><div class='del'>-						      &amp;ctx);</div><div class='add'>+	if (!evsel-&gt;stats) {</div><div class='add'>+		if (evlist__alloc_stats(&amp;stat_config, evsel-&gt;evlist, /*alloc_raw=*/true) &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+	if (!evsel-&gt;stats-&gt;aggr) {</div><div class='add'>+		if (evlist__alloc_aggr_stats(evsel-&gt;evlist, stat_config.aggr_map-&gt;nr) &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the evsel's count using the sample's data. */</div><div class='add'>+	cpu_map_idx = perf_cpu_map__idx(evsel-&gt;core.cpus, (struct perf_cpu){sample-&gt;cpu});</div><div class='add'>+	if (cpu_map_idx &lt; 0) {</div><div class='add'>+		/* Missing CPU, check for any CPU. */</div><div class='add'>+		if (perf_cpu_map__cpu(evsel-&gt;core.cpus, /*idx=*/0).cpu == -1 ||</div><div class='add'>+		    sample-&gt;cpu == (u32)-1) {</div><div class='add'>+			/* Place the counts in the which ever CPU is first in the map. */</div><div class='add'>+			cpu_map_idx = 0;</div><div class='add'>+		} else {</div><div class='add'>+			pr_info("Missing CPU map entry for CPU %d\n", sample-&gt;cpu);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	thread_map_idx = perf_thread_map__idx(evsel-&gt;core.threads, sample-&gt;tid);</div><div class='add'>+	if (thread_map_idx &lt; 0) {</div><div class='add'>+		/* Missing thread, check for any thread. */</div><div class='add'>+		if (perf_thread_map__pid(evsel-&gt;core.threads, /*idx=*/0) == -1 ||</div><div class='add'>+		    sample-&gt;tid == (u32)-1) {</div><div class='add'>+			/* Place the counts in the which ever thread is first in the map. */</div><div class='add'>+			thread_map_idx = 0;</div><div class='add'>+		} else {</div><div class='add'>+			pr_info("Missing thread map entry for thread %d\n", sample-&gt;tid);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	count = perf_counts(evsel-&gt;counts, cpu_map_idx, thread_map_idx);</div><div class='add'>+	old_count = perf_counts(evsel-&gt;prev_raw_counts, cpu_map_idx, thread_map_idx);</div><div class='add'>+	count-&gt;val = old_count-&gt;val + sample-&gt;period;</div><div class='add'>+	count-&gt;run = old_count-&gt;run + 1;</div><div class='add'>+	count-&gt;ena = old_count-&gt;ena + 1;</div><div class='add'>+</div><div class='add'>+	/* Update the aggregated stats. */</div><div class='add'>+	perf_stat_process_counter(&amp;stat_config, evsel);</div><div class='add'>+</div><div class='add'>+	/* Display all metrics. */</div><div class='add'>+	evlist__for_each_entry(evsel-&gt;evlist, pos) {</div><div class='add'>+		cpu_aggr_map__for_each_idx(aggr_idx, stat_config.aggr_map) {</div><div class='add'>+			perf_stat__print_shadow_stats(&amp;stat_config, pos,</div><div class='add'>+						aggr_idx,</div><div class='add'>+						&amp;ctx);</div><div class='ctx'> 		}</div><div class='del'>-		evsel_script(leader)-&gt;gnum = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2320,7 +2542,7 @@ static void process_event(struct perf_script *script,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (PRINT_FIELD(METRIC))</div><div class='del'>-		perf_sample__fprint_metric(script, thread, evsel, sample, fp);</div><div class='add'>+		perf_sample__fprint_metric(thread, evsel, sample, fp);</div><div class='ctx'> </div><div class='ctx'> 	if (verbose &gt; 0)</div><div class='ctx'> 		fflush(fp);</div><div class='hunk'>@@ -2484,6 +2706,94 @@ out_put:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int process_deferred_sample_event(const struct perf_tool *tool,</div><div class='add'>+					 union perf_event *event,</div><div class='add'>+					 struct perf_sample *sample,</div><div class='add'>+					 struct evsel *evsel,</div><div class='add'>+					 struct machine *machine)</div><div class='add'>+{</div><div class='add'>+	struct perf_script *scr = container_of(tool, struct perf_script, tool);</div><div class='add'>+	struct perf_event_attr *attr = &amp;evsel-&gt;core.attr;</div><div class='add'>+	struct evsel_script *es = evsel-&gt;priv;</div><div class='add'>+	unsigned int type = output_type(attr-&gt;type);</div><div class='add'>+	struct addr_location al;</div><div class='add'>+	FILE *fp = es-&gt;fp;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (output[type].fields == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Set thread to NULL to indicate addr_al and al are not initialized */</div><div class='add'>+	addr_location__init(&amp;al);</div><div class='add'>+</div><div class='add'>+	if (perf_time__ranges_skip_sample(scr-&gt;ptime_range, scr-&gt;range_num,</div><div class='add'>+					  sample-&gt;time)) {</div><div class='add'>+		goto out_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (debug_mode) {</div><div class='add'>+		if (sample-&gt;time &lt; last_timestamp) {</div><div class='add'>+			pr_err("Samples misordered, previous: %" PRIu64</div><div class='add'>+				" this: %" PRIu64 "\n", last_timestamp,</div><div class='add'>+				sample-&gt;time);</div><div class='add'>+			nr_unordered++;</div><div class='add'>+		}</div><div class='add'>+		last_timestamp = sample-&gt;time;</div><div class='add'>+		goto out_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (filter_cpu(sample))</div><div class='add'>+		goto out_put;</div><div class='add'>+</div><div class='add'>+	if (machine__resolve(machine, &amp;al, sample) &lt; 0) {</div><div class='add'>+		pr_err("problem processing %d event, skipping it.\n",</div><div class='add'>+		       event-&gt;header.type);</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto out_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (al.filtered)</div><div class='add'>+		goto out_put;</div><div class='add'>+</div><div class='add'>+	if (!show_event(sample, evsel, al.thread, &amp;al, NULL))</div><div class='add'>+		goto out_put;</div><div class='add'>+</div><div class='add'>+	if (evswitch__discard(&amp;scr-&gt;evswitch, evsel))</div><div class='add'>+		goto out_put;</div><div class='add'>+</div><div class='add'>+	perf_sample__fprintf_start(scr, sample, al.thread, evsel,</div><div class='add'>+				   PERF_RECORD_CALLCHAIN_DEFERRED, fp);</div><div class='add'>+	fprintf(fp, "DEFERRED CALLCHAIN [cookie: %llx]",</div><div class='add'>+		(unsigned long long)event-&gt;callchain_deferred.cookie);</div><div class='add'>+</div><div class='add'>+	if (PRINT_FIELD(IP)) {</div><div class='add'>+		struct callchain_cursor *cursor = NULL;</div><div class='add'>+</div><div class='add'>+		if (symbol_conf.use_callchain &amp;&amp; sample-&gt;callchain) {</div><div class='add'>+			cursor = get_tls_callchain_cursor();</div><div class='add'>+			if (thread__resolve_callchain(al.thread, cursor, evsel,</div><div class='add'>+						      sample, NULL, NULL,</div><div class='add'>+						      scripting_max_stack)) {</div><div class='add'>+				pr_info("cannot resolve deferred callchains\n");</div><div class='add'>+				cursor = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fputc(cursor ? '\n' : ' ', fp);</div><div class='add'>+		sample__fprintf_sym(sample, &amp;al, 0, output[type].print_ip_opts,</div><div class='add'>+				    cursor, symbol_conf.bt_stop_list, fp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fprintf(fp, "\n");</div><div class='add'>+</div><div class='add'>+	if (verbose &gt; 0)</div><div class='add'>+		fflush(fp);</div><div class='add'>+</div><div class='add'>+out_put:</div><div class='add'>+	addr_location__exit(&amp;al);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> // Used when scr-&gt;per_event_dump is not set</div><div class='ctx'> static struct evsel_script es_stdout;</div><div class='ctx'> </div><div class='hunk'>@@ -2701,7 +3011,8 @@ static int process_switch_event(const struct perf_tool *tool,</div><div class='ctx'> 			   sample-&gt;tid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_auxtrace_error(struct perf_session *session,</div><div class='add'>+static int process_auxtrace_error(const struct perf_tool *tool,</div><div class='add'>+				  struct perf_session *session,</div><div class='ctx'> 				  union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (scripting_ops &amp;&amp; scripting_ops-&gt;process_auxtrace_error) {</div><div class='hunk'>@@ -2709,7 +3020,7 @@ static int process_auxtrace_error(struct perf_session *session,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return perf_event__process_auxtrace_error(session, event);</div><div class='add'>+	return perf_event__process_auxtrace_error(tool, session, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2757,7 +3068,8 @@ process_bpf_events(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-process_bpf_metadata_event(struct perf_session *session __maybe_unused,</div><div class='add'>+process_bpf_metadata_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+			   struct perf_session *session __maybe_unused,</div><div class='ctx'> 			   union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	perf_event__fprintf(event, NULL, stdout);</div><div class='hunk'>@@ -3516,7 +3828,8 @@ static void script__setup_sample_type(struct perf_script *script)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_stat_round_event(struct perf_session *session,</div><div class='add'>+static int process_stat_round_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				    struct perf_session *session,</div><div class='ctx'> 				    union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_record_stat_round *round = &amp;event-&gt;stat_round;</div><div class='hunk'>@@ -3531,7 +3844,8 @@ static int process_stat_round_event(struct perf_session *session,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_stat_config_event(struct perf_session *session __maybe_unused,</div><div class='add'>+static int process_stat_config_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				     struct perf_session *session __maybe_unused,</div><div class='ctx'> 				     union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	perf_event__read_stat_config(&amp;stat_config, &amp;event-&gt;stat_config);</div><div class='hunk'>@@ -3565,10 +3879,10 @@ static int set_maps(struct perf_script *script)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_thread_map_event(struct perf_session *session,</div><div class='add'>+int process_thread_map_event(const struct perf_tool *tool,</div><div class='add'>+			     struct perf_session *session __maybe_unused,</div><div class='ctx'> 			     union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_script *script = container_of(tool, struct perf_script, tool);</div><div class='ctx'> </div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -3587,10 +3901,10 @@ int process_thread_map_event(struct perf_session *session,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_cpu_map_event(struct perf_session *session,</div><div class='add'>+int process_cpu_map_event(const struct perf_tool *tool,</div><div class='add'>+			  struct perf_session *session __maybe_unused,</div><div class='ctx'> 			  union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_script *script = container_of(tool, struct perf_script, tool);</div><div class='ctx'> </div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -3608,7 +3922,8 @@ int process_cpu_map_event(struct perf_session *session,</div><div class='ctx'> 	return set_maps(script);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_feature_event(struct perf_session *session,</div><div class='add'>+static int process_feature_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (event-&gt;feat.feat_id &lt; HEADER_LAST_FEATURE)</div><div class='hunk'>@@ -3616,14 +3931,13 @@ static int process_feature_event(struct perf_session *session,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='del'>-static int perf_script__process_auxtrace_info(struct perf_session *session,</div><div class='add'>+static int perf_script__process_auxtrace_info(const struct perf_tool *tool,</div><div class='add'>+					      struct perf_session *session,</div><div class='ctx'> 					      union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	int ret = perf_event__process_auxtrace_info(session, event);</div><div class='add'>+	int ret = perf_event__process_auxtrace_info(tool, session, event);</div><div class='ctx'> </div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 		struct perf_script *script = container_of(tool, struct perf_script, tool);</div><div class='ctx'> </div><div class='ctx'> 		ret = perf_script__setup_per_event_dump(script);</div><div class='hunk'>@@ -3631,9 +3945,6 @@ static int perf_script__process_auxtrace_info(struct perf_session *session,</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define perf_script__process_auxtrace_info 0</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static int parse_insn_trace(const struct option *opt __maybe_unused,</div><div class='ctx'> 			    const char *str, int unset __maybe_unused)</div><div class='hunk'>@@ -3698,6 +4009,7 @@ int cmd_script(int argc, const char **argv)</div><div class='ctx'> 	bool header_only = false;</div><div class='ctx'> 	bool script_started = false;</div><div class='ctx'> 	bool unsorted_dump = false;</div><div class='add'>+	bool merge_deferred_callchains = true;</div><div class='ctx'> 	char *rec_script_path = NULL;</div><div class='ctx'> 	char *rep_script_path = NULL;</div><div class='ctx'> 	struct perf_session *session;</div><div class='hunk'>@@ -3851,6 +4163,8 @@ int cmd_script(int argc, const char **argv)</div><div class='ctx'> 		    "Guest code can be found in hypervisor process"),</div><div class='ctx'> 	OPT_BOOLEAN('\0', "stitch-lbr", &amp;script.stitch_lbr,</div><div class='ctx'> 		    "Enable LBR callgraph stitching approach"),</div><div class='add'>+	OPT_BOOLEAN('\0', "merge-callchains", &amp;merge_deferred_callchains,</div><div class='add'>+		    "Enable merge deferred user callchains"),</div><div class='ctx'> 	OPTS_EVSWITCH(&amp;script.evswitch),</div><div class='ctx'> 	OPT_END()</div><div class='ctx'> 	};</div><div class='hunk'>@@ -4080,6 +4394,7 @@ script_found:</div><div class='ctx'> </div><div class='ctx'> 	perf_tool__init(&amp;script.tool, !unsorted_dump);</div><div class='ctx'> 	script.tool.sample		 = process_sample_event;</div><div class='add'>+	script.tool.callchain_deferred	 = process_deferred_sample_event;</div><div class='ctx'> 	script.tool.mmap		 = perf_event__process_mmap;</div><div class='ctx'> 	script.tool.mmap2		 = perf_event__process_mmap2;</div><div class='ctx'> 	script.tool.comm		 = perf_event__process_comm;</div><div class='hunk'>@@ -4106,6 +4421,7 @@ script_found:</div><div class='ctx'> 	script.tool.throttle		 = process_throttle_event;</div><div class='ctx'> 	script.tool.unthrottle		 = process_throttle_event;</div><div class='ctx'> 	script.tool.ordering_requires_timestamps = true;</div><div class='add'>+	script.tool.merge_deferred_callchains = merge_deferred_callchains;</div><div class='ctx'> 	session = perf_session__new(&amp;data, &amp;script.tool);</div><div class='ctx'> 	if (IS_ERR(session))</div><div class='ctx'> 		return PTR_ERR(session);</div><div class='head'>diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c<br/>index 2c38dd98f6ca..ab40d85fb125 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-stat.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-stat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-stat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-stat.c</a></div><div class='hunk'>@@ -74,6 +74,7 @@</div><div class='ctx'> #include "util/intel-tpebs.h"</div><div class='ctx'> #include "asm/bug.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/list_sort.h&gt;</div><div class='ctx'> #include &lt;linux/time64.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='hunk'>@@ -96,9 +97,18 @@</div><div class='ctx'> #include &lt;perf/evlist.h&gt;</div><div class='ctx'> #include &lt;internal/threadmap.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef HAVE_BPF_SKEL</div><div class='add'>+#include "util/bpf_skel/bperf_cgroup.h"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define DEFAULT_SEPARATOR	" "</div><div class='ctx'> #define FREEZE_ON_SMI_PATH	"bus/event_source/devices/cpu/freeze_on_smi"</div><div class='ctx'> </div><div class='add'>+struct rusage_stats {</div><div class='add'>+	struct stats ru_utime_usec_stat;</div><div class='add'>+	struct stats ru_stime_usec_stat;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void print_counters(struct timespec *ts, int argc, const char **argv);</div><div class='ctx'> </div><div class='ctx'> static struct evlist	*evsel_list;</div><div class='hunk'>@@ -128,6 +138,7 @@ static bool			interval_count;</div><div class='ctx'> static const char		*output_name;</div><div class='ctx'> static int			output_fd;</div><div class='ctx'> static char			*metrics;</div><div class='add'>+static struct rusage_stats	ru_stats;</div><div class='ctx'> </div><div class='ctx'> struct perf_stat {</div><div class='ctx'> 	bool			 record;</div><div class='hunk'>@@ -228,7 +239,7 @@ static inline void diff_timespec(struct timespec *r, struct timespec *a,</div><div class='ctx'> static void perf_stat__reset_stats(void)</div><div class='ctx'> {</div><div class='ctx'> 	evlist__reset_stats(evsel_list);</div><div class='del'>-	perf_stat__reset_shadow_stats();</div><div class='add'>+	memset(stat_config.walltime_nsecs_stats, 0, sizeof(*stat_config.walltime_nsecs_stats));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int process_synthesized_event(const struct perf_tool *tool __maybe_unused,</div><div class='hunk'>@@ -278,17 +289,27 @@ static int read_single_counter(struct evsel *counter, int cpu_map_idx, int threa</div><div class='ctx'> 	if (err &amp;&amp; cpu_map_idx == 0 &amp;&amp;</div><div class='ctx'> 	    (evsel__tool_event(counter) == TOOL_PMU__EVENT_USER_TIME ||</div><div class='ctx'> 	     evsel__tool_event(counter) == TOOL_PMU__EVENT_SYSTEM_TIME)) {</div><div class='del'>-		u64 val, *start_time;</div><div class='ctx'> 		struct perf_counts_values *count =</div><div class='ctx'> 			perf_counts(counter-&gt;counts, cpu_map_idx, thread);</div><div class='add'>+		struct perf_counts_values *old_count = NULL;</div><div class='add'>+		u64 val;</div><div class='add'>+</div><div class='add'>+		if (counter-&gt;prev_raw_counts)</div><div class='add'>+			old_count = perf_counts(counter-&gt;prev_raw_counts, cpu_map_idx, thread);</div><div class='ctx'> </div><div class='del'>-		start_time = xyarray__entry(counter-&gt;start_times, cpu_map_idx, thread);</div><div class='ctx'> 		if (evsel__tool_event(counter) == TOOL_PMU__EVENT_USER_TIME)</div><div class='ctx'> 			val = ru_stats.ru_utime_usec_stat.mean;</div><div class='ctx'> 		else</div><div class='ctx'> 			val = ru_stats.ru_stime_usec_stat.mean;</div><div class='del'>-		count-&gt;ena = count-&gt;run = *start_time + val;</div><div class='add'>+</div><div class='ctx'> 		count-&gt;val = val;</div><div class='add'>+		if (old_count) {</div><div class='add'>+			count-&gt;run = old_count-&gt;run + 1;</div><div class='add'>+			count-&gt;ena = old_count-&gt;ena + 1;</div><div class='add'>+		} else {</div><div class='add'>+			count-&gt;run++;</div><div class='add'>+			count-&gt;ena++;</div><div class='add'>+		}</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -345,7 +366,7 @@ static int read_counter_cpu(struct evsel *counter, int cpu_map_idx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int read_affinity_counters(void)</div><div class='add'>+static int read_counters_with_affinity(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct evlist_cpu_iterator evlist_cpu_itr;</div><div class='ctx'> 	struct affinity saved_affinity, *affinity;</div><div class='hunk'>@@ -366,6 +387,9 @@ static int read_affinity_counters(void)</div><div class='ctx'> 		if (evsel__is_bpf(counter))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		if (evsel__is_tool(counter))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (!counter-&gt;err)</div><div class='ctx'> 			counter-&gt;err = read_counter_cpu(counter, evlist_cpu_itr.cpu_map_idx);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -391,16 +415,46 @@ static int read_bpf_map_counters(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int read_counters(void)</div><div class='add'>+static int read_tool_counters(void)</div><div class='ctx'> {</div><div class='del'>-	if (!stat_config.stop_read_counter) {</div><div class='del'>-		if (read_bpf_map_counters() ||</div><div class='del'>-		    read_affinity_counters())</div><div class='del'>-			return -1;</div><div class='add'>+	struct evsel *counter;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evsel_list, counter) {</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		if (!evsel__is_tool(counter))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		perf_cpu_map__for_each_idx(idx, counter-&gt;core.cpus) {</div><div class='add'>+			if (!counter-&gt;err)</div><div class='add'>+				counter-&gt;err = read_counter_cpu(counter, idx);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int read_counters(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (stat_config.stop_read_counter)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	// Read all BPF counters first.</div><div class='add'>+	ret = read_bpf_map_counters();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	// Read non-BPF and non-tool counters next.</div><div class='add'>+	ret = read_counters_with_affinity();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	// Read the tool counters last. This way the duration_time counter</div><div class='add'>+	// should always be greater than any other counter's enabled time.</div><div class='add'>+	return read_tool_counters();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void process_counters(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *counter;</div><div class='hunk'>@@ -434,8 +488,8 @@ static void process_interval(void)</div><div class='ctx'> 			pr_err("failed to write stat round event\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	init_stats(&amp;walltime_nsecs_stats);</div><div class='del'>-	update_stats(&amp;walltime_nsecs_stats, stat_config.interval * 1000000ULL);</div><div class='add'>+	init_stats(stat_config.walltime_nsecs_stats);</div><div class='add'>+	update_stats(stat_config.walltime_nsecs_stats, stat_config.interval * 1000000ULL);</div><div class='ctx'> 	print_counters(&amp;rs, 0, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -610,38 +664,34 @@ static int dispatch_events(bool forks, int timeout, int interval, int *times)</div><div class='ctx'> enum counter_recovery {</div><div class='ctx'> 	COUNTER_SKIP,</div><div class='ctx'> 	COUNTER_RETRY,</div><div class='del'>-	COUNTER_FATAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static enum counter_recovery stat_handle_error(struct evsel *counter)</div><div class='add'>+static enum counter_recovery stat_handle_error(struct evsel *counter, int err)</div><div class='ctx'> {</div><div class='ctx'> 	char msg[BUFSIZ];</div><div class='add'>+</div><div class='add'>+	assert(!counter-&gt;supported);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * PPC returns ENXIO for HW counters until 2.6.37</div><div class='ctx'> 	 * (behavior changed with commit b0a873e).</div><div class='ctx'> 	 */</div><div class='del'>-	if (errno == EINVAL || errno == ENOSYS ||</div><div class='del'>-	    errno == ENOENT || errno == ENXIO) {</div><div class='del'>-		if (verbose &gt; 0)</div><div class='del'>-			ui__warning("%s event is not supported by the kernel.\n",</div><div class='del'>-				    evsel__name(counter));</div><div class='del'>-		counter-&gt;supported = false;</div><div class='del'>-		/*</div><div class='del'>-		 * errored is a sticky flag that means one of the counter's</div><div class='del'>-		 * cpu event had a problem and needs to be reexamined.</div><div class='del'>-		 */</div><div class='del'>-		counter-&gt;errored = true;</div><div class='del'>-</div><div class='del'>-		if ((evsel__leader(counter) != counter) ||</div><div class='del'>-		    !(counter-&gt;core.leader-&gt;nr_members &gt; 1))</div><div class='del'>-			return COUNTER_SKIP;</div><div class='del'>-	} else if (evsel__fallback(counter, &amp;target, errno, msg, sizeof(msg))) {</div><div class='add'>+	if (err == EINVAL || err == ENOSYS || err == ENOENT || err == ENXIO) {</div><div class='add'>+		if (verbose &gt; 0) {</div><div class='add'>+			evsel__open_strerror(counter, &amp;target, err, msg, sizeof(msg));</div><div class='add'>+			ui__warning("%s event is not supported by the kernel.\n%s\n",</div><div class='add'>+				    evsel__name(counter), msg);</div><div class='add'>+		}</div><div class='add'>+		return COUNTER_SKIP;</div><div class='add'>+	}</div><div class='add'>+	if (evsel__fallback(counter, &amp;target, err, msg, sizeof(msg))) {</div><div class='ctx'> 		if (verbose &gt; 0)</div><div class='ctx'> 			ui__warning("%s\n", msg);</div><div class='add'>+		counter-&gt;supported = true;</div><div class='ctx'> 		return COUNTER_RETRY;</div><div class='del'>-	} else if (target__has_per_thread(&amp;target) &amp;&amp; errno != EOPNOTSUPP &amp;&amp;</div><div class='del'>-		   evsel_list-&gt;core.threads &amp;&amp;</div><div class='del'>-		   evsel_list-&gt;core.threads-&gt;err_thread != -1) {</div><div class='add'>+	}</div><div class='add'>+	if (target__has_per_thread(&amp;target) &amp;&amp; err != EOPNOTSUPP &amp;&amp;</div><div class='add'>+	    evsel_list-&gt;core.threads &amp;&amp; evsel_list-&gt;core.threads-&gt;err_thread != -1) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * For global --per-thread case, skip current</div><div class='ctx'> 		 * error thread.</div><div class='hunk'>@@ -649,37 +699,85 @@ static enum counter_recovery stat_handle_error(struct evsel *counter)</div><div class='ctx'> 		if (!thread_map__remove(evsel_list-&gt;core.threads,</div><div class='ctx'> 					evsel_list-&gt;core.threads-&gt;err_thread)) {</div><div class='ctx'> 			evsel_list-&gt;core.threads-&gt;err_thread = -1;</div><div class='add'>+			counter-&gt;supported = true;</div><div class='ctx'> 			return COUNTER_RETRY;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (counter-&gt;skippable) {</div><div class='del'>-		if (verbose &gt; 0)</div><div class='del'>-			ui__warning("skipping event %s that kernel failed to open .\n",</div><div class='del'>-				    evsel__name(counter));</div><div class='del'>-		counter-&gt;supported = false;</div><div class='del'>-		counter-&gt;errored = true;</div><div class='del'>-		return COUNTER_SKIP;</div><div class='ctx'> 	}</div><div class='add'>+	if (verbose &gt; 0) {</div><div class='add'>+		evsel__open_strerror(counter, &amp;target, err, msg, sizeof(msg));</div><div class='add'>+		ui__warning(err == EOPNOTSUPP</div><div class='add'>+			? "%s event is not supported by the kernel.\n%s\n"</div><div class='add'>+			: "skipping event %s that kernel failed to open.\n%s\n",</div><div class='add'>+			evsel__name(counter), msg);</div><div class='add'>+	}</div><div class='add'>+	return COUNTER_SKIP;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (errno == EOPNOTSUPP) {</div><div class='del'>-		if (verbose &gt; 0) {</div><div class='del'>-			ui__warning("%s event is not supported by the kernel.\n",</div><div class='del'>-				    evsel__name(counter));</div><div class='del'>-		}</div><div class='del'>-		counter-&gt;supported = false;</div><div class='del'>-		counter-&gt;errored = true;</div><div class='add'>+static int create_perf_stat_counter(struct evsel *evsel,</div><div class='add'>+				    struct perf_stat_config *config,</div><div class='add'>+				    int cpu_map_idx)</div><div class='add'>+{</div><div class='add'>+	struct perf_event_attr *attr = &amp;evsel-&gt;core.attr;</div><div class='add'>+	struct evsel *leader = evsel__leader(evsel);</div><div class='add'>+</div><div class='add'>+	/* Reset supported flag as creating a stat counter is retried. */</div><div class='add'>+	attr-&gt;read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |</div><div class='add'>+			    PERF_FORMAT_TOTAL_TIME_RUNNING;</div><div class='ctx'> </div><div class='del'>-		if ((evsel__leader(counter) != counter) ||</div><div class='del'>-		    !(counter-&gt;core.leader-&gt;nr_members &gt; 1))</div><div class='del'>-			return COUNTER_SKIP;</div><div class='add'>+	/*</div><div class='add'>+	 * The event is part of non trivial group, let's enable</div><div class='add'>+	 * the group read (for leader) and ID retrieval for all</div><div class='add'>+	 * members.</div><div class='add'>+	 */</div><div class='add'>+	if (leader-&gt;core.nr_members &gt; 1)</div><div class='add'>+		attr-&gt;read_format |= PERF_FORMAT_ID|PERF_FORMAT_GROUP;</div><div class='add'>+</div><div class='add'>+	attr-&gt;inherit = !config-&gt;no_inherit &amp;&amp; list_empty(&amp;evsel-&gt;bpf_counter_list);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Some events get initialized with sample_(period/type) set,</div><div class='add'>+	 * like tracepoints. Clear it up for counting.</div><div class='add'>+	 */</div><div class='add'>+	attr-&gt;sample_period = 0;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;identifier)</div><div class='add'>+		attr-&gt;sample_type = PERF_SAMPLE_IDENTIFIER;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;all_user) {</div><div class='add'>+		attr-&gt;exclude_kernel = 1;</div><div class='add'>+		attr-&gt;exclude_user   = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	evsel__open_strerror(counter, &amp;target, errno, msg, sizeof(msg));</div><div class='del'>-	ui__error("%s\n", msg);</div><div class='add'>+	if (config-&gt;all_kernel) {</div><div class='add'>+		attr-&gt;exclude_kernel = 0;</div><div class='add'>+		attr-&gt;exclude_user   = 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (child_pid != -1)</div><div class='del'>-		kill(child_pid, SIGTERM);</div><div class='add'>+	/*</div><div class='add'>+	 * Disabling all counters initially, they will be enabled</div><div class='add'>+	 * either manually by us or by kernel via enable_on_exec</div><div class='add'>+	 * set later.</div><div class='add'>+	 */</div><div class='add'>+	if (evsel__is_group_leader(evsel)) {</div><div class='add'>+		attr-&gt;disabled = 1;</div><div class='add'>+</div><div class='add'>+		if (target__enable_on_exec(&amp;target))</div><div class='add'>+			attr-&gt;enable_on_exec = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return evsel__open_per_cpu_and_thread(evsel, evsel__cpus(evsel), cpu_map_idx,</div><div class='add'>+					      evsel-&gt;core.threads);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void update_rusage_stats(const struct rusage *rusage)</div><div class='add'>+{</div><div class='add'>+	const u64 us_to_ns = 1000;</div><div class='add'>+	const u64 s_to_ns = 1000000000;</div><div class='ctx'> </div><div class='del'>-	return COUNTER_FATAL;</div><div class='add'>+	update_stats(&amp;ru_stats.ru_utime_usec_stat,</div><div class='add'>+		(rusage-&gt;ru_utime.tv_usec * us_to_ns + rusage-&gt;ru_utime.tv_sec * s_to_ns));</div><div class='add'>+	update_stats(&amp;ru_stats.ru_stime_usec_stat,</div><div class='add'>+		(rusage-&gt;ru_stime.tv_usec * us_to_ns + rusage-&gt;ru_stime.tv_sec * s_to_ns));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __run_perf_stat(int argc, const char **argv, int run_idx)</div><div class='hunk'>@@ -696,8 +794,8 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx)</div><div class='ctx'> 	bool is_pipe = STAT_RECORD ? perf_stat.data.is_pipe : false;</div><div class='ctx'> 	struct evlist_cpu_iterator evlist_cpu_itr;</div><div class='ctx'> 	struct affinity saved_affinity, *affinity = NULL;</div><div class='del'>-	int err;</div><div class='del'>-	bool second_pass = false;</div><div class='add'>+	int err, open_err = 0;</div><div class='add'>+	bool second_pass = false, has_supported_counters;</div><div class='ctx'> </div><div class='ctx'> 	if (forks) {</div><div class='ctx'> 		if (evlist__prepare_workload(evsel_list, &amp;target, argv, is_pipe, workload_exec_failed_signal) &lt; 0) {</div><div class='hunk'>@@ -737,14 +835,17 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx)</div><div class='ctx'> 		if (target.use_bpf)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (counter-&gt;reset_group || counter-&gt;errored)</div><div class='add'>+		if (counter-&gt;reset_group || !counter-&gt;supported)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (evsel__is_bperf(counter))</div><div class='ctx'> 			continue;</div><div class='del'>-try_again:</div><div class='del'>-		if (create_perf_stat_counter(counter, &amp;stat_config, &amp;target,</div><div class='del'>-					     evlist_cpu_itr.cpu_map_idx) &lt; 0) {</div><div class='ctx'> </div><div class='add'>+		while (true) {</div><div class='add'>+			if (create_perf_stat_counter(counter, &amp;stat_config,</div><div class='add'>+						     evlist_cpu_itr.cpu_map_idx) == 0)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			open_err = errno;</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Weak group failed. We cannot just undo this here</div><div class='ctx'> 			 * because earlier CPUs might be in group mode, and the kernel</div><div class='hunk'>@@ -752,29 +853,19 @@ try_again:</div><div class='ctx'> 			 * it to later.</div><div class='ctx'> 			 * Don't close here because we're in the wrong affinity.</div><div class='ctx'> 			 */</div><div class='del'>-			if ((errno == EINVAL || errno == EBADF) &amp;&amp;</div><div class='add'>+			if ((open_err == EINVAL || open_err == EBADF) &amp;&amp;</div><div class='ctx'> 				evsel__leader(counter) != counter &amp;&amp;</div><div class='ctx'> 				counter-&gt;weak_group) {</div><div class='ctx'> 				evlist__reset_weak_group(evsel_list, counter, false);</div><div class='ctx'> 				assert(counter-&gt;reset_group);</div><div class='add'>+				counter-&gt;supported = true;</div><div class='ctx'> 				second_pass = true;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			switch (stat_handle_error(counter)) {</div><div class='del'>-			case COUNTER_FATAL:</div><div class='del'>-				err = -1;</div><div class='del'>-				goto err_out;</div><div class='del'>-			case COUNTER_RETRY:</div><div class='del'>-				goto try_again;</div><div class='del'>-			case COUNTER_SKIP:</div><div class='del'>-				continue;</div><div class='del'>-			default:</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			if (stat_handle_error(counter, open_err) != COUNTER_RETRY)</div><div class='add'>+				break;</div><div class='ctx'> 		}</div><div class='del'>-		counter-&gt;supported = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (second_pass) {</div><div class='hunk'>@@ -787,7 +878,7 @@ try_again:</div><div class='ctx'> 		evlist__for_each_cpu(evlist_cpu_itr, evsel_list, affinity) {</div><div class='ctx'> 			counter = evlist_cpu_itr.evsel;</div><div class='ctx'> </div><div class='del'>-			if (!counter-&gt;reset_group &amp;&amp; !counter-&gt;errored)</div><div class='add'>+			if (!counter-&gt;reset_group &amp;&amp; counter-&gt;supported)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			perf_evsel__close_cpu(&amp;counter-&gt;core, evlist_cpu_itr.cpu_map_idx);</div><div class='hunk'>@@ -798,34 +889,29 @@ try_again:</div><div class='ctx'> </div><div class='ctx'> 			if (!counter-&gt;reset_group)</div><div class='ctx'> 				continue;</div><div class='del'>-try_again_reset:</div><div class='del'>-			pr_debug2("reopening weak %s\n", evsel__name(counter));</div><div class='del'>-			if (create_perf_stat_counter(counter, &amp;stat_config, &amp;target,</div><div class='del'>-						     evlist_cpu_itr.cpu_map_idx) &lt; 0) {</div><div class='del'>-</div><div class='del'>-				switch (stat_handle_error(counter)) {</div><div class='del'>-				case COUNTER_FATAL:</div><div class='del'>-					err = -1;</div><div class='del'>-					goto err_out;</div><div class='del'>-				case COUNTER_RETRY:</div><div class='del'>-					goto try_again_reset;</div><div class='del'>-				case COUNTER_SKIP:</div><div class='del'>-					continue;</div><div class='del'>-				default:</div><div class='add'>+</div><div class='add'>+			while (true) {</div><div class='add'>+				pr_debug2("reopening weak %s\n", evsel__name(counter));</div><div class='add'>+				if (create_perf_stat_counter(counter, &amp;stat_config,</div><div class='add'>+							     evlist_cpu_itr.cpu_map_idx) == 0)</div><div class='add'>+					break;</div><div class='add'>+</div><div class='add'>+				open_err = errno;</div><div class='add'>+				if (stat_handle_error(counter, open_err) != COUNTER_RETRY)</div><div class='ctx'> 					break;</div><div class='del'>-				}</div><div class='ctx'> 			}</div><div class='del'>-			counter-&gt;supported = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	affinity__cleanup(affinity);</div><div class='ctx'> 	affinity = NULL;</div><div class='ctx'> </div><div class='add'>+	has_supported_counters = false;</div><div class='ctx'> 	evlist__for_each_entry(evsel_list, counter) {</div><div class='ctx'> 		if (!counter-&gt;supported) {</div><div class='ctx'> 			perf_evsel__free_fd(&amp;counter-&gt;core);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='add'>+		has_supported_counters = true;</div><div class='ctx'> </div><div class='ctx'> 		l = strlen(counter-&gt;unit);</div><div class='ctx'> 		if (l &gt; stat_config.unit_width)</div><div class='hunk'>@@ -837,6 +923,18 @@ try_again_reset:</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	if (!has_supported_counters &amp;&amp; !stat_config.null_run) {</div><div class='add'>+		if (open_err) {</div><div class='add'>+			evsel__open_strerror(evlist__first(evsel_list), &amp;target, open_err,</div><div class='add'>+					     msg, sizeof(msg));</div><div class='add'>+		}</div><div class='add'>+		ui__error("No supported events found.\n%s\n", msg);</div><div class='add'>+</div><div class='add'>+		if (child_pid != -1)</div><div class='add'>+			kill(child_pid, SIGTERM);</div><div class='add'>+		err = -1;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (evlist__apply_filters(evsel_list, &amp;counter, &amp;target)) {</div><div class='ctx'> 		pr_err("failed to set filter \"%s\" on event %s with %d (%s)\n",</div><div class='hunk'>@@ -909,10 +1007,20 @@ try_again_reset:</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (WIFSIGNALED(status))</div><div class='add'>+		if (WIFSIGNALED(status)) {</div><div class='add'>+			/*</div><div class='add'>+			 * We want to indicate failure to stop a repeat run,</div><div class='add'>+			 * hence negative. We want the value to be the exit code</div><div class='add'>+			 * of perf, which for termination by a signal is 128</div><div class='add'>+			 * plus the signal number.</div><div class='add'>+			 */</div><div class='add'>+			err = 0 - (128 + WTERMSIG(status));</div><div class='ctx'> 			psignal(WTERMSIG(status), argv[0]);</div><div class='add'>+		} else {</div><div class='add'>+			err = WEXITSTATUS(status);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='del'>-		status = dispatch_events(forks, timeout, interval, &amp;times);</div><div class='add'>+		err = dispatch_events(forks, timeout, interval, &amp;times);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	disable_counters();</div><div class='hunk'>@@ -925,15 +1033,15 @@ try_again_reset:</div><div class='ctx'> 	if (interval &amp;&amp; stat_config.summary) {</div><div class='ctx'> 		stat_config.interval = 0;</div><div class='ctx'> 		stat_config.stop_read_counter = true;</div><div class='del'>-		init_stats(&amp;walltime_nsecs_stats);</div><div class='del'>-		update_stats(&amp;walltime_nsecs_stats, t1 - t0);</div><div class='add'>+		init_stats(stat_config.walltime_nsecs_stats);</div><div class='add'>+		update_stats(stat_config.walltime_nsecs_stats, t1 - t0);</div><div class='ctx'> </div><div class='ctx'> 		evlist__copy_prev_raw_counts(evsel_list);</div><div class='ctx'> 		evlist__reset_prev_raw_counts(evsel_list);</div><div class='ctx'> 		evlist__reset_aggr_stats(evsel_list);</div><div class='ctx'> 	} else {</div><div class='del'>-		update_stats(&amp;walltime_nsecs_stats, t1 - t0);</div><div class='del'>-		update_rusage_stats(&amp;ru_stats, &amp;stat_config.ru_data);</div><div class='add'>+		update_stats(stat_config.walltime_nsecs_stats, t1 - t0);</div><div class='add'>+		update_rusage_stats(&amp;stat_config.ru_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -952,7 +1060,7 @@ try_again_reset:</div><div class='ctx'> 	if (!STAT_RECORD)</div><div class='ctx'> 		evlist__close(evsel_list);</div><div class='ctx'> </div><div class='del'>-	return WEXITSTATUS(status);</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='ctx'> 	if (forks)</div><div class='hunk'>@@ -1822,6 +1930,35 @@ static int perf_stat_init_aggr_mode_file(struct perf_stat *st)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int default_evlist_evsel_cmp(void *priv __maybe_unused,</div><div class='add'>+				    const struct list_head *l,</div><div class='add'>+				    const struct list_head *r)</div><div class='add'>+{</div><div class='add'>+	const struct perf_evsel *lhs_core = container_of(l, struct perf_evsel, node);</div><div class='add'>+	const struct evsel *lhs = container_of(lhs_core, struct evsel, core);</div><div class='add'>+	const struct perf_evsel *rhs_core = container_of(r, struct perf_evsel, node);</div><div class='add'>+	const struct evsel *rhs = container_of(rhs_core, struct evsel, core);</div><div class='add'>+</div><div class='add'>+	if (evsel__leader(lhs) == evsel__leader(rhs)) {</div><div class='add'>+		/* Within the same group, respect the original order. */</div><div class='add'>+		return lhs_core-&gt;idx - rhs_core-&gt;idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sort default metrics evsels first, and default show events before those. */</div><div class='add'>+	if (lhs-&gt;default_metricgroup != rhs-&gt;default_metricgroup)</div><div class='add'>+		return lhs-&gt;default_metricgroup ? -1 : 1;</div><div class='add'>+</div><div class='add'>+	if (lhs-&gt;default_show_events != rhs-&gt;default_show_events)</div><div class='add'>+		return lhs-&gt;default_show_events ? -1 : 1;</div><div class='add'>+</div><div class='add'>+	/* Sort by PMU type (prefers legacy types first). */</div><div class='add'>+	if (lhs-&gt;pmu != rhs-&gt;pmu)</div><div class='add'>+		return lhs-&gt;pmu-&gt;type - rhs-&gt;pmu-&gt;type;</div><div class='add'>+</div><div class='add'>+	/* Sort by name. */</div><div class='add'>+	return strcmp(evsel__name((struct evsel *)lhs), evsel__name((struct evsel *)rhs));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Add default events, if there were no attributes specified or</div><div class='ctx'>  * if -d/--detailed, -d -d or -d -d -d is used:</div><div class='hunk'>@@ -1944,48 +2081,39 @@ static int add_default_events(void)</div><div class='ctx'> 		stat_config.topdown_level = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!evlist-&gt;core.nr_entries &amp;&amp; !evsel_list-&gt;core.nr_entries) {</div><div class='del'>-		/* No events so add defaults. */</div><div class='del'>-		if (target__has_cpu(&amp;target))</div><div class='del'>-			ret = parse_events(evlist, "cpu-clock", &amp;err);</div><div class='del'>-		else</div><div class='del'>-			ret = parse_events(evlist, "task-clock", &amp;err);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		ret = parse_events(evlist,</div><div class='del'>-				"context-switches,"</div><div class='del'>-				"cpu-migrations,"</div><div class='del'>-				"page-faults,"</div><div class='del'>-				"instructions,"</div><div class='del'>-				"cycles,"</div><div class='del'>-				"stalled-cycles-frontend,"</div><div class='del'>-				"stalled-cycles-backend,"</div><div class='del'>-				"branches,"</div><div class='del'>-				"branch-misses",</div><div class='del'>-				&amp;err);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='del'>-		 * Add TopdownL1 metrics if they exist. To minimize</div><div class='del'>-		 * multiplexing, don't request threshold computation.</div><div class='add'>+		 * Add Default metrics. To minimize multiplexing, don't request</div><div class='add'>+		 * threshold computation, but it will be computed if the events</div><div class='add'>+		 * are present.</div><div class='ctx'> 		 */</div><div class='del'>-		if (metricgroup__has_metric_or_groups(pmu, "Default")) {</div><div class='del'>-			struct evlist *metric_evlist = evlist__new();</div><div class='add'>+		const char *default_metricgroup_names[] = {</div><div class='add'>+			"Default", "Default2", "Default3", "Default4",</div><div class='add'>+		};</div><div class='ctx'> </div><div class='add'>+		for (size_t i = 0; i &lt; ARRAY_SIZE(default_metricgroup_names); i++) {</div><div class='add'>+			struct evlist *metric_evlist;</div><div class='add'>+</div><div class='add'>+			if (!metricgroup__has_metric_or_groups(pmu, default_metricgroup_names[i]))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if ((int)i &gt; detailed_run)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			metric_evlist = evlist__new();</div><div class='ctx'> 			if (!metric_evlist) {</div><div class='ctx'> 				ret = -ENOMEM;</div><div class='del'>-				goto out;</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='del'>-			if (metricgroup__parse_groups(metric_evlist, pmu, "Default",</div><div class='add'>+			if (metricgroup__parse_groups(metric_evlist, pmu, default_metricgroup_names[i],</div><div class='ctx'> 							/*metric_no_group=*/false,</div><div class='ctx'> 							/*metric_no_merge=*/false,</div><div class='ctx'> 							/*metric_no_threshold=*/true,</div><div class='ctx'> 							stat_config.user_requested_cpu_list,</div><div class='ctx'> 							stat_config.system_wide,</div><div class='ctx'> 							stat_config.hardware_aware_grouping) &lt; 0) {</div><div class='add'>+				evlist__delete(metric_evlist);</div><div class='ctx'> 				ret = -1;</div><div class='del'>-				goto out;</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			evlist__for_each_entry(metric_evlist, evsel)</div><div class='hunk'>@@ -1997,44 +2125,8 @@ static int add_default_events(void)</div><div class='ctx'> 							&amp;metric_evlist-&gt;metric_events);</div><div class='ctx'> 			evlist__delete(metric_evlist);</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+		list_sort(/*priv=*/NULL, &amp;evlist-&gt;core.entries, default_evlist_evsel_cmp);</div><div class='ctx'> </div><div class='del'>-	/* Detailed events get appended to the event list: */</div><div class='del'>-</div><div class='del'>-	if (!ret &amp;&amp; detailed_run &gt;=  1) {</div><div class='del'>-		/*</div><div class='del'>-		 * Detailed stats (-d), covering the L1 and last level data</div><div class='del'>-		 * caches:</div><div class='del'>-		 */</div><div class='del'>-		ret = parse_events(evlist,</div><div class='del'>-				"L1-dcache-loads,"</div><div class='del'>-				"L1-dcache-load-misses,"</div><div class='del'>-				"LLC-loads,"</div><div class='del'>-				"LLC-load-misses",</div><div class='del'>-				&amp;err);</div><div class='del'>-	}</div><div class='del'>-	if (!ret &amp;&amp; detailed_run &gt;=  2) {</div><div class='del'>-		/*</div><div class='del'>-		 * Very detailed stats (-d -d), covering the instruction cache</div><div class='del'>-		 * and the TLB caches:</div><div class='del'>-		 */</div><div class='del'>-		ret = parse_events(evlist,</div><div class='del'>-				"L1-icache-loads,"</div><div class='del'>-				"L1-icache-load-misses,"</div><div class='del'>-				"dTLB-loads,"</div><div class='del'>-				"dTLB-load-misses,"</div><div class='del'>-				"iTLB-loads,"</div><div class='del'>-				"iTLB-load-misses",</div><div class='del'>-				&amp;err);</div><div class='del'>-	}</div><div class='del'>-	if (!ret &amp;&amp; detailed_run &gt;=  3) {</div><div class='del'>-		/*</div><div class='del'>-		 * Very, very detailed stats (-d -d -d), adding prefetch events:</div><div class='del'>-		 */</div><div class='del'>-		ret = parse_events(evlist,</div><div class='del'>-				"L1-dcache-prefetches,"</div><div class='del'>-				"L1-dcache-prefetch-misses",</div><div class='del'>-				&amp;err);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	if (!ret) {</div><div class='hunk'>@@ -2043,7 +2135,7 @@ out:</div><div class='ctx'> 			 * Make at least one event non-skippable so fatal errors are visible.</div><div class='ctx'> 			 * 'cycles' always used to be default and non-skippable, so use that.</div><div class='ctx'> 			 */</div><div class='del'>-			if (strcmp("cycles", evsel__name(evsel)))</div><div class='add'>+			if (!evsel__match(evsel, HARDWARE, HW_CPU_CYCLES))</div><div class='ctx'> 				evsel-&gt;skippable = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2107,7 +2199,8 @@ static int __cmd_record(const struct option stat_options[], struct opt_aggr_mode</div><div class='ctx'> 	return argc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_stat_round_event(struct perf_session *session,</div><div class='add'>+static int process_stat_round_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				    struct perf_session *session,</div><div class='ctx'> 				    union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_record_stat_round *stat_round = &amp;event-&gt;stat_round;</div><div class='hunk'>@@ -2119,7 +2212,7 @@ static int process_stat_round_event(struct perf_session *session,</div><div class='ctx'> 	process_counters();</div><div class='ctx'> </div><div class='ctx'> 	if (stat_round-&gt;type == PERF_STAT_ROUND_TYPE__FINAL)</div><div class='del'>-		update_stats(&amp;walltime_nsecs_stats, stat_round-&gt;time);</div><div class='add'>+		update_stats(stat_config.walltime_nsecs_stats, stat_round-&gt;time);</div><div class='ctx'> </div><div class='ctx'> 	if (stat_config.interval &amp;&amp; stat_round-&gt;time) {</div><div class='ctx'> 		tsh.tv_sec  = stat_round-&gt;time / NSEC_PER_SEC;</div><div class='hunk'>@@ -2132,10 +2225,10 @@ static int process_stat_round_event(struct perf_session *session,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_stat_config_event(struct perf_session *session,</div><div class='add'>+int process_stat_config_event(const struct perf_tool *tool,</div><div class='add'>+			      struct perf_session *session,</div><div class='ctx'> 			      union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_stat *st = container_of(tool, struct perf_stat, tool);</div><div class='ctx'> </div><div class='ctx'> 	perf_event__read_stat_config(&amp;stat_config, &amp;event-&gt;stat_config);</div><div class='hunk'>@@ -2181,10 +2274,10 @@ static int set_maps(struct perf_stat *st)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_thread_map_event(struct perf_session *session,</div><div class='add'>+int process_thread_map_event(const struct perf_tool *tool,</div><div class='add'>+			     struct perf_session *session __maybe_unused,</div><div class='ctx'> 			     union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_stat *st = container_of(tool, struct perf_stat, tool);</div><div class='ctx'> </div><div class='ctx'> 	if (st-&gt;threads) {</div><div class='hunk'>@@ -2200,10 +2293,10 @@ int process_thread_map_event(struct perf_session *session,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_cpu_map_event(struct perf_session *session,</div><div class='add'>+int process_cpu_map_event(const struct perf_tool *tool,</div><div class='add'>+			  struct perf_session *session __maybe_unused,</div><div class='ctx'> 			  union perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_stat *st = container_of(tool, struct perf_stat, tool);</div><div class='ctx'> 	struct perf_cpu_map *cpus;</div><div class='ctx'> </div><div class='hunk'>@@ -2511,6 +2604,7 @@ int cmd_stat(int argc, const char **argv)</div><div class='ctx'> 	unsigned int interval, timeout;</div><div class='ctx'> 	const char * const stat_subcommands[] = { "record", "report" };</div><div class='ctx'> 	char errbuf[BUFSIZ];</div><div class='add'>+	struct evsel *counter;</div><div class='ctx'> </div><div class='ctx'> 	setlocale(LC_ALL, "");</div><div class='ctx'> </div><div class='hunk'>@@ -2765,9 +2859,28 @@ int cmd_stat(int argc, const char **argv)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+#ifdef HAVE_BPF_SKEL</div><div class='add'>+	if (target.use_bpf &amp;&amp; nr_cgroups &amp;&amp;</div><div class='add'>+	    (evsel_list-&gt;core.nr_entries / nr_cgroups) &gt; BPERF_CGROUP__MAX_EVENTS) {</div><div class='add'>+		pr_warning("Disabling BPF counters due to more events (%d) than the max (%d)\n",</div><div class='add'>+			   evsel_list-&gt;core.nr_entries / nr_cgroups, BPERF_CGROUP__MAX_EVENTS);</div><div class='add'>+		target.use_bpf = false;</div><div class='add'>+	}</div><div class='add'>+#endif // HAVE_BPF_SKEL</div><div class='ctx'> 	evlist__warn_user_requested_cpus(evsel_list, target.cpu_list);</div><div class='ctx'> </div><div class='add'>+	evlist__for_each_entry(evsel_list, counter) {</div><div class='add'>+		/*</div><div class='add'>+		 * Setup BPF counters to require CPUs as any(-1) isn't</div><div class='add'>+		 * supported. evlist__create_maps below will propagate this</div><div class='add'>+		 * information to the evsels. Note, evsel__is_bperf isn't yet</div><div class='add'>+		 * set up, and this change must happen early, so directly use</div><div class='add'>+		 * the bpf_counter variable and target information.</div><div class='add'>+		 */</div><div class='add'>+		if ((counter-&gt;bpf_counter || target.use_bpf) &amp;&amp; !target__has_cpu(&amp;target))</div><div class='add'>+			counter-&gt;core.requires_cpu = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (evlist__create_maps(evsel_list, &amp;target) &lt; 0) {</div><div class='ctx'> 		if (target__has_task(&amp;target)) {</div><div class='ctx'> 			pr_err("Problems finding threads of monitor\n");</div><div class='hunk'>@@ -2866,7 +2979,7 @@ int cmd_stat(int argc, const char **argv)</div><div class='ctx'> 			evlist__reset_prev_raw_counts(evsel_list);</div><div class='ctx'> </div><div class='ctx'> 		status = run_perf_stat(argc, argv, run_idx);</div><div class='del'>-		if (status == -1)</div><div class='add'>+		if (status &lt; 0)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		if (forever &amp;&amp; !interval) {</div><div class='hunk'>@@ -2907,7 +3020,7 @@ int cmd_stat(int argc, const char **argv)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!interval) {</div><div class='del'>-			if (WRITE_STAT_ROUND_EVENT(walltime_nsecs_stats.max, FINAL))</div><div class='add'>+			if (WRITE_STAT_ROUND_EVENT(stat_config.walltime_nsecs_stats-&gt;max, FINAL))</div><div class='ctx'> 				pr_err("failed to write stat round event\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2936,5 +3049,6 @@ out:</div><div class='ctx'> </div><div class='ctx'> 	evlist__close_control(stat_config.ctl_fd, stat_config.ctl_fd_ack, &amp;stat_config.ctl_fd_close);</div><div class='ctx'> </div><div class='del'>-	return status;</div><div class='add'>+	/* Only the low byte of status becomes the exit code. */</div><div class='add'>+	return abs(status);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/builtin-timechart.c b/tools/perf/builtin-timechart.c<br/>index 22050c640dfa..f8b49d69e9a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-timechart.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-timechart.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-timechart.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-timechart.c</a></div><div class='hunk'>@@ -1651,7 +1651,7 @@ out_delete:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int timechart__io_record(int argc, const char **argv)</div><div class='add'>+static int timechart__io_record(int argc, const char **argv, const char *output_data)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int rec_argc, i;</div><div class='ctx'> 	const char **rec_argv;</div><div class='hunk'>@@ -1659,7 +1659,7 @@ static int timechart__io_record(int argc, const char **argv)</div><div class='ctx'> 	char *filter = NULL;</div><div class='ctx'> </div><div class='ctx'> 	const char * const common_args[] = {</div><div class='del'>-		"record", "-a", "-R", "-c", "1",</div><div class='add'>+		"record", "-a", "-R", "-c", "1", "-o", output_data,</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned int common_args_nr = ARRAY_SIZE(common_args);</div><div class='ctx'> </div><div class='hunk'>@@ -1786,7 +1786,8 @@ static int timechart__io_record(int argc, const char **argv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int timechart__record(struct timechart *tchart, int argc, const char **argv)</div><div class='add'>+static int timechart__record(struct timechart *tchart, int argc, const char **argv,</div><div class='add'>+			     const char *output_data)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int rec_argc, i, j;</div><div class='ctx'> 	const char **rec_argv;</div><div class='hunk'>@@ -1794,7 +1795,7 @@ static int timechart__record(struct timechart *tchart, int argc, const char **ar</div><div class='ctx'> 	unsigned int record_elems;</div><div class='ctx'> </div><div class='ctx'> 	const char * const common_args[] = {</div><div class='del'>-		"record", "-a", "-R", "-c", "1",</div><div class='add'>+		"record", "-a", "-R", "-c", "1", "-o", output_data,</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned int common_args_nr = ARRAY_SIZE(common_args);</div><div class='ctx'> </div><div class='hunk'>@@ -1934,6 +1935,7 @@ int cmd_timechart(int argc, const char **argv)</div><div class='ctx'> 		.merge_dist = 1000,</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *output_name = "output.svg";</div><div class='add'>+	const char *output_record_data = "perf.data";</div><div class='ctx'> 	const struct option timechart_common_options[] = {</div><div class='ctx'> 	OPT_BOOLEAN('P', "power-only", &amp;tchart.power_only, "output power data only"),</div><div class='ctx'> 	OPT_BOOLEAN('T', "tasks-only", &amp;tchart.tasks_only, "output processes data only"),</div><div class='hunk'>@@ -1976,6 +1978,7 @@ int cmd_timechart(int argc, const char **argv)</div><div class='ctx'> 	OPT_BOOLEAN('I', "io-only", &amp;tchart.io_only,</div><div class='ctx'> 		    "record only IO data"),</div><div class='ctx'> 	OPT_BOOLEAN('g', "callchain", &amp;tchart.with_backtrace, "record callchain"),</div><div class='add'>+	OPT_STRING('o', "output", &amp;output_record_data, "file", "output data file name"),</div><div class='ctx'> 	OPT_PARENT(timechart_common_options),</div><div class='ctx'> 	};</div><div class='ctx'> 	const char * const timechart_record_usage[] = {</div><div class='hunk'>@@ -2024,9 +2027,9 @@ int cmd_timechart(int argc, const char **argv)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (tchart.io_only)</div><div class='del'>-			ret = timechart__io_record(argc, argv);</div><div class='add'>+			ret = timechart__io_record(argc, argv, output_record_data);</div><div class='ctx'> 		else</div><div class='del'>-			ret = timechart__record(&amp;tchart, argc, argv);</div><div class='add'>+			ret = timechart__record(&amp;tchart, argc, argv, output_record_data);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	} else if (argc)</div><div class='ctx'> 		usage_with_options(timechart_usage, timechart_options);</div><div class='head'>diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c<br/>index a11f629c7d76..710604c4f6f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-top.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-top.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-top.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-top.c</a></div><div class='hunk'>@@ -1695,11 +1695,13 @@ int cmd_top(int argc, const char **argv)</div><div class='ctx'> 		goto out_delete_evlist;</div><div class='ctx'> </div><div class='ctx'> 	if (!top.evlist-&gt;core.nr_entries) {</div><div class='del'>-		bool can_profile_kernel = perf_event_paranoid_check(1);</div><div class='del'>-		int err = parse_event(top.evlist, can_profile_kernel ? "cycles:P" : "cycles:Pu");</div><div class='add'>+		struct evlist *def_evlist = evlist__new_default();</div><div class='ctx'> </div><div class='del'>-		if (err)</div><div class='add'>+		if (!def_evlist)</div><div class='ctx'> 			goto out_delete_evlist;</div><div class='add'>+</div><div class='add'>+		evlist__splice_list_tail(top.evlist, &amp;def_evlist-&gt;core.entries);</div><div class='add'>+		evlist__delete(def_evlist);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = evswitch__init(&amp;top.evswitch, top.evlist, stderr);</div><div class='head'>diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c<br/>index fe737b3ac6e6..baee1f695600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-trace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/builtin-trace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/builtin-trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/builtin-trace.c</a></div><div class='hunk'>@@ -196,6 +196,7 @@ struct trace {</div><div class='ctx'> 	unsigned int		max_stack;</div><div class='ctx'> 	unsigned int		min_stack;</div><div class='ctx'> 	enum trace_summary_mode	summary_mode;</div><div class='add'>+	int			max_summary;</div><div class='ctx'> 	int			raw_augmented_syscalls_args_size;</div><div class='ctx'> 	bool			raw_augmented_syscalls;</div><div class='ctx'> 	bool			fd_path_disabled;</div><div class='hunk'>@@ -2004,7 +2005,9 @@ static int trace__symbols_init(struct trace *trace, int argc, const char **argv,</div><div class='ctx'> </div><div class='ctx'> 	err = __machine__synthesize_threads(trace-&gt;host, &amp;trace-&gt;tool, &amp;trace-&gt;opts.target,</div><div class='ctx'> 					    evlist-&gt;core.threads, trace__tool_process,</div><div class='del'>-					    true, false, 1);</div><div class='add'>+					    /*needs_mmap=*/callchain_param.enabled,</div><div class='add'>+					    /*mmap_data=*/false,</div><div class='add'>+					    /*nr_threads_synthesize=*/1);</div><div class='ctx'> out:</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		perf_env__exit(&amp;trace-&gt;host_env);</div><div class='hunk'>@@ -2066,6 +2069,15 @@ static const struct syscall_arg_fmt *syscall_arg_fmt__find_by_name(const char *n</div><div class='ctx'>        return __syscall_arg_fmt__find_by_name(syscall_arg_fmts__by_name, nmemb, name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * v6.19 kernel added new fields to read userspace memory for event tracing.</div><div class='add'>+ * But it's not used by perf and confuses the syscall parameters.</div><div class='add'>+ */</div><div class='add'>+static bool is_internal_field(struct tep_format_field *field)</div><div class='add'>+{</div><div class='add'>+	return !strcmp(field-&gt;type, "__data_loc char[]");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct tep_format_field *</div><div class='ctx'> syscall_arg_fmt__init_array(struct syscall_arg_fmt *arg, struct tep_format_field *field,</div><div class='ctx'> 			    bool *use_btf)</div><div class='hunk'>@@ -2074,6 +2086,10 @@ syscall_arg_fmt__init_array(struct syscall_arg_fmt *arg, struct tep_format_field</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='ctx'> 	for (; field; field = field-&gt;next, ++arg) {</div><div class='add'>+		/* assume it's the last argument */</div><div class='add'>+		if (is_internal_field(field))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		last_field = field;</div><div class='ctx'> </div><div class='ctx'> 		if (arg-&gt;scnprintf)</div><div class='hunk'>@@ -2142,6 +2158,7 @@ static int syscall__read_info(struct syscall *sc, struct trace *trace)</div><div class='ctx'> {</div><div class='ctx'> 	char tp_name[128];</div><div class='ctx'> 	const char *name;</div><div class='add'>+	struct tep_format_field *field;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;nonexistent)</div><div class='hunk'>@@ -2198,6 +2215,13 @@ static int syscall__read_info(struct syscall *sc, struct trace *trace)</div><div class='ctx'> 		--sc-&gt;nr_args;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	field = sc-&gt;args;</div><div class='add'>+	while (field) {</div><div class='add'>+		if (is_internal_field(field))</div><div class='add'>+			--sc-&gt;nr_args;</div><div class='add'>+		field = field-&gt;next;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	sc-&gt;is_exit = !strcmp(name, "exit_group") || !strcmp(name, "exit");</div><div class='ctx'> 	sc-&gt;is_open = !strcmp(name, "open") || !strcmp(name, "openat");</div><div class='ctx'> </div><div class='hunk'>@@ -4440,7 +4464,7 @@ create_maps:</div><div class='ctx'> </div><div class='ctx'> 	if (trace-&gt;summary_mode == SUMMARY__BY_TOTAL &amp;&amp; !trace-&gt;summary_bpf) {</div><div class='ctx'> 		trace-&gt;syscall_stats = alloc_syscall_stats();</div><div class='del'>-		if (trace-&gt;syscall_stats == NULL)</div><div class='add'>+		if (IS_ERR(trace-&gt;syscall_stats))</div><div class='ctx'> 			goto out_delete_evlist;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4599,7 +4623,7 @@ out_disable:</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		if (trace-&gt;summary) {</div><div class='ctx'> 			if (trace-&gt;summary_bpf)</div><div class='del'>-				trace_print_bpf_summary(trace-&gt;output);</div><div class='add'>+				trace_print_bpf_summary(trace-&gt;output, trace-&gt;max_summary);</div><div class='ctx'> 			else if (trace-&gt;summary_mode == SUMMARY__BY_TOTAL)</div><div class='ctx'> 				trace__fprintf_total_summary(trace, trace-&gt;output);</div><div class='ctx'> 			else</div><div class='hunk'>@@ -4748,7 +4772,7 @@ static int trace__replay(struct trace *trace)</div><div class='ctx'> </div><div class='ctx'> 	if (trace-&gt;summary_mode == SUMMARY__BY_TOTAL) {</div><div class='ctx'> 		trace-&gt;syscall_stats = alloc_syscall_stats();</div><div class='del'>-		if (trace-&gt;syscall_stats == NULL)</div><div class='add'>+		if (IS_ERR(trace-&gt;syscall_stats))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4822,6 +4846,7 @@ static size_t syscall__dump_stats(struct trace *trace, int e_machine, FILE *fp,</div><div class='ctx'> 				  struct hashmap *syscall_stats)</div><div class='ctx'> {</div><div class='ctx'> 	size_t printed = 0;</div><div class='add'>+	int lines = 0;</div><div class='ctx'> 	struct syscall *sc;</div><div class='ctx'> 	struct syscall_entry *entries;</div><div class='ctx'> </div><div class='hunk'>@@ -4866,7 +4891,11 @@ static size_t syscall__dump_stats(struct trace *trace, int e_machine, FILE *fp,</div><div class='ctx'> 						fprintf(fp, "\t\t\t\t%s: %d\n", perf_env__arch_strerrno(trace-&gt;host-&gt;env, e + 1), stats-&gt;errnos[e]);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='add'>+			lines++;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (trace-&gt;max_summary &amp;&amp; trace-&gt;max_summary &lt;= lines)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	free(entries);</div><div class='hunk'>@@ -5443,6 +5472,8 @@ int cmd_trace(int argc, const char **argv)</div><div class='ctx'> 	OPT_BOOLEAN(0, "force-btf", &amp;trace.force_btf, "Prefer btf_dump general pretty printer"</div><div class='ctx'> 		       "to customized ones"),</div><div class='ctx'> 	OPT_BOOLEAN(0, "bpf-summary", &amp;trace.summary_bpf, "Summary syscall stats in BPF"),</div><div class='add'>+	OPT_INTEGER(0, "max-summary", &amp;trace.max_summary,</div><div class='add'>+		     "Max number of entries in the summary."),</div><div class='ctx'> 	OPTS_EVSWITCH(&amp;trace.evswitch),</div><div class='ctx'> 	OPT_END()</div><div class='ctx'> 	};</div><div class='head'>diff --git a/tools/perf/check-headers.sh b/tools/perf/check-headers.sh<br/>index be519c433ce4..e0537f275da2 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/check-headers.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/check-headers.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/check-headers.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/check-headers.sh</a></div><div class='hunk'>@@ -11,10 +11,16 @@ declare -a FILES=(</div><div class='ctx'>   "include/uapi/linux/bits.h"</div><div class='ctx'>   "include/uapi/linux/fadvise.h"</div><div class='ctx'>   "include/uapi/linux/fscrypt.h"</div><div class='add'>+  "include/uapi/linux/genetlink.h"</div><div class='add'>+  "include/uapi/linux/if_addr.h"</div><div class='add'>+  "include/uapi/linux/in.h"</div><div class='ctx'>   "include/uapi/linux/kcmp.h"</div><div class='ctx'>   "include/uapi/linux/kvm.h"</div><div class='del'>-  "include/uapi/linux/in.h"</div><div class='add'>+  "include/uapi/linux/neighbour.h"</div><div class='add'>+  "include/uapi/linux/netfilter.h"</div><div class='add'>+  "include/uapi/linux/netfilter_arp.h"</div><div class='ctx'>   "include/uapi/linux/perf_event.h"</div><div class='add'>+  "include/uapi/linux/rtnetlink.h"</div><div class='ctx'>   "include/uapi/linux/seccomp.h"</div><div class='ctx'>   "include/uapi/linux/stat.h"</div><div class='ctx'>   "include/linux/bits.h"</div><div class='hunk'>@@ -23,6 +29,7 @@ declare -a FILES=(</div><div class='ctx'>   "include/linux/const.h"</div><div class='ctx'>   "include/vdso/const.h"</div><div class='ctx'>   "include/vdso/unaligned.h"</div><div class='add'>+  "include/linux/gfp_types.h"</div><div class='ctx'>   "include/linux/hash.h"</div><div class='ctx'>   "include/linux/list-sort.h"</div><div class='ctx'>   "include/uapi/linux/hw_breakpoint.h"</div><div class='hunk'>@@ -40,15 +47,12 @@ declare -a FILES=(</div><div class='ctx'>   "arch/s390/include/uapi/asm/perf_regs.h"</div><div class='ctx'>   "arch/x86/include/uapi/asm/perf_regs.h"</div><div class='ctx'>   "arch/x86/include/uapi/asm/kvm.h"</div><div class='del'>-  "arch/x86/include/uapi/asm/kvm_perf.h"</div><div class='ctx'>   "arch/x86/include/uapi/asm/svm.h"</div><div class='ctx'>   "arch/x86/include/uapi/asm/unistd.h"</div><div class='ctx'>   "arch/x86/include/uapi/asm/vmx.h"</div><div class='ctx'>   "arch/powerpc/include/uapi/asm/kvm.h"</div><div class='ctx'>   "arch/s390/include/uapi/asm/kvm.h"</div><div class='del'>-  "arch/s390/include/uapi/asm/kvm_perf.h"</div><div class='ctx'>   "arch/s390/include/uapi/asm/sie.h"</div><div class='del'>-  "arch/arm/include/uapi/asm/kvm.h"</div><div class='ctx'>   "arch/arm64/include/uapi/asm/kvm.h"</div><div class='ctx'>   "arch/arm64/include/uapi/asm/unistd.h"</div><div class='ctx'>   "arch/alpha/include/uapi/asm/errno.h"</div><div class='head'>diff --git a/tools/perf/perf.h b/tools/perf/perf.h<br/>index 3cb40965549f..e004178472d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/perf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/perf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/perf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/perf.h</a></div><div class='hunk'>@@ -2,9 +2,7 @@</div><div class='ctx'> #ifndef _PERF_PERF_H</div><div class='ctx'> #define _PERF_PERF_H</div><div class='ctx'> </div><div class='del'>-#ifndef MAX_NR_CPUS</div><div class='ctx'> #define MAX_NR_CPUS			4096</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> enum perf_affinity {</div><div class='ctx'> 	PERF_AFFINITY_SYS = 0,</div><div class='head'>diff --git a/tools/perf/pmu-events/Build b/tools/perf/pmu-events/Build<br/>index 32f387d48908..a46ab7b612df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/Build</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> pmu-events-y	+= pmu-events.o</div><div class='del'>-JDIR		=  pmu-events/arch/$(SRCARCH)</div><div class='del'>-JSON		=  $(shell [ -d $(JDIR) ] &amp;&amp;				\</div><div class='del'>-			find $(JDIR) -name '*.json' -o -name 'mapfile.csv')</div><div class='add'>+JSON		=  $(shell find pmu-events/arch -name '*.json' -o -name '*.csv')</div><div class='ctx'> JDIR_TEST	=  pmu-events/arch/test</div><div class='ctx'> JSON_TEST	=  $(shell [ -d $(JDIR_TEST) ] &amp;&amp;			\</div><div class='ctx'> 			find $(JDIR_TEST) -name '*.json')</div><div class='hunk'>@@ -13,6 +11,8 @@ PMU_EVENTS_C	=  $(OUTPUT)pmu-events/pmu-events.c</div><div class='ctx'> METRIC_TEST_LOG	=  $(OUTPUT)pmu-events/metric_test.log</div><div class='ctx'> TEST_EMPTY_PMU_EVENTS_C = $(OUTPUT)pmu-events/test-empty-pmu-events.c</div><div class='ctx'> EMPTY_PMU_EVENTS_TEST_LOG = $(OUTPUT)pmu-events/empty-pmu-events.log</div><div class='add'>+LEGACY_CACHE_PY	=  pmu-events/make_legacy_cache.py</div><div class='add'>+LEGACY_CACHE_JSON = $(OUTPUT)pmu-events/arch/common/common/legacy-cache.json</div><div class='ctx'> </div><div class='ctx'> ifeq ($(JEVENTS_ARCH),)</div><div class='ctx'> JEVENTS_ARCH=$(SRCARCH)</div><div class='hunk'>@@ -29,13 +29,26 @@ $(PMU_EVENTS_C): $(EMPTY_PMU_EVENTS_C)</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='ctx'> 	$(Q)$(call echo-cmd,gen)cp $&lt; $@</div><div class='ctx'> else</div><div class='add'>+# Copy checked-in json to OUTPUT for generation if it's an out of source build</div><div class='add'>+ifneq ($(OUTPUT),)</div><div class='add'>+$(OUTPUT)pmu-events/arch/%: pmu-events/arch/%</div><div class='add'>+	$(call rule_mkdir)</div><div class='add'>+	$(Q)$(call echo-cmd,gen)cp $&lt; $@</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+$(LEGACY_CACHE_JSON): $(LEGACY_CACHE_PY)</div><div class='add'>+	$(call rule_mkdir)</div><div class='add'>+	$(Q)$(call echo-cmd,gen)$(PYTHON) $(LEGACY_CACHE_PY) &gt; $@</div><div class='add'>+</div><div class='add'>+GEN_JSON = $(patsubst %,$(OUTPUT)%,$(JSON)) $(LEGACY_CACHE_JSON)</div><div class='add'>+</div><div class='ctx'> $(METRIC_TEST_LOG): $(METRIC_TEST_PY) $(METRIC_PY)</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='ctx'> 	$(Q)$(call echo-cmd,test)$(PYTHON) $&lt; 2&gt; $@ || (cat $@ &amp;&amp; false)</div><div class='ctx'> </div><div class='del'>-$(TEST_EMPTY_PMU_EVENTS_C): $(JSON) $(JSON_TEST) $(JEVENTS_PY) $(METRIC_PY) $(METRIC_TEST_LOG)</div><div class='add'>+$(TEST_EMPTY_PMU_EVENTS_C): $(GEN_JSON) $(JSON_TEST) $(JEVENTS_PY) $(METRIC_PY) $(METRIC_TEST_LOG)</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='del'>-	$(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) none none pmu-events/arch $@</div><div class='add'>+	$(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) none none $(OUTPUT)pmu-events/arch $@</div><div class='ctx'> </div><div class='ctx'> $(EMPTY_PMU_EVENTS_TEST_LOG): $(EMPTY_PMU_EVENTS_C) $(TEST_EMPTY_PMU_EVENTS_C)</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='hunk'>@@ -63,10 +76,10 @@ $(OUTPUT)%.pylint_log: %</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='ctx'> 	$(Q)$(call echo-cmd,test)pylint "$&lt;" &gt; $@ || (cat $@ &amp;&amp; rm $@ &amp;&amp; false)</div><div class='ctx'> </div><div class='del'>-$(PMU_EVENTS_C): $(JSON) $(JSON_TEST) $(JEVENTS_PY) $(METRIC_PY) $(METRIC_TEST_LOG) \</div><div class='add'>+$(PMU_EVENTS_C): $(GEN_JSON) $(JSON_TEST) $(JEVENTS_PY) $(METRIC_PY) $(METRIC_TEST_LOG) \</div><div class='ctx'>     $(EMPTY_PMU_EVENTS_TEST_LOG) $(PMU_EVENTS_MYPY_TEST_LOGS) $(PMU_EVENTS_PYLINT_TEST_LOGS)</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='del'>-	$(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) $(JEVENTS_ARCH) $(JEVENTS_MODEL) pmu-events/arch $@</div><div class='add'>+	$(Q)$(call echo-cmd,gen)$(PYTHON) $(JEVENTS_PY) $(JEVENTS_ARCH) $(JEVENTS_MODEL) $(OUTPUT)pmu-events/arch $@</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # pmu-events.c file is generated in the OUTPUT directory so it needs a</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json<br/>index afcdad58ef89..324104438e78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json</a></div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'>     {</div><div class='ctx'> 	"MetricName": "load_store_spec_rate",</div><div class='ctx'> 	"MetricExpr": "((LDST_SPEC / INST_SPEC) * 100)",</div><div class='del'>-	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speclatively executed",</div><div class='add'>+	"BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speculatively executed",</div><div class='ctx'>         "MetricGroup": "Operation_Mix",</div><div class='ctx'>         "ScaleUnit": "1percent of operations"</div><div class='ctx'>     },</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>     {</div><div class='ctx'> 	"MetricName": "pc_write_spec_rate",</div><div class='ctx'> 	"MetricExpr": "((PC_WRITE_SPEC / INST_SPEC) * 100)",</div><div class='del'>-	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speclatively executed",</div><div class='add'>+	"BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speculatively executed",</div><div class='ctx'>         "MetricGroup": "Operation_Mix",</div><div class='ctx'>         "ScaleUnit": "1percent of operations"</div><div class='ctx'>     },</div><div class='hunk'>@@ -195,14 +195,14 @@</div><div class='ctx'>     {</div><div class='ctx'> 	"MetricName": "stall_frontend_cache_rate",</div><div class='ctx'> 	"MetricExpr": "((STALL_FRONTEND_CACHE / CPU_CYCLES) * 100)",</div><div class='del'>-	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and cache miss",</div><div class='add'>+	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and cache miss",</div><div class='ctx'> 	"MetricGroup": "Stall",</div><div class='ctx'>         "ScaleUnit": "1percent of cycles"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'> 	"MetricName": "stall_frontend_tlb_rate",</div><div class='ctx'> 	"MetricExpr": "((STALL_FRONTEND_TLB / CPU_CYCLES) * 100)",</div><div class='del'>-	"BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and TLB miss",</div><div class='add'>+	"BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and TLB miss",</div><div class='ctx'> 	"MetricGroup": "Stall",</div><div class='ctx'>         "ScaleUnit": "1percent of cycles"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json<br/>index 5228f94a793f..a29aadc9b2e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/arm64/ampere/ampereonex/metrics.json</a></div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "load_store_spec_rate",</div><div class='ctx'>         "MetricExpr": "LDST_SPEC / INST_SPEC",</div><div class='del'>-        "BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speclatively executed",</div><div class='add'>+        "BriefDescription": "The rate of load or store instructions speculatively executed to overall instructions speculatively executed",</div><div class='ctx'>         "MetricGroup": "Operation_Mix",</div><div class='ctx'>         "ScaleUnit": "100percent of operations"</div><div class='ctx'>     },</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "pc_write_spec_rate",</div><div class='ctx'>         "MetricExpr": "PC_WRITE_SPEC / INST_SPEC",</div><div class='del'>-        "BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speclatively executed",</div><div class='add'>+        "BriefDescription": "The rate of software change of the PC speculatively executed to overall instructions speculatively executed",</div><div class='ctx'>         "MetricGroup": "Operation_Mix",</div><div class='ctx'>         "ScaleUnit": "100percent of operations"</div><div class='ctx'>     },</div><div class='hunk'>@@ -195,14 +195,14 @@</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "stall_frontend_cache_rate",</div><div class='ctx'>         "MetricExpr": "STALL_FRONTEND_CACHE / CPU_CYCLES",</div><div class='del'>-        "BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and cache miss",</div><div class='add'>+        "BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and cache miss",</div><div class='ctx'>         "MetricGroup": "Stall",</div><div class='ctx'>         "ScaleUnit": "100percent of cycles"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "stall_frontend_tlb_rate",</div><div class='ctx'>         "MetricExpr": "STALL_FRONTEND_TLB / CPU_CYCLES",</div><div class='del'>-        "BriefDescription": "Proportion of cycles stalled and no ops delivered from frontend and TLB miss",</div><div class='add'>+        "BriefDescription": "Proportion of cycles stalled and no operations delivered from frontend and TLB miss",</div><div class='ctx'>         "MetricGroup": "Stall",</div><div class='ctx'>         "ScaleUnit": "100percent of cycles"</div><div class='ctx'>     },</div><div class='hunk'>@@ -388,55 +388,55 @@</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_RW / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache access - demand",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "MetricName": "l1d_cache_access_prefetces",</div><div class='add'>+        "MetricName": "l1d_cache_access_prefetches",</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_PRFM / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache access - prefetch",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "l1d_cache_demand_misses",</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_REFILL_RW / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache demand misses",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "l1d_cache_demand_misses_read",</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_REFILL_RD / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache demand misses - read",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "l1d_cache_demand_misses_write",</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_REFILL_WR / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache demand misses - write",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "l1d_cache_prefetch_misses",</div><div class='ctx'>         "MetricExpr": "L1D_CACHE_REFILL_PRFM / L1D_CACHE",</div><div class='ctx'>         "BriefDescription": "L1D cache prefetch misses",</div><div class='ctx'>         "MetricGroup": "Cache",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "ase_scalar_mix",</div><div class='ctx'>         "MetricExpr": "ASE_SCALAR_SPEC / OP_SPEC",</div><div class='ctx'>         "BriefDescription": "Proportion of advanced SIMD data processing operations (excluding DP_SPEC/LD_SPEC) scalar operations",</div><div class='ctx'>         "MetricGroup": "Instructions",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "MetricName": "ase_vector_mix",</div><div class='ctx'>         "MetricExpr": "ASE_VECTOR_SPEC / OP_SPEC",</div><div class='ctx'>         "BriefDescription": "Proportion of advanced SIMD data processing operations (excluding DP_SPEC/LD_SPEC) vector operations",</div><div class='ctx'>         "MetricGroup": "Instructions",</div><div class='del'>-        "ScaleUnit": "100percent of cache acceses"</div><div class='add'>+        "ScaleUnit": "100percent of cache accesses"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json<br/>index 4cc50b7da526..4001cc5753a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json</a></div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'>         "BriefDescription": "L2D TLB access"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event counts on any instruciton access which causes L2I_TLB_REFILL to count",</div><div class='add'>+        "PublicDescription": "Level 2 access to instruction TLB that caused a page table walk. This event counts on any instruction access which causes L2I_TLB_REFILL to count",</div><div class='ctx'>         "EventCode": "0x35",</div><div class='ctx'>         "EventName": "L2I_TLB_ACCESS",</div><div class='ctx'>         "BriefDescription": "L2I TLB access"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json<br/>new file mode 100644<br/>index 000000000000..aa7b58721dc7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/ddrc.json</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+[</div><div class='add'>+   {</div><div class='add'>+           "BriefDescription": "ddr cycles event",</div><div class='add'>+           "EventCode": "0x00",</div><div class='add'>+           "EventName": "imx94_ddr.cycles",</div><div class='add'>+           "Unit": "imx9_ddr",</div><div class='add'>+           "Compat": "imx94"</div><div class='add'>+   }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json<br/>new file mode 100644<br/>index 000000000000..629f1f52761e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/metrics.json</a></div><div class='hunk'>@@ -0,0 +1,450 @@</div><div class='add'>+[</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bandwidth usage for lpddr5 evk board",</div><div class='add'>+		"MetricName": "imx94_bandwidth_usage.lpddr5",</div><div class='add'>+		"MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",</div><div class='add'>+		"ScaleUnit": "1e2%",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bandwidth usage for lpddr4 evk board",</div><div class='add'>+		"MetricName": "imx94_bandwidth_usage.lpddr4",</div><div class='add'>+		"MetricExpr": "(( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32 / duration_time) / (4266 * 1000000 * 4)",</div><div class='add'>+		"ScaleUnit": "1e2%",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of all masters read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.all",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of all masters write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.all",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of all a55 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.a55_all",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of all a55 write from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.a55_all",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 0 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.a55_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 0 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.a55_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3ff\\,axi_id\\=0x000@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.a55_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.a55_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x001@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 2 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.a55_2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 2 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.a55_2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x002@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 3 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.a55_3",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of a55 core 3 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.a55_3",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x003@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m7 core1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.m7_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m7 core1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.m7_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x004@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m33 core1 (in netc) read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.m33_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m33 core1 (in netc) write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.m33_1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x005@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pcie2 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.pcie2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pcie2 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.pcie2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x006@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.cortex_a_dsu",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of Cortex-A DSU L3 evicted/ACP transactions write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.cortex_a_dsu",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x007@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m33 core0 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.m33_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m33 core0 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.m33_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x008@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m7 core0 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.m7_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of m7 core0 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.m7_0",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x009@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of sentinel read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.sentinel",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of sentinel write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.sentinel",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00a@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of edma1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.edma1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of edma1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.edma1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00b@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of edma2 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.edma2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of edma2 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.edma2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00c@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of netc read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.netc",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of netc write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.netc",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00d@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of aonmix read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.aonmix",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of aonmix write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.aonmix",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x00f\\,axi_id\\=0x00f@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of npumix read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.npumix",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of npumix write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.npumix",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x010@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.usdhc1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.usdhc1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0b0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc2 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.usdhc2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc2 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.usdhc2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0c0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc3 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.usdhc3",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usdhc3 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.usdhc3",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0d0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of xspi read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.xspi",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of xspi write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.xspi",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x0f0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pcie1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.pcie1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pcie1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.pcie1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x100@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usb1 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.usb1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usb1 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.usb1",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x140@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usb2 read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.usb2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt2\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of usb2 write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.usb2",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x150@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pxp read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.pxp",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of pxp write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.pxp",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2a0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of dcif read from ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_read.dcif",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"BriefDescription": "bytes of dcif write to ddr",</div><div class='add'>+		"MetricName": "imx94_ddr_write.dcif",</div><div class='add'>+		"MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3f0\\,axi_id\\=0x2b0@ ) * 32",</div><div class='add'>+		"ScaleUnit": "9.765625e-4KB",</div><div class='add'>+		"Unit": "imx9_ddr",</div><div class='add'>+		"Compat": "imx94"</div><div class='add'>+	}</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/common/common/legacy-hardware.json b/tools/perf/pmu-events/arch/common/common/legacy-hardware.json<br/>new file mode 100644<br/>index 000000000000..71700647f19b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/legacy-hardware.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/common/common/legacy-hardware.json</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+[</div><div class='add'>+  {</div><div class='add'>+    "EventName": "cpu-cycles",</div><div class='add'>+    "BriefDescription": "Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cycles].",</div><div class='add'>+    "LegacyConfigCode": "0"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "cycles",</div><div class='add'>+    "BriefDescription": "Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cpu-cycles].",</div><div class='add'>+    "LegacyConfigCode": "0"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "instructions",</div><div class='add'>+    "BriefDescription": "Retired instructions. Be careful, these can be affected by various issues, most notably hardware interrupt counts.",</div><div class='add'>+    "LegacyConfigCode": "1"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "cache-references",</div><div class='add'>+    "BriefDescription": "Cache accesses. Usually this indicates Last Level Cache accesses but this may vary depending on your CPU.  This may include prefetches and coherency messages; again this depends on the design of your CPU.",</div><div class='add'>+    "LegacyConfigCode": "2"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "cache-misses",</div><div class='add'>+    "BriefDescription": "Cache misses. Usually this indicates Last Level Cache misses; this is intended to be used in conjunction with the PERF_COUNT_HW_CACHE_REFERENCES event to calculate cache miss rates.",</div><div class='add'>+    "LegacyConfigCode": "3"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "branches",</div><div class='add'>+    "BriefDescription": "Retired branch instructions [This event is an alias of branch-instructions].",</div><div class='add'>+    "LegacyConfigCode": "4"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "branch-instructions",</div><div class='add'>+    "BriefDescription": "Retired branch instructions [This event is an alias of branches].",</div><div class='add'>+    "LegacyConfigCode": "4"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "branch-misses",</div><div class='add'>+    "BriefDescription": "Mispredicted branch instructions.",</div><div class='add'>+    "LegacyConfigCode": "5"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "bus-cycles",</div><div class='add'>+    "BriefDescription": "Bus cycles, which can be different from total cycles.",</div><div class='add'>+    "LegacyConfigCode": "6"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "stalled-cycles-frontend",</div><div class='add'>+    "BriefDescription": "Stalled cycles during issue [This event is an alias of idle-cycles-frontend].",</div><div class='add'>+    "LegacyConfigCode": "7"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "idle-cycles-frontend",</div><div class='add'>+    "BriefDescription": "Stalled cycles during issue [This event is an alias of stalled-cycles-fronted].",</div><div class='add'>+    "LegacyConfigCode": "7"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "stalled-cycles-backend",</div><div class='add'>+    "BriefDescription": "Stalled cycles during retirement [This event is an alias of idle-cycles-backend].",</div><div class='add'>+    "LegacyConfigCode": "8"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "idle-cycles-backend",</div><div class='add'>+    "BriefDescription": "Stalled cycles during retirement [This event is an alias of stalled-cycles-backend].",</div><div class='add'>+    "LegacyConfigCode": "8"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "EventName": "ref-cycles",</div><div class='add'>+    "BriefDescription": "Total cycles; not affected by CPU frequency scaling.",</div><div class='add'>+    "LegacyConfigCode": "9"</div><div class='add'>+  }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/common/common/metrics.json b/tools/perf/pmu-events/arch/common/common/metrics.json<br/>new file mode 100644<br/>index 000000000000..0d010b3ebc6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/common/common/metrics.json</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+[</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average CPU utilization",</div><div class='add'>+        "MetricExpr": "(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "CPUs_utilized",</div><div class='add'>+        "ScaleUnit": "1CPUs",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Context switches per CPU second",</div><div class='add'>+        "MetricExpr": "(software@context\\-switches\\,name\\=context\\-switches@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "cs_per_second",</div><div class='add'>+        "ScaleUnit": "1cs/sec",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Process migrations to a new CPU per CPU second",</div><div class='add'>+        "MetricExpr": "(software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "migrations_per_second",</div><div class='add'>+        "ScaleUnit": "1migrations/sec",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Page faults per CPU second",</div><div class='add'>+        "MetricExpr": "(software@page\\-faults\\,name\\=page\\-faults@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "page_faults_per_second",</div><div class='add'>+        "ScaleUnit": "1faults/sec",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Instructions Per Cycle",</div><div class='add'>+        "MetricExpr": "instructions / cpu\\-cycles",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "insn_per_cycle",</div><div class='add'>+        "MetricThreshold": "insn_per_cycle &lt; 1",</div><div class='add'>+        "ScaleUnit": "1instructions",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Max front or backend stalls per instruction",</div><div class='add'>+        "MetricExpr": "max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "stalled_cycles_per_instruction",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Frontend stalls per cycle",</div><div class='add'>+        "MetricExpr": "stalled\\-cycles\\-frontend / cpu\\-cycles",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "frontend_cycles_idle",</div><div class='add'>+        "MetricThreshold": "frontend_cycles_idle &gt; 0.1",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Backend stalls per cycle",</div><div class='add'>+        "MetricExpr": "stalled\\-cycles\\-backend / cpu\\-cycles",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "backend_cycles_idle",</div><div class='add'>+        "MetricThreshold": "backend_cycles_idle &gt; 0.2",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles per CPU second",</div><div class='add'>+        "MetricExpr": "cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "cycles_frequency",</div><div class='add'>+        "ScaleUnit": "1GHz",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Branches per CPU second",</div><div class='add'>+        "MetricExpr": "branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "branch_frequency",</div><div class='add'>+        "ScaleUnit": "1000M/sec",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Branch miss rate",</div><div class='add'>+        "MetricExpr": "branch\\-misses / branches",</div><div class='add'>+        "MetricGroup": "Default",</div><div class='add'>+        "MetricName": "branch_miss_rate",</div><div class='add'>+        "MetricThreshold": "branch_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L1D  miss rate",</div><div class='add'>+        "MetricExpr": "L1\\-dcache\\-load\\-misses / L1\\-dcache\\-loads",</div><div class='add'>+        "MetricGroup": "Default2",</div><div class='add'>+        "MetricName": "l1d_miss_rate",</div><div class='add'>+        "MetricThreshold": "l1d_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "LLC miss rate",</div><div class='add'>+        "MetricExpr": "LLC\\-load\\-misses / LLC\\-loads",</div><div class='add'>+        "MetricGroup": "Default2",</div><div class='add'>+        "MetricName": "llc_miss_rate",</div><div class='add'>+        "MetricThreshold": "llc_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L1I miss rate",</div><div class='add'>+        "MetricExpr": "L1\\-icache\\-load\\-misses / L1\\-icache\\-loads",</div><div class='add'>+        "MetricGroup": "Default3",</div><div class='add'>+        "MetricName": "l1i_miss_rate",</div><div class='add'>+        "MetricThreshold": "l1i_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "dTLB miss rate",</div><div class='add'>+        "MetricExpr": "dTLB\\-load\\-misses / dTLB\\-loads",</div><div class='add'>+        "MetricGroup": "Default3",</div><div class='add'>+        "MetricName": "dtlb_miss_rate",</div><div class='add'>+        "MetricThreshold": "dtlb_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "iTLB miss rate",</div><div class='add'>+        "MetricExpr": "iTLB\\-load\\-misses / iTLB\\-loads",</div><div class='add'>+        "MetricGroup": "Default3",</div><div class='add'>+        "MetricName": "itlb_miss_rate",</div><div class='add'>+        "MetricThreshold": "itlb_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L1 prefetch miss rate",</div><div class='add'>+        "MetricExpr": "L1\\-dcache\\-prefetch\\-misses / L1\\-dcache\\-prefetches",</div><div class='add'>+        "MetricGroup": "Default4",</div><div class='add'>+        "MetricName": "l1_prefetch_miss_rate",</div><div class='add'>+        "MetricThreshold": "l1_prefetch_miss_rate &gt; 0.05",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "DefaultShowEvents": "1"</div><div class='add'>+    }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/common/common/software.json b/tools/perf/pmu-events/arch/common/common/software.json<br/>index f2551f1107fd..e6819ae219bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/software.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/software.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/software.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/common/common/software.json</a></div><div class='hunk'>@@ -3,13 +3,15 @@</div><div class='ctx'>     "Unit": "software",</div><div class='ctx'>     "EventName": "cpu-clock",</div><div class='ctx'>     "BriefDescription": "Per-CPU high-resolution timer based event",</div><div class='del'>-    "ConfigCode": "0"</div><div class='add'>+    "ConfigCode": "0",</div><div class='add'>+    "ScaleUnit": "1e-6msec"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "Unit": "software",</div><div class='ctx'>     "EventName": "task-clock",</div><div class='ctx'>     "BriefDescription": "Per-task high-resolution timer based event",</div><div class='del'>-    "ConfigCode": "1"</div><div class='add'>+    "ConfigCode": "1",</div><div class='add'>+    "ScaleUnit": "1e-6msec"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "Unit": "software",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/common/common/tool.json b/tools/perf/pmu-events/arch/common/common/tool.json<br/>index 12f2ef1813a6..14d0d60a1976 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/tool.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/common/common/tool.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/common/common/tool.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/common/common/tool.json</a></div><div class='hunk'>@@ -70,5 +70,17 @@</div><div class='ctx'>     "EventName": "system_tsc_freq",</div><div class='ctx'>     "BriefDescription": "The amount a Time Stamp Counter (TSC) increases per second",</div><div class='ctx'>     "ConfigCode": "12"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "Unit": "tool",</div><div class='add'>+    "EventName": "core_wide",</div><div class='add'>+    "BriefDescription": "1 if not SMT, if SMT are events being gathered on all SMT threads 1 otherwise 0",</div><div class='add'>+    "ConfigCode": "13"</div><div class='add'>+  },</div><div class='add'>+  {</div><div class='add'>+    "Unit": "tool",</div><div class='add'>+    "EventName": "target_cpu",</div><div class='add'>+    "BriefDescription": "1 if CPUs being analyzed, 0 if threads/processes",</div><div class='add'>+    "ConfigCode": "14"</div><div class='ctx'>   }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/riscv/mapfile.csv b/tools/perf/pmu-events/arch/riscv/mapfile.csv<br/>index 0a7e7dcc81be..d5eea7f9aa9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/riscv/mapfile.csv?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/riscv/mapfile.csv</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/riscv/mapfile.csv?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/riscv/mapfile.csv</a></div><div class='hunk'>@@ -20,5 +20,6 @@</div><div class='ctx'> 0x489-0x8000000000000008-0x[[:xdigit:]]+,v1,sifive/p550,core</div><div class='ctx'> 0x489-0x8000000000000[1-6]08-0x[9b][[:xdigit:]]+,v1,sifive/p650,core</div><div class='ctx'> 0x5b7-0x0-0x0,v1,thead/c900-legacy,core</div><div class='add'>+0x5b7-0x80000000090c0d00-0x2047000,v1,thead/c900-legacy,core</div><div class='ctx'> 0x67e-0x80000000db0000[89]0-0x[[:xdigit:]]+,v1,starfive/dubhe-80,core</div><div class='ctx'> 0x31e-0x8000000000008a45-0x[[:xdigit:]]+,v1,andes/ax45,core</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/s390/cf_z16/transaction.json b/tools/perf/pmu-events/arch/s390/cf_z16/transaction.json<br/>index 3ab1d3a6638c..57b785307a85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/s390/cf_z16/transaction.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/s390/cf_z16/transaction.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/s390/cf_z16/transaction.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/s390/cf_z16/transaction.json</a></div><div class='hunk'>@@ -7,17 +7,17 @@</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Cycles per Instruction",</div><div class='ctx'>     "MetricName": "cpi",</div><div class='del'>-    "MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(CPU_CYCLES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Problem State Instruction Ratio",</div><div class='ctx'>     "MetricName": "prbstate",</div><div class='del'>-    "MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(PROBLEM_STATE_INSTRUCTIONS) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Level One Miss per 100 Instructions",</div><div class='ctx'>     "MetricName": "l1mp",</div><div class='del'>-    "MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(L1I_DIR_WRITES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Percentage sourced from Level 2 cache",</div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Estimated Instruction Complexity CPI infinite Level 1",</div><div class='ctx'>     "MetricName": "est_cpi",</div><div class='del'>-    "MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(CPU_CYCLES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Estimated Sourcing Cycles per Level 1 Miss",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/s390/cf_z17/transaction.json b/tools/perf/pmu-events/arch/s390/cf_z17/transaction.json<br/>index 74df533c8b6f..7ded6a5a76c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/s390/cf_z17/transaction.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/s390/cf_z17/transaction.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/s390/cf_z17/transaction.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/s390/cf_z17/transaction.json</a></div><div class='hunk'>@@ -7,17 +7,17 @@</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Cycles per Instruction",</div><div class='ctx'>     "MetricName": "cpi",</div><div class='del'>-    "MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(CPU_CYCLES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Problem State Instruction Ratio",</div><div class='ctx'>     "MetricName": "prbstate",</div><div class='del'>-    "MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(PROBLEM_STATE_INSTRUCTIONS) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Level One Miss per 100 Instructions",</div><div class='ctx'>     "MetricName": "l1mp",</div><div class='del'>-    "MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(L1I_DIR_WRITES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Percentage sourced from Level 2 cache",</div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Estimated Instruction Complexity CPI infinite Level 1",</div><div class='ctx'>     "MetricName": "est_cpi",</div><div class='del'>-    "MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(INSTRUCTIONS) else 0"</div><div class='add'>+    "MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(L1C_TLB2_MISSES) else 0"</div><div class='ctx'>   },</div><div class='ctx'>   {</div><div class='ctx'>     "BriefDescription": "Estimated Sourcing Cycles per Level 1 Miss",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json b/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json<br/>index 377dfecd96bd..cae7c0cf02f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -552,7 +552,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_atom@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -751,7 +751,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -790,11 +790,20 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -802,23 +811,14 @@</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='del'>-        "Unit": "cpu_core"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20",</div><div class='hunk'>@@ -826,7 +826,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -862,7 +862,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -879,7 +879,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -992,7 +992,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(25 * tma_info_system_core_frequency * (cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD@ * (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ / (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ + cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD@))) + 24 * tma_info_system_core_frequency * cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -1109,7 +1108,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1238,7 +1237,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1851,7 +1850,7 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.THREAD@ / (cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@ / 2 if #SMT_on else cpu_core@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute",</div><div class='hunk'>@@ -1912,7 +1911,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc\\,cpu=cpu_core@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1926,7 +1925,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_core@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1936,7 +1935,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_ARB_TRK_REQUESTS.ALL + UNC_ARB_COH_TRK_REQUESTS.ALL) / 1e6 / tma_info_system_time / 1e3",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1980,7 +1979,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(UNC_ARB_TRK_OCCUPANCY.RD + UNC_ARB_DAT_OCCUPANCY.RD) / UNC_ARB_TRK_REQUESTS.RD",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryLat;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_read_latency",</div><div class='hunk'>@@ -2032,6 +2030,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Measured Average Uncore Frequency for the SoC [GHz]",</div><div class='add'>+        "MetricExpr": "tma_info_system_socket_clks / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "tma_info_system_uncore_frequency",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.THREAD@",</div><div class='ctx'>         "MetricGroup": "Pipeline",</div><div class='hunk'>@@ -2150,12 +2155,12 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (cpu_core@MEM_INST_RETIRED.ALL_LOADS@ - cpu_core@MEM_LOAD_RETIRED.FB_HIT@ - cpu_core@MEM_LOAD_RETIRED.L1_MISS@) * 20 / 100, max(cpu_core@CYCLE_ACTIVITY.CYCLES_MEM_ANY@ - cpu_core@MEMORY_ACTIVITY.CYCLES_L1D_MISS@, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2171,7 +2176,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "3 * tma_info_system_core_frequency * cpu_core@MEM_LOAD_RETIRED.L2_HIT@ * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -2192,12 +2196,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "9 * tma_info_system_core_frequency * (cpu_core@MEM_LOAD_RETIRED.L3_HIT@ * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2279,6 +2282,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(16 * max(0, cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ - cpu_core@L2_RQSTS.ALL_RFO@) + cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ / cpu_core@MEM_INST_RETIRED.ALL_STORES@ * (10 * cpu_core@L2_RQSTS.RFO_HIT@ + min(cpu_core@CPU_CLK_UNHALTED.THREAD@, cpu_core@OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO@))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -2314,7 +2318,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2324,13 +2328,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -2341,7 +2345,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@MISC2_RETIRED.LFENCE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -2400,7 +2403,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "max(cpu_core@IDQ.MS_CYCLES_ANY@, cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@ / (cpu_core@UOPS_RETIRED.SLOTS@ / cpu_core@UOPS_ISSUED.ANY@)) / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "max(cpu_core@IDQ.MS_CYCLES_ANY@, cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@ / (cpu_core@UOPS_RETIRED.SLOTS@ / cpu_core@UOPS_ISSUED.ANY@)) / tma_info_core_core_clks / 2.4",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2439,6 +2442,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -2507,6 +2511,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@)) / tma_info_thread_clks if cpu_core@ARITH.DIV_ACTIVE@ &lt; cpu_core@CYCLE_ACTIVITY.STALLS_TOTAL@ - cpu_core@EXE_ACTIVITY.BOUND_ON_LOADS@ else (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2517,6 +2522,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "(cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ + max(cpu_core@RS.EMPTY_RESOURCE@ - cpu_core@RESOURCE_STALLS.SCOREBOARD@, 0)) / tma_info_thread_clks * (cpu_core@CYCLE_ACTIVITY.STALLS_TOTAL@ - cpu_core@EXE_ACTIVITY.BOUND_ON_LOADS@) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2527,6 +2533,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2537,7 +2544,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.2_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2548,7 +2554,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.CYCLES_GE_3@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2560,7 +2565,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2591,7 +2596,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.PAUSE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2626,7 +2630,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/cache.json b/tools/perf/pmu-events/arch/x86/alderlake/cache.json<br/>index 5461576dafc7..be15a7f83717 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/cache.json</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L1D.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.REPLACEMENT",</div><div class='del'>-        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -36,7 +35,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL_PERIODS",</div><div class='del'>-        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -47,7 +46,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALL",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event L1D_PEND_MISS.L2_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -57,7 +55,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALLS",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -67,7 +65,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING",</div><div class='del'>-        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -78,7 +76,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts duration of L1D miss outstanding in cycles. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -88,7 +86,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.ALL",</div><div class='del'>-        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -98,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -108,7 +106,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -118,7 +116,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='del'>-        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -137,7 +135,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.ALL",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -167,7 +165,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -177,7 +175,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the total number of L2 code requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of L2 code requests.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -187,7 +185,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -197,7 +195,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x27",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -207,7 +205,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_HWPF",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.ALL_HWPF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xf0",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -217,7 +214,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_RFO",</div><div class='del'>-        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -227,7 +224,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -237,7 +234,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts L2 cache misses when fetching instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x24",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -247,7 +244,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -257,7 +254,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -267,7 +264,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x30",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -277,7 +273,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -287,7 +283,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -297,7 +293,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_HIT",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -307,7 +303,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_MISS",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x22",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -317,7 +313,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_HIT",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -327,7 +323,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_MISS",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x28",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -337,7 +333,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x23",</div><div class='ctx'>         "EventName": "L2_TRANS.L2_WB",</div><div class='del'>-        "PublicDescription": "Counts L2 writebacks that access L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 writebacks that access L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -357,7 +353,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -377,7 +373,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -552,7 +548,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x43",</div><div class='ctx'>         "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",</div><div class='del'>-        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfd",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -853,7 +849,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x44",</div><div class='ctx'>         "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "MEM_STORE_RETIRED.L2_HIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -882,7 +877,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 128 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='hunk'>@@ -895,7 +890,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 16 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='hunk'>@@ -908,7 +903,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 256 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='hunk'>@@ -921,7 +916,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 32 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='hunk'>@@ -934,7 +929,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 4 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='hunk'>@@ -947,7 +942,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 512 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='hunk'>@@ -960,7 +955,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 64 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='hunk'>@@ -973,7 +968,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 8 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='hunk'>@@ -1050,7 +1045,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe5",</div><div class='ctx'>         "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1068,6 +1063,30 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_M.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x1F803C0008",</div><div class='add'>+        "PublicDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_NONM.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x1F803C1000",</div><div class='add'>+        "PublicDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -1308,6 +1327,18 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x1F803C4477",</div><div class='add'>+        "PublicDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts L1 data cache software prefetches which include T0/T1/T2 and NTA (except PREFETCHW) that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -1372,7 +1403,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS.ALL_REQUESTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1382,7 +1412,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1392,7 +1422,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts both cacheable and non-cacheable code read requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and non-cacheable code read requests.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1402,7 +1432,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1412,7 +1442,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1424,7 +1454,6 @@</div><div class='ctx'>         "Errata": "ADL038",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1436,7 +1465,6 @@</div><div class='ctx'>         "Errata": "ADL038",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1447,7 +1475,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1458,7 +1486,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 outstanding demand data read request is pending. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1469,7 +1496,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1480,7 +1507,6 @@</div><div class='ctx'>         "Errata": "ADL038",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1490,7 +1516,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1500,7 +1526,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1510,7 +1536,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2c",</div><div class='ctx'>         "EventName": "SQ_MISC.BUS_LOCK",</div><div class='del'>-        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1520,7 +1546,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xf",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1530,7 +1555,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1540,7 +1565,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHW instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1550,7 +1575,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1560,7 +1585,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/floating-point.json b/tools/perf/pmu-events/arch/x86/alderlake/floating-point.json<br/>index d01f1b163ed8..62fd70f220e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/floating-point.json</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -33,7 +32,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.FP",</div><div class='del'>-        "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -43,7 +42,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='del'>-        "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -53,7 +51,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -63,7 +60,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -73,7 +69,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_5",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -83,7 +78,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -93,7 +87,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -103,7 +96,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -113,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -123,7 +115,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -133,7 +125,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -143,7 +135,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -153,7 +145,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x18",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -163,7 +155,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -173,7 +165,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -183,7 +175,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -193,7 +185,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.VECTOR",</div><div class='del'>-        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/frontend.json b/tools/perf/pmu-events/arch/x86/alderlake/frontend.json<br/>index dae3174a74fb..ff3b30c2619a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/frontend.json</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x60",</div><div class='ctx'>         "EventName": "BACLEARS.ANY",</div><div class='del'>-        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.LCP",</div><div class='del'>-        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.MS_BUSY",</div><div class='del'>-        "PublicDescription": "Cycles the Microcode Sequencer is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -44,7 +43,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='ctx'>         "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='del'>-        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -302,7 +301,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -314,7 +313,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='del'>-        "PublicDescription": "ICACHE_DATA.STALL_PERIODS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -324,7 +322,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x83",</div><div class='ctx'>         "EventName": "ICACHE_TAG.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -335,7 +333,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -346,7 +344,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -356,7 +354,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -367,7 +365,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -378,7 +376,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -388,7 +386,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -399,7 +397,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -411,7 +409,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_SWITCHES",</div><div class='del'>-        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -421,7 +419,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -431,7 +429,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -442,7 +440,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -454,7 +452,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -464,7 +462,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -475,7 +473,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -487,7 +485,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/memory.json b/tools/perf/pmu-events/arch/x86/alderlake/memory.json<br/>index 07f5786bdbc0..a0260d5b8619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/memory.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -79,7 +78,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='del'>-        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -90,7 +89,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -101,7 +99,6 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -112,7 +109,7 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -123,7 +120,7 @@</div><div class='ctx'>         "CounterMask": "9",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -417,7 +414,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts demand data read requests that miss the L3 cache. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -427,7 +423,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/other.json b/tools/perf/pmu-events/arch/x86/alderlake/other.json<br/>index 5f64138edfe4..af46cde26b54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/other.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.HARDWARE",</div><div class='del'>-        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.PAGE_FAULT",</div><div class='del'>-        "PublicDescription": "ASSISTS.PAGE_FAULT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +23,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x28",</div><div class='ctx'>         "EventName": "CORE_POWER.LICENSE_1",</div><div class='del'>-        "PublicDescription": "CORE_POWER.LICENSE_1 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -34,7 +32,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x28",</div><div class='ctx'>         "EventName": "CORE_POWER.LICENSE_2",</div><div class='del'>-        "PublicDescription": "CORE_POWER.LICENSE_2 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -44,7 +41,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x28",</div><div class='ctx'>         "EventName": "CORE_POWER.LICENSE_3",</div><div class='del'>-        "PublicDescription": "CORE_POWER.LICENSE_3 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -113,7 +109,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x2d",</div><div class='ctx'>         "EventName": "XQ.FULL_CYCLES",</div><div class='del'>-        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/pipeline.json b/tools/perf/pmu-events/arch/x86/alderlake/pipeline.json<br/>index 48ef2a8cc49a..57a8c78cdc49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/pipeline.json</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.DIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -27,14 +26,15 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of active floating point and integer dividers per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_OCCUPANCY",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -42,8 +42,9 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of floating point and integer divider uops executed per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_UOPS",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -57,7 +58,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FP_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -78,7 +78,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.IDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the integer divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -108,7 +107,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.INT_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.IDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -118,7 +116,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1b",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -549,7 +547,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -559,7 +557,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -569,7 +567,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x70",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -597,7 +595,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -607,7 +605,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",</div><div class='ctx'>         "SampleAfterValue": "25003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -617,7 +615,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -629,7 +626,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE_INST Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -649,7 +645,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -687,7 +683,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -724,7 +720,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -734,7 +730,6 @@</div><div class='ctx'>         "CounterMask": "8",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -745,7 +740,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -756,7 +750,6 @@</div><div class='ctx'>         "CounterMask": "16",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='del'>-        "PublicDescription": "Cycles while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -767,7 +760,6 @@</div><div class='ctx'>         "CounterMask": "12",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -778,7 +770,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -789,7 +780,6 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='del'>-        "PublicDescription": "Total execution stalls. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -799,7 +789,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -809,7 +799,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -819,7 +808,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -829,7 +818,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -839,7 +828,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -850,7 +839,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='del'>-        "PublicDescription": "Execution stalls while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -861,7 +849,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='del'>-        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -871,7 +859,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='del'>-        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -881,7 +869,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='ctx'>         "EventName": "INST_DECODED.DECODERS",</div><div class='del'>-        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -927,7 +915,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -937,7 +924,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -956,7 +943,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -968,7 +955,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -978,7 +965,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='del'>-        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -988,7 +975,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1000,7 +987,6 @@</div><div class='ctx'>         "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x7",</div><div class='del'>-        "PublicDescription": "Bubble cycles of BAClear (Unknown Branch). Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1010,7 +996,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.UOP_DROPPING",</div><div class='del'>-        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1020,7 +1006,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.128BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x13",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1030,7 +1015,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.256BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xac",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1040,7 +1024,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1050,7 +1034,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1060,7 +1044,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.MUL_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1070,7 +1053,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.SHUFFLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1080,7 +1062,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_128 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1090,7 +1071,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1119,7 +1099,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='del'>-        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1138,7 +1118,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.NO_SR",</div><div class='del'>-        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x88",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1148,7 +1128,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='del'>-        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1158,7 +1138,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x4c",</div><div class='ctx'>         "EventName": "LOAD_HIT_PREFETCH.SWPF",</div><div class='del'>-        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1169,7 +1149,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1180,7 +1160,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1190,7 +1170,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1202,7 +1182,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of machine clears (nukes) of any type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1258,7 +1238,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.SMC",</div><div class='del'>-        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1268,7 +1248,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe0",</div><div class='ctx'>         "EventName": "MISC2_RETIRED.LFENCE",</div><div class='del'>-        "PublicDescription": "number of LFENCE retired instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1288,7 +1268,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcc",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1298,7 +1278,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SB",</div><div class='del'>-        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1308,7 +1288,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SCOREBOARD",</div><div class='del'>-        "PublicDescription": "Counts cycles where the pipeline is stalled due to serializing operations. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1318,7 +1297,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1331,7 +1310,7 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1341,7 +1320,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_RESOURCE",</div><div class='del'>-        "PublicDescription": "Cycles when Reservation Station (RS) is empty due to a resource in the back-end Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1355,7 +1333,6 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1366,7 +1343,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.CYCLES",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1395,7 +1371,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1405,7 +1381,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1415,7 +1391,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1425,7 +1401,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "TOPDOWN.MEMORY_BOUND_SLOTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1444,7 +1419,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS_P",</div><div class='del'>-        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1661,7 +1636,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x76",</div><div class='ctx'>         "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='del'>-        "PublicDescription": "UOPS_DECODED.DEC0_UOPS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1671,7 +1645,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 0.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1681,7 +1655,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 1. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 1.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1691,7 +1665,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_2_3_10",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1701,7 +1675,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_4_9",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1711,7 +1685,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_5_11",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1721,7 +1695,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_6",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 6. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 6.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1731,7 +1705,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_7_8",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1742,7 +1716,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1753,7 +1727,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1764,7 +1738,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1775,7 +1749,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1786,7 +1760,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 uop was executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1797,7 +1771,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Cycles where at least 2 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1808,7 +1782,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Cycles where at least 3 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1819,7 +1793,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Cycles where at least 4 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1831,7 +1805,7 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1844,7 +1818,6 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_EXECUTED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1854,7 +1827,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of uops to be executed per-thread each cycle. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1864,7 +1836,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.X87",</div><div class='del'>-        "PublicDescription": "Counts the number of x87 uops executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1883,7 +1855,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1894,7 +1866,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.CYCLES",</div><div class='del'>-        "PublicDescription": "UOPS_ISSUED.CYCLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1913,7 +1884,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.CYCLES",</div><div class='del'>-        "PublicDescription": "Counts cycles where at least one uop has retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1923,7 +1894,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.HEAVY",</div><div class='del'>-        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1954,7 +1925,6 @@</div><div class='ctx'>         "EventName": "UOPS_RETIRED.MS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "UOPS_RETIRED.MS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1964,7 +1934,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.SLOTS",</div><div class='del'>-        "PublicDescription": "Counts the retirement slots used each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the retirement slots used each cycle.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1976,7 +1946,7 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event counts cycles without actually retired uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1989,7 +1959,6 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_RETIRED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json<br/>index 7c0779c74154..b5604c7534e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/uncore-interconnect.json</a></div><div class='hunk'>@@ -65,7 +65,6 @@</div><div class='ctx'>         "Counter": "0,1",</div><div class='ctx'>         "EventCode": "0x81",</div><div class='ctx'>         "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "ARB"</div><div class='hunk'>@@ -103,7 +102,6 @@</div><div class='ctx'>         "Counter": "0,1",</div><div class='ctx'>         "EventCode": "0x81",</div><div class='ctx'>         "EventName": "UNC_ARB_TRK_REQUESTS.RD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "ARB"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json b/tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json<br/>index ffbbd08acc68..132ce48af6d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlake/virtual-memory.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -55,7 +55,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -65,7 +65,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -85,7 +85,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -116,7 +116,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -126,7 +126,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -136,7 +136,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -146,7 +146,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -156,7 +156,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -184,7 +184,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -195,7 +195,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -215,7 +215,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -225,7 +225,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -235,7 +235,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -245,7 +245,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json b/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json<br/>index ce93648043ef..0f72c9192df6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -460,12 +460,12 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fraction of cycles spent in Kernel mode",</div><div class='del'>-        "MetricExpr": "cpu@CPU_CLK_UNHALTED.CORE_P@k / CPU_CLK_UNHALTED.CORE",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.CORE_P:k / CPU_CLK_UNHALTED.CORE",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_kernel_utilization"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/cache.json b/tools/perf/pmu-events/arch/x86/alderlaken/cache.json<br/>index 669f4979b651..76a841675337 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlaken/cache.json</a></div><div class='hunk'>@@ -247,7 +247,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 128 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='hunk'>@@ -259,7 +259,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 16 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='hunk'>@@ -271,7 +271,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 256 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='hunk'>@@ -283,7 +283,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 32 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='hunk'>@@ -295,7 +295,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 4 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='hunk'>@@ -307,7 +307,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 512 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='hunk'>@@ -319,7 +319,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 64 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='hunk'>@@ -331,7 +331,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged loads with an instruction latency that exceeds or equals the threshold of 8 cycles as defined in MEC_CR_PEBS_LD_LAT_THRESHOLD (3F6H). Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json b/tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json<br/>index 1dd61baec1a9..d650cbd48c1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlaken/pipeline.json</a></div><div class='hunk'>@@ -9,16 +9,18 @@</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of active floating point and integer dividers per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_OCCUPANCY",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of floating point and integer divider uops executed per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_UOPS",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json<br/>index 7c0779c74154..b5604c7534e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/alderlaken/uncore-interconnect.json</a></div><div class='hunk'>@@ -65,7 +65,6 @@</div><div class='ctx'>         "Counter": "0,1",</div><div class='ctx'>         "EventCode": "0x81",</div><div class='ctx'>         "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "ARB"</div><div class='hunk'>@@ -103,7 +102,6 @@</div><div class='ctx'>         "Counter": "0,1",</div><div class='ctx'>         "EventCode": "0x81",</div><div class='ctx'>         "EventName": "UNC_ARB_TRK_REQUESTS.RD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "ARB"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json b/tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json<br/>index b22a02450e6c..4f1f77404943 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/arl-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -567,7 +567,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_atom@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -774,7 +774,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -786,7 +786,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-bad\\-spec@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-bad\\-spec@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_bad_speculation",</div><div class='ctx'>         "MetricThreshold": "tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -813,35 +813,35 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_capacity / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_capacity / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='del'>-        "Unit": "cpu_core"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20",</div><div class='hunk'>@@ -849,7 +849,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_microcode_sequencer + tma_few_uops_instructions) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_microcode_sequencer + tma_few_uops_instructions) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -858,7 +858,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -885,7 +885,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -902,7 +902,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -1042,7 +1042,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@R, 24 * tma_info_system_core_frequency) + cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM@R, 25 * tma_info_system_core_frequency)) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -1095,7 +1094,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop cache) fetch pipeline",</div><div class='del'>-        "MetricExpr": "(cpu_core@IDQ.DSB_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ + cpu_core@IDQ.DSB_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@IDQ.DSB_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.DSB_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.STARVATION_CYCLES@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "DSB;FetchBW;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_dsb",</div><div class='ctx'>         "MetricThreshold": "tma_dsb &gt; 0.15 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1149,7 +1148,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1166,7 +1165,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend latency issues",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-fetch\\-lat@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-fetch\\-lat@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group",</div><div class='ctx'>         "MetricName": "tma_fetch_latency",</div><div class='ctx'>         "MetricThreshold": "tma_fetch_latency &gt; 0.1 &amp; tma_frontend_bound &gt; 0.15",</div><div class='hunk'>@@ -1216,7 +1215,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) scalar uops fraction the CPU has retired",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_scalar",</div><div class='ctx'>         "MetricThreshold": "tma_fp_scalar &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6)",</div><div class='hunk'>@@ -1226,7 +1225,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction the CPU has retired aggregated across all vector widths",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.VECTOR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6)",</div><div class='hunk'>@@ -1236,7 +1235,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic FP vector uops fraction the CPU has retired for 128-bit wide vectors",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@) / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE@) / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL5;tma_L5_group;tma_fp_vector_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector_128b",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector_128b &gt; 0.1 &amp; (tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6))",</div><div class='hunk'>@@ -1246,7 +1245,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic FP vector uops fraction the CPU has retired for 256-bit wide vectors",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.VECTOR\\,umask\\=0x30@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.VECTOR\\,umask\\=0x30@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL5;tma_L5_group;tma_fp_vector_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector_256b",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector_256b &gt; 0.1 &amp; (tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6))",</div><div class='hunk'>@@ -1257,7 +1256,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-fe\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-fe\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvFB;BvIO;Default;PGO;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_frontend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_frontend_bound &gt; 0.15",</div><div class='hunk'>@@ -1278,7 +1277,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1456,7 +1455,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Floating Point Operations Per Cycle",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Flops;Ret",</div><div class='ctx'>         "MetricName": "tma_info_core_flopc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1597,7 +1596,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + cpu_core@FP_ARITH_INST_RETIRED.VECTOR@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith &lt; 10",</div><div class='hunk'>@@ -1606,7 +1605,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;FpVector;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_avx128",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_avx128 &lt; 10",</div><div class='hunk'>@@ -1615,7 +1614,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;FpVector;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_avx256",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_avx256 &lt; 10",</div><div class='hunk'>@@ -1624,7 +1623,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_INST_RETIRED.SCALAR_DOUBLE@",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_OPS_RETIRED.SCALAR_DOUBLE@",</div><div class='ctx'>         "MetricGroup": "Flops;FpScalar;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_scalar_dp",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_dp &lt; 10",</div><div class='hunk'>@@ -1633,7 +1632,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE@",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_OPS_RETIRED.SCALAR_SINGLE@",</div><div class='ctx'>         "MetricGroup": "Flops;FpScalar;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_scalar_sp",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_sp &lt; 10",</div><div class='hunk'>@@ -1658,7 +1657,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_ipflop",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_ipflop &lt; 10",</div><div class='hunk'>@@ -1713,7 +1712,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average per-thread data fill bandwidth to the L1 data cache [GB / sec]",</div><div class='del'>-        "MetricExpr": "64 * cpu_core@L1D.REPLACEMENT@ / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "64 * cpu_core@L1D.L1_REPLACEMENT@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW",</div><div class='ctx'>         "MetricName": "tma_info_memory_l1d_cache_fill_bw",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1726,6 +1725,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "L0 cache true misses per kilo instruction for retired demand loads",</div><div class='add'>+        "MetricExpr": "1e3 * (cpu_core@MEM_LOAD_RETIRED.L1_MISS@ + cpu_core@MEM_LOAD_RETIRED.L1_HIT_L1@) / cpu_core@INST_RETIRED.ANY@",</div><div class='add'>+        "MetricGroup": "CacheHits;Mem",</div><div class='add'>+        "MetricName": "tma_info_memory_l1dl0_mpki",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",</div><div class='ctx'>         "MetricExpr": "1e3 * cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / cpu_core@INST_RETIRED.ANY@",</div><div class='ctx'>         "MetricGroup": "CacheHits;Mem",</div><div class='hunk'>@@ -1941,6 +1947,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "cpu_core@IDQ.MS_UOPS@ / cpu_core@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@ASSISTS.ANY@",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1974,7 +1987,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc\\,cpu=cpu_core@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1988,14 +2001,22 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_core@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "32 * UNC_M_TOTAL_DATA / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='add'>+        "MetricName": "tma_info_system_dram_bw_use",</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@) / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Cor;Flops;HPC",</div><div class='ctx'>         "MetricName": "tma_info_system_gflops",</div><div class='ctx'>         "PublicDescription": "Giga Floating Point Operations Per Second. Aggregate across all supported options of: FP precisions, scalar and vector instructions, vector-width",</div><div class='hunk'>@@ -2062,6 +2083,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Measured Average Uncore Frequency for the SoC [GHz]",</div><div class='add'>+        "MetricExpr": "tma_info_system_socket_clks / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "tma_info_system_uncore_frequency",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.THREAD@",</div><div class='ctx'>         "MetricGroup": "Pipeline",</div><div class='hunk'>@@ -2182,12 +2210,12 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='del'>-        "MetricExpr": "4 * cpu_core@DEPENDENT_LOADS.ANY@ / tma_info_thread_clks",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "MetricExpr": "4 * cpu_core@DEPENDENT_LOADS.ANY\\,cmask\\=1@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2203,7 +2231,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L2_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L2_HIT@R, 3 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -2224,12 +2251,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L3_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L3_HIT@R, 9 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2311,6 +2337,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ * cpu_core@MEM_INST_RETIRED.LOCK_LOADS@R / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -2321,7 +2348,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to LSD (Loop Stream Detector) unit",</div><div class='del'>-        "MetricExpr": "cpu_core@LSD.UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "cpu_core@LSD.UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / tma_info_thread_clks / 2",</div><div class='ctx'>         "MetricGroup": "FetchBW;LSD;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_lsd",</div><div class='ctx'>         "MetricThreshold": "tma_lsd &gt; 0.15 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2346,7 +2373,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2356,13 +2383,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -2373,7 +2400,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@MISC2_RETIRED.LFENCE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -2412,7 +2438,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the MITE pipeline (the legacy decode pipeline)",</div><div class='del'>-        "MetricExpr": "(cpu_core@IDQ.MITE_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.MITE_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@IDQ.MITE_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.MITE_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.STARVATION_CYCLES@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "DSBmiss;FetchBW;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_mite",</div><div class='ctx'>         "MetricThreshold": "tma_mite &gt; 0.1 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2432,7 +2458,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu_core@IDQ.MS_CYCLES_ANY@ / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "cpu_core@IDQ.MS_CYCLES_ANY@ / tma_info_thread_clks / 1.8",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2471,7 +2497,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='del'>-        "MetricExpr": "max(0, tma_light_operations - (tma_x87_use + (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + cpu_core@FP_ARITH_INST_RETIRED.VECTOR@) / (tma_retiring * tma_info_thread_slots) + (cpu_core@INT_VEC_RETIRED.ADD_128@ + cpu_core@INT_VEC_RETIRED.VNNI_128@ + cpu_core@INT_VEC_RETIRED.ADD_256@ + cpu_core@INT_VEC_RETIRED.MUL_256@ + cpu_core@INT_VEC_RETIRED.VNNI_256@) / (tma_retiring * tma_info_thread_slots) + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "max(0, tma_light_operations - (tma_x87_use + (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@) / (tma_retiring * tma_info_thread_slots) + (cpu_core@INT_VEC_RETIRED.ADD_128@ + cpu_core@INT_VEC_RETIRED.VNNI_128@ + cpu_core@INT_VEC_RETIRED.ADD_256@ + cpu_core@INT_VEC_RETIRED.MUL_256@ + cpu_core@INT_VEC_RETIRED.VNNI_256@) / (tma_retiring * tma_info_thread_slots) + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='ctx'>         "MetricThreshold": "tma_other_light_ops &gt; 0.3 &amp; tma_light_operations &gt; 0.6",</div><div class='hunk'>@@ -2509,6 +2536,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ + (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@)) / tma_info_thread_clks if cpu_core@ARITH.DIV_ACTIVE@ &lt; cpu_core@CYCLE_ACTIVITY.STALLS_TOTAL@ - cpu_core@EXE_ACTIVITY.BOUND_ON_LOADS@ else (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2519,6 +2547,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2529,6 +2558,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2539,7 +2569,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.2_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2550,7 +2579,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.CYCLES_GE_3@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2571,7 +2599,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2586,7 +2614,7 @@</div><div class='ctx'>         "MetricGroup": "BvIO;PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group;tma_issueSO",</div><div class='ctx'>         "MetricName": "tma_serializing_operation",</div><div class='ctx'>         "MetricThreshold": "tma_serializing_operation &gt; 0.1 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2)",</div><div class='del'>-        "PublicDescription": "This metric represents fraction of cycles the CPU issue-pipeline was stalled due to serializing operations. Instructions like CPUID; WRMSR or LFENCE serialize the out-of-order execution which may limit performance. Sample with: RESOURCE_STALLS.SCOREBOARD. Related metrics: tma_ms_switches",</div><div class='add'>+        "PublicDescription": "This metric represents fraction of cycles the CPU issue-pipeline was stalled due to serializing operations. Instructions like CPUID; WRMSR or LFENCE serialize the out-of-order execution which may limit performance. Sample with: PARTIAL_RAT_STALLS.SCOREBOARD. Related metrics: tma_ms_switches",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2602,7 +2630,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.PAUSE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2637,7 +2664,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2652,6 +2679,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric estimates clocks wasted due to loads blocked due to unknown store address (did not do memory disambiguation) or due to unknown store data",</div><div class='add'>+        "MetricExpr": "7 * cpu_core@LD_BLOCKS.STORE_EARLY\\,cmask\\=1@ / tma_info_thread_clks",</div><div class='add'>+        "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='add'>+        "MetricName": "tma_store_early_blk",</div><div class='add'>+        "MetricThreshold": "tma_store_early_blk &gt; 0.2",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@LD_BLOCKS.STORE_FORWARD@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/cache.json b/tools/perf/pmu-events/arch/x86/arrowlake/cache.json<br/>index 91929d8bcf47..fba4a0672f6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/cache.json</a></div><div class='hunk'>@@ -16,6 +16,16 @@</div><div class='ctx'>         "PublicDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, stores, and prefetches.  Does not count evictions or dirty writebacks caused by snoops.  Does not count a replacement unless a (dirty) line was written back.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, stores, and prefetches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "DL1.DIRTY_EVICTION",</div><div class='add'>+        "PublicDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, stores, and prefetches.  Does not count evictions or dirty writebacks caused by snoops.  Does not count a replacement unless a (dirty) line was written back.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -29,6 +39,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cachelines replaced into the L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "L1D.L1_REPLACEMENT",</div><div class='add'>+        "PublicDescription": "Counts cachelines replaced into the L1 d-cache.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cachelines replaced into the L0 and L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='hunk'>@@ -104,6 +124,15 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.E",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.E",</div><div class='ctx'>         "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state. Counts on a per core basis.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='hunk'>@@ -114,12 +143,40 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.F",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Forward state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.F",</div><div class='ctx'>         "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Forward state. Counts on a per core basis.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Invalid state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.I",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Invalid state, does not count lines that go Invalid due to an eviction",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Modified state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.M",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Modified state",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='hunk'>@@ -134,6 +191,15 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.S",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Shared state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.S",</div><div class='ctx'>         "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Shared state. Counts on a per core basis.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='hunk'>@@ -180,6 +246,16 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 cache lines that have been L2 hardware prefetched but not used by demand accesses",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x26",</div><div class='add'>+        "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines that have been L2 hardware prefetched but not used by demand accesses.  Increments on the core that brought the line in originally.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cache lines that have been L2 hardware prefetched but not used by demand accesses",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='hunk'>@@ -190,6 +266,42 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 prefetches initiated by either the L2 Stream or AMP that were  throttled due to Dynamic Prefetch Throttling. The throttle requestor/source could be from the uncore/SOC or the Dead Block Predictor.  Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x28",</div><div class='add'>+        "EventName": "L2_PREFETCHES_THROTTLED.DPT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 prefetches initiated by the L2 Stream that were throttled due to Demand Throttle Prefetcher.  DTP Global Triggered with no Local Override. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x28",</div><div class='add'>+        "EventName": "L2_PREFETCHES_THROTTLED.DTP",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 prefetches initiated by the L2 Stream and not throttled by DTP due to local override.  These prefetches may still be throttled due to another throttler mechanism besides DTP. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x28",</div><div class='add'>+        "EventName": "L2_PREFETCHES_THROTTLED.DTP_OVERRIDE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 prefetches initiated by either the L2 Stream or AMP that were throttled due to exceeding the XQ threshold set by either XQ_THRESHOLD_DTP or XQ_THRESHOLD. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x28",</div><div class='add'>+        "EventName": "L2_PREFETCHES_THROTTLED.XQ_THRESH",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of demand and prefetch transactions that the External Queue (XQ) rejects due to a full or near full condition.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x30",</div><div class='hunk'>@@ -199,6 +311,16 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 Cache Accesses Counts the total number of L2 Cache Accesses - sum of hits, misses, rejects  front door requests for CRd/DRd/RFO/ItoM/L2 Prefetches only, per core event",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 Cache Accesses Counts the total number of L2 Cache Accesses - sum of hits, misses, rejects  front door requests for CRd/DRd/RFO/ItoM/L2 Prefetches only.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "All accesses to L2 cache [This event is alias to L2_RQSTS.REFERENCES, L2_RQSTS.ANY]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='hunk'>@@ -213,11 +335,29 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 Cache Accesses that resulted in a Hit from a front door request only (does not include rejects or recycles), per core event",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.HIT",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of total L2 Cache Accesses that resulted in a Miss from a front door request only (does not include rejects or recycles), per core event",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Read requests with true-miss in L2 cache [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='hunk'>@@ -237,6 +377,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 Cache Accesses that miss the L2 and get BBL reject  short and long rejects (includes those counted in L2_reject_XQ.any), per core event",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.REJECTS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of L2 Cache Accesses that miss the L2 and get BBL reject  short and long rejects, per core event",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='hunk'>@@ -356,6 +505,51 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches that were  throttled due to Dynamic Prefetch Throttling.  The throttle requestor/source could be from the uncore/SOC or the Dead Block Predictor. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x29",</div><div class='add'>+        "EventName": "LLC_PREFETCHES_THROTTLED.DPT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches throttled due to Demand Throttle Prefetcher.  DTP Global Triggered with no Local Override. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x29",</div><div class='add'>+        "EventName": "LLC_PREFETCHES_THROTTLED.DTP",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches not throttled by DTP due to local override.  These prefetches may still be throttled due to another throttler mechanism. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x29",</div><div class='add'>+        "EventName": "LLC_PREFETCHES_THROTTLED.DTP_OVERRIDE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches throttled due to LLC hit rate in &lt;insert knob name here&gt;. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x29",</div><div class='add'>+        "EventName": "LLC_PREFETCHES_THROTTLED.HIT_RATE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches throttled due to exceeding the XQ threshold set by either XQ_THRESHOLD_DTP or LLC_XQ_THRESHOLD. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x29",</div><div class='add'>+        "EventName": "LLC_PREFETCHES_THROTTLED.XQ_THRESH",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cycles when L1D is locked",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x42",</div><div class='hunk'>@@ -366,6 +560,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x2e",</div><div class='add'>+        "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of cacheable memory requests that miss in the Last Level Cache (LLC). Requests include demand loads, reads for ownership (RFO), instruction fetches and L1 HW prefetches. If the core has access to an L3 cache, the LLC is the L3 cache, otherwise it is the L2 cache. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x41",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Core-originated cacheable requests that missed L3  (Except hardware prefetches to the L3)",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='hunk'>@@ -376,6 +580,26 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x2e",</div><div class='add'>+        "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of cacheable memory requests that miss in the Last Level Cache (LLC). Requests include demand loads, reads for ownership (RFO), instruction fetches and L1 HW prefetches. If the core has access to an L3 cache, the LLC is the L3 cache, otherwise it is the L2 cache. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x41",</div><div class='add'>+        "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cacheable memory requests that access the LLC. Counts on a per core basis.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x2e",</div><div class='add'>+        "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='add'>+        "PublicDescription": "Counts the number of cacheable memory requests that access the Last Level Cache (LLC). Requests include demand loads, reads for ownership (RFO), instruction fetches and L1 HW prefetches. If the core has access to an L3 cache, the LLC is the L3 cache, otherwise it is the L2 cache. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetches to the L3)",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='hunk'>@@ -532,6 +756,15 @@</div><div class='ctx'>         "EventName": "MEM_BOUND_STALLS_LOAD.SBFULL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled to a store buffer full condition",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.SBFULL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -540,7 +773,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_LOADS",</div><div class='del'>-        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x81",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -551,7 +784,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_STORES",</div><div class='del'>-        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -561,7 +794,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_SWPF",</div><div class='del'>-        "PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x84",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -572,7 +805,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x87",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -583,7 +816,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.LOCK_LOADS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with locked access. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with locked access. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -594,7 +827,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.SPLIT_LOADS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -605,18 +838,29 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.SPLIT_STORES",</div><div class='del'>-        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x42",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_ANY",</div><div class='add'>+        "PublicDescription": "Number of retired instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xf",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions that hit the STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_HIT_LOADS",</div><div class='del'>-        "PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -627,18 +871,39 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_HIT_STORES",</div><div class='del'>-        "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xa",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_ANY",</div><div class='add'>+        "PublicDescription": "Retired instructions that miss the STLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x17",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions that miss the STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",</div><div class='del'>-        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x11",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -649,18 +914,28 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",</div><div class='del'>-        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x12",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x14",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$)",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -671,7 +946,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -682,7 +957,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",</div><div class='del'>-        "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -693,7 +968,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -704,7 +979,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd4",</div><div class='ctx'>         "EventName": "MEM_LOAD_MISC_RETIRED.UC",</div><div class='del'>-        "PublicDescription": "Retired instructions with at least one load to uncacheable memory-type, or at least one cache-line split locked access (Bus Lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired instructions with at least one load to uncacheable memory-type, or at least one cache-line split locked access (Bus Lock). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -715,7 +990,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.FB_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -726,7 +1001,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -737,7 +1012,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT_L0",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -747,7 +1022,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT_L1",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -757,7 +1032,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -768,7 +1043,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with L2 cache hits as data sources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with L2 cache hits as data sources. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -779,7 +1054,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L2_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions missed L2 cache as data sources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions missed L2 cache as data sources. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100021",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -790,7 +1065,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L3_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100021",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -801,12 +1076,21 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L3_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "50021",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in DRAM",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd4",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_MISC_RETIRED.LOCAL_DRAM",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load ops retired that hit the L1 data cache",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='hunk'>@@ -889,6 +1173,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that hit in the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L3_HIT",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1c",</div><div class='add'>+        "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of loads that hit in a write combining buffer (WCB), excluding the first load that caused the WCB to allocate.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='hunk'>@@ -988,6 +1281,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of memory uops retired.  A single uop that performs both a load AND a store will be counted as 1, not 2 (e.g. ADD [mem], CONST)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.ALL",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x83",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load uops retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -1041,7 +1344,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='hunk'>@@ -1065,7 +1368,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='hunk'>@@ -1101,7 +1404,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='hunk'>@@ -1125,7 +1428,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='hunk'>@@ -1149,7 +1452,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='hunk'>@@ -1173,7 +1476,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='hunk'>@@ -1197,7 +1500,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='hunk'>@@ -1221,7 +1524,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='hunk'>@@ -1264,6 +1567,26 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of memory renamed load uops retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.MRN_LOADS",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x9",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of memory renamed store uops retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.MRN_STORES",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xa",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of memory uops retired that were splits.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -1331,9 +1654,29 @@</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.STLB_MISS",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x13",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of memory uops retired that missed in the second level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x13",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that filled the STLB - includes those in DTLB_LOAD_MISSES submasks",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS_LOADS",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x11",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load uops retired that miss in the second Level TLB.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -1344,6 +1687,16 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of store ops retired (store STLB miss)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS_STORES",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of store uops retired that miss in the second level TLB.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -1384,8 +1737,32 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_M.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E00008",</div><div class='add'>+        "PublicDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_NONM.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E01000",</div><div class='add'>+        "PublicDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1397,7 +1774,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1409,7 +1786,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches which forwarded the unmodified data to the requesting core.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1421,7 +1798,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1433,7 +1810,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1444,6 +1821,18 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E04477",</div><div class='add'>+        "PublicDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Any memory transaction that reached the SQ.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json b/tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json<br/>index 23a80c526aa1..3e68c2468f11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/floating-point.json</a></div><div class='hunk'>@@ -1,5 +1,15 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles when any of the floating point dividers are active.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cycles when floating-point divide unit is busy executing divide or square root operations.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "CounterMask": "1",</div><div class='hunk'>@@ -21,6 +31,24 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of active floating point dividers per cycle in the loop stage.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.FPDIV_OCCUPANCY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of floating point divider uops executed per cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.FPDIV_UOPS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts all microcode FP assists.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='hunk'>@@ -474,6 +502,51 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on all floating point ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 0.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P0",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 1.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 2.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P2",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P3",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 0, 1, 2, 3.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/frontend.json b/tools/perf/pmu-events/arch/x86/arrowlake/frontend.json<br/>index 56cf1ec63200..a15de050a76c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/frontend.json</a></div><div class='hunk'>@@ -30,6 +30,42 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a conditional jump.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.COND",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to an indirect branch.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.INDIRECT",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a return branch.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.RETURN",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a direct, unconditional jump.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.UNCOND",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Stalls caused by changing prefix length of the instruction.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='hunk'>@@ -49,6 +85,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of times a decode restriction reduces the decode throughput due to wrong instruction length prediction.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe9",</div><div class='add'>+        "EventName": "DECODE_RESTRICTION.PREDECODE_WRONG",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "DSB-to-MITE switch true penalty cycles.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='hunk'>@@ -81,7 +126,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ANY_ANT",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x9",</div><div class='del'>-        "PublicDescription": "Always Not Taken (ANT) conditional retired branches (no BTB entry and not mispredicted) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Always Not Taken (ANT) conditional retired branches (no BTB entry and not mispredicted) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -93,7 +138,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x1",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -179,7 +224,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.DSB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x11",</div><div class='del'>-        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -218,7 +263,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ITLB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x14",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -239,7 +284,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.L1I_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x12",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -251,7 +296,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.L2_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x13",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -263,7 +308,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_128",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x608006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -275,7 +320,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_16",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x601006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -287,7 +332,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_2",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600206",</div><div class='del'>-        "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -299,7 +344,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_256",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x610006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -311,7 +356,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x100206",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -323,7 +368,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_32",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x602006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -335,7 +380,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_4",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600406",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -347,7 +392,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_512",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x620006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -359,7 +404,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_64",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x604006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -371,7 +416,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_8",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600806",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -383,7 +428,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.MISP_ANT",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x9",</div><div class='del'>-        "PublicDescription": "ANT retired branches that got just mispredicted Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "ANT retired branches that got just mispredicted Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -395,7 +440,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.MS_FLOWS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "Counts flows delivered by the Microcode Sequencer Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts flows delivered by the Microcode Sequencer Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -443,7 +488,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.STLB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x15",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -455,7 +500,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.UNKNOWN_BRANCH",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x17",</div><div class='del'>-        "PublicDescription": "Number retired branch instructions that caused the front-end to be resteered when it finds the instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number retired branch instructions that caused the front-end to be resteered when it finds the instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -738,8 +783,35 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "MS_DECODED.MS_BUSY",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the micro-sequencer is busy.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "MS_DECODED.MS_BUSY",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of times entered into a ucode flow in the FEC.  Includes inserted flows due to front-end detected faults or assists.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "MS_DECODED.MS_ENTRY",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of times nanocode flow is executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "MS_DECODED.NANO_CODE",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/memory.json b/tools/perf/pmu-events/arch/x86/arrowlake/memory.json<br/>index fb8d4ac69bda..05cc46518232 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/memory.json</a></div><div class='hunk'>@@ -1,5 +1,14 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to any number of reasons, including an L1 miss, WCB full, pagewalk, store address block or store data block.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.ANY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to any number of reasons, including an L1 miss, WCB full, pagewalk, store address block or store data block, on a load that retires.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -63,6 +72,16 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to other block cases.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.OTHER",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to other block cases such as pipeline conflicts, fences, etc.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to other block cases.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -83,6 +102,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to a pagewalk.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.PGWALK",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a pagewalk.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -101,6 +129,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to a store address match.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.ST_ADDR",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a store address match.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -119,6 +156,24 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to store data forward block.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.ST_DATA",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to request buffers full or lock in progress.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.WCB_FULL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to request buffers full or lock in progress.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -156,6 +211,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears that flush the pipeline and restart the machine without the use of microcode.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.MEMORY_ORDERING_FAST",</div><div class='add'>+        "SampleAfterValue": "20003",</div><div class='add'>+        "UMask": "0x82",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.",</div><div class='ctx'>         "Counter": "2,3,4,5,6,7,8,9",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -163,7 +227,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_1024",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x400",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "53",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -176,7 +240,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x80",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "1009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -189,7 +253,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x10",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -202,7 +266,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_2048",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x800",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "23",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -215,7 +279,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x100",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "503",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -228,7 +292,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x20",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -241,7 +305,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x4",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -254,7 +318,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x200",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "101",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -267,7 +331,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x40",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "2003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -280,7 +344,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "50021",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -291,7 +355,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.STORE_SAMPLE",</div><div class='del'>-        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -334,7 +398,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by DRAM.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.DRAM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -346,7 +410,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were not supplied by the L3 cache.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -358,7 +422,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the L3 cache.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/other.json b/tools/perf/pmu-events/arch/x86/arrowlake/other.json<br/>index 51bc763a5887..c8feed3a99a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/other.json</a></div><div class='hunk'>@@ -19,6 +19,89 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles a Core is blocked due to a lock In Progress issued by another core",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x63",</div><div class='add'>+        "EventName": "BUS_LOCK.BLOCKED_CYCLES",</div><div class='add'>+        "PublicDescription": "Counts the number of unhalted cycles a Core is blocked due to a lock In Progress issued by another core. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles a Core is blocked due to an Accepted lock it issued, includes both split and non-split lock cycles.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x63",</div><div class='add'>+        "EventName": "BUS_LOCK.LOCK_CYCLES",</div><div class='add'>+        "PublicDescription": "Counts the number of unhalted cycles a Core is blocked due to an Accepted lock it issued, includes both split and non-split lock cycles. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of non-split locks such as UC locks issued by a Core (does not include cache locks)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x63",</div><div class='add'>+        "EventName": "BUS_LOCK.NON_SPLIT_LOCKS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of split locks issued by a Core",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x63",</div><div class='add'>+        "EventName": "BUS_LOCK.SPLIT_LOCKS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the L2 Prefetchers are at throttle level 0",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x32",</div><div class='add'>+        "EventName": "DYNAMIC_PREFETCH_THROTTLER.LEVEL0_SOC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the L2 Prefetcher throttle level is at 1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x32",</div><div class='add'>+        "EventName": "DYNAMIC_PREFETCH_THROTTLER.LEVEL1_SOC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the L2 Prefetcher throttle level is at 2",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x32",</div><div class='add'>+        "EventName": "DYNAMIC_PREFETCH_THROTTLER.LEVEL2_SOC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the L2 Prefetcher throttle level is at 3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x32",</div><div class='add'>+        "EventName": "DYNAMIC_PREFETCH_THROTTLER.LEVEL3_SOC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the L2 Prefetcher throttle level is at 4",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x32",</div><div class='add'>+        "EventName": "DYNAMIC_PREFETCH_THROTTLER.LEVEL4_SOC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This event is deprecated. [This event is alias to MISC_RETIRED.LBR_INSERTS]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Deprecated": "1",</div><div class='hunk'>@@ -66,7 +149,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -86,5 +169,41 @@</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of prefetch requests that were promoted in the XQ to a demand request.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xf4",</div><div class='add'>+        "EventName": "XQ_PROMOTION.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of prefetch requests that were promoted in the XQ to a demand code read.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xf4",</div><div class='add'>+        "EventName": "XQ_PROMOTION.CRDS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of prefetch requests that were promoted in the XQ to a demand read.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xf4",</div><div class='add'>+        "EventName": "XQ_PROMOTION.DRDS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of prefetch requests that were promoted in the XQ to a demand RFO.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xf4",</div><div class='add'>+        "EventName": "XQ_PROMOTION.RFOS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json b/tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json<br/>index 18a22368b99b..805616052925 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/pipeline.json</a></div><div class='hunk'>@@ -31,6 +31,16 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles when any of the integer dividers are active.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.IDIV_ACTIVE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cycles when integer divide unit is busy executing divide or square root operations.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "CounterMask": "1",</div><div class='hunk'>@@ -42,6 +52,24 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of active integer dividers per cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.IDIV_OCCUPANCY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of integer divider uops executed per cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcd",</div><div class='add'>+        "EventName": "ARITH.IDIV_UOPS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='hunk'>@@ -74,13 +102,14 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the total number of branch instructions retired for all branch types.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL010, ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='ctx'>         "PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP) of the processor is resteered due to a branch instruction and the branch instruction successfully retires.  All branch type instructions are accounted for.",</div><div class='hunk'>@@ -101,7 +130,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND",</div><div class='del'>-        "PublicDescription": "Counts conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x111",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -109,6 +138,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of retired JCC (Jump on Conditional Code) branch instructions retired, includes both taken and not taken branches.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -116,11 +146,20 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of not taken JCC branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_NTAKEN",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x7f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Not taken branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_NTAKEN",</div><div class='del'>-        "PublicDescription": "Counts not taken branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts not taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -139,7 +178,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -158,7 +197,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN_BWD",</div><div class='del'>-        "PublicDescription": "Counts taken backward conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -168,7 +207,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN_FWD",</div><div class='del'>-        "PublicDescription": "Counts taken forward conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x102",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -187,7 +226,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.FAR_BRANCH",</div><div class='del'>-        "PublicDescription": "Counts far branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts far branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -195,6 +234,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of far branch instructions retired, includes far jump, far call and return, and interrupt call and return.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.FAR_BRANCH",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -215,7 +255,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT",</div><div class='del'>-        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -223,6 +263,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -241,6 +282,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT_CALL",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -248,6 +290,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of near indirect JMP branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.INDIRECT_JMP",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xef",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of near indirect JMP branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='hunk'>@@ -257,6 +308,17 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This event is deprecated. Refer to new event BR_INST_RETIRED.INDIRECT_CALL",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "Errata": "ARL011",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.IND_CALL",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xfb",</div><div class='add'>+        "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of near CALL branch instructions retired",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='hunk'>@@ -270,7 +332,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='del'>-        "PublicDescription": "Counts both direct and indirect near call instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both direct and indirect near call instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -278,6 +340,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL010, ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -298,7 +361,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_RETURN",</div><div class='del'>-        "PublicDescription": "Counts return instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts return instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -313,11 +376,20 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of taken branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xc0",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Taken branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -325,6 +397,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near taken branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "ARL011",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -372,7 +445,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -390,7 +463,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES_COST",</div><div class='del'>-        "PublicDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x44",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -409,7 +482,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND",</div><div class='del'>-        "PublicDescription": "Counts mispredicted conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts mispredicted conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x111",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -428,17 +501,26 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x151",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted not taken JCC branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_NTAKEN",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x7f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_NTAKEN",</div><div class='del'>-        "PublicDescription": "Counts the number of conditional branch instructions retired that were mispredicted and the branch direction was not taken. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of conditional branch instructions retired that were mispredicted and the branch direction was not taken. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -448,7 +530,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_NTAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x50",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -467,7 +549,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -486,7 +568,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD",</div><div class='del'>-        "PublicDescription": "Counts taken backward conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -496,7 +578,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD_COST",</div><div class='del'>-        "PublicDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x8001",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -506,7 +588,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x141",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -516,7 +598,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD",</div><div class='del'>-        "PublicDescription": "Counts taken forward conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -525,7 +607,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD_COST",</div><div class='del'>-        "PublicDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x8002",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -544,7 +626,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT",</div><div class='del'>-        "PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -572,7 +654,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_CALL",</div><div class='del'>-        "PublicDescription": "Counts retired mispredicted indirect (near taken) CALL instructions, including both register and memory indirect. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired mispredicted indirect (near taken) CALL instructions, including both register and memory indirect. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -591,7 +673,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_CALL_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x42",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -601,12 +683,21 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xc0",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted near indirect JMP branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_JMP",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xef",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of mispredicted near indirect JMP branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='hunk'>@@ -616,11 +707,20 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted near taken branch instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_TAKEN",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.NEAR_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts number of near branch instructions retired that were mispredicted and taken. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of near branch instructions retired that were mispredicted and taken. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -639,7 +739,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.NEAR_TAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x60",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -649,7 +749,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.RET",</div><div class='del'>-        "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -677,12 +777,21 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.RET_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x48",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the total number of BTCLEARS.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe8",</div><div class='add'>+        "EventName": "BTCLEAR.ANY",</div><div class='add'>+        "PublicDescription": "Counts the total number of BTCLEARS which occurs when the Branch Target Buffer (BTB) predicts a taken branch.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='hunk'>@@ -1046,7 +1155,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.ANY_P",</div><div class='del'>-        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1063,7 +1172,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.BR_FUSED",</div><div class='del'>-        "PublicDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1073,7 +1182,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x30",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1083,7 +1192,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1102,7 +1211,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1181,6 +1290,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on all Integer ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of uops executed on a load port.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='hunk'>@@ -1191,6 +1309,42 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 0.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P0",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 1.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 2.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P2",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P3",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of uops executed on integer port  0,1, 2, 3.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='hunk'>@@ -1321,6 +1475,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of occurrences a retired load was blocked for any of the following reasons:  utlb_miss, 4k_alias, unknown_sta/bad_fwd, unready_fwd (includes md blocks and esp consuming load blocks)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address exactly matches an older store whose data is not ready (a.k.a. unknown).  unready_fwd",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='hunk'>@@ -1349,6 +1512,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of times a load got early blocked due to preceding store operation with unknown address or unknown data. Excluding in-line (immediate) wakeups",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.STORE_EARLY",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xa1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with an older store (size mismatch) - unknown_sta/bad_forward",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='hunk'>@@ -1377,6 +1549,25 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of demand loads that match on a wcb (request buffer) allocated by an L1 hardware prefetch [This event is alias to LOAD_HIT_PREFETCH.HW_PF]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x4c",</div><div class='add'>+        "EventName": "LOAD_HIT_PREFETCH.HWPF",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to LOAD_HIT_PREFETCH.HWPF]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0x4c",</div><div class='add'>+        "EventName": "LOAD_HIT_PREFETCH.HW_PF",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "CounterMask": "1",</div><div class='hunk'>@@ -1417,6 +1608,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears that flush the pipeline and restart the machine without the use of microcode.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.ANY_FAST",</div><div class='add'>+        "SampleAfterValue": "20003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Number of machine clears (nukes) of any type.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "CounterMask": "1",</div><div class='hunk'>@@ -1447,6 +1647,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears that flush the pipeline and restart the machine without the use of microcode.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.DISAMBIGUATION_FAST",</div><div class='add'>+        "SampleAfterValue": "20003",</div><div class='add'>+        "UMask": "0x88",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of nukes due to memory renaming",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='hunk'>@@ -1456,6 +1665,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears that flush the pipeline and restart the machine without the use of microcode.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.MRN_NUKE_FAST",</div><div class='add'>+        "SampleAfterValue": "20003",</div><div class='add'>+        "UMask": "0x90",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of times that the machine clears due to a page fault.  Covers both I-Side and D-Side (Loads/Stores) page faults.  A page fault occurs when either the page is not present, or an access violation.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='hunk'>@@ -1559,11 +1777,20 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of LBR entries recorded. Requires LBRs to be enabled in IA32_LBR_CTL.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe4",</div><div class='add'>+        "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "LBR record is inserted",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xe4",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "LBR record is inserted Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "LBR record is inserted Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1578,6 +1805,86 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of CLFLUSH, CLWB, and CLDEMOTE instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC_RETIRED1.CL_INST",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of LFENCE instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC_RETIRED1.LFENCE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of RDPMC, RDTSC, and RDTSCP instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC_RETIRED1.RDPMC_RDTSC_P",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Count the number of WRMSR instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC_RETIRED1.WRMSR",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of faults and software interrupts with vector &lt; 32.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.FAULT_ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of faults and software interrupts with vector &lt; 32, including VOE cases.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of PSB+ nuke events and ToPA trap events.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.INTEL_PT_CLEARS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of user interrupts delivered.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.ULI_DELIVERY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of SENDUIPI instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.ULI_SENDUIPI",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x9",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of VM exits.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.VM_EXIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='hunk'>@@ -1628,6 +1935,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number issue slots not consumed  due to a  color request for an FCW or MXCSR control register when all 4 colors (copies) are already in use",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "SERIALIZATION.COLOR_STALLS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of issue slots where no uop could issue due to an IQ scoreboard that stalls allocation until a specified older uop retires or (in the case of jump scoreboard) executes. Commonly executed instructions with IQ scoreboards include LFENCE and MFENCE.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='hunk'>@@ -1705,6 +2021,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Fixed Counter: Counts the number of issue slots not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear.",</div><div class='add'>+        "Counter": "Fixed counter 4",</div><div class='add'>+        "EventName": "TOPDOWN_BAD_SPECULATION.ALL",</div><div class='add'>+        "PublicDescription": "Fixed Counter: Counts the number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear.  Counts all issue slots blocked during this recovery window including relevant microcode flows and while uops are not yet available in the IQ. Also, includes the issue slots that were consumed by the backend but were thrown away because they were younger than the mispredict or machine clear.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x5",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x73",</div><div class='hunk'>@@ -1821,6 +2146,14 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x74",</div><div class='add'>+        "EventName": "TOPDOWN_BE_BOUND.ALL_NON_ARCH",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls [This event is alias to TOPDOWN_BE_BOUND.ALL]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='hunk'>@@ -1929,7 +2262,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of retirement slots not consumed due to front end stalls.",</div><div class='del'>-        "Counter": "37",</div><div class='add'>+        "Counter": "Fixed counter 5",</div><div class='ctx'>         "EventName": "TOPDOWN_FE_BOUND.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6",</div><div class='hunk'>@@ -1938,6 +2271,14 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of retirement slots not consumed due to front end stalls",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.ALL_NON_ARCH",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retirement slots not consumed due to front end stalls",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "TOPDOWN_FE_BOUND.ALL_P",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -2126,7 +2467,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of consumed retirement slots.",</div><div class='del'>-        "Counter": "38",</div><div class='add'>+        "Counter": "Fixed counter 6",</div><div class='ctx'>         "EventName": "TOPDOWN_RETIRING.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='hunk'>@@ -2135,6 +2476,14 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of consumed retirement slots.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x72",</div><div class='add'>+        "EventName": "TOPDOWN_RETIRING.ALL_NON_ARCH",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of consumed retirement slots.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "TOPDOWN_RETIRING.ALL_P",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -2352,6 +2701,14 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.ALL",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the total number of uops retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='hunk'>@@ -2399,6 +2756,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops retired that were delivered by the loop stream detector (LSD).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.LSD",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of uops that are from the complex flows issued by the micro-sequencer (MS).  This includes uops from flows due to complex instructions, faults, assists, and inserted flows.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json b/tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json<br/>index a3e4a4f3ab45..602e2ad5de6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/arrowlake/virtual-memory.json</a></div><div class='hunk'>@@ -9,6 +9,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts walks that miss the PDE_CACHE",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x08",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.PDE_CACHE_MISS",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of first level TLB misses but second level hits due to a demand load that did not start a page walk. Accounts for all page sizes. Will result in a DTLB write from STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x08",</div><div class='hunk'>@@ -48,6 +57,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page size.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x08",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetches) whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xe",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='hunk'>@@ -176,6 +195,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts walks that miss the PDE_CACHE",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.PDE_CACHE_MISS",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of first level TLB misses but second level hits due to stores that did not start a page walk. Accounts for all page sizes. Will result in a DTLB write from STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x49",</div><div class='hunk'>@@ -216,6 +244,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks completed due to store DTLB misses to any page size.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks completed due to stores whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size.  Includes page walks that page fault.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0xe",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='hunk'>@@ -245,6 +283,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks completed due to store DTLB misses to a 2M or 4M page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks completed due to stores whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to 2M or 4M pages.  Includes page walks that page fault.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='hunk'>@@ -325,6 +373,16 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of times there was an ITLB miss and a new translation was filled into the ITLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x81",</div><div class='add'>+        "EventName": "ITLB.FILLS",</div><div class='add'>+        "PublicDescription": "Counts the number of times the machine was unable to find a translation in the Instruction Translation Lookaside Buffer (ITLB) and a new translation was filled into the ITLB. The event is speculative in nature, but will not count translations (page walks) that are begun and not finished, or translations that are finished but not filled into the ITLB.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of page walks initiated by a instruction fetch that missed the first and second level TLBs.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x85",</div><div class='hunk'>@@ -343,6 +401,15 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts walks that miss the PDE_CACHE",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x85",</div><div class='add'>+        "EventName": "ITLB_MISSES.PDE_CACHE_MISS",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of first level TLB misses but second level hits due to an instruction fetch that did not start a page walk. Account for all pages sizes. Will result in an ITLB write from STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x85",</div><div class='hunk'>@@ -502,6 +569,24 @@</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of occurrences a load gets blocked because of a micro TLB miss",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.DTLB_MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to a DTLB miss",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.DTLB_MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a DTLB miss.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -518,5 +603,33 @@</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x90",</div><div class='ctx'>         "Unit": "cpu_lowpower"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of PMH walks that hit in the L1 or WCBs",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xbc",</div><div class='add'>+        "EventName": "PAGE_WALKER_LOADS.DTLB_L1_HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of PMH walks that hit in the L2",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xbc",</div><div class='add'>+        "EventName": "PAGE_WALKER_LOADS.DTLB_L2_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of PMH walks that hit in the L2.  Includes L2 Hit resulting from and L1D eviction of another core in the same module which is longer latency than a typical L2 hit.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Count number of any STLB flush attempts (Entire, PCID, InvPage, CR3 write, etc)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xbd",</div><div class='add'>+        "EventName": "TLB_FLUSHES.STLB_ANY",</div><div class='add'>+        "SampleAfterValue": "20003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json b/tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json<br/>index 89750117a7f6..1d8e910f5961 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/broadwell/bdw-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -98,7 +97,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -139,7 +137,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -640,7 +637,7 @@</div><div class='ctx'>         "MetricThreshold": "tma_info_memory_tlb_page_walks_utilization &gt; 0.5"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -653,7 +650,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -665,7 +662,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -854,7 +851,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1032,7 +1028,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1041,7 +1037,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1050,7 +1046,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json b/tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json<br/>index 81175f0f2603..a5e408ca46a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/broadwellde/bdwde-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -98,7 +97,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -139,7 +137,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -632,7 +629,7 @@</div><div class='ctx'>         "MetricThreshold": "tma_info_memory_tlb_page_walks_utilization &gt; 0.5"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -645,7 +642,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -657,7 +654,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -846,7 +843,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1021,7 +1017,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1030,7 +1026,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1039,7 +1035,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json b/tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json<br/>index 5d06a3f72be2..5b83b040060c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/broadwellx/bdx-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -282,7 +282,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -300,7 +299,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -341,7 +339,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -842,7 +839,7 @@</div><div class='ctx'>         "MetricThreshold": "tma_info_memory_tlb_page_walks_utilization &gt; 0.5"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -855,7 +852,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -867,7 +864,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -907,6 +904,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182@ / UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182\\,thresh\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='hunk'>@@ -1076,7 +1074,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1086,6 +1083,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from local memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "200 * (MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.L3_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_local_mem",</div><div class='hunk'>@@ -1263,7 +1261,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else CYCLE_ACTIVITY.STALLS_TOTAL - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1272,7 +1270,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1281,7 +1279,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1308,6 +1306,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from remote memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "310 * (MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.L3_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;Snoop;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_remote_mem",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json b/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json<br/>index 6485b565acbc..2e50a91b6728 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -319,6 +319,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -356,6 +357,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -370,31 +372,35 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='hunk'>@@ -402,6 +408,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='hunk'>@@ -410,7 +417,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -418,7 +426,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_synchronization &gt; 10",</div><div class='hunk'>@@ -426,6 +435,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -434,7 +444,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -442,6 +453,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -469,6 +481,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -539,6 +552,15 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g",</div><div class='add'>+        "MetricExpr": "(((1 - ((19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS))) / (19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + (25 * (MEM_LOAD_RETIRED.LOCAL_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0) + 33 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0))) if #has_pmem &gt; 0 else 1)) * (CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound) if 1e6 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM + MEM_LOAD_RETIRED.LOCAL_PMM) &gt; MEM_LOAD_RETIRED.L1_MISS else 0) if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemoryBound;Server;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='add'>+        "MetricName": "tma_cxl_mem_bound",</div><div class='add'>+        "MetricThreshold": "tma_cxl_mem_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='add'>+        "PublicDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g. 3D-Xpoint (Crystal Ridge, a.k.a. IXP) memory, PMM - Persistent Memory Module [from CLX to SPR] or any other CXL Type3 Memory [EMR onwards]).",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "44 * tma_info_system_core_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM * (1 - OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE / (OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE + OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='hunk'>@@ -569,7 +591,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound",</div><div class='add'>+        "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound - tma_cxl_mem_bound if #has_pmem &gt; 0 else CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound)",</div><div class='ctx'>         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_dram_bound",</div><div class='ctx'>         "MetricThreshold": "tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -630,7 +652,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -693,7 +715,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction the CPU has retired aggregated across all vector widths",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0xfc@ / UOPS_RETIRED.RETIRE_SLOTS",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector",</div><div class='hunk'>@@ -768,6 +789,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Branch Misprediction Cost: Cycles representing fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "tma_bottleneck_mispredictions * tma_info_thread_slots / 4 / BR_MISP_RETIRED.ALL_BRANCHES / 100",</div><div class='ctx'>         "MetricGroup": "Bad;BrMispredicts;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_info_bad_spec_branch_misprediction_cost",</div><div class='hunk'>@@ -803,6 +825,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_mite)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -820,6 +843,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Instruction Cache misses - subset of the Big_Code Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_fetch_latency * tma_icache_misses / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Fed;FetchLat;IcMiss;tma_issueFL",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_ic_misses",</div><div class='hunk'>@@ -961,7 +985,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ARITH_INST_RETIRED.SCALAR + cpu@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0xfc@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith",</div><div class='hunk'>@@ -1249,7 +1272,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1267,6 +1290,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ASSIST.ANY + OTHER_ASSISTS.ANY)",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1282,7 +1311,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1294,16 +1323,28 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_RPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_read_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_WPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_write_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT.RD + UNC_M_CAS_COUNT.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1362,6 +1403,13 @@</div><div class='ctx'>         "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]",</div><div class='add'>+        "MetricExpr": "(1e9 * (UNC_M_PMM_RPQ_OCCUPANCY.ALL / UNC_M_PMM_RPQ_INSERTS) / imc_0@event\\=0x0@ if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryLat;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_mem_pmm_read_latency",</div><div class='add'>+        "PublicDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",</div><div class='ctx'>         "MetricExpr": "1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD) / (tma_info_system_socket_clks / tma_info_system_time)",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryLat;SoC",</div><div class='hunk'>@@ -1499,12 +1547,13 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1541,7 +1590,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1565,6 +1614,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1591,6 +1641,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_1G / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_1g",</div><div class='hunk'>@@ -1599,6 +1650,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_2m",</div><div class='hunk'>@@ -1607,6 +1659,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_4K / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_4k",</div><div class='hunk'>@@ -1624,6 +1677,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(12 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (11 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1648,7 +1702,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1657,7 +1711,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1681,7 +1735,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU was retiring uops fetched by the Microcode Sequencer (MS) unit",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY * IDQ.MS_UOPS / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_heavy_operations_group;tma_issueMC;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_microcode_sequencer",</div><div class='hunk'>@@ -1691,6 +1744,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch Resteers as a result of Branch Misprediction at execution stage",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "BR_MISP_RETIRED.ALL_BRANCHES / (BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT) * INT_MISC.CLEAR_RESTEER_CYCLES / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TopdownL4;tma_L4_group;tma_branch_resteers_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_mispredicts_resteers",</div><div class='hunk'>@@ -1745,6 +1799,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -1754,6 +1809,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of slots the CPU was stalled due to other cases of misprediction (non-retired x86 branches or other types).",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_branch_mispredicts * (1 - BR_MISP_RETIRED.ALL_BRANCHES / (INT_MISC.CLEARS_COUNT - MACHINE_CLEARS.COUNT)), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BrMispredicts;BvIO;TopdownL3;tma_L3_group;tma_branch_mispredicts_group",</div><div class='ctx'>         "MetricName": "tma_other_mispredicts",</div><div class='hunk'>@@ -1762,6 +1818,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Nukes (Machine Clears) not related to memory ordering.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_machine_clears * (1 - MACHINE_CLEARS.MEMORY_ORDERING / MACHINE_CLEARS.COUNT), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BvIO;Machine_Clears;TopdownL3;tma_L3_group;tma_machine_clears_group",</div><div class='ctx'>         "MetricName": "tma_other_nukes",</div><div class='hunk'>@@ -1842,6 +1899,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIVIDER_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - CYCLE_ACTIVITY.STALLS_MEM_ANY else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -1956,7 +2014,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -2013,6 +2071,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_1G / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_1g",</div><div class='hunk'>@@ -2021,6 +2080,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_2m",</div><div class='hunk'>@@ -2029,6 +2089,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_4K / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_4k",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json<br/>index c9596e18ec09..30390d734051 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'>         "Unit": "CHA"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss",</div><div class='add'>+        "BriefDescription": "LLC misses - Uncacheable reads (from cpu). Derived from unc_cha_tor_inserts.ia_miss",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x35",</div><div class='ctx'>         "EventName": "LLC_MISSES.UNCACHEABLE",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json<br/>index 265cdf334f6a..aafa7af46e69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json</a></div><div class='hunk'>@@ -316,32 +316,32 @@</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec). Derived from unc_m_pmm_rpq_inserts",</div><div class='add'>+        "BriefDescription": "Intel Optane DC persistent memory bandwidth read (MiB/sec). Derived from unc_m_pmm_rpq_inserts",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xE3",</div><div class='ctx'>         "EventName": "UNC_M_PMM_BANDWIDTH.READ",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "ScaleUnit": "6.103515625E-5MB/sec",</div><div class='add'>+        "ScaleUnit": "6.103515625E-5MiB/sec",</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Intel Optane DC persistent memory bandwidth total (MB/sec). Derived from unc_m_pmm_rpq_inserts",</div><div class='add'>+        "BriefDescription": "Intel Optane DC persistent memory bandwidth total (MiB/sec). Derived from unc_m_pmm_rpq_inserts",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xE3",</div><div class='ctx'>         "EventName": "UNC_M_PMM_BANDWIDTH.TOTAL",</div><div class='ctx'>         "MetricExpr": "UNC_M_PMM_RPQ_INSERTS + UNC_M_PMM_WPQ_INSERTS",</div><div class='ctx'>         "MetricName": "UNC_M_PMM_BANDWIDTH.TOTAL",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "ScaleUnit": "6.103515625E-5MB/sec",</div><div class='add'>+        "ScaleUnit": "6.103515625E-5MiB/sec",</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB/sec). Derived from unc_m_pmm_wpq_inserts",</div><div class='add'>+        "BriefDescription": "Intel Optane DC persistent memory bandwidth write (MiB/sec). Derived from unc_m_pmm_wpq_inserts",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xE7",</div><div class='ctx'>         "EventName": "UNC_M_PMM_BANDWIDTH.WRITE",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "ScaleUnit": "6.103515625E-5MB/sec",</div><div class='add'>+        "ScaleUnit": "6.103515625E-5MiB/sec",</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json<br/>index 10bdb193c16f..26568e4b77f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/cache.json</a></div><div class='hunk'>@@ -1,10 +1,72 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Hit snoop reply with data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_FWD_FE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's cache, after the data is forwarded back to the requestor and indicating the data was found unmodified in the (FE) Forward or Exclusive State in this cores caches cache.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HitM snoop reply with data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_FWD_M",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's caches, after the data is forwarded back to the requestor, and indicating the data was found modified(M) in this cores caches cache (aka HitM response).  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply without sending the data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_HIT_FSE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated in this core's caches without forwarded back to the requestor. The line was in Forward, Shared or Exclusive (FSE) state in this cores caches.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Line not found snoop reply",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.MISS",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating that the data was not found (IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of the Core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply with data, line kept in Shared state.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_FWD_FE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (FS) Forward or Shared state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HitM snoop reply with data, line kept in Shared state",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_FWD_M",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (M)odified state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply without sending the data, line kept in Shared state.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_HIT_FSE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line was kept on this core in the (S)hared state, and that the data was found unmodified but not forwarded back to the requestor, initially the data was found in the cache in the (FSE) Forward, Shared state or Exclusive state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "L1D.HWPF_MISS",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L1D.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +75,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.REPLACEMENT",</div><div class='del'>-        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +84,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -33,7 +95,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL_PERIODS",</div><div class='del'>-        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -43,7 +105,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALL",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event L1D_PEND_MISS.L2_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -52,7 +113,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALLS",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -61,7 +122,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING",</div><div class='del'>-        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -71,7 +132,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts duration of L1D miss outstanding in cycles. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -80,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.ALL",</div><div class='del'>-        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -89,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -98,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -107,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='del'>-        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -116,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.ALL",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -125,7 +186,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -134,7 +195,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the total number of L2 code requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of L2 code requests.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -143,7 +204,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -152,7 +213,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x27"</div><div class='ctx'>     },</div><div class='hunk'>@@ -161,7 +222,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts demand requests to L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests to L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -170,7 +231,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_HWPF",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.ALL_HWPF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xf0"</div><div class='ctx'>     },</div><div class='hunk'>@@ -179,7 +239,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_RFO",</div><div class='del'>-        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -188,7 +248,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -197,7 +257,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts L2 cache misses when fetching instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x24"</div><div class='ctx'>     },</div><div class='hunk'>@@ -206,7 +266,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -215,7 +275,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -224,7 +284,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x30"</div><div class='ctx'>     },</div><div class='hunk'>@@ -233,7 +292,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -242,7 +301,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -251,7 +310,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_HIT",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -260,7 +319,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_MISS",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x22"</div><div class='ctx'>     },</div><div class='hunk'>@@ -269,7 +328,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_HIT",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -278,7 +337,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_MISS",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x28"</div><div class='ctx'>     },</div><div class='hunk'>@@ -287,7 +346,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x23",</div><div class='ctx'>         "EventName": "L2_TRANS.L2_WB",</div><div class='del'>-        "PublicDescription": "Counts L2 writebacks that access L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 writebacks that access L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -296,7 +355,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41"</div><div class='ctx'>     },</div><div class='hunk'>@@ -305,7 +364,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -394,7 +453,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x43",</div><div class='ctx'>         "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",</div><div class='del'>-        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfd"</div><div class='ctx'>     },</div><div class='hunk'>@@ -563,7 +622,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x44",</div><div class='ctx'>         "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "MEM_STORE_RETIRED.L2_HIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -572,7 +630,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe5",</div><div class='ctx'>         "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -999,7 +1057,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS.ALL_REQUESTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1008,7 +1065,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1017,7 +1074,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts both cacheable and non-cacheable code read requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and non-cacheable code read requests.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1026,7 +1083,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1035,7 +1092,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1045,7 +1102,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1055,7 +1111,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1065,7 +1120,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1075,7 +1130,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 outstanding demand data read request is pending. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1085,7 +1139,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1094,7 +1147,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1103,7 +1155,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1112,7 +1164,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1121,7 +1173,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2c",</div><div class='ctx'>         "EventName": "SQ_MISC.BUS_LOCK",</div><div class='del'>-        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1130,7 +1182,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xf"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1139,7 +1190,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1148,7 +1199,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHW instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1157,7 +1208,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1166,7 +1217,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json<br/>index 34e1cbcd722c..433ae5f50704 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/emr-metrics.json</a></div><div class='hunk'>@@ -1,28 +1,28 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -40,6 +40,18 @@</div><div class='ctx'>         "ScaleUnit": "1per_instr"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU)",</div><div class='add'>+        "MetricExpr": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0 / UNC_P_CLOCKTICKS * #num_packages",</div><div class='add'>+        "MetricGroup": "cpu_cstate",</div><div class='add'>+        "MetricName": "cpu_cstate_c0"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU)",</div><div class='add'>+        "MetricExpr": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6 / UNC_P_CLOCKTICKS * #num_packages",</div><div class='add'>+        "MetricGroup": "cpu_cstate",</div><div class='add'>+        "MetricName": "cpu_cstate_c6"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CPU operating frequency (in GHz)",</div><div class='ctx'>         "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC * #SYSTEM_TSC_FREQ / 1e9",</div><div class='ctx'>         "MetricName": "cpu_operating_frequency",</div><div class='hunk'>@@ -79,6 +91,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO reads that are initiated by end device controllers that are requesting memory from the CPU and miss the L3 cache",</div><div class='add'>+        "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_read_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO reads that are initiated by end device controllers that are requesting memory from the local CPU socket",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_LOCAL * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_read_local",</div><div class='hunk'>@@ -97,6 +115,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO writes that are initiated by end device controllers that are writing memory to the CPU",</div><div class='add'>+        "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOM + UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR) * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_write_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO writes that are initiated by end device controllers that are writing memory to the local CPU socket",</div><div class='ctx'>         "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL + UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL) * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_write_local",</div><div class='hunk'>@@ -111,19 +135,19 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound full cacheline writes initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM / UNC_CHA_TOR_INSERTS.IO_ITOM",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_full_writes_that_miss_l3",</div><div class='add'>+        "MetricName": "io_full_write_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound partial cacheline writes initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_MISS_RFO) / (UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_RFO)",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_partial_writes_that_miss_l3",</div><div class='add'>+        "MetricName": "io_partial_write_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound reads initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR / UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_reads_that_miss_l3",</div><div class='add'>+        "MetricName": "io_read_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -335,7 +359,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -370,39 +394,39 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + 0 / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + 0 / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -434,7 +458,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -450,7 +474,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;Default;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -551,7 +575,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(76.6 * tma_info_system_core_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) + 74.6 * tma_info_system_core_frequency * MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -658,7 +681,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -786,7 +809,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Default;Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1297,19 +1320,19 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for modified write requests",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.MODIFIED_WRITE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_mwrite_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "CacheHits;Offcore",</div><div class='add'>+        "MetricGroup": "CacheHits;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "L3 cache misses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.L3_MISS / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_l3m_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1335,21 +1358,21 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.DRAM / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_dram_bw",</div><div class='ctx'>         "PublicDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average L3-cache miss BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.L3_MISS / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_l3m_bw",</div><div class='ctx'>         "PublicDescription": "Average L3-cache miss BW for Reads-to-Core (R2C). This covering going to DRAM or other memory off-chip memory tears. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average Off-core access BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.ANY_RESPONSE / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_offcore_bw",</div><div class='ctx'>         "PublicDescription": "Average Off-core access BW for Reads-to-Core (R2C). R2C account for demand or prefetch load/RFO/code access that fill data into the Core caches."</div><div class='ctx'>     },</div><div class='hunk'>@@ -1379,7 +1402,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1426,7 +1449,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1438,16 +1461,28 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_RPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_read_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_WPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_write_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT.RD + UNC_M_CAS_COUNT.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1513,7 +1548,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD) / (tma_info_system_socket_clks / tma_info_system_time)",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryLat;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_read_latency",</div><div class='hunk'>@@ -1674,12 +1708,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - MEMORY_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1693,7 +1727,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "4.4 * tma_info_system_core_frequency * MEM_LOAD_RETIRED.L2_HIT * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -1712,12 +1745,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "32.6 * tma_info_system_core_frequency * (MEM_LOAD_RETIRED.L3_HIT * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1800,6 +1832,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(16 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (10 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1832,7 +1865,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1841,13 +1874,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Backend;Default;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -1857,7 +1890,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * MISC2_RETIRED.LFENCE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -1910,7 +1942,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2.4",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1945,6 +1977,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -2006,6 +2039,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIV_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - EXE_ACTIVITY.BOUND_ON_LOADS else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2015,6 +2049,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "(EXE_ACTIVITY.EXE_BOUND_0_PORTS + max(RS.EMPTY_RESOURCE - RESOURCE_STALLS.SCOREBOARD, 0)) / tma_info_thread_clks * (CYCLE_ACTIVITY.STALLS_TOTAL - EXE_ACTIVITY.BOUND_ON_LOADS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2024,6 +2059,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.1_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2033,7 +2069,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.2_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2043,7 +2078,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.CYCLES_GE_3 / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2072,7 +2106,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2100,7 +2134,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "CPU_CLK_UNHALTED.PAUSE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2132,7 +2165,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json<br/>index 8c9207750c82..bc475e163227 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/floating-point.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.FP",</div><div class='del'>-        "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='del'>-        "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +30,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +38,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +46,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_5",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +54,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +62,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -77,7 +70,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -86,7 +78,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -95,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -104,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -113,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -122,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x18"</div><div class='ctx'>     },</div><div class='hunk'>@@ -131,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -140,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -149,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x60"</div><div class='ctx'>     },</div><div class='hunk'>@@ -158,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -167,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -176,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -185,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.VECTOR",</div><div class='del'>-        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -194,7 +186,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -203,7 +194,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -212,7 +202,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -221,7 +210,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -230,7 +218,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -239,7 +227,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -248,7 +235,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1c"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json<br/>index 9fe9d62b867a..793c486ffabe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/frontend.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x60",</div><div class='ctx'>         "EventName": "BACLEARS.ANY",</div><div class='del'>-        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.LCP",</div><div class='del'>-        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.MS_BUSY",</div><div class='del'>-        "PublicDescription": "Cycles the Microcode Sequencer is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -31,7 +30,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='ctx'>         "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='del'>-        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -249,7 +248,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -260,7 +259,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='del'>-        "PublicDescription": "ICACHE_DATA.STALL_PERIODS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -269,7 +267,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x83",</div><div class='ctx'>         "EventName": "ICACHE_TAG.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -279,7 +277,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -289,7 +287,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -298,7 +296,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -308,7 +306,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -318,7 +316,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -327,7 +325,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -337,7 +335,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -348,7 +346,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_SWITCHES",</div><div class='del'>-        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -357,7 +355,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -366,7 +364,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -376,7 +374,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -387,7 +385,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -396,7 +394,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -406,7 +404,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -417,7 +415,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json<br/>index 7c3f9b76d367..5e6c1f05c981 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/memory.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='del'>-        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -24,7 +23,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -34,7 +32,6 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -44,7 +41,7 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -54,7 +51,7 @@</div><div class='ctx'>         "CounterMask": "9",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -478,7 +475,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts demand data read requests that miss the L3 cache. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -487,7 +483,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -505,7 +501,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_EVENTS",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -514,7 +510,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEM",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -523,7 +519,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEMTYPE",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -532,7 +528,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -541,7 +537,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.COMMIT",</div><div class='del'>-        "PublicDescription": "Counts the number of times RTM commit succeeded. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times RTM commit succeeded.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -550,7 +546,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.START",</div><div class='del'>-        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -559,7 +555,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_READ",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -568,7 +564,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_WRITE",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -577,7 +573,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CONFLICT",</div><div class='del'>-        "PublicDescription": "Counts the number of times a TSX line had a cache conflict. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a TSX line had a cache conflict.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/other.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/other.json<br/>index a58d65556609..21f49f609ed4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/other.json</a></div><div class='hunk'>@@ -4,11 +4,35 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.PAGE_FAULT",</div><div class='del'>-        "PublicDescription": "ASSISTS.PAGE_FAULT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of hardware interrupts received by the processor.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.RECEIVED",</div><div class='add'>+        "PublicDescription": "Counts the number of hardware interruptions received by the processor.",</div><div class='add'>+        "SampleAfterValue": "203",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -25,7 +49,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x2d",</div><div class='ctx'>         "EventName": "XQ.FULL_CYCLES",</div><div class='del'>-        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json<br/>index 48bec483b49a..1fa7957956df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/pipeline.json</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.DIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -16,7 +15,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -27,7 +26,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FP_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -37,7 +35,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.IDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the integer divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -48,7 +45,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.INT_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.IDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -57,7 +53,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1b"</div><div class='ctx'>     },</div><div class='hunk'>@@ -217,7 +213,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -226,7 +222,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -235,7 +231,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x70"</div><div class='ctx'>     },</div><div class='hunk'>@@ -244,7 +240,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -253,7 +249,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",</div><div class='ctx'>         "SampleAfterValue": "25003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -262,7 +258,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -273,7 +268,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE_INST Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -282,7 +276,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -299,7 +293,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -316,7 +310,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",</div><div class='ctx'>         "SampleAfterValue": "2000003"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -325,7 +319,6 @@</div><div class='ctx'>         "CounterMask": "8",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -335,7 +328,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -345,7 +337,6 @@</div><div class='ctx'>         "CounterMask": "16",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='del'>-        "PublicDescription": "Cycles while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -355,7 +346,6 @@</div><div class='ctx'>         "CounterMask": "12",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -365,7 +355,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -375,7 +364,6 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='del'>-        "PublicDescription": "Total execution stalls. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -384,7 +372,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb7",</div><div class='ctx'>         "EventName": "EXE.AMX_BUSY",</div><div class='del'>-        "PublicDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -393,7 +380,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -402,7 +389,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -411,7 +397,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -420,7 +406,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -429,7 +415,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -439,7 +425,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='del'>-        "PublicDescription": "Execution stalls while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -449,7 +434,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='del'>-        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -458,7 +443,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='del'>-        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -467,7 +452,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='ctx'>         "EventName": "INST_DECODED.DECODERS",</div><div class='del'>-        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -492,7 +477,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -501,7 +485,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -518,7 +502,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -529,7 +513,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -538,7 +522,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='del'>-        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -547,7 +531,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.MBA_STALLS",</div><div class='del'>-        "PublicDescription": "INT_MISC.MBA_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -556,7 +539,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -567,7 +550,6 @@</div><div class='ctx'>         "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x7",</div><div class='del'>-        "PublicDescription": "Bubble cycles of BAClear (Unknown Branch). Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -576,7 +558,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.UOP_DROPPING",</div><div class='del'>-        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -585,7 +567,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.128BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x13"</div><div class='ctx'>     },</div><div class='hunk'>@@ -594,7 +575,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.256BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xac"</div><div class='ctx'>     },</div><div class='hunk'>@@ -603,7 +583,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -612,7 +592,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -621,7 +601,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.MUL_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -630,7 +609,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.SHUFFLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -639,7 +617,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_128 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -648,7 +625,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -657,7 +633,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='del'>-        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -666,7 +642,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.NO_SR",</div><div class='del'>-        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x88"</div><div class='ctx'>     },</div><div class='hunk'>@@ -675,7 +651,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='del'>-        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x82"</div><div class='ctx'>     },</div><div class='hunk'>@@ -684,7 +660,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x4c",</div><div class='ctx'>         "EventName": "LOAD_HIT_PREFETCH.SWPF",</div><div class='del'>-        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -694,7 +670,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -704,7 +680,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -713,7 +689,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -724,7 +700,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of machine clears (nukes) of any type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -733,7 +709,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.SMC",</div><div class='del'>-        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -742,7 +718,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe0",</div><div class='ctx'>         "EventName": "MISC2_RETIRED.LFENCE",</div><div class='del'>-        "PublicDescription": "number of LFENCE retired instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -751,7 +727,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcc",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -760,7 +736,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SB",</div><div class='del'>-        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -769,7 +745,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SCOREBOARD",</div><div class='del'>-        "PublicDescription": "Counts cycles where the pipeline is stalled due to serializing operations. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -778,7 +753,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -790,7 +765,7 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -799,7 +774,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_RESOURCE",</div><div class='del'>-        "PublicDescription": "Cycles when Reservation Station (RS) is empty due to a resource in the back-end Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -812,7 +786,6 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -822,7 +795,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.CYCLES",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -831,7 +803,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -840,7 +812,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -849,7 +821,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -858,7 +830,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "TOPDOWN.MEMORY_BOUND_SLOTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -875,7 +846,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS_P",</div><div class='del'>-        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -884,7 +855,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x76",</div><div class='ctx'>         "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='del'>-        "PublicDescription": "UOPS_DECODED.DEC0_UOPS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -893,7 +863,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 0.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -902,7 +872,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 1. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 1.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -911,7 +881,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_2_3_10",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -920,7 +890,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_4_9",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -929,7 +899,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_5_11",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -938,7 +908,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_6",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 6. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 6.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -947,7 +917,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_7_8",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -956,7 +926,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops executed from any thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed from any thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -966,7 +936,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -976,7 +946,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -986,7 +956,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -996,7 +966,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1006,7 +976,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 uop was executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1016,7 +986,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Cycles where at least 2 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1026,7 +996,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Cycles where at least 3 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1036,7 +1006,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Cycles where at least 4 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1047,7 +1017,7 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1059,7 +1029,6 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_EXECUTED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1068,7 +1037,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of uops to be executed per-thread each cycle. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1077,7 +1045,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.X87",</div><div class='del'>-        "PublicDescription": "Counts the number of x87 uops executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1086,7 +1054,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1096,7 +1064,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.CYCLES",</div><div class='del'>-        "PublicDescription": "UOPS_ISSUED.CYCLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1106,7 +1073,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.CYCLES",</div><div class='del'>-        "PublicDescription": "Counts cycles where at least one uop has retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1115,7 +1082,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.HEAVY",</div><div class='del'>-        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1126,7 +1093,6 @@</div><div class='ctx'>         "EventName": "UOPS_RETIRED.MS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "UOPS_RETIRED.MS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1135,7 +1101,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.SLOTS",</div><div class='del'>-        "PublicDescription": "Counts the retirement slots used each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the retirement slots used each cycle.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1146,7 +1112,7 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event counts cycles without actually retired uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1158,7 +1124,6 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_RETIRED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json<br/>index f453202d80c2..92cf47967f0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-cache.json</a></div><div class='hunk'>@@ -312,6 +312,17 @@</div><div class='ctx'>         "Unit": "CHA"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Distress signal asserted : DPT Remote",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xaf",</div><div class='add'>+        "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Distress signal asserted : DPT Remote : Counts the number of cycles either the local or incoming distress signals are asserted. : Dynamic Prefetch Throttle received by this tile",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "CHA"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Egress Blocking due to Ordering requirements : Down",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xba",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json<br/>index 68be01dad7c9..30044177ccf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-memory.json</a></div><div class='hunk'>@@ -2770,6 +2770,88 @@</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",</div><div class='add'>+        "UMask": "0x24",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_ALL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x24",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_PCH0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_PCH1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_ALL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_PCH0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_PCH1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "ECC Correctable Errors",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x09",</div><div class='hunk'>@@ -3048,6 +3130,28 @@</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Throttle Cycles for Rank 0",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Throttle Cycles for Rank 0 : Counts the number of cycles while the iMC is being throttled by either thermal constraints or by the PCU throttling.  It is not possible to distinguish between the two.  This can be filtered by rank.  If multiple ranks are selected and are being throttled at the same time, the counter will only increment by 1. : Thermal throttling is performed per DIMM.  We support 3 DIMMs per channel.  This ID allows us to filter by ID.",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Throttle Cycles for Rank 0",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Throttle Cycles for Rank 0 : Counts the number of cycles while the iMC is being throttled by either thermal constraints or by the PCU throttling.  It is not possible to distinguish between the two.  This can be filtered by rank.  If multiple ranks are selected and are being throttled at the same time, the counter will only increment by 1.",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Precharge due to read, write, underfill, or PGT.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json<br/>index 9482ddaea4d1..71c35b165a3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/uncore-power.json</a></div><div class='hunk'>@@ -178,7 +178,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x35",</div><div class='ctx'>         "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PublicDescription": "Number of cores in C0 : This is an occupancy event that tracks the number of cores that are in the chosen C-State.  It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",</div><div class='ctx'>         "Unit": "PCU"</div><div class='hunk'>@@ -198,7 +197,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x37",</div><div class='ctx'>         "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PublicDescription": "Number of cores in C6 : This is an occupancy event that tracks the number of cores that are in the chosen C-State.  It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",</div><div class='ctx'>         "Unit": "PCU"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json b/tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json<br/>index 3d3f88600e26..609a9549cbf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/emeraldrapids/virtual-memory.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -142,7 +142,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/grandridge/cache.json b/tools/perf/pmu-events/arch/x86/grandridge/cache.json<br/>index 877052db1490..9abddb06a837 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/grandridge/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/grandridge/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/grandridge/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/grandridge/cache.json</a></div><div class='hunk'>@@ -286,7 +286,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_1024",</div><div class='hunk'>@@ -297,7 +297,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='hunk'>@@ -308,7 +308,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='hunk'>@@ -319,7 +319,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_2048",</div><div class='hunk'>@@ -330,7 +330,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='hunk'>@@ -341,7 +341,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='hunk'>@@ -352,7 +352,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='hunk'>@@ -363,7 +363,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='hunk'>@@ -374,7 +374,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='hunk'>@@ -385,7 +385,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json b/tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json<br/>index 878b1caf12de..a0d637a24c1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/grandridge/grr-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -633,7 +633,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -645,7 +645,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fraction of cycles spent in Kernel mode",</div><div class='del'>-        "MetricExpr": "cpu@CPU_CLK_UNHALTED.CORE_P@k / CPU_CLK_UNHALTED.CORE",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.CORE_P:k / CPU_CLK_UNHALTED.CORE",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_kernel_utilization"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/cache.json b/tools/perf/pmu-events/arch/x86/graniterapids/cache.json<br/>index dbdeade6fe6f..db28866444b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/cache.json</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L1D.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +12,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.REPLACEMENT",</div><div class='del'>-        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +21,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -33,7 +32,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL_PERIODS",</div><div class='del'>-        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -42,7 +41,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALLS",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -51,7 +50,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING",</div><div class='del'>-        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -61,7 +60,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts duration of L1D miss outstanding in cycles. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -70,7 +69,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.ALL",</div><div class='del'>-        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -79,7 +78,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -88,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -97,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='del'>-        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -106,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.ALL",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -115,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.HIT",</div><div class='del'>-        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_RQSTS.HIT] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_RQSTS.HIT]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xdf"</div><div class='ctx'>     },</div><div class='hunk'>@@ -124,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -133,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the total number of L2 code requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of L2 code requests.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -142,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -151,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x27"</div><div class='ctx'>     },</div><div class='hunk'>@@ -160,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts demand requests to L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests to L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -169,7 +168,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_HWPF",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.ALL_HWPF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xf0"</div><div class='ctx'>     },</div><div class='hunk'>@@ -178,7 +176,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_RFO",</div><div class='del'>-        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -187,7 +185,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -196,7 +194,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts L2 cache misses when fetching instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x24"</div><div class='ctx'>     },</div><div class='hunk'>@@ -205,7 +203,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -214,7 +212,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -223,7 +221,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HIT",</div><div class='del'>-        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_REQUEST.HIT] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_REQUEST.HIT]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xdf"</div><div class='ctx'>     },</div><div class='hunk'>@@ -232,7 +230,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x30"</div><div class='ctx'>     },</div><div class='hunk'>@@ -241,7 +238,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -250,7 +247,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -259,7 +256,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_HIT",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -268,7 +265,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_MISS",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x22"</div><div class='ctx'>     },</div><div class='hunk'>@@ -277,7 +274,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_HIT",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -286,7 +283,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_MISS",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x28"</div><div class='ctx'>     },</div><div class='hunk'>@@ -295,7 +292,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x23",</div><div class='ctx'>         "EventName": "L2_TRANS.L2_WB",</div><div class='del'>-        "PublicDescription": "Counts L2 writebacks that access L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 writebacks that access L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -304,7 +301,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41"</div><div class='ctx'>     },</div><div class='hunk'>@@ -313,7 +310,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -437,7 +434,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x43",</div><div class='ctx'>         "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",</div><div class='del'>-        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfd"</div><div class='ctx'>     },</div><div class='hunk'>@@ -491,12 +488,12 @@</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",</div><div class='add'>+        "BriefDescription": "Retired load instructions which data sources missed L3 but serviced from dram homed in the local socket",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd3",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",</div><div class='del'>-        "PublicDescription": "Retired load instructions which data sources missed L3 but serviced from local DRAM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired load instructions which data sources missed L3 but serviced from DRAM homed in the local socket. Available PDIST counters: 0",</div><div class='ctx'>         "RetirementLatencyMax": 4146,</div><div class='ctx'>         "RetirementLatencyMean": 115.83,</div><div class='ctx'>         "RetirementLatencyMin": 0,</div><div class='hunk'>@@ -504,6 +501,15 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired load instructions with remote cxl mem as the data source where the data request missed all caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_CXL_MEM",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with remote cxl mem as the data source and the data request missed L3. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x10"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -629,11 +635,20 @@</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired load instructions with local cxl mem as the data source where the data request missed all caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.LOCAL_CXL_MEM",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with local cxl mem as the data source and the data request missed L3. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "MEM_STORE_RETIRED.L2_HIT",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x44",</div><div class='ctx'>         "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "MEM_STORE_RETIRED.L2_HIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -642,7 +657,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe5",</div><div class='ctx'>         "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -691,6 +706,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 or Type 3).",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_DATA_RD.CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703C00001",</div><div class='add'>+        "PublicDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 or Type 3). Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that hit in the L3 or were snooped from another core's caches on the same socket.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -735,6 +761,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_DATA_RD.LOCAL_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x700C00001",</div><div class='add'>+        "PublicDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -757,6 +794,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_DATA_RD.REMOTE_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703000001",</div><div class='add'>+        "PublicDescription": "Counts demand data reads that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -790,6 +838,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 or Type 3).",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_RFO.CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703C00002",</div><div class='add'>+        "PublicDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 or Type 3). Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit in the L3 or were snooped from another core's caches on the same socket.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -812,6 +871,28 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_RFO.LOCAL_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x700C00002",</div><div class='add'>+        "PublicDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_RFO.REMOTE_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703000002",</div><div class='add'>+        "PublicDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts writebacks of modified cachelines and streaming stores that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -834,6 +915,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 or Type 3).",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703C04477",</div><div class='add'>+        "PublicDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 or Type 3). Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches on the same socket.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -856,6 +948,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.LOCAL_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x700C04477",</div><div class='add'>+        "PublicDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 and Type 3) attached to local socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by a remote socket.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -900,6 +1003,17 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.REMOTE_CXL_MEM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x703004477",</div><div class='add'>+        "PublicDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by CXL MEM (Type 2 or Type 3) attached to another socket. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -937,7 +1051,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='del'>-        "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc.. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -946,7 +1060,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -955,7 +1069,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -964,7 +1078,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -973,7 +1087,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -982,7 +1096,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.MEM_UC",</div><div class='del'>-        "PublicDescription": "This event counts noncacheable memory data read transactions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts noncacheable memory data read transactions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -992,7 +1106,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1002,7 +1116,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1012,7 +1126,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 outstanding demand data read request is pending. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1022,7 +1135,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1031,7 +1144,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1040,7 +1152,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1049,7 +1161,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1058,7 +1170,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1067,7 +1179,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2c",</div><div class='ctx'>         "EventName": "SQ_MISC.BUS_LOCK",</div><div class='del'>-        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1076,7 +1188,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xf"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1085,7 +1196,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1094,7 +1205,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHW instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1103,7 +1214,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1112,7 +1223,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json b/tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json<br/>index 1832dd952f66..59789eee060c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/floating-point.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the floating point divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.FP",</div><div class='del'>-        "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='del'>-        "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +30,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +38,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +46,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_5",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +54,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +62,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -77,7 +70,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -86,7 +78,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -95,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -104,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -113,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -122,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x18"</div><div class='ctx'>     },</div><div class='hunk'>@@ -131,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -140,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -149,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x60"</div><div class='ctx'>     },</div><div class='hunk'>@@ -158,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -167,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -176,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -185,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.VECTOR",</div><div class='del'>-        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -194,7 +186,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -203,7 +194,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -212,7 +202,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -221,7 +210,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -230,7 +218,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -239,7 +227,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -248,7 +235,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1c"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json b/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json<br/>index b7cd92fbecd5..d580d305c926 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/frontend.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x60",</div><div class='ctx'>         "EventName": "BACLEARS.ANY",</div><div class='del'>-        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.LCP",</div><div class='del'>-        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.MS_BUSY",</div><div class='del'>-        "PublicDescription": "Cycles the Microcode Sequencer is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -31,7 +30,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='ctx'>         "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='del'>-        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -303,7 +302,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -314,7 +313,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='del'>-        "PublicDescription": "ICACHE_DATA.STALL_PERIODS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -323,7 +321,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x83",</div><div class='ctx'>         "EventName": "ICACHE_TAG.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -333,7 +331,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -343,7 +341,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -352,7 +350,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -362,7 +360,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -372,7 +370,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -381,7 +379,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -391,7 +389,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -402,7 +400,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_SWITCHES",</div><div class='del'>-        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -411,7 +409,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -420,7 +418,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CORE",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that when no operation was delivered to the back-end pipeline due to instruction fetch limitations when the back-end could have accepted more operations. Common examples include instruction cache misses or x86 instruction decode limitations. The count may be distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Frontend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that when no operation was delivered to the back-end pipeline due to instruction fetch limitations when the back-end could have accepted more operations. Common examples include instruction cache misses or x86 instruction decode limitations. The count may be distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Frontend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -430,7 +428,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -441,7 +439,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -450,7 +448,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -460,7 +458,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -471,7 +469,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json b/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json<br/>index 9a620e1b8de8..cc3c834ca286 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/gnr-metrics.json</a></div><div class='hunk'>@@ -1,28 +1,28 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -381,7 +381,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -416,39 +416,39 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + 0 / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -456,7 +456,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -464,7 +464,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_synchronization &gt; 10",</div><div class='hunk'>@@ -480,7 +480,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -496,7 +496,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;Default;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -613,7 +613,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS * min(MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS:R, 74.6 * tma_info_system_core_frequency) + MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * min(MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD:R, 76.6 * tma_info_system_core_frequency) * (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -633,6 +632,15 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g",</div><div class='add'>+        "MetricExpr": "(((1 - ((19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS))) / (19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + (25 * (MEM_LOAD_RETIRED.LOCAL_CXL_MEM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0) + 33 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_CXL_MEM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0))) if #has_pmem &gt; 0 else 1)) * (MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks) if 1e6 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_CXL_MEM + MEM_LOAD_RETIRED.LOCAL_CXL_MEM) &gt; MEM_LOAD_RETIRED.L1_MISS else 0) if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemoryBound;Server;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='add'>+        "MetricName": "tma_cxl_mem_bound",</div><div class='add'>+        "MetricThreshold": "tma_cxl_mem_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='add'>+        "PublicDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g. 3D-Xpoint (Crystal Ridge, a.k.a. IXP) memory, PMM - Persistent Memory Module [from CLX to SPR] or any other CXL Type3 Memory [EMR onwards]).",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD * min(MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD:R, 74.6 * tma_info_system_core_frequency) + MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * min(MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD:R, 74.6 * tma_info_system_core_frequency) * (1 - OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='hunk'>@@ -662,7 +670,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",</div><div class='del'>-        "MetricExpr": "MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks - tma_cxl_mem_bound if #has_pmem &gt; 0 else MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_dram_bound",</div><div class='ctx'>         "MetricThreshold": "tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -720,7 +728,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -848,7 +856,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Default;Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1395,19 +1403,19 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for modified write requests",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.MODIFIED_WRITE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_mwrite_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "CacheHits;Offcore",</div><div class='add'>+        "MetricGroup": "CacheHits;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "L3 cache misses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.L3_MISS / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_l3m_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1433,21 +1441,21 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.DRAM / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_dram_bw",</div><div class='ctx'>         "PublicDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average L3-cache miss BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.L3_MISS / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_l3m_bw",</div><div class='ctx'>         "PublicDescription": "Average L3-cache miss BW for Reads-to-Core (R2C). This covering going to DRAM or other memory off-chip memory tears. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average Off-core access BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.ANY_RESPONSE / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_offcore_bw",</div><div class='ctx'>         "PublicDescription": "Average Off-core access BW for Reads-to-Core (R2C). R2C account for demand or prefetch load/RFO/code access that fill data into the Core caches."</div><div class='ctx'>     },</div><div class='hunk'>@@ -1491,7 +1499,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1538,7 +1546,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1550,16 +1558,28 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_read_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_write_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT_SCH0.RD + UNC_M_CAS_COUNT_SCH1.RD + UNC_M_CAS_COUNT_SCH0.WR + UNC_M_CAS_COUNT_SCH1.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1771,12 +1791,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - MEMORY_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1790,7 +1810,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "MEM_LOAD_RETIRED.L2_HIT * min(MEM_LOAD_RETIRED.L2_HIT:R, 4.4 * tma_info_system_core_frequency) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -1809,12 +1828,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "MEM_LOAD_RETIRED.L3_HIT * min(MEM_LOAD_RETIRED.L3_HIT:R, 32.6 * tma_info_system_core_frequency) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1897,6 +1915,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "MEM_INST_RETIRED.LOCK_LOADS * MEM_INST_RETIRED.LOCK_LOADS:R / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1929,7 +1948,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1938,13 +1957,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Backend;Default;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -1954,7 +1973,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * MISC2_RETIRED.LFENCE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -2007,7 +2025,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2.4",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2042,6 +2060,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -2103,6 +2122,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIV_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - EXE_ACTIVITY.BOUND_ON_LOADS else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2112,6 +2132,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "max(EXE_ACTIVITY.EXE_BOUND_0_PORTS - RESOURCE_STALLS.SCOREBOARD, 0) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2121,6 +2142,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.1_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2130,7 +2152,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.2_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2140,7 +2161,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.CYCLES_GE_3 / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2150,7 +2170,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from remote cache in other sockets including synchronizations issues",</div><div class='del'>-        "MetricExpr": "(MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM:R + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD:R) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * PEBS + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * PEBS) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Offcore;Server;Snoop;TopdownL5;tma_L5_group;tma_issueSyncxn;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_remote_cache",</div><div class='ctx'>         "MetricThreshold": "tma_remote_cache &gt; 0.05 &amp; (tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)))",</div><div class='hunk'>@@ -2159,7 +2179,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from remote memory",</div><div class='del'>-        "MetricExpr": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM:R * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * PEBS * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;Snoop;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_remote_mem",</div><div class='ctx'>         "MetricThreshold": "tma_remote_mem &gt; 0.1 &amp; (tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)))",</div><div class='hunk'>@@ -2177,7 +2197,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2205,7 +2225,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "CPU_CLK_UNHALTED.PAUSE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2237,7 +2256,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/memory.json b/tools/perf/pmu-events/arch/x86/graniterapids/memory.json<br/>index 4db39f304c2c..96f40390becf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/memory.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -15,7 +14,6 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6"</div><div class='ctx'>     },</div><div class='hunk'>@@ -24,7 +22,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='del'>-        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -34,7 +32,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -44,7 +41,6 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -54,7 +50,7 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -64,7 +60,7 @@</div><div class='ctx'>         "CounterMask": "9",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -412,7 +408,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts demand data read requests that miss the L3 cache. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -422,7 +417,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -431,7 +426,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -449,7 +444,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_EVENTS",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -458,7 +453,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEM",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -467,7 +462,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEMTYPE",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -476,7 +471,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -485,7 +480,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.COMMIT",</div><div class='del'>-        "PublicDescription": "Counts the number of times RTM commit succeeded. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times RTM commit succeeded.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -494,7 +489,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.START",</div><div class='del'>-        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -503,7 +498,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_READ",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -512,7 +507,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_WRITE",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -521,7 +516,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CONFLICT",</div><div class='del'>-        "PublicDescription": "Counts the number of times a TSX line had a cache conflict. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a TSX line had a cache conflict.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/other.json b/tools/perf/pmu-events/arch/x86/graniterapids/other.json<br/>index 8b7aa4caec46..c0747750b1a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/other.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.HARDWARE",</div><div class='del'>-        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,11 +13,35 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.PAGE_FAULT",</div><div class='del'>-        "PublicDescription": "ASSISTS.PAGE_FAULT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of hardware interrupts received by the processor.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.RECEIVED",</div><div class='add'>+        "PublicDescription": "Counts the number of hardware interruptions received by the processor.",</div><div class='add'>+        "SampleAfterValue": "203",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -34,7 +58,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x2d",</div><div class='ctx'>         "EventName": "XQ.FULL_CYCLES",</div><div class='del'>-        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json b/tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json<br/>index 27af3bd6bacf..0fef8fd61974 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/pipeline.json</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.IDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the integer divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -24,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1b"</div><div class='ctx'>     },</div><div class='hunk'>@@ -271,7 +270,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -280,7 +279,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -289,7 +288,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x70"</div><div class='ctx'>     },</div><div class='hunk'>@@ -298,7 +297,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -307,7 +306,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",</div><div class='ctx'>         "SampleAfterValue": "25003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -316,7 +315,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -327,7 +325,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE_INST Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -336,7 +333,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -344,7 +341,7 @@</div><div class='ctx'>         "BriefDescription": "Reference cycles when the core is not in halt state.",</div><div class='ctx'>         "Counter": "Fixed counter 2",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -353,7 +350,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -361,7 +358,7 @@</div><div class='ctx'>         "BriefDescription": "Core cycles when the thread is not in halt state",</div><div class='ctx'>         "Counter": "Fixed counter 1",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -370,7 +367,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",</div><div class='ctx'>         "SampleAfterValue": "2000003"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -379,7 +376,6 @@</div><div class='ctx'>         "CounterMask": "8",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -389,7 +385,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -399,7 +394,6 @@</div><div class='ctx'>         "CounterMask": "16",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='del'>-        "PublicDescription": "Cycles while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -409,7 +403,6 @@</div><div class='ctx'>         "CounterMask": "12",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -419,7 +412,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -429,7 +421,6 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='del'>-        "PublicDescription": "Total execution stalls. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -438,7 +429,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb7",</div><div class='ctx'>         "EventName": "EXE.AMX_BUSY",</div><div class='del'>-        "PublicDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -447,7 +437,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -456,7 +446,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -465,7 +454,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -474,7 +463,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -483,7 +472,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -493,7 +482,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='del'>-        "PublicDescription": "Execution stalls while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -503,7 +491,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='del'>-        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -512,7 +500,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='del'>-        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -521,7 +509,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='ctx'>         "EventName": "INST_DECODED.DECODERS",</div><div class='del'>-        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -546,7 +534,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -555,7 +542,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -572,7 +559,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -583,7 +570,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -592,7 +579,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='del'>-        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -601,7 +588,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.MBA_STALLS",</div><div class='del'>-        "PublicDescription": "INT_MISC.MBA_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -610,7 +596,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -621,7 +607,6 @@</div><div class='ctx'>         "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x7",</div><div class='del'>-        "PublicDescription": "Bubble cycles of BAClear (Unknown Branch). Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -630,7 +615,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.UOP_DROPPING",</div><div class='del'>-        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -639,7 +624,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.128BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x13"</div><div class='ctx'>     },</div><div class='hunk'>@@ -648,7 +632,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.256BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xac"</div><div class='ctx'>     },</div><div class='hunk'>@@ -657,7 +640,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -666,7 +649,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -675,7 +658,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.MUL_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -684,7 +666,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.SHUFFLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -693,7 +674,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_128 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -702,7 +682,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -711,7 +690,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='del'>-        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -720,7 +699,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.NO_SR",</div><div class='del'>-        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x88"</div><div class='ctx'>     },</div><div class='hunk'>@@ -729,7 +708,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='del'>-        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x82"</div><div class='ctx'>     },</div><div class='hunk'>@@ -738,7 +717,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x4c",</div><div class='ctx'>         "EventName": "LOAD_HIT_PREFETCH.SWPF",</div><div class='del'>-        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -748,7 +727,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -758,7 +737,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -767,7 +746,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -778,7 +757,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of machine clears (nukes) of any type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -787,7 +766,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.SMC",</div><div class='del'>-        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -796,7 +775,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe0",</div><div class='ctx'>         "EventName": "MISC2_RETIRED.LFENCE",</div><div class='del'>-        "PublicDescription": "number of LFENCE retired instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -805,7 +784,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcc",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -814,7 +793,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SB",</div><div class='del'>-        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -823,7 +802,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SCOREBOARD",</div><div class='del'>-        "PublicDescription": "Counts cycles where the pipeline is stalled due to serializing operations. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -832,7 +810,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -844,7 +822,7 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -853,7 +831,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_RESOURCE",</div><div class='del'>-        "PublicDescription": "Cycles when RS was empty and a resource allocation stall is asserted Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -862,7 +839,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution units limitations, or other conditions. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Backend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution units limitations, or other conditions. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Backend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -871,7 +848,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -880,7 +857,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -889,7 +866,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "TOPDOWN.MEMORY_BOUND_SLOTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -897,7 +873,7 @@</div><div class='ctx'>         "BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",</div><div class='ctx'>         "Counter": "Fixed counter 3",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS",</div><div class='del'>-        "PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -906,7 +882,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS_P",</div><div class='del'>-        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -915,7 +891,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x76",</div><div class='ctx'>         "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='del'>-        "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -924,7 +900,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 0.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -933,7 +909,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 1. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 1.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -942,7 +918,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_2_3_10",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -951,7 +927,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_4_9",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -960,7 +936,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_5_11",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -969,7 +945,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_6",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 6. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 6.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -978,7 +954,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_7_8",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -987,7 +963,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops executed from any thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed from any thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -997,7 +973,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1007,7 +983,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1017,7 +993,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1027,7 +1003,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1037,7 +1013,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 uop was executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1047,7 +1023,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Cycles where at least 2 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1057,7 +1033,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Cycles where at least 3 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1067,7 +1043,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Cycles where at least 4 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1078,7 +1054,7 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1087,7 +1063,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of uops to be executed per-thread each cycle. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1096,7 +1071,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.X87",</div><div class='del'>-        "PublicDescription": "Counts the number of x87 uops executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1105,7 +1080,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1115,7 +1090,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.CYCLES",</div><div class='del'>-        "PublicDescription": "UOPS_ISSUED.CYCLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1125,7 +1099,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.CYCLES",</div><div class='del'>-        "PublicDescription": "Counts cycles where at least one uop has retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1134,7 +1108,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.HEAVY",</div><div class='del'>-        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1145,7 +1119,6 @@</div><div class='ctx'>         "EventName": "UOPS_RETIRED.MS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "UOPS_RETIRED.MS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1154,7 +1127,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.SLOTS",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that are utilized by operations that eventually get retired (committed) by the processor pipeline. Usually, this event positively correlates with higher performance  for example, as measured by the instructions-per-cycle metric. Software can use this event as the numerator for the Retiring metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that are utilized by operations that eventually get retired (committed) by the processor pipeline. Usually, this event positively correlates with higher performance  for example, as measured by the instructions-per-cycle metric. Software can use this event as the numerator for the Retiring metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1165,7 +1138,7 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event counts cycles without actually retired uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json b/tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json<br/>index b782f6d54fc2..721fc42797b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-cache.json</a></div><div class='hunk'>@@ -10,6 +10,15 @@</div><div class='ctx'>         "Unit": "CHACMS"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "UNC_CHACMS_DISTRESS_ASSERTED",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x35",</div><div class='add'>+        "EventName": "UNC_CHACMS_DISTRESS_ASSERTED",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PortMask": "0x000",</div><div class='add'>+        "Unit": "CHACMS"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles FAST trigger is received from the global FAST distress wire.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x34",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json<br/>index 6667fbc50452..5eb1145f204f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-interconnect.json</a></div><div class='hunk'>@@ -833,12 +833,20 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x1F",</div><div class='ctx'>         "EventName": "UNC_I_MISC1.LOST_FWD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "IRP"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Misc Events - Set 1 : Received Invalid : Secondary received a transfer that did not have sufficient MESI state",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x1F",</div><div class='add'>+        "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "IRP"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Snoop Hit E/S responses",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json b/tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json<br/>index f4f956966e16..2ea2637df3fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-io.json</a></div><div class='hunk'>@@ -1321,7 +1321,6 @@</div><div class='ctx'>         "FCMask": "0x01",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PortMask": "0x0FF",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IIO"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json b/tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json<br/>index b991f6e1afbe..f559e27e2815 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/uncore-memory.json</a></div><div class='hunk'>@@ -60,6 +60,33 @@</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 0 regular reads",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_NON_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc3",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 auto-precharge reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_PRE_REG",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc2",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 auto-precharge underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_PRE_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc8",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 regular reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='ctx'>         "EventName": "UNC_M_CAS_COUNT_SCH0.RD_REG",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='hunk'>@@ -75,6 +102,15 @@</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_UNDERFILL_ALL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xcc",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 0, all writes",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -125,6 +161,33 @@</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 1 regular reads",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_NON_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc3",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 auto-precharge reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_PRE_REG",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc2",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 auto-precharge underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_PRE_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc8",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 regular reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='ctx'>         "EventName": "UNC_M_CAS_COUNT_SCH1.RD_REG",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='hunk'>@@ -140,6 +203,15 @@</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_UNDERFILL_ALL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xcc",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 1, all writes",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x06",</div><div class='hunk'>@@ -189,13 +261,52 @@</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "PMMNT is sending REF* commands while being in specified Refresh rate",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x72",</div><div class='add'>+        "EventName": "UNC_M_MNTCMD_REFRATE.REFAB1X",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "PMMNT is sending REF* commands while being in specified Refresh rate",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x72",</div><div class='add'>+        "EventName": "UNC_M_MNTCMD_REFRATE.REFAB2X",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "PMMNT is sending REF* commands while being in specified Refresh rate",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x72",</div><div class='add'>+        "EventName": "UNC_M_MNTCMD_REFRATE.REFSB1X",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "PMMNT is sending REF* commands while being in specified Refresh rate",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x72",</div><div class='add'>+        "EventName": "UNC_M_MNTCMD_REFRATE.REFSB2X",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "# of cycles MR4 temp readings forced 2x refresh",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xA7",</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH0_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -206,7 +317,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH0_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -217,7 +327,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH1_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -228,7 +337,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH1_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -239,7 +347,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH0_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -250,7 +357,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH0_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -261,7 +367,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH1_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -272,7 +377,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH1_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -283,7 +387,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -294,7 +397,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -305,7 +407,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK2",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -316,7 +417,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK3",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -327,7 +427,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -338,7 +437,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -349,7 +447,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK2",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -360,7 +457,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK3",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -371,7 +467,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CHANNEL_PPD_CYCLES",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -381,7 +476,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -392,7 +486,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -423,7 +516,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_THROTTLE_CYCLES.MR4BLKEN",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -434,7 +526,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_THROTTLE_CYCLES.RAPLBLK",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -615,7 +706,6 @@</div><div class='ctx'>         "EventName": "UNC_M_SELF_REFRESH.ENTER_SUCCESS",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "UNC_M_SELF_REFRESH.ENTER_SUCCESS",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -626,7 +716,6 @@</div><div class='ctx'>         "EventName": "UNC_M_SELF_REFRESH.ENTER_SUCCESS_CYCLES",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -637,7 +726,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_CRIT_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -648,7 +736,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_CRIT_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -659,7 +746,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_HIGH_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -670,7 +756,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_HIGH_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -681,7 +766,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_LOW_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -692,7 +776,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_LOW_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -703,7 +786,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_MID_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -714,7 +796,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_MID_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json b/tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json<br/>index 3d3f88600e26..609a9549cbf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/graniterapids/virtual-memory.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -142,7 +142,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json b/tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json<br/>index b26ea70a3628..aebd82ced1cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/haswell/hsw-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -98,7 +97,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -139,7 +137,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -509,7 +506,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -521,7 +518,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -696,7 +693,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -746,7 +742,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "((min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING) + RESOURCE_STALLS.SB) / (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) * tma_backend_bound",</div><div class='add'>+        "MetricExpr": "(min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING) + RESOURCE_STALLS.SB) / (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) * tma_backend_bound",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -856,7 +852,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "(min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB - RESOURCE_STALLS.SB - min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "((min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) - RESOURCE_STALLS.SB - min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -865,7 +861,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -874,7 +870,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -883,7 +879,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json b/tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json<br/>index 8245a98ad4b9..b8845f8a28b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/haswellx/hsx-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -282,7 +282,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -300,7 +299,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -341,7 +339,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -711,7 +708,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -723,7 +720,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -756,6 +753,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182@ / UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182\\,thresh\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='hunk'>@@ -918,7 +916,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -928,6 +925,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from local memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "200 * (MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.L3_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_local_mem",</div><div class='hunk'>@@ -977,7 +975,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "((min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING) + RESOURCE_STALLS.SB) / (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) * tma_backend_bound",</div><div class='add'>+        "MetricExpr": "(min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING) + RESOURCE_STALLS.SB) / (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) * tma_backend_bound",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -1087,7 +1085,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "(min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB - RESOURCE_STALLS.SB - min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "((min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@)) / 2 - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) + cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - (cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@ if tma_info_thread_ipc &gt; 1.8 else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0) + RESOURCE_STALLS.SB) - RESOURCE_STALLS.SB - min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.STALLS_LDM_PENDING)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -1096,7 +1094,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1105,7 +1103,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1114,7 +1112,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1141,6 +1139,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from remote memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "310 * (MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.L3_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;Snoop;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_remote_mem",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json b/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json<br/>index c5bfdb2f288b..cf9ed3edb694 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json</a></div><div class='hunk'>@@ -1,63 +1,63 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C9 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c9\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C9_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -85,7 +85,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often memory load accesses were aliased by preceding stores (in program order) with a 4K address offset",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_4k_aliasing",</div><div class='hunk'>@@ -134,6 +133,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -148,39 +148,44 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -188,6 +193,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='hunk'>@@ -196,6 +202,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='hunk'>@@ -204,6 +211,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -212,7 +220,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -220,6 +229,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -427,7 +437,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -619,6 +629,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_lsd + tma_mite + tma_ms)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -1068,7 +1079,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1092,6 +1103,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / ASSISTS.ANY",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1107,7 +1124,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1119,7 +1136,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1128,7 +1145,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_ARB_TRK_REQUESTS.ALL + UNC_ARB_COH_TRK_REQUESTS.ALL) / 1e6 / tma_info_system_time / 1e3",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1296,12 +1313,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1325,7 +1342,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L2_MISS - CYCLE_ACTIVITY.STALLS_L3_MISS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "CacheHits;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_bound",</div><div class='hunk'>@@ -1339,7 +1355,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1445,7 +1461,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1454,7 +1470,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1522,7 +1538,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 3.3",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1656,7 +1672,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1693,7 +1709,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents rate of split store accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",</div><div class='ctx'>         "MetricName": "tma_split_stores",</div><div class='hunk'>@@ -1707,7 +1722,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1721,7 +1736,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * LD_BLOCKS.STORE_FORWARD / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_store_fwd_blk",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json b/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json<br/>index a886a0cfee07..f58eec2a1788 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/icelakex/icx-metrics.json</a></div><div class='hunk'>@@ -1,28 +1,28 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -79,6 +79,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO reads that are initiated by end device controllers that are requesting memory from the CPU and miss the L3 cache",</div><div class='add'>+        "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_read_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO reads that are initiated by end device controllers that are requesting memory from the local CPU socket",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_LOCAL * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_read_local",</div><div class='hunk'>@@ -97,6 +103,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO writes that are initiated by end device controllers that are writing memory to the CPU",</div><div class='add'>+        "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOM + UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR) * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_write_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO writes that are initiated by end device controllers that are writing memory to the local CPU socket",</div><div class='ctx'>         "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL + UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL) * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_write_local",</div><div class='hunk'>@@ -109,6 +121,24 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "The percent of inbound full cache line writes initiated by IO that miss the L3 cache",</div><div class='add'>+        "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM / UNC_CHA_TOR_INSERTS.IO_ITOM",</div><div class='add'>+        "MetricName": "io_full_write_l3_miss",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "The percent of inbound partial writes initiated by IO that miss the L3 cache",</div><div class='add'>+        "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_MISS_RFO) / (UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_RFO)",</div><div class='add'>+        "MetricName": "io_partial_write_l3_miss",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "The percent of inbound reads initiated by IO that miss the L3 cache",</div><div class='add'>+        "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR / UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",</div><div class='add'>+        "MetricName": "io_read_l3_miss",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Ratio of number of completed page walks (for 2 megabyte and 4 megabyte page sizes) caused by a code fetch to the total number of completed instructions",</div><div class='ctx'>         "MetricExpr": "ITLB_MISSES.WALK_COMPLETED_2M_4M / INST_RETIRED.ANY",</div><div class='ctx'>         "MetricName": "itlb_2nd_level_large_page_mpi",</div><div class='hunk'>@@ -331,7 +361,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often memory load accesses were aliased by preceding stores (in program order) with a 4K address offset",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_4k_aliasing",</div><div class='hunk'>@@ -380,6 +409,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -394,39 +424,44 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -434,7 +469,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -442,7 +478,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_synchronization &gt; 10",</div><div class='hunk'>@@ -450,6 +487,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -458,7 +496,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -466,6 +505,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -585,6 +625,15 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g",</div><div class='add'>+        "MetricExpr": "(((1 - ((19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS))) / (19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + (25 * (MEM_LOAD_RETIRED.LOCAL_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0) + 33 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0))) if #has_pmem &gt; 0 else 1)) * (CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound) if 1e6 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM + MEM_LOAD_RETIRED.LOCAL_PMM) &gt; MEM_LOAD_RETIRED.L1_MISS else 0) if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemoryBound;Server;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='add'>+        "MetricName": "tma_cxl_mem_bound",</div><div class='add'>+        "MetricThreshold": "tma_cxl_mem_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='add'>+        "PublicDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g. 3D-Xpoint (Crystal Ridge, a.k.a. IXP) memory, PMM - Persistent Memory Module [from CLX to SPR] or any other CXL Type3 Memory [EMR onwards]).",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "43.5 * tma_info_system_core_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT + MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM * (1 - OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='hunk'>@@ -615,7 +664,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='del'>-        "MetricExpr": "CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound",</div><div class='add'>+        "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound - tma_cxl_mem_bound if #has_pmem &gt; 0 else CYCLE_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks + (CYCLE_ACTIVITY.STALLS_L1D_MISS - CYCLE_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks - tma_l2_bound)",</div><div class='ctx'>         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_dram_bound",</div><div class='ctx'>         "MetricThreshold": "tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -673,7 +722,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -865,6 +914,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_mite + tma_ms)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -1320,7 +1370,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1338,6 +1388,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / ASSISTS.ANY",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1353,7 +1409,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1365,16 +1421,28 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_RPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_read_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_WPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_write_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT.RD + UNC_M_CAS_COUNT.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1433,12 +1501,20 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD@thresh\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='ctx'>         "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]",</div><div class='add'>+        "MetricExpr": "(1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM) / cha_0@event\\=0x0@ if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryLat;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_mem_pmm_read_latency",</div><div class='add'>+        "PublicDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",</div><div class='ctx'>         "MetricExpr": "1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD) / (tma_info_system_socket_clks / tma_info_system_time)",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryLat;SoC",</div><div class='hunk'>@@ -1590,12 +1666,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1619,7 +1695,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L2_MISS - CYCLE_ACTIVITY.STALLS_L3_MISS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "CacheHits;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_bound",</div><div class='hunk'>@@ -1633,7 +1708,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1739,7 +1814,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1748,7 +1823,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1816,7 +1891,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 3.3",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1968,7 +2043,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2005,7 +2080,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents rate of split store accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",</div><div class='ctx'>         "MetricName": "tma_split_stores",</div><div class='hunk'>@@ -2019,7 +2093,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -2033,7 +2107,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * LD_BLOCKS.STORE_FORWARD / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_store_fwd_blk",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json<br/>index 6f84ad47276d..1c225192ba34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json</a></div><div class='hunk'>@@ -6050,7 +6050,7 @@</div><div class='ctx'>         "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "Counts when a a transaction with the opcode type RspIFwd Snoop Response was received which indicates a remote caching agent forwarded the data and the requesting agent is able to acquire the data in E (Exclusive) or M (modified) states.  This is commonly returned with RFO (the Read for Ownership issued before a write) transactions.  The snoop could have either been to a cacheline in the M,E,F (Modified, Exclusive or Forward)  states.",</div><div class='add'>+        "PublicDescription": "Counts when a transaction with the opcode type RspIFwd Snoop Response was received which indicates a remote caching agent forwarded the data and the requesting agent is able to acquire the data in E (Exclusive) or M (modified) states.  This is commonly returned with RFO (the Read for Ownership issued before a write) transactions.  The snoop could have either been to a cacheline in the M,E,F (Modified, Exclusive or Forward)  states.",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "CHA"</div><div class='ctx'>     },</div><div class='hunk'>@@ -6072,7 +6072,7 @@</div><div class='ctx'>         "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "Counts when a a transaction with the opcode type RspSFwd Snoop Response was received which indicates a remote caching agent forwarded the data but held on to its current copy.  This is common for data and code reads that hit in a remote socket in E (Exclusive) or F (Forward) state.",</div><div class='add'>+        "PublicDescription": "Counts when a transaction with the opcode type RspSFwd Snoop Response was received which indicates a remote caching agent forwarded the data but held on to its current copy.  This is common for data and code reads that hit in a remote socket in E (Exclusive) or F (Forward) state.",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "CHA"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json b/tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json<br/>index de651ff9f846..969cb519eec1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/ivybridge/ivb-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5) / (3 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -98,7 +97,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -139,7 +137,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -561,7 +558,7 @@</div><div class='ctx'>         "MetricThreshold": "tma_info_memory_tlb_page_walks_utilization &gt; 0.5"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -574,7 +571,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -586,7 +583,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -775,7 +772,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -926,7 +922,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -935,7 +931,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -944,7 +940,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json b/tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json<br/>index 714d5e6d21e7..1cdd197ac883 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5) / (3 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -98,7 +97,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -139,7 +137,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -561,7 +558,7 @@</div><div class='ctx'>         "MetricThreshold": "tma_info_memory_tlb_page_walks_utilization &gt; 0.5"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -574,7 +571,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -586,7 +583,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -626,6 +623,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182@ / UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182\\,thresh\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='hunk'>@@ -795,7 +793,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -805,6 +802,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from local memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "200 * (MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.LLC_HIT + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_local_mem",</div><div class='hunk'>@@ -955,7 +953,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else (min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "(cpu@UOPS_EXECUTED.CORE\\,inv\\,cmask\\=1@ / 2 if #SMT_on else min(CPU_CLK_UNHALTED.THREAD, CYCLE_ACTIVITY.CYCLES_NO_EXECUTE) - (RS_EVENTS.EMPTY_CYCLES if tma_fetch_latency &gt; 0.1 else 0)) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_0 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -964,7 +962,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=1@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC - UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_1 &gt; 0.2 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -973,7 +971,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else (UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks)",</div><div class='add'>+        "MetricExpr": "((cpu@UOPS_EXECUTED.CORE\\,cmask\\=2@ - cpu@UOPS_EXECUTED.CORE\\,cmask\\=3@) / 2 if #SMT_on else UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC - UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC) / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='ctx'>         "MetricThreshold": "tma_ports_utilized_2 &gt; 0.15 &amp; (tma_ports_utilization &gt; 0.15 &amp; (tma_core_bound &gt; 0.1 &amp; tma_backend_bound &gt; 0.2))",</div><div class='hunk'>@@ -1000,6 +998,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling loads from remote memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "310 * (MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_UOPS_RETIRED.HIT_LFB / (MEM_LOAD_UOPS_RETIRED.L2_HIT + MEM_LOAD_UOPS_RETIRED.LLC_HIT + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM + MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS + MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM + MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Server;Snoop;TopdownL5;tma_L5_group;tma_mem_latency_group",</div><div class='ctx'>         "MetricName": "tma_remote_mem",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json b/tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json<br/>index 6f636ea0f216..250c73b21385 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/jaketown/jkt-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -71,7 +71,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -296,7 +295,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -308,7 +307,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -348,6 +347,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182@ / UNC_C_TOR_OCCUPANCY.MISS_OPCODE@filter_opc\\=0x182\\,thresh\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/cache.json b/tools/perf/pmu-events/arch/x86/lunarlake/cache.json<br/>index ff37d49611c3..3d2616be8ec1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/cache.json</a></div><div class='hunk'>@@ -29,6 +29,16 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cachelines replaced into the L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "L1D.L1_REPLACEMENT",</div><div class='add'>+        "PublicDescription": "Counts cachelines replaced into the L1 d-cache.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Cachelines replaced into the L0 and L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='hunk'>@@ -233,7 +243,7 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of L2 prefetches initiated by either the L2 Stream or AMP that were throttled due to exceeding the XQ threshold set by either XQ_THRESOLD_DTP or XQ_THRESHOLD. Counts on a per core basis.",</div><div class='add'>+        "BriefDescription": "Counts the number of L2 prefetches initiated by either the L2 Stream or AMP that were throttled due to exceeding the XQ threshold set by either XQ_THRESHOLD_DTP or XQ_THRESHOLD. Counts on a per core basis.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x28",</div><div class='ctx'>         "EventName": "L2_PREFETCHES_THROTTLED.XQ_THRESH",</div><div class='hunk'>@@ -454,7 +464,7 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of LLC prefetches throttled due to exceeding the XQ threshold set by either XQ_THRESOLD_DTP or LLC_XQ_THRESHOLD. Counts on a per core basis.",</div><div class='add'>+        "BriefDescription": "Counts the number of LLC prefetches throttled due to exceeding the XQ threshold set by either XQ_THRESHOLD_DTP or LLC_XQ_THRESHOLD. Counts on a per core basis.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x29",</div><div class='ctx'>         "EventName": "LLC_PREFETCHES_THROTTLED.XQ_THRESH",</div><div class='hunk'>@@ -592,7 +602,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_LOADS",</div><div class='del'>-        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x81",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -603,7 +613,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_STORES",</div><div class='del'>-        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -613,7 +623,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_SWPF",</div><div class='del'>-        "PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x84",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -624,7 +634,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x87",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -635,7 +645,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.LOCK_LOADS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with locked access. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with locked access. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -646,7 +656,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.SPLIT_LOADS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -657,18 +667,29 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.SPLIT_STORES",</div><div class='del'>-        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x42",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_ANY",</div><div class='add'>+        "PublicDescription": "Number of retired instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xf",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions that hit the STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_HIT_LOADS",</div><div class='del'>-        "PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -679,18 +700,39 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_HIT_STORES",</div><div class='del'>-        "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xa",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_ANY",</div><div class='add'>+        "PublicDescription": "Retired instructions that miss the STLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x17",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions that miss the STLB.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",</div><div class='del'>-        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x11",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -701,18 +743,28 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",</div><div class='del'>-        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x12",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x14",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$)",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -723,7 +775,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -734,7 +786,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",</div><div class='del'>-        "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -745,7 +797,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd2",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -756,7 +808,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd3",</div><div class='ctx'>         "EventName": "MEM_LOAD_L3_MISS_RETIRED.MEMSIDE_CACHE",</div><div class='del'>-        "PublicDescription": "Retired load instructions which data source is memory side cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired load instructions which data source is memory side cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -766,7 +818,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd4",</div><div class='ctx'>         "EventName": "MEM_LOAD_MISC_RETIRED.UC",</div><div class='del'>-        "PublicDescription": "Retired instructions with at least one load to uncacheable memory-type, or at least one cache-line split locked access (Bus Lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired instructions with at least one load to uncacheable memory-type, or at least one cache-line split locked access (Bus Lock). Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -777,7 +829,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.FB_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -788,7 +840,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -799,7 +851,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT_L0",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -809,7 +861,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_HIT_L1",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -819,7 +871,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L1_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -830,7 +882,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with L2 cache hits as data sources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with L2 cache hits as data sources. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -841,7 +893,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L2_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions missed L2 cache as data sources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions missed L2 cache as data sources. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100021",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -852,7 +904,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L3_HIT",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100021",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -863,7 +915,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='ctx'>         "EventName": "MEM_LOAD_RETIRED.L3_MISS",</div><div class='del'>-        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "50021",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1037,7 +1089,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='hunk'>@@ -1049,7 +1101,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='hunk'>@@ -1061,7 +1113,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='hunk'>@@ -1073,7 +1125,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='hunk'>@@ -1085,7 +1137,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='hunk'>@@ -1097,7 +1149,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='hunk'>@@ -1109,7 +1161,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='hunk'>@@ -1121,7 +1173,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled",</div><div class='del'>-        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Counter": "0,1",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='hunk'>@@ -1254,6 +1306,18 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts writebacks of modified cachelines that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_M.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E00008",</div><div class='add'>+        "PublicDescription": "Counts writebacks of modified cachelines that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts writebacks of non-modified cachelines that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -1266,6 +1330,18 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts writebacks of non-modified cachelines that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_NONM.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E01000",</div><div class='add'>+        "PublicDescription": "Counts writebacks of non-modified cachelines that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -1303,7 +1379,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1315,7 +1391,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1327,7 +1403,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches which forwarded the unmodified data to the requesting core.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1363,7 +1439,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1375,7 +1451,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -1386,6 +1462,18 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E04477",</div><div class='add'>+        "PublicDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Any memory transaction that reached the SQ.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/frontend.json b/tools/perf/pmu-events/arch/x86/lunarlake/frontend.json<br/>index e2facc4086e9..b21d602e9f1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/frontend.json</a></div><div class='hunk'>@@ -108,7 +108,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ANY_ANT",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x9",</div><div class='del'>-        "PublicDescription": "Always Not Taken (ANT) conditional retired branches (no BTB entry and not mispredicted) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Always Not Taken (ANT) conditional retired branches (no BTB entry and not mispredicted) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x1",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.DSB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x11",</div><div class='del'>-        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -199,7 +199,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.ITLB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x14",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -211,7 +211,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.L1I_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x12",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -223,7 +223,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.L2_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x13",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -235,7 +235,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_128",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x608006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -247,7 +247,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_16",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x601006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -259,7 +259,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_2",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600206",</div><div class='del'>-        "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -271,7 +271,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_256",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x610006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -283,7 +283,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x100206",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -295,7 +295,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_32",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x602006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -307,7 +307,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_4",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600406",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -319,7 +319,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_512",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x620006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -331,7 +331,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_64",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x604006",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -343,7 +343,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.LATENCY_GE_8",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x600806",</div><div class='del'>-        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -355,7 +355,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.MISP_ANT",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x9",</div><div class='del'>-        "PublicDescription": "ANT retired branches that got just mispredicted Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "ANT retired branches that got just mispredicted Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -367,7 +367,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.MS_FLOWS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "Counts flows delivered by the Microcode Sequencer Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts flows delivered by the Microcode Sequencer Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -397,7 +397,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.STLB_MISS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x15",</div><div class='del'>-        "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -409,7 +409,7 @@</div><div class='ctx'>         "EventName": "FRONTEND_RETIRED.UNKNOWN_BRANCH",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x17",</div><div class='del'>-        "PublicDescription": "Number retired branch instructions that caused the front-end to be resteered when it finds the instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number retired branch instructions that caused the front-end to be resteered when it finds the instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json b/tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json<br/>index 3c740962e63e..06390a72110d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/lnl-metrics.json</a></div><div class='hunk'>@@ -1,75 +1,47 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='del'>-        "MetricGroup": "Power",</div><div class='del'>-        "MetricName": "C3_Pkg_Residency",</div><div class='del'>-        "ScaleUnit": "100%"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='del'>-        "MetricGroup": "Power",</div><div class='del'>-        "MetricName": "C7_Pkg_Residency",</div><div class='del'>-        "ScaleUnit": "100%"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='del'>-        "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='del'>-        "MetricGroup": "Power",</div><div class='del'>-        "MetricName": "C8_Pkg_Residency",</div><div class='del'>-        "ScaleUnit": "100%"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='del'>-        "BriefDescription": "C9 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",</div><div class='del'>-        "MetricGroup": "Power",</div><div class='del'>-        "MetricName": "C9_Pkg_Residency",</div><div class='del'>-        "ScaleUnit": "100%"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Percentage of cycles spent in System Management Interrupts.",</div><div class='ctx'>         "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ &gt; 0 else 0)",</div><div class='ctx'>         "MetricGroup": "smi",</div><div class='hunk'>@@ -555,7 +527,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_atom@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -725,6 +697,13 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Uncore frequency per die [GHZ]",</div><div class='add'>+        "MetricExpr": "tma_info_system_socket_clks / #num_dies / duration_time / 1e9",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "UNCORE_FREQ",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_DISPATCHED.ALU@ / (6 * tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='hunk'>@@ -755,7 +734,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -767,7 +746,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots wasted due to incorrect speculations",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-bad\\-spec@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-bad\\-spec@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_bad_speculation",</div><div class='ctx'>         "MetricThreshold": "tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -794,35 +773,35 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_capacity / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_capacity / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='del'>-        "Unit": "cpu_core"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20",</div><div class='hunk'>@@ -830,7 +809,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_microcode_sequencer + tma_few_uops_instructions) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_microcode_sequencer + tma_few_uops_instructions) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -839,7 +818,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / (tma_dtlb_load + tma_fb_full + tma_l1_latency_capacity + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_early_blk + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -866,7 +845,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -883,7 +862,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -1023,7 +1002,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@R, 24 * tma_info_system_core_frequency) + cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM@R, 25 * tma_info_system_core_frequency)) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -1076,7 +1054,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to DSB (decoded uop cache) fetch pipeline",</div><div class='del'>-        "MetricExpr": "(cpu_core@IDQ.DSB_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ + cpu_core@IDQ.DSB_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@IDQ.DSB_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.DSB_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.STARVATION_CYCLES@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "DSB;FetchBW;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_dsb",</div><div class='ctx'>         "MetricThreshold": "tma_dsb &gt; 0.15 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1130,7 +1108,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1147,7 +1125,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU was stalled due to Frontend latency issues",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-fetch\\-lat@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-fetch\\-lat@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Frontend;TmaL2;TopdownL2;tma_L2_group;tma_frontend_bound_group",</div><div class='ctx'>         "MetricName": "tma_fetch_latency",</div><div class='ctx'>         "MetricThreshold": "tma_fetch_latency &gt; 0.1 &amp; tma_frontend_bound &gt; 0.15",</div><div class='hunk'>@@ -1197,7 +1175,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) scalar uops fraction the CPU has retired",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_scalar",</div><div class='ctx'>         "MetricThreshold": "tma_fp_scalar &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6)",</div><div class='hunk'>@@ -1207,7 +1185,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction the CPU has retired aggregated across all vector widths",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.VECTOR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6)",</div><div class='hunk'>@@ -1217,7 +1195,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic FP vector uops fraction the CPU has retired for 128-bit wide vectors",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@) / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE@) / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL5;tma_L5_group;tma_fp_vector_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector_128b",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector_128b &gt; 0.1 &amp; (tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6))",</div><div class='hunk'>@@ -1227,7 +1205,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic FP vector uops fraction the CPU has retired for 256-bit wide vectors",</div><div class='del'>-        "MetricExpr": "cpu_core@FP_ARITH_INST_RETIRED.VECTOR\\,umask\\=0x30@ / (tma_retiring * tma_info_thread_slots)",</div><div class='add'>+        "MetricExpr": "cpu_core@FP_ARITH_OPS_RETIRED.VECTOR\\,umask\\=0x30@ / (tma_retiring * tma_info_thread_slots)",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL5;tma_L5_group;tma_fp_vector_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector_256b",</div><div class='ctx'>         "MetricThreshold": "tma_fp_vector_256b &gt; 0.1 &amp; (tma_fp_vector &gt; 0.1 &amp; (tma_fp_arith &gt; 0.2 &amp; tma_light_operations &gt; 0.6))",</div><div class='hunk'>@@ -1238,7 +1216,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where the processor's Frontend undersupplies its Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-fe\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-fe\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvFB;BvIO;Default;PGO;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_frontend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_frontend_bound &gt; 0.15",</div><div class='hunk'>@@ -1259,7 +1237,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1437,7 +1415,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Floating Point Operations Per Cycle",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "Flops;Ret",</div><div class='ctx'>         "MetricName": "tma_info_core_flopc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1578,7 +1556,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + cpu_core@FP_ARITH_INST_RETIRED.VECTOR@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith &lt; 10",</div><div class='hunk'>@@ -1587,7 +1565,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;FpVector;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_avx128",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_avx128 &lt; 10",</div><div class='hunk'>@@ -1596,7 +1574,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;FpVector;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_avx256",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_avx256 &lt; 10",</div><div class='hunk'>@@ -1605,7 +1583,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_INST_RETIRED.SCALAR_DOUBLE@",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_OPS_RETIRED.SCALAR_DOUBLE@",</div><div class='ctx'>         "MetricGroup": "Flops;FpScalar;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_scalar_dp",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_dp &lt; 10",</div><div class='hunk'>@@ -1614,7 +1592,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE@",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@FP_ARITH_OPS_RETIRED.SCALAR_SINGLE@",</div><div class='ctx'>         "MetricGroup": "Flops;FpScalar;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith_scalar_sp",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_sp &lt; 10",</div><div class='hunk'>@@ -1639,7 +1617,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",</div><div class='add'>+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_ipflop",</div><div class='ctx'>         "MetricThreshold": "tma_info_inst_mix_ipflop &lt; 10",</div><div class='hunk'>@@ -1694,7 +1672,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average per-thread data fill bandwidth to the L1 data cache [GB / sec]",</div><div class='del'>-        "MetricExpr": "64 * cpu_core@L1D.REPLACEMENT@ / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "64 * cpu_core@L1D.L1_REPLACEMENT@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW",</div><div class='ctx'>         "MetricName": "tma_info_memory_l1d_cache_fill_bw",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1707,6 +1685,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "L0 cache true misses per kilo instruction for retired demand loads",</div><div class='add'>+        "MetricExpr": "1e3 * (cpu_core@MEM_LOAD_RETIRED.L1_MISS@ + cpu_core@MEM_LOAD_RETIRED.L1_HIT_L1@) / cpu_core@INST_RETIRED.ANY@",</div><div class='add'>+        "MetricGroup": "CacheHits;Mem",</div><div class='add'>+        "MetricName": "tma_info_memory_l1dl0_mpki",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",</div><div class='ctx'>         "MetricExpr": "1e3 * cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / cpu_core@INST_RETIRED.ANY@",</div><div class='ctx'>         "MetricGroup": "CacheHits;Mem",</div><div class='hunk'>@@ -1922,6 +1907,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "cpu_core@IDQ.MS_UOPS@ / cpu_core@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@ASSISTS.ANY@",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1955,7 +1947,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc\\,cpu=cpu_core@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1969,14 +1961,22 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_core@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "32 * UNC_M_TOTAL_DATA / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='add'>+        "MetricName": "tma_info_system_dram_bw_use",</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='del'>-        "MetricExpr": "(cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_INST_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@) / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "(cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + 2 * cpu_core@FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE@ + 4 * cpu_core@FP_ARITH_OPS_RETIRED.4_FLOPS@ + 8 * cpu_core@FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE@) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Cor;Flops;HPC",</div><div class='ctx'>         "MetricName": "tma_info_system_gflops",</div><div class='ctx'>         "PublicDescription": "Giga Floating Point Operations Per Second. Aggregate across all supported options of: FP precisions, scalar and vector instructions, vector-width",</div><div class='hunk'>@@ -2021,6 +2021,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Socket actual clocks when any core is active on that socket",</div><div class='add'>+        "MetricExpr": "UNC_CLOCK.SOCKET",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "tma_info_system_socket_clks",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Run duration time in seconds",</div><div class='ctx'>         "MetricExpr": "duration_time",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='hunk'>@@ -2036,6 +2043,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Measured Average Uncore Frequency for the SoC [GHz]",</div><div class='add'>+        "MetricExpr": "tma_info_system_socket_clks / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "tma_info_system_uncore_frequency",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.THREAD@",</div><div class='ctx'>         "MetricGroup": "Pipeline",</div><div class='hunk'>@@ -2156,12 +2170,12 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='del'>-        "MetricExpr": "4 * cpu_core@DEPENDENT_LOADS.ANY@ / tma_info_thread_clks",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "MetricExpr": "4 * cpu_core@DEPENDENT_LOADS.ANY\\,cmask\\=1@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_UOPS_RETIRED.L1_HIT_PS",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_UOPS_RETIRED.L1_HIT_PS",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2177,7 +2191,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L2_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L2_HIT@R, 3 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -2198,12 +2211,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L3_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L3_HIT@R, 9 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2285,6 +2297,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ * cpu_core@MEM_INST_RETIRED.LOCK_LOADS@R / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -2295,7 +2308,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to LSD (Loop Stream Detector) unit",</div><div class='del'>-        "MetricExpr": "cpu_core@LSD.UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "cpu_core@LSD.UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / tma_info_thread_clks / 2",</div><div class='ctx'>         "MetricGroup": "FetchBW;LSD;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_lsd",</div><div class='ctx'>         "MetricThreshold": "tma_lsd &gt; 0.15 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2320,7 +2333,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2330,13 +2343,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -2347,7 +2360,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@MISC2_RETIRED.LFENCE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -2386,7 +2398,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the MITE pipeline (the legacy decode pipeline)",</div><div class='del'>-        "MetricExpr": "(cpu_core@IDQ.MITE_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.MITE_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(cpu_core@IDQ.MITE_UOPS\\,cmask\\=0x8\\,inv\\=0x1@ / 2 + cpu_core@IDQ.MITE_UOPS@ / (cpu_core@IDQ.DSB_UOPS@ + cpu_core@IDQ.MITE_UOPS@) * (cpu_core@IDQ_BUBBLES.STARVATION_CYCLES@ - cpu_core@IDQ_BUBBLES.FETCH_LATENCY@)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "DSBmiss;FetchBW;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_mite",</div><div class='ctx'>         "MetricThreshold": "tma_mite &gt; 0.1 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2406,7 +2418,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu_core@IDQ.MS_CYCLES_ANY@ / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "cpu_core@IDQ.MS_CYCLES_ANY@ / tma_info_thread_clks / 1.8",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2445,7 +2457,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='del'>-        "MetricExpr": "max(0, tma_light_operations - (tma_x87_use + (cpu_core@FP_ARITH_INST_RETIRED.SCALAR@ + cpu_core@FP_ARITH_INST_RETIRED.VECTOR@) / (tma_retiring * tma_info_thread_slots) + (cpu_core@INT_VEC_RETIRED.ADD_128@ + cpu_core@INT_VEC_RETIRED.VNNI_128@ + cpu_core@INT_VEC_RETIRED.ADD_256@ + cpu_core@INT_VEC_RETIRED.MUL_256@ + cpu_core@INT_VEC_RETIRED.VNNI_256@) / (tma_retiring * tma_info_thread_slots) + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "max(0, tma_light_operations - (tma_x87_use + (cpu_core@FP_ARITH_OPS_RETIRED.SCALAR@ + cpu_core@FP_ARITH_OPS_RETIRED.VECTOR@) / (tma_retiring * tma_info_thread_slots) + (cpu_core@INT_VEC_RETIRED.ADD_128@ + cpu_core@INT_VEC_RETIRED.VNNI_128@ + cpu_core@INT_VEC_RETIRED.ADD_256@ + cpu_core@INT_VEC_RETIRED.MUL_256@ + cpu_core@INT_VEC_RETIRED.VNNI_256@) / (tma_retiring * tma_info_thread_slots) + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='ctx'>         "MetricThreshold": "tma_other_light_ops &gt; 0.3 &amp; tma_light_operations &gt; 0.6",</div><div class='hunk'>@@ -2483,6 +2496,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ + (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@)) / tma_info_thread_clks if cpu_core@ARITH.DIV_ACTIVE@ &lt; cpu_core@CYCLE_ACTIVITY.STALLS_TOTAL@ - cpu_core@EXE_ACTIVITY.BOUND_ON_LOADS@ else (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2493,6 +2507,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2503,6 +2518,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2513,7 +2529,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.2_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2524,7 +2539,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.CYCLES_GE_3@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2545,7 +2559,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2576,7 +2590,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.PAUSE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2611,7 +2624,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2626,6 +2639,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric estimates clocks wasted due to loads blocked due to unknown store address (did not do memory disambiguation) or due to unknown store data",</div><div class='add'>+        "MetricExpr": "7 * cpu_core@LD_BLOCKS.STORE_EARLY\\,cmask\\=1@ / tma_info_thread_clks",</div><div class='add'>+        "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='add'>+        "MetricName": "tma_store_early_blk",</div><div class='add'>+        "MetricThreshold": "tma_store_early_blk &gt; 0.2",</div><div class='add'>+        "ScaleUnit": "100%",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@LD_BLOCKS.STORE_FORWARD@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/memory.json b/tools/perf/pmu-events/arch/x86/lunarlake/memory.json<br/>index 8021a1c7dd3b..caa387e10259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/memory.json</a></div><div class='hunk'>@@ -163,7 +163,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_1024",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x400",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "53",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -176,7 +176,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x80",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "1009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -189,7 +189,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x10",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -202,7 +202,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_2048",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x800",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "23",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -215,7 +215,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x100",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "503",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -228,7 +228,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x20",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -241,7 +241,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x4",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -254,7 +254,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x200",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "101",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -267,7 +267,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x40",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "2003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -280,7 +280,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency.",</div><div class='ctx'>         "SampleAfterValue": "50021",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -291,7 +291,7 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.STORE_SAMPLE",</div><div class='del'>-        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -352,7 +352,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by DRAM.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.DRAM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -376,7 +376,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were not supplied by the L3 cache and were supplied by the system memory (DRAM, MSC, or MMIO).",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -412,7 +412,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the L3 cache and were supplied by the system memory (DRAM, MSC, or MMIO).",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/other.json b/tools/perf/pmu-events/arch/x86/lunarlake/other.json<br/>index 59949f9541d8..164374edf293 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/other.json</a></div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -178,6 +178,7 @@</div><div class='ctx'>         "EventCode": "0xf4",</div><div class='ctx'>         "EventName": "XQ_PROMOTION.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json b/tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json<br/>index 6ac410510628..97797f7b072e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/pipeline.json</a></div><div class='hunk'>@@ -21,8 +21,9 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of active floating point and integer dividers per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_OCCUPANCY",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -30,8 +31,9 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of floating point and integer divider uops executed per cycle.",</div><div class='add'>+        "BriefDescription": "This event is deprecated.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "ARITH.DIV_UOPS",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='hunk'>@@ -110,7 +112,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -128,7 +130,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND",</div><div class='del'>-        "PublicDescription": "Counts conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x111",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -147,7 +149,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_NTAKEN",</div><div class='del'>-        "PublicDescription": "Counts not taken branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts not taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -166,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -176,7 +178,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN_BWD",</div><div class='del'>-        "PublicDescription": "Counts taken backward conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -186,7 +188,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND_TAKEN_FWD",</div><div class='del'>-        "PublicDescription": "Counts taken forward conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x102",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -205,7 +207,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.FAR_BRANCH",</div><div class='del'>-        "PublicDescription": "Counts far branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts far branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -224,7 +226,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT",</div><div class='del'>-        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -261,7 +263,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='del'>-        "PublicDescription": "Counts both direct and indirect near call instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both direct and indirect near call instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -280,13 +282,13 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_RETURN",</div><div class='del'>-        "PublicDescription": "Counts return instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts return instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Counts the number of taken branch instructions retired",</div><div class='add'>+        "BriefDescription": "Counts the number of near taken branch instructions retired",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='hunk'>@@ -299,7 +301,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -327,7 +329,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -336,7 +338,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES_COST",</div><div class='del'>-        "PublicDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x44",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -355,7 +357,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND",</div><div class='del'>-        "PublicDescription": "Counts mispredicted conditional branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts mispredicted conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x111",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -365,7 +367,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x151",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -384,7 +386,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_NTAKEN",</div><div class='del'>-        "PublicDescription": "Counts the number of conditional branch instructions retired that were mispredicted and the branch direction was not taken. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of conditional branch instructions retired that were mispredicted and the branch direction was not taken. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -394,7 +396,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_NTAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x50",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -413,7 +415,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts taken conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x101",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -423,7 +425,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD",</div><div class='del'>-        "PublicDescription": "Counts taken backward conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -433,7 +435,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD_COST",</div><div class='del'>-        "PublicDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x8001",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -443,7 +445,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x141",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -453,7 +455,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD",</div><div class='del'>-        "PublicDescription": "Counts taken forward conditional mispredicted branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -462,7 +464,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD_COST",</div><div class='del'>-        "PublicDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x8002",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -481,7 +483,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT",</div><div class='del'>-        "PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -500,7 +502,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_CALL",</div><div class='del'>-        "PublicDescription": "Counts retired mispredicted indirect (near taken) CALL instructions, including both register and memory indirect. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts retired mispredicted indirect (near taken) CALL instructions, including both register and memory indirect. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -510,7 +512,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_CALL_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x42",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -520,7 +522,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.INDIRECT_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xc0",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -548,7 +550,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.NEAR_TAKEN",</div><div class='del'>-        "PublicDescription": "Counts number of near branch instructions retired that were mispredicted and taken. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of near branch instructions retired that were mispredicted and taken. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -558,7 +560,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.NEAR_TAKEN_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x60",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -568,7 +570,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.RET",</div><div class='del'>-        "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -587,7 +589,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.RET_COST",</div><div class='del'>-        "PublicDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x48",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -906,7 +908,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.ANY_P",</div><div class='del'>-        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -915,7 +917,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.BR_FUSED",</div><div class='del'>-        "PublicDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon) Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -925,7 +927,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x30",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -935,7 +937,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -954,7 +956,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1024,6 +1026,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on secondary integer ports 0,1,2,3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.2ND",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of uops executed on all Integer ports.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='hunk'>@@ -1205,7 +1216,7 @@</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='del'>-        "UMask": "0x10",</div><div class='add'>+        "UMask": "0x1f",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1228,6 +1239,15 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of times a load got early blocked due to preceding store operation with unknown address or unknown data. Excluding in-line (immediate) wakeups",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.STORE_EARLY",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xa1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of occurrences a retired load gets blocked because its address partially overlaps with an older store (size mismatch) - unknown_sta/bad_forward",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='hunk'>@@ -1451,7 +1471,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xe4",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "LBR record is inserted Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "LBR record is inserted Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1605,6 +1625,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots where no uop could issue due to an IQ scoreboard that stalls allocation until a specified older uop retires or (in the case of jump scoreboard) executes. Commonly executed instructions with IQ scoreboards include LFENCE and MFENCE.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "SERIALIZATION.IQ_JEU_SCB",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of issue slots not consumed by the backend due to a micro-sequencer (MS) scoreboard, which stalls the front-end from issuing from the UROM until a specified older uop retires.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json<br/>new file mode 100644<br/>index 000000000000..69ef928d57f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/uncore-interconnect.json</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+[</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This 48-bit fixed counter counts the UCLK cycles.",</div><div class='add'>+        "Counter": "FIXED",</div><div class='add'>+        "EventCode": "0xff",</div><div class='add'>+        "EventName": "UNC_CLOCK.SOCKET",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "Unit": "SANTA"</div><div class='add'>+    }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json b/tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json<br/>index 7d63580302de..63c4aa2791e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/lunarlake/uncore-memory.json</a></div><div class='hunk'>@@ -32,5 +32,13 @@</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending  or receiving 32B chunk data.",</div><div class='add'>+        "Counter": "0,1,2,3,4",</div><div class='add'>+        "EventCode": "0x3C",</div><div class='add'>+        "EventName": "UNC_M_TOTAL_DATA",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "Unit": "iMC"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv<br/>index 354ce241500b..3d0c57198056 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/mapfile.csv?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/mapfile.csv</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/mapfile.csv?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/mapfile.csv</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> Family-model,Version,Filename,EventType</div><div class='del'>-GenuineIntel-6-(97|9A|B7|BA|BF),v1.31,alderlake,core</div><div class='del'>-GenuineIntel-6-BE,v1.31,alderlaken,core</div><div class='del'>-GenuineIntel-6-C[56],v1.09,arrowlake,core</div><div class='add'>+GenuineIntel-6-(97|9A|B7|BA|BF),v1.35,alderlake,core</div><div class='add'>+GenuineIntel-6-BE,v1.35,alderlaken,core</div><div class='add'>+GenuineIntel-6-C[56],v1.14,arrowlake,core</div><div class='ctx'> GenuineIntel-6-(1C|26|27|35|36),v5,bonnell,core</div><div class='ctx'> GenuineIntel-6-(3D|47),v30,broadwell,core</div><div class='ctx'> GenuineIntel-6-56,v12,broadwellde,core</div><div class='hunk'>@@ -9,28 +9,28 @@ GenuineIntel-6-4F,v23,broadwellx,core</div><div class='ctx'> GenuineIntel-6-55-[56789ABCDEF],v1.25,cascadelakex,core</div><div class='ctx'> GenuineIntel-6-DD,v1.00,clearwaterforest,core</div><div class='ctx'> GenuineIntel-6-9[6C],v1.05,elkhartlake,core</div><div class='del'>-GenuineIntel-6-CF,v1.14,emeraldrapids,core</div><div class='add'>+GenuineIntel-6-CF,v1.20,emeraldrapids,core</div><div class='ctx'> GenuineIntel-6-5[CF],v13,goldmont,core</div><div class='ctx'> GenuineIntel-6-7A,v1.01,goldmontplus,core</div><div class='del'>-GenuineIntel-6-B6,v1.09,grandridge,core</div><div class='del'>-GenuineIntel-6-A[DE],v1.10,graniterapids,core</div><div class='add'>+GenuineIntel-6-B6,v1.10,grandridge,core</div><div class='add'>+GenuineIntel-6-A[DE],v1.16,graniterapids,core</div><div class='ctx'> GenuineIntel-6-(3C|45|46),v36,haswell,core</div><div class='ctx'> GenuineIntel-6-3F,v29,haswellx,core</div><div class='ctx'> GenuineIntel-6-7[DE],v1.24,icelake,core</div><div class='del'>-GenuineIntel-6-6[AC],v1.28,icelakex,core</div><div class='add'>+GenuineIntel-6-6[AC],v1.30,icelakex,core</div><div class='ctx'> GenuineIntel-6-3A,v24,ivybridge,core</div><div class='ctx'> GenuineIntel-6-3E,v24,ivytown,core</div><div class='ctx'> GenuineIntel-6-2D,v24,jaketown,core</div><div class='ctx'> GenuineIntel-6-(57|85),v16,knightslanding,core</div><div class='del'>-GenuineIntel-6-BD,v1.14,lunarlake,core</div><div class='del'>-GenuineIntel-6-(AA|AC|B5),v1.14,meteorlake,core</div><div class='add'>+GenuineIntel-6-BD,v1.19,lunarlake,core</div><div class='add'>+GenuineIntel-6-(AA|AC|B5),v1.18,meteorlake,core</div><div class='ctx'> GenuineIntel-6-1[AEF],v4,nehalemep,core</div><div class='ctx'> GenuineIntel-6-2E,v4,nehalemex,core</div><div class='del'>-GenuineIntel-6-CC,v1.00,pantherlake,core</div><div class='add'>+GenuineIntel-6-CC,v1.02,pantherlake,core</div><div class='ctx'> GenuineIntel-6-A7,v1.04,rocketlake,core</div><div class='ctx'> GenuineIntel-6-2A,v19,sandybridge,core</div><div class='del'>-GenuineIntel-6-8F,v1.28,sapphirerapids,core</div><div class='del'>-GenuineIntel-6-AF,v1.11,sierraforest,core</div><div class='add'>+GenuineIntel-6-8F,v1.35,sapphirerapids,core</div><div class='add'>+GenuineIntel-6-AF,v1.13,sierraforest,core</div><div class='ctx'> GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core</div><div class='ctx'> GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v59,skylake,core</div><div class='ctx'> GenuineIntel-6-55-[01234],v1.37,skylakex,core</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/cache.json b/tools/perf/pmu-events/arch/x86/meteorlake/cache.json<br/>index 82b115183924..d3fc04b2ffbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/cache.json</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L1D.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.REPLACEMENT",</div><div class='del'>-        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -34,7 +33,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -46,7 +45,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL_PERIODS",</div><div class='del'>-        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -56,7 +55,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALLS",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -66,7 +65,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING",</div><div class='del'>-        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -77,7 +76,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts duration of L1D miss outstanding in cycles. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -87,7 +86,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.ALL",</div><div class='del'>-        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -147,7 +146,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -167,7 +166,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -177,7 +176,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='del'>-        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -187,7 +186,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.ALL",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -206,7 +205,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.HIT",</div><div class='del'>-        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_RQSTS.HIT] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_RQSTS.HIT]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xdf",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -225,7 +224,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -244,7 +243,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the total number of L2 code requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of L2 code requests.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -254,7 +253,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -264,7 +263,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x27",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -274,7 +273,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts demand requests to L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests to L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -284,7 +283,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_HWPF",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.ALL_HWPF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xf0",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -294,7 +292,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_RFO",</div><div class='del'>-        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -304,7 +302,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -314,7 +312,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts L2 cache misses when fetching instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x24",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -324,7 +322,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -334,7 +332,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -344,7 +342,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HIT",</div><div class='del'>-        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_REQUEST.HIT] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that hit L2 cache. [This event is alias to L2_REQUEST.HIT]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xdf",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -354,7 +352,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x30",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -364,7 +361,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -374,7 +371,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -384,7 +381,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_HIT",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -394,7 +391,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_MISS",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x22",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -404,7 +401,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_HIT",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -414,7 +411,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_MISS",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x28",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -424,7 +421,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x23",</div><div class='ctx'>         "EventName": "L2_TRANS.L2_WB",</div><div class='del'>-        "PublicDescription": "Counts L2 writebacks that access L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 writebacks that access L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -434,7 +431,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x42",</div><div class='ctx'>         "EventName": "LOCK_CYCLES.CACHE_LOCK_DURATION",</div><div class='del'>-        "PublicDescription": "This event counts the number of cycles when the L1D is locked. It is a superset of the 0x1 mask (BUS_LOCK_CLOCKS.BUS_LOCK_DURATION). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts the number of cycles when the L1D is locked. It is a superset of the 0x1 mask (BUS_LOCK_CLOCKS.BUS_LOCK_DURATION).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -454,7 +451,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -474,7 +471,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4f",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -695,7 +692,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x43",</div><div class='ctx'>         "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",</div><div class='del'>-        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfd",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -947,7 +944,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x44",</div><div class='ctx'>         "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "MEM_STORE_RETIRED.L2_HIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1177,12 +1173,36 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe5",</div><div class='ctx'>         "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_M.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x3F803C0008",</div><div class='add'>+        "PublicDescription": "Counts writebacks of modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_NONM.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x3F803C1000",</div><div class='add'>+        "PublicDescription": "Counts writebacks of non-modified cachelines that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -1399,11 +1419,23 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x3F803C4477",</div><div class='add'>+        "PublicDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Any memory transaction that reached the SQ.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='del'>-        "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc.. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1413,7 +1445,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1423,7 +1455,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1433,7 +1465,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1443,7 +1475,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1454,7 +1486,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1465,7 +1497,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1476,7 +1508,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 outstanding demand data read request is pending. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1487,7 +1518,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1497,7 +1528,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1507,7 +1537,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1517,7 +1547,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1527,7 +1557,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1537,7 +1567,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2c",</div><div class='ctx'>         "EventName": "SQ_MISC.BUS_LOCK",</div><div class='del'>-        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1547,7 +1577,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xf",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1557,7 +1586,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1567,7 +1596,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHW instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1577,7 +1606,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1587,7 +1616,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json b/tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json<br/>index ae9778aa755b..28dc5e06ee31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/floating-point.json</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the floating point divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -25,7 +24,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.FP",</div><div class='del'>-        "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -35,7 +34,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='del'>-        "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -45,7 +43,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -55,7 +52,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -65,7 +61,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_5",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -75,7 +70,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -85,7 +79,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -95,7 +88,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -105,7 +97,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -115,7 +107,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -125,7 +117,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -135,7 +127,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -145,7 +137,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x18",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -155,7 +147,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -165,7 +157,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -175,7 +167,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -185,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.VECTOR",</div><div class='del'>-        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/frontend.json b/tools/perf/pmu-events/arch/x86/meteorlake/frontend.json<br/>index 82727022efb6..6484834b1127 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/frontend.json</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x60",</div><div class='ctx'>         "EventName": "BACLEARS.ANY",</div><div class='del'>-        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.LCP",</div><div class='del'>-        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.MS_BUSY",</div><div class='del'>-        "PublicDescription": "Cycles the Microcode Sequencer is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -44,7 +43,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='ctx'>         "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='del'>-        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -405,7 +404,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -417,7 +416,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='del'>-        "PublicDescription": "ICACHE_DATA.STALL_PERIODS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -427,7 +425,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x83",</div><div class='ctx'>         "EventName": "ICACHE_TAG.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -438,7 +436,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -449,7 +447,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -459,7 +457,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -470,7 +468,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -481,7 +479,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -491,7 +489,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -502,7 +500,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -514,7 +512,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_SWITCHES",</div><div class='del'>-        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -524,7 +522,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -534,7 +532,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CORE",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that when no operation was delivered to the back-end pipeline due to instruction fetch limitations when the back-end could have accepted more operations. Common examples include instruction cache misses or x86 instruction decode limitations. The count may be distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Frontend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that when no operation was delivered to the back-end pipeline due to instruction fetch limitations when the back-end could have accepted more operations. Common examples include instruction cache misses or x86 instruction decode limitations. The count may be distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Frontend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -545,7 +543,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -557,7 +555,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -567,7 +565,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -578,7 +576,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -590,7 +588,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/memory.json b/tools/perf/pmu-events/arch/x86/meteorlake/memory.json<br/>index 17b94f810d5a..f0cbeda4d5ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/memory.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -16,7 +15,6 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -90,7 +88,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='del'>-        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -101,7 +99,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -112,7 +109,6 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -123,7 +119,7 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -134,7 +130,7 @@</div><div class='ctx'>         "CounterMask": "9",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -411,7 +407,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts demand data read requests that miss the L3 cache. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -422,7 +417,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -432,7 +427,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json b/tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json<br/>index 0088be169f9b..948c16a1f95b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/mtl-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -541,7 +541,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_atom@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -748,7 +748,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-be\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -787,11 +787,20 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -799,23 +808,14 @@</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: ",</div><div class='del'>-        "Unit": "cpu_core"</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20",</div><div class='hunk'>@@ -823,7 +823,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + cpu_core@RS.EMPTY_RESOURCE@ / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -859,7 +859,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -876,7 +876,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-br\\-mispredict@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -1007,7 +1007,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@R, 24 * tma_info_system_core_frequency) + cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD@ * min(cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD@R, 25 * tma_info_system_core_frequency) * (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ / (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ + cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD@))) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -1124,7 +1123,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1253,7 +1252,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-heavy\\-ops@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1923,7 +1922,7 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.THREAD@ / (cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@ / 2 if #SMT_on else cpu_core@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute",</div><div class='hunk'>@@ -1984,7 +1983,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc\\,cpu=cpu_core@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1998,7 +1997,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / TSC",</div><div class='add'>+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / msr@tsc\\,cpu=cpu_core@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -2008,7 +2007,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_HAC_ARB_TRK_REQUESTS.ALL + UNC_HAC_ARB_COH_TRK_REQUESTS.ALL) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -2095,6 +2094,13 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Measured Average Uncore Frequency for the SoC [GHz]",</div><div class='add'>+        "MetricExpr": "tma_info_system_socket_clks / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricGroup": "SoC",</div><div class='add'>+        "MetricName": "tma_info_system_uncore_frequency",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.THREAD@",</div><div class='ctx'>         "MetricGroup": "Pipeline",</div><div class='hunk'>@@ -2213,12 +2219,12 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (cpu_core@MEM_INST_RETIRED.ALL_LOADS@ - cpu_core@MEM_LOAD_RETIRED.FB_HIT@ - cpu_core@MEM_LOAD_RETIRED.L1_MISS@) * 20 / 100, max(cpu_core@CYCLE_ACTIVITY.CYCLES_MEM_ANY@ - cpu_core@MEMORY_ACTIVITY.CYCLES_L1D_MISS@, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2234,7 +2240,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L2_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L2_HIT@R, 3 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -2255,12 +2260,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_LOAD_RETIRED.L3_HIT@ * min(cpu_core@MEM_LOAD_RETIRED.L3_HIT@R, 9 * tma_info_system_core_frequency) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2342,6 +2346,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ * cpu_core@MEM_INST_RETIRED.LOCK_LOADS@R / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -2377,7 +2382,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -2387,13 +2392,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-mem\\-bound@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "Backend;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -2404,7 +2409,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * cpu_core@MISC2_RETIRED.LFENCE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -2463,7 +2467,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "max(cpu_core@IDQ.MS_CYCLES_ANY@, cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@ / (cpu_core@UOPS_RETIRED.SLOTS@ / cpu_core@UOPS_ISSUED.ANY@)) / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "max(cpu_core@IDQ.MS_CYCLES_ANY@, cpu_core@UOPS_RETIRED.MS\\,cmask\\=1@ / (cpu_core@UOPS_RETIRED.SLOTS@ / cpu_core@UOPS_ISSUED.ANY@)) / tma_info_core_core_clks / 2.4",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2502,6 +2506,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -2570,6 +2575,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@)) / tma_info_thread_clks if cpu_core@ARITH.DIV_ACTIVE@ &lt; cpu_core@CYCLE_ACTIVITY.STALLS_TOTAL@ - cpu_core@EXE_ACTIVITY.BOUND_ON_LOADS@ else (cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ + tma_retiring * cpu_core@EXE_ACTIVITY.2_3_PORTS_UTIL@) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2580,6 +2586,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "max(cpu_core@EXE_ACTIVITY.EXE_BOUND_0_PORTS@ - cpu_core@RESOURCE_STALLS.SCOREBOARD@, 0) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2590,6 +2597,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2600,7 +2608,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@EXE_ACTIVITY.2_PORTS_UTIL@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2611,7 +2618,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@UOPS_EXECUTED.CYCLES_GE_3@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2632,7 +2638,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "cpu_core@topdown\\-retiring@ / (cpu_core@topdown\\-fe\\-bound@ + cpu_core@topdown\\-bad\\-spec@ + cpu_core@topdown\\-retiring@ + cpu_core@topdown\\-be\\-bound@)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2663,7 +2669,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.PAUSE@ / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2698,7 +2703,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/other.json b/tools/perf/pmu-events/arch/x86/meteorlake/other.json<br/>index cb21bb933617..8320ffd83c51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/other.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.HARDWARE",</div><div class='del'>-        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists. the event also counts for Machine Ordering count.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.PAGE_FAULT",</div><div class='del'>-        "PublicDescription": "ASSISTS.PAGE_FAULT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -83,7 +82,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x2d",</div><div class='ctx'>         "EventName": "XQ.FULL_CYCLES",</div><div class='del'>-        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json b/tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json<br/>index 22b25708e799..bfdaabe9377d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/pipeline.json</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.IDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the integer divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -36,7 +35,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1b",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -44,6 +43,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the total number of branch instructions retired for all branch types.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL012, MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='ctx'>         "PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP) of the processor is resteered due to a branch instruction and the branch instruction successfully retires.  All branch type instructions are accounted for.",</div><div class='hunk'>@@ -62,6 +62,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of retired JCC (Jump on Conditional Code) branch instructions retired, includes both taken and not taken branches.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.COND",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -110,6 +111,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of far branch instructions retired, includes far jump, far call and return, and interrupt call and return.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.FAR_BRANCH",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -129,6 +131,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -148,6 +151,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.INDIRECT_CALL",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -167,6 +171,7 @@</div><div class='ctx'>         "BriefDescription": "This event is deprecated. Refer to new event BR_INST_RETIRED.INDIRECT_CALL",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "Deprecated": "1",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.IND_CALL",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -176,6 +181,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near CALL branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL012, MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -214,6 +220,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of near taken branch instructions retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Errata": "MTL013",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='hunk'>@@ -484,7 +491,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -494,7 +501,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -504,7 +511,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x70",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -530,7 +537,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -540,7 +547,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",</div><div class='ctx'>         "SampleAfterValue": "25003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -550,7 +557,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -562,7 +568,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE_INST Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -572,7 +577,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -589,7 +594,7 @@</div><div class='ctx'>         "BriefDescription": "Reference cycles when the core is not in halt state.",</div><div class='ctx'>         "Counter": "Fixed counter 2",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -609,7 +614,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -626,7 +631,7 @@</div><div class='ctx'>         "BriefDescription": "Core cycles when the thread is not in halt state",</div><div class='ctx'>         "Counter": "Fixed counter 1",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -644,7 +649,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='hunk'>@@ -654,7 +659,6 @@</div><div class='ctx'>         "CounterMask": "8",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -665,7 +669,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -676,7 +679,6 @@</div><div class='ctx'>         "CounterMask": "16",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='del'>-        "PublicDescription": "Cycles while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -687,7 +689,6 @@</div><div class='ctx'>         "CounterMask": "12",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -698,7 +699,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -709,7 +709,6 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='del'>-        "PublicDescription": "Total execution stalls. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -719,7 +718,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -729,7 +728,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -739,7 +737,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -749,7 +747,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -759,7 +757,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -770,7 +768,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='del'>-        "PublicDescription": "Execution stalls while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x21",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -781,7 +778,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='del'>-        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -791,7 +788,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='del'>-        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -801,7 +798,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='ctx'>         "EventName": "INST_DECODED.DECODERS",</div><div class='del'>-        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -846,7 +843,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -856,7 +852,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -875,7 +871,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -887,7 +883,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -897,7 +893,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='del'>-        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -907,7 +903,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -919,7 +915,6 @@</div><div class='ctx'>         "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x7",</div><div class='del'>-        "PublicDescription": "Bubble cycles of BAClear (Unknown Branch). Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -929,7 +924,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.UOP_DROPPING",</div><div class='del'>-        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -939,7 +934,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.128BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x13",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -949,7 +943,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.256BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xac",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -959,7 +952,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -969,7 +962,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -979,7 +972,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.MUL_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -989,7 +981,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.SHUFFLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -999,7 +990,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_128 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1009,7 +999,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1028,7 +1017,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='del'>-        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1047,7 +1036,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.NO_SR",</div><div class='del'>-        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x88",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1066,7 +1055,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='del'>-        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1076,7 +1065,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x4c",</div><div class='ctx'>         "EventName": "LOAD_HIT_PREFETCH.SWPF",</div><div class='del'>-        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1087,7 +1076,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1098,7 +1087,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1108,7 +1097,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1128,7 +1117,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of machine clears (nukes) of any type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1184,7 +1173,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.SMC",</div><div class='del'>-        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1194,7 +1183,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe0",</div><div class='ctx'>         "EventName": "MISC2_RETIRED.LFENCE",</div><div class='del'>-        "PublicDescription": "number of LFENCE retired instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1213,7 +1202,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcc",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1223,7 +1212,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SB",</div><div class='del'>-        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1233,7 +1222,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SCOREBOARD",</div><div class='del'>-        "PublicDescription": "Counts cycles where the pipeline is stalled due to serializing operations. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1243,7 +1231,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1256,7 +1244,7 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1266,7 +1254,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_RESOURCE",</div><div class='del'>-        "PublicDescription": "Cycles when RS was empty and a resource allocation stall is asserted Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1285,7 +1272,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution units limitations, or other conditions. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Backend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution units limitations, or other conditions. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core, in processors that support Intel Hyper-Threading Technology. Software can use this event as the numerator for the Backend Bound metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1295,7 +1282,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1305,7 +1292,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1315,7 +1302,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "TOPDOWN.MEMORY_BOUND_SLOTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1324,7 +1310,7 @@</div><div class='ctx'>         "BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",</div><div class='ctx'>         "Counter": "Fixed counter 3",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS",</div><div class='del'>-        "PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1334,7 +1320,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS_P",</div><div class='del'>-        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1591,7 +1577,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x76",</div><div class='ctx'>         "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='del'>-        "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1601,7 +1587,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 0.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1611,7 +1597,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 1. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 1.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1621,7 +1607,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_2_3_10",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1631,7 +1617,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_4_9",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1641,7 +1627,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_5_11",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1651,7 +1637,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_6",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 6. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 6.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1661,7 +1647,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_7_8",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1671,7 +1657,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops executed from any thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed from any thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1682,7 +1668,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1693,7 +1679,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1704,7 +1690,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1715,7 +1701,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1726,7 +1712,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 uop was executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1737,7 +1723,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Cycles where at least 2 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1748,7 +1734,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Cycles where at least 3 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1759,7 +1745,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Cycles where at least 4 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1771,7 +1757,7 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1781,7 +1767,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of uops to be executed per-thread each cycle. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1791,7 +1776,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.X87",</div><div class='del'>-        "PublicDescription": "Counts the number of x87 uops executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1810,7 +1795,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1821,7 +1806,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.CYCLES",</div><div class='del'>-        "PublicDescription": "UOPS_ISSUED.CYCLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1840,7 +1824,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.CYCLES",</div><div class='del'>-        "PublicDescription": "Counts cycles where at least one uop has retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1850,7 +1834,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.HEAVY",</div><div class='del'>-        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1880,7 +1864,6 @@</div><div class='ctx'>         "EventName": "UOPS_RETIRED.MS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "UOPS_RETIRED.MS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1890,7 +1873,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.SLOTS",</div><div class='del'>-        "PublicDescription": "This event counts a subset of the Topdown Slots event that are utilized by operations that eventually get retired (committed) by the processor pipeline. Usually, this event positively correlates with higher performance  for example, as measured by the instructions-per-cycle metric. Software can use this event as the numerator for the Retiring metric (or top-level category) of the Top-down Microarchitecture Analysis method. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts a subset of the Topdown Slots event that are utilized by operations that eventually get retired (committed) by the processor pipeline. Usually, this event positively correlates with higher performance  for example, as measured by the instructions-per-cycle metric. Software can use this event as the numerator for the Retiring metric (or top-level category) of the Top-down Microarchitecture Analysis method.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -1902,7 +1885,7 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event counts cycles without actually retired uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json b/tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json<br/>index f300129e9e2d..305b96b26a4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/meteorlake/virtual-memory.json</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -93,7 +93,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -113,7 +113,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -143,7 +143,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -162,7 +162,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -172,7 +172,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -192,7 +192,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -212,7 +212,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -232,7 +232,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -260,7 +260,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -271,7 +271,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -291,7 +291,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -311,7 +311,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -331,7 +331,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -351,7 +351,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/cache.json b/tools/perf/pmu-events/arch/x86/pantherlake/cache.json<br/>index c84f3d9fdb10..91f5ab908926 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/cache.json</a></div><div class='hunk'>@@ -1,5 +1,136 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines replaced in L0 data cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "L1D.L0_REPLACEMENT",</div><div class='add'>+        "PublicDescription": "Counts L0 data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cachelines replaced into the L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "L1D.L1_REPLACEMENT",</div><div class='add'>+        "PublicDescription": "Counts cachelines replaced into the L1 d-cache.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cachelines replaced into the L0 and L1 d-cache. Successful replacements only (not blocked) and exclude WB-miss case",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x51",</div><div class='add'>+        "EventName": "L1D.REPLACEMENT",</div><div class='add'>+        "PublicDescription": "Counts cachelines replaced into the L0 and L1 d-cache.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x5",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "L1D_MISS.FB_FULL",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 resources.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "L1D_MISS.L2_STALLS",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of demand requests that missed L1D cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "L1D_MISS.LOAD",</div><div class='add'>+        "PublicDescription": "Count occurrences (rising-edge) of DCACHE_PENDING sub-event0. Impl. sends per-port binary inc-bit the occupancy increases* (at FB alloc or promotion).",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of L1D misses that are outstanding",</div><div class='add'>+        "Counter": "2",</div><div class='add'>+        "EventCode": "0x48",</div><div class='add'>+        "EventName": "L1D_PENDING.LOAD",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles with L1D load Misses outstanding.",</div><div class='add'>+        "Counter": "2",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x48",</div><div class='add'>+        "EventName": "L1D_PENDING.LOAD_CYCLES",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L2 cache lines filling L2",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x25",</div><div class='add'>+        "EventName": "L2_LINES_IN.E",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state. Counts on a per core basis.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Modified cache lines that are evicted by L2 cache when triggered by an L2 cache fill.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x26",</div><div class='add'>+        "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x26",</div><div class='add'>+        "EventName": "L2_LINES_OUT.SILENT",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cache lines that have been L2 hardware prefetched but not used by demand accesses",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x26",</div><div class='add'>+        "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of L2 cache accesses from front door requests for Code Read, Data Read, RFO, ITOM, and L2 Prefetches. Does not include rejects or recycles, per core event.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='hunk'>@@ -9,6 +140,35 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "All accesses to L2 cache [This event is alias to L2_RQSTS.REFERENCES, L2_RQSTS.ANY]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.ALL",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES, L2_RQSTS.ANY]",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of L2 cache accesses from front door requests that resulted in a Hit. Does not include rejects or recycles, per core event.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1bf",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Read requests with true-miss in L2 cache [This event is alias to L2_RQSTS.MISS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_REQUEST.MISS",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x3f",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "L2 code requests",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='hunk'>@@ -29,6 +189,106 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "All accesses to L2 cache [This event is alias to L2_RQSTS.REFERENCES, L2_REQUEST.ALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.ANY",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES, L2_REQUEST.ALL]",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L2 cache hits when fetching instructions, code reads.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x44",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "L2 cache misses when fetching instructions",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x24",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Demand Data Read requests that hit L2 cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x41",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Demand Data Read miss L2 cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x21",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Read requests with true-miss in L2 cache [This event is alias to L2_REQUEST.MISS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.MISS",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x3f",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "All accesses to L2 cache [This event is alias to L2_REQUEST.ALL,L2_RQSTS.ANY]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.REFERENCES",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL,L2_RQSTS.ANY]",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "RFO requests that hit L2 cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.RFO_HIT",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x42",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "RFO requests that miss L2 cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x24",</div><div class='add'>+        "EventName": "L2_RQSTS.RFO_MISS",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x22",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when L1D is locked",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x42",</div><div class='add'>+        "EventName": "LOCK_CYCLES.CACHE_LOCK_DURATION",</div><div class='add'>+        "PublicDescription": "This event counts the number of cycles when the L1D is locked.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cacheable memory requests that miss in the LLC. Counts on a per core basis.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='hunk'>@@ -69,12 +329,76 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to an L1 demand load miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the core is stalled due to a demand load which hit in the L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.L2_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles a core is stalled due to a demand load which hit in the L2 cache.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles the core is stalled due to a demand load which hit in the L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.L2_MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7e",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which hit in the LLC.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.LLC_HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x6",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which missed all the local caches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.LLC_MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x38",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which missed all the caches.  DRAM, MMIO or other LOCAL memory type provides the data.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.LLC_MISS_LOCALMEM",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which missed all the caches, a snoop was required, and hits in other core or module on same die.  Another core provides the data with a fwd, no fwd, or hitM.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.LLC_MISS_OTHERMOD",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts all retired load instructions.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_LOADS",</div><div class='del'>-        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Instructions with at least one architecturally visible load retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x81",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -85,16 +409,462 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_INST_RETIRED.ALL_STORES",</div><div class='del'>-        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired store instructions. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired software prefetch instructions.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.ALL_SWPF",</div><div class='add'>+        "PublicDescription": "Counts all retired software prefetch instructions. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x84",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "All retired memory instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.ANY",</div><div class='add'>+        "PublicDescription": "Counts all retired memory instructions - loads and stores. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x87",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions with locked access.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.LOCK_LOADS",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with locked access. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x21",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions that split across a cacheline boundary.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.SPLIT_LOADS",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x41",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired store instructions that split across a cacheline boundary.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.SPLIT_STORES",</div><div class='add'>+        "PublicDescription": "Counts retired store instructions that split across a cacheline boundary. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x42",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_ANY",</div><div class='add'>+        "PublicDescription": "Number of retired instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xf",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_LOADS",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions with a clean hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x9",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired store instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_STORES",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xa",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_HIT_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that hit in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_ANY",</div><div class='add'>+        "PublicDescription": "Number of retired instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x17",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",</div><div class='add'>+        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x11",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired store instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",</div><div class='add'>+        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired SWPF instructions that miss the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_INST_RETIRED.STLB_MISS_SWPF",</div><div class='add'>+        "PublicDescription": "Number of retired SWPF instructions that (start a) miss in the 2nd-level TLB (STLB). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x14",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$)",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd2",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were a cross-core Snoop hits and forwards data from an in on-package core cache (induced by NI$) Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "20011",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd2",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were HitM responses from shared L3, Hit-with-FWD is normally excluded. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "20011",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd2",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",</div><div class='add'>+        "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "20011",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd2",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "20011",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions which data source is memory side cache.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_L3_MISS_RETIRED.MEMSIDE_CACHE",</div><div class='add'>+        "PublicDescription": "Retired load instructions which data source is memory side cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd4",</div><div class='add'>+        "EventName": "MEM_LOAD_MISC_RETIRED.UC",</div><div class='add'>+        "PublicDescription": "Retired instructions with at least one load to uncacheable memory-type, or at least one cache-line split locked access (Bus Lock). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of completed demand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be brought into L1, but data is not yet ready in L1.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.FB_HIT",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop was load missed in L1 but hit FB (Fill Buffers) due to preceding miss to the same cache line with data not ready. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions with L1 cache hits as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x101",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L1_HIT_L0",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 0 of the L1 data cache. This event includes all SW prefetches and lock instructions regardless of the data source. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L1_HIT_L1",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the Level 1 of the L1 data cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions missed L1 cache as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L1_MISS",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L1 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions with L2 cache hits as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L2_HIT",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with L2 cache hits as data sources. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions missed L2 cache as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L2_MISS",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions missed L2 cache as data sources. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100021",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions with L3 cache hits as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L3_HIT",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that hit in the L3 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100021",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired load instructions missed L3 cache as data sources",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "Data_LA": "1",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_RETIRED.L3_MISS",</div><div class='add'>+        "PublicDescription": "Counts retired load instructions with at least one uop that missed in the L3 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "50021",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in DRAM",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that miss the L3 cache and hit in DRAM Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in memside cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.MEMSIDE_CACHE",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that miss the L3 cache and hit in memside cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that hit in the L3 cache in which a snoop was required and modified data was forwarded.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd4",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_MISC_RETIRED.L3_HIT_SNOOP_HITM",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that hit in the L3 cache in which a snoop was required and modified data was forwarded. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that hit the L1 data cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that hit the L1 data cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss in the L1 data cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L1_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that miss in the L1 data cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that hit in the L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L2_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that hit in the L2 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss in the L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L2_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that miss in the L2 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that hit in the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd1",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_RETIRED.L3_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that hit in the L3 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1c",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that uops are blocked for any of the following reasons:  load buffer, store buffer or RSV full.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x04",</div><div class='add'>+        "EventName": "MEM_SCHEDULER_BLOCK.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that uops are blocked due to a load buffer full condition.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x04",</div><div class='add'>+        "EventName": "MEM_SCHEDULER_BLOCK.LD_BUF",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that uops are blocked due to an RSV full condition.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x04",</div><div class='add'>+        "EventName": "MEM_SCHEDULER_BLOCK.RSV",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that uops are blocked due to a store buffer full condition.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x04",</div><div class='add'>+        "EventName": "MEM_SCHEDULER_BLOCK.ST_BUF",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "MEM_STORE_RETIRED.L2_HIT",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x44",</div><div class='add'>+        "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of cache-lines required by retired stores whose Data Source is: Memory Side Cache",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x44",</div><div class='add'>+        "EventName": "MEM_STORE_RETIRED.MEMSIDE_CACHE",</div><div class='add'>+        "SampleAfterValue": "100021",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of memory uops retired.  A single uop that performs both a load AND a store will be counted as 1, not 2 (e.g. ADD [mem], CONST).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of memory uops retired.  A single uop that performs both a load AND a store will be counted as 1, not 2 (e.g. ADD [mem], CONST). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x83",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load ops retired.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.ALL_LOADS",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x81",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='hunk'>@@ -104,130 +874,246 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.ALL_STORES",</div><div class='add'>+        "PublicDescription": "Counts the number of store ops retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x82",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_1024",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x400",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x80",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x10",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_2048",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x800",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x100",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x20",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x4",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x200",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x40",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled.",</div><div class='del'>-        "Counter": "0,1",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='add'>+        "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold defined in MEC_CR_PEBS_LD_LAT_THRESHOLD - Only counts with PEBS enabled. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of load uops retired that performed one or more locks",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.LOCK_LOADS",</div><div class='add'>+        "PublicDescription": "Counts the number of load uops retired that performed one or more locks Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x21",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of memory uops retired that were splits.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.SPLIT",</div><div class='add'>+        "PublicDescription": "Counts the number of memory uops retired that were splits. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x43",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired split load uops.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.SPLIT_LOADS",</div><div class='add'>+        "PublicDescription": "Counts the number of retired split load uops. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x41",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired split store uops.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.SPLIT_STORES",</div><div class='add'>+        "PublicDescription": "Counts the number of retired split store uops. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x42",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of memory uops retired that missed in the second level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of memory uops retired that missed in the second level TLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x13",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load uops retired that miss in the second Level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS_LOADS",</div><div class='add'>+        "PublicDescription": "Counts the number of load uops retired that miss in the second Level TLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x11",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of store uops retired that miss in the second level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd0",</div><div class='add'>+        "EventName": "MEM_UOPS_RETIRED.STLB_MISS_STORES",</div><div class='add'>+        "PublicDescription": "Counts the number of store uops retired that miss in the second level TLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of  stores uops retired same as MEM_UOPS_RETIRED.ALL_STORES",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd0",</div><div class='ctx'>         "EventName": "MEM_UOPS_RETIRED.STORE_LATENCY",</div><div class='add'>+        "PublicDescription": "Counts the number of  stores uops retired same as MEM_UOPS_RETIRED.ALL_STORES Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Retired memory uops for any access",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe5",</div><div class='add'>+        "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xf",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts writebacks of modified cachelines that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_M.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E00008",</div><div class='add'>+        "PublicDescription": "Counts writebacks of modified cachelines that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts writebacks of non-modified cachelines that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.COREWB_NONM.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E01000",</div><div class='add'>+        "PublicDescription": "Counts writebacks of non-modified cachelines that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -241,7 +1127,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -252,6 +1138,30 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x40001E00001",</div><div class='add'>+        "PublicDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches which forwarded the unmodified data to the requesting core.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x20001E00001",</div><div class='add'>+        "PublicDescription": "Counts demand data reads that were supplied by the L3 cache where a snoop hit in another cores caches which forwarded the unmodified data to the requesting core. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -265,7 +1175,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -274,5 +1184,230 @@</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x40001E00002",</div><div class='add'>+        "PublicDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by the L3 cache where a snoop hit in another cores caches, data forwarding is required as the data is modified. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that were supplied by the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.READS_TO_CORE.L3_HIT",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x7E001E04477",</div><div class='add'>+        "PublicDescription": "Counts all data read, code read, RFO and ITOM requests including demands and prefetches to the core caches (L1 or L2) that were supplied by the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Any memory transaction that reached the SQ.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='add'>+        "PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Demand and prefetch data reads",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cacheable and Non-Cacheable code read requests",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and Non-Cacheable code read requests.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Demand Data Read requests sent to uncore",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='add'>+        "PublicDescription": "Counts cycles when offcore outstanding cacheable Core Data Read transactions are present in the super queue. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where at least 1 outstanding demand data read request is pending.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles with offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding demand rfo Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Store Read transactions pending for off-core. Highly correlated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO",</div><div class='add'>+        "PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts bus locks, accounts for cache line split locks and UC locks.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2c",</div><div class='add'>+        "EventName": "SQ_MISC.BUS_LOCK",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x40",</div><div class='add'>+        "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xf",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of PREFETCHNTA instructions executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x40",</div><div class='add'>+        "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of PREFETCHW instructions executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x40",</div><div class='add'>+        "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of PREFETCHT0 instructions executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x40",</div><div class='add'>+        "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x40",</div><div class='add'>+        "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to an icache miss",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.ICACHE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/counter.json b/tools/perf/pmu-events/arch/x86/pantherlake/counter.json<br/>index 69f158a97707..432b6946ccbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/counter.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/counter.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/counter.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/counter.json</a></div><div class='hunk'>@@ -1,12 +1,17 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "Unit": "cpu_atom",</div><div class='del'>-        "CountersNumFixed": "3",</div><div class='del'>-        "CountersNumGeneric": "39"</div><div class='add'>+        "CountersNumFixed": "7",</div><div class='add'>+        "CountersNumGeneric": "8"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "Unit": "cpu_core",</div><div class='ctx'>         "CountersNumFixed": "4",</div><div class='ctx'>         "CountersNumGeneric": "10"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "Unit": "iMC",</div><div class='add'>+        "CountersNumFixed": "0",</div><div class='add'>+        "CountersNumGeneric": "5"</div><div class='ctx'>     }</div><div class='ctx'> ]
\ No newline at end of file</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json b/tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json<br/>new file mode 100644<br/>index 000000000000..e306a45b22ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/floating-point.json</a></div><div class='hunk'>@@ -0,0 +1,359 @@</div><div class='add'>+[</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when floating-point divide unit is busy executing divide or square root operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xb0",</div><div class='add'>+        "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for floating-point operations only.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts all microcode FP assists.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc1",</div><div class='add'>+        "EventName": "ASSISTS.FP",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "ASSISTS.SSE_AVX_MIX",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc1",</div><div class='add'>+        "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of FP-arith-uops dispatched on 1st VEC port (port 0). FP-arith-uops are of type ADD* / SUB* / MUL / FMA* / DPP.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of FP-arith-uops dispatched on 2nd VEC port (port 1)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of FP-arith-uops dispatched on 3rd VEC port (port 5)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of FP-arith-uops dispatched on 4th VEC port",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "FP_ARITH_DISPATCHED.V3",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.256B_PACKED_DOUBLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.256B_PACKED_SINGLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, 1 for each element.  Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.4_FLOPS",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x18",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of SSE/AVX computational scalar floating-point instructions retired; some instructions will count twice as noted below.  Applies to SSE* and AVX* scalar, double and single precision floating-point: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.SCALAR",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.SCALAR_DOUBLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.SCALAR_SINGLE",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of any Vector retired FP arithmetic instructions",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.VECTOR",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3c",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_128B",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.VECTOR_128B",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "FP_ARITH_OPS_RETIRED.VECTOR_256B",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_ARITH_OPS_RETIRED.VECTOR_256B",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x30",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of all types of floating point operations per uop with all default weighting",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc8",</div><div class='add'>+        "EventName": "FP_FLOPS_RETIRED.ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of all types of floating point operations per uop with all default weighting Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of floating point operations that produce 32 bit single precision results",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc8",</div><div class='add'>+        "EventName": "FP_FLOPS_RETIRED.FP32",</div><div class='add'>+        "PublicDescription": "Counts the number of floating point operations that produce 32 bit single precision results Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of floating point operations that produce 64 bit double precision results",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc8",</div><div class='add'>+        "EventName": "FP_FLOPS_RETIRED.FP64",</div><div class='add'>+        "PublicDescription": "Counts the number of floating point operations that produce 64 bit double precision results Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a packed 128 bit double precision floating point. This may be SSE or AVX.128 operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.128B_DP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a packed 128 bit double precision floating point. This may be SSE or AVX.128 operations. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a packed 128 bit single precision floating point. This may be SSE or AVX.128 operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.128B_SP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a packed 128 bit single precision floating point. This may be SSE or AVX.128 operations. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a packed 256 bit double precision floating point.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.256B_DP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a packed 256 bit double precision floating point. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a packed 256 bit single precision floating point.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.256B_SP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a packed 256 bit single precision floating point. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a scalar 32bit single precision floating point.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.32B_SP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a scalar 32bit single precision floating point. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired instructions whose sources are a scalar 64 bit double precision floating point.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.64B_DP",</div><div class='add'>+        "PublicDescription": "Counts the number of retired instructions whose sources are a scalar 64 bit double precision floating point. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the total number of  floating point retired instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc7",</div><div class='add'>+        "EventName": "FP_INST_RETIRED.ALL",</div><div class='add'>+        "PublicDescription": "Counts the total number of  floating point retired instructions. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on all floating point ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 0.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P0",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 1.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 2.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P2",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.P3",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer port 0, 1, 2, 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.PRIMARY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1e",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on floating point and vector integer store data port.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "FP_VINT_UOPS_EXECUTED.STD",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of floating point operations retired that required microcode assist.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.FP_ASSIST",</div><div class='add'>+        "PublicDescription": "Counts the number of floating point operations retired that required microcode assist, which is not a reflection of the number of FP operations, instructions or uops.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of floating point divide uops retired (x87 and sse, including x87 sqrt).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.FPDIV",</div><div class='add'>+        "PublicDescription": "Counts the number of floating point divide uops retired (x87 and sse, including x87 sqrt). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/frontend.json b/tools/perf/pmu-events/arch/x86/pantherlake/frontend.json<br/>index aedf631e3c0f..d36faa683d3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/frontend.json</a></div><div class='hunk'>@@ -1,5 +1,370 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the total number of BACLEARS due to all branch types including conditional and unconditional jumps, returns, and indirect branches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.ANY",</div><div class='add'>+        "PublicDescription": "Counts the total number of BACLEARS, which occur when the Branch Target Buffer (BTB) prediction or lack thereof, was corrected by a later branch predictor in the frontend.  Includes BACLEARS due to all branch types including conditional and unconditional jumps, returns, and indirect branches.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Clears due to Unknown Branches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x60",</div><div class='add'>+        "EventName": "BACLEARS.ANY",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a conditional jump.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.COND",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to an indirect branch.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.INDIRECT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a return branch.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.RETURN",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of BACLEARS due to a direct, unconditional jump.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe6",</div><div class='add'>+        "EventName": "BACLEARS.UNCOND",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Stalls caused by changing prefix length of the instruction.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x87",</div><div class='add'>+        "EventName": "DECODE.LCP",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles the Microcode Sequencer is busy.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x87",</div><div class='add'>+        "EventName": "DECODE.MS_BUSY",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "DSB-to-MITE switch true penalty cycles.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x61",</div><div class='add'>+        "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired ANT branches",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.ANY_ANT",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x9",</div><div class='add'>+        "PublicDescription": "Always Not Taken (ANT) conditional retired branches (no BTB entry and not mispredicted) Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced DSB miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x1",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced a critical DSB miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.DSB_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x11",</div><div class='add'>+        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.ITLB_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced iTLB true miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.ITLB_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x14",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.L1I_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x12",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.L2_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x13",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_128",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x608006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_16",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x601006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_2",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x600206",</div><div class='add'>+        "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_256",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x610006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x100206",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_32",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x602006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_4",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x600406",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_512",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x620006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_64",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x604006",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.LATENCY_GE_8",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x600806",</div><div class='add'>+        "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted Retired ANT branches",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.MISP_ANT",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x9",</div><div class='add'>+        "PublicDescription": "ANT retired branches that got just mispredicted Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts flows delivered by the Microcode Sequencer",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.MS_FLOWS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x8",</div><div class='add'>+        "PublicDescription": "Counts flows delivered by the Microcode Sequencer Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.STLB_MISS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x15",</div><div class='add'>+        "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired instructions that caused clears due to being Unknown Branches.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc6",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED.UNKNOWN_BRANCH",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x17",</div><div class='add'>+        "PublicDescription": "Number retired branch instructions that caused the front-end to be resteered when it finds the instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to Instruction L1 cache miss, that hit in the L2 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc9",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED_SOURCE.ICACHE_L2_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to Instruction L1 cache miss, that hit in the L2 cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss that hit in the second level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc9",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED_SOURCE.ITLB_STLB_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss that hit in the second level TLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss that also missed the second level TLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc9",</div><div class='add'>+        "EventName": "FRONTEND_RETIRED_SOURCE.ITLB_STLB_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of instructions retired that were tagged because empty issue slots were seen before the uop due to ITLB miss that also missed the second level TLB. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts every time the code stream enters into a new cache line by walking sequential from the previous line or being redirected by a jump.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='hunk'>@@ -9,6 +374,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts every time the code stream enters into a new cache line by walking sequential from the previous line or being redirected by a jump and the instruction cache registers bytes are present.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x80",</div><div class='add'>+        "EventName": "ICACHE.HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts every time the code stream enters into a new cache line by walking sequential from the previous line or being redirected by a jump and the instruction cache registers bytes are not present. -",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='hunk'>@@ -18,6 +392,134 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x80",</div><div class='add'>+        "EventName": "ICACHE_DATA.STALLS",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "ICACHE_DATA.STALL_PERIODS",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0x80",</div><div class='add'>+        "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x83",</div><div class='add'>+        "EventName": "ICACHE_TAG.STALLS",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='add'>+        "SampleAfterValue": "200003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles DSB is delivering optimal number of Uops",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "8",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.DSB_UOPS",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles MITE is delivering any Uop",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles MITE is delivering optimal number of Uops",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "8",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MITE_UOPS",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when uops are being delivered to IDQ while MS is busy",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of switches from DSB or MITE to the MS",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MS_SWITCHES",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while Microcode Sequencer (MS) is busy",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x79",</div><div class='add'>+        "EventName": "IDQ.MS_UOPS",</div><div class='add'>+        "PublicDescription": "Counts the number of uops initiated by MITE or Decode Stream Buffer (DSB) and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This event counts a subset of the Topdown Slots event that when no operation was delivered to the back-end pipeline due to instruction fetch limitations when the back-end could have accepted more operations. Common examples include instruction cache misses or x86 instruction decode limitations.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='hunk'>@@ -26,5 +528,38 @@</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x9c",</div><div class='add'>+        "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='add'>+        "Invert": "1",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when no uops are delivered by the IDQ for 2 or more cycles when backend of the machine is not stalled - normally indicating a Fetch Latency issue",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x9c",</div><div class='add'>+        "EventName": "IDQ_BUBBLES.FETCH_LATENCY",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls for 2 or more cycles - normally indicating a Fetch Latency issue.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "8",</div><div class='add'>+        "EventCode": "0x9c",</div><div class='add'>+        "EventName": "IDQ_BUBBLES.STARVATION_CYCLES",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/memory.json b/tools/perf/pmu-events/arch/x86/pantherlake/memory.json<br/>index 47daee8cc00f..3d31e620383d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/memory.json</a></div><div class='hunk'>@@ -1,5 +1,42 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to a core bound stall including a store address match, a DTLB miss or a page walk that detains the load from retiring.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.L1_BOUND_AT_RET",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xf4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer is stalled due to request buffers full or lock in progress.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "LD_HEAD.WCB_FULL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears due to memory ordering caused by a snoop from an external agent. Does not count internally generated machine clears such as those due to memory disambiguation.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of machine clears due to memory ordering conflicts.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.",</div><div class='ctx'>         "Counter": "2,3,4,5,6,7,8,9",</div><div class='ctx'>         "Data_LA": "1",</div><div class='hunk'>@@ -7,7 +44,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_1024",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x400",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "53",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -20,7 +57,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x80",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1009",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -33,7 +70,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x10",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "20011",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -46,7 +83,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_2048",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x800",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "23",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -59,7 +96,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x100",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "503",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -72,7 +109,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x20",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100007",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -85,7 +122,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x4",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -98,7 +135,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x200",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "101",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -111,7 +148,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x40",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -124,7 +161,7 @@</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",</div><div class='ctx'>         "MSRIndex": "0x3F6",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "50021",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='hunk'>@@ -135,12 +172,32 @@</div><div class='ctx'>         "Data_LA": "1",</div><div class='ctx'>         "EventCode": "0xcd",</div><div class='ctx'>         "EventName": "MEM_TRANS_RETIRED.STORE_SAMPLE",</div><div class='del'>-        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Retired memory accesses with at least 1 store operation. This PEBS event is the precisely-distributed (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The facility is described in Intel SDM Volume 3 section 19.9.8 Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts misaligned loads that are 4K page splits.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "MISALIGN_MEM_REF.LOAD_PAGE_SPLIT",</div><div class='add'>+        "PublicDescription": "Counts misaligned loads that are 4K page splits. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts misaligned stores that are 4K page splits.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "MISALIGN_MEM_REF.STORE_PAGE_SPLIT",</div><div class='add'>+        "PublicDescription": "Counts misaligned stores that are 4K page splits. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by DRAM.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xB7",</div><div class='hunk'>@@ -154,7 +211,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were supplied by DRAM.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.DRAM",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -178,7 +235,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand data reads that were not supplied by the L3 cache.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_DATA_RD.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -202,7 +259,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Counts demand read for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the L3 cache.",</div><div class='del'>-        "Counter": "0,1,2,3",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='ctx'>         "EventName": "OCR.DEMAND_RFO.L3_MISS",</div><div class='ctx'>         "MSRIndex": "0x1a6,0x1a7",</div><div class='hunk'>@@ -211,5 +268,35 @@</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts demand data read requests that miss the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x21",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where data return is pending for a Demand Data Read request who miss L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD",</div><div class='add'>+        "PublicDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x20",</div><div class='add'>+        "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/other.json b/tools/perf/pmu-events/arch/x86/pantherlake/other.json<br/>new file mode 100644<br/>index 000000000000..d49651d4f112<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/other.json</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+[</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc1",</div><div class='add'>+        "EventName": "ASSISTS.HARDWARE",</div><div class='add'>+        "PublicDescription": "Count all other hardware assists or traps that are not necessarily architecturally exposed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicated sub-events.  This includes, but not limited to, assists at EXE or MEM uop writeback like AVX* load/store/gather/scatter (non-FP GSSE-assist ) , assists generated by ROB like PEBS and RTIT, Uncore trap, RAR (Remote Action Request) and CET (Control flow Enforcement Technology) assists.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "ASSISTS.PAGE_FAULT",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc1",</div><div class='add'>+        "EventName": "ASSISTS.PAGE_FAULT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x2A,0x2B",</div><div class='add'>+        "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",</div><div class='add'>+        "MSRIndex": "0x1a6,0x1a7",</div><div class='add'>+        "MSRValue": "0x10800",</div><div class='add'>+        "PublicDescription": "Counts streaming stores that have any type of response. Available PDIST counters: 0",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles the uncore cannot take further requests",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x2d",</div><div class='add'>+        "EventName": "XQ.FULL",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json b/tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json<br/>index 2caf2f85327f..fb87d30c403d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/pipeline.json</a></div><div class='hunk'>@@ -1,10 +1,51 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cycles when divide unit is busy executing divide or square root operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xb0",</div><div class='add'>+        "EventName": "ARITH.DIV_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x9",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when integer divide unit is busy executing divide or square root operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xb0",</div><div class='add'>+        "EventName": "ARITH.IDIV_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer operations only.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc1",</div><div class='add'>+        "EventName": "ASSISTS.ANY",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles where the pipeline is stalled due to serializing operations.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa2",</div><div class='add'>+        "EventName": "BE_STALLS.SCOREBOARD",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the total number of branch instructions retired for all branch types.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP) of the processor is resteered due to a branch instruction and the branch instruction successfully retires.  All branch type instructions are accounted for.",</div><div class='add'>+        "PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP) of the processor is resteered due to a branch instruction and the branch instruction successfully retires.  All branch type instructions are accounted for. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,8 +54,242 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc4",</div><div class='ctx'>         "EventName": "BR_INST_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND",</div><div class='add'>+        "PublicDescription": "Counts conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of not taken conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_NTAKEN",</div><div class='add'>+        "PublicDescription": "Counts the number of not taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Not taken branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_NTAKEN",</div><div class='add'>+        "PublicDescription": "Counts not taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Taken conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Taken backward conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_TAKEN_BWD",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Taken forward conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.COND_TAKEN_FWD",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Far branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.FAR_BRANCH",</div><div class='add'>+        "PublicDescription": "Counts far branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.INDIRECT",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of near CALL branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='add'>+        "PublicDescription": "Counts the number of near CALL branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x30",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Direct and indirect near call instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_CALL",</div><div class='add'>+        "PublicDescription": "Counts both direct and indirect near call instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x30",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "near relative call instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_REL_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_DIRECT_CALL",</div><div class='add'>+        "PublicDescription": "Counts near relative call instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_REL_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "near relative jump instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_REL_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_DIRECT_JMP",</div><div class='add'>+        "PublicDescription": "Counts near relative jump instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_REL_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Indirect near branch instructions retired (excluding returns) [This event is alias to BR_INST_RETIRED.INDIRECT]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_INDIRECT",</div><div class='add'>+        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. [This event is alias to BR_INST_RETIRED.INDIRECT] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Indirect near call instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_IND_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_INDIRECT_CALL",</div><div class='add'>+        "PublicDescription": "Counts indirect near call instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_IND_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Indirect near jump instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_IND_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_INDIRECT_JMP",</div><div class='add'>+        "PublicDescription": "Counts indirect near jump instructions retired. [This event is alias to BR_INST_RETIRED.NEAR_IND_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_IND_CALL",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_IND_JMP",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_INDIRECT_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Indirect and Direct Relative near jump instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_JMP",</div><div class='add'>+        "PublicDescription": "Counts near jump instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0xc0",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_DIRECT_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_REL_CALL",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_DIRECT_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_DIRECT_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_REL_JMP",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_INST_RETIRED.NEAR_DIRECT_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Return instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_RETURN",</div><div class='add'>+        "PublicDescription": "Counts return instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of near taken branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts the number of near taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xfb",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Taken branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc4",</div><div class='add'>+        "EventName": "BR_INST_RETIRED.NEAR_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts taken branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0xfb",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -22,7 +297,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts the total number of mispredicted branch instructions retired.  All branch type instructions are accounted for.  Prediction of the branch target address enables the processor to begin executing instructions before the non-speculative execution path is known. The branch prediction unit (BPU) predicts the target address based on the instruction pointer (IP) of the branch and on the execution path through which execution reached this IP.    A branch misprediction occurs when the prediction is wrong, and results in discarding all instructions executed in the speculative path and re-fetching from the correct path.",</div><div class='add'>+        "PublicDescription": "Counts the total number of mispredicted branch instructions retired.  All branch type instructions are accounted for.  Prediction of the branch target address enables the processor to begin executing instructions before the non-speculative execution path is known. The branch prediction unit (BPU) predicts the target address based on the instruction pointer (IP) of the branch and on the execution path through which execution reached this IP.    A branch misprediction occurs when the prediction is wrong, and results in discarding all instructions executed in the speculative path and re-fetching from the correct path. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -31,15 +306,459 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc5",</div><div class='ctx'>         "EventName": "BR_MISP_RETIRED.ALL_BRANCHES",</div><div class='del'>-        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch.  When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.ALL_BRANCHES_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.ALL_BRANCHES_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.ALL_BRANCHES_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.ALL_BRANCHES_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.ALL_BRANCHES_TPEBS",</div><div class='add'>+        "PublicDescription": "All mispredicted branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.ALL_BRANCHES_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.ALL_NEAR_IND",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND",</div><div class='add'>+        "PublicDescription": "Counts mispredicted conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8007",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted not taken conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_NTAKEN",</div><div class='add'>+        "PublicDescription": "Counts the number of mispredicted not taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_NTAKEN",</div><div class='add'>+        "PublicDescription": "Counts the number of conditional branch instructions retired that were mispredicted and the branch direction was not taken. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_NTAKEN_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_NTAKEN_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_NTAKEN_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8004",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_NTAKEN_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_NTAKEN_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_NTAKEN_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8004",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted taken conditional branch instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts the number of mispredicted taken conditional branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "number of branch instructions retired that were mispredicted and taken.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts taken conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "number of branch instructions retired that were mispredicted and taken backward.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD",</div><div class='add'>+        "PublicDescription": "Counts taken backward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_BWD_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_BWD_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8001",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_BWD_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_BWD_TPEBS",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken backward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_BWD_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8001",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8003",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "number of branch instructions retired that were mispredicted and taken forward.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD",</div><div class='add'>+        "PublicDescription": "Counts taken forward conditional mispredicted branch instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_FWD_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_FWD_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8002",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_FWD_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_FWD_TPEBS",</div><div class='add'>+        "PublicDescription": "number of branch instructions retired that were mispredicted and taken forward. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_FWD_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8002",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TAKEN_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted taken conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_TAKEN_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8003",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.COND_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted conditional branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.COND_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8007",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_CALL",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_CALL_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_CALL_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_CALL_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8010",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8050",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_JMP",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_JMP_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.INDIRECT_JMP_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_INDIRECT_JMP_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8040",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of mispredicted near indirect JMP and near indirect CALL branch instructions retired. [This event is alias to BR_MISP_RETIRED.ALL_NEAR_IND]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT",</div><div class='add'>+        "PublicDescription": "Counts the number of mispredicted near indirect JMP and near indirect CALL branch instructions retired. [This event is alias to BR_MISP_RETIRED.ALL_NEAR_IND] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns) [This event is alias to BR_MISP_RETIRED.INDIRECT]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT",</div><div class='add'>+        "PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding returns. TSX abort is an indirect branch. [This event is alias to BR_MISP_RETIRED.INDIRECT] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x50",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted indirect CALL retired. [This event is alias to BR_MISP_RETIRED.INDIRECT_CALL]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT_CALL",</div><div class='add'>+        "PublicDescription": "Counts retired mispredicted indirect (near taken) CALL instructions, including both register and memory indirect. [This event is alias to BR_MISP_RETIRED.INDIRECT_CALL] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.INDIRECT_CALL_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT_CALL_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted indirect CALL retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.INDIRECT_CALL_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x8010",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Miss-predicted near indirect jump instructions retired. [This event is alias to BR_MISP_RETIRED.INDIRECT_JMP]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT_JMP",</div><div class='add'>+        "PublicDescription": "Miss-predicted near indirect jump instructions retired. [This event is alias to BR_MISP_RETIRED.INDIRECT_JMP] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Miss-predicted near indirect jump instructions retired. Precise cost. [This event is alias to BR_MISP_RETIRED.INDIRECT_JMP_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT_JMP_TPEBS",</div><div class='add'>+        "PublicDescription": "Miss-predicted near indirect jump instructions retired. Precise cost. [This event is alias to BR_MISP_RETIRED.INDIRECT_JMP_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8040",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.INDIRECT_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_INDIRECT_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted near indirect branch instructions retired (excluding returns). This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.INDIRECT_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8050",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS [This event is alias to BR_MISP_RETIRED.RET]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_RETURN",</div><div class='add'>+        "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired. [This event is alias to BR_MISP_RETIRED.RET] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.RET_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_RETURN_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted ret instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.RET_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x8008",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_TAKEN",</div><div class='add'>+        "PublicDescription": "Counts number of near branch instructions retired that were mispredicted and taken. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0xfb",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_TAKEN_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_TAKEN_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_TAKEN_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x80fb",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.NEAR_TAKEN_COST]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.NEAR_TAKEN_TPEBS",</div><div class='add'>+        "PublicDescription": "Mispredicted taken near branch instructions retired. This precise event may be used to get the misprediction cost via the Retire_Latency field of PEBS. It fires on the instruction that immediately follows the mispredicted branch. [This event is alias to BR_MISP_RETIRED.NEAR_TAKEN_COST] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x80fb",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_RETURN]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.RET",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_RETURN] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_RETURN_TPEBS]",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "Deprecated": "1",</div><div class='add'>+        "EventCode": "0xc5",</div><div class='add'>+        "EventName": "BR_MISP_RETIRED.RET_COST",</div><div class='add'>+        "PublicDescription": "This event is deprecated. [This event is alias to BR_MISP_RETIRED.NEAR_RETURN_TPEBS] Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "100007",</div><div class='add'>+        "UMask": "0x8008",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xec",</div><div class='add'>+        "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xec",</div><div class='add'>+        "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Core clocks when the thread is in the C0.1 or C0.2 or running a PAUSE in C0 ACPI state.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xec",</div><div class='add'>+        "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x70",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles.",</div><div class='ctx'>         "Counter": "Fixed counter 1",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.CORE",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -57,7 +776,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.CORE_P",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -70,10 +789,30 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Core clocks when a PAUSE is pending.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xec",</div><div class='add'>+        "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of Pause instructions",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0xec",</div><div class='add'>+        "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles.",</div><div class='ctx'>         "Counter": "Fixed counter 2",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x3",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -92,7 +831,7 @@</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='ctx'>         "PublicDescription": "Counts the number of reference cycles that the core is not in a halt state. The core enters the halt state when it is running the HLT instruction. This event is not affected by core frequency changes and increments at a fixed frequency that is also used for the Time Stamp Counter (TSC). This event uses a programmable general purpose performance counter.",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -110,7 +849,7 @@</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles.",</div><div class='ctx'>         "Counter": "Fixed counter 1",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -128,7 +867,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -141,11 +880,130 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cycles while memory subsystem has an outstanding load.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "16",</div><div class='add'>+        "EventCode": "0xa3",</div><div class='add'>+        "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Total execution stalls.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "4",</div><div class='add'>+        "EventCode": "0xa3",</div><div class='add'>+        "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Count number of times a load is depending on another load that had just write back its data or in previous or  2 cycles back. This event supports in-direct dependency through a single uop.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x02",</div><div class='add'>+        "EventName": "DEPENDENT_LOADS.ANY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "5",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x21",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "2",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles no uop executed while RS was not empty, the SB was not full and there was no outstanding load.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa6",</div><div class='add'>+        "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Instruction decoders utilized in a cycle",</div><div class='add'>+        "Counter": "2",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "INST_DECODED.DECODERS",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of instructions retired.",</div><div class='ctx'>         "Counter": "Fixed counter 0",</div><div class='ctx'>         "EventName": "INST_RETIRED.ANY",</div><div class='ctx'>         "PublicDescription": "Fixed Counter: Counts the number of instructions retired. Available PDIST counters: 32",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='hunk'>@@ -163,7 +1021,8 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.ANY_P",</div><div class='del'>-        "SampleAfterValue": "1000003",</div><div class='add'>+        "PublicDescription": "Counts the number of instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -171,15 +1030,364 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.ANY_P",</div><div class='del'>-        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc0",</div><div class='add'>+        "EventName": "INST_RETIRED.BR_FUSED",</div><div class='add'>+        "PublicDescription": "retired macro-fused uops when there is a branch in the macro-fused pair (the two instructions that got macro-fused count once in this pmon) Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "INST_RETIRED.MACRO_FUSED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc0",</div><div class='add'>+        "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='add'>+        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x30",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired NOP instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc0",</div><div class='add'>+        "EventName": "INST_RETIRED.NOP",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 or PREFETCHIT0/1 instructions Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Precise instruction retired with PEBS precise-distribution",</div><div class='add'>+        "Counter": "Fixed counter 0",</div><div class='add'>+        "EventName": "INST_RETIRED.PREC_DIST",</div><div class='add'>+        "PublicDescription": "A version of INST_RETIRED that allows for a precise distribution of samples across instructions retired. It utilizes the Precise Distribution of Instructions Retired (PDIR++) feature to fix bias in how retired instructions get sampled. Use on Fixed Counter 0. Available PDIST counters: 32",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Iterations of Repeat string retired instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc0",</div><div class='add'>+        "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Bubble cycles of BPClear.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.BPCLEAR_CYCLES",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0xB",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Clears speculative count",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='add'>+        "SampleAfterValue": "500009",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Bubble cycles of BAClear (Unknown Branch).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x7",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "TMA slots where uops got dropped",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xad",</div><div class='add'>+        "EventName": "INT_MISC.UOP_DROPPING",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on secondary integer ports 0,1,2,3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.2ND",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on all Integer ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xff",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on a load port.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.LD",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed on a load port.  This event counts for integer uops even if the destination is FP/vector",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 0.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P0",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 1.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 2.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P2",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.P3",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on integer port  0,1, 2, 3.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.PRIMARY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x78",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on a Store address port.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.STA",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed on a Store address port. This event counts integer uops even if the data source is FP/vector",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops executed on an integer store data and jump port.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xb3",</div><div class='add'>+        "EventName": "INT_UOPS_EXECUTED.STD_JMP",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of vector integer instructions retired of 128-bit vector-width.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x13",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of vector integer instructions retired of 256-bit vector-width.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xac",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "integer ADD, SUB, SAD 128-bit vector instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x3",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "integer ADD, SUB, SAD 256-bit vector instructions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xc",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "INT_VEC_RETIRED.MUL_256",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "INT_VEC_RETIRED.SHUFFLES",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "INT_VEC_RETIRED.VNNI_128",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "INT_VEC_RETIRED.VNNI_256",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe7",</div><div class='add'>+        "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired loads that are blocked because it initially appears to be store forward blocked, but subsequently is shown not to be blocked based on 4K alias check.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='add'>+        "PublicDescription": "Counts the number of retired loads that are blocked because it initially appears to be store forward blocked, but subsequently is shown not to be blocked based on 4K alias check. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "False dependencies in MOB due to partial compare on address.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired loads that are blocked for any of the following reasons:  DTLB miss, address alias, store forward or data unknown (includes memory disambiguation blocks and ESP consuming load blocks).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.ALL",</div><div class='add'>+        "PublicDescription": "Counts the number of retired loads that are blocked for any of the following reasons:  DTLB miss, address alias, store forward or data unknown (includes memory disambiguation blocks and ESP consuming load blocks). Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1f",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Bank conflicts in DCU due to limited lookup ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.BANK_CONFLICT",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to bank conflicts in DCU",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired loads that are blocked because its address exactly matches an older store whose data is not ready.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.DATA_UNKNOWN",</div><div class='add'>+        "PublicDescription": "Counts the number of retired loads that are blocked because its address exactly matches an older store whose data is not ready. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.NO_SR",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x88",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of times a load got early blocked due to preceding store operation with unknown address or unknown data. Excluding in-line (immediate) wakeups",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.STORE_EARLY",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0xa1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of retired loads that are blocked because its address partially overlapped with an older store.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='add'>+        "PublicDescription": "Counts the number of retired loads that are blocked because its address partially overlapped with an older store. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='hunk'>@@ -195,10 +1403,138 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xa8",</div><div class='add'>+        "EventName": "LSD.CYCLES_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles optimal number of Uops delivered by the LSD, but did not come from the decoder.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "8",</div><div class='add'>+        "EventCode": "0xa8",</div><div class='add'>+        "EventName": "LSD.CYCLES_OK",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of Uops delivered by the LSD.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa8",</div><div class='add'>+        "EventName": "LSD.UOPS",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of machine clears (nukes) of any type.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.COUNT",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears due to memory ordering in which an internal load passes an older store within the same CPU.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.DISAMBIGUATION",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears due to a page fault.  Counts both I-Side and D-Side (Loads/Stores) page faults.  A page fault occurs when either the page is not present, or an access violation occurs.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.PAGE_FAULT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of machine clears due to program modifying data (self modifying code) within 1K of a recently fetched code page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.SMC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Self-modifying code (SMC) detected.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc3",</div><div class='add'>+        "EventName": "MACHINE_CLEARS.SMC",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles where no execution is happening due to loads waiting for L1 cache (that is: no execution &amp; load in flight &amp; no load missed L1 cache)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "MEMORY_STALLS.L1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles where no execution is happening due to loads waiting for L2 cache (that is: no execution &amp; load in flight &amp; load missed L1 &amp; no load missed L2 cache)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "MEMORY_STALLS.L2",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles where no execution is happening due to loads waiting for L3 cache (that is: no execution &amp; load in flight &amp; load missed L1 &amp; load missed L2 cache &amp; no load missed L3 Cache)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "MEMORY_STALLS.L3",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts cycles where no execution is happening due to loads waiting for Memory (that is: no execution &amp; load in flight &amp; a load missed L3 cache)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "MEMORY_STALLS.MEM",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "LFENCE instructions retired",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC2_RETIRED.LFENCE",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='add'>+        "SampleAfterValue": "400009",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of LBR entries recorded. Requires LBRs to be enabled in IA32_LBR_CTL.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe4",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='add'>+        "PublicDescription": "Counts the number of LBR entries recorded. Requires LBRs to be enabled in IA32_LBR_CTL. Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='hunk'>@@ -208,12 +1544,102 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xe4",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "LBR record is inserted Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "LBR record is inserted Available PDIST counters: 0,1",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of LFENCE instructions retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe0",</div><div class='add'>+        "EventName": "MISC_RETIRED1.LFENCE",</div><div class='add'>+        "PublicDescription": "Counts the number of LFENCE instructions retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of accesses to KeyLocker cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.KEYLOCKER_ACCESS",</div><div class='add'>+        "PublicDescription": "Counts the number of accesses to KeyLocker cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of misses to KeyLocker cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xe1",</div><div class='add'>+        "EventName": "MISC_RETIRED2.KEYLOCKER_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of misses to KeyLocker cache. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x11",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa5",</div><div class='add'>+        "EventName": "RS.EMPTY",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0xa5",</div><div class='add'>+        "EventName": "RS.EMPTY_COUNT",</div><div class='add'>+        "Invert": "1",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x7",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when RS was empty and a resource allocation stall is asserted",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xa5",</div><div class='add'>+        "EventName": "RS.EMPTY_RESOURCE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots in a UMWAIT or TPAUSE instruction where no uop issues due to the instruction putting the CPU into the C0.1 activity state. For Tremont, UMWAIT and TPAUSE will only put the CPU into C0.1 activity state (not C0.2 activity state).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "SERIALIZATION.C01_MS_SCB",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots where no uop could issue due to an IQ scoreboard that stalls allocation until a specified older uop retires or (in the case of jump scoreboard) executes. Commonly executed instructions with IQ scoreboards include LFENCE and MFENCE.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "SERIALIZATION.IQ_JEU_SCB",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots not consumed by the backend due to a micro-sequencer (MS) scoreboard, which stalls the front-end from issuing from the UROM until a specified older uop retires.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x75",</div><div class='add'>+        "EventName": "SERIALIZATION.NON_C01_MS_SCB",</div><div class='add'>+        "PublicDescription": "Counts the number of issue slots not consumed by the backend due to a micro-sequencer (MS) scoreboard, which stalls the front-end from issuing from the UROM until a specified older uop retires. The most commonly executed instruction with an MS scoreboard is PAUSE.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This event counts a subset of the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution units limitations, or other conditions.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='hunk'>@@ -224,6 +1650,35 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "TMA slots wasted due to incorrect speculations.",</div><div class='add'>+        "Counter": "0",</div><div class='add'>+        "EventCode": "0xa4",</div><div class='add'>+        "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='add'>+        "SampleAfterValue": "10000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "TMA slots wasted due to incorrect speculation by branch mispredictions",</div><div class='add'>+        "Counter": "0",</div><div class='add'>+        "EventCode": "0xa4",</div><div class='add'>+        "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='add'>+        "SampleAfterValue": "10000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "EventCode": "0xa4",</div><div class='add'>+        "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='add'>+        "SampleAfterValue": "10000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",</div><div class='ctx'>         "Counter": "Fixed counter 3",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS",</div><div class='hunk'>@@ -244,7 +1699,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of issue slots that were not consumed by the backend because allocation is stalled due to a mispredicted jump or a machine clear.",</div><div class='del'>-        "Counter": "36",</div><div class='add'>+        "Counter": "Fixed counter 4",</div><div class='ctx'>         "EventName": "TOPDOWN_BAD_SPECULATION.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5",</div><div class='hunk'>@@ -260,6 +1715,42 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to Fast Nukes such as  Memory Ordering Machine clears and MRN nukes",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x73",</div><div class='add'>+        "EventName": "TOPDOWN_BAD_SPECULATION.FASTNUKE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to a branch mispredict that resulted in LSD exit.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x73",</div><div class='add'>+        "EventName": "TOPDOWN_BAD_SPECULATION.LSD_MISPREDICT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to Branch Mispredict",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x73",</div><div class='add'>+        "EventName": "TOPDOWN_BAD_SPECULATION.MISPREDICT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to a machine clear (nuke).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x73",</div><div class='add'>+        "EventName": "TOPDOWN_BAD_SPECULATION.NUKE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls. [This event is alias to TOPDOWN_BE_BOUND.ALL_P]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='hunk'>@@ -269,6 +1760,15 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to due to certain allocation restrictions.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x74",</div><div class='add'>+        "EventName": "TOPDOWN_BE_BOUND.ALLOC_RESTRICTIONS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls. [This event is alias to TOPDOWN_BE_BOUND.ALL]",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='hunk'>@@ -278,8 +1778,35 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to LSD entry.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x74",</div><div class='add'>+        "EventName": "TOPDOWN_BE_BOUND.LSD",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to memory reservation stall (scheduler not being able to accept another uop).  This could be caused by RSV full or load/store buffer block.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x74",</div><div class='add'>+        "EventName": "TOPDOWN_BE_BOUND.MEM_SCHEDULER",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the backend due to iq/jeu scoreboards or ms scb",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x74",</div><div class='add'>+        "EventName": "TOPDOWN_BE_BOUND.SERIALIZATION",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of retirement slots not consumed due to front end stalls.",</div><div class='del'>-        "Counter": "37",</div><div class='add'>+        "Counter": "Fixed counter 5",</div><div class='ctx'>         "EventName": "TOPDOWN_FE_BOUND.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6",</div><div class='hunk'>@@ -295,8 +1822,80 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to BAClear",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.BRANCH_DETECT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to BTClear",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.BRANCH_RESTEER",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to ms",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.CISC",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to decode stall",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.DECODE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to latency related stalls including BACLEARs, BTCLEARs, ITLB misses, and ICache misses.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.FRONTEND_LATENCY",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x72",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to itlb miss",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.ITLB_MISS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend that do not categorize into any other common frontend stall",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.OTHER",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the frontend due to predecode wrong",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x71",</div><div class='add'>+        "EventName": "TOPDOWN_FE_BOUND.PREDECODE",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Fixed Counter: Counts the number of consumed retirement slots.",</div><div class='del'>-        "Counter": "38",</div><div class='add'>+        "Counter": "Fixed counter 6",</div><div class='ctx'>         "EventName": "TOPDOWN_RETIRING.ALL",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7",</div><div class='hunk'>@@ -313,6 +1912,256 @@</div><div class='ctx'>         "Unit": "cpu_atom"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Number of non dec-by-all uops decoded by decoder",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x76",</div><div class='add'>+        "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='add'>+        "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops executed on INT EU ALU ports.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.ALU",</div><div class='add'>+        "PublicDescription": "Number of ALU integer uops dispatch to execution.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops executed on any INT EU ports",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.INT_EU_ALL",</div><div class='add'>+        "PublicDescription": "Number of integer uops dispatched to execution.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of Uops dispatched/executed by any of the 3 JEUs (all ups that hold the JEU including macro; micro jumps; fetch-from-eip)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.JMP",</div><div class='add'>+        "PublicDescription": "Number of jump uops dispatch to execution",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x40",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops executed on Load ports",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.LOAD",</div><div class='add'>+        "PublicDescription": "Number of Load uops dispatched to execution.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of (shift) 1-cycle Uops dispatched/executed by any of the Shift Eus",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.SHIFT",</div><div class='add'>+        "PublicDescription": "Number of SHIFT integer uops dispatch to execution",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of Uops dispatched/executed by Slow EU (e.g. 3+ cycles LEA, &gt;1 cycles shift, iDIVs, CR; *H operation)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.SLOW",</div><div class='add'>+        "PublicDescription": "Number of Slow integer uops dispatch to execution.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of Uops dispatched on STA ports",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.STA",</div><div class='add'>+        "PublicDescription": "Number of STA (Store Address) uops dispatch to execution",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops executed on STD ports",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb2",</div><div class='add'>+        "EventName": "UOPS_DISPATCHED.STD",</div><div class='add'>+        "PublicDescription": "Number of STD (Store Data) uops dispatch to execution",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where at least 1 uop was executed per-thread",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where at least 2 uops were executed per-thread",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "CounterMask": "2",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where at least 3 uops were executed per-thread",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "CounterMask": "3",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles where at least 4 uops were executed per-thread",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "CounterMask": "4",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.STALLS",</div><div class='add'>+        "Invert": "1",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",</div><div class='add'>+        "Counter": "3",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.THREAD",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of x87 uops dispatched.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xb1",</div><div class='add'>+        "EventName": "UOPS_EXECUTED.X87",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Uops that RAT issues to RS",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xae",</div><div class='add'>+        "EventName": "UOPS_ISSUED.ANY",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "UOPS_ISSUED.CYCLES",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xae",</div><div class='add'>+        "EventName": "UOPS_ISSUED.CYCLES",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles with retired uop(s).",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.CYCLES",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Retired uops except the last uop of each instruction.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.HEAVY",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of integer divide uops retired.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.IDIV",</div><div class='add'>+        "PublicDescription": "Counts the number of integer divide uops retired. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x80",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of uops that are from the complex flows issued by the micro-sequencer (MS).  This includes uops from flows due to complex instructions, faults, assists, and inserted flows.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.MS",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "UOPS_RETIRED.MS",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.MS",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x8",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of non-speculative switches to the Microcode Sequencer (MS)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EdgeDetect": "1",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.MS_SWITCHES",</div><div class='add'>+        "MSRIndex": "0x3F7",</div><div class='add'>+        "MSRValue": "0x8",</div><div class='add'>+        "PublicDescription": "Switches to the Microcode Sequencer",</div><div class='add'>+        "SampleAfterValue": "2000003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This event counts a subset of the Topdown Slots event that are utilized by operations that eventually get retired (committed) by the processor pipeline. Usually, this event positively correlates with higher performance  for example, as measured by the instructions-per-cycle metric.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='hunk'>@@ -321,5 +2170,25 @@</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles without actually retired uops.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.STALLS",</div><div class='add'>+        "Invert": "1",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of x87 uops retired, includes those in ms flows.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xc2",</div><div class='add'>+        "EventName": "UOPS_RETIRED.X87",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json b/tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json<br/>new file mode 100644<br/>index 000000000000..a881b99be5f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/uncore-memory.json</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+[</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Read CAS command sent to DRAM",</div><div class='add'>+        "Counter": "0,1,2,3,4",</div><div class='add'>+        "EventCode": "0x22",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_RD",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Write CAS command sent to DRAM",</div><div class='add'>+        "Counter": "0,1,2,3,4",</div><div class='add'>+        "EventCode": "0x23",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_WR",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending  or receiving 32B chunk data.",</div><div class='add'>+        "Counter": "0,1,2,3,4",</div><div class='add'>+        "EventCode": "0x3C",</div><div class='add'>+        "EventName": "UNC_M_TOTAL_DATA",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    }</div><div class='add'>+]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json b/tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json<br/>index 690c5dff9d9e..8d56c16b2a39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/pantherlake/virtual-memory.json</a></div><div class='hunk'>@@ -1,5 +1,44 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks initiated by a demand load that missed the first and second level TLBs.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x08",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.MISS_CAUSED_WALK",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of first level TLB misses but second level hits due to a demand load that did not start a page walk. Accounts for all page sizes. Will result in a DTLB write from STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x08",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Loads that miss the DTLB and hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x320",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page size.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x08",</div><div class='hunk'>@@ -20,6 +59,86 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data load to a 4K page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of page walks outstanding for a demand load in the PMH each cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x12",</div><div class='add'>+        "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks initiated by a store that missed the first and second level TLBs.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.MISS_CAUSED_WALK",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of first level TLB misses but second level hits due to stores that did not start a page walk. Accounts for all page sizes. Will result in a DTLB write from STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x49",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='add'>+        "PublicDescription": "Counts the number of first level TLB misses but second level hits due to a demand load that did not start a page walk. Accounts for all page sizes. Will result in a DTLB write from STLB.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Stores that miss the DTLB and hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x320",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of page walks completed due to store DTLB misses to any page size.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x49",</div><div class='hunk'>@@ -40,6 +159,85 @@</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data store to a 1G page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Page walks completed due to a demand data store to a 4K page.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of page walks outstanding for a store in the PMH each cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x13",</div><div class='add'>+        "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks initiated by a instruction fetch that missed the first and second level TLBs.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x85",</div><div class='add'>+        "EventName": "ITLB_MISSES.MISS_CAUSED_WALK",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of first level TLB misses but second level hits due to an instruction fetch that did not start a page walk. Account for all pages sizes. Will result in an ITLB write from STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x85",</div><div class='add'>+        "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x11",</div><div class='add'>+        "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x120",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "CounterMask": "1",</div><div class='add'>+        "EventCode": "0x11",</div><div class='add'>+        "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of page walks completed due to instruction fetch misses to any page size.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x85",</div><div class='hunk'>@@ -58,5 +256,55 @@</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe",</div><div class='ctx'>         "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x11",</div><div class='add'>+        "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x11",</div><div class='add'>+        "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of page walks outstanding for iside in PMH every cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x85",</div><div class='add'>+        "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for iside in PMH every cycle.  A PMH page walk is outstanding from page walk start till PMH becomes idle again (ready to serve next walk). Includes EPT-walk intervals.  Walks could be counted by edge detecting on this event, but would count restarted suspended walks.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of page walks outstanding for an outstanding code request in the PMH each cycle.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7,8,9",</div><div class='add'>+        "EventCode": "0x11",</div><div class='add'>+        "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "cpu_core"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of retired loads that are blocked due to a first level TLB miss.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x03",</div><div class='add'>+        "EventName": "LD_BLOCKS.DTLB_MISS",</div><div class='add'>+        "PublicDescription": "Counts the number of retired loads that are blocked due to a first level TLB miss. Available PDIST counters: 0,1",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "cpu_atom"</div><div class='ctx'>     }</div><div class='ctx'> ]</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json b/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json<br/>index 71737a1a1997..79dc34157481 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/rocketlake/rkl-metrics.json</a></div><div class='hunk'>@@ -1,63 +1,63 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C9 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c9\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C9_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -85,7 +85,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often memory load accesses were aliased by preceding stores (in program order) with a 4K address offset",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_4k_aliasing",</div><div class='hunk'>@@ -134,6 +133,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -148,39 +148,44 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -188,6 +193,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='hunk'>@@ -196,6 +202,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='hunk'>@@ -204,6 +211,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -212,7 +220,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -220,6 +229,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -427,7 +437,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -619,6 +629,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_lsd + tma_mite + tma_ms)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -1074,7 +1085,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1098,6 +1109,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / ASSISTS.ANY",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1113,7 +1130,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1125,7 +1142,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1134,7 +1151,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_ARB_TRK_REQUESTS.ALL + UNC_ARB_COH_TRK_REQUESTS.ALL) / 1e6 / tma_info_system_time / 1e3",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1165,6 +1182,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / UNC_ARB_DAT_OCCUPANCY.RD@cmask\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='hunk'>@@ -1316,12 +1334,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1345,7 +1363,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L2_MISS - CYCLE_ACTIVITY.STALLS_L3_MISS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "CacheHits;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_bound",</div><div class='hunk'>@@ -1359,7 +1376,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1465,7 +1482,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1474,7 +1491,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1542,7 +1559,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 3.3",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1676,7 +1693,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1713,7 +1730,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents rate of split store accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",</div><div class='ctx'>         "MetricName": "tma_split_stores",</div><div class='hunk'>@@ -1727,7 +1743,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1741,7 +1757,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * LD_BLOCKS.STORE_FORWARD / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_store_fwd_blk",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json b/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json<br/>index 823d8b7c4224..d40761903429 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sandybridge/snb-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -71,7 +71,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "1 - (tma_frontend_bound + tma_bad_speculation + tma_retiring)",</div><div class='ctx'>         "MetricGroup": "BvOB;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='hunk'>@@ -296,7 +295,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -308,7 +307,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json<br/>index 21db53f9e9d6..c66324d41a89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json</a></div><div class='hunk'>@@ -1,10 +1,72 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Hit snoop reply with data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_FWD_FE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's cache, after the data is forwarded back to the requestor and indicating the data was found unmodified in the (FE) Forward or Exclusive State in this cores caches cache.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x20"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HitM snoop reply with data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_FWD_M",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's caches, after the data is forwarded back to the requestor, and indicating the data was found modified(M) in this cores caches cache (aka HitM response).  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x10"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply without sending the data, line invalidated.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.I_HIT_FSE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated in this core's caches without forwarded back to the requestor. The line was in Forward, Shared or Exclusive (FSE) state in this cores caches.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Line not found snoop reply",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.MISS",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating that the data was not found (IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of the Core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply with data, line kept in Shared state.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_FWD_FE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (FS) Forward or Shared state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x40"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HitM snoop reply with data, line kept in Shared state",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_FWD_M",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (M)odified state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Hit snoop reply without sending the data, line kept in Shared state.",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x27",</div><div class='add'>+        "EventName": "CORE_SNOOP_RESPONSE.S_HIT_FSE",</div><div class='add'>+        "PublicDescription": "Counts responses to snoops indicating the line was kept on this core in the (S)hared state, and that the data was found unmodified but not forwarded back to the requestor, initially the data was found in the cache in the (FSE) Forward, Shared state or Exclusive state.  A single snoop response from the core counts on all hyperthreads of the core.",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "L1D.HWPF_MISS",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L1D.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +75,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x51",</div><div class='ctx'>         "EventName": "L1D.REPLACEMENT",</div><div class='del'>-        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +84,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -33,7 +95,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.FB_FULL_PERIODS",</div><div class='del'>-        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -43,7 +105,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALL",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event L1D_PEND_MISS.L2_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -52,7 +113,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.L2_STALLS",</div><div class='del'>-        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -61,7 +122,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING",</div><div class='del'>-        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -71,7 +132,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x48",</div><div class='ctx'>         "EventName": "L1D_PEND_MISS.PENDING_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts duration of L1D miss outstanding in cycles. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts duration of L1D miss outstanding in cycles.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -80,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x25",</div><div class='ctx'>         "EventName": "L2_LINES_IN.ALL",</div><div class='del'>-        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -89,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.NON_SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -98,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.SILENT",</div><div class='del'>-        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache. These lines are typically in Shared or Exclusive state. A non-threaded event.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -107,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x26",</div><div class='ctx'>         "EventName": "L2_LINES_OUT.USELESS_HWPF",</div><div class='del'>-        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -116,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.ALL",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -125,7 +186,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_REQUEST.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -134,7 +195,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the total number of L2 code requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of L2 code requests.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -143,7 +204,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -152,7 +213,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x27"</div><div class='ctx'>     },</div><div class='hunk'>@@ -161,7 +222,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts demand requests to L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand requests to L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -170,7 +231,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_HWPF",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.ALL_HWPF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xf0"</div><div class='ctx'>     },</div><div class='hunk'>@@ -179,7 +239,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.ALL_RFO",</div><div class='del'>-        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xe2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -188,7 +248,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -197,7 +257,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.CODE_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts L2 cache misses when fetching instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 cache misses when fetching instructions.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x24"</div><div class='ctx'>     },</div><div class='hunk'>@@ -206,7 +266,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",</div><div class='del'>-        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -215,7 +275,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",</div><div class='del'>-        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -224,7 +284,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.HWPF_MISS",</div><div class='del'>-        "PublicDescription": "L2_RQSTS.HWPF_MISS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x30"</div><div class='ctx'>     },</div><div class='hunk'>@@ -233,7 +292,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.MISS",</div><div class='del'>-        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x3f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -242,7 +301,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.REFERENCES",</div><div class='del'>-        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xff"</div><div class='ctx'>     },</div><div class='hunk'>@@ -251,7 +310,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_HIT",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -260,7 +319,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.RFO_MISS",</div><div class='del'>-        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x22"</div><div class='ctx'>     },</div><div class='hunk'>@@ -269,7 +328,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_HIT",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0xc8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -278,7 +337,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x24",</div><div class='ctx'>         "EventName": "L2_RQSTS.SWPF_MISS",</div><div class='del'>-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x28"</div><div class='ctx'>     },</div><div class='hunk'>@@ -287,7 +346,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x23",</div><div class='ctx'>         "EventName": "L2_TRANS.L2_WB",</div><div class='del'>-        "PublicDescription": "Counts L2 writebacks that access L2 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts L2 writebacks that access L2 cache.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -296,7 +355,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.MISS",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x41"</div><div class='ctx'>     },</div><div class='hunk'>@@ -305,7 +364,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x2e",</div><div class='ctx'>         "EventName": "LONGEST_LAT_CACHE.REFERENCE",</div><div class='del'>-        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4f"</div><div class='ctx'>     },</div><div class='hunk'>@@ -394,7 +453,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x43",</div><div class='ctx'>         "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",</div><div class='del'>-        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfd"</div><div class='ctx'>     },</div><div class='hunk'>@@ -582,7 +641,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x44",</div><div class='ctx'>         "EventName": "MEM_STORE_RETIRED.L2_HIT",</div><div class='del'>-        "PublicDescription": "MEM_STORE_RETIRED.L2_HIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -591,7 +649,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe5",</div><div class='ctx'>         "EventName": "MEM_UOP_RETIRED.ANY",</div><div class='del'>-        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1073,7 +1131,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS.ALL_REQUESTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1082,7 +1139,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1091,7 +1148,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts both cacheable and non-cacheable code read requests. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts both cacheable and non-cacheable code read requests.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1100,7 +1157,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1109,7 +1166,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1119,7 +1176,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1129,7 +1185,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1139,7 +1194,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1149,7 +1204,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 outstanding demand data read request is pending. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1159,7 +1213,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1168,7 +1221,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",</div><div class='del'>-        "PublicDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1177,7 +1229,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",</div><div class='del'>-        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1186,7 +1238,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.   Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1195,7 +1247,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2c",</div><div class='ctx'>         "EventName": "SQ_MISC.BUS_LOCK",</div><div class='del'>-        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically.  Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1204,7 +1256,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA, PREFETCHW, PREFETCHT0, PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xf"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1213,7 +1264,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.NTA",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1222,7 +1273,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHW instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHW instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1231,7 +1282,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T0",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1240,7 +1291,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x40",</div><div class='ctx'>         "EventName": "SW_PREFETCH_ACCESS.T1_T2",</div><div class='del'>-        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json<br/>index 8c9207750c82..bc475e163227 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FPDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.FP",</div><div class='del'>-        "PublicDescription": "Counts all microcode Floating Point assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all microcode Floating Point assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.SSE_AVX_MIX",</div><div class='del'>-        "PublicDescription": "ASSISTS.SSE_AVX_MIX Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +30,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_0 [This event is alias to FP_ARITH_DISPATCHED.V0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +38,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_1 [This event is alias to FP_ARITH_DISPATCHED.V1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +46,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.PORT_5",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.PORT_5 [This event is alias to FP_ARITH_DISPATCHED.V2] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +54,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V0",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V0 [This event is alias to FP_ARITH_DISPATCHED.PORT_0] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +62,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V1",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V1 [This event is alias to FP_ARITH_DISPATCHED.PORT_1] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -77,7 +70,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb3",</div><div class='ctx'>         "EventName": "FP_ARITH_DISPATCHED.V2",</div><div class='del'>-        "PublicDescription": "FP_ARITH_DISPATCHED.V2 [This event is alias to FP_ARITH_DISPATCHED.PORT_5] Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -86,7 +78,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -95,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -104,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -113,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -122,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 or/and 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x18"</div><div class='ctx'>     },</div><div class='hunk'>@@ -131,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -140,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -149,7 +141,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision  floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x60"</div><div class='ctx'>     },</div><div class='hunk'>@@ -158,7 +150,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -167,7 +159,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -176,7 +168,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",</div><div class='del'>-        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -185,7 +177,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc7",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED.VECTOR",</div><div class='del'>-        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of any Vector retired FP arithmetic instructions.  The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xfc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -194,7 +186,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -203,7 +194,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -212,7 +202,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -221,7 +210,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -230,7 +218,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -239,7 +227,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR_HALF Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -248,7 +235,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcf",</div><div class='ctx'>         "EventName": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='del'>-        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1c"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json<br/>index 9fe9d62b867a..793c486ffabe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x60",</div><div class='ctx'>         "EventName": "BACLEARS.ANY",</div><div class='del'>-        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.LCP",</div><div class='del'>-        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x87",</div><div class='ctx'>         "EventName": "DECODE.MS_BUSY",</div><div class='del'>-        "PublicDescription": "Cycles the Microcode Sequencer is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -31,7 +30,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x61",</div><div class='ctx'>         "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",</div><div class='del'>-        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -249,7 +248,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -260,7 +259,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x80",</div><div class='ctx'>         "EventName": "ICACHE_DATA.STALL_PERIODS",</div><div class='del'>-        "PublicDescription": "ICACHE_DATA.STALL_PERIODS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -269,7 +267,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x83",</div><div class='ctx'>         "EventName": "ICACHE_TAG.STALLS",</div><div class='del'>-        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",</div><div class='ctx'>         "SampleAfterValue": "200003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -279,7 +277,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -289,7 +287,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the DSB (Decode Stream Buffer) path. Count includes uops that may 'bypass' the IDQ.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -298,7 +296,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.DSB_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -308,7 +306,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles uops were delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -318,7 +316,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles where optimal number of uops was delivered to the Instruction Decode Queue (IDQ) from the MITE (legacy decode pipeline) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -327,7 +325,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MITE_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -337,7 +335,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_CYCLES_ANY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which uops are being delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -348,7 +346,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_SWITCHES",</div><div class='del'>-        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -357,7 +355,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x79",</div><div class='ctx'>         "EventName": "IDQ.MS_UOPS",</div><div class='del'>-        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -366,7 +364,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -376,7 +374,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -387,7 +385,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -396,7 +394,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -406,7 +404,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when no uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -417,7 +415,7 @@</div><div class='ctx'>         "EventCode": "0x9c",</div><div class='ctx'>         "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK] Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of cycles when the optimal number of uops were delivered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json<br/>index 7c3f9b76d367..5e6c1f05c981 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x6"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +13,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",</div><div class='del'>-        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -24,7 +23,6 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -34,7 +32,6 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -44,7 +41,7 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -54,7 +51,7 @@</div><div class='ctx'>         "CounterMask": "9",</div><div class='ctx'>         "EventCode": "0x47",</div><div class='ctx'>         "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding (will not count for uncacheable demand requests e.g. bus lock).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -478,7 +475,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x21",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "Counts demand data read requests that miss the L3 cache. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -487,7 +483,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x20",</div><div class='ctx'>         "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",</div><div class='del'>-        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.  Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -505,7 +501,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_EVENTS",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 3 categories (e.g. interrupt).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -514,7 +510,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEM",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -523,7 +519,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_MEMTYPE",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -532,7 +528,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",</div><div class='del'>-        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -541,7 +537,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.COMMIT",</div><div class='del'>-        "PublicDescription": "Counts the number of times RTM commit succeeded. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times RTM commit succeeded.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -550,7 +546,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc9",</div><div class='ctx'>         "EventName": "RTM_RETIRED.START",</div><div class='del'>-        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -559,7 +555,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_READ",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -568,7 +564,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CAPACITY_WRITE",</div><div class='del'>-        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -577,7 +573,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x54",</div><div class='ctx'>         "EventName": "TX_MEM.ABORT_CONFLICT",</div><div class='del'>-        "PublicDescription": "Counts the number of times a TSX line had a cache conflict. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a TSX line had a cache conflict.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json<br/>index a58d65556609..21f49f609ed4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/other.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/other.json</a></div><div class='hunk'>@@ -4,11 +4,35 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.PAGE_FAULT",</div><div class='del'>-        "PublicDescription": "ASSISTS.PAGE_FAULT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.PENDING_AND_MASKED",</div><div class='add'>+        "SampleAfterValue": "100003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of hardware interrupts received by the processor.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xcb",</div><div class='add'>+        "EventName": "HW_INTERRUPTS.RECEIVED",</div><div class='add'>+        "PublicDescription": "Counts the number of hardware interruptions received by the processor.",</div><div class='add'>+        "SampleAfterValue": "203",</div><div class='add'>+        "UMask": "0x1"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts streaming stores that have any type of response.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x2A,0x2B",</div><div class='hunk'>@@ -25,7 +49,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x2d",</div><div class='ctx'>         "EventName": "XQ.FULL_CYCLES",</div><div class='del'>-        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of cycles when the thread is active and the uncore cannot take any further requests (for example prefetches, loads or stores initiated by the Core that miss the L2 cache).",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json<br/>index 48bec483b49a..1fa7957956df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.DIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -16,7 +15,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.DIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x9"</div><div class='ctx'>     },</div><div class='hunk'>@@ -27,7 +26,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.FP_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.FPDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -37,7 +35,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.IDIV_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event counts the cycles the integer divider is busy. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -48,7 +45,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xb0",</div><div class='ctx'>         "EventName": "ARITH.INT_DIVIDER_ACTIVE",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event ARITH.IDIV_ACTIVE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -57,7 +53,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc1",</div><div class='ctx'>         "EventName": "ASSISTS.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1b"</div><div class='ctx'>     },</div><div class='hunk'>@@ -217,7 +213,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C01",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -226,7 +222,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C02",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.  This state can be entered via the TPAUSE or UMWAIT instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -235,7 +231,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.C0_WAIT",</div><div class='del'>-        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x70"</div><div class='ctx'>     },</div><div class='hunk'>@@ -244,7 +240,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0.  A hyperthread becomes inactive when it executes the HLT or MWAIT instructions.  If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -253,7 +249,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",</div><div class='ctx'>         "SampleAfterValue": "25003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -262,7 +258,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -273,7 +268,6 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xec",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.PAUSE_INST",</div><div class='del'>-        "PublicDescription": "CPU_CLK_UNHALTED.PAUSE_INST Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -282,7 +276,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",</div><div class='del'>-        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -299,7 +293,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",</div><div class='del'>-        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'.  The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'.  After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -316,7 +310,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x3c",</div><div class='ctx'>         "EventName": "CPU_CLK_UNHALTED.THREAD_P",</div><div class='del'>-        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",</div><div class='ctx'>         "SampleAfterValue": "2000003"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -325,7 +319,6 @@</div><div class='ctx'>         "CounterMask": "8",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -335,7 +328,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",</div><div class='del'>-        "PublicDescription": "Cycles while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -345,7 +337,6 @@</div><div class='ctx'>         "CounterMask": "16",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",</div><div class='del'>-        "PublicDescription": "Cycles while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -355,7 +346,6 @@</div><div class='ctx'>         "CounterMask": "12",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L1 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -365,7 +355,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",</div><div class='del'>-        "PublicDescription": "Execution stalls while L2 cache miss demand load is outstanding. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x5"</div><div class='ctx'>     },</div><div class='hunk'>@@ -375,7 +364,6 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xa3",</div><div class='ctx'>         "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",</div><div class='del'>-        "PublicDescription": "Total execution stalls. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -384,7 +372,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb7",</div><div class='ctx'>         "EventName": "EXE.AMX_BUSY",</div><div class='del'>-        "PublicDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -393,7 +380,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -402,7 +389,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 2 or 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -411,7 +397,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -420,7 +406,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -429,7 +415,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",</div><div class='del'>-        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -439,7 +425,6 @@</div><div class='ctx'>         "CounterMask": "5",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",</div><div class='del'>-        "PublicDescription": "Execution stalls while memory subsystem has an outstanding load. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x21"</div><div class='ctx'>     },</div><div class='hunk'>@@ -449,7 +434,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",</div><div class='del'>-        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where the Store Buffer was full and no loads caused an execution stall.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -458,7 +443,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa6",</div><div class='ctx'>         "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",</div><div class='del'>-        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -467,7 +452,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x75",</div><div class='ctx'>         "EventName": "INST_DECODED.DECODERS",</div><div class='del'>-        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -492,7 +477,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.MACRO_FUSED",</div><div class='del'>-        "PublicDescription": "INST_RETIRED.MACRO_FUSED Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -501,7 +485,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.NOP",</div><div class='del'>-        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -518,7 +502,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc0",</div><div class='ctx'>         "EventName": "INST_RETIRED.REP_ITERATION",</div><div class='del'>-        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -529,7 +513,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEARS_COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of speculative clears due to any type of branch misprediction or machine clears",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -538,7 +522,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",</div><div class='del'>-        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -547,7 +531,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.MBA_STALLS",</div><div class='del'>-        "PublicDescription": "INT_MISC.MBA_STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -556,7 +539,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.RECOVERY_CYCLES",</div><div class='del'>-        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",</div><div class='ctx'>         "SampleAfterValue": "500009",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -567,7 +550,6 @@</div><div class='ctx'>         "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x7",</div><div class='del'>-        "PublicDescription": "Bubble cycles of BAClear (Unknown Branch). Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -576,7 +558,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xad",</div><div class='ctx'>         "EventName": "INT_MISC.UOP_DROPPING",</div><div class='del'>-        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -585,7 +567,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.128BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.128BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x13"</div><div class='ctx'>     },</div><div class='hunk'>@@ -594,7 +575,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.256BIT",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.256BIT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xac"</div><div class='ctx'>     },</div><div class='hunk'>@@ -603,7 +583,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_128",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x3"</div><div class='ctx'>     },</div><div class='hunk'>@@ -612,7 +592,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.ADD_256",</div><div class='del'>-        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0xc"</div><div class='ctx'>     },</div><div class='hunk'>@@ -621,7 +601,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.MUL_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.MUL_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -630,7 +609,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.SHUFFLES",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.SHUFFLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -639,7 +617,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_128",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_128 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -648,7 +625,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe7",</div><div class='ctx'>         "EventName": "INT_VEC_RETIRED.VNNI_256",</div><div class='del'>-        "PublicDescription": "INT_VEC_RETIRED.VNNI_256 Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -657,7 +633,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.ADDRESS_ALIAS",</div><div class='del'>-        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -666,7 +642,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.NO_SR",</div><div class='del'>-        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x88"</div><div class='ctx'>     },</div><div class='hunk'>@@ -675,7 +651,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='ctx'>         "EventName": "LD_BLOCKS.STORE_FORWARD",</div><div class='del'>-        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x82"</div><div class='ctx'>     },</div><div class='hunk'>@@ -684,7 +660,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x4c",</div><div class='ctx'>         "EventName": "LOAD_HIT_PREFETCH.SWPF",</div><div class='del'>-        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts all software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -694,7 +670,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -704,7 +680,7 @@</div><div class='ctx'>         "CounterMask": "6",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.CYCLES_OK",</div><div class='del'>-        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -713,7 +689,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa8",</div><div class='ctx'>         "EventName": "LSD.UOPS",</div><div class='del'>-        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -724,7 +700,7 @@</div><div class='ctx'>         "EdgeDetect": "1",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.COUNT",</div><div class='del'>-        "PublicDescription": "Counts the number of machine clears (nukes) of any type. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of machine clears (nukes) of any type.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -733,7 +709,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc3",</div><div class='ctx'>         "EventName": "MACHINE_CLEARS.SMC",</div><div class='del'>-        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -742,7 +718,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xe0",</div><div class='ctx'>         "EventName": "MISC2_RETIRED.LFENCE",</div><div class='del'>-        "PublicDescription": "number of LFENCE retired instructions Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "number of LFENCE retired instructions",</div><div class='ctx'>         "SampleAfterValue": "400009",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -751,7 +727,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xcc",</div><div class='ctx'>         "EventName": "MISC_RETIRED.LBR_INSERTS",</div><div class='del'>-        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -760,7 +736,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SB",</div><div class='del'>-        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -769,7 +745,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa2",</div><div class='ctx'>         "EventName": "RESOURCE_STALLS.SCOREBOARD",</div><div class='del'>-        "PublicDescription": "Counts cycles where the pipeline is stalled due to serializing operations. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -778,7 +753,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY",</div><div class='del'>-        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -790,7 +765,7 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events) Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (see the FRONTEND_RETIRED event of designated precise events)",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -799,7 +774,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS.EMPTY_RESOURCE",</div><div class='del'>-        "PublicDescription": "Cycles when Reservation Station (RS) is empty due to a resource in the back-end Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -812,7 +786,6 @@</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.COUNT",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -822,7 +795,6 @@</div><div class='ctx'>         "Deprecated": "1",</div><div class='ctx'>         "EventCode": "0xa5",</div><div class='ctx'>         "EventName": "RS_EMPTY.CYCLES",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event RS.EMPTY Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x7"</div><div class='ctx'>     },</div><div class='hunk'>@@ -831,7 +803,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -840,7 +812,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BAD_SPEC_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of slots of TMA method that were wasted due to incorrect speculation. It covers all types of control-flow or data-related mis-speculations.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -849,7 +821,7 @@</div><div class='ctx'>         "Counter": "0",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",</div><div class='del'>-        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by (any type of) branch mispredictions. This event estimates number of speculative operations that were issued but not retired as well as the out-of-order engine recovery past a branch misprediction.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -858,7 +830,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",</div><div class='del'>-        "PublicDescription": "TOPDOWN.MEMORY_BOUND_SLOTS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -875,7 +846,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xa4",</div><div class='ctx'>         "EventName": "TOPDOWN.SLOTS_P",</div><div class='del'>-        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",</div><div class='ctx'>         "SampleAfterValue": "10000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -884,7 +855,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x76",</div><div class='ctx'>         "EventName": "UOPS_DECODED.DEC0_UOPS",</div><div class='del'>-        "PublicDescription": "UOPS_DECODED.DEC0_UOPS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -893,7 +863,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_0",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 0. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 0.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -902,7 +872,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_1",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 1. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 1.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -911,7 +881,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_2_3_10",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -920,7 +890,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_4_9",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -929,7 +899,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_5_11",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11 Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -938,7 +908,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_6",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  port 6. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  port 6.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x40"</div><div class='ctx'>     },</div><div class='hunk'>@@ -947,7 +917,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb2",</div><div class='ctx'>         "EventName": "UOPS_DISPATCHED.PORT_7_8",</div><div class='del'>-        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Number of uops dispatch to execution  ports 7 and 8.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='hunk'>@@ -956,7 +926,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE",</div><div class='del'>-        "PublicDescription": "Counts the number of uops executed from any thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops executed from any thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -966,7 +936,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -976,7 +946,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -986,7 +956,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -996,7 +966,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on physical core.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1006,7 +976,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_1",</div><div class='del'>-        "PublicDescription": "Cycles where at least 1 uop was executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1016,7 +986,7 @@</div><div class='ctx'>         "CounterMask": "2",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_2",</div><div class='del'>-        "PublicDescription": "Cycles where at least 2 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1026,7 +996,7 @@</div><div class='ctx'>         "CounterMask": "3",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_3",</div><div class='del'>-        "PublicDescription": "Cycles where at least 3 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1036,7 +1006,7 @@</div><div class='ctx'>         "CounterMask": "4",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.CYCLES_GE_4",</div><div class='del'>-        "PublicDescription": "Cycles where at least 4 uops were executed per-thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1047,7 +1017,7 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles during which no uops were dispatched from the Reservation Station (RS) per thread.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1059,7 +1029,6 @@</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_EXECUTED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1068,7 +1037,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.THREAD",</div><div class='del'>-        "PublicDescription": "Counts the number of uops to be executed per-thread each cycle. Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1077,7 +1045,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xb1",</div><div class='ctx'>         "EventName": "UOPS_EXECUTED.X87",</div><div class='del'>-        "PublicDescription": "Counts the number of x87 uops executed. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of x87 uops executed.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1086,7 +1054,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.ANY",</div><div class='del'>-        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1096,7 +1064,6 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xae",</div><div class='ctx'>         "EventName": "UOPS_ISSUED.CYCLES",</div><div class='del'>-        "PublicDescription": "UOPS_ISSUED.CYCLES Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1106,7 +1073,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.CYCLES",</div><div class='del'>-        "PublicDescription": "Counts cycles where at least one uop has retired. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles where at least one uop has retired.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1115,7 +1082,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.HEAVY",</div><div class='del'>-        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1126,7 +1093,6 @@</div><div class='ctx'>         "EventName": "UOPS_RETIRED.MS",</div><div class='ctx'>         "MSRIndex": "0x3F7",</div><div class='ctx'>         "MSRValue": "0x8",</div><div class='del'>-        "PublicDescription": "UOPS_RETIRED.MS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1135,7 +1101,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.SLOTS",</div><div class='del'>-        "PublicDescription": "Counts the retirement slots used each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the retirement slots used each cycle.",</div><div class='ctx'>         "SampleAfterValue": "2000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1146,7 +1112,7 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALLS",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event counts cycles without actually retired uops. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "This event counts cycles without actually retired uops.",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1158,7 +1124,6 @@</div><div class='ctx'>         "EventCode": "0xc2",</div><div class='ctx'>         "EventName": "UOPS_RETIRED.STALL_CYCLES",</div><div class='ctx'>         "Invert": "1",</div><div class='del'>-        "PublicDescription": "This event is deprecated. Refer to new event UOPS_RETIRED.STALLS Available PDIST counters: 0",</div><div class='ctx'>         "SampleAfterValue": "1000003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json<br/>index fe3f288be10e..b6a28227a58a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json</a></div><div class='hunk'>@@ -1,28 +1,28 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -40,6 +40,18 @@</div><div class='ctx'>         "ScaleUnit": "1per_instr"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU)",</div><div class='add'>+        "MetricExpr": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0 / UNC_P_CLOCKTICKS * #num_packages",</div><div class='add'>+        "MetricGroup": "cpu_cstate",</div><div class='add'>+        "MetricName": "cpu_cstate_c0"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU)",</div><div class='add'>+        "MetricExpr": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6 / UNC_P_CLOCKTICKS * #num_packages",</div><div class='add'>+        "MetricGroup": "cpu_cstate",</div><div class='add'>+        "MetricName": "cpu_cstate_c6"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CPU operating frequency (in GHz)",</div><div class='ctx'>         "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC * #SYSTEM_TSC_FREQ / 1e9",</div><div class='ctx'>         "MetricName": "cpu_operating_frequency",</div><div class='hunk'>@@ -91,6 +103,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO reads that are initiated by end device controllers that are requesting memory from the CPU and miss the L3 cache",</div><div class='add'>+        "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_read_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO reads that are initiated by end device controllers that are requesting memory from the local CPU socket",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_LOCAL * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_read_local",</div><div class='hunk'>@@ -109,6 +127,12 @@</div><div class='ctx'>         "ScaleUnit": "1MB/s"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Bandwidth of inbound IO writes that are initiated by end device controllers that are writing memory to the CPU",</div><div class='add'>+        "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOM + UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR) * 64 / 1e6 / duration_time",</div><div class='add'>+        "MetricName": "io_bandwidth_write_l3_miss",</div><div class='add'>+        "ScaleUnit": "1MB/s"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Bandwidth of IO writes that are initiated by end device controllers that are writing memory to the local CPU socket",</div><div class='ctx'>         "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL + UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL) * 64 / 1e6 / duration_time",</div><div class='ctx'>         "MetricName": "io_bandwidth_write_local",</div><div class='hunk'>@@ -123,19 +147,19 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound full cacheline writes initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM / UNC_CHA_TOR_INSERTS.IO_ITOM",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_full_writes_that_miss_l3",</div><div class='add'>+        "MetricName": "io_full_write_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound partial cacheline writes initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "(UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_MISS_RFO) / (UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_RFO)",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_partial_writes_that_miss_l3",</div><div class='add'>+        "MetricName": "io_partial_write_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Percentage of inbound reads initiated by end device controllers that miss the L3 cache",</div><div class='ctx'>         "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR / UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",</div><div class='del'>-        "MetricName": "io_percent_of_inbound_reads_that_miss_l3",</div><div class='add'>+        "MetricName": "io_read_l3_miss",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -395,7 +419,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots where no uops are being delivered due to a lack of required resources for accepting new uops in the Backend",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-be\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvOB;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_backend_bound",</div><div class='ctx'>         "MetricThreshold": "tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -430,39 +454,39 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * tma_amx_busy / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - (1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricExpr": "100 * ((1 - INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.MS\\,cmask\\=1@) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * tma_other_mispredicts / tma_branch_mispredicts) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + RS.EMPTY_RESOURCE / tma_info_thread_clks * tma_ports_utilized_0) / (tma_amx_busy + tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -470,7 +494,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_data_tlbs &gt; 20",</div><div class='hunk'>@@ -478,7 +502,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='del'>-        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='add'>+        "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_cxl_mem_bound + tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_memory_synchronization &gt; 10",</div><div class='hunk'>@@ -494,7 +518,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -510,7 +534,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Branch Misprediction",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-br\\-mispredict / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;Default;TmaL2;TopdownL2;tma_L2_group;tma_bad_speculation_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_branch_mispredicts",</div><div class='ctx'>         "MetricThreshold": "tma_branch_mispredicts &gt; 0.1 &amp; tma_bad_speculation &gt; 0.15",</div><div class='hunk'>@@ -611,7 +635,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(76.6 * tma_info_system_core_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) + 74.6 * tma_info_system_core_frequency * MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvMS;DataSharing;LockCont;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_contested_accesses",</div><div class='hunk'>@@ -631,6 +654,15 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g",</div><div class='add'>+        "MetricExpr": "(((1 - ((19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS))) / (19 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + 10 * (MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) + MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS)) + (25 * (MEM_LOAD_RETIRED.LOCAL_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0) + 33 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS) if #has_pmem &gt; 0 else 0))) if #has_pmem &gt; 0 else 1)) * (MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks) if 1e6 * (MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM + MEM_LOAD_RETIRED.LOCAL_PMM) &gt; MEM_LOAD_RETIRED.L1_MISS else 0) if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemoryBound;Server;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='add'>+        "MetricName": "tma_cxl_mem_bound",</div><div class='add'>+        "MetricThreshold": "tma_cxl_mem_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='add'>+        "PublicDescription": "This metric roughly estimates (based on idle latencies) how often the CPU was stalled on accesses to external CXL Memory by loads (e.g. 3D-Xpoint (Crystal Ridge, a.k.a. IXP) memory, PMM - Persistent Memory Module [from CLX to SPR] or any other CXL Type3 Memory [EMR onwards]).",</div><div class='add'>+        "ScaleUnit": "100%"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",</div><div class='ctx'>         "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "74.6 * tma_info_system_core_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD + MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * (1 - OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='hunk'>@@ -660,7 +692,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",</div><div class='del'>-        "MetricExpr": "MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks",</div><div class='add'>+        "MetricExpr": "(MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks - tma_cxl_mem_bound if #has_pmem &gt; 0 else MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_dram_bound",</div><div class='ctx'>         "MetricThreshold": "tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2)",</div><div class='hunk'>@@ -718,7 +750,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -846,7 +878,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring heavy-weight operations -- instructions that require two or more uops or micro-coded sequences",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-heavy\\-ops / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Default;Retire;TmaL2;TopdownL2;tma_L2_group;tma_retiring_group",</div><div class='ctx'>         "MetricName": "tma_heavy_operations",</div><div class='ctx'>         "MetricThreshold": "tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1357,19 +1389,19 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for modified write requests",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.MODIFIED_WRITE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_mwrite_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Off-core accesses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.ANY_RESPONSE / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "CacheHits;Offcore",</div><div class='add'>+        "MetricGroup": "CacheHits;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_any_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "L3 cache misses per kilo instruction for reads-to-core requests (speculative; including in-core HW prefetches)",</div><div class='ctx'>         "MetricExpr": "1e3 * OCR.READS_TO_CORE.L3_MISS / tma_info_inst_mix_instructions",</div><div class='del'>-        "MetricGroup": "Offcore",</div><div class='add'>+        "MetricGroup": "Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_mix_offcore_read_l3m_pki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1395,21 +1427,21 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.DRAM / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_dram_bw",</div><div class='ctx'>         "PublicDescription": "Average DRAM BW for Reads-to-Core (R2C) covering for memory attached to local- and remote-socket. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average L3-cache miss BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.L3_MISS / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_l3m_bw",</div><div class='ctx'>         "PublicDescription": "Average L3-cache miss BW for Reads-to-Core (R2C). This covering going to DRAM or other memory off-chip memory tears. See R2C_Offcore_BW."</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average Off-core access BW for Reads-to-Core (R2C)",</div><div class='ctx'>         "MetricExpr": "64 * OCR.READS_TO_CORE.ANY_RESPONSE / 1e9 / tma_info_system_time",</div><div class='del'>-        "MetricGroup": "HPC;Mem;MemoryBW;SoC",</div><div class='add'>+        "MetricGroup": "HPC;Mem;MemoryBW;Offcore;Server",</div><div class='ctx'>         "MetricName": "tma_info_memory_soc_r2c_offcore_bw",</div><div class='ctx'>         "PublicDescription": "Average Off-core access BW for Reads-to-Core (R2C). R2C account for demand or prefetch load/RFO/code access that fill data into the Core caches."</div><div class='ctx'>     },</div><div class='hunk'>@@ -1439,7 +1471,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1486,7 +1518,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1498,16 +1530,28 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_RPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_read_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",</div><div class='add'>+        "MetricExpr": "(64 * UNC_M_PMM_WPQ_INSERTS / 1e9 / tma_info_system_time if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryBW;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_cxl_mem_write_bw"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT.RD + UNC_M_CAS_COUNT.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1572,8 +1616,14 @@</div><div class='ctx'>         "PublicDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]",</div><div class='add'>+        "MetricExpr": "(1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM) / uncore_cha_0@event\\=0x1@ if #has_pmem &gt; 0 else 0)",</div><div class='add'>+        "MetricGroup": "MemOffcore;MemoryLat;Server;SoC",</div><div class='add'>+        "MetricName": "tma_info_system_mem_pmm_read_latency",</div><div class='add'>+        "PublicDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD) / (tma_info_system_socket_clks / tma_info_system_time)",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryLat;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_read_latency",</div><div class='hunk'>@@ -1734,12 +1784,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - MEMORY_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1753,7 +1803,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles with demand load accesses that hit the L2 cache under unloaded scenarios (possibly L2 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "4.4 * tma_info_system_core_frequency * MEM_LOAD_RETIRED.L2_HIT * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "MemoryLat;TopdownL4;tma_L4_group;tma_l2_bound_group",</div><div class='ctx'>         "MetricName": "tma_l2_hit_latency",</div><div class='hunk'>@@ -1772,12 +1821,11 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "32.6 * tma_info_system_core_frequency * (MEM_LOAD_RETIRED.L3_HIT * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1860,6 +1908,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(16 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (10 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1892,7 +1941,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1901,13 +1950,13 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the Memory subsystem within the Backend was a bottleneck",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL2",</div><div class='del'>-        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-mem\\-bound / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "Backend;Default;TmaL2;TopdownL2;tma_L2_group;tma_backend_bound_group",</div><div class='ctx'>         "MetricName": "tma_memory_bound",</div><div class='ctx'>         "MetricThreshold": "tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2",</div><div class='hunk'>@@ -1917,7 +1966,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * MISC2_RETIRED.LFENCE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_memory_fence",</div><div class='hunk'>@@ -1970,7 +2018,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "max(IDQ.MS_CYCLES_ANY, cpu@UOPS_RETIRED.MS\\,cmask\\=1@ / (UOPS_RETIRED.SLOTS / UOPS_ISSUED.ANY)) / tma_info_core_core_clks / 2.4",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -2005,6 +2053,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -2066,6 +2115,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIV_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - EXE_ACTIVITY.BOUND_ON_LOADS else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_3_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -2075,6 +2125,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed no uops on any execution port (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "(EXE_ACTIVITY.EXE_BOUND_0_PORTS + max(RS.EMPTY_RESOURCE - RESOURCE_STALLS.SCOREBOARD, 0)) / tma_info_thread_clks * (CYCLE_ACTIVITY.STALLS_TOTAL - EXE_ACTIVITY.BOUND_ON_LOADS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_0",</div><div class='hunk'>@@ -2084,6 +2135,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='add'>+        "MetricConstraint": "NO_THRESHOLD_AND_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.1_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_1",</div><div class='hunk'>@@ -2093,7 +2145,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "EXE_ACTIVITY.2_PORTS_UTIL / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_2",</div><div class='hunk'>@@ -2103,7 +2154,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.CYCLES_GE_3 / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvCB;PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilized_3m",</div><div class='hunk'>@@ -2132,7 +2182,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -2160,7 +2210,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "CPU_CLK_UNHALTED.PAUSE / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_serializing_operation_group",</div><div class='ctx'>         "MetricName": "tma_slow_pause",</div><div class='hunk'>@@ -2192,7 +2241,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json<br/>index a38db3e253f2..1bdda3c3ccbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json</a></div><div class='hunk'>@@ -312,6 +312,17 @@</div><div class='ctx'>         "Unit": "CHA"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Distress signal asserted : DPT Remote",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0xaf",</div><div class='add'>+        "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Distress signal asserted : DPT Remote : Counts the number of cycles either the local or incoming distress signals are asserted. : Dynamic Prefetch Throttle received by this tile",</div><div class='add'>+        "UMask": "0x8",</div><div class='add'>+        "Unit": "CHA"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Egress Blocking due to Ordering requirements : Down",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0xba",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json<br/>index 68be01dad7c9..30044177ccf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json</a></div><div class='hunk'>@@ -2770,6 +2770,88 @@</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",</div><div class='add'>+        "UMask": "0x24",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_ALL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x24",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_PCH0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x4",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.HIGH_PCH1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Number of DRAM Refreshes Issued : Counts the number of refreshes issued.",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_ALL",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x12",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_PCH0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Number of DRAM Refreshes Issued",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x45",</div><div class='add'>+        "EventName": "UNC_M_DRAM_REFRESH.PANIC_PCH1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x10",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "ECC Correctable Errors",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x09",</div><div class='hunk'>@@ -3048,6 +3130,28 @@</div><div class='ctx'>         "Unit": "iMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Throttle Cycles for Rank 0",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT0",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Throttle Cycles for Rank 0 : Counts the number of cycles while the iMC is being throttled by either thermal constraints or by the PCU throttling.  It is not possible to distinguish between the two.  This can be filtered by rank.  If multiple ranks are selected and are being throttled at the same time, the counter will only increment by 1. : Thermal throttling is performed per DIMM.  We support 3 DIMMs per channel.  This ID allows us to filter by ID.",</div><div class='add'>+        "UMask": "0x1",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Throttle Cycles for Rank 0",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x46",</div><div class='add'>+        "EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT1",</div><div class='add'>+        "Experimental": "1",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PublicDescription": "Throttle Cycles for Rank 0 : Counts the number of cycles while the iMC is being throttled by either thermal constraints or by the PCU throttling.  It is not possible to distinguish between the two.  This can be filtered by rank.  If multiple ranks are selected and are being throttled at the same time, the counter will only increment by 1.",</div><div class='add'>+        "UMask": "0x2",</div><div class='add'>+        "Unit": "iMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Precharge due to read, write, underfill, or PGT.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x03",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json<br/>index 9482ddaea4d1..71c35b165a3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json</a></div><div class='hunk'>@@ -178,7 +178,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x35",</div><div class='ctx'>         "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PublicDescription": "Number of cores in C0 : This is an occupancy event that tracks the number of cores that are in the chosen C-State.  It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",</div><div class='ctx'>         "Unit": "PCU"</div><div class='hunk'>@@ -198,7 +197,6 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x37",</div><div class='ctx'>         "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PublicDescription": "Number of cores in C6 : This is an occupancy event that tracks the number of cores that are in the chosen C-State.  It can be used by itself to get the average number of cores in that C-state with thresholding to generate histograms, or with other PCU events and occupancy triggering to capture other details.",</div><div class='ctx'>         "Unit": "PCU"</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json<br/>index 3d3f88600e26..609a9549cbf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='ctx'>         "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -68,7 +68,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -87,7 +87,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -96,7 +96,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x8"</div><div class='ctx'>     },</div><div class='hunk'>@@ -105,7 +105,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -114,7 +114,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks  (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -123,7 +123,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x13",</div><div class='ctx'>         "EventName": "DTLB_STORE_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -132,7 +132,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.STLB_HIT",</div><div class='del'>-        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB). Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x20"</div><div class='ctx'>     },</div><div class='hunk'>@@ -142,7 +142,7 @@</div><div class='ctx'>         "CounterMask": "1",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_ACTIVE",</div><div class='del'>-        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a code (instruction fetch) request.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     },</div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0xe"</div><div class='ctx'>     },</div><div class='hunk'>@@ -160,7 +160,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x4"</div><div class='ctx'>     },</div><div class='hunk'>@@ -169,7 +169,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",</div><div class='del'>-        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x2"</div><div class='ctx'>     },</div><div class='hunk'>@@ -178,7 +178,7 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x11",</div><div class='ctx'>         "EventName": "ITLB_MISSES.WALK_PENDING",</div><div class='del'>-        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle. Available PDIST counters: 0",</div><div class='add'>+        "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",</div><div class='ctx'>         "SampleAfterValue": "100003",</div><div class='ctx'>         "UMask": "0x10"</div><div class='ctx'>     }</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/cache.json b/tools/perf/pmu-events/arch/x86/sierraforest/cache.json<br/>index 877052db1490..de0e7661a52d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/cache.json</a></div><div class='hunk'>@@ -163,6 +163,14 @@</div><div class='ctx'>         "UMask": "0x6"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which hit in the LLC, no snoop was required. LLC provides the data. If the core has access to an L3 cache, an LLC hit refers to an L3 cache hit, otherwise it counts zeros.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0x34",</div><div class='add'>+        "EventName": "MEM_BOUND_STALLS_LOAD.LLC_HIT_NOSNOOP",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which missed all the local caches. If the core has access to an L3 cache, an LLC miss refers to an L3 cache miss, otherwise it is an L2 cache miss.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0x34",</div><div class='hunk'>@@ -179,6 +187,14 @@</div><div class='ctx'>         "UMask": "0x80"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the total number of load ops retired that miss the L3 cache.",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.ALL",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0xff"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in DRAM",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd3",</div><div class='hunk'>@@ -187,6 +203,31 @@</div><div class='ctx'>         "UMask": "0x1"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in a Remote DRAM",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM_OR_NOFWD",</div><div class='add'>+        "PublicDescription": "Counts the number of load ops retired that miss the L3 cache and hit in a Remote DRAM, OR had a Remote snoop miss/no fwd and hit in the Local Dram",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x2"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in a Remote Cache and modified data was forwarded",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD_HITM",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x8"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "Counts the number of load ops retired that miss the L3 cache and hit in a Remote Cache and non-modified data was forwarded",</div><div class='add'>+        "Counter": "0,1,2,3,4,5,6,7",</div><div class='add'>+        "EventCode": "0xd3",</div><div class='add'>+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD_NONM",</div><div class='add'>+        "SampleAfterValue": "1000003",</div><div class='add'>+        "UMask": "0x4"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of load ops retired that hit the L1 data cache.",</div><div class='ctx'>         "Counter": "0,1,2,3,4,5,6,7",</div><div class='ctx'>         "EventCode": "0xd1",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json b/tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json<br/>index b9f3c611d87b..ca2c55917e55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/srf-metrics.json</a></div><div class='hunk'>@@ -1,56 +1,56 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C1 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c1\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c1\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C1_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -735,7 +735,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average CPU Utilization",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricName": "tma_info_system_cpu_utilization"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -747,7 +747,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Fraction of cycles spent in Kernel mode",</div><div class='del'>-        "MetricExpr": "cpu@CPU_CLK_UNHALTED.CORE_P@k / CPU_CLK_UNHALTED.CORE",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.CORE_P:k / CPU_CLK_UNHALTED.CORE",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_kernel_utilization"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json b/tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json<br/>index 3d1fb5f0417e..35b1763b0020 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-cache.json</a></div><div class='hunk'>@@ -10,6 +10,15 @@</div><div class='ctx'>         "Unit": "CHACMS"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "UNC_CHACMS_DISTRESS_ASSERTED",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x35",</div><div class='add'>+        "EventName": "UNC_CHACMS_DISTRESS_ASSERTED",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "PortMask": "0x000",</div><div class='add'>+        "Unit": "CHACMS"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Counts the number of cycles FAST trigger is received from the global FAST distress wire.",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x34",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json<br/>index 952b6de3fefc..251e5d20fefe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-interconnect.json</a></div><div class='hunk'>@@ -839,12 +839,20 @@</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x1F",</div><div class='ctx'>         "EventName": "UNC_I_MISC1.LOST_FWD",</div><div class='del'>-        "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "IRP"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Misc Events - Set 1 : Received Invalid : Secondary received a transfer that did not have sufficient MESI state",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x1F",</div><div class='add'>+        "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0x20",</div><div class='add'>+        "Unit": "IRP"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Snoop Hit E/S responses",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x12",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json b/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json<br/>index f4f956966e16..2ea2637df3fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-io.json</a></div><div class='hunk'>@@ -1321,7 +1321,6 @@</div><div class='ctx'>         "FCMask": "0x01",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "PortMask": "0x0FF",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IIO"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json b/tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json<br/>index c7e9dbe02eb0..a9fd7a34b24b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/sierraforest/uncore-memory.json</a></div><div class='hunk'>@@ -60,6 +60,33 @@</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 0 regular reads",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_NON_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc3",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 auto-precharge reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_PRE_REG",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc2",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 auto-precharge underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_PRE_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc8",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 regular reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='ctx'>         "EventName": "UNC_M_CAS_COUNT_SCH0.RD_REG",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='hunk'>@@ -75,6 +102,15 @@</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 0 underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x05",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH0.RD_UNDERFILL_ALL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xcc",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 0, all writes",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x05",</div><div class='hunk'>@@ -125,6 +161,33 @@</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 1 regular reads",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_NON_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc3",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 auto-precharge reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_PRE_REG",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc2",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 auto-precharge underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_PRE_UNDERFILL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xc8",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 regular reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='ctx'>         "EventName": "UNC_M_CAS_COUNT_SCH1.RD_REG",</div><div class='ctx'>         "PerPkg": "1",</div><div class='ctx'>         "UMask": "0xc1",</div><div class='hunk'>@@ -140,6 +203,15 @@</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "CAS count for SubChannel 1 underfill reads",</div><div class='add'>+        "Counter": "0,1,2,3",</div><div class='add'>+        "EventCode": "0x06",</div><div class='add'>+        "EventName": "UNC_M_CAS_COUNT_SCH1.RD_UNDERFILL_ALL",</div><div class='add'>+        "PerPkg": "1",</div><div class='add'>+        "UMask": "0xcc",</div><div class='add'>+        "Unit": "IMC"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "CAS count for SubChannel 1, all writes",</div><div class='ctx'>         "Counter": "0,1,2,3",</div><div class='ctx'>         "EventCode": "0x06",</div><div class='hunk'>@@ -195,7 +267,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH0_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -206,7 +277,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH0_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -217,7 +287,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH1_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -228,7 +297,6 @@</div><div class='ctx'>         "EventName": "UNC_M_MR4_2XREF_CYCLES.SCH1_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -239,7 +307,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH0_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -250,7 +317,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH0_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -261,7 +327,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH1_DIMM0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -272,7 +337,6 @@</div><div class='ctx'>         "EventName": "UNC_M_PDC_MR4ACTIVE_CYCLES.SCH1_DIMM1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -283,7 +347,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -294,7 +357,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -305,7 +367,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK2",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -316,7 +377,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH0_RANK3",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -327,7 +387,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x10",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -338,7 +397,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x20",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -349,7 +407,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK2",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x40",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -360,7 +417,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWERDOWN_CYCLES.SCH1_RANK3",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x80",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -371,7 +427,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CHANNEL_PPD_CYCLES",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -381,7 +436,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -392,7 +446,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -423,7 +476,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_THROTTLE_CYCLES.MR4BLKEN",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x8",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -434,7 +486,6 @@</div><div class='ctx'>         "EventName": "UNC_M_POWER_THROTTLE_CYCLES.RAPLBLK",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x4",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -617,7 +668,6 @@</div><div class='ctx'>         "EventName": "UNC_M_SELF_REFRESH.ENTER_SUCCESS",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "UNC_M_SELF_REFRESH.ENTER_SUCCESS",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -628,7 +678,6 @@</div><div class='ctx'>         "EventName": "UNC_M_SELF_REFRESH.ENTER_SUCCESS_CYCLES",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -639,7 +688,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_CRIT_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -650,7 +698,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_CRIT_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -661,7 +708,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_HIGH_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -672,7 +718,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_HIGH_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -683,7 +728,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_LOW_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -694,7 +738,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_LOW_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -705,7 +748,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_MID_CYCLES.SLOT0",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x1",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='hunk'>@@ -716,7 +758,6 @@</div><div class='ctx'>         "EventName": "UNC_M_THROTTLE_MID_CYCLES.SLOT1",</div><div class='ctx'>         "Experimental": "1",</div><div class='ctx'>         "PerPkg": "1",</div><div class='del'>-        "PublicDescription": "-",</div><div class='ctx'>         "UMask": "0x2",</div><div class='ctx'>         "Unit": "IMC"</div><div class='ctx'>     },</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json b/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json<br/>index 2d3a037e88b5..707bd8790ed2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/skylake/skl-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -80,6 +80,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -117,6 +118,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -131,31 +133,35 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='hunk'>@@ -163,6 +169,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='hunk'>@@ -171,6 +178,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='hunk'>@@ -179,6 +187,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='hunk'>@@ -187,6 +196,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -195,7 +205,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -203,6 +214,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -230,6 +242,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -391,7 +404,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -454,7 +467,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction the CPU has retired aggregated across all vector widths",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "FP_ARITH_INST_RETIRED.VECTOR / UOPS_RETIRED.RETIRE_SLOTS",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector",</div><div class='hunk'>@@ -520,6 +532,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Branch Misprediction Cost: Cycles representing fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "tma_bottleneck_mispredictions * tma_info_thread_slots / 4 / BR_MISP_RETIRED.ALL_BRANCHES / 100",</div><div class='ctx'>         "MetricGroup": "Bad;BrMispredicts;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_info_bad_spec_branch_misprediction_cost",</div><div class='hunk'>@@ -555,6 +568,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_mite)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -572,6 +586,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Instruction Cache misses - subset of the Big_Code Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_fetch_latency * tma_icache_misses / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Fed;FetchLat;IcMiss;tma_issueFL",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_ic_misses",</div><div class='hunk'>@@ -713,7 +728,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ARITH_INST_RETIRED.SCALAR + FP_ARITH_INST_RETIRED.VECTOR)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith",</div><div class='hunk'>@@ -975,7 +989,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -993,6 +1007,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ASSIST.ANY + OTHER_ASSISTS.ANY)",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1008,7 +1028,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1020,7 +1040,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1029,7 +1049,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_ARB_TRK_REQUESTS.ALL + UNC_ARB_COH_TRK_REQUESTS.ALL) / 1e6 / tma_info_system_time / 1e3",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1175,12 +1195,13 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1217,7 +1238,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1241,6 +1262,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1267,6 +1289,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_1G / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_1g",</div><div class='hunk'>@@ -1275,6 +1298,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_2m",</div><div class='hunk'>@@ -1283,6 +1307,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_4K / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_4k",</div><div class='hunk'>@@ -1291,6 +1316,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(12 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (9 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1315,7 +1341,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1324,7 +1350,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1348,7 +1374,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU was retiring uops fetched by the Microcode Sequencer (MS) unit",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY * IDQ.MS_UOPS / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_heavy_operations_group;tma_issueMC;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_microcode_sequencer",</div><div class='hunk'>@@ -1358,6 +1383,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch Resteers as a result of Branch Misprediction at execution stage",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "BR_MISP_RETIRED.ALL_BRANCHES / (BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT) * INT_MISC.CLEAR_RESTEER_CYCLES / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TopdownL4;tma_L4_group;tma_branch_resteers_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_mispredicts_resteers",</div><div class='hunk'>@@ -1412,6 +1438,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -1421,6 +1448,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of slots the CPU was stalled due to other cases of misprediction (non-retired x86 branches or other types).",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_branch_mispredicts * (1 - BR_MISP_RETIRED.ALL_BRANCHES / (INT_MISC.CLEARS_COUNT - MACHINE_CLEARS.COUNT)), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BrMispredicts;BvIO;TopdownL3;tma_L3_group;tma_branch_mispredicts_group",</div><div class='ctx'>         "MetricName": "tma_other_mispredicts",</div><div class='hunk'>@@ -1429,6 +1457,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Nukes (Machine Clears) not related to memory ordering.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_machine_clears * (1 - MACHINE_CLEARS.MEMORY_ORDERING / MACHINE_CLEARS.COUNT), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BvIO;Machine_Clears;TopdownL3;tma_L3_group;tma_machine_clears_group",</div><div class='ctx'>         "MetricName": "tma_other_nukes",</div><div class='hunk'>@@ -1509,6 +1538,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIVIDER_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - CYCLE_ACTIVITY.STALLS_MEM_ANY else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -1595,7 +1625,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1652,6 +1682,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_1G / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_1g",</div><div class='hunk'>@@ -1660,6 +1691,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_2m",</div><div class='hunk'>@@ -1668,6 +1700,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_4K / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_4k",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json b/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json<br/>index 7cc7b076c3e2..56c2caaafef4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json</a></div><div class='hunk'>@@ -1,49 +1,49 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -301,6 +301,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_0 + UOPS_DISPATCHED_PORT.PORT_1 + UOPS_DISPATCHED_PORT.PORT_5 + UOPS_DISPATCHED_PORT.PORT_6) / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_alu_op_utilization",</div><div class='hunk'>@@ -338,6 +339,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -352,31 +354,35 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='hunk'>@@ -384,6 +390,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + tma_mispredicts_resteers * (10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts)) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='hunk'>@@ -392,6 +399,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='hunk'>@@ -400,6 +408,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) * tma_remote_cache / (tma_local_mem + tma_remote_cache + tma_remote_mem) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='hunk'>@@ -408,6 +417,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -416,7 +426,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -424,6 +435,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -451,6 +463,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU retired uops originated from CISC (complex instruction set computer) instruction",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_microcode_sequencer - tma_assists)",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_microcode_sequencer_group",</div><div class='ctx'>         "MetricName": "tma_cisc",</div><div class='hunk'>@@ -612,7 +625,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -675,7 +688,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric approximates arithmetic floating-point (FP) vector uops fraction the CPU has retired aggregated across all vector widths",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "cpu@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0xfc@ / UOPS_RETIRED.RETIRE_SLOTS",</div><div class='ctx'>         "MetricGroup": "Compute;Flops;TopdownL4;tma_L4_group;tma_fp_arith_group;tma_issue2P",</div><div class='ctx'>         "MetricName": "tma_fp_vector",</div><div class='hunk'>@@ -750,6 +762,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Branch Misprediction Cost: Cycles representing fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "tma_bottleneck_mispredictions * tma_info_thread_slots / 4 / BR_MISP_RETIRED.ALL_BRANCHES / 100",</div><div class='ctx'>         "MetricGroup": "Bad;BrMispredicts;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_info_bad_spec_branch_misprediction_cost",</div><div class='hunk'>@@ -785,6 +798,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_mite)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -802,6 +816,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Instruction Cache misses - subset of the Big_Code Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_fetch_latency * tma_icache_misses / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Fed;FetchLat;IcMiss;tma_issueFL",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_ic_misses",</div><div class='hunk'>@@ -943,7 +958,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ARITH_INST_RETIRED.SCALAR + cpu@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0xfc@)",</div><div class='ctx'>         "MetricGroup": "Flops;InsType",</div><div class='ctx'>         "MetricName": "tma_info_inst_mix_iparith",</div><div class='hunk'>@@ -1225,7 +1239,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1243,6 +1257,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / (FP_ASSIST.ANY + OTHER_ASSISTS.ANY)",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1258,7 +1278,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1270,7 +1290,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1279,7 +1299,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_M_CAS_COUNT.RD + UNC_M_CAS_COUNT.WR) / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1475,12 +1495,13 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1517,7 +1538,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1541,6 +1562,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(UOPS_DISPATCHED_PORT.PORT_2 + UOPS_DISPATCHED_PORT.PORT_3 + UOPS_DISPATCHED_PORT.PORT_7 - UOPS_DISPATCHED_PORT.PORT_4) / (2 * tma_info_core_core_clks)",</div><div class='ctx'>         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",</div><div class='ctx'>         "MetricName": "tma_load_op_utilization",</div><div class='hunk'>@@ -1567,6 +1589,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_1G / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_1g",</div><div class='hunk'>@@ -1575,6 +1598,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_2m",</div><div class='hunk'>@@ -1583,6 +1607,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data load accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_load_stlb_miss * DTLB_LOAD_MISSES.WALK_COMPLETED_4K / (DTLB_LOAD_MISSES.WALK_COMPLETED_4K + DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M + DTLB_LOAD_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_load_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_load_stlb_miss_4k",</div><div class='hunk'>@@ -1600,6 +1625,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "(12 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (11 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "LockCont;Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_lock_latency",</div><div class='hunk'>@@ -1624,7 +1650,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1633,7 +1659,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1657,7 +1683,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU was retiring uops fetched by the Microcode Sequencer (MS) unit",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY * IDQ.MS_UOPS / tma_info_thread_slots",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_heavy_operations_group;tma_issueMC;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_microcode_sequencer",</div><div class='hunk'>@@ -1667,6 +1692,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch Resteers as a result of Branch Misprediction at execution stage",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "BR_MISP_RETIRED.ALL_BRANCHES / (BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT) * INT_MISC.CLEAR_RESTEER_CYCLES / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BadSpec;BrMispredicts;BvMP;TopdownL4;tma_L4_group;tma_branch_resteers_group;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_mispredicts_resteers",</div><div class='hunk'>@@ -1721,6 +1747,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches))",</div><div class='ctx'>         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",</div><div class='ctx'>         "MetricName": "tma_other_light_ops",</div><div class='hunk'>@@ -1730,6 +1757,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of slots the CPU was stalled due to other cases of misprediction (non-retired x86 branches or other types).",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_branch_mispredicts * (1 - BR_MISP_RETIRED.ALL_BRANCHES / (INT_MISC.CLEARS_COUNT - MACHINE_CLEARS.COUNT)), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BrMispredicts;BvIO;TopdownL3;tma_L3_group;tma_branch_mispredicts_group",</div><div class='ctx'>         "MetricName": "tma_other_mispredicts",</div><div class='hunk'>@@ -1738,6 +1766,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents fraction of slots the CPU has wasted due to Nukes (Machine Clears) not related to memory ordering.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "max(tma_machine_clears * (1 - MACHINE_CLEARS.MEMORY_ORDERING / MACHINE_CLEARS.COUNT), 0.0001)",</div><div class='ctx'>         "MetricGroup": "BvIO;Machine_Clears;TopdownL3;tma_L3_group;tma_machine_clears_group",</div><div class='ctx'>         "MetricName": "tma_other_nukes",</div><div class='hunk'>@@ -1818,6 +1847,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates fraction of cycles the CPU performance was potentially limited due to Core computation issues (non divider-related)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "((tma_ports_utilized_0 * tma_info_thread_clks + (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL)) / tma_info_thread_clks if ARITH.DIVIDER_ACTIVE &lt; CYCLE_ACTIVITY.STALLS_TOTAL - CYCLE_ACTIVITY.STALLS_MEM_ANY else (EXE_ACTIVITY.1_PORTS_UTIL + tma_retiring * EXE_ACTIVITY.2_PORTS_UTIL) / tma_info_thread_clks)",</div><div class='ctx'>         "MetricGroup": "PortsUtil;TopdownL3;tma_L3_group;tma_core_bound_group",</div><div class='ctx'>         "MetricName": "tma_ports_utilization",</div><div class='hunk'>@@ -1923,7 +1953,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1980,6 +2010,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 1 GB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_1G / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_1g",</div><div class='hunk'>@@ -1988,6 +2019,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 2 or 4 MB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_2m",</div><div class='hunk'>@@ -1996,6 +2028,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates the fraction of cycles to walk the memory paging structures to cache translation of 4 KB pages for data store accesses.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "tma_store_stlb_miss * DTLB_STORE_MISSES.WALK_COMPLETED_4K / (DTLB_STORE_MISSES.WALK_COMPLETED_4K + DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M + DTLB_STORE_MISSES.WALK_COMPLETED_1G)",</div><div class='ctx'>         "MetricGroup": "MemoryTLB;TopdownL6;tma_L6_group;tma_store_stlb_miss_group",</div><div class='ctx'>         "MetricName": "tma_store_stlb_miss_4k",</div><div class='head'>diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json b/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json<br/>index 2db7a70f7a07..908da985c594 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/arch/x86/tigerlake/tgl-metrics.json</a></div><div class='hunk'>@@ -1,63 +1,63 @@</div><div class='ctx'> [</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C10 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c10\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c10\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C10_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C2 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c2\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C2_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C3 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c3\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C3_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C6 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c6\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C6_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per core",</div><div class='del'>-        "MetricExpr": "cstate_core@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_core@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Core_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C7 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c7\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C7_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C8 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c8\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c8\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C8_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "C9 residency percent per package",</div><div class='del'>-        "MetricExpr": "cstate_pkg@c9\\-residency@ / TSC",</div><div class='add'>+        "MetricExpr": "cstate_pkg@c9\\-residency@ / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Power",</div><div class='ctx'>         "MetricName": "C9_Pkg_Residency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='hunk'>@@ -85,7 +85,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often memory load accesses were aliased by preceding stores (in program order) with a 4K address offset",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_4k_aliasing",</div><div class='hunk'>@@ -134,6 +133,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",</div><div class='ctx'>         "MetricGroup": "BigFootprint;BvBC;Fed;Frontend;IcMiss;MemoryTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_big_code",</div><div class='hunk'>@@ -148,39 +148,44 @@</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of instructions used for program control-flow - a subset of the Retiring category in TMA. Examples include function calls; loops and alignments. (A lower bound)"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='add'>+        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='add'>+        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='add'>+        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_fb_full / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)))",</div><div class='ctx'>         "MetricGroup": "BvMB;Mem;MemoryBW;Offcore;tma_issueBW",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_bandwidth",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_bandwidth &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_bandwidth",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_bandwidth &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Bandwidth related bottlenecks. Related metrics: tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_memory_bound * tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_l1_latency_dependency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_lock_latency / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_loads / (tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_split_stores / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_store_latency / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvML;Mem;MemoryLat;Offcore;tma_issueLat",</div><div class='del'>-        "MetricName": "tma_bottleneck_cache_memory_latency",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_cache_memory_latency &gt; 20",</div><div class='add'>+        "MetricName": "tma_bottleneck_data_cache_memory_latency",</div><div class='add'>+        "MetricThreshold": "tma_bottleneck_data_cache_memory_latency &gt; 20",</div><div class='ctx'>         "PublicDescription": "Total pipeline cost of external Memory- or Cache-Latency related bottlenecks. Related metrics: tma_l3_hit_latency, tma_mem_latency"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "Total pipeline cost when the execution is compute-bound - an estimation",</div><div class='del'>-        "MetricExpr": "100 * (tma_core_bound * tma_divider / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_core_bound * (tma_ports_utilization / (tma_divider + tma_ports_utilization + tma_serializing_operation)) * (tma_ports_utilized_3m / (tma_ports_utilized_0 + tma_ports_utilized_1 + tma_ports_utilized_2 + tma_ports_utilized_3m)))",</div><div class='del'>-        "MetricGroup": "BvCB;Cor;tma_issueComp",</div><div class='del'>-        "MetricName": "tma_bottleneck_compute_bound_est",</div><div class='del'>-        "MetricThreshold": "tma_bottleneck_compute_bound_est &gt; 20",</div><div class='del'>-        "PublicDescription": "Total pipeline cost when the execution is compute-bound - an estimation. Covers Core Bound when High ILP as well as when long-latency execution units are busy. Related metrics: "</div><div class='del'>-    },</div><div class='del'>-    {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks (when the front-end could not sustain operations delivery to the back-end)",</div><div class='del'>-        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms))) - tma_bottleneck_big_code",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_frontend_bound - (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms)) - tma_bottleneck_big_code",</div><div class='ctx'>         "MetricGroup": "BvFB;Fed;FetchBW;Frontend",</div><div class='ctx'>         "MetricName": "tma_bottleneck_instruction_fetch_bw",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_instruction_fetch_bw &gt; 20"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of irregular execution (e.g",</div><div class='del'>-        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_ms / (tma_dsb + tma_lsd + tma_mite + tma_ms)) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 * (tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * (tma_fetch_latency * (tma_ms_switches + tma_branch_resteers * (tma_clears_resteers + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_mispredicts_resteers) / (tma_clears_resteers + tma_mispredicts_resteers + tma_unknown_branches)) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_ms) + 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts * tma_branch_mispredicts + tma_machine_clears * tma_other_nukes / tma_other_nukes + tma_core_bound * (tma_serializing_operation + tma_core_bound * RS_EVENTS.EMPTY_CYCLES / tma_info_thread_clks * tma_ports_utilized_0) / (tma_divider + tma_ports_utilization + tma_serializing_operation) + tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "Bad;BvIO;Cor;Ret;tma_issueMS",</div><div class='ctx'>         "MetricName": "tma_bottleneck_irregular_overhead",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_irregular_overhead &gt; 10",</div><div class='hunk'>@@ -188,6 +193,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_l1_latency_dependency + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_memory_bound * (tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound)) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",</div><div class='ctx'>         "MetricGroup": "BvMT;Mem;MemoryTLB;Offcore;tma_issueTLB",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_data_tlbs",</div><div class='hunk'>@@ -196,6 +202,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Memory Synchronization related bottlenecks (data transfers and coherency updates across processors)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_memory_bound * (tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_contested_accesses + tma_data_sharing) / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * tma_false_sharing / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores - tma_store_latency)) + tma_machine_clears * (1 - tma_other_nukes / tma_other_nukes))",</div><div class='ctx'>         "MetricGroup": "BvMS;LockCont;Mem;Offcore;tma_issueSyncxn",</div><div class='ctx'>         "MetricName": "tma_bottleneck_memory_synchronization",</div><div class='hunk'>@@ -204,6 +211,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (1 - 10 * tma_microcode_sequencer * tma_other_mispredicts / tma_branch_mispredicts) * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",</div><div class='ctx'>         "MetricGroup": "Bad;BadSpec;BrMispredicts;BvMP;tma_issueBM",</div><div class='ctx'>         "MetricName": "tma_bottleneck_mispredictions",</div><div class='hunk'>@@ -212,7 +220,8 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of remaining bottlenecks in the back-end",</div><div class='del'>-        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_cache_memory_bandwidth + tma_bottleneck_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='add'>+        "MetricExpr": "100 - (tma_bottleneck_big_code + tma_bottleneck_instruction_fetch_bw + tma_bottleneck_mispredictions + tma_bottleneck_data_cache_memory_bandwidth + tma_bottleneck_data_cache_memory_latency + tma_bottleneck_memory_data_tlbs + tma_bottleneck_memory_synchronization + tma_bottleneck_compute_bound_est + tma_bottleneck_irregular_overhead + tma_bottleneck_branching_overhead + tma_bottleneck_useful_work)",</div><div class='ctx'>         "MetricGroup": "BvOB;Cor;Offcore",</div><div class='ctx'>         "MetricName": "tma_bottleneck_other_bottlenecks",</div><div class='ctx'>         "MetricThreshold": "tma_bottleneck_other_bottlenecks &gt; 20",</div><div class='hunk'>@@ -220,6 +229,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of \"useful operations\" - the portion of Retiring category not covered by Branching_Overhead nor Irregular_Overhead.",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_retiring - (BR_INST_RETIRED.ALL_BRANCHES + 2 * BR_INST_RETIRED.NEAR_CALL + INST_RETIRED.NOP) / tma_info_thread_slots - tma_microcode_sequencer / (tma_few_uops_instructions + tma_microcode_sequencer) * (tma_assists / tma_microcode_sequencer) * tma_heavy_operations)",</div><div class='ctx'>         "MetricGroup": "BvUW;Ret",</div><div class='ctx'>         "MetricName": "tma_bottleneck_useful_work",</div><div class='hunk'>@@ -427,7 +437,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_fb_full",</div><div class='ctx'>         "MetricThreshold": "tma_fb_full &gt; 0.3",</div><div class='del'>-        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='add'>+        "PublicDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed. The higher the metric value; the deeper the memory hierarchy level the misses are satisfied from (metric values &gt;1 are valid). Often it hints on approaching bandwidth limits (to L2 cache; L3 cache or external memory). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_info_system_dram_bw_use, tma_mem_bandwidth, tma_sq_full, tma_store_latency, tma_streaming_stores",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -619,6 +629,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Total pipeline cost of DSB (uop cache) hits - subset of the Instruction_Fetch_BW Bottleneck",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "100 * (tma_frontend_bound * (tma_fetch_bandwidth / (tma_fetch_bandwidth + tma_fetch_latency)) * (tma_dsb / (tma_dsb + tma_lsd + tma_mite + tma_ms)))",</div><div class='ctx'>         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",</div><div class='ctx'>         "MetricName": "tma_info_botlnk_l2_dsb_bandwidth",</div><div class='hunk'>@@ -1074,7 +1085,7 @@</div><div class='ctx'>         "MetricName": "tma_info_memory_tlb_store_stlb_mpki"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "",</div><div class='add'>+        "BriefDescription": "Mem;Backend;CacheHits",</div><div class='ctx'>         "MetricExpr": "UOPS_EXECUTED.THREAD / (UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 if #SMT_on else cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@)",</div><div class='ctx'>         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",</div><div class='ctx'>         "MetricName": "tma_info_pipeline_execute"</div><div class='hunk'>@@ -1098,6 +1109,12 @@</div><div class='ctx'>         "MetricName": "tma_info_pipeline_fetch_mite"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='add'>+        "BriefDescription": "Average number of uops fetched from MS per cycle",</div><div class='add'>+        "MetricExpr": "IDQ.MS_UOPS / cpu@IDQ.MS_UOPS\\,cmask\\=1@",</div><div class='add'>+        "MetricGroup": "Fed;FetchLat;MicroSeq",</div><div class='add'>+        "MetricName": "tma_info_pipeline_fetch_ms"</div><div class='add'>+    },</div><div class='add'>+    {</div><div class='ctx'>         "BriefDescription": "Instructions per a microcode Assist invocation",</div><div class='ctx'>         "MetricExpr": "INST_RETIRED.ANY / ASSISTS.ANY",</div><div class='ctx'>         "MetricGroup": "MicroSeq;Pipeline;Ret;Retire",</div><div class='hunk'>@@ -1113,7 +1130,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Measured Average Core Frequency for unhalted processors [GHz]",</div><div class='del'>-        "MetricExpr": "tma_info_system_turbo_utilization * TSC / 1e9 / tma_info_system_time",</div><div class='add'>+        "MetricExpr": "tma_info_system_turbo_utilization * msr@tsc@ / 1e9 / tma_info_system_time",</div><div class='ctx'>         "MetricGroup": "Power;Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_core_frequency"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1125,7 +1142,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of utilized CPUs",</div><div class='del'>-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",</div><div class='add'>+        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",</div><div class='ctx'>         "MetricGroup": "Summary",</div><div class='ctx'>         "MetricName": "tma_info_system_cpus_utilized"</div><div class='ctx'>     },</div><div class='hunk'>@@ -1134,7 +1151,7 @@</div><div class='ctx'>         "MetricExpr": "64 * (UNC_ARB_TRK_REQUESTS.ALL + UNC_ARB_COH_TRK_REQUESTS.ALL) / 1e6 / tma_info_system_time / 1e3",</div><div class='ctx'>         "MetricGroup": "HPC;MemOffcore;MemoryBW;SoC;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_info_system_dram_bw_use",</div><div class='del'>-        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='add'>+        "PublicDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]. Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_mem_bandwidth, tma_sq_full"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Giga Floating Point Operations Per Second",</div><div class='hunk'>@@ -1165,6 +1182,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "Average number of parallel data read requests to external memory",</div><div class='add'>+        "MetricConstraint": "NO_GROUP_EVENTS",</div><div class='ctx'>         "MetricExpr": "UNC_ARB_DAT_OCCUPANCY.RD / UNC_ARB_DAT_OCCUPANCY.RD@cmask\\=1@",</div><div class='ctx'>         "MetricGroup": "Mem;MemoryBW;SoC",</div><div class='ctx'>         "MetricName": "tma_info_system_mem_parallel_reads",</div><div class='hunk'>@@ -1316,12 +1334,12 @@</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='del'>-        "BriefDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='add'>+        "BriefDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache",</div><div class='ctx'>         "MetricExpr": "min(2 * (MEM_INST_RETIRED.ALL_LOADS - MEM_LOAD_RETIRED.FB_HIT - MEM_LOAD_RETIRED.L1_MISS) * 20 / 100, max(CYCLE_ACTIVITY.CYCLES_MEM_ANY - CYCLE_ACTIVITY.CYCLES_L1D_MISS, 0)) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_l1_latency_dependency",</div><div class='ctx'>         "MetricThreshold": "tma_l1_latency_dependency &gt; 0.1 &amp; (tma_l1_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='add'>+        "PublicDescription": "This metric ([SKL+] roughly; [LNL]) estimates fraction of cycles with demand load accesses that hit the L1D cache. The short latency of the L1D cache may be exposed in pointer-chasing memory access patterns as an example. Sample with: MEM_LOAD_RETIRED.L1_HIT",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1345,7 +1363,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "(CYCLE_ACTIVITY.STALLS_L2_MISS - CYCLE_ACTIVITY.STALLS_L3_MISS) / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "CacheHits;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_bound",</div><div class='hunk'>@@ -1359,7 +1376,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;TopdownL4;tma_L4_group;tma_issueLat;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_l3_hit_latency",</div><div class='ctx'>         "MetricThreshold": "tma_l3_hit_latency &gt; 0.1 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_cache_memory_latency, tma_mem_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles with demand load accesses that hit the L3 cache under unloaded scenarios (possibly L3 latency limited).  Avoiding private cache misses (i.e. L2 misses/L3 hits) will improve the latency; reduce contention with sibling physical cores and increase performance.  Note the value of this node may overlap with its siblings. Sample with: MEM_LOAD_RETIRED.L3_HIT_PS. Related metrics: tma_bottleneck_data_cache_memory_latency, tma_mem_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1465,7 +1482,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueBW",</div><div class='ctx'>         "MetricName": "tma_mem_bandwidth",</div><div class='ctx'>         "MetricThreshold": "tma_mem_bandwidth &gt; 0.2 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the core's performance was likely hurt due to approaching bandwidth limits of external memory - DRAM ([SPR-HBM] and/or HBM).  The underlying heuristic assumes that a similar off-core traffic is generated by all IA cores. This metric does not aggregate non-data-read requests by this logical processor; requests from other IA Logical Processors/Physical Cores/sockets; or other non-IA devices like GPU; hence the maximum external memory bandwidth limits may or may not be approached when this metric is flagged (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_sq_full",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1474,7 +1491,7 @@</div><div class='ctx'>         "MetricGroup": "BvML;MemoryLat;Offcore;TopdownL4;tma_L4_group;tma_dram_bound_group;tma_issueLat",</div><div class='ctx'>         "MetricName": "tma_mem_latency",</div><div class='ctx'>         "MetricThreshold": "tma_mem_latency &gt; 0.1 &amp; (tma_dram_bound &gt; 0.1 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_cache_memory_latency, tma_l3_hit_latency",</div><div class='add'>+        "PublicDescription": "This metric estimates fraction of cycles where the performance was likely hurt due to latency from external memory - DRAM ([SPR-HBM] and/or HBM).  This metric does not aggregate requests from other Logical Processors/Physical Cores/sockets (see Uncore counters for that). Related metrics: tma_bottleneck_data_cache_memory_latency, tma_l3_hit_latency",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1542,7 +1559,7 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents Core fraction of cycles in which CPU was likely limited due to the Microcode Sequencer (MS) unit - see Microcode_Sequencer node for details.",</div><div class='del'>-        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 2",</div><div class='add'>+        "MetricExpr": "cpu@IDQ.MS_UOPS\\,cmask\\=1@ / tma_info_core_core_clks / 3.3",</div><div class='ctx'>         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",</div><div class='ctx'>         "MetricName": "tma_ms",</div><div class='ctx'>         "MetricThreshold": "tma_ms &gt; 0.05 &amp; tma_fetch_bandwidth &gt; 0.2",</div><div class='hunk'>@@ -1676,7 +1693,7 @@</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",</div><div class='ctx'>         "DefaultMetricgroupName": "TopdownL1",</div><div class='del'>-        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * tma_info_thread_slots",</div><div class='add'>+        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound)",</div><div class='ctx'>         "MetricGroup": "BvUW;Default;TmaL1;TopdownL1;tma_L1_group",</div><div class='ctx'>         "MetricName": "tma_retiring",</div><div class='ctx'>         "MetricThreshold": "tma_retiring &gt; 0.7 | tma_heavy_operations &gt; 0.1",</div><div class='hunk'>@@ -1713,7 +1730,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric represents rate of split store accesses",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",</div><div class='ctx'>         "MetricName": "tma_split_stores",</div><div class='hunk'>@@ -1727,7 +1743,7 @@</div><div class='ctx'>         "MetricGroup": "BvMB;MemoryBW;Offcore;TopdownL4;tma_L4_group;tma_issueBW;tma_l3_bound_group",</div><div class='ctx'>         "MetricName": "tma_sq_full",</div><div class='ctx'>         "MetricThreshold": "tma_sq_full &gt; 0.3 &amp; (tma_l3_bound &gt; 0.05 &amp; (tma_memory_bound &gt; 0.2 &amp; tma_backend_bound &gt; 0.2))",</div><div class='del'>-        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='add'>+        "PublicDescription": "This metric measures fraction of cycles where the Super Queue (SQ) was full taking into account all request-types and both hardware SMT threads (Logical Processors). Related metrics: tma_bottleneck_data_cache_memory_bandwidth, tma_fb_full, tma_info_system_dram_bw_use, tma_mem_bandwidth",</div><div class='ctx'>         "ScaleUnit": "100%"</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='hunk'>@@ -1741,7 +1757,6 @@</div><div class='ctx'>     },</div><div class='ctx'>     {</div><div class='ctx'>         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",</div><div class='del'>-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",</div><div class='ctx'>         "MetricExpr": "13 * LD_BLOCKS.STORE_FORWARD / tma_info_thread_clks",</div><div class='ctx'>         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",</div><div class='ctx'>         "MetricName": "tma_store_fwd_blk",</div><div class='head'>diff --git a/tools/perf/pmu-events/empty-pmu-events.c b/tools/perf/pmu-events/empty-pmu-events.c<br/>index 041c598b16d8..76c395cf513c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/empty-pmu-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/empty-pmu-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/empty-pmu-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/empty-pmu-events.c</a></div><div class='hunk'>@@ -19,236 +19,2753 @@ struct pmu_table_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char *const big_c_string =</div><div class='del'>-/* offset=0 */ "software\000"</div><div class='del'>-/* offset=9 */ "cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=87 */ "task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=167 */ "faults\000software\000Number of page faults [This event is an alias of page-faults]\000config=2\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=262 */ "page-faults\000software\000Number of page faults [This event is an alias of faults]\000config=2\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=357 */ "context-switches\000software\000Number of context switches [This event is an alias of cs]\000config=3\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=458 */ "cs\000software\000Number of context switches [This event is an alias of context-switches]\000config=3\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=559 */ "cpu-migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of migrations]\000config=4\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=691 */ "migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu-migrations]\000config=4\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=823 */ "minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\000config=5\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=932 */ "major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000config=6\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1035 */ "alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=7\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1127 */ "emulation-faults\000software\000Number of kernel handled unimplemented instruction faults handled through emulation\000config=8\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1254 */ "dummy\000software\000A placeholder event that doesn't count anything\000config=9\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1334 */ "bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000config=0xa\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1436 */ "cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000config=0xb\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1539 */ "tool\000"</div><div class='del'>-/* offset=1544 */ "duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1620 */ "user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1690 */ "system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1758 */ "has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1834 */ "num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated with a logical Linux CPU\000config=5\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=1979 */ "num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\000config=6\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2082 */ "num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a core\000config=7\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2199 */ "num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2275 */ "num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2361 */ "slots\000tool\000Number of functional units that in parallel can execute parts of an instruction\000config=0xa\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2471 */ "smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\000config=0xb\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2578 */ "system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000config=0xc\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2677 */ "default_core\000"</div><div class='del'>-/* offset=2690 */ "bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2752 */ "bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=2814 */ "l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attributable Level 3 cache access, read\000"</div><div class='del'>-/* offset=2912 */ "segment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0x80\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3014 */ "dispatch_blocked.any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,period=200000,umask=0x20\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3147 */ "eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0x3a,period=200000\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3265 */ "hisi_sccl,ddrc\000"</div><div class='del'>-/* offset=3280 */ "uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3350 */ "uncore_cbox\000"</div><div class='del'>-/* offset=3362 */ "unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\000event=0x22,umask=0x81\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3516 */ "event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3570 */ "event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3628 */ "hisi_sccl,l3c\000"</div><div class='del'>-/* offset=3642 */ "uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3710 */ "uncore_imc_free_running\000"</div><div class='del'>-/* offset=3734 */ "uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3814 */ "uncore_imc\000"</div><div class='del'>-/* offset=3825 */ "uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3890 */ "uncore_sys_ddr_pmu\000"</div><div class='del'>-/* offset=3909 */ "sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\000\000\000\000\000"</div><div class='del'>-/* offset=3985 */ "uncore_sys_ccn_pmu\000"</div><div class='del'>-/* offset=4004 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000"</div><div class='del'>-/* offset=4081 */ "uncore_sys_cmn_pmu\000"</div><div class='del'>-/* offset=4100 */ "sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000"</div><div class='del'>-/* offset=4243 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4265 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4328 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4494 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4558 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4625 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4696 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4790 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4924 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=4988 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=5056 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=5126 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=5148 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=5170 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000"</div><div class='del'>-/* offset=5190 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000"</div><div class='add'>+/* offset=0 */ "default_core\000"</div><div class='add'>+/* offset=13 */ "l1-dcache\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99 */ "l1-dcache-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=190 */ "l1-dcache-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=286 */ "l1-dcache-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=387 */ "l1-dcache-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=482 */ "l1-dcache-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=580 */ "l1-dcache-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=682 */ "l1-dcache-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=782 */ "l1-dcache-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=874 */ "l1-dcache-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=971 */ "l1-dcache-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1073 */ "l1-dcache-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1169 */ "l1-dcache-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1268 */ "l1-dcache-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1371 */ "l1-dcache-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1472 */ "l1-dcache-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1563 */ "l1-dcache-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1659 */ "l1-dcache-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1760 */ "l1-dcache-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1855 */ "l1-dcache-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=1953 */ "l1-dcache-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2055 */ "l1-dcache-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2155 */ "l1-dcache-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2252 */ "l1-dcache-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2354 */ "l1-dcache-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2461 */ "l1-dcache-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2562 */ "l1-dcache-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2666 */ "l1-dcache-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=2770 */ "l1-dcache-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=2872 */ "l1-dcache-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=2970 */ "l1-dcache-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3073 */ "l1-dcache-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3181 */ "l1-dcache-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3283 */ "l1-dcache-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3388 */ "l1-dcache-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3493 */ "l1-dcache-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3596 */ "l1-dcache-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3693 */ "l1-dcache-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3795 */ "l1-dcache-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=3902 */ "l1-dcache-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4003 */ "l1-dcache-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4107 */ "l1-dcache-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4211 */ "l1-dcache-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4313 */ "l1-dcache-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4416 */ "l1-dcache-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4524 */ "l1-dcache-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4637 */ "l1-dcache-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4744 */ "l1-dcache-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=4854 */ "l1-dcache-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=4964 */ "l1-dcache-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5072 */ "l1-dcache-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=5177 */ "l1-dcache-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5287 */ "l1-dcache-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5402 */ "l1-dcache-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5511 */ "l1-dcache-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5623 */ "l1-dcache-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5735 */ "l1-dcache-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5845 */ "l1-dcache-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=5956 */ "l1-dcache-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6072 */ "l1-dcache-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6193 */ "l1-dcache-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6308 */ "l1-dcache-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6426 */ "l1-dcache-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6544 */ "l1-dcache-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6660 */ "l1-dcache-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6771 */ "l1-dcache-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=6887 */ "l1-dcache-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7008 */ "l1-dcache-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7123 */ "l1-dcache-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7241 */ "l1-dcache-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7359 */ "l1-dcache-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7475 */ "l1-dcache-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7566 */ "l1-dcache-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7662 */ "l1-dcache-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7752 */ "l1-dcache-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7845 */ "l1-dcache-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=7942 */ "l1-dcache-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8037 */ "l1-d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8118 */ "l1-d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8204 */ "l1-d-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8295 */ "l1-d-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8391 */ "l1-d-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8481 */ "l1-d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8574 */ "l1-d-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8671 */ "l1-d-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8766 */ "l1-d-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8853 */ "l1-d-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=8945 */ "l1-d-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9042 */ "l1-d-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9133 */ "l1-d-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9227 */ "l1-d-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9325 */ "l1-d-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9421 */ "l1-d-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9507 */ "l1-d-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9598 */ "l1-d-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9694 */ "l1-d-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9784 */ "l1-d-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9877 */ "l1-d-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=9974 */ "l1-d-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10069 */ "l1-d-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10161 */ "l1-d-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10258 */ "l1-d-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10360 */ "l1-d-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10456 */ "l1-d-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10555 */ "l1-d-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10654 */ "l1-d-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10751 */ "l1-d-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10844 */ "l1-d-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=10942 */ "l1-d-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11045 */ "l1-d-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11142 */ "l1-d-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11242 */ "l1-d-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11342 */ "l1-d-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11440 */ "l1-d-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11532 */ "l1-d-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11629 */ "l1-d-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11731 */ "l1-d-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11827 */ "l1-d-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=11926 */ "l1-d-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12025 */ "l1-d-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12122 */ "l1-d-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12220 */ "l1-d-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12323 */ "l1-d-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12431 */ "l1-d-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12533 */ "l1-d-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12638 */ "l1-d-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12743 */ "l1-d-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12846 */ "l1-d-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=12946 */ "l1-d-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13051 */ "l1-d-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13161 */ "l1-d-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13265 */ "l1-d-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13372 */ "l1-d-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13479 */ "l1-d-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13584 */ "l1-d-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13690 */ "l1-d-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13801 */ "l1-d-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=13917 */ "l1-d-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14027 */ "l1-d-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14140 */ "l1-d-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14253 */ "l1-d-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14364 */ "l1-d-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14470 */ "l1-d-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14581 */ "l1-d-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14697 */ "l1-d-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14807 */ "l1-d-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=14920 */ "l1-d-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15033 */ "l1-d-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15144 */ "l1-d-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15230 */ "l1-d-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15321 */ "l1-d-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15406 */ "l1-d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15494 */ "l1-d-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15586 */ "l1-d-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15676 */ "l1d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15756 */ "l1d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15841 */ "l1d-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=15931 */ "l1d-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16026 */ "l1d-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16115 */ "l1d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16207 */ "l1d-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16303 */ "l1d-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16397 */ "l1d-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16483 */ "l1d-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16574 */ "l1d-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16670 */ "l1d-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16760 */ "l1d-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16853 */ "l1d-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=16950 */ "l1d-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17045 */ "l1d-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17130 */ "l1d-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17220 */ "l1d-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17315 */ "l1d-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17404 */ "l1d-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17496 */ "l1d-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17592 */ "l1d-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17686 */ "l1d-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17777 */ "l1d-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17873 */ "l1d-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=17974 */ "l1d-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18069 */ "l1d-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18167 */ "l1d-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18265 */ "l1d-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18361 */ "l1d-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18453 */ "l1d-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18550 */ "l1d-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18652 */ "l1d-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18748 */ "l1d-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18847 */ "l1d-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=18946 */ "l1d-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19043 */ "l1d-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19134 */ "l1d-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19230 */ "l1d-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19331 */ "l1d-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19426 */ "l1d-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19524 */ "l1d-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19622 */ "l1d-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19718 */ "l1d-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19815 */ "l1d-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=19917 */ "l1d-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20024 */ "l1d-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20125 */ "l1d-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20229 */ "l1d-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20333 */ "l1d-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20435 */ "l1d-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20534 */ "l1d-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20638 */ "l1d-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20747 */ "l1d-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20850 */ "l1d-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=20956 */ "l1d-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21062 */ "l1d-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21166 */ "l1d-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21271 */ "l1d-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21381 */ "l1d-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21496 */ "l1d-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21605 */ "l1d-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21717 */ "l1d-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21829 */ "l1d-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=21939 */ "l1d-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22044 */ "l1d-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22154 */ "l1d-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22269 */ "l1d-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22378 */ "l1d-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22490 */ "l1d-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22602 */ "l1d-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22712 */ "l1d-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22797 */ "l1d-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22887 */ "l1d-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=22971 */ "l1d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23058 */ "l1d-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23149 */ "l1d-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23238 */ "l1-data\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23322 */ "l1-data-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23411 */ "l1-data-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23505 */ "l1-data-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23604 */ "l1-data-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23697 */ "l1-data-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23793 */ "l1-data-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23893 */ "l1-data-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=23991 */ "l1-data-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24081 */ "l1-data-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24176 */ "l1-data-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24276 */ "l1-data-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24370 */ "l1-data-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24467 */ "l1-data-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24568 */ "l1-data-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24667 */ "l1-data-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24756 */ "l1-data-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24850 */ "l1-data-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=24949 */ "l1-data-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25042 */ "l1-data-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25138 */ "l1-data-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25238 */ "l1-data-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25336 */ "l1-data-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25431 */ "l1-data-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25531 */ "l1-data-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25636 */ "l1-data-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25735 */ "l1-data-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25837 */ "l1-data-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=25939 */ "l1-data-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26039 */ "l1-data-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26135 */ "l1-data-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26236 */ "l1-data-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26342 */ "l1-data-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26442 */ "l1-data-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26545 */ "l1-data-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26648 */ "l1-data-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26749 */ "l1-data-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26844 */ "l1-data-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=26944 */ "l1-data-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27049 */ "l1-data-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27148 */ "l1-data-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27250 */ "l1-data-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27352 */ "l1-data-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27452 */ "l1-data-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27553 */ "l1-data-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27659 */ "l1-data-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27770 */ "l1-data-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27875 */ "l1-data-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=27983 */ "l1-data-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28091 */ "l1-data-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28197 */ "l1-data-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28300 */ "l1-data-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28408 */ "l1-data-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28521 */ "l1-data-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28628 */ "l1-data-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28738 */ "l1-data-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28848 */ "l1-data-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=28956 */ "l1-data-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29065 */ "l1-data-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29179 */ "l1-data-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29298 */ "l1-data-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29411 */ "l1-data-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29527 */ "l1-data-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29643 */ "l1-data-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29757 */ "l1-data-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29866 */ "l1-data-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=29980 */ "l1-data-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30099 */ "l1-data-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30212 */ "l1-data-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30328 */ "l1-data-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30444 */ "l1-data-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30558 */ "l1-data-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30647 */ "l1-data-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30741 */ "l1-data-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30829 */ "l1-data-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=30920 */ "l1-data-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31015 */ "l1-data-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31108 */ "l1-icache\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31201 */ "l1-icache-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31299 */ "l1-icache-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31402 */ "l1-icache-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31510 */ "l1-icache-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31612 */ "l1-icache-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31717 */ "l1-icache-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=31826 */ "l1-icache-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=31933 */ "l1-icache-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=32032 */ "l1-icache-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32136 */ "l1-icache-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32245 */ "l1-icache-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32348 */ "l1-icache-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32454 */ "l1-icache-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32564 */ "l1-icache-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32672 */ "l1-icache-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32770 */ "l1-icache-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32873 */ "l1-icache-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=32981 */ "l1-icache-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33083 */ "l1-icache-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33188 */ "l1-icache-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33297 */ "l1-icache-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33404 */ "l1-icache-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33514 */ "l1-icache-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33629 */ "l1-icache-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33749 */ "l1-icache-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33863 */ "l1-icache-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=33980 */ "l1-icache-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=34097 */ "l1-icache-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34212 */ "l1-icache-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=34324 */ "l1-icache-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34441 */ "l1-icache-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34563 */ "l1-icache-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34679 */ "l1-icache-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34798 */ "l1-icache-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=34917 */ "l1-icache-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35034 */ "l1-icache-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35152 */ "l1-icache-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35275 */ "l1-icache-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35403 */ "l1-icache-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35525 */ "l1-icache-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35650 */ "l1-icache-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35775 */ "l1-icache-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=35898 */ "l1-icache-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36016 */ "l1-icache-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36139 */ "l1-icache-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36267 */ "l1-icache-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36389 */ "l1-icache-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36514 */ "l1-icache-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36639 */ "l1-icache-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36762 */ "l1-icache-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36860 */ "l1-icache-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=36963 */ "l1-icache-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37060 */ "l1-icache-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37160 */ "l1-icache-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37264 */ "l1-icache-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37366 */ "l1-i\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37454 */ "l1-i-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37547 */ "l1-i-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37645 */ "l1-i-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37748 */ "l1-i-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37845 */ "l1-i-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=37945 */ "l1-i-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38049 */ "l1-i-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38151 */ "l1-i-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38245 */ "l1-i-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38344 */ "l1-i-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38448 */ "l1-i-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38546 */ "l1-i-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38647 */ "l1-i-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38752 */ "l1-i-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38855 */ "l1-i-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=38948 */ "l1-i-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39046 */ "l1-i-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39149 */ "l1-i-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39246 */ "l1-i-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39346 */ "l1-i-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39450 */ "l1-i-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39552 */ "l1-i-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39657 */ "l1-i-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39767 */ "l1-i-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39882 */ "l1-i-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=39991 */ "l1-i-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40103 */ "l1-i-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40215 */ "l1-i-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40325 */ "l1-i-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40432 */ "l1-i-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40544 */ "l1-i-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40661 */ "l1-i-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40772 */ "l1-i-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=40886 */ "l1-i-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41000 */ "l1-i-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41112 */ "l1-i-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41225 */ "l1-i-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41343 */ "l1-i-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41466 */ "l1-i-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41583 */ "l1-i-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41703 */ "l1-i-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41823 */ "l1-i-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=41941 */ "l1-i-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42054 */ "l1-i-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42172 */ "l1-i-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42295 */ "l1-i-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42412 */ "l1-i-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42532 */ "l1-i-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42652 */ "l1-i-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42770 */ "l1-i-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42863 */ "l1-i-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=42961 */ "l1-i-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43053 */ "l1-i-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43148 */ "l1-i-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43247 */ "l1-i-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43344 */ "l1i\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43431 */ "l1i-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43523 */ "l1i-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43620 */ "l1i-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43722 */ "l1i-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43818 */ "l1i-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=43917 */ "l1i-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44020 */ "l1i-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44121 */ "l1i-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44214 */ "l1i-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44312 */ "l1i-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44415 */ "l1i-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44512 */ "l1i-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44612 */ "l1i-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44716 */ "l1i-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44818 */ "l1i-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=44910 */ "l1i-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45007 */ "l1i-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45109 */ "l1i-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45205 */ "l1i-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45304 */ "l1i-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45407 */ "l1i-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45508 */ "l1i-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45612 */ "l1i-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45721 */ "l1i-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45835 */ "l1i-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=45943 */ "l1i-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46054 */ "l1i-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46165 */ "l1i-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46274 */ "l1i-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46380 */ "l1i-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46491 */ "l1i-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46607 */ "l1i-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46717 */ "l1i-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46830 */ "l1i-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=46943 */ "l1i-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47054 */ "l1i-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47166 */ "l1i-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47283 */ "l1i-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47405 */ "l1i-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47521 */ "l1i-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47640 */ "l1i-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47759 */ "l1i-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47876 */ "l1i-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=47988 */ "l1i-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48105 */ "l1i-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48227 */ "l1i-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48343 */ "l1i-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48462 */ "l1i-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48581 */ "l1i-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48698 */ "l1i-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48790 */ "l1i-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48887 */ "l1i-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=48978 */ "l1i-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49072 */ "l1i-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49170 */ "l1i-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49266 */ "l1-instruction\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49364 */ "l1-instruction-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49467 */ "l1-instruction-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49575 */ "l1-instruction-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49688 */ "l1-instruction-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49795 */ "l1-instruction-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=49905 */ "l1-instruction-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50019 */ "l1-instruction-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50131 */ "l1-instruction-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50235 */ "l1-instruction-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50344 */ "l1-instruction-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50458 */ "l1-instruction-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50566 */ "l1-instruction-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50677 */ "l1-instruction-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50792 */ "l1-instruction-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=50905 */ "l1-instruction-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51008 */ "l1-instruction-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51116 */ "l1-instruction-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51229 */ "l1-instruction-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51336 */ "l1-instruction-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51446 */ "l1-instruction-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51560 */ "l1-instruction-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51672 */ "l1-instruction-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51787 */ "l1-instruction-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=51907 */ "l1-instruction-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52032 */ "l1-instruction-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52151 */ "l1-instruction-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52273 */ "l1-instruction-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52395 */ "l1-instruction-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52515 */ "l1-instruction-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52632 */ "l1-instruction-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52754 */ "l1-instruction-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=52881 */ "l1-instruction-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53002 */ "l1-instruction-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53126 */ "l1-instruction-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53250 */ "l1-instruction-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53372 */ "l1-instruction-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53495 */ "l1-instruction-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53623 */ "l1-instruction-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53756 */ "l1-instruction-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=53883 */ "l1-instruction-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54013 */ "l1-instruction-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54143 */ "l1-instruction-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54271 */ "l1-instruction-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54394 */ "l1-instruction-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54522 */ "l1-instruction-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54655 */ "l1-instruction-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54782 */ "l1-instruction-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=54912 */ "l1-instruction-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55042 */ "l1-instruction-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55170 */ "l1-instruction-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55273 */ "l1-instruction-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55381 */ "l1-instruction-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55483 */ "l1-instruction-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55588 */ "l1-instruction-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55697 */ "l1-instruction-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55804 */ "llc\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55882 */ "llc-load\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=55965 */ "llc-load-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56053 */ "llc-load-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56146 */ "llc-load-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56233 */ "llc-load-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56323 */ "llc-load-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=56417 */ "llc-load-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56509 */ "llc-loads\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=56593 */ "llc-loads-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56682 */ "llc-loads-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56776 */ "llc-loads-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56864 */ "llc-loads-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=56955 */ "llc-loads-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57050 */ "llc-loads-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57143 */ "llc-read\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57226 */ "llc-read-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57314 */ "llc-read-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57407 */ "llc-read-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57494 */ "llc-read-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57584 */ "llc-read-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57678 */ "llc-read-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57770 */ "llc-store\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57859 */ "llc-store-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=57953 */ "llc-store-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58052 */ "llc-store-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58145 */ "llc-store-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58241 */ "llc-store-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=58337 */ "llc-store-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58431 */ "llc-stores\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=58521 */ "llc-stores-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58616 */ "llc-stores-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58716 */ "llc-stores-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58810 */ "llc-stores-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=58907 */ "llc-stores-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59004 */ "llc-stores-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59099 */ "llc-write\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59188 */ "llc-write-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59282 */ "llc-write-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59381 */ "llc-write-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59474 */ "llc-write-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59570 */ "llc-write-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59666 */ "llc-write-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59760 */ "llc-prefetch\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59855 */ "llc-prefetch-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=59955 */ "llc-prefetch-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60060 */ "llc-prefetch-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60159 */ "llc-prefetch-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60261 */ "llc-prefetch-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=60363 */ "llc-prefetch-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60463 */ "llc-prefetches\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=60560 */ "llc-prefetches-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60662 */ "llc-prefetches-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60769 */ "llc-prefetches-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60870 */ "llc-prefetches-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=60974 */ "llc-prefetches-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61078 */ "llc-prefetches-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61180 */ "llc-speculative-read\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61283 */ "llc-speculative-read-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61391 */ "llc-speculative-read-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61504 */ "llc-speculative-read-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61611 */ "llc-speculative-read-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61721 */ "llc-speculative-read-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61831 */ "llc-speculative-read-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=61939 */ "llc-speculative-load\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62042 */ "llc-speculative-load-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62150 */ "llc-speculative-load-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62263 */ "llc-speculative-load-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62370 */ "llc-speculative-load-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62480 */ "llc-speculative-load-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62590 */ "llc-speculative-load-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62698 */ "llc-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62781 */ "llc-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62869 */ "llc-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=62951 */ "llc-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63036 */ "llc-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63125 */ "llc-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63212 */ "l2\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63309 */ "l2-load\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63411 */ "l2-load-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63518 */ "l2-load-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63630 */ "l2-load-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63736 */ "l2-load-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63845 */ "l2-load-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=63958 */ "l2-load-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64069 */ "l2-loads\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64172 */ "l2-loads-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64280 */ "l2-loads-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64393 */ "l2-loads-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64500 */ "l2-loads-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64610 */ "l2-loads-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64724 */ "l2-loads-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64836 */ "l2-read\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=64938 */ "l2-read-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65045 */ "l2-read-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65157 */ "l2-read-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65263 */ "l2-read-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65372 */ "l2-read-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65485 */ "l2-read-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65596 */ "l2-store\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65704 */ "l2-store-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65817 */ "l2-store-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=65935 */ "l2-store-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66047 */ "l2-store-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66162 */ "l2-store-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66277 */ "l2-store-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66390 */ "l2-stores\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66499 */ "l2-stores-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66613 */ "l2-stores-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66732 */ "l2-stores-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66845 */ "l2-stores-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=66961 */ "l2-stores-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67077 */ "l2-stores-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67191 */ "l2-write\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67299 */ "l2-write-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67412 */ "l2-write-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67530 */ "l2-write-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67642 */ "l2-write-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67757 */ "l2-write-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67872 */ "l2-write-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=67985 */ "l2-prefetch\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68099 */ "l2-prefetch-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68218 */ "l2-prefetch-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68342 */ "l2-prefetch-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68460 */ "l2-prefetch-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68581 */ "l2-prefetch-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68702 */ "l2-prefetch-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68821 */ "l2-prefetches\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=68937 */ "l2-prefetches-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69058 */ "l2-prefetches-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69184 */ "l2-prefetches-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69304 */ "l2-prefetches-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69427 */ "l2-prefetches-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69550 */ "l2-prefetches-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69671 */ "l2-speculative-read\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69793 */ "l2-speculative-read-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=69920 */ "l2-speculative-read-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70052 */ "l2-speculative-read-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70178 */ "l2-speculative-read-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70307 */ "l2-speculative-read-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70436 */ "l2-speculative-read-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70563 */ "l2-speculative-load\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70685 */ "l2-speculative-load-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70812 */ "l2-speculative-load-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=70944 */ "l2-speculative-load-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71070 */ "l2-speculative-load-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71199 */ "l2-speculative-load-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71328 */ "l2-speculative-load-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71455 */ "l2-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71557 */ "l2-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71664 */ "l2-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71765 */ "l2-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71869 */ "l2-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=71977 */ "l2-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72083 */ "dtlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72154 */ "dtlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72230 */ "dtlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72311 */ "dtlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72397 */ "dtlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72477 */ "dtlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72560 */ "dtlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=72647 */ "dtlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72732 */ "dtlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=72809 */ "dtlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72891 */ "dtlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=72978 */ "dtlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73059 */ "dtlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73143 */ "dtlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73231 */ "dtlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73317 */ "dtlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73393 */ "dtlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73474 */ "dtlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73560 */ "dtlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73640 */ "dtlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73723 */ "dtlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73810 */ "dtlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73895 */ "dtlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=73977 */ "dtlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74064 */ "dtlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74156 */ "dtlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74242 */ "dtlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74331 */ "dtlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=74420 */ "dtlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74507 */ "dtlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=74590 */ "dtlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74678 */ "dtlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74771 */ "dtlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74858 */ "dtlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=74948 */ "dtlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75038 */ "dtlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75126 */ "dtlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75208 */ "dtlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75295 */ "dtlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75387 */ "dtlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75473 */ "dtlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75562 */ "dtlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75651 */ "dtlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75738 */ "dtlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75826 */ "dtlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=75919 */ "dtlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76017 */ "dtlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76109 */ "dtlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76204 */ "dtlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=76299 */ "dtlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76392 */ "dtlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=76482 */ "dtlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76577 */ "dtlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76677 */ "dtlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76771 */ "dtlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76868 */ "dtlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=76965 */ "dtlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77060 */ "dtlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77156 */ "dtlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77257 */ "dtlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77363 */ "dtlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77463 */ "dtlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77566 */ "dtlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77669 */ "dtlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77770 */ "dtlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77866 */ "dtlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=77967 */ "dtlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78073 */ "dtlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78173 */ "dtlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78276 */ "dtlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78379 */ "dtlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78480 */ "dtlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78556 */ "dtlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78637 */ "dtlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78712 */ "dtlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78790 */ "dtlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78872 */ "dtlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=78952 */ "d-tlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79024 */ "d-tlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79101 */ "d-tlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79183 */ "d-tlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79270 */ "d-tlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79351 */ "d-tlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79435 */ "d-tlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79523 */ "d-tlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79609 */ "d-tlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79687 */ "d-tlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79770 */ "d-tlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79858 */ "d-tlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=79940 */ "d-tlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80025 */ "d-tlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80114 */ "d-tlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80201 */ "d-tlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80278 */ "d-tlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80360 */ "d-tlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80447 */ "d-tlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80528 */ "d-tlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80612 */ "d-tlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80700 */ "d-tlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80786 */ "d-tlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80869 */ "d-tlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=80957 */ "d-tlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81050 */ "d-tlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81137 */ "d-tlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81227 */ "d-tlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81317 */ "d-tlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81405 */ "d-tlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81489 */ "d-tlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81578 */ "d-tlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81672 */ "d-tlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81760 */ "d-tlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81851 */ "d-tlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=81942 */ "d-tlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82031 */ "d-tlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82114 */ "d-tlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82202 */ "d-tlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82295 */ "d-tlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82382 */ "d-tlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82472 */ "d-tlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82562 */ "d-tlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82650 */ "d-tlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82739 */ "d-tlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82833 */ "d-tlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=82932 */ "d-tlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83025 */ "d-tlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83121 */ "d-tlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83217 */ "d-tlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83311 */ "d-tlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83402 */ "d-tlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83498 */ "d-tlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83599 */ "d-tlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83694 */ "d-tlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83792 */ "d-tlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83890 */ "d-tlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=83986 */ "d-tlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84083 */ "d-tlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84185 */ "d-tlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84292 */ "d-tlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84393 */ "d-tlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84497 */ "d-tlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84601 */ "d-tlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84703 */ "d-tlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84800 */ "d-tlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=84902 */ "d-tlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85009 */ "d-tlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85110 */ "d-tlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85214 */ "d-tlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85318 */ "d-tlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85420 */ "d-tlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85497 */ "d-tlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85579 */ "d-tlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85655 */ "d-tlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85734 */ "d-tlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85817 */ "d-tlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85898 */ "data-tlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=85973 */ "data-tlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86053 */ "data-tlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86138 */ "data-tlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86228 */ "data-tlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86312 */ "data-tlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86399 */ "data-tlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86490 */ "data-tlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86579 */ "data-tlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86660 */ "data-tlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86746 */ "data-tlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86837 */ "data-tlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=86922 */ "data-tlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87010 */ "data-tlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87102 */ "data-tlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87192 */ "data-tlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87272 */ "data-tlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87357 */ "data-tlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87447 */ "data-tlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87531 */ "data-tlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87618 */ "data-tlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87709 */ "data-tlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87798 */ "data-tlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87884 */ "data-tlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=87975 */ "data-tlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88071 */ "data-tlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88161 */ "data-tlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88254 */ "data-tlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88347 */ "data-tlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88438 */ "data-tlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88525 */ "data-tlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88617 */ "data-tlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88714 */ "data-tlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88805 */ "data-tlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88899 */ "data-tlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=88993 */ "data-tlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89085 */ "data-tlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89171 */ "data-tlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89262 */ "data-tlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89358 */ "data-tlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89448 */ "data-tlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89541 */ "data-tlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89634 */ "data-tlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89725 */ "data-tlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89817 */ "data-tlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=89914 */ "data-tlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90016 */ "data-tlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90112 */ "data-tlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90211 */ "data-tlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90310 */ "data-tlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90407 */ "data-tlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90501 */ "data-tlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90600 */ "data-tlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90704 */ "data-tlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90802 */ "data-tlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=90903 */ "data-tlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91004 */ "data-tlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91103 */ "data-tlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91203 */ "data-tlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91308 */ "data-tlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91418 */ "data-tlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91522 */ "data-tlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91629 */ "data-tlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91736 */ "data-tlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91841 */ "data-tlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=91941 */ "data-tlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92046 */ "data-tlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92156 */ "data-tlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92260 */ "data-tlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92367 */ "data-tlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92474 */ "data-tlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92579 */ "data-tlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92659 */ "data-tlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92744 */ "data-tlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92823 */ "data-tlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92905 */ "data-tlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=92991 */ "data-tlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93075 */ "itlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93153 */ "itlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93236 */ "itlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93324 */ "itlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93417 */ "itlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93504 */ "itlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93594 */ "itlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=93688 */ "itlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93780 */ "itlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=93864 */ "itlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=93953 */ "itlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94047 */ "itlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94135 */ "itlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94226 */ "itlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94321 */ "itlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94414 */ "itlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94497 */ "itlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94585 */ "itlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94678 */ "itlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94765 */ "itlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94855 */ "itlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=94949 */ "itlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95041 */ "itlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95124 */ "itlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95212 */ "itlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95294 */ "itlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95379 */ "itlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95468 */ "itlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95555 */ "i-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95634 */ "i-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95718 */ "i-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95807 */ "i-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95901 */ "i-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=95989 */ "i-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96080 */ "i-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96175 */ "i-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96268 */ "i-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96353 */ "i-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96443 */ "i-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96538 */ "i-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96627 */ "i-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96719 */ "i-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96815 */ "i-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96909 */ "i-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=96993 */ "i-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97082 */ "i-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97176 */ "i-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97264 */ "i-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97355 */ "i-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97450 */ "i-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97543 */ "i-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97627 */ "i-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97716 */ "i-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97799 */ "i-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97885 */ "i-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=97975 */ "i-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98063 */ "instruction-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98152 */ "instruction-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98246 */ "instruction-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98345 */ "instruction-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98449 */ "instruction-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98547 */ "instruction-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98648 */ "instruction-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98753 */ "instruction-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98856 */ "instruction-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=98951 */ "instruction-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99051 */ "instruction-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99156 */ "instruction-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99255 */ "instruction-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99357 */ "instruction-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99463 */ "instruction-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99567 */ "instruction-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99661 */ "instruction-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99760 */ "instruction-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99864 */ "instruction-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=99962 */ "instruction-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100063 */ "instruction-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100168 */ "instruction-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100271 */ "instruction-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100365 */ "instruction-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100464 */ "instruction-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100557 */ "instruction-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100653 */ "instruction-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100753 */ "instruction-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100851 */ "branch\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=100938 */ "branch-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101030 */ "branch-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101127 */ "branch-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101229 */ "branch-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101325 */ "branch-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101424 */ "branch-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=101527 */ "branch-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101628 */ "branch-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=101721 */ "branch-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101819 */ "branch-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=101922 */ "branch-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102019 */ "branch-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102119 */ "branch-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102223 */ "branch-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102325 */ "branch-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102417 */ "branch-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102514 */ "branch-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102616 */ "branch-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102712 */ "branch-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102811 */ "branch-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=102914 */ "branch-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103015 */ "branch-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103107 */ "branch-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103204 */ "branch-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103295 */ "branch-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103389 */ "branch-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103485 */ "branches-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103579 */ "branches-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103678 */ "branches-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103782 */ "branches-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103880 */ "branches-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=103981 */ "branches-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104086 */ "branches-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104189 */ "branches-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104284 */ "branches-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104384 */ "branches-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104489 */ "branches-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104588 */ "branches-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104690 */ "branches-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104796 */ "branches-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104900 */ "branches-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=104994 */ "branches-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105093 */ "branches-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105197 */ "branches-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105295 */ "branches-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105396 */ "branches-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105501 */ "branches-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105604 */ "branches-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105698 */ "branches-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105797 */ "branches-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105890 */ "branches-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=105986 */ "branches-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106086 */ "branches-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106184 */ "bpu\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106268 */ "bpu-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106357 */ "bpu-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106451 */ "bpu-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106550 */ "bpu-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106643 */ "bpu-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106739 */ "bpu-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106839 */ "bpu-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=106937 */ "bpu-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107027 */ "bpu-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107122 */ "bpu-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107222 */ "bpu-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107316 */ "bpu-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107413 */ "bpu-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107514 */ "bpu-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107613 */ "bpu-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107702 */ "bpu-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107796 */ "bpu-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107895 */ "bpu-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=107988 */ "bpu-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108084 */ "bpu-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108184 */ "bpu-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108282 */ "bpu-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108371 */ "bpu-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108465 */ "bpu-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108553 */ "bpu-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108644 */ "bpu-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108739 */ "bpu-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108832 */ "btb\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=108916 */ "btb-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109005 */ "btb-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109099 */ "btb-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109198 */ "btb-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109291 */ "btb-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109387 */ "btb-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109487 */ "btb-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109585 */ "btb-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109675 */ "btb-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109770 */ "btb-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109870 */ "btb-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=109964 */ "btb-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110061 */ "btb-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110162 */ "btb-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110261 */ "btb-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110350 */ "btb-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110444 */ "btb-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110543 */ "btb-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110636 */ "btb-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110732 */ "btb-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110832 */ "btb-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=110930 */ "btb-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111019 */ "btb-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111113 */ "btb-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111201 */ "btb-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111292 */ "btb-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111387 */ "btb-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111480 */ "bpc\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111564 */ "bpc-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111653 */ "bpc-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111747 */ "bpc-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111846 */ "bpc-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=111939 */ "bpc-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112035 */ "bpc-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112135 */ "bpc-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112233 */ "bpc-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112323 */ "bpc-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112418 */ "bpc-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112518 */ "bpc-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112612 */ "bpc-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112709 */ "bpc-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112810 */ "bpc-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112909 */ "bpc-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=112998 */ "bpc-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113092 */ "bpc-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113191 */ "bpc-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113284 */ "bpc-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113380 */ "bpc-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113480 */ "bpc-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113578 */ "bpc-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113667 */ "bpc-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113761 */ "bpc-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113849 */ "bpc-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=113940 */ "bpc-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114035 */ "bpc-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114128 */ "node\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114203 */ "node-load\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114283 */ "node-load-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114368 */ "node-load-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114458 */ "node-load-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114542 */ "node-load-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114629 */ "node-load-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=114720 */ "node-load-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114809 */ "node-loads\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=114890 */ "node-loads-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=114976 */ "node-loads-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115067 */ "node-loads-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115152 */ "node-loads-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115240 */ "node-loads-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115332 */ "node-loads-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115422 */ "node-read\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115502 */ "node-read-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115587 */ "node-read-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115677 */ "node-read-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115761 */ "node-read-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115848 */ "node-read-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=115939 */ "node-read-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116028 */ "node-store\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116114 */ "node-store-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116205 */ "node-store-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116301 */ "node-store-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116391 */ "node-store-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116484 */ "node-store-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=116577 */ "node-store-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116668 */ "node-stores\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=116755 */ "node-stores-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116847 */ "node-stores-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=116944 */ "node-stores-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117035 */ "node-stores-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117129 */ "node-stores-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117223 */ "node-stores-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117315 */ "node-write\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117401 */ "node-write-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117492 */ "node-write-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117588 */ "node-write-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117678 */ "node-write-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117771 */ "node-write-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117864 */ "node-write-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=117955 */ "node-prefetch\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118047 */ "node-prefetch-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118144 */ "node-prefetch-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118246 */ "node-prefetch-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118342 */ "node-prefetch-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118441 */ "node-prefetch-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=118540 */ "node-prefetch-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118637 */ "node-prefetches\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=118731 */ "node-prefetches-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118830 */ "node-prefetches-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=118934 */ "node-prefetches-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119032 */ "node-prefetches-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119133 */ "node-prefetches-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119234 */ "node-prefetches-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119333 */ "node-speculative-read\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119433 */ "node-speculative-read-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119538 */ "node-speculative-read-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119648 */ "node-speculative-read-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119752 */ "node-speculative-read-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119859 */ "node-speculative-read-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=119966 */ "node-speculative-read-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120071 */ "node-speculative-load\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120171 */ "node-speculative-load-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120276 */ "node-speculative-load-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120386 */ "node-speculative-load-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120490 */ "node-speculative-load-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120597 */ "node-speculative-load-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120704 */ "node-speculative-load-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120809 */ "node-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120889 */ "node-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=120974 */ "node-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=121053 */ "node-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=121135 */ "node-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=121221 */ "node-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000"</div><div class='add'>+/* offset=121305 */ "cpu-cycles\000legacy hardware\000Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cycles]\000legacy-hardware-config=0\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=121467 */ "cycles\000legacy hardware\000Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cpu-cycles]\000legacy-hardware-config=0\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=121629 */ "instructions\000legacy hardware\000Retired instructions. Be careful, these can be affected by various issues, most notably hardware interrupt counts\000legacy-hardware-config=1\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=121805 */ "cache-references\000legacy hardware\000Cache accesses. Usually this indicates Last Level Cache accesses but this may vary depending on your CPU.  This may include prefetches and coherency messages; again this depends on the design of your CPU\000legacy-hardware-config=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122075 */ "cache-misses\000legacy hardware\000Cache misses. Usually this indicates Last Level Cache misses; this is intended to be used in conjunction with the PERF_COUNT_HW_CACHE_REFERENCES event to calculate cache miss rates\000legacy-hardware-config=3\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122318 */ "branches\000legacy hardware\000Retired branch instructions [This event is an alias of branch-instructions]\000legacy-hardware-config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122452 */ "branch-instructions\000legacy hardware\000Retired branch instructions [This event is an alias of branches]\000legacy-hardware-config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122586 */ "branch-misses\000legacy hardware\000Mispredicted branch instructions\000legacy-hardware-config=5\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122682 */ "bus-cycles\000legacy hardware\000Bus cycles, which can be different from total cycles\000legacy-hardware-config=6\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122795 */ "stalled-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of idle-cycles-frontend]\000legacy-hardware-config=7\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=122945 */ "idle-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of stalled-cycles-fronted]\000legacy-hardware-config=7\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123094 */ "stalled-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of idle-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123247 */ "idle-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of stalled-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123400 */ "ref-cycles\000legacy hardware\000Total cycles; not affected by CPU frequency scaling\000legacy-hardware-config=9\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123512 */ "software\000"</div><div class='add'>+/* offset=123521 */ "cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\000001e-6msec\000\000\000\000\000"</div><div class='add'>+/* offset=123607 */ "task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\000001e-6msec\000\000\000\000\000"</div><div class='add'>+/* offset=123695 */ "faults\000software\000Number of page faults [This event is an alias of page-faults]\000config=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123790 */ "page-faults\000software\000Number of page faults [This event is an alias of faults]\000config=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123885 */ "context-switches\000software\000Number of context switches [This event is an alias of cs]\000config=3\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=123986 */ "cs\000software\000Number of context switches [This event is an alias of context-switches]\000config=3\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124087 */ "cpu-migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of migrations]\000config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124219 */ "migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu-migrations]\000config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124351 */ "minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\000config=5\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124460 */ "major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000config=6\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124563 */ "alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=7\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124655 */ "emulation-faults\000software\000Number of kernel handled unimplemented instruction faults handled through emulation\000config=8\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124782 */ "dummy\000software\000A placeholder event that doesn't count anything\000config=9\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124862 */ "bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000config=0xa\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=124964 */ "cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000config=0xb\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125067 */ "tool\000"</div><div class='add'>+/* offset=125072 */ "duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125148 */ "user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125218 */ "system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125286 */ "has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125362 */ "num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated with a logical Linux CPU\000config=5\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125507 */ "num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\000config=6\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125610 */ "num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a core\000config=7\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125727 */ "num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125803 */ "num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125889 */ "slots\000tool\000Number of functional units that in parallel can execute parts of an instruction\000config=0xa\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=125999 */ "smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\000config=0xb\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126106 */ "system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000config=0xc\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126205 */ "core_wide\000tool\0001 if not SMT, if SMT are events being gathered on all SMT threads 1 otherwise 0\000config=0xd\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126319 */ "target_cpu\000tool\0001 if CPUs being analyzed, 0 if threads/processes\000config=0xe\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126403 */ "bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126465 */ "bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126527 */ "l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attributable Level 3 cache access, read\000"</div><div class='add'>+/* offset=126625 */ "segment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0x80\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126727 */ "dispatch_blocked.any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,period=200000,umask=0x20\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126860 */ "eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0x3a,period=200000\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=126978 */ "hisi_sccl,ddrc\000"</div><div class='add'>+/* offset=126993 */ "uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127063 */ "uncore_cbox\000"</div><div class='add'>+/* offset=127075 */ "unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\000event=0x22,umask=0x81\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127229 */ "event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127283 */ "event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127341 */ "hisi_sccl,l3c\000"</div><div class='add'>+/* offset=127355 */ "uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127423 */ "uncore_imc_free_running\000"</div><div class='add'>+/* offset=127447 */ "uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127527 */ "uncore_imc\000"</div><div class='add'>+/* offset=127538 */ "uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127603 */ "uncore_sys_ddr_pmu\000"</div><div class='add'>+/* offset=127622 */ "sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127698 */ "uncore_sys_ccn_pmu\000"</div><div class='add'>+/* offset=127717 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127794 */ "uncore_sys_cmn_pmu\000"</div><div class='add'>+/* offset=127813 */ "sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000"</div><div class='add'>+/* offset=127956 */ "CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)\000\000Average CPU utilization\000\0001CPUs\000\000\000\000011"</div><div class='add'>+/* offset=128142 */ "cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switches@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Context switches per CPU second\000\0001cs/sec\000\000\000\000011"</div><div class='add'>+/* offset=128375 */ "migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Process migrations to a new CPU per CPU second\000\0001migrations/sec\000\000\000\000011"</div><div class='add'>+/* offset=128635 */ "page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faults@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Page faults per CPU second\000\0001faults/sec\000\000\000\000011"</div><div class='add'>+/* offset=128866 */ "insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle &lt; 1\000Instructions Per Cycle\000\0001instructions\000\000\000\000001"</div><div class='add'>+/* offset=128979 */ "stalled_cycles_per_instruction\000Default\000max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions\000\000Max front or backend stalls per instruction\000\000\000\000\000\000001"</div><div class='add'>+/* offset=129143 */ "frontend_cycles_idle\000Default\000stalled\\-cycles\\-frontend / cpu\\-cycles\000frontend_cycles_idle &gt; 0.1\000Frontend stalls per cycle\000\000\000\000\000\000001"</div><div class='add'>+/* offset=129273 */ "backend_cycles_idle\000Default\000stalled\\-cycles\\-backend / cpu\\-cycles\000backend_cycles_idle &gt; 0.2\000Backend stalls per cycle\000\000\000\000\000\000001"</div><div class='add'>+/* offset=129399 */ "cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Cycles per CPU second\000\0001GHz\000\000\000\000011"</div><div class='add'>+/* offset=129575 */ "branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Branches per CPU second\000\0001000M/sec\000\000\000\000011"</div><div class='add'>+/* offset=129755 */ "branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate &gt; 0.05\000Branch miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=129859 */ "l1d_miss_rate\000Default2\000L1\\-dcache\\-load\\-misses / L1\\-dcache\\-loads\000l1d_miss_rate &gt; 0.05\000L1D  miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=129975 */ "llc_miss_rate\000Default2\000LLC\\-load\\-misses / LLC\\-loads\000llc_miss_rate &gt; 0.05\000LLC miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=130076 */ "l1i_miss_rate\000Default3\000L1\\-icache\\-load\\-misses / L1\\-icache\\-loads\000l1i_miss_rate &gt; 0.05\000L1I miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=130191 */ "dtlb_miss_rate\000Default3\000dTLB\\-load\\-misses / dTLB\\-loads\000dtlb_miss_rate &gt; 0.05\000dTLB miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=130297 */ "itlb_miss_rate\000Default3\000iTLB\\-load\\-misses / iTLB\\-loads\000itlb_miss_rate &gt; 0.05\000iTLB miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=130403 */ "l1_prefetch_miss_rate\000Default4\000L1\\-dcache\\-prefetch\\-misses / L1\\-dcache\\-prefetches\000l1_prefetch_miss_rate &gt; 0.05\000L1 prefetch miss rate\000\000100%\000\000\000\000001"</div><div class='add'>+/* offset=130551 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=130574 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=130638 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=130805 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=130870 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=130938 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131010 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131105 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131240 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131305 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131374 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131445 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131468 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131491 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\000000"</div><div class='add'>+/* offset=131512 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\000000"</div><div class='ctx'> ;</div><div class='ctx'> </div><div class='add'>+static const struct compact_pmu_event pmu_events__common_default_core[] = {</div><div class='add'>+{ 111480 }, /* bpc\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113849 }, /* bpc-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111564 }, /* bpc-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111939 }, /* bpc-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112135 }, /* bpc-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112035 }, /* bpc-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111846 }, /* bpc-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111747 }, /* bpc-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111653 }, /* bpc-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112233 }, /* bpc-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112612 }, /* bpc-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112810 }, /* bpc-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112709 }, /* bpc-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112518 }, /* bpc-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112418 }, /* bpc-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112323 }, /* bpc-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114035 }, /* bpc-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113940 }, /* bpc-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113761 }, /* bpc-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112909 }, /* bpc-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113284 }, /* bpc-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113480 }, /* bpc-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113380 }, /* bpc-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113191 }, /* bpc-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113092 }, /* bpc-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 112998 }, /* bpc-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113667 }, /* bpc-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 113578 }, /* bpc-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106184 }, /* bpu\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108553 }, /* bpu-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106268 }, /* bpu-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106643 }, /* bpu-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106839 }, /* bpu-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106739 }, /* bpu-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106550 }, /* bpu-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106451 }, /* bpu-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106357 }, /* bpu-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106937 }, /* bpu-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107316 }, /* bpu-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107514 }, /* bpu-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107413 }, /* bpu-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107222 }, /* bpu-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107122 }, /* bpu-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107027 }, /* bpu-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108739 }, /* bpu-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108644 }, /* bpu-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108465 }, /* bpu-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107613 }, /* bpu-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107988 }, /* bpu-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108184 }, /* bpu-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108084 }, /* bpu-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107895 }, /* bpu-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107796 }, /* bpu-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 107702 }, /* bpu-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108371 }, /* bpu-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108282 }, /* bpu-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100851 }, /* branch\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103295 }, /* branch-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 122452 }, /* branch-instructions\000legacy hardware\000Retired branch instructions [This event is an alias of branches]\000legacy-hardware-config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 100938 }, /* branch-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101325 }, /* branch-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101527 }, /* branch-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101424 }, /* branch-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 101229 }, /* branch-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101127 }, /* branch-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101030 }, /* branch-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101628 }, /* branch-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 102019 }, /* branch-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102223 }, /* branch-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102119 }, /* branch-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101922 }, /* branch-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101819 }, /* branch-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 101721 }, /* branch-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103389 }, /* branch-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 122586 }, /* branch-misses\000legacy hardware\000Mispredicted branch instructions\000legacy-hardware-config=5\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 103204 }, /* branch-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102325 }, /* branch-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102712 }, /* branch-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102914 }, /* branch-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102811 }, /* branch-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102616 }, /* branch-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102514 }, /* branch-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 102417 }, /* branch-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103107 }, /* branch-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103015 }, /* branch-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 122318 }, /* branches\000legacy hardware\000Retired branch instructions [This event is an alias of branch-instructions]\000legacy-hardware-config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 105890 }, /* branches-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103485 }, /* branches-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103880 }, /* branches-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104086 }, /* branches-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103981 }, /* branches-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103782 }, /* branches-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103678 }, /* branches-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 103579 }, /* branches-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104189 }, /* branches-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104588 }, /* branches-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104796 }, /* branches-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104690 }, /* branches-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104489 }, /* branches-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104384 }, /* branches-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104284 }, /* branches-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 106086 }, /* branches-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105986 }, /* branches-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105797 }, /* branches-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104900 }, /* branches-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105295 }, /* branches-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105501 }, /* branches-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105396 }, /* branches-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105197 }, /* branches-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105093 }, /* branches-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 104994 }, /* branches-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105698 }, /* branches-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 105604 }, /* branches-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108832 }, /* btb\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111201 }, /* btb-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 108916 }, /* btb-load\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109291 }, /* btb-load-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109487 }, /* btb-load-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109387 }, /* btb-load-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109198 }, /* btb-load-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109099 }, /* btb-load-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109005 }, /* btb-load-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109585 }, /* btb-loads\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109964 }, /* btb-loads-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110162 }, /* btb-loads-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110061 }, /* btb-loads-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109870 }, /* btb-loads-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109770 }, /* btb-loads-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 109675 }, /* btb-loads-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111387 }, /* btb-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111292 }, /* btb-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111113 }, /* btb-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110261 }, /* btb-read\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110636 }, /* btb-read-access\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110832 }, /* btb-read-miss\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110732 }, /* btb-read-misses\000legacy cache\000Branch prediction unit read misses\000legacy-cache-config=0x10005\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110543 }, /* btb-read-ops\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110444 }, /* btb-read-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110350 }, /* btb-read-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 111019 }, /* btb-reference\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 110930 }, /* btb-refs\000legacy cache\000Branch prediction unit read accesses\000legacy-cache-config=5\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 122682 }, /* bus-cycles\000legacy hardware\000Bus cycles, which can be different from total cycles\000legacy-hardware-config=6\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 122075 }, /* cache-misses\000legacy hardware\000Cache misses. Usually this indicates Last Level Cache misses; this is intended to be used in conjunction with the PERF_COUNT_HW_CACHE_REFERENCES event to calculate cache miss rates\000legacy-hardware-config=3\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 121805 }, /* cache-references\000legacy hardware\000Cache accesses. Usually this indicates Last Level Cache accesses but this may vary depending on your CPU.  This may include prefetches and coherency messages; again this depends on the design of your CPU\000legacy-hardware-config=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 121305 }, /* cpu-cycles\000legacy hardware\000Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cycles]\000legacy-hardware-config=0\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 121467 }, /* cycles\000legacy hardware\000Total cycles. Be wary of what happens during CPU frequency scaling [This event is an alias of cpu-cycles]\000legacy-hardware-config=0\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 78952 }, /* d-tlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85655 }, /* d-tlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79024 }, /* d-tlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79351 }, /* d-tlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79523 }, /* d-tlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79435 }, /* d-tlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79270 }, /* d-tlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79183 }, /* d-tlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79101 }, /* d-tlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79609 }, /* d-tlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79940 }, /* d-tlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80114 }, /* d-tlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80025 }, /* d-tlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79858 }, /* d-tlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79770 }, /* d-tlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 79687 }, /* d-tlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85817 }, /* d-tlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85734 }, /* d-tlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85579 }, /* d-tlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82650 }, /* d-tlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83025 }, /* d-tlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83217 }, /* d-tlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83121 }, /* d-tlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82932 }, /* d-tlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82833 }, /* d-tlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82739 }, /* d-tlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83311 }, /* d-tlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83694 }, /* d-tlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83890 }, /* d-tlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83792 }, /* d-tlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83599 }, /* d-tlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83498 }, /* d-tlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83402 }, /* d-tlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80201 }, /* d-tlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80528 }, /* d-tlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80700 }, /* d-tlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80612 }, /* d-tlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80447 }, /* d-tlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80360 }, /* d-tlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80278 }, /* d-tlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85497 }, /* d-tlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85420 }, /* d-tlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84703 }, /* d-tlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85110 }, /* d-tlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85318 }, /* d-tlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85214 }, /* d-tlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85009 }, /* d-tlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84902 }, /* d-tlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84800 }, /* d-tlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 83986 }, /* d-tlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84393 }, /* d-tlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84601 }, /* d-tlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84497 }, /* d-tlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84292 }, /* d-tlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84185 }, /* d-tlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 84083 }, /* d-tlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80786 }, /* d-tlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81137 }, /* d-tlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81317 }, /* d-tlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81227 }, /* d-tlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81050 }, /* d-tlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80957 }, /* d-tlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 80869 }, /* d-tlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81405 }, /* d-tlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81760 }, /* d-tlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81942 }, /* d-tlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81851 }, /* d-tlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81672 }, /* d-tlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81578 }, /* d-tlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 81489 }, /* d-tlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82031 }, /* d-tlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82382 }, /* d-tlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82562 }, /* d-tlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82472 }, /* d-tlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82295 }, /* d-tlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82202 }, /* d-tlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 82114 }, /* d-tlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85898 }, /* data-tlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92823 }, /* data-tlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 85973 }, /* data-tlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86312 }, /* data-tlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86490 }, /* data-tlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86399 }, /* data-tlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86228 }, /* data-tlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86138 }, /* data-tlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86053 }, /* data-tlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86579 }, /* data-tlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86922 }, /* data-tlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87102 }, /* data-tlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87010 }, /* data-tlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86837 }, /* data-tlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86746 }, /* data-tlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 86660 }, /* data-tlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92991 }, /* data-tlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92905 }, /* data-tlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92744 }, /* data-tlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89725 }, /* data-tlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90112 }, /* data-tlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90310 }, /* data-tlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90211 }, /* data-tlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90016 }, /* data-tlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89914 }, /* data-tlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89817 }, /* data-tlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90407 }, /* data-tlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90802 }, /* data-tlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91004 }, /* data-tlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90903 }, /* data-tlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90704 }, /* data-tlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90600 }, /* data-tlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 90501 }, /* data-tlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87192 }, /* data-tlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87531 }, /* data-tlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87709 }, /* data-tlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87618 }, /* data-tlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87447 }, /* data-tlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87357 }, /* data-tlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87272 }, /* data-tlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92659 }, /* data-tlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92579 }, /* data-tlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91841 }, /* data-tlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92260 }, /* data-tlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92474 }, /* data-tlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92367 }, /* data-tlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92156 }, /* data-tlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 92046 }, /* data-tlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91941 }, /* data-tlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91103 }, /* data-tlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91522 }, /* data-tlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91736 }, /* data-tlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91629 }, /* data-tlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91418 }, /* data-tlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91308 }, /* data-tlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 91203 }, /* data-tlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87798 }, /* data-tlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88161 }, /* data-tlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88347 }, /* data-tlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88254 }, /* data-tlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88071 }, /* data-tlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87975 }, /* data-tlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 87884 }, /* data-tlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88438 }, /* data-tlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88805 }, /* data-tlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88993 }, /* data-tlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88899 }, /* data-tlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88714 }, /* data-tlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88617 }, /* data-tlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 88525 }, /* data-tlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89085 }, /* data-tlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89448 }, /* data-tlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89634 }, /* data-tlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89541 }, /* data-tlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89358 }, /* data-tlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89262 }, /* data-tlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 89171 }, /* data-tlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72083 }, /* dtlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78712 }, /* dtlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72154 }, /* dtlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72477 }, /* dtlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72647 }, /* dtlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72560 }, /* dtlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 72397 }, /* dtlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72311 }, /* dtlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72230 }, /* dtlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72732 }, /* dtlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 73059 }, /* dtlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73231 }, /* dtlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73143 }, /* dtlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72978 }, /* dtlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72891 }, /* dtlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 72809 }, /* dtlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78872 }, /* dtlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78790 }, /* dtlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78637 }, /* dtlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75738 }, /* dtlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76109 }, /* dtlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76299 }, /* dtlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76204 }, /* dtlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 76017 }, /* dtlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75919 }, /* dtlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75826 }, /* dtlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76392 }, /* dtlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 76771 }, /* dtlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76965 }, /* dtlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76868 }, /* dtlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76677 }, /* dtlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76577 }, /* dtlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 76482 }, /* dtlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73317 }, /* dtlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73640 }, /* dtlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73810 }, /* dtlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73723 }, /* dtlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73560 }, /* dtlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73474 }, /* dtlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73393 }, /* dtlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78556 }, /* dtlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78480 }, /* dtlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77770 }, /* dtlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78173 }, /* dtlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78379 }, /* dtlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78276 }, /* dtlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 78073 }, /* dtlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77967 }, /* dtlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77866 }, /* dtlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77060 }, /* dtlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77463 }, /* dtlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77669 }, /* dtlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77566 }, /* dtlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache-config=0x10203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77363 }, /* dtlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77257 }, /* dtlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 77156 }, /* dtlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-config=0x203\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73895 }, /* dtlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74242 }, /* dtlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74420 }, /* dtlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74331 }, /* dtlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 74156 }, /* dtlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74064 }, /* dtlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 73977 }, /* dtlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74507 }, /* dtlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 74858 }, /* dtlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75038 }, /* dtlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74948 }, /* dtlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74771 }, /* dtlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74678 }, /* dtlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 74590 }, /* dtlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75126 }, /* dtlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75473 }, /* dtlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75651 }, /* dtlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75562 }, /* dtlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-config=0x10103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75387 }, /* dtlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75295 }, /* dtlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 75208 }, /* dtlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x103\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95555 }, /* i-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97799 }, /* i-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95634 }, /* i-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95989 }, /* i-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96175 }, /* i-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96080 }, /* i-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95901 }, /* i-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95807 }, /* i-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95718 }, /* i-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96268 }, /* i-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96627 }, /* i-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96815 }, /* i-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96719 }, /* i-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96538 }, /* i-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96443 }, /* i-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96353 }, /* i-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97975 }, /* i-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97885 }, /* i-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97716 }, /* i-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96909 }, /* i-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97264 }, /* i-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97450 }, /* i-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97355 }, /* i-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97176 }, /* i-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97082 }, /* i-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 96993 }, /* i-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97627 }, /* i-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 97543 }, /* i-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 123247 }, /* idle-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of stalled-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 122945 }, /* idle-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of stalled-cycles-fronted]\000legacy-hardware-config=7\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 98063 }, /* instruction-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100557 }, /* instruction-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98152 }, /* instruction-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98547 }, /* instruction-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98753 }, /* instruction-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98648 }, /* instruction-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98449 }, /* instruction-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98345 }, /* instruction-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98246 }, /* instruction-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98856 }, /* instruction-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99255 }, /* instruction-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99463 }, /* instruction-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99357 }, /* instruction-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99156 }, /* instruction-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99051 }, /* instruction-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 98951 }, /* instruction-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100753 }, /* instruction-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100653 }, /* instruction-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100464 }, /* instruction-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99567 }, /* instruction-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99962 }, /* instruction-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100168 }, /* instruction-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100063 }, /* instruction-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99864 }, /* instruction-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99760 }, /* instruction-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99661 }, /* instruction-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100365 }, /* instruction-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 100271 }, /* instruction-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 121629 }, /* instructions\000legacy hardware\000Retired instructions. Be careful, these can be affected by various issues, most notably hardware interrupt counts\000legacy-hardware-config=1\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 93075 }, /* itlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95294 }, /* itlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93153 }, /* itlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93504 }, /* itlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93688 }, /* itlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93594 }, /* itlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 93417 }, /* itlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93324 }, /* itlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93236 }, /* itlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93780 }, /* itlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 94135 }, /* itlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94321 }, /* itlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94226 }, /* itlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94047 }, /* itlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93953 }, /* itlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 93864 }, /* itlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95468 }, /* itlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95379 }, /* itlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95212 }, /* itlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94414 }, /* itlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94765 }, /* itlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94949 }, /* itlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94855 }, /* itlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94678 }, /* itlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94585 }, /* itlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 94497 }, /* itlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95124 }, /* itlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 95041 }, /* itlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8037 }, /* l1-d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15406 }, /* l1-d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8118 }, /* l1-d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8481 }, /* l1-d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8671 }, /* l1-d-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8574 }, /* l1-d-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8391 }, /* l1-d-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8295 }, /* l1-d-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8204 }, /* l1-d-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8766 }, /* l1-d-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9133 }, /* l1-d-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9325 }, /* l1-d-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9227 }, /* l1-d-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9042 }, /* l1-d-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8945 }, /* l1-d-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 8853 }, /* l1-d-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15586 }, /* l1-d-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15494 }, /* l1-d-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15321 }, /* l1-d-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12122 }, /* l1-d-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12533 }, /* l1-d-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12743 }, /* l1-d-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12638 }, /* l1-d-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12431 }, /* l1-d-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12323 }, /* l1-d-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12220 }, /* l1-d-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12846 }, /* l1-d-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13265 }, /* l1-d-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13479 }, /* l1-d-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13372 }, /* l1-d-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13161 }, /* l1-d-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13051 }, /* l1-d-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12946 }, /* l1-d-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9421 }, /* l1-d-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9784 }, /* l1-d-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9974 }, /* l1-d-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9877 }, /* l1-d-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9694 }, /* l1-d-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9598 }, /* l1-d-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 9507 }, /* l1-d-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15230 }, /* l1-d-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15144 }, /* l1-d-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14364 }, /* l1-d-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14807 }, /* l1-d-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15033 }, /* l1-d-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14920 }, /* l1-d-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14697 }, /* l1-d-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14581 }, /* l1-d-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14470 }, /* l1-d-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13584 }, /* l1-d-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14027 }, /* l1-d-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14253 }, /* l1-d-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 14140 }, /* l1-d-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13917 }, /* l1-d-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13801 }, /* l1-d-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13690 }, /* l1-d-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10069 }, /* l1-d-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10456 }, /* l1-d-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10654 }, /* l1-d-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10555 }, /* l1-d-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10360 }, /* l1-d-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10258 }, /* l1-d-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10161 }, /* l1-d-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10751 }, /* l1-d-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11142 }, /* l1-d-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11342 }, /* l1-d-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11242 }, /* l1-d-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11045 }, /* l1-d-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10942 }, /* l1-d-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 10844 }, /* l1-d-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11440 }, /* l1-d-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11827 }, /* l1-d-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 12025 }, /* l1-d-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11926 }, /* l1-d-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11731 }, /* l1-d-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11629 }, /* l1-d-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 11532 }, /* l1-d-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23238 }, /* l1-data\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30829 }, /* l1-data-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23322 }, /* l1-data-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23697 }, /* l1-data-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23893 }, /* l1-data-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23793 }, /* l1-data-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23604 }, /* l1-data-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23505 }, /* l1-data-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23411 }, /* l1-data-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23991 }, /* l1-data-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24370 }, /* l1-data-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24568 }, /* l1-data-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24467 }, /* l1-data-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24276 }, /* l1-data-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24176 }, /* l1-data-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24081 }, /* l1-data-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31015 }, /* l1-data-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30920 }, /* l1-data-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30741 }, /* l1-data-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27452 }, /* l1-data-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27875 }, /* l1-data-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28091 }, /* l1-data-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27983 }, /* l1-data-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27770 }, /* l1-data-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27659 }, /* l1-data-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27553 }, /* l1-data-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28197 }, /* l1-data-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28628 }, /* l1-data-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28848 }, /* l1-data-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28738 }, /* l1-data-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28521 }, /* l1-data-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28408 }, /* l1-data-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28300 }, /* l1-data-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24667 }, /* l1-data-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25042 }, /* l1-data-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25238 }, /* l1-data-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25138 }, /* l1-data-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24949 }, /* l1-data-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24850 }, /* l1-data-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 24756 }, /* l1-data-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30647 }, /* l1-data-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30558 }, /* l1-data-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29757 }, /* l1-data-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30212 }, /* l1-data-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30444 }, /* l1-data-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30328 }, /* l1-data-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 30099 }, /* l1-data-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29980 }, /* l1-data-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29866 }, /* l1-data-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 28956 }, /* l1-data-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29411 }, /* l1-data-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29643 }, /* l1-data-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29527 }, /* l1-data-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29298 }, /* l1-data-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29179 }, /* l1-data-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 29065 }, /* l1-data-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25336 }, /* l1-data-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25735 }, /* l1-data-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25939 }, /* l1-data-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25837 }, /* l1-data-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25636 }, /* l1-data-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25531 }, /* l1-data-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 25431 }, /* l1-data-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26039 }, /* l1-data-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26442 }, /* l1-data-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26648 }, /* l1-data-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26545 }, /* l1-data-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26342 }, /* l1-data-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26236 }, /* l1-data-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26135 }, /* l1-data-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26749 }, /* l1-data-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27148 }, /* l1-data-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27352 }, /* l1-data-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27250 }, /* l1-data-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 27049 }, /* l1-data-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26944 }, /* l1-data-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 26844 }, /* l1-data-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 13 }, /* l1-dcache\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7752 }, /* l1-dcache-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 99 }, /* l1-dcache-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 482 }, /* l1-dcache-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 682 }, /* l1-dcache-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 580 }, /* l1-dcache-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 387 }, /* l1-dcache-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 286 }, /* l1-dcache-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 190 }, /* l1-dcache-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 782 }, /* l1-dcache-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 1169 }, /* l1-dcache-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1371 }, /* l1-dcache-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1268 }, /* l1-dcache-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1073 }, /* l1-dcache-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 971 }, /* l1-dcache-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 874 }, /* l1-dcache-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7942 }, /* l1-dcache-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7845 }, /* l1-dcache-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7662 }, /* l1-dcache-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4313 }, /* l1-dcache-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4744 }, /* l1-dcache-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4964 }, /* l1-dcache-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4854 }, /* l1-dcache-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 4637 }, /* l1-dcache-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4524 }, /* l1-dcache-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4416 }, /* l1-dcache-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5072 }, /* l1-dcache-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 5511 }, /* l1-dcache-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5735 }, /* l1-dcache-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5623 }, /* l1-dcache-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5402 }, /* l1-dcache-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5287 }, /* l1-dcache-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5177 }, /* l1-dcache-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1472 }, /* l1-dcache-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1855 }, /* l1-dcache-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2055 }, /* l1-dcache-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1953 }, /* l1-dcache-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1760 }, /* l1-dcache-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1659 }, /* l1-dcache-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 1563 }, /* l1-dcache-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7566 }, /* l1-dcache-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7475 }, /* l1-dcache-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6660 }, /* l1-dcache-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7123 }, /* l1-dcache-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7359 }, /* l1-dcache-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7241 }, /* l1-dcache-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 7008 }, /* l1-dcache-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6887 }, /* l1-dcache-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6771 }, /* l1-dcache-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5845 }, /* l1-dcache-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6308 }, /* l1-dcache-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6544 }, /* l1-dcache-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6426 }, /* l1-dcache-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6193 }, /* l1-dcache-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 6072 }, /* l1-dcache-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 5956 }, /* l1-dcache-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2155 }, /* l1-dcache-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2562 }, /* l1-dcache-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2770 }, /* l1-dcache-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2666 }, /* l1-dcache-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 2461 }, /* l1-dcache-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2354 }, /* l1-dcache-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2252 }, /* l1-dcache-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2872 }, /* l1-dcache-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 3283 }, /* l1-dcache-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3493 }, /* l1-dcache-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3388 }, /* l1-dcache-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3181 }, /* l1-dcache-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3073 }, /* l1-dcache-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 2970 }, /* l1-dcache-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3596 }, /* l1-dcache-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4003 }, /* l1-dcache-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4211 }, /* l1-dcache-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 4107 }, /* l1-dcache-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3902 }, /* l1-dcache-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3795 }, /* l1-dcache-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 3693 }, /* l1-dcache-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37366 }, /* l1-i\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43053 }, /* l1-i-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37454 }, /* l1-i-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37845 }, /* l1-i-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38049 }, /* l1-i-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37945 }, /* l1-i-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37748 }, /* l1-i-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37645 }, /* l1-i-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37547 }, /* l1-i-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38151 }, /* l1-i-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38546 }, /* l1-i-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38752 }, /* l1-i-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38647 }, /* l1-i-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38448 }, /* l1-i-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38344 }, /* l1-i-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38245 }, /* l1-i-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43247 }, /* l1-i-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43148 }, /* l1-i-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42961 }, /* l1-i-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39552 }, /* l1-i-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39991 }, /* l1-i-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40215 }, /* l1-i-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40103 }, /* l1-i-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39882 }, /* l1-i-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39767 }, /* l1-i-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39657 }, /* l1-i-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40325 }, /* l1-i-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40772 }, /* l1-i-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41000 }, /* l1-i-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40886 }, /* l1-i-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40661 }, /* l1-i-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40544 }, /* l1-i-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 40432 }, /* l1-i-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38855 }, /* l1-i-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39246 }, /* l1-i-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39450 }, /* l1-i-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39346 }, /* l1-i-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39149 }, /* l1-i-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 39046 }, /* l1-i-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 38948 }, /* l1-i-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42863 }, /* l1-i-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42770 }, /* l1-i-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41941 }, /* l1-i-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42412 }, /* l1-i-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42652 }, /* l1-i-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42532 }, /* l1-i-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42295 }, /* l1-i-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42172 }, /* l1-i-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 42054 }, /* l1-i-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41112 }, /* l1-i-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41583 }, /* l1-i-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41823 }, /* l1-i-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41703 }, /* l1-i-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41466 }, /* l1-i-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41343 }, /* l1-i-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 41225 }, /* l1-i-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31108 }, /* l1-icache\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37060 }, /* l1-icache-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31201 }, /* l1-icache-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31612 }, /* l1-icache-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31826 }, /* l1-icache-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31717 }, /* l1-icache-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 31510 }, /* l1-icache-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31402 }, /* l1-icache-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31299 }, /* l1-icache-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 31933 }, /* l1-icache-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 32348 }, /* l1-icache-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32564 }, /* l1-icache-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32454 }, /* l1-icache-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32245 }, /* l1-icache-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32136 }, /* l1-icache-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32032 }, /* l1-icache-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37264 }, /* l1-icache-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 37160 }, /* l1-icache-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36963 }, /* l1-icache-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33404 }, /* l1-icache-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33863 }, /* l1-icache-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34097 }, /* l1-icache-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33980 }, /* l1-icache-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 33749 }, /* l1-icache-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33629 }, /* l1-icache-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33514 }, /* l1-icache-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34212 }, /* l1-icache-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 34679 }, /* l1-icache-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34917 }, /* l1-icache-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34798 }, /* l1-icache-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34563 }, /* l1-icache-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34441 }, /* l1-icache-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 34324 }, /* l1-icache-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32672 }, /* l1-icache-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33083 }, /* l1-icache-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33297 }, /* l1-icache-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 33188 }, /* l1-icache-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32981 }, /* l1-icache-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32873 }, /* l1-icache-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 32770 }, /* l1-icache-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36860 }, /* l1-icache-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36762 }, /* l1-icache-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35898 }, /* l1-icache-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36389 }, /* l1-icache-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36639 }, /* l1-icache-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36514 }, /* l1-icache-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36267 }, /* l1-icache-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36139 }, /* l1-icache-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 36016 }, /* l1-icache-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35034 }, /* l1-icache-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35525 }, /* l1-icache-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35775 }, /* l1-icache-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35650 }, /* l1-icache-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35403 }, /* l1-icache-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35275 }, /* l1-icache-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 35152 }, /* l1-icache-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49266 }, /* l1-instruction\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55483 }, /* l1-instruction-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49364 }, /* l1-instruction-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49795 }, /* l1-instruction-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50019 }, /* l1-instruction-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49905 }, /* l1-instruction-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49688 }, /* l1-instruction-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49575 }, /* l1-instruction-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49467 }, /* l1-instruction-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50131 }, /* l1-instruction-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50566 }, /* l1-instruction-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50792 }, /* l1-instruction-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50677 }, /* l1-instruction-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50458 }, /* l1-instruction-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50344 }, /* l1-instruction-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50235 }, /* l1-instruction-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55697 }, /* l1-instruction-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55588 }, /* l1-instruction-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55381 }, /* l1-instruction-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51672 }, /* l1-instruction-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52151 }, /* l1-instruction-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52395 }, /* l1-instruction-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52273 }, /* l1-instruction-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52032 }, /* l1-instruction-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51907 }, /* l1-instruction-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51787 }, /* l1-instruction-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52515 }, /* l1-instruction-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53002 }, /* l1-instruction-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53250 }, /* l1-instruction-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53126 }, /* l1-instruction-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52881 }, /* l1-instruction-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52754 }, /* l1-instruction-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 52632 }, /* l1-instruction-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 50905 }, /* l1-instruction-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51336 }, /* l1-instruction-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51560 }, /* l1-instruction-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51446 }, /* l1-instruction-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51229 }, /* l1-instruction-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51116 }, /* l1-instruction-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 51008 }, /* l1-instruction-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55273 }, /* l1-instruction-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55170 }, /* l1-instruction-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54271 }, /* l1-instruction-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54782 }, /* l1-instruction-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55042 }, /* l1-instruction-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54912 }, /* l1-instruction-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54655 }, /* l1-instruction-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54522 }, /* l1-instruction-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54394 }, /* l1-instruction-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53372 }, /* l1-instruction-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53883 }, /* l1-instruction-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54143 }, /* l1-instruction-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 54013 }, /* l1-instruction-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53756 }, /* l1-instruction-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53623 }, /* l1-instruction-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 53495 }, /* l1-instruction-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15676 }, /* l1d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22971 }, /* l1d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15756 }, /* l1d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16115 }, /* l1d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16303 }, /* l1d-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16207 }, /* l1d-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16026 }, /* l1d-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15931 }, /* l1d-load-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 15841 }, /* l1d-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16397 }, /* l1d-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16760 }, /* l1d-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16950 }, /* l1d-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16853 }, /* l1d-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16670 }, /* l1d-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16574 }, /* l1d-loads-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 16483 }, /* l1d-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23149 }, /* l1d-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 23058 }, /* l1d-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22887 }, /* l1d-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19718 }, /* l1d-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20125 }, /* l1d-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20333 }, /* l1d-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20229 }, /* l1d-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20024 }, /* l1d-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19917 }, /* l1d-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19815 }, /* l1d-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20435 }, /* l1d-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20850 }, /* l1d-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21062 }, /* l1d-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20956 }, /* l1d-prefetches-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20747 }, /* l1d-prefetches-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20638 }, /* l1d-prefetches-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 20534 }, /* l1d-prefetches-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17045 }, /* l1d-read\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17404 }, /* l1d-read-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17592 }, /* l1d-read-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17496 }, /* l1d-read-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-config=0x10000\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17315 }, /* l1d-read-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17220 }, /* l1d-read-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17130 }, /* l1d-read-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22797 }, /* l1d-reference\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22712 }, /* l1d-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21939 }, /* l1d-speculative-load\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22378 }, /* l1d-speculative-load-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22602 }, /* l1d-speculative-load-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22490 }, /* l1d-speculative-load-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22269 }, /* l1d-speculative-load-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22154 }, /* l1d-speculative-load-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 22044 }, /* l1d-speculative-load-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21166 }, /* l1d-speculative-read\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21605 }, /* l1d-speculative-read-access\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21829 }, /* l1d-speculative-read-miss\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21717 }, /* l1d-speculative-read-misses\000legacy cache\000Level 1 data cache prefetch misses\000legacy-cache-config=0x10200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21496 }, /* l1d-speculative-read-ops\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21381 }, /* l1d-speculative-read-reference\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 21271 }, /* l1d-speculative-read-refs\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-cache-config=0x200\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17686 }, /* l1d-store\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18069 }, /* l1d-store-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18265 }, /* l1d-store-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18167 }, /* l1d-store-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17974 }, /* l1d-store-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17873 }, /* l1d-store-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 17777 }, /* l1d-store-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18361 }, /* l1d-stores\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18748 }, /* l1d-stores-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18946 }, /* l1d-stores-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18847 }, /* l1d-stores-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18652 }, /* l1d-stores-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18550 }, /* l1d-stores-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 18453 }, /* l1d-stores-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19043 }, /* l1d-write\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19426 }, /* l1d-write-access\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19622 }, /* l1d-write-miss\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19524 }, /* l1d-write-misses\000legacy cache\000Level 1 data cache write misses\000legacy-cache-config=0x10100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19331 }, /* l1d-write-ops\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19230 }, /* l1d-write-reference\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 19134 }, /* l1d-write-refs\000legacy cache\000Level 1 data cache write accesses\000legacy-cache-config=0x100\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43344 }, /* l1i\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48978 }, /* l1i-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43431 }, /* l1i-load\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43818 }, /* l1i-load-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44020 }, /* l1i-load-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43917 }, /* l1i-load-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43722 }, /* l1i-load-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43620 }, /* l1i-load-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 43523 }, /* l1i-load-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44121 }, /* l1i-loads\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44512 }, /* l1i-loads-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44716 }, /* l1i-loads-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44612 }, /* l1i-loads-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44415 }, /* l1i-loads-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44312 }, /* l1i-loads-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44214 }, /* l1i-loads-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49170 }, /* l1i-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 49072 }, /* l1i-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48887 }, /* l1i-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45508 }, /* l1i-prefetch\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45943 }, /* l1i-prefetch-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46165 }, /* l1i-prefetch-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46054 }, /* l1i-prefetch-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45835 }, /* l1i-prefetch-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45721 }, /* l1i-prefetch-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45612 }, /* l1i-prefetch-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46274 }, /* l1i-prefetches\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46717 }, /* l1i-prefetches-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46943 }, /* l1i-prefetches-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46830 }, /* l1i-prefetches-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46607 }, /* l1i-prefetches-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46491 }, /* l1i-prefetches-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 46380 }, /* l1i-prefetches-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44818 }, /* l1i-read\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45205 }, /* l1i-read-access\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45407 }, /* l1i-read-miss\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45304 }, /* l1i-read-misses\000legacy cache\000Level 1 instruction cache read misses\000legacy-cache-config=0x10001\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45109 }, /* l1i-read-ops\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 45007 }, /* l1i-read-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 44910 }, /* l1i-read-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48790 }, /* l1i-reference\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48698 }, /* l1i-refs\000legacy cache\000Level 1 instruction cache read accesses\000legacy-cache-config=1\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47876 }, /* l1i-speculative-load\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48343 }, /* l1i-speculative-load-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48581 }, /* l1i-speculative-load-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48462 }, /* l1i-speculative-load-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48227 }, /* l1i-speculative-load-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 48105 }, /* l1i-speculative-load-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47988 }, /* l1i-speculative-load-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47054 }, /* l1i-speculative-read\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47521 }, /* l1i-speculative-read-access\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47759 }, /* l1i-speculative-read-miss\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47640 }, /* l1i-speculative-read-misses\000legacy cache\000Level 1 instruction cache prefetch misses\000legacy-cache-config=0x10201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47405 }, /* l1i-speculative-read-ops\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47283 }, /* l1i-speculative-read-reference\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 47166 }, /* l1i-speculative-read-refs\000legacy cache\000Level 1 instruction cache prefetch accesses\000legacy-cache-config=0x201\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63212 }, /* l2\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71765 }, /* l2-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63309 }, /* l2-load\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63736 }, /* l2-load-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63958 }, /* l2-load-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63845 }, /* l2-load-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63630 }, /* l2-load-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63518 }, /* l2-load-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63411 }, /* l2-load-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64069 }, /* l2-loads\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64500 }, /* l2-loads-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64724 }, /* l2-loads-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64610 }, /* l2-loads-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64393 }, /* l2-loads-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64280 }, /* l2-loads-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64172 }, /* l2-loads-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71977 }, /* l2-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71869 }, /* l2-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71664 }, /* l2-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67985 }, /* l2-prefetch\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68460 }, /* l2-prefetch-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68702 }, /* l2-prefetch-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68581 }, /* l2-prefetch-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68342 }, /* l2-prefetch-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68218 }, /* l2-prefetch-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68099 }, /* l2-prefetch-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68821 }, /* l2-prefetches\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69304 }, /* l2-prefetches-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69550 }, /* l2-prefetches-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69427 }, /* l2-prefetches-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69184 }, /* l2-prefetches-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69058 }, /* l2-prefetches-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 68937 }, /* l2-prefetches-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64836 }, /* l2-read\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65263 }, /* l2-read-access\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65485 }, /* l2-read-miss\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65372 }, /* l2-read-misses\000legacy cache\000Level 2 (or higher) last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65157 }, /* l2-read-ops\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65045 }, /* l2-read-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 64938 }, /* l2-read-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71557 }, /* l2-reference\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71455 }, /* l2-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70563 }, /* l2-speculative-load\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71070 }, /* l2-speculative-load-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71328 }, /* l2-speculative-load-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 71199 }, /* l2-speculative-load-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70944 }, /* l2-speculative-load-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70812 }, /* l2-speculative-load-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70685 }, /* l2-speculative-load-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69671 }, /* l2-speculative-read\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70178 }, /* l2-speculative-read-access\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70436 }, /* l2-speculative-read-miss\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70307 }, /* l2-speculative-read-misses\000legacy cache\000Level 2 (or higher) last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 70052 }, /* l2-speculative-read-ops\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69920 }, /* l2-speculative-read-reference\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 69793 }, /* l2-speculative-read-refs\000legacy cache\000Level 2 (or higher) last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65596 }, /* l2-store\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66047 }, /* l2-store-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66277 }, /* l2-store-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66162 }, /* l2-store-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65935 }, /* l2-store-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65817 }, /* l2-store-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 65704 }, /* l2-store-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66390 }, /* l2-stores\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66845 }, /* l2-stores-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67077 }, /* l2-stores-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66961 }, /* l2-stores-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66732 }, /* l2-stores-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66613 }, /* l2-stores-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 66499 }, /* l2-stores-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67191 }, /* l2-write\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67642 }, /* l2-write-access\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67872 }, /* l2-write-miss\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67757 }, /* l2-write-misses\000legacy cache\000Level 2 (or higher) last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67530 }, /* l2-write-ops\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67412 }, /* l2-write-reference\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 67299 }, /* l2-write-refs\000legacy cache\000Level 2 (or higher) last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55804 }, /* llc\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62951 }, /* llc-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55882 }, /* llc-load\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56233 }, /* llc-load-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56417 }, /* llc-load-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56323 }, /* llc-load-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 56146 }, /* llc-load-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56053 }, /* llc-load-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 55965 }, /* llc-load-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56509 }, /* llc-loads\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 56864 }, /* llc-loads-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57050 }, /* llc-loads-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56955 }, /* llc-loads-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56776 }, /* llc-loads-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56682 }, /* llc-loads-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 56593 }, /* llc-loads-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63125 }, /* llc-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 63036 }, /* llc-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62869 }, /* llc-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59760 }, /* llc-prefetch\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60159 }, /* llc-prefetch-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60363 }, /* llc-prefetch-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60261 }, /* llc-prefetch-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 60060 }, /* llc-prefetch-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59955 }, /* llc-prefetch-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59855 }, /* llc-prefetch-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60463 }, /* llc-prefetches\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 60870 }, /* llc-prefetches-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61078 }, /* llc-prefetches-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60974 }, /* llc-prefetches-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60769 }, /* llc-prefetches-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60662 }, /* llc-prefetches-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 60560 }, /* llc-prefetches-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57143 }, /* llc-read\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57494 }, /* llc-read-access\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57678 }, /* llc-read-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57584 }, /* llc-read-misses\000legacy cache\000Last level cache read misses\000legacy-cache-config=0x10002\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57407 }, /* llc-read-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57314 }, /* llc-read-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57226 }, /* llc-read-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62781 }, /* llc-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62698 }, /* llc-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61939 }, /* llc-speculative-load\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62370 }, /* llc-speculative-load-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62590 }, /* llc-speculative-load-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62480 }, /* llc-speculative-load-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62263 }, /* llc-speculative-load-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62150 }, /* llc-speculative-load-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 62042 }, /* llc-speculative-load-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61180 }, /* llc-speculative-read\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61611 }, /* llc-speculative-read-access\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61831 }, /* llc-speculative-read-miss\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61721 }, /* llc-speculative-read-misses\000legacy cache\000Last level cache prefetch misses\000legacy-cache-config=0x10202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61504 }, /* llc-speculative-read-ops\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61391 }, /* llc-speculative-read-reference\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 61283 }, /* llc-speculative-read-refs\000legacy cache\000Last level cache prefetch accesses\000legacy-cache-config=0x202\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57770 }, /* llc-store\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58145 }, /* llc-store-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58337 }, /* llc-store-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58241 }, /* llc-store-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 58052 }, /* llc-store-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57953 }, /* llc-store-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 57859 }, /* llc-store-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58431 }, /* llc-stores\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 58810 }, /* llc-stores-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59004 }, /* llc-stores-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58907 }, /* llc-stores-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58716 }, /* llc-stores-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58616 }, /* llc-stores-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 58521 }, /* llc-stores-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59099 }, /* llc-write\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59474 }, /* llc-write-access\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59666 }, /* llc-write-miss\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59570 }, /* llc-write-misses\000legacy cache\000Last level cache write misses\000legacy-cache-config=0x10102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59381 }, /* llc-write-ops\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59282 }, /* llc-write-reference\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 59188 }, /* llc-write-refs\000legacy cache\000Last level cache write accesses\000legacy-cache-config=0x102\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114128 }, /* node\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 121053 }, /* node-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114203 }, /* node-load\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114542 }, /* node-load-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114720 }, /* node-load-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114629 }, /* node-load-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 114458 }, /* node-load-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114368 }, /* node-load-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114283 }, /* node-load-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114809 }, /* node-loads\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 115152 }, /* node-loads-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115332 }, /* node-loads-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115240 }, /* node-loads-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115067 }, /* node-loads-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114976 }, /* node-loads-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 114890 }, /* node-loads-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 121221 }, /* node-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 121135 }, /* node-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120974 }, /* node-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117955 }, /* node-prefetch\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118342 }, /* node-prefetch-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118540 }, /* node-prefetch-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118441 }, /* node-prefetch-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 118246 }, /* node-prefetch-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118144 }, /* node-prefetch-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118047 }, /* node-prefetch-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118637 }, /* node-prefetches\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 119032 }, /* node-prefetches-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119234 }, /* node-prefetches-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119133 }, /* node-prefetches-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118934 }, /* node-prefetches-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118830 }, /* node-prefetches-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 118731 }, /* node-prefetches-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115422 }, /* node-read\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115761 }, /* node-read-access\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115939 }, /* node-read-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115848 }, /* node-read-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0x10006\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115677 }, /* node-read-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115587 }, /* node-read-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 115502 }, /* node-read-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120889 }, /* node-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120809 }, /* node-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120071 }, /* node-speculative-load\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120490 }, /* node-speculative-load-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120704 }, /* node-speculative-load-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120597 }, /* node-speculative-load-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120386 }, /* node-speculative-load-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120276 }, /* node-speculative-load-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 120171 }, /* node-speculative-load-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119333 }, /* node-speculative-read\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119752 }, /* node-speculative-read-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119966 }, /* node-speculative-read-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119859 }, /* node-speculative-read-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119648 }, /* node-speculative-read-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119538 }, /* node-speculative-read-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 119433 }, /* node-speculative-read-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116028 }, /* node-store\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116391 }, /* node-store-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116577 }, /* node-store-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116484 }, /* node-store-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 116301 }, /* node-store-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116205 }, /* node-store-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116114 }, /* node-store-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116668 }, /* node-stores\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 117035 }, /* node-stores-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117223 }, /* node-stores-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117129 }, /* node-stores-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116944 }, /* node-stores-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116847 }, /* node-stores-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 116755 }, /* node-stores-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117315 }, /* node-write\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117678 }, /* node-write-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117864 }, /* node-write-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117771 }, /* node-write-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117588 }, /* node-write-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117492 }, /* node-write-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 117401 }, /* node-write-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000 */</div><div class='add'>+{ 123400 }, /* ref-cycles\000legacy hardware\000Total cycles; not affected by CPU frequency scaling\000legacy-hardware-config=9\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123094 }, /* stalled-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of idle-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 122795 }, /* stalled-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of idle-cycles-frontend]\000legacy-hardware-config=7\000\00000\000\000\000\000\000 */</div><div class='add'>+};</div><div class='ctx'> static const struct compact_pmu_event pmu_events__common_software[] = {</div><div class='del'>-{ 1035 }, /* alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=7\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1334 }, /* bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000config=0xa\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1436 }, /* cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000config=0xb\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 357 }, /* context-switches\000software\000Number of context switches [This event is an alias of cs]\000config=3\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 9 }, /* cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 559 }, /* cpu-migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of migrations]\000config=4\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 458 }, /* cs\000software\000Number of context switches [This event is an alias of context-switches]\000config=3\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1254 }, /* dummy\000software\000A placeholder event that doesn't count anything\000config=9\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1127 }, /* emulation-faults\000software\000Number of kernel handled unimplemented instruction faults handled through emulation\000config=8\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 167 }, /* faults\000software\000Number of page faults [This event is an alias of page-faults]\000config=2\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 932 }, /* major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000config=6\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 691 }, /* migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu-migrations]\000config=4\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 823 }, /* minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\000config=5\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 262 }, /* page-faults\000software\000Number of page faults [This event is an alias of faults]\000config=2\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 87 }, /* task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124563 }, /* alignment-faults\000software\000Number of kernel handled memory alignment faults\000config=7\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124862 }, /* bpf-output\000software\000An event used by BPF programs to write to the perf ring buffer\000config=0xa\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124964 }, /* cgroup-switches\000software\000Number of context switches to a task in a different cgroup\000config=0xb\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123885 }, /* context-switches\000software\000Number of context switches [This event is an alias of cs]\000config=3\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123521 }, /* cpu-clock\000software\000Per-CPU high-resolution timer based event\000config=0\000\000001e-6msec\000\000\000\000\000 */</div><div class='add'>+{ 124087 }, /* cpu-migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of migrations]\000config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123986 }, /* cs\000software\000Number of context switches [This event is an alias of context-switches]\000config=3\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124782 }, /* dummy\000software\000A placeholder event that doesn't count anything\000config=9\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124655 }, /* emulation-faults\000software\000Number of kernel handled unimplemented instruction faults handled through emulation\000config=8\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123695 }, /* faults\000software\000Number of page faults [This event is an alias of page-faults]\000config=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124460 }, /* major-faults\000software\000Number of major page faults. Major faults require I/O to handle\000config=6\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124219 }, /* migrations\000software\000Number of times a process has migrated to a new CPU [This event is an alias of cpu-migrations]\000config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 124351 }, /* minor-faults\000software\000Number of minor page faults. Minor faults don't require I/O to handle\000config=5\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123790 }, /* page-faults\000software\000Number of page faults [This event is an alias of faults]\000config=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 123607 }, /* task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\000001e-6msec\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__common_tool[] = {</div><div class='del'>-{ 1544 }, /* duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1758 }, /* has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1834 }, /* num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated with a logical Linux CPU\000config=5\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1979 }, /* num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\000config=6\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2082 }, /* num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a core\000config=7\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2199 }, /* num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2275 }, /* num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2361 }, /* slots\000tool\000Number of functional units that in parallel can execute parts of an instruction\000config=0xa\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2471 }, /* smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\000config=0xb\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1690 }, /* system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2578 }, /* system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000config=0xc\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 1620 }, /* user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126205 }, /* core_wide\000tool\0001 if not SMT, if SMT are events being gathered on all SMT threads 1 otherwise 0\000config=0xd\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125072 }, /* duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125286 }, /* has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125362 }, /* num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated with a logical Linux CPU\000config=5\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125507 }, /* num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\000config=6\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125610 }, /* num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a core\000config=7\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125727 }, /* num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125803 }, /* num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125889 }, /* slots\000tool\000Number of functional units that in parallel can execute parts of an instruction\000config=0xa\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125999 }, /* smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\000config=0xb\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125218 }, /* system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126106 }, /* system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000config=0xc\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126319 }, /* target_cpu\000tool\0001 if CPUs being analyzed, 0 if threads/processes\000config=0xe\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 125148 }, /* user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\000\000\000\000 */</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry pmu_events__common[] = {</div><div class='add'>+static const struct pmu_table_entry pmu_events__common[] = {</div><div class='add'>+{</div><div class='add'>+     .entries = pmu_events__common_default_core,</div><div class='add'>+     .num_entries = ARRAY_SIZE(pmu_events__common_default_core),</div><div class='add'>+     .pmu_name = { 0 /* default_core\000 */ },</div><div class='add'>+},</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__common_software,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__common_software),</div><div class='del'>-     .pmu_name = { 0 /* software\000 */ },</div><div class='add'>+     .pmu_name = { 123512 /* software\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__common_tool,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__common_tool),</div><div class='del'>-     .pmu_name = { 1539 /* tool\000 */ },</div><div class='add'>+     .pmu_name = { 125067 /* tool\000 */ },</div><div class='add'>+},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct compact_pmu_event pmu_metrics__common_default_core[] = {</div><div class='add'>+{ 127956 }, /* CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)\000\000Average CPU utilization\000\0001CPUs\000\000\000\000011 */</div><div class='add'>+{ 129273 }, /* backend_cycles_idle\000Default\000stalled\\-cycles\\-backend / cpu\\-cycles\000backend_cycles_idle &gt; 0.2\000Backend stalls per cycle\000\000\000\000\000\000001 */</div><div class='add'>+{ 129575 }, /* branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Branches per CPU second\000\0001000M/sec\000\000\000\000011 */</div><div class='add'>+{ 129755 }, /* branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate &gt; 0.05\000Branch miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 128142 }, /* cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switches@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Context switches per CPU second\000\0001cs/sec\000\000\000\000011 */</div><div class='add'>+{ 129399 }, /* cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Cycles per CPU second\000\0001GHz\000\000\000\000011 */</div><div class='add'>+{ 130191 }, /* dtlb_miss_rate\000Default3\000dTLB\\-load\\-misses / dTLB\\-loads\000dtlb_miss_rate &gt; 0.05\000dTLB miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 129143 }, /* frontend_cycles_idle\000Default\000stalled\\-cycles\\-frontend / cpu\\-cycles\000frontend_cycles_idle &gt; 0.1\000Frontend stalls per cycle\000\000\000\000\000\000001 */</div><div class='add'>+{ 128866 }, /* insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle &lt; 1\000Instructions Per Cycle\000\0001instructions\000\000\000\000001 */</div><div class='add'>+{ 130297 }, /* itlb_miss_rate\000Default3\000iTLB\\-load\\-misses / iTLB\\-loads\000itlb_miss_rate &gt; 0.05\000iTLB miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 130403 }, /* l1_prefetch_miss_rate\000Default4\000L1\\-dcache\\-prefetch\\-misses / L1\\-dcache\\-prefetches\000l1_prefetch_miss_rate &gt; 0.05\000L1 prefetch miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 129859 }, /* l1d_miss_rate\000Default2\000L1\\-dcache\\-load\\-misses / L1\\-dcache\\-loads\000l1d_miss_rate &gt; 0.05\000L1D  miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 130076 }, /* l1i_miss_rate\000Default3\000L1\\-icache\\-load\\-misses / L1\\-icache\\-loads\000l1i_miss_rate &gt; 0.05\000L1I miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 129975 }, /* llc_miss_rate\000Default2\000LLC\\-load\\-misses / LLC\\-loads\000llc_miss_rate &gt; 0.05\000LLC miss rate\000\000100%\000\000\000\000001 */</div><div class='add'>+{ 128375 }, /* migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Process migrations to a new CPU per CPU second\000\0001migrations/sec\000\000\000\000011 */</div><div class='add'>+{ 128635 }, /* page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faults@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Page faults per CPU second\000\0001faults/sec\000\000\000\000011 */</div><div class='add'>+{ 128979 }, /* stalled_cycles_per_instruction\000Default\000max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions\000\000Max front or backend stalls per instruction\000\000\000\000\000\000001 */</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pmu_table_entry pmu_metrics__common[] = {</div><div class='add'>+{</div><div class='add'>+     .entries = pmu_metrics__common_default_core,</div><div class='add'>+     .num_entries = ARRAY_SIZE(pmu_metrics__common_default_core),</div><div class='add'>+     .pmu_name = { 0 /* default_core\000 */ },</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_default_core[] = {</div><div class='del'>-{ 2690 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2752 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 3014 }, /* dispatch_blocked.any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,period=200000,umask=0x20\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 3147 }, /* eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0x3a,period=200000\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 2814 }, /* l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attributable Level 3 cache access, read\000 */</div><div class='del'>-{ 2912 }, /* segment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0x80\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126403 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126465 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126727 }, /* dispatch_blocked.any\000other\000Memory cluster signals to block micro-op dispatch for any reason\000event=9,period=200000,umask=0x20\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126860 }, /* eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions\000event=0x3a,period=200000\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126527 }, /* l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\000\000Attributable Level 3 cache access, read\000 */</div><div class='add'>+{ 126625 }, /* segment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0x80\000\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_ddrc[] = {</div><div class='del'>-{ 3280 }, /* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 126993 }, /* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_l3c[] = {</div><div class='del'>-{ 3642 }, /* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127355 }, /* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_cbox[] = {</div><div class='del'>-{ 3516 }, /* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 3570 }, /* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000\000\000 */</div><div class='del'>-{ 3362 }, /* unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\000event=0x22,umask=0x81\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127229 }, /* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127283 }, /* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127075 }, /* unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\000event=0x22,umask=0x81\000\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc[] = {</div><div class='del'>-{ 3825 }, /* uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127538 }, /* uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc_free_running[] = {</div><div class='del'>-{ 3734 }, /* uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000\000\000\000\000 */</div><div class='add'>+{ 127447 }, /* uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000\000\000\000\000 */</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry pmu_events__test_soc_cpu[] = {</div><div class='add'>+static const struct pmu_table_entry pmu_events__test_soc_cpu[] = {</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_default_core,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_default_core),</div><div class='del'>-     .pmu_name = { 2677 /* default_core\000 */ },</div><div class='add'>+     .pmu_name = { 0 /* default_core\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_hisi_sccl_ddrc,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_ddrc),</div><div class='del'>-     .pmu_name = { 3265 /* hisi_sccl,ddrc\000 */ },</div><div class='add'>+     .pmu_name = { 126978 /* hisi_sccl,ddrc\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_hisi_sccl_l3c,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_l3c),</div><div class='del'>-     .pmu_name = { 3628 /* hisi_sccl,l3c\000 */ },</div><div class='add'>+     .pmu_name = { 127341 /* hisi_sccl,l3c\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_uncore_cbox,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_cbox),</div><div class='del'>-     .pmu_name = { 3350 /* uncore_cbox\000 */ },</div><div class='add'>+     .pmu_name = { 127063 /* uncore_cbox\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_uncore_imc,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc),</div><div class='del'>-     .pmu_name = { 3814 /* uncore_imc\000 */ },</div><div class='add'>+     .pmu_name = { 127527 /* uncore_imc\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_cpu_uncore_imc_free_running,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc_free_running),</div><div class='del'>-     .pmu_name = { 3710 /* uncore_imc_free_running\000 */ },</div><div class='add'>+     .pmu_name = { 127423 /* uncore_imc_free_running\000 */ },</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct compact_pmu_event pmu_metrics__test_soc_cpu_default_core[] = {</div><div class='del'>-{ 4243 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4924 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4696 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4790 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4988 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 5056 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4328 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4265 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 5190 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 5126 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 5148 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 5170 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4625 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4494 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */</div><div class='del'>-{ 4558 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */</div><div class='add'>+{ 130551 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131240 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131010 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131105 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131305 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131374 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 130638 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 130574 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131512 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131445 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131468 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 131491 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 130938 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 130805 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000 */</div><div class='add'>+{ 130870 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000 */</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry pmu_metrics__test_soc_cpu[] = {</div><div class='add'>+static const struct pmu_table_entry pmu_metrics__test_soc_cpu[] = {</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_metrics__test_soc_cpu_default_core,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_metrics__test_soc_cpu_default_core),</div><div class='del'>-     .pmu_name = { 2677 /* default_core\000 */ },</div><div class='add'>+     .pmu_name = { 0 /* default_core\000 */ },</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_ccn_pmu[] = {</div><div class='del'>-{ 4004 }, /* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000 */</div><div class='add'>+{ 127717 }, /* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_cmn_pmu[] = {</div><div class='del'>-{ 4100 }, /* sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000 */</div><div class='add'>+{ 127813 }, /* sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000 */</div><div class='ctx'> };</div><div class='ctx'> static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_ddr_pmu[] = {</div><div class='del'>-{ 3909 }, /* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\000\000\000\000\000 */</div><div class='add'>+{ 127622 }, /* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\000\000\000\000\000 */</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry pmu_events__test_soc_sys[] = {</div><div class='add'>+static const struct pmu_table_entry pmu_events__test_soc_sys[] = {</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_sys_uncore_sys_ccn_pmu,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ccn_pmu),</div><div class='del'>-     .pmu_name = { 3985 /* uncore_sys_ccn_pmu\000 */ },</div><div class='add'>+     .pmu_name = { 127698 /* uncore_sys_ccn_pmu\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_sys_uncore_sys_cmn_pmu,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_cmn_pmu),</div><div class='del'>-     .pmu_name = { 4081 /* uncore_sys_cmn_pmu\000 */ },</div><div class='add'>+     .pmu_name = { 127794 /* uncore_sys_cmn_pmu\000 */ },</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'>      .entries = pmu_events__test_soc_sys_uncore_sys_ddr_pmu,</div><div class='ctx'>      .num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ddr_pmu),</div><div class='del'>-     .pmu_name = { 3890 /* uncore_sys_ddr_pmu\000 */ },</div><div class='add'>+     .pmu_name = { 127603 /* uncore_sys_ddr_pmu\000 */ },</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -284,7 +2801,7 @@ struct pmu_events_map {</div><div class='ctx'>  * Global table mapping each known CPU for the architecture to its</div><div class='ctx'>  * table of PMU events.</div><div class='ctx'>  */</div><div class='del'>-const struct pmu_events_map pmu_events_map[] = {</div><div class='add'>+static const struct pmu_events_map pmu_events_map[] = {</div><div class='ctx'> {</div><div class='ctx'> 	.arch = "common",</div><div class='ctx'> 	.cpuid = "common",</div><div class='hunk'>@@ -292,7 +2809,10 @@ const struct pmu_events_map pmu_events_map[] = {</div><div class='ctx'> 		.pmus = pmu_events__common,</div><div class='ctx'> 		.num_pmus = ARRAY_SIZE(pmu_events__common),</div><div class='ctx'> 	},</div><div class='del'>-	.metric_table = {},</div><div class='add'>+	.metric_table = {</div><div class='add'>+		.pmus = pmu_metrics__common,</div><div class='add'>+		.num_pmus = ARRAY_SIZE(pmu_metrics__common),</div><div class='add'>+	},</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.arch = "testarch",</div><div class='hunk'>@@ -390,6 +2910,8 @@ static void decompress_metric(int offset, struct pmu_metric *pm)</div><div class='ctx'> 	pm-&gt;aggr_mode = *p - '0';</div><div class='ctx'> 	p++;</div><div class='ctx'> 	pm-&gt;event_grouping = *p - '0';</div><div class='add'>+	p++;</div><div class='add'>+	pm-&gt;default_show_events = *p - '0';</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pmu_events_table__for_each_event_pmu(const struct pmu_events_table *table,</div><div class='hunk'>@@ -461,6 +2983,8 @@ int pmu_events_table__for_each_event(const struct pmu_events_table *table,</div><div class='ctx'>                                     pmu_event_iter_fn fn,</div><div class='ctx'>                                     void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -482,6 +3006,8 @@ int pmu_events_table__find_event(const struct pmu_events_table *table,</div><div class='ctx'>                                  pmu_event_iter_fn fn,</div><div class='ctx'>                                  void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return PMU_EVENTS__NOT_FOUND;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -502,6 +3028,8 @@ size_t pmu_events_table__num_events(const struct pmu_events_table *table,</div><div class='ctx'> {</div><div class='ctx'>         size_t count = 0;</div><div class='ctx'> </div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -580,6 +3108,8 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table,</div><div class='ctx'>                                      pmu_metric_iter_fn fn,</div><div class='ctx'>                                      void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 int ret = pmu_metrics_table__for_each_metric_pmu(table, &amp;table-&gt;pmus[i],</div><div class='ctx'>                                                                  fn, data);</div><div class='hunk'>@@ -596,6 +3126,8 @@ int pmu_metrics_table__find_metric(const struct pmu_metrics_table *table,</div><div class='ctx'>                                  pmu_metric_iter_fn fn,</div><div class='ctx'>                                  void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -707,6 +3239,22 @@ const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu)</div><div class='ctx'>         return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct pmu_events_table *perf_pmu__default_core_events_table(void)</div><div class='add'>+{</div><div class='add'>+        int i = 0;</div><div class='add'>+</div><div class='add'>+        for (;;) {</div><div class='add'>+                const struct pmu_events_map *map = &amp;pmu_events_map[i++];</div><div class='add'>+</div><div class='add'>+                if (!map-&gt;arch)</div><div class='add'>+                        break;</div><div class='add'>+</div><div class='add'>+                if (!strcmp(map-&gt;cpuid, "common"))</div><div class='add'>+                        return &amp;map-&gt;event_table;</div><div class='add'>+        }</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct pmu_metrics_table *pmu_metrics_table__find(void)</div><div class='ctx'> {</div><div class='ctx'>         struct perf_cpu cpu = {-1};</div><div class='hunk'>@@ -715,6 +3263,22 @@ const struct pmu_metrics_table *pmu_metrics_table__find(void)</div><div class='ctx'>         return map ? &amp;map-&gt;metric_table : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct pmu_metrics_table *pmu_metrics_table__default(void)</div><div class='add'>+{</div><div class='add'>+        int i = 0;</div><div class='add'>+</div><div class='add'>+        for (;;) {</div><div class='add'>+                const struct pmu_events_map *map = &amp;pmu_events_map[i++];</div><div class='add'>+</div><div class='add'>+                if (!map-&gt;arch)</div><div class='add'>+                        break;</div><div class='add'>+</div><div class='add'>+                if (!strcmp(map-&gt;cpuid, "common"))</div><div class='add'>+                        return &amp;map-&gt;metric_table;</div><div class='add'>+        }</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)</div><div class='ctx'> {</div><div class='ctx'>         for (const struct pmu_events_map *tables = &amp;pmu_events_map[0];</div><div class='head'>diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py<br/>index 168c044dd7cc..3a1bcdcdc685 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/jevents.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/jevents.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/jevents.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/jevents.py</a></div><div class='hunk'>@@ -58,10 +58,12 @@ _json_event_attributes = [</div><div class='ctx'> _json_metric_attributes = [</div><div class='ctx'>     'metric_name', 'metric_group', 'metric_expr', 'metric_threshold',</div><div class='ctx'>     'desc', 'long_desc', 'unit', 'compat', 'metricgroup_no_group',</div><div class='del'>-    'default_metricgroup_name', 'aggr_mode', 'event_grouping'</div><div class='add'>+    'default_metricgroup_name', 'aggr_mode', 'event_grouping',</div><div class='add'>+    'default_show_events'</div><div class='ctx'> ]</div><div class='ctx'> # Attributes that are bools or enum int values, encoded as '0', '1',...</div><div class='del'>-_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg']</div><div class='add'>+_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg',</div><div class='add'>+                         'default_show_events']</div><div class='ctx'> </div><div class='ctx'> def removesuffix(s: str, suffix: str) -&gt; str:</div><div class='ctx'>   """Remove the suffix from a string</div><div class='hunk'>@@ -325,6 +327,8 @@ class JsonEvent:</div><div class='ctx'>       eventcode |= int(jd['ExtSel']) &lt;&lt; 8</div><div class='ctx'>     configcode = int(jd['ConfigCode'], 0) if 'ConfigCode' in jd else None</div><div class='ctx'>     eventidcode = int(jd['EventidCode'], 0) if 'EventidCode' in jd else None</div><div class='add'>+    legacy_hw_config = int(jd['LegacyConfigCode'], 0) if 'LegacyConfigCode' in jd else None</div><div class='add'>+    legacy_cache_config = int(jd['LegacyCacheCode'], 0) if 'LegacyCacheCode' in jd else None</div><div class='ctx'>     self.name = jd['EventName'].lower() if 'EventName' in jd else None</div><div class='ctx'>     self.topic = ''</div><div class='ctx'>     self.compat = jd.get('Compat')</div><div class='hunk'>@@ -354,6 +358,7 @@ class JsonEvent:</div><div class='ctx'>     self.metricgroup_no_group = jd.get('MetricgroupNoGroup')</div><div class='ctx'>     self.default_metricgroup_name = jd.get('DefaultMetricgroupName')</div><div class='ctx'>     self.event_grouping = convert_metric_constraint(jd.get('MetricConstraint'))</div><div class='add'>+    self.default_show_events = jd.get('DefaultShowEvents')</div><div class='ctx'>     self.metric_expr = None</div><div class='ctx'>     if 'MetricExpr' in jd:</div><div class='ctx'>       self.metric_expr = metric.ParsePerfJson(jd['MetricExpr']).Simplify()</div><div class='hunk'>@@ -370,6 +375,10 @@ class JsonEvent:</div><div class='ctx'>       event = f'config={llx(configcode)}'</div><div class='ctx'>     elif eventidcode is not None:</div><div class='ctx'>       event = f'eventid={llx(eventidcode)}'</div><div class='add'>+    elif legacy_hw_config is not None:</div><div class='add'>+      event = f'legacy-hardware-config={llx(legacy_hw_config)}'</div><div class='add'>+    elif legacy_cache_config is not None:</div><div class='add'>+      event = f'legacy-cache-config={llx(legacy_cache_config)}'</div><div class='ctx'>     else:</div><div class='ctx'>       event = f'event={llx(eventcode)}'</div><div class='ctx'>     event_fields = [</div><div class='hunk'>@@ -492,7 +501,8 @@ def add_events_table_entries(item: os.DirEntry, topic: str) -&gt; None:</div><div class='ctx'>   for e in read_json_events(item.path, topic):</div><div class='ctx'>     if e.name:</div><div class='ctx'>       _pending_events.append(e)</div><div class='del'>-    if e.metric_name:</div><div class='add'>+    if e.metric_name and not any(e.metric_name == x.metric_name and</div><div class='add'>+                                 e.pmu == x.pmu for x in _pending_metrics):</div><div class='ctx'>       _pending_metrics.append(e)</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -544,7 +554,7 @@ def print_pending_events() -&gt; None:</div><div class='ctx'>   _args.output_file.write(f"""</div><div class='ctx'> }};</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry {_pending_events_tblname}[] = {{</div><div class='add'>+static const struct pmu_table_entry {_pending_events_tblname}[] = {{</div><div class='ctx'> """)</div><div class='ctx'>   for (pmu, tbl_pmu) in sorted(pmus):</div><div class='ctx'>     pmu_name = f"{pmu}\\000"</div><div class='hunk'>@@ -599,7 +609,7 @@ def print_pending_metrics() -&gt; None:</div><div class='ctx'>   _args.output_file.write(f"""</div><div class='ctx'> }};</div><div class='ctx'> </div><div class='del'>-const struct pmu_table_entry {_pending_metrics_tblname}[] = {{</div><div class='add'>+static const struct pmu_table_entry {_pending_metrics_tblname}[] = {{</div><div class='ctx'> """)</div><div class='ctx'>   for (pmu, tbl_pmu) in sorted(pmus):</div><div class='ctx'>     pmu_name = f"{pmu}\\000"</div><div class='hunk'>@@ -631,7 +641,7 @@ def preprocess_one_file(parents: Sequence[str], item: os.DirEntry) -&gt; None:</div><div class='ctx'>   if not item.is_file() or not item.name.endswith('.json'):</div><div class='ctx'>     return</div><div class='ctx'> </div><div class='del'>-  if item.name == 'metricgroups.json':</div><div class='add'>+  if item.name.endswith('metricgroups.json'):</div><div class='ctx'>     metricgroup_descriptions = json.load(open(item.path))</div><div class='ctx'>     for mgroup in metricgroup_descriptions:</div><div class='ctx'>       assert len(mgroup) &gt; 1, parents</div><div class='hunk'>@@ -684,7 +694,7 @@ def process_one_file(parents: Sequence[str], item: os.DirEntry) -&gt; None:</div><div class='ctx'> </div><div class='ctx'>   # Ignore other directories. If the file name does not have a .json</div><div class='ctx'>   # extension, ignore it. It could be a readme.txt for instance.</div><div class='del'>-  if not item.is_file() or not item.name.endswith('.json') or item.name == 'metricgroups.json':</div><div class='add'>+  if not item.is_file() or not item.name.endswith('.json') or item.name.endswith('metricgroups.json'):</div><div class='ctx'>     return</div><div class='ctx'> </div><div class='ctx'>   add_events_table_entries(item, get_topic(item.name))</div><div class='hunk'>@@ -724,7 +734,7 @@ struct pmu_events_map {</div><div class='ctx'>  * Global table mapping each known CPU for the architecture to its</div><div class='ctx'>  * table of PMU events.</div><div class='ctx'>  */</div><div class='del'>-const struct pmu_events_map pmu_events_map[] = {</div><div class='add'>+static const struct pmu_events_map pmu_events_map[] = {</div><div class='ctx'> """)</div><div class='ctx'>   for arch in archs:</div><div class='ctx'>     if arch == 'test':</div><div class='hunk'>@@ -749,7 +759,10 @@ const struct pmu_events_map pmu_events_map[] = {</div><div class='ctx'> \t\t.pmus = pmu_events__common,</div><div class='ctx'> \t\t.num_pmus = ARRAY_SIZE(pmu_events__common),</div><div class='ctx'> \t},</div><div class='del'>-\t.metric_table = {},</div><div class='add'>+\t.metric_table = {</div><div class='add'>+\t\t.pmus = pmu_metrics__common,</div><div class='add'>+\t\t.num_pmus = ARRAY_SIZE(pmu_metrics__common),</div><div class='add'>+\t},</div><div class='ctx'> },</div><div class='ctx'> """)</div><div class='ctx'>     else:</div><div class='hunk'>@@ -951,6 +964,8 @@ int pmu_events_table__for_each_event(const struct pmu_events_table *table,</div><div class='ctx'>                                     pmu_event_iter_fn fn,</div><div class='ctx'>                                     void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -972,6 +987,8 @@ int pmu_events_table__find_event(const struct pmu_events_table *table,</div><div class='ctx'>                                  pmu_event_iter_fn fn,</div><div class='ctx'>                                  void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return PMU_EVENTS__NOT_FOUND;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -992,6 +1009,8 @@ size_t pmu_events_table__num_events(const struct pmu_events_table *table,</div><div class='ctx'> {</div><div class='ctx'>         size_t count = 0;</div><div class='ctx'> </div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -1070,6 +1089,8 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table,</div><div class='ctx'>                                      pmu_metric_iter_fn fn,</div><div class='ctx'>                                      void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 int ret = pmu_metrics_table__for_each_metric_pmu(table, &amp;table-&gt;pmus[i],</div><div class='ctx'>                                                                  fn, data);</div><div class='hunk'>@@ -1086,6 +1107,8 @@ int pmu_metrics_table__find_metric(const struct pmu_metrics_table *table,</div><div class='ctx'>                                  pmu_metric_iter_fn fn,</div><div class='ctx'>                                  void *data)</div><div class='ctx'> {</div><div class='add'>+        if (!table)</div><div class='add'>+                return 0;</div><div class='ctx'>         for (size_t i = 0; i &lt; table-&gt;num_pmus; i++) {</div><div class='ctx'>                 const struct pmu_table_entry *table_pmu = &amp;table-&gt;pmus[i];</div><div class='ctx'>                 const char *pmu_name = &amp;big_c_string[table_pmu-&gt;pmu_name.offset];</div><div class='hunk'>@@ -1197,6 +1220,22 @@ const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu)</div><div class='ctx'>         return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct pmu_events_table *perf_pmu__default_core_events_table(void)</div><div class='add'>+{</div><div class='add'>+        int i = 0;</div><div class='add'>+</div><div class='add'>+        for (;;) {</div><div class='add'>+                const struct pmu_events_map *map = &amp;pmu_events_map[i++];</div><div class='add'>+</div><div class='add'>+                if (!map-&gt;arch)</div><div class='add'>+                        break;</div><div class='add'>+</div><div class='add'>+                if (!strcmp(map-&gt;cpuid, "common"))</div><div class='add'>+                        return &amp;map-&gt;event_table;</div><div class='add'>+        }</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct pmu_metrics_table *pmu_metrics_table__find(void)</div><div class='ctx'> {</div><div class='ctx'>         struct perf_cpu cpu = {-1};</div><div class='hunk'>@@ -1205,6 +1244,22 @@ const struct pmu_metrics_table *pmu_metrics_table__find(void)</div><div class='ctx'>         return map ? &amp;map-&gt;metric_table : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct pmu_metrics_table *pmu_metrics_table__default(void)</div><div class='add'>+{</div><div class='add'>+        int i = 0;</div><div class='add'>+</div><div class='add'>+        for (;;) {</div><div class='add'>+                const struct pmu_events_map *map = &amp;pmu_events_map[i++];</div><div class='add'>+</div><div class='add'>+                if (!map-&gt;arch)</div><div class='add'>+                        break;</div><div class='add'>+</div><div class='add'>+                if (!strcmp(map-&gt;cpuid, "common"))</div><div class='add'>+                        return &amp;map-&gt;metric_table;</div><div class='add'>+        }</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)</div><div class='ctx'> {</div><div class='ctx'>         for (const struct pmu_events_map *tables = &amp;pmu_events_map[0];</div><div class='head'>diff --git a/tools/perf/pmu-events/make_legacy_cache.py b/tools/perf/pmu-events/make_legacy_cache.py<br/>new file mode 100755<br/>index 000000000000..28a1ff804f86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/make_legacy_cache.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/make_legacy_cache.py</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='add'>+import json</div><div class='add'>+</div><div class='add'>+hw_cache_id = [</div><div class='add'>+    (0, # PERF_COUNT_HW_CACHE_L1D</div><div class='add'>+     ["L1-dcache",  "l1-d",     "l1d",      "L1-data",],</div><div class='add'>+     [0, 1, 2,], # read, write, prefetch</div><div class='add'>+     "Level 1 data cache",</div><div class='add'>+     ),</div><div class='add'>+    (1, # PERF_COUNT_HW_CACHE_L1I</div><div class='add'>+     ["L1-icache",  "l1-i",     "l1i",      "L1-instruction",],</div><div class='add'>+     [0, 2,], # read, prefetch</div><div class='add'>+     "Level 1 instruction cache",</div><div class='add'>+     ),</div><div class='add'>+    (2, # PERF_COUNT_HW_CACHE_LL</div><div class='add'>+     ["LLC", "L2"],</div><div class='add'>+     [0, 1, 2,], # read, write, prefetch</div><div class='add'>+     "Last level cache",</div><div class='add'>+     ),</div><div class='add'>+    (3, # PERF_COUNT_HW_CACHE_DTLB</div><div class='add'>+     ["dTLB",   "d-tlb",    "Data-TLB",],</div><div class='add'>+     [0, 1, 2,], # read, write, prefetch</div><div class='add'>+     "Data TLB",</div><div class='add'>+     ),</div><div class='add'>+    (4, # PERF_COUNT_HW_CACHE_ITLB</div><div class='add'>+     ["iTLB",   "i-tlb",    "Instruction-TLB",],</div><div class='add'>+     [0,], # read</div><div class='add'>+     "Instruction TLB",</div><div class='add'>+     ),</div><div class='add'>+    (5, # PERF_COUNT_HW_CACHE_BPU</div><div class='add'>+     ["branch", "branches", "bpu",      "btb",      "bpc",],</div><div class='add'>+     [0,], # read</div><div class='add'>+     "Branch prediction unit",</div><div class='add'>+     ),</div><div class='add'>+    (6, # PERF_COUNT_HW_CACHE_NODE</div><div class='add'>+     ["node",],</div><div class='add'>+     [0, 1, 2,], # read, write, prefetch</div><div class='add'>+     "Local memory",</div><div class='add'>+     ),</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+hw_cache_op = [</div><div class='add'>+    (0, # PERF_COUNT_HW_CACHE_OP_READ</div><div class='add'>+     ["load",   "loads",    "read",],</div><div class='add'>+     "read"),</div><div class='add'>+    (1, # PERF_COUNT_HW_CACHE_OP_WRITE</div><div class='add'>+     ["store",  "stores",   "write",],</div><div class='add'>+     "write"),</div><div class='add'>+    (2, # PERF_COUNT_HW_CACHE_OP_PREFETCH</div><div class='add'>+     ["prefetch",   "prefetches",   "speculative-read", "speculative-load",],</div><div class='add'>+     "prefetch"),</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+hw_cache_result = [</div><div class='add'>+    (0, # PERF_COUNT_HW_CACHE_RESULT_ACCESS</div><div class='add'>+     ["refs",   "Reference",    "ops",      "access",],</div><div class='add'>+     "accesses"),</div><div class='add'>+    (1, # PERF_COUNT_HW_CACHE_RESULT_MISS</div><div class='add'>+     ["misses", "miss",],</div><div class='add'>+     "misses"),</div><div class='add'>+]</div><div class='add'>+</div><div class='add'>+events = []</div><div class='add'>+def add_event(name: str,</div><div class='add'>+              cache_id: int, cache_op: int, cache_result: int,</div><div class='add'>+              desc: str,</div><div class='add'>+              deprecated: bool) -&gt; None:</div><div class='add'>+    # Avoid conflicts with PERF_TYPE_HARDWARE events which are higher priority.</div><div class='add'>+    if name in ["branch-misses", "branches"]:</div><div class='add'>+        return</div><div class='add'>+</div><div class='add'>+    # Tweak and deprecate L2 named events.</div><div class='add'>+    if name.startswith("L2"):</div><div class='add'>+        desc = desc.replace("Last level cache", "Level 2 (or higher) last level cache")</div><div class='add'>+        deprecated = True</div><div class='add'>+</div><div class='add'>+    event = {</div><div class='add'>+        "EventName": name,</div><div class='add'>+        "BriefDescription": desc,</div><div class='add'>+        "LegacyCacheCode": f"0x{cache_id | (cache_op &lt;&lt; 8) | (cache_result &lt;&lt; 16):06x}",</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    # Deprecate events with the name starting L2 as it is actively</div><div class='add'>+    # confusing as on many machines it actually means the L3 cache.</div><div class='add'>+    if deprecated:</div><div class='add'>+        event["Deprecated"] = "1"</div><div class='add'>+    events.append(event)</div><div class='add'>+</div><div class='add'>+for (cache_id, names, ops, cache_desc) in hw_cache_id:</div><div class='add'>+    for name in names:</div><div class='add'>+        add_event(name,</div><div class='add'>+                  cache_id,</div><div class='add'>+                  0, # PERF_COUNT_HW_CACHE_OP_READ</div><div class='add'>+                  0, # PERF_COUNT_HW_CACHE_RESULT_ACCESS</div><div class='add'>+                  f"{cache_desc} read accesses.",</div><div class='add'>+                  deprecated=True)</div><div class='add'>+</div><div class='add'>+        for (op, op_names, op_desc) in hw_cache_op:</div><div class='add'>+            if op not in ops:</div><div class='add'>+                continue</div><div class='add'>+            for op_name in op_names:</div><div class='add'>+                deprecated = (names[0] != name or op_names[1] != op_name)</div><div class='add'>+                add_event(f"{name}-{op_name}",</div><div class='add'>+                          cache_id,</div><div class='add'>+                          op,</div><div class='add'>+                          0, # PERF_COUNT_HW_CACHE_RESULT_ACCESS</div><div class='add'>+                          f"{cache_desc} {op_desc} accesses.",</div><div class='add'>+                          deprecated)</div><div class='add'>+</div><div class='add'>+                for (result,  result_names, result_desc) in hw_cache_result:</div><div class='add'>+                    for result_name in result_names:</div><div class='add'>+                        deprecated = ((names[0] != name or op_names[0] != op_name) or</div><div class='add'>+                                      (result == 0) or (result_names[0] != result_name))</div><div class='add'>+                        add_event(f"{name}-{op_name}-{result_name}",</div><div class='add'>+                                  cache_id, op, result,</div><div class='add'>+                                  f"{cache_desc} {op_desc} {result_desc}.",</div><div class='add'>+                                  deprecated)</div><div class='add'>+</div><div class='add'>+        for (result,  result_names, result_desc) in hw_cache_result:</div><div class='add'>+            for result_name in result_names:</div><div class='add'>+                add_event(f"{name}-{result_name}",</div><div class='add'>+                          cache_id,</div><div class='add'>+                          0, # PERF_COUNT_HW_CACHE_OP_READ</div><div class='add'>+                          result,</div><div class='add'>+                          f"{cache_desc} read {result_desc}.",</div><div class='add'>+                          deprecated=True)</div><div class='add'>+</div><div class='add'>+print(json.dumps(events, indent=2))</div><div class='head'>diff --git a/tools/perf/pmu-events/metric.py b/tools/perf/pmu-events/metric.py<br/>index 92acd89ed97a..dd8fd06940e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/metric.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/metric.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/metric.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/metric.py</a></div><div class='hunk'>@@ -4,8 +4,14 @@ import ast</div><div class='ctx'> import decimal</div><div class='ctx'> import json</div><div class='ctx'> import re</div><div class='add'>+from enum import Enum</div><div class='ctx'> from typing import Dict, List, Optional, Set, Tuple, Union</div><div class='ctx'> </div><div class='add'>+class MetricConstraint(Enum):</div><div class='add'>+  GROUPED_EVENTS = 0</div><div class='add'>+  NO_GROUP_EVENTS = 1</div><div class='add'>+  NO_GROUP_EVENTS_NMI = 2</div><div class='add'>+  NO_GROUP_EVENTS_SMT = 3</div><div class='ctx'> </div><div class='ctx'> class Expression:</div><div class='ctx'>   """Abstract base class of elements in a metric expression."""</div><div class='hunk'>@@ -423,14 +429,16 @@ class Metric:</div><div class='ctx'>   groups: Set[str]</div><div class='ctx'>   expr: Expression</div><div class='ctx'>   scale_unit: str</div><div class='del'>-  constraint: bool</div><div class='add'>+  constraint: MetricConstraint</div><div class='add'>+  threshold: Optional[Expression]</div><div class='ctx'> </div><div class='ctx'>   def __init__(self,</div><div class='ctx'>                name: str,</div><div class='ctx'>                description: str,</div><div class='ctx'>                expr: Expression,</div><div class='ctx'>                scale_unit: str,</div><div class='del'>-               constraint: bool = False):</div><div class='add'>+               constraint: MetricConstraint = MetricConstraint.GROUPED_EVENTS,</div><div class='add'>+               threshold: Optional[Expression] = None):</div><div class='ctx'>     self.name = name</div><div class='ctx'>     self.description = description</div><div class='ctx'>     self.expr = expr.Simplify()</div><div class='hunk'>@@ -441,6 +449,7 @@ class Metric:</div><div class='ctx'>     else:</div><div class='ctx'>       self.scale_unit = f'1{scale_unit}'</div><div class='ctx'>     self.constraint = constraint</div><div class='add'>+    self.threshold = threshold</div><div class='ctx'>     self.groups = set()</div><div class='ctx'> </div><div class='ctx'>   def __lt__(self, other):</div><div class='hunk'>@@ -449,7 +458,8 @@ class Metric:</div><div class='ctx'> </div><div class='ctx'>   def AddToMetricGroup(self, group):</div><div class='ctx'>     """Callback used when being added to a MetricGroup."""</div><div class='del'>-    self.groups.add(group.name)</div><div class='add'>+    if group.name:</div><div class='add'>+      self.groups.add(group.name)</div><div class='ctx'> </div><div class='ctx'>   def Flatten(self) -&gt; Set['Metric']:</div><div class='ctx'>     """Return a leaf metric."""</div><div class='hunk'>@@ -464,20 +474,15 @@ class Metric:</div><div class='ctx'>         'MetricExpr': self.expr.ToPerfJson(),</div><div class='ctx'>         'ScaleUnit': self.scale_unit</div><div class='ctx'>     }</div><div class='del'>-    if self.constraint:</div><div class='del'>-      result['MetricConstraint'] = 'NO_NMI_WATCHDOG'</div><div class='add'>+    if self.constraint != MetricConstraint.GROUPED_EVENTS:</div><div class='add'>+      result['MetricConstraint'] = self.constraint.name</div><div class='add'>+    if self.threshold:</div><div class='add'>+      result['MetricThreshold'] = self.threshold.ToPerfJson()</div><div class='ctx'> </div><div class='ctx'>     return result</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-class _MetricJsonEncoder(json.JSONEncoder):</div><div class='del'>-  """Special handling for Metric objects."""</div><div class='del'>-</div><div class='del'>-  def default(self, o):</div><div class='del'>-    if isinstance(o, Metric):</div><div class='del'>-      return o.ToPerfJson()</div><div class='del'>-    return json.JSONEncoder.default(self, o)</div><div class='del'>-</div><div class='add'>+  def ToMetricGroupDescriptions(self, root: bool = True) -&gt; Dict[str, str]:</div><div class='add'>+    return {}</div><div class='ctx'> </div><div class='ctx'> class MetricGroup:</div><div class='ctx'>   """A group of metrics.</div><div class='hunk'>@@ -487,12 +492,16 @@ class MetricGroup:</div><div class='ctx'>   which can facilitate arrangements similar to trees.</div><div class='ctx'>   """</div><div class='ctx'> </div><div class='del'>-  def __init__(self, name: str, metric_list: List[Union[Metric,</div><div class='del'>-                                                        'MetricGroup']]):</div><div class='add'>+  def __init__(self, name: str,</div><div class='add'>+               metric_list: List[Union[Optional[Metric], Optional['MetricGroup']]],</div><div class='add'>+               description: Optional[str] = None):</div><div class='ctx'>     self.name = name</div><div class='del'>-    self.metric_list = metric_list</div><div class='add'>+    self.metric_list = []</div><div class='add'>+    self.description = description</div><div class='ctx'>     for metric in metric_list:</div><div class='del'>-      metric.AddToMetricGroup(self)</div><div class='add'>+      if metric:</div><div class='add'>+        self.metric_list.append(metric)</div><div class='add'>+        metric.AddToMetricGroup(self)</div><div class='ctx'> </div><div class='ctx'>   def AddToMetricGroup(self, group):</div><div class='ctx'>     """Callback used when a MetricGroup is added into another."""</div><div class='hunk'>@@ -507,11 +516,36 @@ class MetricGroup:</div><div class='ctx'> </div><div class='ctx'>     return result</div><div class='ctx'> </div><div class='del'>-  def ToPerfJson(self) -&gt; str:</div><div class='del'>-    return json.dumps(sorted(self.Flatten()), indent=2, cls=_MetricJsonEncoder)</div><div class='add'>+  def ToPerfJson(self) -&gt; List[Dict[str, str]]:</div><div class='add'>+    result = []</div><div class='add'>+    for x in sorted(self.Flatten()):</div><div class='add'>+      result.append(x.ToPerfJson())</div><div class='add'>+    return result</div><div class='add'>+</div><div class='add'>+  def ToMetricGroupDescriptions(self, root: bool = True) -&gt; Dict[str, str]:</div><div class='add'>+    result = {self.name: self.description} if self.description else {}</div><div class='add'>+    for x in self.metric_list:</div><div class='add'>+      result.update(x.ToMetricGroupDescriptions(False))</div><div class='add'>+    return result</div><div class='ctx'> </div><div class='ctx'>   def __str__(self) -&gt; str:</div><div class='del'>-    return self.ToPerfJson()</div><div class='add'>+    return str(self.ToPerfJson())</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def JsonEncodeMetric(x: MetricGroup):</div><div class='add'>+  class MetricJsonEncoder(json.JSONEncoder):</div><div class='add'>+    """Special handling for Metric objects."""</div><div class='add'>+</div><div class='add'>+    def default(self, o):</div><div class='add'>+      if isinstance(o, Metric) or isinstance(o, MetricGroup):</div><div class='add'>+        return o.ToPerfJson()</div><div class='add'>+      return json.JSONEncoder.default(self, o)</div><div class='add'>+</div><div class='add'>+  return json.dumps(x, indent=2, cls=MetricJsonEncoder)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def JsonEncodeMetricGroupDescriptions(x: MetricGroup):</div><div class='add'>+  return json.dumps(x.ToMetricGroupDescriptions(), indent=2)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> class _RewriteIfExpToSelect(ast.NodeTransformer):</div><div class='hunk'>@@ -551,12 +585,18 @@ def ParsePerfJson(orig: str) -&gt; Expression:</div><div class='ctx'>               r'Event(r"\1")', py)</div><div class='ctx'>   # If it started with a # it should have been a literal, rather than an event name</div><div class='ctx'>   py = re.sub(r'#Event\(r"([^"]*)"\)', r'Literal("#\1")', py)</div><div class='add'>+  # Fix events wrongly broken at a ','</div><div class='add'>+  while True:</div><div class='add'>+    prev_py = py</div><div class='add'>+    py = re.sub(r'Event\(r"([^"]*)"\),Event\(r"([^"]*)"\)', r'Event(r"\1,\2")', py)</div><div class='add'>+    if py == prev_py:</div><div class='add'>+      break</div><div class='ctx'>   # Convert accidentally converted hex constants ("0Event(r"xDEADBEEF)"") back to a constant,</div><div class='ctx'>   # but keep it wrapped in Event(), otherwise Python drops the 0x prefix and it gets interpreted as</div><div class='ctx'>   # a double by the Bison parser</div><div class='ctx'>   py = re.sub(r'0Event\(r"[xX]([0-9a-fA-F]*)"\)', r'Event("0x\1")', py)</div><div class='ctx'>   # Convert accidentally converted scientific notation constants back</div><div class='del'>-  py = re.sub(r'([0-9]+)Event\(r"(e[0-9]+)"\)', r'\1\2', py)</div><div class='add'>+  py = re.sub(r'([0-9]+)Event\(r"(e[0-9]*)"\)', r'\1\2', py)</div><div class='ctx'>   # Convert all the known keywords back from events to just the keyword</div><div class='ctx'>   keywords = ['if', 'else', 'min', 'max', 'd_ratio', 'source_count', 'has_event', 'strcmp_cpuid_str']</div><div class='ctx'>   for kw in keywords:</div><div class='hunk'>@@ -569,7 +609,6 @@ def ParsePerfJson(orig: str) -&gt; Expression:</div><div class='ctx'>   parsed = ast.fix_missing_locations(parsed)</div><div class='ctx'>   return _Constify(eval(compile(parsed, orig, 'eval')))</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> def RewriteMetricsInTermsOfOthers(metrics: List[Tuple[str, str, Expression]]</div><div class='ctx'>                                   )-&gt; Dict[Tuple[str, str], Expression]:</div><div class='ctx'>   """Shorten metrics by rewriting in terms of others.</div><div class='head'>diff --git a/tools/perf/pmu-events/metric_test.py b/tools/perf/pmu-events/metric_test.py<br/>index ee22ff43ddd7..8acfe4652b55 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/metric_test.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/metric_test.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/metric_test.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/metric_test.py</a></div><div class='hunk'>@@ -61,6 +61,10 @@ class TestMetricExpressions(unittest.TestCase):</div><div class='ctx'>     after = before</div><div class='ctx'>     self.assertEqual(ParsePerfJson(before).ToPerfJson(), after)</div><div class='ctx'> </div><div class='add'>+    before = r'a + 3e-12 + b'</div><div class='add'>+    after = before</div><div class='add'>+    self.assertEqual(ParsePerfJson(before).ToPerfJson(), after)</div><div class='add'>+</div><div class='ctx'>   def test_IfElseTests(self):</div><div class='ctx'>     # if-else needs rewriting to Select and back.</div><div class='ctx'>     before = r'Event1 if #smt_on else Event2'</div><div class='head'>diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h<br/>index ea022ea55087..d3b24014c6ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/pmu-events.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/pmu-events/pmu-events.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/pmu-events/pmu-events.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/pmu-events/pmu-events.h</a></div><div class='hunk'>@@ -74,6 +74,7 @@ struct pmu_metric {</div><div class='ctx'> 	const char *default_metricgroup_name;</div><div class='ctx'> 	enum aggr_mode_class aggr_mode;</div><div class='ctx'> 	enum metric_event_groups event_grouping;</div><div class='add'>+	bool default_show_events;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct pmu_events_table;</div><div class='hunk'>@@ -125,7 +126,9 @@ int pmu_metrics_table__find_metric(const struct pmu_metrics_table *table,</div><div class='ctx'> 				   void *data);</div><div class='ctx'> </div><div class='ctx'> const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu);</div><div class='add'>+const struct pmu_events_table *perf_pmu__default_core_events_table(void);</div><div class='ctx'> const struct pmu_metrics_table *pmu_metrics_table__find(void);</div><div class='add'>+const struct pmu_metrics_table *pmu_metrics_table__default(void);</div><div class='ctx'> const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid);</div><div class='ctx'> const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const char *cpuid);</div><div class='ctx'> int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data);</div><div class='head'>diff --git a/tools/perf/python/ilist.py b/tools/perf/python/ilist.py<br/>new file mode 100755<br/>index 000000000000..0d757ddb4795<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/python/ilist.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/python/ilist.py</a></div><div class='hunk'>@@ -0,0 +1,515 @@</div><div class='add'>+#!/usr/bin/env python3</div><div class='add'>+# SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='add'>+"""Interactive perf list."""</div><div class='add'>+</div><div class='add'>+from abc import ABC, abstractmethod</div><div class='add'>+import argparse</div><div class='add'>+from dataclasses import dataclass</div><div class='add'>+import math</div><div class='add'>+from typing import Any, Dict, Optional, Tuple</div><div class='add'>+import perf</div><div class='add'>+from textual import on</div><div class='add'>+from textual.app import App, ComposeResult</div><div class='add'>+from textual.binding import Binding</div><div class='add'>+from textual.containers import Horizontal, HorizontalGroup, Vertical, VerticalScroll</div><div class='add'>+from textual.css.query import NoMatches</div><div class='add'>+from textual.command import SearchIcon</div><div class='add'>+from textual.screen import ModalScreen</div><div class='add'>+from textual.widgets import Button, Footer, Header, Input, Label, Sparkline, Static, Tree</div><div class='add'>+from textual.widgets.tree import TreeNode</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+def get_info(info: Dict[str, str], key: str):</div><div class='add'>+    return (info[key] + "\n") if key in info else ""</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class TreeValue(ABC):</div><div class='add'>+    """Abstraction for the data of value in the tree."""</div><div class='add'>+</div><div class='add'>+    @abstractmethod</div><div class='add'>+    def name(self) -&gt; str:</div><div class='add'>+        pass</div><div class='add'>+</div><div class='add'>+    @abstractmethod</div><div class='add'>+    def description(self) -&gt; str:</div><div class='add'>+        pass</div><div class='add'>+</div><div class='add'>+    @abstractmethod</div><div class='add'>+    def matches(self, query: str) -&gt; bool:</div><div class='add'>+        pass</div><div class='add'>+</div><div class='add'>+    @abstractmethod</div><div class='add'>+    def parse(self) -&gt; perf.evlist:</div><div class='add'>+        pass</div><div class='add'>+</div><div class='add'>+    @abstractmethod</div><div class='add'>+    def value(self, evlist: perf.evlist, evsel: perf.evsel, cpu: int, thread: int) -&gt; float:</div><div class='add'>+        pass</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+@dataclass</div><div class='add'>+class Metric(TreeValue):</div><div class='add'>+    """A metric in the tree."""</div><div class='add'>+    metric_name: str</div><div class='add'>+    metric_pmu: str</div><div class='add'>+</div><div class='add'>+    def name(self) -&gt; str:</div><div class='add'>+        return self.metric_name</div><div class='add'>+</div><div class='add'>+    def description(self) -&gt; str:</div><div class='add'>+        """Find and format metric description."""</div><div class='add'>+        for metric in perf.metrics():</div><div class='add'>+            if metric["MetricName"] != self.metric_name:</div><div class='add'>+                continue</div><div class='add'>+            if self.metric_pmu and metric["PMU"] != self.metric_pmu:</div><div class='add'>+                continue</div><div class='add'>+            desc = get_info(metric, "BriefDescription")</div><div class='add'>+            desc += get_info(metric, "PublicDescription")</div><div class='add'>+            desc += get_info(metric, "MetricExpr")</div><div class='add'>+            desc += get_info(metric, "MetricThreshold")</div><div class='add'>+            return desc</div><div class='add'>+        return "description"</div><div class='add'>+</div><div class='add'>+    def matches(self, query: str) -&gt; bool:</div><div class='add'>+        return query in self.metric_name</div><div class='add'>+</div><div class='add'>+    def parse(self) -&gt; perf.evlist:</div><div class='add'>+        return perf.parse_metrics(self.metric_name, self.metric_pmu)</div><div class='add'>+</div><div class='add'>+    def value(self, evlist: perf.evlist, evsel: perf.evsel, cpu: int, thread: int) -&gt; float:</div><div class='add'>+        try:</div><div class='add'>+            val = evlist.compute_metric(self.metric_name, cpu, thread)</div><div class='add'>+            return 0 if math.isnan(val) else val</div><div class='add'>+        except:</div><div class='add'>+            # Be tolerant of failures to compute metrics on particular CPUs/threads.</div><div class='add'>+            return 0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+@dataclass</div><div class='add'>+class PmuEvent(TreeValue):</div><div class='add'>+    """A PMU and event within the tree."""</div><div class='add'>+    pmu: str</div><div class='add'>+    event: str</div><div class='add'>+</div><div class='add'>+    def name(self) -&gt; str:</div><div class='add'>+        if self.event.startswith(self.pmu) or ':' in self.event:</div><div class='add'>+            return self.event</div><div class='add'>+        else:</div><div class='add'>+            return f"{self.pmu}/{self.event}/"</div><div class='add'>+</div><div class='add'>+    def description(self) -&gt; str:</div><div class='add'>+        """Find and format event description for {pmu}/{event}/."""</div><div class='add'>+        for p in perf.pmus():</div><div class='add'>+            if p.name() != self.pmu:</div><div class='add'>+                continue</div><div class='add'>+            for info in p.events():</div><div class='add'>+                if "name" not in info or info["name"] != self.event:</div><div class='add'>+                    continue</div><div class='add'>+</div><div class='add'>+                desc = get_info(info, "topic")</div><div class='add'>+                desc += get_info(info, "event_type_desc")</div><div class='add'>+                desc += get_info(info, "desc")</div><div class='add'>+                desc += get_info(info, "long_desc")</div><div class='add'>+                desc += get_info(info, "encoding_desc")</div><div class='add'>+                return desc</div><div class='add'>+        return "description"</div><div class='add'>+</div><div class='add'>+    def matches(self, query: str) -&gt; bool:</div><div class='add'>+        return query in self.pmu or query in self.event</div><div class='add'>+</div><div class='add'>+    def parse(self) -&gt; perf.evlist:</div><div class='add'>+        return perf.parse_events(self.name())</div><div class='add'>+</div><div class='add'>+    def value(self, evlist: perf.evlist, evsel: perf.evsel, cpu: int, thread: int) -&gt; float:</div><div class='add'>+        return evsel.read(cpu, thread).val</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class ErrorScreen(ModalScreen[bool]):</div><div class='add'>+    """Pop up dialog for errors."""</div><div class='add'>+</div><div class='add'>+    CSS = """</div><div class='add'>+    ErrorScreen {</div><div class='add'>+        align: center middle;</div><div class='add'>+    }</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, error: str):</div><div class='add'>+        self.error = error</div><div class='add'>+        super().__init__()</div><div class='add'>+</div><div class='add'>+    def compose(self) -&gt; ComposeResult:</div><div class='add'>+        yield Button(f"Error: {self.error}", variant="primary", id="error")</div><div class='add'>+</div><div class='add'>+    def on_button_pressed(self, event: Button.Pressed) -&gt; None:</div><div class='add'>+        self.dismiss(True)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class SearchScreen(ModalScreen[str]):</div><div class='add'>+    """Pop up dialog for search."""</div><div class='add'>+</div><div class='add'>+    CSS = """</div><div class='add'>+    SearchScreen Horizontal {</div><div class='add'>+        align: center middle;</div><div class='add'>+        margin-top: 1;</div><div class='add'>+    }</div><div class='add'>+    SearchScreen Input {</div><div class='add'>+        width: 1fr;</div><div class='add'>+    }</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def compose(self) -&gt; ComposeResult:</div><div class='add'>+        yield Horizontal(SearchIcon(), Input(placeholder="Event name"))</div><div class='add'>+</div><div class='add'>+    def on_input_submitted(self, event: Input.Submitted) -&gt; None:</div><div class='add'>+        """Handle the user pressing Enter in the input field."""</div><div class='add'>+        self.dismiss(event.value)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class Counter(HorizontalGroup):</div><div class='add'>+    """Two labels for a CPU and its counter value."""</div><div class='add'>+</div><div class='add'>+    CSS = """</div><div class='add'>+    Label {</div><div class='add'>+        gutter: 1;</div><div class='add'>+    }</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, cpu: int) -&gt; None:</div><div class='add'>+        self.cpu = cpu</div><div class='add'>+        super().__init__()</div><div class='add'>+</div><div class='add'>+    def compose(self) -&gt; ComposeResult:</div><div class='add'>+        label = f"cpu{self.cpu}" if self.cpu &gt;= 0 else "total"</div><div class='add'>+        yield Label(label + " ")</div><div class='add'>+        yield Label("0", id=f"counter_{label}")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class CounterSparkline(HorizontalGroup):</div><div class='add'>+    """A Sparkline for a performance counter."""</div><div class='add'>+</div><div class='add'>+    def __init__(self, cpu: int) -&gt; None:</div><div class='add'>+        self.cpu = cpu</div><div class='add'>+        super().__init__()</div><div class='add'>+</div><div class='add'>+    def compose(self) -&gt; ComposeResult:</div><div class='add'>+        label = f"cpu{self.cpu}" if self.cpu &gt;= 0 else "total"</div><div class='add'>+        yield Label(label)</div><div class='add'>+        yield Sparkline([], summary_function=max, id=f"sparkline_{label}")</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class IListApp(App):</div><div class='add'>+    TITLE = "Interactive Perf List"</div><div class='add'>+</div><div class='add'>+    BINDINGS = [</div><div class='add'>+        Binding(key="s", action="search", description="Search",</div><div class='add'>+                tooltip="Search events and PMUs"),</div><div class='add'>+        Binding(key="n", action="next", description="Next",</div><div class='add'>+                tooltip="Next search result or item"),</div><div class='add'>+        Binding(key="p", action="prev", description="Previous",</div><div class='add'>+                tooltip="Previous search result or item"),</div><div class='add'>+        Binding(key="c", action="collapse", description="Collapse",</div><div class='add'>+                tooltip="Collapse the current PMU"),</div><div class='add'>+        Binding(key="^q", action="quit", description="Quit",</div><div class='add'>+                tooltip="Quit the app"),</div><div class='add'>+    ]</div><div class='add'>+</div><div class='add'>+    CSS = """</div><div class='add'>+        /* Make the 'total' sparkline a different color. */</div><div class='add'>+        #sparkline_total &gt; .sparkline--min-color {</div><div class='add'>+            color: $accent;</div><div class='add'>+        }</div><div class='add'>+        #sparkline_total &gt; .sparkline--max-color {</div><div class='add'>+            color: $accent 30%;</div><div class='add'>+        }</div><div class='add'>+        /*</div><div class='add'>+         * Make the active_search initially not displayed with the text in</div><div class='add'>+         * the middle of the line.</div><div class='add'>+         */</div><div class='add'>+        #active_search {</div><div class='add'>+            display: none;</div><div class='add'>+            width: 100%;</div><div class='add'>+            text-align: center;</div><div class='add'>+        }</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    def __init__(self, interval: float) -&gt; None:</div><div class='add'>+        self.interval = interval</div><div class='add'>+        self.evlist = None</div><div class='add'>+        self.selected: Optional[TreeValue] = None</div><div class='add'>+        self.search_results: list[TreeNode[TreeValue]] = []</div><div class='add'>+        self.cur_search_result: TreeNode[TreeValue] | None = None</div><div class='add'>+        super().__init__()</div><div class='add'>+</div><div class='add'>+    def expand_and_select(self, node: TreeNode[Any]) -&gt; None:</div><div class='add'>+        """Expand select a node in the tree."""</div><div class='add'>+        if node.parent:</div><div class='add'>+            node.parent.expand()</div><div class='add'>+            if node.parent.parent:</div><div class='add'>+                node.parent.parent.expand()</div><div class='add'>+        node.expand()</div><div class='add'>+        node.tree.select_node(node)</div><div class='add'>+        node.tree.scroll_to_node(node)</div><div class='add'>+</div><div class='add'>+    def set_searched_tree_node(self, previous: bool) -&gt; None:</div><div class='add'>+        """Set the cur_search_result node to either the next or previous."""</div><div class='add'>+        l = len(self.search_results)</div><div class='add'>+</div><div class='add'>+        if l &lt; 1:</div><div class='add'>+            tree: Tree[TreeValue] = self.query_one("#root", Tree)</div><div class='add'>+            if previous:</div><div class='add'>+                tree.action_cursor_up()</div><div class='add'>+            else:</div><div class='add'>+                tree.action_cursor_down()</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        if self.cur_search_result:</div><div class='add'>+            idx = self.search_results.index(self.cur_search_result)</div><div class='add'>+            if previous:</div><div class='add'>+                idx = idx - 1 if idx &gt; 0 else l - 1</div><div class='add'>+            else:</div><div class='add'>+                idx = idx + 1 if idx &lt; l - 1 else 0</div><div class='add'>+        else:</div><div class='add'>+            idx = l - 1 if previous else 0</div><div class='add'>+</div><div class='add'>+        node = self.search_results[idx]</div><div class='add'>+        if node == self.cur_search_result:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        self.cur_search_result = node</div><div class='add'>+        self.expand_and_select(node)</div><div class='add'>+</div><div class='add'>+    def action_search(self) -&gt; None:</div><div class='add'>+        """Search was chosen."""</div><div class='add'>+        def set_initial_focus(event: str | None) -&gt; None:</div><div class='add'>+            """Sets the focus after the SearchScreen is dismissed."""</div><div class='add'>+</div><div class='add'>+            search_label = self.query_one("#active_search", Label)</div><div class='add'>+            search_label.display = True if event else False</div><div class='add'>+            if not event:</div><div class='add'>+                return</div><div class='add'>+            event = event.lower()</div><div class='add'>+            search_label.update(f'Searching for events matching "{event}"')</div><div class='add'>+</div><div class='add'>+            tree: Tree[str] = self.query_one("#root", Tree)</div><div class='add'>+</div><div class='add'>+            def find_search_results(event: str, node: TreeNode[str],</div><div class='add'>+                                    cursor_seen: bool = False,</div><div class='add'>+                                    match_after_cursor: Optional[TreeNode[str]] = None</div><div class='add'>+                                    ) -&gt; Tuple[bool, Optional[TreeNode[str]]]:</div><div class='add'>+                """Find nodes that match the search remembering the one after the cursor."""</div><div class='add'>+                if not cursor_seen and node == tree.cursor_node:</div><div class='add'>+                    cursor_seen = True</div><div class='add'>+                if node.data and node.data.matches(event):</div><div class='add'>+                    if cursor_seen and not match_after_cursor:</div><div class='add'>+                        match_after_cursor = node</div><div class='add'>+                    self.search_results.append(node)</div><div class='add'>+</div><div class='add'>+                if node.children:</div><div class='add'>+                    for child in node.children:</div><div class='add'>+                        (cursor_seen, match_after_cursor) = \</div><div class='add'>+                            find_search_results(event, child, cursor_seen, match_after_cursor)</div><div class='add'>+                return (cursor_seen, match_after_cursor)</div><div class='add'>+</div><div class='add'>+            self.search_results.clear()</div><div class='add'>+            (_, self.cur_search_result) = find_search_results(event, tree.root)</div><div class='add'>+            if len(self.search_results) &lt; 1:</div><div class='add'>+                self.push_screen(ErrorScreen(f"Failed to find pmu/event or metric {event}"))</div><div class='add'>+                search_label.display = False</div><div class='add'>+            elif self.cur_search_result:</div><div class='add'>+                self.expand_and_select(self.cur_search_result)</div><div class='add'>+            else:</div><div class='add'>+                self.set_searched_tree_node(previous=False)</div><div class='add'>+</div><div class='add'>+        self.push_screen(SearchScreen(), set_initial_focus)</div><div class='add'>+</div><div class='add'>+    def action_next(self) -&gt; None:</div><div class='add'>+        """Next was chosen."""</div><div class='add'>+        self.set_searched_tree_node(previous=False)</div><div class='add'>+</div><div class='add'>+    def action_prev(self) -&gt; None:</div><div class='add'>+        """Previous was chosen."""</div><div class='add'>+        self.set_searched_tree_node(previous=True)</div><div class='add'>+</div><div class='add'>+    def action_collapse(self) -&gt; None:</div><div class='add'>+        """Collapse the part of the tree currently on."""</div><div class='add'>+        tree: Tree[str] = self.query_one("#root", Tree)</div><div class='add'>+        node = tree.cursor_node</div><div class='add'>+        if node and node.parent:</div><div class='add'>+            node.parent.collapse_all()</div><div class='add'>+            node.tree.scroll_to_node(node.parent)</div><div class='add'>+</div><div class='add'>+    def update_counts(self) -&gt; None:</div><div class='add'>+        """Called every interval to update counts."""</div><div class='add'>+        if not self.selected or not self.evlist:</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        def update_count(cpu: int, count: int):</div><div class='add'>+            # Update the raw count display.</div><div class='add'>+            counter: Label = self.query(f"#counter_cpu{cpu}" if cpu &gt;= 0 else "#counter_total")</div><div class='add'>+            if not counter:</div><div class='add'>+                return</div><div class='add'>+            counter = counter.first(Label)</div><div class='add'>+            counter.update(str(count))</div><div class='add'>+</div><div class='add'>+            # Update the sparkline.</div><div class='add'>+            line: Sparkline = self.query(f"#sparkline_cpu{cpu}" if cpu &gt;= 0 else "#sparkline_total")</div><div class='add'>+            if not line:</div><div class='add'>+                return</div><div class='add'>+            line = line.first(Sparkline)</div><div class='add'>+            # If there are more events than the width, remove the front event.</div><div class='add'>+            if len(line.data) &gt; line.size.width:</div><div class='add'>+                line.data.pop(0)</div><div class='add'>+            line.data.append(count)</div><div class='add'>+            line.mutate_reactive(Sparkline.data)</div><div class='add'>+</div><div class='add'>+        # Update the total and each CPU counts, assume there's just 1 evsel.</div><div class='add'>+        total = 0</div><div class='add'>+        self.evlist.disable()</div><div class='add'>+        for evsel in self.evlist:</div><div class='add'>+            for cpu in evsel.cpus():</div><div class='add'>+                aggr = 0</div><div class='add'>+                for thread in evsel.threads():</div><div class='add'>+                    aggr += self.selected.value(self.evlist, evsel, cpu, thread)</div><div class='add'>+                update_count(cpu, aggr)</div><div class='add'>+                total += aggr</div><div class='add'>+        update_count(-1, total)</div><div class='add'>+        self.evlist.enable()</div><div class='add'>+</div><div class='add'>+    def on_mount(self) -&gt; None:</div><div class='add'>+        """When App starts set up periodic event updating."""</div><div class='add'>+        self.update_counts()</div><div class='add'>+        self.set_interval(self.interval, self.update_counts)</div><div class='add'>+</div><div class='add'>+    def set_selected(self, value: TreeValue) -&gt; None:</div><div class='add'>+        """Updates the event/description and starts the counters."""</div><div class='add'>+        try:</div><div class='add'>+            label_name = self.query_one("#event_name", Label)</div><div class='add'>+            event_description = self.query_one("#event_description", Static)</div><div class='add'>+            lines = self.query_one("#lines")</div><div class='add'>+        except NoMatches:</div><div class='add'>+            # A race with rendering, ignore the update as we can't</div><div class='add'>+            # mount the assumed output widgets.</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        self.selected = value</div><div class='add'>+</div><div class='add'>+        # Remove previous event information.</div><div class='add'>+        if self.evlist:</div><div class='add'>+            self.evlist.disable()</div><div class='add'>+            self.evlist.close()</div><div class='add'>+            old_lines = self.query(CounterSparkline)</div><div class='add'>+            for line in old_lines:</div><div class='add'>+                line.remove()</div><div class='add'>+            old_counters = self.query(Counter)</div><div class='add'>+            for counter in old_counters:</div><div class='add'>+                counter.remove()</div><div class='add'>+</div><div class='add'>+        # Update event/metric text and description.</div><div class='add'>+        label_name.update(value.name())</div><div class='add'>+        event_description.update(value.description())</div><div class='add'>+</div><div class='add'>+        # Open the event.</div><div class='add'>+        try:</div><div class='add'>+            self.evlist = value.parse()</div><div class='add'>+            if self.evlist:</div><div class='add'>+                self.evlist.open()</div><div class='add'>+                self.evlist.enable()</div><div class='add'>+        except:</div><div class='add'>+            self.evlist = None</div><div class='add'>+</div><div class='add'>+        if not self.evlist:</div><div class='add'>+            self.push_screen(ErrorScreen(f"Failed to open {value.name()}"))</div><div class='add'>+            return</div><div class='add'>+</div><div class='add'>+        # Add spark lines for all the CPUs. Note, must be done after</div><div class='add'>+        # open so that the evlist CPUs have been computed by propagate</div><div class='add'>+        # maps.</div><div class='add'>+        line = CounterSparkline(cpu=-1)</div><div class='add'>+        lines.mount(line)</div><div class='add'>+        for cpu in self.evlist.all_cpus():</div><div class='add'>+            line = CounterSparkline(cpu)</div><div class='add'>+            lines.mount(line)</div><div class='add'>+        line = Counter(cpu=-1)</div><div class='add'>+        lines.mount(line)</div><div class='add'>+        for cpu in self.evlist.all_cpus():</div><div class='add'>+            line = Counter(cpu)</div><div class='add'>+            lines.mount(line)</div><div class='add'>+</div><div class='add'>+    def compose(self) -&gt; ComposeResult:</div><div class='add'>+        """Draws the app."""</div><div class='add'>+        def metric_event_tree() -&gt; Tree:</div><div class='add'>+            """Create tree of PMUs and metricgroups with events or metrics under."""</div><div class='add'>+            tree: Tree[TreeValue] = Tree("Root", id="root")</div><div class='add'>+            pmus = tree.root.add("PMUs")</div><div class='add'>+            for pmu in perf.pmus():</div><div class='add'>+                pmu_name = pmu.name().lower()</div><div class='add'>+                pmu_node = pmus.add(pmu_name)</div><div class='add'>+                try:</div><div class='add'>+                    for event in sorted(pmu.events(), key=lambda x: x["name"]):</div><div class='add'>+                        if "deprecated" in event:</div><div class='add'>+                            continue</div><div class='add'>+                        if "name" in event:</div><div class='add'>+                            e = event["name"].lower()</div><div class='add'>+                            if "alias" in event:</div><div class='add'>+                                pmu_node.add_leaf(f'{e} ({event["alias"]})',</div><div class='add'>+                                                  data=PmuEvent(pmu_name, e))</div><div class='add'>+                            else:</div><div class='add'>+                                pmu_node.add_leaf(e, data=PmuEvent(pmu_name, e))</div><div class='add'>+                except:</div><div class='add'>+                    # Reading events may fail with EPERM, ignore.</div><div class='add'>+                    pass</div><div class='add'>+            metrics = tree.root.add("Metrics")</div><div class='add'>+            groups = set()</div><div class='add'>+            for metric in perf.metrics():</div><div class='add'>+                groups.update(metric["MetricGroup"])</div><div class='add'>+</div><div class='add'>+            def add_metrics_to_tree(node: TreeNode[TreeValue], parent: str, pmu: str = None):</div><div class='add'>+                for metric in sorted(perf.metrics(), key=lambda x: x["MetricName"]):</div><div class='add'>+                    metric_pmu = metric.get('PMU')</div><div class='add'>+                    if pmu and metric_pmu and metric_pmu != pmu:</div><div class='add'>+                        continue</div><div class='add'>+                    if parent in metric["MetricGroup"]:</div><div class='add'>+                        name = metric["MetricName"]</div><div class='add'>+                        display_name = name</div><div class='add'>+                        if metric_pmu:</div><div class='add'>+                            display_name += f" ({metric_pmu})"</div><div class='add'>+                        node.add_leaf(display_name, data=Metric(name, metric_pmu))</div><div class='add'>+                        child_group_name = f'{name}_group'</div><div class='add'>+                        if child_group_name in groups:</div><div class='add'>+                            display_child_group_name = child_group_name</div><div class='add'>+                            if metric_pmu:</div><div class='add'>+                                display_child_group_name += f" ({metric_pmu})"</div><div class='add'>+                            add_metrics_to_tree(node.add(display_child_group_name),</div><div class='add'>+                                                child_group_name,</div><div class='add'>+                                                metric_pmu)</div><div class='add'>+</div><div class='add'>+            for group in sorted(groups):</div><div class='add'>+                if group.endswith('_group'):</div><div class='add'>+                    continue</div><div class='add'>+                add_metrics_to_tree(metrics.add(group), group)</div><div class='add'>+</div><div class='add'>+            tree.root.expand()</div><div class='add'>+            return tree</div><div class='add'>+</div><div class='add'>+        yield Header(id="header")</div><div class='add'>+        yield Horizontal(Vertical(metric_event_tree(), id="events"),</div><div class='add'>+                         Vertical(Label("event name", id="event_name"),</div><div class='add'>+                                  Static("description", markup=False, id="event_description"),</div><div class='add'>+                                  ))</div><div class='add'>+        yield Label(id="active_search")</div><div class='add'>+        yield VerticalScroll(id="lines")</div><div class='add'>+        yield Footer(id="footer")</div><div class='add'>+</div><div class='add'>+    @on(Tree.NodeSelected)</div><div class='add'>+    def on_tree_node_selected(self, event: Tree.NodeSelected[TreeValue]) -&gt; None:</div><div class='add'>+        """Called when a tree node is selected, selecting the event."""</div><div class='add'>+        if event.node.data:</div><div class='add'>+            self.set_selected(event.node.data)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    ap = argparse.ArgumentParser()</div><div class='add'>+    ap.add_argument('-I', '--interval', help="Counter update interval in seconds", default=0.1)</div><div class='add'>+    args = ap.parse_args()</div><div class='add'>+    app = IListApp(float(args.interval))</div><div class='add'>+    app.run()</div><div class='head'>diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/Build b/tools/perf/scripts/perl/Perf-Trace-Util/Build<br/>index 9b0e5a8b5070..01a1a0ed51ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/scripts/perl/Perf-Trace-Util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/scripts/perl/Perf-Trace-Util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/scripts/perl/Perf-Trace-Util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/scripts/perl/Perf-Trace-Util/Build</a></div><div class='hunk'>@@ -2,7 +2,7 @@ perf-util-y += Context.o</div><div class='ctx'> </div><div class='ctx'> CFLAGS_Context.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-bad-function-cast -Wno-declaration-after-statement -Wno-switch-enum</div><div class='ctx'> CFLAGS_Context.o += -Wno-unused-parameter -Wno-nested-externs -Wno-undef</div><div class='del'>-CFLAGS_Context.o += -Wno-switch-default -Wno-shadow</div><div class='add'>+CFLAGS_Context.o += -Wno-switch-default -Wno-shadow -Wno-thread-safety-analysis</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CC_NO_CLANG), 1)</div><div class='ctx'>   CFLAGS_Context.o += -Wno-unused-command-line-argument</div><div class='head'>diff --git a/tools/perf/tests/Build b/tools/perf/tests/Build<br/>index 3e8394be15ae..c2a67ce45941 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/Build</a></div><div class='hunk'>@@ -20,7 +20,6 @@ perf-test-y += hists_link.o</div><div class='ctx'> perf-test-y += hists_filter.o</div><div class='ctx'> perf-test-y += hists_output.o</div><div class='ctx'> perf-test-y += hists_cumulate.o</div><div class='del'>-perf-test-y += python-use.o</div><div class='ctx'> perf-test-y += bp_signal.o</div><div class='ctx'> perf-test-y += bp_signal_overflow.o</div><div class='ctx'> perf-test-y += bp_account.o</div><div class='hunk'>@@ -70,12 +69,12 @@ perf-test-y += util.o</div><div class='ctx'> perf-test-y += hwmon_pmu.o</div><div class='ctx'> perf-test-y += tool_pmu.o</div><div class='ctx'> perf-test-y += subcmd-help.o</div><div class='add'>+perf-test-y += kallsyms-split.o</div><div class='ctx'> </div><div class='ctx'> ifeq ($(SRCARCH),$(filter $(SRCARCH),x86 arm arm64 powerpc))</div><div class='ctx'> perf-test-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-CFLAGS_python-use.o   += -DPYTHONPATH="BUILD_STR($(OUTPUT)python)" -DPYTHON="BUILD_STR($(PYTHON_WORD))"</div><div class='ctx'> CFLAGS_dwarf-unwind.o += -fno-optimize-sibling-calls</div><div class='ctx'> </div><div class='ctx'> perf-test-y += workloads/</div><div class='head'>diff --git a/tools/perf/tests/builtin-test.c b/tools/perf/tests/builtin-test.c<br/>index 85142dfb3e01..bd6ffa8e4578 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/builtin-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/builtin-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/builtin-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/builtin-test.c</a></div><div class='hunk'>@@ -84,7 +84,6 @@ static struct test_suite *generic_tests[] = {</div><div class='ctx'> 	&amp;suite__syscall_openat_tp_fields,</div><div class='ctx'> #endif</div><div class='ctx'> 	&amp;suite__hists_link,</div><div class='del'>-	&amp;suite__python_use,</div><div class='ctx'> 	&amp;suite__bp_signal,</div><div class='ctx'> 	&amp;suite__bp_signal_overflow,</div><div class='ctx'> 	&amp;suite__bp_accounting,</div><div class='hunk'>@@ -127,7 +126,7 @@ static struct test_suite *generic_tests[] = {</div><div class='ctx'> 	&amp;suite__jit_write_elf,</div><div class='ctx'> 	&amp;suite__pfm,</div><div class='ctx'> 	&amp;suite__api_io,</div><div class='del'>-	&amp;suite__maps__merge_in,</div><div class='add'>+	&amp;suite__maps,</div><div class='ctx'> 	&amp;suite__demangle_java,</div><div class='ctx'> 	&amp;suite__demangle_ocaml,</div><div class='ctx'> 	&amp;suite__demangle_rust,</div><div class='hunk'>@@ -141,6 +140,7 @@ static struct test_suite *generic_tests[] = {</div><div class='ctx'> 	&amp;suite__symbols,</div><div class='ctx'> 	&amp;suite__util,</div><div class='ctx'> 	&amp;suite__subcmd_help,</div><div class='add'>+	&amp;suite__kallsyms_split,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -152,6 +152,7 @@ static struct test_workload *workloads[] = {</div><div class='ctx'> 	&amp;workload__brstack,</div><div class='ctx'> 	&amp;workload__datasym,</div><div class='ctx'> 	&amp;workload__landlock,</div><div class='add'>+	&amp;workload__traploop,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define workloads__for_each(workload) \</div><div class='head'>diff --git a/tools/perf/tests/code-reading.c b/tools/perf/tests/code-reading.c<br/>index 9c2091310191..5927d1ea20e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/code-reading.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/code-reading.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/code-reading.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/code-reading.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;linux/kconfig.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/rbtree.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='hunk'>@@ -39,11 +40,69 @@</div><div class='ctx'> #define BUFSZ	1024</div><div class='ctx'> #define READLEN	128</div><div class='ctx'> </div><div class='del'>-struct state {</div><div class='del'>-	u64 done[1024];</div><div class='del'>-	size_t done_cnt;</div><div class='add'>+struct tested_section {</div><div class='add'>+	struct rb_node rb_node;</div><div class='add'>+	u64 addr;</div><div class='add'>+	char *path;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool tested_code_insert_or_exists(const char *path, u64 addr,</div><div class='add'>+					 struct rb_root *tested_sections)</div><div class='add'>+{</div><div class='add'>+	struct rb_node **node = &amp;tested_sections-&gt;rb_node;</div><div class='add'>+	struct rb_node *parent = NULL;</div><div class='add'>+	struct tested_section *data;</div><div class='add'>+</div><div class='add'>+	while (*node) {</div><div class='add'>+		int cmp;</div><div class='add'>+</div><div class='add'>+		parent = *node;</div><div class='add'>+		data = rb_entry(*node, struct tested_section, rb_node);</div><div class='add'>+		cmp = strcmp(path, data-&gt;path);</div><div class='add'>+		if (!cmp) {</div><div class='add'>+			if (addr &lt; data-&gt;addr)</div><div class='add'>+				cmp = -1;</div><div class='add'>+			else if (addr &gt; data-&gt;addr)</div><div class='add'>+				cmp = 1;</div><div class='add'>+			else</div><div class='add'>+				return true; /* already tested */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cmp &lt; 0)</div><div class='add'>+			node = &amp;(*node)-&gt;rb_left;</div><div class='add'>+		else</div><div class='add'>+			node = &amp;(*node)-&gt;rb_right;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = zalloc(sizeof(*data));</div><div class='add'>+	if (!data)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	data-&gt;addr = addr;</div><div class='add'>+	data-&gt;path = strdup(path);</div><div class='add'>+	if (!data-&gt;path) {</div><div class='add'>+		free(data);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	rb_link_node(&amp;data-&gt;rb_node, parent, node);</div><div class='add'>+	rb_insert_color(&amp;data-&gt;rb_node, tested_sections);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tested_sections__free(struct rb_root *root)</div><div class='add'>+{</div><div class='add'>+	while (!RB_EMPTY_ROOT(root)) {</div><div class='add'>+		struct rb_node *node = rb_first(root);</div><div class='add'>+		struct tested_section *ts = rb_entry(node,</div><div class='add'>+						     struct tested_section,</div><div class='add'>+						     rb_node);</div><div class='add'>+</div><div class='add'>+		rb_erase(node, root);</div><div class='add'>+		free(ts-&gt;path);</div><div class='add'>+		free(ts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static size_t read_objdump_chunk(const char **line, unsigned char **buf,</div><div class='ctx'> 				 size_t *buf_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -316,13 +375,15 @@ static void dump_buf(unsigned char *buf, size_t len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int read_object_code(u64 addr, size_t len, u8 cpumode,</div><div class='del'>-			    struct thread *thread, struct state *state)</div><div class='add'>+			    struct thread *thread,</div><div class='add'>+			    struct rb_root *tested_sections)</div><div class='ctx'> {</div><div class='ctx'> 	struct addr_location al;</div><div class='ctx'> 	unsigned char buf1[BUFSZ] = {0};</div><div class='ctx'> 	unsigned char buf2[BUFSZ] = {0};</div><div class='ctx'> 	size_t ret_len;</div><div class='ctx'> 	u64 objdump_addr;</div><div class='add'>+	u64 skip_addr;</div><div class='ctx'> 	const char *objdump_name;</div><div class='ctx'> 	char decomp_name[KMOD_DECOMP_LEN];</div><div class='ctx'> 	bool decomp = false;</div><div class='hunk'>@@ -350,6 +411,18 @@ static int read_object_code(u64 addr, size_t len, u8 cpumode,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Don't retest the same addresses. objdump struggles with kcore - try</div><div class='add'>+	 * each map only once even if the address is different.</div><div class='add'>+	 */</div><div class='add'>+	skip_addr = dso__is_kcore(dso) ? map__start(al.map) : al.addr;</div><div class='add'>+	if (tested_code_insert_or_exists(dso__long_name(dso), skip_addr,</div><div class='add'>+					 tested_sections)) {</div><div class='add'>+		pr_debug("Already tested %s @ %#"PRIx64" - skipping\n",</div><div class='add'>+			 dso__long_name(dso), skip_addr);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pr_debug("On file address is: %#"PRIx64"\n", al.addr);</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; BUFSZ)</div><div class='hunk'>@@ -387,24 +460,6 @@ static int read_object_code(u64 addr, size_t len, u8 cpumode,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* objdump struggles with kcore - try each map only once */</div><div class='del'>-	if (dso__is_kcore(dso)) {</div><div class='del'>-		size_t d;</div><div class='del'>-</div><div class='del'>-		for (d = 0; d &lt; state-&gt;done_cnt; d++) {</div><div class='del'>-			if (state-&gt;done[d] == map__start(al.map)) {</div><div class='del'>-				pr_debug("kcore map tested already");</div><div class='del'>-				pr_debug(" - skipping\n");</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (state-&gt;done_cnt &gt;= ARRAY_SIZE(state-&gt;done)) {</div><div class='del'>-			pr_debug("Too many kcore maps - skipping\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		state-&gt;done[state-&gt;done_cnt++] = map__start(al.map);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	objdump_name = dso__long_name(dso);</div><div class='ctx'> 	if (dso__needs_decompress(dso)) {</div><div class='ctx'> 		if (dso__decompress_kmodule_path(dso, objdump_name,</div><div class='hunk'>@@ -471,9 +526,9 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_sample_event(struct machine *machine,</div><div class='del'>-				struct evlist *evlist,</div><div class='del'>-				union perf_event *event, struct state *state)</div><div class='add'>+static int process_sample_event(struct machine *machine, struct evlist *evlist,</div><div class='add'>+				union perf_event *event,</div><div class='add'>+				struct rb_root *tested_sections)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_sample sample;</div><div class='ctx'> 	struct thread *thread;</div><div class='hunk'>@@ -494,7 +549,8 @@ static int process_sample_event(struct machine *machine,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = read_object_code(sample.ip, READLEN, sample.cpumode, thread, state);</div><div class='add'>+	ret = read_object_code(sample.ip, READLEN, sample.cpumode, thread,</div><div class='add'>+			       tested_sections);</div><div class='ctx'> 	thread__put(thread);</div><div class='ctx'> out:</div><div class='ctx'> 	perf_sample__exit(&amp;sample);</div><div class='hunk'>@@ -502,10 +558,11 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int process_event(struct machine *machine, struct evlist *evlist,</div><div class='del'>-			 union perf_event *event, struct state *state)</div><div class='add'>+			 union perf_event *event, struct rb_root *tested_sections)</div><div class='ctx'> {</div><div class='ctx'> 	if (event-&gt;header.type == PERF_RECORD_SAMPLE)</div><div class='del'>-		return process_sample_event(machine, evlist, event, state);</div><div class='add'>+		return process_sample_event(machine, evlist, event,</div><div class='add'>+					    tested_sections);</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;header.type == PERF_RECORD_THROTTLE ||</div><div class='ctx'> 	    event-&gt;header.type == PERF_RECORD_UNTHROTTLE)</div><div class='hunk'>@@ -525,7 +582,7 @@ static int process_event(struct machine *machine, struct evlist *evlist,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int process_events(struct machine *machine, struct evlist *evlist,</div><div class='del'>-			  struct state *state)</div><div class='add'>+			  struct rb_root *tested_sections)</div><div class='ctx'> {</div><div class='ctx'> 	union perf_event *event;</div><div class='ctx'> 	struct mmap *md;</div><div class='hunk'>@@ -537,7 +594,7 @@ static int process_events(struct machine *machine, struct evlist *evlist,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		while ((event = perf_mmap__read_event(&amp;md-&gt;core)) != NULL) {</div><div class='del'>-			ret = process_event(machine, evlist, event, state);</div><div class='add'>+			ret = process_event(machine, evlist, event, tested_sections);</div><div class='ctx'> 			perf_mmap__consume(&amp;md-&gt;core);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				return ret;</div><div class='hunk'>@@ -637,9 +694,7 @@ static int do_test_code_reading(bool try_kcore)</div><div class='ctx'> 			.uses_mmap   = true,</div><div class='ctx'> 		},</div><div class='ctx'> 	};</div><div class='del'>-	struct state state = {</div><div class='del'>-		.done_cnt = 0,</div><div class='del'>-	};</div><div class='add'>+	struct rb_root tested_sections = RB_ROOT;</div><div class='ctx'> 	struct perf_thread_map *threads = NULL;</div><div class='ctx'> 	struct perf_cpu_map *cpus = NULL;</div><div class='ctx'> 	struct evlist *evlist = NULL;</div><div class='hunk'>@@ -649,7 +704,7 @@ static int do_test_code_reading(bool try_kcore)</div><div class='ctx'> 	struct map *map;</div><div class='ctx'> 	bool have_vmlinux, have_kcore;</div><div class='ctx'> 	struct dso *dso;</div><div class='del'>-	const char *events[] = { "cycles", "cycles:u", "cpu-clock", "cpu-clock:u", NULL };</div><div class='add'>+	const char *events[] = { "cpu-cycles", "cpu-cycles:u", "cpu-clock", "cpu-clock:u", NULL };</div><div class='ctx'> 	int evidx = 0;</div><div class='ctx'> 	struct perf_env host_env;</div><div class='ctx'> </div><div class='hunk'>@@ -773,7 +828,7 @@ static int do_test_code_reading(bool try_kcore)</div><div class='ctx'> </div><div class='ctx'> 	evlist__disable(evlist);</div><div class='ctx'> </div><div class='del'>-	ret = process_events(machine, evlist, &amp;state);</div><div class='add'>+	ret = process_events(machine, evlist, &amp;tested_sections);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out_put;</div><div class='ctx'> </div><div class='hunk'>@@ -793,6 +848,7 @@ out_err:</div><div class='ctx'> 	perf_thread_map__put(threads);</div><div class='ctx'> 	machine__delete(machine);</div><div class='ctx'> 	perf_env__exit(&amp;host_env);</div><div class='add'>+	tested_sections__free(&amp;tested_sections);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/tests/hwmon_pmu.c b/tools/perf/tests/hwmon_pmu.c<br/>index 151f02701c8c..4aa4aac94f09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/hwmon_pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/hwmon_pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/hwmon_pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/hwmon_pmu.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include "hwmon_pmu.h"</div><div class='ctx'> #include "parse-events.h"</div><div class='ctx'> #include "tests.h"</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='head'>diff --git a/tools/perf/tests/kallsyms-split.c b/tools/perf/tests/kallsyms-split.c<br/>new file mode 100644<br/>index 000000000000..bbbc66957e5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/kallsyms-split.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/kallsyms-split.c</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;sys/stat.h&gt;</div><div class='add'>+#include "util/dso.h"</div><div class='add'>+#include "util/map.h"</div><div class='add'>+#include "util/symbol.h"</div><div class='add'>+#include "util/debug.h"</div><div class='add'>+#include "util/machine.h"</div><div class='add'>+#include "tests.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This test is to check whether a bad symbol in a module won't split kallsyms maps.</div><div class='add'>+ * The main_symbol[1-3] should belong to the main [kernel.kallsyms] map even if the</div><div class='add'>+ * bad_symbol from the module is found in the middle.</div><div class='add'>+ */</div><div class='add'>+static char root_template[] = "/tmp/perf-test.XXXXXX";</div><div class='add'>+static char *root_dir;</div><div class='add'>+</div><div class='add'>+static const char proc_version[] = "Linux version X.Y.Z (just for perf test)\n";</div><div class='add'>+static const char proc_modules[] = "module 4096 1 - Live 0xffffffffcd000000\n";</div><div class='add'>+static const char proc_kallsyms[] =</div><div class='add'>+	"ffffffffab200000 T _stext\n"</div><div class='add'>+	"ffffffffab200010 T good_symbol\n"</div><div class='add'>+	"ffffffffab200020 t bad_symbol\n"</div><div class='add'>+	"ffffffffab200030 t main_symbol1\n"</div><div class='add'>+	"ffffffffab200040 t main_symbol2\n"</div><div class='add'>+	"ffffffffab200050 t main_symbol3\n"</div><div class='add'>+	"ffffffffab200060 T _etext\n"</div><div class='add'>+	"ffffffffcd000000 T start_module\t[module]\n"</div><div class='add'>+	"ffffffffab200020 u bad_symbol\t[module]\n"</div><div class='add'>+	"ffffffffcd000040 T end_module\t[module]\n";</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char *contents;</div><div class='add'>+	long len;</div><div class='add'>+} proc_files[] = {</div><div class='add'>+	{ "version", proc_version, sizeof(proc_version) - 1 },</div><div class='add'>+	{ "modules", proc_modules, sizeof(proc_modules) - 1 },</div><div class='add'>+	{ "kallsyms", proc_kallsyms, sizeof(proc_kallsyms) - 1 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void remove_proc_dir(int sig __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	char buf[128];</div><div class='add'>+</div><div class='add'>+	if (root_dir == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (unsigned i = 0; i &lt; ARRAY_SIZE(proc_files); i++) {</div><div class='add'>+		scnprintf(buf, sizeof(buf), "%s/proc/%s", root_dir, proc_files[i].name);</div><div class='add'>+		remove(buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scnprintf(buf, sizeof(buf), "%s/proc", root_dir);</div><div class='add'>+	rmdir(buf);</div><div class='add'>+</div><div class='add'>+	rmdir(root_dir);</div><div class='add'>+	root_dir = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int create_proc_dir(void)</div><div class='add'>+{</div><div class='add'>+	char buf[128];</div><div class='add'>+</div><div class='add'>+	root_dir = mkdtemp(root_template);</div><div class='add'>+	if (root_dir == NULL)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	scnprintf(buf, sizeof(buf), "%s/proc", root_dir);</div><div class='add'>+	if (mkdir(buf, 0700) &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	for (unsigned i = 0; i &lt; ARRAY_SIZE(proc_files); i++) {</div><div class='add'>+		int fd, len;</div><div class='add'>+</div><div class='add'>+		scnprintf(buf, sizeof(buf), "%s/proc/%s", root_dir, proc_files[i].name);</div><div class='add'>+		fd = open(buf, O_RDWR | O_CREAT, 0600);</div><div class='add'>+		if (fd &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		len = write(fd, proc_files[i].contents, proc_files[i].len);</div><div class='add'>+		close(fd);</div><div class='add'>+		if (len != proc_files[i].len)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	remove_proc_dir(0);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test__kallsyms_split(struct test_suite *test __maybe_unused,</div><div class='add'>+				int subtest __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct machine m;</div><div class='add'>+	struct map *map = NULL;</div><div class='add'>+	int ret = TEST_FAIL;</div><div class='add'>+</div><div class='add'>+	pr_debug("try to create fake root directory\n");</div><div class='add'>+	if (create_proc_dir() &lt; 0) {</div><div class='add'>+		pr_debug("SKIP: cannot create a fake root directory\n");</div><div class='add'>+		return TEST_SKIP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	signal(SIGINT, remove_proc_dir);</div><div class='add'>+	signal(SIGPIPE, remove_proc_dir);</div><div class='add'>+	signal(SIGSEGV, remove_proc_dir);</div><div class='add'>+	signal(SIGTERM, remove_proc_dir);</div><div class='add'>+</div><div class='add'>+	pr_debug("create kernel maps from the fake root directory\n");</div><div class='add'>+	machine__init(&amp;m, root_dir, HOST_KERNEL_ID);</div><div class='add'>+	if (machine__create_kernel_maps(&amp;m) &lt; 0) {</div><div class='add'>+		pr_debug("FAIL: failed to create kernel maps\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* force to use /proc/kallsyms */</div><div class='add'>+	symbol_conf.ignore_vmlinux = true;</div><div class='add'>+	symbol_conf.ignore_vmlinux_buildid = true;</div><div class='add'>+	symbol_conf.allow_aliases = true;</div><div class='add'>+</div><div class='add'>+	if (map__load(machine__kernel_map(&amp;m)) &lt; 0) {</div><div class='add'>+		pr_debug("FAIL: failed to load kallsyms\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("kernel map loaded - check symbol and map\n");</div><div class='add'>+	if (maps__nr_maps(machine__kernel_maps(&amp;m)) != 2) {</div><div class='add'>+		pr_debug("FAIL: it should have the kernel and a module, but has %u maps\n",</div><div class='add'>+			 maps__nr_maps(machine__kernel_maps(&amp;m)));</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (machine__find_kernel_symbol_by_name(&amp;m, "main_symbol3", &amp;map) == NULL) {</div><div class='add'>+		pr_debug("FAIL: failed to find a symbol\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!RC_CHK_EQUAL(map, machine__kernel_map(&amp;m))) {</div><div class='add'>+		pr_debug("FAIL: the symbol is not in the kernel map\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	ret = TEST_OK;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	remove_proc_dir(0);</div><div class='add'>+	machine__exit(&amp;m);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SUITE("split kallsyms", kallsyms_split);</div><div class='head'>diff --git a/tools/perf/tests/keep-tracking.c b/tools/perf/tests/keep-tracking.c<br/>index eafb49eb0b56..729cc9cc1cb7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/keep-tracking.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/keep-tracking.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/keep-tracking.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/keep-tracking.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ static int test__keep_tracking(struct test_suite *test __maybe_unused, int subte</div><div class='ctx'> 	perf_evlist__set_maps(&amp;evlist-&gt;core, cpus, threads);</div><div class='ctx'> </div><div class='ctx'> 	CHECK__(parse_event(evlist, "dummy:u"));</div><div class='del'>-	CHECK__(parse_event(evlist, "cycles:u"));</div><div class='add'>+	CHECK__(parse_event(evlist, "cpu-cycles:u"));</div><div class='ctx'> </div><div class='ctx'> 	evlist__config(evlist, &amp;opts, NULL);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/tests/make b/tools/perf/tests/make<br/>index c574a678c28a..6641701e4828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/make?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/make</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/make?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/make</a></div><div class='hunk'>@@ -73,9 +73,9 @@ make_extra_tests    := EXTRA_TESTS=1</div><div class='ctx'> make_jevents_all    := JEVENTS_ARCH=all</div><div class='ctx'> make_no_bpf_skel    := BUILD_BPF_SKEL=0</div><div class='ctx'> make_gen_vmlinux_h  := GEN_VMLINUX_H=1</div><div class='del'>-make_no_libperl     := NO_LIBPERL=1</div><div class='add'>+make_libperl        := LIBPERL=1</div><div class='ctx'> make_no_libpython   := NO_LIBPYTHON=1</div><div class='del'>-make_no_scripts     := NO_LIBPYTHON=1 NO_LIBPERL=1</div><div class='add'>+make_no_scripts     := NO_LIBPYTHON=1</div><div class='ctx'> make_no_slang       := NO_SLANG=1</div><div class='ctx'> make_no_gtk2        := NO_GTK2=1</div><div class='ctx'> make_no_ui          := NO_SLANG=1 NO_GTK2=1</div><div class='hunk'>@@ -88,7 +88,6 @@ make_no_backtrace   := NO_BACKTRACE=1</div><div class='ctx'> make_no_libcapstone := NO_CAPSTONE=1</div><div class='ctx'> make_no_libnuma     := NO_LIBNUMA=1</div><div class='ctx'> make_no_libbionic   := NO_LIBBIONIC=1</div><div class='del'>-make_no_auxtrace    := NO_AUXTRACE=1</div><div class='ctx'> make_no_libbpf	    := NO_LIBBPF=1</div><div class='ctx'> make_libbpf_dynamic := LIBBPF_DYNAMIC=1</div><div class='ctx'> make_no_libbpf_DEBUG := NO_LIBBPF=1 DEBUG=1</div><div class='hunk'>@@ -118,10 +117,10 @@ make_install_prefix_slash := install prefix=/tmp/krava/</div><div class='ctx'> make_static         := LDFLAGS=-static NO_PERF_READ_VDSO32=1 NO_PERF_READ_VDSOX32=1 NO_JVMTI=1 NO_LIBTRACEEVENT=1 NO_LIBELF=1</div><div class='ctx'> </div><div class='ctx'> # all the NO_* variable combined</div><div class='del'>-make_minimal        := NO_LIBPERL=1 NO_LIBPYTHON=1 NO_GTK2=1</div><div class='add'>+make_minimal        := NO_LIBPYTHON=1 NO_GTK2=1</div><div class='ctx'> make_minimal        += NO_DEMANGLE=1 NO_LIBELF=1 NO_BACKTRACE=1</div><div class='ctx'> make_minimal        += NO_LIBNUMA=1 NO_LIBBIONIC=1 NO_LIBDW=1</div><div class='del'>-make_minimal        += NO_LIBDW_DWARF_UNWIND=1 NO_AUXTRACE=1 NO_LIBBPF=1</div><div class='add'>+make_minimal        += NO_LIBDW_DWARF_UNWIND=1 NO_LIBBPF=1</div><div class='ctx'> make_minimal        += NO_SDT=1 NO_JVMTI=1 NO_LIBZSTD=1</div><div class='ctx'> make_minimal        += NO_LIBCAP=1 NO_CAPSTONE=1</div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +142,7 @@ run += make_extra_tests</div><div class='ctx'> run += make_jevents_all</div><div class='ctx'> run += make_no_bpf_skel</div><div class='ctx'> run += make_gen_vmlinux_h</div><div class='del'>-run += make_no_libperl</div><div class='add'>+run += make_libperl</div><div class='ctx'> run += make_no_libpython</div><div class='ctx'> run += make_no_scripts</div><div class='ctx'> run += make_no_slang</div><div class='hunk'>@@ -158,7 +157,6 @@ run += make_no_backtrace</div><div class='ctx'> run += make_no_libcapstone</div><div class='ctx'> run += make_no_libnuma</div><div class='ctx'> run += make_no_libbionic</div><div class='del'>-run += make_no_auxtrace</div><div class='ctx'> run += make_no_libbpf</div><div class='ctx'> run += make_no_libbpf_DEBUG</div><div class='ctx'> run += make_no_libllvm</div><div class='head'>diff --git a/tools/perf/tests/maps.c b/tools/perf/tests/maps.c<br/>index 4f1f9385ea9c..2c05d62f40dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/maps.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/maps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/maps.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/maps.c</a></div><div class='hunk'>@@ -162,4 +162,84 @@ static int test__maps__merge_in(struct test_suite *t __maybe_unused, int subtest</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DEFINE_SUITE("maps__merge_in", maps__merge_in);</div><div class='add'>+static int test__maps__fixup_overlap_and_insert(struct test_suite *t __maybe_unused,</div><div class='add'>+						int subtest __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct map_def initial_maps[] = {</div><div class='add'>+		{ "target_map", 1000, 2000 },</div><div class='add'>+		{ "next_map",   3000, 4000 },</div><div class='add'>+	};</div><div class='add'>+	struct map_def insert_split = { "split_map", 1400, 1600 };</div><div class='add'>+	struct map_def expected_after_split[] = {</div><div class='add'>+		{ "target_map", 1000, 1400 },</div><div class='add'>+		{ "split_map",  1400, 1600 },</div><div class='add'>+		{ "target_map", 1600, 2000 },</div><div class='add'>+		{ "next_map",   3000, 4000 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct map_def insert_eclipse = { "eclipse_map", 2500, 4500 };</div><div class='add'>+	struct map_def expected_final[] = {</div><div class='add'>+		{ "target_map",  1000, 1400 },</div><div class='add'>+		{ "split_map",   1400, 1600 },</div><div class='add'>+		{ "target_map",  1600, 2000 },</div><div class='add'>+		{ "eclipse_map", 2500, 4500 },</div><div class='add'>+		/* "next_map" (3000-4000) is removed */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct map *map_split, *map_eclipse;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	struct maps *maps = maps__new(NULL);</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_VAL("failed to create maps", maps);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(initial_maps); i++) {</div><div class='add'>+		struct map *map = dso__new_map(initial_maps[i].name);</div><div class='add'>+</div><div class='add'>+		TEST_ASSERT_VAL("failed to create map", map);</div><div class='add'>+		map__set_start(map, initial_maps[i].start);</div><div class='add'>+		map__set_end(map, initial_maps[i].end);</div><div class='add'>+		TEST_ASSERT_VAL("failed to insert map", maps__insert(maps, map) == 0);</div><div class='add'>+		map__put(map);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	// Check splitting.</div><div class='add'>+	map_split = dso__new_map(insert_split.name);</div><div class='add'>+	TEST_ASSERT_VAL("failed to create split map", map_split);</div><div class='add'>+	map__set_start(map_split, insert_split.start);</div><div class='add'>+	map__set_end(map_split, insert_split.end);</div><div class='add'>+</div><div class='add'>+	ret = maps__fixup_overlap_and_insert(maps, map_split);</div><div class='add'>+	TEST_ASSERT_VAL("failed to fixup and insert split map", !ret);</div><div class='add'>+</div><div class='add'>+	map__zput(map_split);</div><div class='add'>+	ret = check_maps(expected_after_split, ARRAY_SIZE(expected_after_split), maps);</div><div class='add'>+	TEST_ASSERT_VAL("split check failed", !ret);</div><div class='add'>+</div><div class='add'>+	// Check cover 1 map with another.</div><div class='add'>+	map_eclipse = dso__new_map(insert_eclipse.name);</div><div class='add'>+	TEST_ASSERT_VAL("failed to create eclipse map", map_eclipse);</div><div class='add'>+	map__set_start(map_eclipse, insert_eclipse.start);</div><div class='add'>+	map__set_end(map_eclipse, insert_eclipse.end);</div><div class='add'>+</div><div class='add'>+	ret = maps__fixup_overlap_and_insert(maps, map_eclipse);</div><div class='add'>+	TEST_ASSERT_VAL("failed to fixup and insert eclipse map", !ret);</div><div class='add'>+</div><div class='add'>+	map__zput(map_eclipse);</div><div class='add'>+	ret = check_maps(expected_final, ARRAY_SIZE(expected_final), maps);</div><div class='add'>+	TEST_ASSERT_VAL("eclipse check failed", !ret);</div><div class='add'>+</div><div class='add'>+	maps__zput(maps);</div><div class='add'>+	return TEST_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct test_case tests__maps[] = {</div><div class='add'>+	TEST_CASE("Test merge_in interface", maps__merge_in),</div><div class='add'>+	TEST_CASE("Test fix up overlap interface", maps__fixup_overlap_and_insert),</div><div class='add'>+	{	.name = NULL, }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct test_suite suite__maps = {</div><div class='add'>+	.desc = "Maps - per process mmaps abstraction",</div><div class='add'>+	.test_cases = tests__maps,</div><div class='add'>+};</div><div class='head'>diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c<br/>index 3c89d3001887..3313c236104e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/mmap-basic.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/mmap-basic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/mmap-basic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/mmap-basic.c</a></div><div class='hunk'>@@ -322,7 +322,7 @@ static int test_stat_user_read(u64 event, enum user_read_state enabled)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		perf_evsel__read(evsel, 0, 0, &amp;counts);</div><div class='del'>-		if (counts.val == 0) {</div><div class='add'>+		if (rdpmc_supported &amp;&amp; counts.val == 0) {</div><div class='ctx'> 			pr_err("User space counter reading for PMU %s [Failed read]\n", pmu-&gt;name);</div><div class='ctx'> 			ret = TEST_FAIL;</div><div class='ctx'> 			goto cleanup;</div><div class='head'>diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c<br/>index bb8004397650..128d21dc389f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/parse-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/parse-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/parse-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/parse-events.c</a></div><div class='hunk'>@@ -1,12 +1,14 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include "parse-events.h"</div><div class='ctx'> #include "evsel.h"</div><div class='add'>+#include "evsel_fprintf.h"</div><div class='ctx'> #include "evlist.h"</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='ctx'> #include "tests.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "pmu.h"</div><div class='ctx'> #include "pmus.h"</div><div class='add'>+#include "strbuf.h"</div><div class='ctx'> #include &lt;dirent.h&gt;</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include "fncache.h"</div><div class='hunk'>@@ -20,38 +22,61 @@</div><div class='ctx'> #define PERF_TP_SAMPLE_TYPE (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME | \</div><div class='ctx'> 			     PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD)</div><div class='ctx'> </div><div class='del'>-static int num_core_entries(void)</div><div class='add'>+static bool check_evlist(const char *test, int line, bool cond, struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * If the kernel supports extended type, expect events to be</div><div class='del'>-	 * opened once for each core PMU type. Otherwise fall back to the legacy</div><div class='del'>-	 * behavior of opening only one event even though there are multiple</div><div class='del'>-	 * PMUs</div><div class='del'>-	 */</div><div class='del'>-	if (perf_pmus__supports_extended_type())</div><div class='del'>-		return perf_pmus__num_core_pmus();</div><div class='add'>+	struct strbuf sb = STRBUF_INIT;</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	if (cond)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	evlist__format_evsels(evlist, &amp;sb, 2048);</div><div class='add'>+	pr_debug("FAILED %s:%d: %s\nFor evlist: %s\n", __FILE__, line, test, sb.buf);</div><div class='add'>+	strbuf_release(&amp;sb);</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='add'>+#define TEST_ASSERT_EVLIST(test, cond, evlist) \</div><div class='add'>+	if (!check_evlist(test, __LINE__, cond, evlist)) \</div><div class='add'>+		return TEST_FAIL</div><div class='ctx'> </div><div class='del'>-static bool test_config(const struct evsel *evsel, __u64 expected_config)</div><div class='add'>+static bool check_evsel(const char *test, int line, bool cond, struct evsel *evsel)</div><div class='ctx'> {</div><div class='del'>-	__u32 type = evsel-&gt;core.attr.type;</div><div class='del'>-	__u64 config = evsel-&gt;core.attr.config;</div><div class='add'>+	struct perf_attr_details details = { .verbose = true, };</div><div class='ctx'> </div><div class='del'>-	if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_HW_CACHE) {</div><div class='del'>-		/*</div><div class='del'>-		 * HARDWARE and HW_CACHE events encode the PMU's extended type</div><div class='del'>-		 * in the top 32-bits. Mask in order to ignore.</div><div class='del'>-		 */</div><div class='del'>-		config &amp;= PERF_HW_EVENT_MASK;</div><div class='add'>+	if (cond)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	pr_debug("FAILED %s:%d: %s\nFor evsel: ", __FILE__, line, test);</div><div class='add'>+	evsel__fprintf(evsel, &amp;details, debug_file());</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#define TEST_ASSERT_EVSEL(test, cond, evsel) \</div><div class='add'>+	if (!check_evsel(test, __LINE__, cond, evsel)) \</div><div class='add'>+		return TEST_FAIL</div><div class='add'>+</div><div class='add'>+static int num_core_entries(struct evlist *evlist)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Returns number of core PMUs if the evlist has &gt;1 core PMU, otherwise</div><div class='add'>+	 * returns 1.  The number of core PMUs is needed as wild carding can</div><div class='add'>+	 * open an event for each core PMU. If the events were opened with a</div><div class='add'>+	 * specified PMU then wild carding won't happen.</div><div class='add'>+	 */</div><div class='add'>+	struct perf_pmu *core_pmu = NULL;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		if (!evsel-&gt;pmu-&gt;is_core)</div><div class='add'>+			continue;</div><div class='add'>+		if (core_pmu != evsel-&gt;pmu &amp;&amp; core_pmu != NULL)</div><div class='add'>+			return perf_pmus__num_core_pmus();</div><div class='add'>+		core_pmu = evsel-&gt;pmu;</div><div class='ctx'> 	}</div><div class='del'>-	return config == expected_config;</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool test_perf_config(const struct perf_evsel *evsel, __u64 expected_config)</div><div class='add'>+static bool test_hw_config(const struct evsel *evsel, __u64 expected_config)</div><div class='ctx'> {</div><div class='del'>-	return (evsel-&gt;attr.config &amp; PERF_HW_EVENT_MASK) == expected_config;</div><div class='add'>+	return (evsel-&gt;core.attr.config &amp; PERF_HW_EVENT_MASK) == expected_config;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(__s390x__)</div><div class='hunk'>@@ -84,12 +109,12 @@ static int test__checkevent_tracepoint(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups", 0 == evlist__nr_groups(evlist));</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong sample_type",</div><div class='del'>-		PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong sample_period", 1 == evsel-&gt;core.attr.sample_period);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups", 0 == evlist__nr_groups(evlist), evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong sample_type",</div><div class='add'>+			  PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong sample_period", 1 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -97,34 +122,38 @@ static int test__checkevent_tracepoint_multi(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", evlist-&gt;core.nr_entries &gt; 1);</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups", 0 == evlist__nr_groups(evlist));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", evlist-&gt;core.nr_entries &gt; 1, evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups", 0 == evlist__nr_groups(evlist), evlist);</div><div class='ctx'> </div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong type",</div><div class='del'>-			PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_type",</div><div class='del'>-			PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_period",</div><div class='del'>-			1 == evsel-&gt;core.attr.sample_period);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong type",</div><div class='add'>+				  PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type,</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_type",</div><div class='add'>+				  PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type,</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_period",</div><div class='add'>+				  1 == evsel-&gt;core.attr.sample_period,</div><div class='add'>+				  evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_raw(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> 	bool raw_type_match = false;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 0 != evlist-&gt;core.nr_entries);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 0 != evlist-&gt;core.nr_entries, evlist);</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_evsel(&amp;evlist-&gt;core, evsel) {</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='ctx'> 		struct perf_pmu *pmu __maybe_unused = NULL;</div><div class='ctx'> 		bool type_matched = false;</div><div class='ctx'> </div><div class='del'>-		TEST_ASSERT_VAL("wrong config", test_perf_config(evsel, 0x1a));</div><div class='del'>-		TEST_ASSERT_VAL("event not parsed as raw type",</div><div class='del'>-				evsel-&gt;attr.type == PERF_TYPE_RAW);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config", test_hw_config(evsel, 0x1a), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("event not parsed as raw type",</div><div class='add'>+				  evsel-&gt;core.attr.type == PERF_TYPE_RAW,</div><div class='add'>+				  evsel);</div><div class='ctx'> #if defined(__aarch64__)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Arm doesn't have a real raw type PMU in sysfs, so raw events</div><div class='hunk'>@@ -135,15 +164,15 @@ static int test__checkevent_raw(struct evlist *evlist)</div><div class='ctx'> 		type_matched = raw_type_match = true;</div><div class='ctx'> #else</div><div class='ctx'> 		while ((pmu = perf_pmus__scan(pmu)) != NULL) {</div><div class='del'>-			if (pmu-&gt;type == evsel-&gt;attr.type) {</div><div class='del'>-				TEST_ASSERT_VAL("PMU type expected once", !type_matched);</div><div class='add'>+			if (pmu-&gt;type == evsel-&gt;core.attr.type) {</div><div class='add'>+				TEST_ASSERT_EVSEL("PMU type expected once", !type_matched, evsel);</div><div class='ctx'> 				type_matched = true;</div><div class='ctx'> 				if (pmu-&gt;type == PERF_TYPE_RAW)</div><div class='ctx'> 					raw_type_match = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='del'>-		TEST_ASSERT_VAL("No PMU found for type", type_matched);</div><div class='add'>+		TEST_ASSERT_EVSEL("No PMU found for type", type_matched, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	TEST_ASSERT_VAL("Raw PMU not matched", raw_type_match);</div><div class='ctx'> 	return TEST_OK;</div><div class='hunk'>@@ -153,62 +182,44 @@ static int test__checkevent_numeric(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", 1 == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 1));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", 1 == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 1 == evsel-&gt;core.attr.config, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int assert_hw(struct perf_evsel *evsel, enum perf_hw_id id, const char *name)</div><div class='del'>-{</div><div class='del'>-	struct perf_pmu *pmu;</div><div class='del'>-</div><div class='del'>-	if (evsel-&gt;attr.type == PERF_TYPE_HARDWARE) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong config", test_perf_config(evsel, id));</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	pmu = perf_pmus__find_by_type(evsel-&gt;attr.type);</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("unexpected PMU type", pmu);</div><div class='del'>-	TEST_ASSERT_VAL("PMU missing event", perf_pmu__have_event(pmu, name));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int test__checkevent_symbolic_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 0 != evlist-&gt;core.nr_entries);</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_evsel(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		int ret = assert_hw(evsel, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 0 != evlist-&gt;core.nr_entries, evlist);</div><div class='ctx'> </div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_symbolic_name_config(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 0 != evlist-&gt;core.nr_entries);</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_evsel(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		int ret = assert_hw(evsel, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 0 != evlist-&gt;core.nr_entries, evlist);</div><div class='ctx'> </div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The period value gets configured within evlist__config,</div><div class='ctx'> 		 * while this test executes only parse events method.</div><div class='ctx'> 		 */</div><div class='del'>-		TEST_ASSERT_VAL("wrong period", 0 == evsel-&gt;attr.sample_period);</div><div class='del'>-		TEST_ASSERT_VAL("wrong config1", 0 == evsel-&gt;attr.config1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong config2", 1 == evsel-&gt;attr.config2);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong period", 0 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config1", 0 == evsel-&gt;core.attr.config1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config2", 1 == evsel-&gt;core.attr.config2, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -217,21 +228,21 @@ static int test__checkevent_symbolic_alias(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_SOFTWARE == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, PERF_COUNT_SW_PAGE_FAULTS));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type/config", evsel__match(evsel, SOFTWARE, SW_PAGE_FAULTS),</div><div class='add'>+			  evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_genhw(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 0 != evlist-&gt;core.nr_entries);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 0 != evlist-&gt;core.nr_entries, evlist);</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong type", PERF_TYPE_HW_CACHE == evsel-&gt;attr.type);</div><div class='del'>-		TEST_ASSERT_VAL("wrong config", test_perf_config(evsel, 1 &lt;&lt; 16));</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_HW_CACHE == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config", test_hw_config(evsel, 1 &lt;&lt; 16), evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -240,13 +251,13 @@ static int test__checkevent_breakpoint(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type", (HW_BREAKPOINT_R | HW_BREAKPOINT_W) ==</div><div class='del'>-					 evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len", HW_BREAKPOINT_LEN_4 ==</div><div class='del'>-					evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type",</div><div class='add'>+			  (HW_BREAKPOINT_R | HW_BREAKPOINT_W) == evsel-&gt;core.attr.bp_type,</div><div class='add'>+			  evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -254,12 +265,12 @@ static int test__checkevent_breakpoint_x(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type",</div><div class='del'>-			HW_BREAKPOINT_X == evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len", default_breakpoint_len() == evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type", HW_BREAKPOINT_X == evsel-&gt;core.attr.bp_type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", default_breakpoint_len() == evsel-&gt;core.attr.bp_len,</div><div class='add'>+			  evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -267,14 +278,11 @@ static int test__checkevent_breakpoint_r(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type",</div><div class='del'>-			PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type",</div><div class='del'>-			HW_BREAKPOINT_R == evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len",</div><div class='del'>-			HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type", HW_BREAKPOINT_R == evsel-&gt;core.attr.bp_type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -282,14 +290,11 @@ static int test__checkevent_breakpoint_w(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type",</div><div class='del'>-			PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type",</div><div class='del'>-			HW_BREAKPOINT_W == evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len",</div><div class='del'>-			HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type", HW_BREAKPOINT_W == evsel-&gt;core.attr.bp_type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -297,14 +302,13 @@ static int test__checkevent_breakpoint_rw(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type",</div><div class='del'>-			PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type",</div><div class='del'>-		(HW_BREAKPOINT_R|HW_BREAKPOINT_W) == evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len",</div><div class='del'>-			HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type",</div><div class='add'>+			  (HW_BREAKPOINT_R|HW_BREAKPOINT_W) == evsel-&gt;core.attr.bp_type,</div><div class='add'>+			  evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_4 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -312,10 +316,11 @@ static int test__checkevent_tracepoint_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_tracepoint(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -323,15 +328,15 @@ static int test__checkevent_tracepoint_modifier(struct evlist *evlist)</div><div class='ctx'> static int</div><div class='ctx'> test__checkevent_tracepoint_multi_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", evlist-&gt;core.nr_entries &gt; 1);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", evlist-&gt;core.nr_entries &gt; 1, evlist);</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;attr.precise_ip);</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_tracepoint_multi(evlist);</div><div class='hunk'>@@ -339,64 +344,77 @@ test__checkevent_tracepoint_multi_modifier(struct evlist *evlist)</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_raw_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_raw(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_numeric_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_numeric(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_symbolic_name_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == num_core_entries());</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;attr.precise_ip);</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_exclude_host_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;attr.exclude_host);</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_exclude_guest_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", evsel-&gt;attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;attr.exclude_host);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -405,23 +423,28 @@ static int test__checkevent_symbolic_alias_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_symbolic_alias(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__checkevent_genhw_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct perf_evsel *evsel;</div><div class='add'>+	struct evsel *evsel;</div><div class='ctx'> </div><div class='del'>-	perf_evlist__for_each_entry(&amp;evlist-&gt;core, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_genhw(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -430,13 +453,17 @@ static int test__checkevent_exclude_idle_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude idle", evsel-&gt;core.attr.exclude_idle);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude idle", evsel-&gt;core.attr.exclude_idle, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -445,13 +472,17 @@ static int test__checkevent_exclude_idle_modifier_1(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude idle", evsel-&gt;core.attr.exclude_idle);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude idle", evsel-&gt;core.attr.exclude_idle, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -461,11 +492,11 @@ static int test__checkevent_breakpoint_modifier(struct evlist *evlist)</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "mem:0:u"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "mem:0:u"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -474,11 +505,11 @@ static int test__checkevent_breakpoint_x_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "mem:0:x:k"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "mem:0:x:k"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_x(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -487,11 +518,11 @@ static int test__checkevent_breakpoint_r_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "mem:0:r:hp"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "mem:0:r:hp"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_r(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -500,11 +531,11 @@ static int test__checkevent_breakpoint_w_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "mem:0:w:up"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "mem:0:w:up"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_w(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -513,11 +544,11 @@ static int test__checkevent_breakpoint_rw_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "mem:0:rw:kp"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "mem:0:rw:kp"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_rw(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -526,11 +557,11 @@ static int test__checkevent_breakpoint_modifier_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -539,11 +570,11 @@ static int test__checkevent_breakpoint_x_modifier_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_x(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -552,11 +583,11 @@ static int test__checkevent_breakpoint_r_modifier_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_r(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -565,11 +596,11 @@ static int test__checkevent_breakpoint_w_modifier_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_w(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -578,11 +609,11 @@ static int test__checkevent_breakpoint_rw_modifier_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_rw(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -591,15 +622,15 @@ static int test__checkevent_breakpoint_2_events(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist-&gt;core.nr_entries);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong number of entries", 2 == evlist-&gt;core.nr_entries, evsel);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint1"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint1"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	evsel = evsel__next(evsel);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "breakpoint2"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "breakpoint2"), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -608,18 +639,20 @@ static int test__checkevent_pmu(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config",    test_config(evsel, 10));</div><div class='del'>-	TEST_ASSERT_VAL("wrong config1",    1 == evsel-&gt;core.attr.config1);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config2",    3 == evsel-&gt;core.attr.config2);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config3",    0 == evsel-&gt;core.attr.config3);</div><div class='add'>+	struct perf_pmu *core_pmu = perf_pmus__find_core_pmu();</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", core_pmu-&gt;type == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config",    test_hw_config(evsel, 10), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config1",    1 == evsel-&gt;core.attr.config1, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config2",    3 == evsel-&gt;core.attr.config2, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config3",    0 == evsel-&gt;core.attr.config3, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config4",    0 == evsel-&gt;core.attr.config4, evsel);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The period value gets configured within evlist__config,</div><div class='ctx'> 	 * while this test executes only parse events method.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong period",     0 == evsel-&gt;core.attr.sample_period);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong period",     0 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -628,40 +661,41 @@ static int test__checkevent_list(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 3 &lt;= evlist-&gt;core.nr_entries);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong number of entries", 3 &lt;= evlist-&gt;core.nr_entries, evsel);</div><div class='ctx'> </div><div class='ctx'> 	/* r1 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_TRACEPOINT != evsel-&gt;core.attr.type);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_TRACEPOINT != evsel-&gt;core.attr.type, evsel);</div><div class='ctx'> 	while (evsel-&gt;core.attr.type != PERF_TYPE_TRACEPOINT) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong config", test_config(evsel, 1));</div><div class='del'>-		TEST_ASSERT_VAL("wrong config1", 0 == evsel-&gt;core.attr.config1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong config2", 0 == evsel-&gt;core.attr.config2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong config3", 0 == evsel-&gt;core.attr.config3);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config", 1 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config1", 0 == evsel-&gt;core.attr.config1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config2", 0 == evsel-&gt;core.attr.config2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config3", 0 == evsel-&gt;core.attr.config3, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong config4", 0 == evsel-&gt;core.attr.config4, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* syscalls:sys_enter_openat:k */</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong sample_type",</div><div class='del'>-		PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong sample_period", 1 == evsel-&gt;core.attr.sample_period);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_TRACEPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong sample_type", PERF_TP_SAMPLE_TYPE == evsel-&gt;core.attr.sample_type,</div><div class='add'>+			  evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong sample_period", 1 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	/* 1:1:hp */</div><div class='ctx'> 	evsel = evsel__next(evsel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", 1 == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 1));</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", 1 == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 1 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -669,19 +703,22 @@ static int test__checkevent_list(struct evlist *evlist)</div><div class='ctx'> static int test__checkevent_pmu_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='add'>+	struct perf_pmu *core_pmu = perf_pmus__find_core_pmu();</div><div class='add'>+	char buf[256];</div><div class='ctx'> </div><div class='del'>-	/* cpu/config=1,name=krava/u */</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 1));</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "krava"));</div><div class='add'>+	/* default_core/config=1,name=krava/u */</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 2 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", core_pmu-&gt;type == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 1 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, "krava"), evsel);</div><div class='ctx'> </div><div class='del'>-	/* cpu/config=2/u" */</div><div class='add'>+	/* default_core/config=2/u" */</div><div class='ctx'> 	evsel = evsel__next(evsel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 2));</div><div class='del'>-	TEST_ASSERT_VAL("wrong name", evsel__name_is(evsel, "cpu/config=2/u"));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong number of entries", 2 == evlist-&gt;core.nr_entries, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", core_pmu-&gt;type == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 2 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	snprintf(buf, sizeof(buf), "%s/config=2/u", core_pmu-&gt;name);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name", evsel__name_is(evsel, buf), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -689,30 +726,31 @@ static int test__checkevent_pmu_name(struct evlist *evlist)</div><div class='ctx'> static int test__checkevent_pmu_partial_time_callgraph(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='add'>+	struct perf_pmu *core_pmu = perf_pmus__find_core_pmu();</div><div class='ctx'> </div><div class='del'>-	/* cpu/config=1,call-graph=fp,time,period=100000/ */</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 1));</div><div class='add'>+	/* default_core/config=1,call-graph=fp,time,period=100000/ */</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 2 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", core_pmu-&gt;type == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 1 == evsel-&gt;core.attr.config, evsel);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The period, time and callgraph value gets configured within evlist__config,</div><div class='ctx'> 	 * while this test executes only parse events method.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong period",     0 == evsel-&gt;core.attr.sample_period);</div><div class='del'>-	TEST_ASSERT_VAL("wrong callgraph",  !evsel__has_callchain(evsel));</div><div class='del'>-	TEST_ASSERT_VAL("wrong time",  !(PERF_SAMPLE_TIME &amp; evsel-&gt;core.attr.sample_type));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong period",     0 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong callgraph",  !evsel__has_callchain(evsel), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong time",  !(PERF_SAMPLE_TIME &amp; evsel-&gt;core.attr.sample_type), evsel);</div><div class='ctx'> </div><div class='del'>-	/* cpu/config=2,call-graph=no,time=0,period=2000/ */</div><div class='add'>+	/* default_core/config=2,call-graph=no,time=0,period=2000/ */</div><div class='ctx'> 	evsel = evsel__next(evsel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 2));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", core_pmu-&gt;type == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 2 == evsel-&gt;core.attr.config, evsel);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The period, time and callgraph value gets configured within evlist__config,</div><div class='ctx'> 	 * while this test executes only parse events method.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong period",     0 == evsel-&gt;core.attr.sample_period);</div><div class='del'>-	TEST_ASSERT_VAL("wrong callgraph",  !evsel__has_callchain(evsel));</div><div class='del'>-	TEST_ASSERT_VAL("wrong time",  !(PERF_SAMPLE_TIME &amp; evsel-&gt;core.attr.sample_type));</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong period",     0 == evsel-&gt;core.attr.sample_period, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong callgraph",  !evsel__has_callchain(evsel), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong time",  !(PERF_SAMPLE_TIME &amp; evsel-&gt;core.attr.sample_type), evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -720,18 +758,22 @@ static int test__checkevent_pmu_partial_time_callgraph(struct evlist *evlist)</div><div class='ctx'> static int test__checkevent_pmu_events(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel;</div><div class='add'>+	struct perf_pmu *core_pmu = perf_pmus__find_core_pmu();</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 &lt;= evlist-&gt;core.nr_entries);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 &lt;= evlist-&gt;core.nr_entries, evlist);</div><div class='ctx'> </div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='del'>-		TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel-&gt;core.attr.type ||</div><div class='del'>-					      strcmp(evsel-&gt;pmu-&gt;name, "cpu"));</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong pinned", !evsel-&gt;core.attr.pinned);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclusive", !evsel-&gt;core.attr.exclusive);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong type",</div><div class='add'>+				  core_pmu-&gt;type == evsel-&gt;core.attr.type ||</div><div class='add'>+				  !strncmp(evsel__name(evsel), evsel-&gt;pmu-&gt;name,</div><div class='add'>+					  strlen(evsel-&gt;pmu-&gt;name)),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong pinned", !evsel-&gt;core.attr.pinned, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclusive", !evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -745,30 +787,26 @@ static int test__checkevent_pmu_events_mix(struct evlist *evlist)</div><div class='ctx'> 	 * The wild card event will be opened at least once, but it may be</div><div class='ctx'> 	 * opened on each core PMU.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", evlist-&gt;core.nr_entries &gt;= 2);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", evlist-&gt;core.nr_entries &gt;= 2, evlist);</div><div class='ctx'> 	for (int i = 0; i &lt; evlist-&gt;core.nr_entries - 1; i++) {</div><div class='ctx'> 		evsel = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='ctx'> 		/* pmu-event:u */</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user",</div><div class='del'>-				!evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel",</div><div class='del'>-				evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong pinned", !evsel-&gt;core.attr.pinned);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclusive", !evsel-&gt;core.attr.exclusive);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong pinned", !evsel-&gt;core.attr.pinned, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclusive", !evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> 	}</div><div class='del'>-	/* cpu/pmu-event/u*/</div><div class='add'>+	/* default_core/pmu-event/u*/</div><div class='ctx'> 	evsel = evsel__next(evsel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", evsel__find_pmu(evsel)-&gt;is_core);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user",</div><div class='del'>-			!evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel",</div><div class='del'>-			evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong pinned", !evsel-&gt;core.attr.pinned);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclusive", !evsel-&gt;core.attr.pinned);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", evsel__find_pmu(evsel)-&gt;is_core, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong pinned", !evsel-&gt;core.attr.pinned, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclusive", !evsel-&gt;core.attr.pinned, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -813,6 +851,15 @@ static int test__checkterms_simple(struct parse_events_terms *terms)</div><div class='ctx'> 	TEST_ASSERT_VAL("wrong val", term-&gt;val.num == 4);</div><div class='ctx'> 	TEST_ASSERT_VAL("wrong config", !strcmp(term-&gt;config, "config3"));</div><div class='ctx'> </div><div class='add'>+	/* config4=5 */</div><div class='add'>+	term = list_entry(term-&gt;list.next, struct parse_events_term, list);</div><div class='add'>+	TEST_ASSERT_VAL("wrong type term",</div><div class='add'>+			term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_CONFIG4);</div><div class='add'>+	TEST_ASSERT_VAL("wrong type val",</div><div class='add'>+			term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM);</div><div class='add'>+	TEST_ASSERT_VAL("wrong val", term-&gt;val.num == 5);</div><div class='add'>+	TEST_ASSERT_VAL("wrong config", !strcmp(term-&gt;config, "config4"));</div><div class='add'>+</div><div class='ctx'> 	/* umask=1*/</div><div class='ctx'> 	term = list_entry(term-&gt;list.next, struct parse_events_term, list);</div><div class='ctx'> 	TEST_ASSERT_VAL("wrong type term",</div><div class='hunk'>@@ -855,48 +902,45 @@ static int test__checkterms_simple(struct parse_events_terms *terms)</div><div class='ctx'> </div><div class='ctx'> static int test__group1(struct evlist *evlist)</div><div class='ctx'> {</div><div class='del'>-	struct evsel *evsel, *leader;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (num_core_entries() * 2));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == num_core_entries());</div><div class='add'>+	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (num_core_entries(evlist) * 2),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* instructions:k */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cycles:upp */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -905,61 +949,66 @@ static int test__group2(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel, *leader = NULL;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries() + 1));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist) + 1),</div><div class='add'>+			   evlist);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO: Currently the software event won't be grouped with the hardware</div><div class='ctx'> 	 * event except for 1 PMU.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups", 1 == evlist__nr_groups(evlist));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups", 1 == evlist__nr_groups(evlist), evlist);</div><div class='ctx'> </div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		if (evsel-&gt;core.attr.type == PERF_TYPE_SOFTWARE) {</div><div class='add'>+		if (evsel__match(evsel, SOFTWARE, SW_PAGE_FAULTS)) {</div><div class='ctx'> 			/* faults + :ku modifier */</div><div class='ctx'> 			leader = evsel;</div><div class='del'>-			TEST_ASSERT_VAL("wrong config",</div><div class='del'>-					test_config(evsel, PERF_COUNT_SW_PAGE_FAULTS));</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-			TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-			TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-			TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-			TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (evsel-&gt;core.attr.type == PERF_TYPE_HARDWARE &amp;&amp;</div><div class='del'>-		    test_config(evsel, PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) {</div><div class='add'>+		if (evsel__match(evsel, HARDWARE, HW_BRANCH_INSTRUCTIONS)) {</div><div class='ctx'> 			/* branches + :u modifier */</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-			TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-			if (evsel__has_leader(evsel, leader))</div><div class='del'>-				TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+			if (evsel__has_leader(evsel, leader)) {</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1,</div><div class='add'>+						  evsel);</div><div class='add'>+			}</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* cycles:k */</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -967,155 +1016,172 @@ static int test__group2(struct evlist *evlist)</div><div class='ctx'> static int test__group3(struct evlist *evlist __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel, *group1_leader = NULL, *group2_leader = NULL;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (3 * perf_pmus__num_core_pmus() + 2));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (3 * perf_pmus__num_core_pmus() + 2),</div><div class='add'>+			   evlist);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Currently the software event won't be grouped with the hardware event</div><div class='ctx'> 	 * except for 1 PMU. This means there are always just 2 groups</div><div class='ctx'> 	 * regardless of the number of core PMUs.</div><div class='ctx'> 	 */</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups", 2 == evlist__nr_groups(evlist));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups", 2 == evlist__nr_groups(evlist), evlist);</div><div class='ctx'> </div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='ctx'> 		if (evsel-&gt;core.attr.type == PERF_TYPE_TRACEPOINT) {</div><div class='ctx'> 			/* group1 syscalls:sys_enter_openat:H */</div><div class='ctx'> 			group1_leader = evsel;</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_type",</div><div class='del'>-					evsel-&gt;core.attr.sample_type == PERF_TP_SAMPLE_TYPE);</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_period", 1 == evsel-&gt;core.attr.sample_period);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-			TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-			TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-			TEST_ASSERT_VAL("wrong group name", !strcmp(evsel-&gt;group_name, "group1"));</div><div class='del'>-			TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-			TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_type",</div><div class='add'>+					  evsel-&gt;core.attr.sample_type == PERF_TP_SAMPLE_TYPE,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_period",</div><div class='add'>+					  1 == evsel-&gt;core.attr.sample_period,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong group name", !strcmp(evsel-&gt;group_name, "group1"),</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (evsel-&gt;core.attr.type == PERF_TYPE_HARDWARE &amp;&amp;</div><div class='del'>-		    test_config(evsel, PERF_COUNT_HW_CPU_CYCLES)) {</div><div class='add'>+		if (evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {</div><div class='ctx'> 			if (evsel-&gt;core.attr.exclude_user) {</div><div class='ctx'> 				/* group1 cycles:kppp */</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude_user",</div><div class='del'>-						evsel-&gt;core.attr.exclude_user);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude_kernel",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude guest",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude host",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_host);</div><div class='del'>-				TEST_ASSERT_VAL("wrong precise_ip",</div><div class='del'>-						evsel-&gt;core.attr.precise_ip == 3);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude_user",</div><div class='add'>+						  evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude_kernel",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv,</div><div class='add'>+						  evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude guest",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude host",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong precise_ip",</div><div class='add'>+						  evsel-&gt;core.attr.precise_ip == 3, evsel);</div><div class='ctx'> 				if (evsel__has_leader(evsel, group1_leader)) {</div><div class='del'>-					TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-					TEST_ASSERT_VAL("wrong group_idx",</div><div class='del'>-							evsel__group_idx(evsel) == 1);</div><div class='add'>+					TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name,</div><div class='add'>+							  evsel);</div><div class='add'>+					TEST_ASSERT_EVSEL("wrong group_idx",</div><div class='add'>+							  evsel__group_idx(evsel) == 1,</div><div class='add'>+							  evsel);</div><div class='ctx'> 				}</div><div class='del'>-				TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* group2 cycles + G modifier */</div><div class='ctx'> 				group2_leader = evsel;</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude_kernel",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude_hv",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude guest",</div><div class='del'>-						!evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-				TEST_ASSERT_VAL("wrong exclude host",</div><div class='del'>-						evsel-&gt;core.attr.exclude_host);</div><div class='del'>-				TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-				TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude_kernel",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude_hv",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude guest",</div><div class='add'>+						  !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong exclude host",</div><div class='add'>+						  evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip,</div><div class='add'>+						  evsel);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel),</div><div class='add'>+						  evsel);</div><div class='ctx'> 				if (evsel-&gt;core.nr_members == 2) {</div><div class='del'>-					TEST_ASSERT_VAL("wrong group_idx",</div><div class='del'>-							evsel__group_idx(evsel) == 0);</div><div class='add'>+					TEST_ASSERT_EVSEL("wrong group_idx",</div><div class='add'>+							  evsel__group_idx(evsel) == 0,</div><div class='add'>+							  evsel);</div><div class='ctx'> 				}</div><div class='del'>-				TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			}</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (evsel-&gt;core.attr.type == 1) {</div><div class='ctx'> 			/* group2 1:3 + G modifier */</div><div class='del'>-			TEST_ASSERT_VAL("wrong config", test_config(evsel, 3));</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-			TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-			if (evsel__has_leader(evsel, group2_leader))</div><div class='del'>-				TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='del'>-			TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong config", 3 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host,</div><div class='add'>+					  evsel);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+			if (evsel__has_leader(evsel, group2_leader)) {</div><div class='add'>+				TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1,</div><div class='add'>+						  evsel);</div><div class='add'>+			}</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* instructions:u */</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__group4(struct evlist *evlist __maybe_unused)</div><div class='ctx'> {</div><div class='del'>-	struct evsel *evsel, *leader;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (num_core_entries() * 2));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			num_core_entries() == evlist__nr_groups(evlist));</div><div class='add'>+	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (num_core_entries(evlist) * 2),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   num_core_entries(evlist) == evlist__nr_groups(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles:u + p */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* instructions:kp + p */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1123,96 +1189,92 @@ static int test__group4(struct evlist *evlist __maybe_unused)</div><div class='ctx'> static int test__group5(struct evlist *evlist __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (5 * num_core_entries()));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == (2 * num_core_entries()));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (5 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles + G */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* instructions + G */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles:G */</div><div class='ctx'> 		evsel = leader = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", !evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", !evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* instructions:G */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='ctx'> 	}</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1221,45 +1283,43 @@ static int test__group_gh1(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries()));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == num_core_entries());</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles + :H group modifier */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses:G + :H group modifier */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1268,45 +1328,43 @@ static int test__group_gh2(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries()));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == num_core_entries());</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles + :G group modifier */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses:H + :G group modifier */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1315,45 +1373,43 @@ static int test__group_gh3(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries()));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == num_core_entries());</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles:G + :u group modifier */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses:H + :u group modifier */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1362,45 +1418,43 @@ static int test__group_gh4(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries()));</div><div class='del'>-	TEST_ASSERT_VAL("wrong number of groups",</div><div class='del'>-			evlist__nr_groups(evlist) == num_core_entries());</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of groups",</div><div class='add'>+			   evlist__nr_groups(evlist) == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles:G + :uG group modifier */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__is_group_leader(evsel), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong core.nr_members", evsel-&gt;core.nr_members == 2, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 0, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses:H + :uG group modifier */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group_idx", evsel__group_idx(evsel) == 1, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1409,58 +1463,54 @@ static int test__leader_sample1(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (3 * num_core_entries()));</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (3 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles - sampling group leader */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses - not sampling */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* branch-misses - not sampling */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_BRANCH_MISSES, "branch-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", !evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", !evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1469,43 +1519,40 @@ static int test__leader_sample2(struct evlist *evlist __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (2 * num_core_entries()));</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (2 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* instructions - sampling group leader */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_INSTRUCTIONS, "instructions");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", evsel-&gt;sample_read, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* branch-misses - not sampling */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_BRANCH_MISSES, "branch-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude host", !evsel-&gt;core.attr.exclude_host);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='del'>-		TEST_ASSERT_VAL("wrong sample_read", evsel-&gt;sample_read);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude guest", !evsel-&gt;core.attr.exclude_guest, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude host", !evsel-&gt;core.attr.exclude_host, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong sample_read", evsel-&gt;sample_read, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1514,16 +1561,17 @@ static int test__checkevent_pinned_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == num_core_entries());</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		evsel = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-		TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-		TEST_ASSERT_VAL("wrong pinned", evsel-&gt;core.attr.pinned);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong pinned", evsel-&gt;core.attr.pinned, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -1532,39 +1580,35 @@ static int test__pinned_group(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == (3 * num_core_entries()));</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == (3 * num_core_entries(evlist)),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles - group leader */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='ctx'> 		/* TODO: The group modifier is not copied to the split group leader. */</div><div class='ctx'> 		if (perf_pmus__num_core_pmus() == 1)</div><div class='del'>-			TEST_ASSERT_VAL("wrong pinned", evsel-&gt;core.attr.pinned);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong pinned", evsel-&gt;core.attr.pinned, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses - can not be pinned, but will go on with the leader */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong pinned", !evsel-&gt;core.attr.pinned);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong pinned", !evsel-&gt;core.attr.pinned, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* branch-misses - ditto */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_BRANCH_MISSES, "branch-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong pinned", !evsel-&gt;core.attr.pinned);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong pinned", !evsel-&gt;core.attr.pinned, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1573,11 +1617,14 @@ static int test__checkevent_exclusive_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", evsel-&gt;core.attr.precise_ip);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclusive", evsel-&gt;core.attr.exclusive);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", evsel-&gt;core.attr.precise_ip, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclusive", evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_symbolic_name(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -1586,39 +1633,35 @@ static int test__exclusive_group(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = NULL, *leader;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == 3 * num_core_entries());</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_core_entries(); i++) {</div><div class='del'>-		int ret;</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == 3 * num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='ctx'> </div><div class='add'>+	for (int i = 0; i &lt; num_core_entries(evlist); i++) {</div><div class='ctx'> 		/* cycles - group leader */</div><div class='ctx'> 		evsel = leader = (i == 0 ? evlist__first(evlist) : evsel__next(evsel));</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong group name", !evsel-&gt;group_name);</div><div class='del'>-		TEST_ASSERT_VAL("wrong leader", evsel__has_leader(evsel, leader));</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong group name", !evsel-&gt;group_name, evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong leader", evsel__has_leader(evsel, leader), evsel);</div><div class='ctx'> 		/* TODO: The group modifier is not copied to the split group leader. */</div><div class='ctx'> 		if (perf_pmus__num_core_pmus() == 1)</div><div class='del'>-			TEST_ASSERT_VAL("wrong exclusive", evsel-&gt;core.attr.exclusive);</div><div class='add'>+			TEST_ASSERT_EVSEL("wrong exclusive", evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* cache-misses - can not be pinned, but will go on with the leader */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CACHE_MISSES, "cache-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclusive", !evsel-&gt;core.attr.exclusive);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_CACHE_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclusive", !evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> </div><div class='ctx'> 		/* branch-misses - ditto */</div><div class='ctx'> 		evsel = evsel__next(evsel);</div><div class='del'>-		ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_BRANCH_MISSES, "branch-misses");</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		TEST_ASSERT_VAL("wrong exclusive", !evsel-&gt;core.attr.exclusive);</div><div class='add'>+		TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+				  evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES),</div><div class='add'>+				  evsel);</div><div class='add'>+		TEST_ASSERT_EVSEL("wrong exclusive", !evsel-&gt;core.attr.exclusive, evsel);</div><div class='ctx'> 	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1626,13 +1669,13 @@ static int test__checkevent_breakpoint_len(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type", (HW_BREAKPOINT_R | HW_BREAKPOINT_W) ==</div><div class='del'>-					 evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len", HW_BREAKPOINT_LEN_1 ==</div><div class='del'>-					evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type",</div><div class='add'>+			  (HW_BREAKPOINT_R | HW_BREAKPOINT_W) == evsel-&gt;core.attr.bp_type,</div><div class='add'>+			  evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_1 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1641,13 +1684,11 @@ static int test__checkevent_breakpoint_len_w(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0));</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_type", HW_BREAKPOINT_W ==</div><div class='del'>-					 evsel-&gt;core.attr.bp_type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong bp_len", HW_BREAKPOINT_LEN_2 ==</div><div class='del'>-					evsel-&gt;core.attr.bp_len);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_BREAKPOINT == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0 == evsel-&gt;core.attr.config, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_type", HW_BREAKPOINT_W == evsel-&gt;core.attr.bp_type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong bp_len", HW_BREAKPOINT_LEN_2 == evsel-&gt;core.attr.bp_len, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1657,10 +1698,11 @@ test__checkevent_breakpoint_len_rw_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv);</div><div class='del'>-	TEST_ASSERT_VAL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", !evsel-&gt;core.attr.exclude_user, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_hv", evsel-&gt;core.attr.exclude_hv, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong precise_ip", !evsel-&gt;core.attr.precise_ip, evsel);</div><div class='ctx'> </div><div class='ctx'> 	return test__checkevent_breakpoint_rw(evlist);</div><div class='ctx'> }</div><div class='hunk'>@@ -1669,10 +1711,10 @@ static int test__checkevent_precise_max_modifier(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries",</div><div class='del'>-			evlist-&gt;core.nr_entries == 1 + num_core_entries());</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_SOFTWARE == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, PERF_COUNT_SW_TASK_CLOCK));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == 1 + num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type/config", evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK), evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1680,7 +1722,10 @@ static int test__checkevent_config_symbol(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", evsel__name_is(evsel, "insn"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", evsel__name_is(evsel, "insn"), evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1688,7 +1733,8 @@ static int test__checkevent_config_raw(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", evsel__name_is(evsel, "rawpmu"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", evsel__name_is(evsel, "rawpmu"), evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1696,7 +1742,8 @@ static int test__checkevent_config_num(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", evsel__name_is(evsel, "numpmu"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", evsel__name_is(evsel, "numpmu"), evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1704,18 +1751,16 @@ static int test__checkevent_config_cache(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", evsel__name_is(evsel, "cachepmu"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", evsel__name_is(evsel, "cachepmu"), evsel);</div><div class='ctx'> 	return test__checkevent_genhw(evlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool test__pmu_cpu_valid(void)</div><div class='add'>+static bool test__pmu_default_core_event_valid(void)</div><div class='ctx'> {</div><div class='del'>-	return !!perf_pmus__find("cpu");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool test__pmu_cpu_event_valid(void)</div><div class='del'>-{</div><div class='del'>-	struct perf_pmu *pmu = perf_pmus__find("cpu");</div><div class='add'>+	struct perf_pmu *pmu = perf_pmus__find_core_pmu();</div><div class='ctx'> </div><div class='ctx'> 	if (!pmu)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1732,7 +1777,56 @@ static int test__intel_pt(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", evsel__name_is(evsel, "intel_pt//u"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", evsel__name_is(evsel, "intel_pt//u"), evsel);</div><div class='add'>+	return TEST_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool test__acr_valid(void)</div><div class='add'>+{</div><div class='add'>+	struct perf_pmu *pmu = NULL;</div><div class='add'>+</div><div class='add'>+	while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {</div><div class='add'>+		if (perf_pmu__has_format(pmu, "acr_mask"))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test__ratio_to_prev(struct evlist *evlist)</div><div class='add'>+{</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+</div><div class='add'>+	TEST_ASSERT_VAL("wrong number of entries", 2 * perf_pmus__num_core_pmus() == evlist-&gt;core.nr_entries);</div><div class='add'>+</div><div class='add'>+	 evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		if (!perf_pmu__has_format(evsel-&gt;pmu, "acr_mask"))</div><div class='add'>+			return TEST_OK;</div><div class='add'>+</div><div class='add'>+		if (evsel == evlist__first(evlist)) {</div><div class='add'>+			TEST_ASSERT_VAL("wrong config2", 0 == evsel-&gt;core.attr.config2);</div><div class='add'>+			TEST_ASSERT_VAL("wrong leader", evsel__is_group_leader(evsel));</div><div class='add'>+			TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 2);</div><div class='add'>+			TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 0);</div><div class='add'>+			TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+					evsel__match(evsel, HARDWARE, HW_CPU_CYCLES),</div><div class='add'>+					evsel);</div><div class='add'>+		} else {</div><div class='add'>+			TEST_ASSERT_VAL("wrong config2", 0 == evsel-&gt;core.attr.config2);</div><div class='add'>+			TEST_ASSERT_VAL("wrong leader", !evsel__is_group_leader(evsel));</div><div class='add'>+			TEST_ASSERT_VAL("wrong core.nr_members", evsel-&gt;core.nr_members == 0);</div><div class='add'>+			TEST_ASSERT_VAL("wrong group_idx", evsel__group_idx(evsel) == 1);</div><div class='add'>+			TEST_ASSERT_EVSEL("unexpected event",</div><div class='add'>+					evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS),</div><div class='add'>+					evsel);</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 * The period value gets configured within evlist__config,</div><div class='add'>+		 * while this test executes only parse events method.</div><div class='add'>+		 */</div><div class='add'>+		TEST_ASSERT_VAL("wrong period", 0 == evsel-&gt;core.attr.sample_period);</div><div class='add'>+	}</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1740,9 +1834,13 @@ static int test__checkevent_complex_name(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong complex name parsing",</div><div class='del'>-			evsel__name_is(evsel,</div><div class='del'>-				       "COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks"));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong complex name parsing",</div><div class='add'>+			  evsel__name_is(evsel,</div><div class='add'>+				  "COMPLEX_CYCLES_NAME:orig=cpu-cycles,desc=chip-clock-ticks"),</div><div class='add'>+			  evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1750,57 +1848,57 @@ static int test__checkevent_raw_pmu(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist-&gt;core.nr_entries);</div><div class='del'>-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_SOFTWARE == evsel-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", test_config(evsel, 0x1a));</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries", 1 == evlist-&gt;core.nr_entries, evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", PERF_TYPE_SOFTWARE == evsel-&gt;core.attr.type, evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", 0x1a == evsel-&gt;core.attr.config, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__sym_event_slash(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='del'>-	int ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_kernel", evsel-&gt;core.attr.exclude_kernel, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__sym_event_dc(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='del'>-	int ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong exclude_user", evsel-&gt;core.attr.exclude_user);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong exclude_user", evsel-&gt;core.attr.exclude_user, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__term_equal_term(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='del'>-	int ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", strcmp(evsel-&gt;name, "name") == 0);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", strcmp(evsel-&gt;name, "name") == 0, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int test__term_equal_legacy(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct evsel *evsel = evlist__first(evlist);</div><div class='del'>-	int ret = assert_hw(&amp;evsel-&gt;core, PERF_COUNT_HW_CPU_CYCLES, "cycles");</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong name setting", strcmp(evsel-&gt;name, "l1d") == 0);</div><div class='add'>+	TEST_ASSERT_EVLIST("wrong number of entries",</div><div class='add'>+			   evlist-&gt;core.nr_entries == num_core_entries(evlist),</div><div class='add'>+			   evlist);</div><div class='add'>+	TEST_ASSERT_EVSEL("unexpected event", evsel__match(evsel, HARDWARE, HW_CPU_CYCLES), evsel);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong name setting", strcmp(evsel-&gt;name, "l1d") == 0, evsel);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1891,7 +1989,7 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles/period=100000,config2/",</div><div class='add'>+		.name  = "cpu-cycles/period=100000,config2/",</div><div class='ctx'> 		.check = test__checkevent_symbolic_name_config,</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2006,27 +2104,27 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{instructions:k,cycles:upp}",</div><div class='add'>+		.name  = "{instructions:k,cpu-cycles:upp}",</div><div class='ctx'> 		.check = test__group1,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{faults:k,branches}:u,cycles:k",</div><div class='add'>+		.name  = "{faults:k,branches}:u,cpu-cycles:k",</div><div class='ctx'> 		.check = test__group2,</div><div class='ctx'> 		/* 9 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "group1{syscalls:sys_enter_openat:H,cycles:kppp},group2{cycles,1:3}:G,instructions:u",</div><div class='add'>+		.name  = "group1{syscalls:sys_enter_openat:H,cpu-cycles:kppp},group2{cpu-cycles,1:3}:G,instructions:u",</div><div class='ctx'> 		.check = test__group3,</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles:u,instructions:kp}:p",</div><div class='add'>+		.name  = "{cpu-cycles:u,instructions:kp}:p",</div><div class='ctx'> 		.check = test__group4,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,instructions}:G,{cycles:G,instructions:G},cycles",</div><div class='add'>+		.name  = "{cpu-cycles,instructions}:G,{cpu-cycles:G,instructions:G},cpu-cycles",</div><div class='ctx'> 		.check = test__group5,</div><div class='ctx'> 		/* 2 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2036,27 +2134,27 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 3 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,cache-misses:G}:H",</div><div class='add'>+		.name  = "{cpu-cycles,cache-misses:G}:H",</div><div class='ctx'> 		.check = test__group_gh1,</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,cache-misses:H}:G",</div><div class='add'>+		.name  = "{cpu-cycles,cache-misses:H}:G",</div><div class='ctx'> 		.check = test__group_gh2,</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles:G,cache-misses:H}:u",</div><div class='add'>+		.name  = "{cpu-cycles:G,cache-misses:H}:u",</div><div class='ctx'> 		.check = test__group_gh3,</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles:G,cache-misses:H}:uG",</div><div class='add'>+		.name  = "{cpu-cycles:G,cache-misses:H}:uG",</div><div class='ctx'> 		.check = test__group_gh4,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,cache-misses,branch-misses}:S",</div><div class='add'>+		.name  = "{cpu-cycles,cache-misses,branch-misses}:S",</div><div class='ctx'> 		.check = test__leader_sample1,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2071,7 +2169,7 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,cache-misses,branch-misses}:D",</div><div class='add'>+		.name  = "{cpu-cycles,cache-misses,branch-misses}:D",</div><div class='ctx'> 		.check = test__pinned_group,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2109,7 +2207,7 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "task-clock:P,cycles",</div><div class='add'>+		.name  = "task-clock:P,cpu-cycles",</div><div class='ctx'> 		.check = test__checkevent_precise_max_modifier,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2140,17 +2238,17 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 2 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks'/Duk",</div><div class='add'>+		.name  = "cpu-cycles/name='COMPLEX_CYCLES_NAME:orig=cpu-cycles,desc=chip-clock-ticks'/Duk",</div><div class='ctx'> 		.check = test__checkevent_complex_name,</div><div class='ctx'> 		/* 3 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles//u",</div><div class='add'>+		.name  = "cpu-cycles//u",</div><div class='ctx'> 		.check = test__sym_event_slash,</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles:k",</div><div class='add'>+		.name  = "cpu-cycles:k",</div><div class='ctx'> 		.check = test__sym_event_dc,</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2160,17 +2258,17 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cycles,cache-misses,branch-misses}:e",</div><div class='add'>+		.name  = "{cpu-cycles,cache-misses,branch-misses}:e",</div><div class='ctx'> 		.check = test__exclusive_group,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles/name=name/",</div><div class='add'>+		.name  = "cpu-cycles/name=name/",</div><div class='ctx'> 		.check = test__term_equal_term,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cycles/name=l1d/",</div><div class='add'>+		.name  = "cpu-cycles/name=l1d/",</div><div class='ctx'> 		.check = test__term_equal_legacy,</div><div class='ctx'> 		/* 9 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2249,30 +2347,34 @@ static const struct evlist_test test__events[] = {</div><div class='ctx'> 		.check = test__checkevent_tracepoint,</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name  = "{cycles,instructions/period=200000,ratio-to-prev=2.0/}",</div><div class='add'>+		.valid = test__acr_valid,</div><div class='add'>+		.check = test__ratio_to_prev,</div><div class='add'>+		/* 5 */</div><div class='add'>+	},</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct evlist_test test__events_pmu[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/config=10,config1=1,config2=3,period=1000/u",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/config=10,config1=1,config2=3,period=1000/u",</div><div class='ctx'> 		.check = test__checkevent_pmu,</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/config=1,name=krava/u,cpu/config=2/u",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/config=1,name=krava/u,default_core/config=2/u",</div><div class='ctx'> 		.check = test__checkevent_pmu_name,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/config=1,call-graph=fp,time,period=100000/,cpu/config=2,call-graph=no,time=0,period=2000/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/config=1,call-graph=fp,time,period=100000/,default_core/config=2,call-graph=no,time=0,period=2000/",</div><div class='ctx'> 		.check = test__checkevent_pmu_partial_time_callgraph,</div><div class='ctx'> 		/* 2 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks',period=0x1,event=0x2/ukp",</div><div class='del'>-		.valid = test__pmu_cpu_event_valid,</div><div class='add'>+		.name  = "default_core/name='COMPLEX_CYCLES_NAME:orig=cpu-cycles,desc=chip-clock-ticks',period=0x1,event=0x2/ukp",</div><div class='add'>+		.valid = test__pmu_default_core_event_valid,</div><div class='ctx'> 		.check = test__checkevent_complex_name,</div><div class='ctx'> 		/* 3 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2287,158 +2389,132 @@ static const struct evlist_test test__events_pmu[] = {</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/L1-dcache-load-miss/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/L1-dcache-load-miss/",</div><div class='ctx'> 		.check = test__checkevent_genhw,</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/L1-dcache-load-miss/kp",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/L1-dcache-load-miss/kp",</div><div class='ctx'> 		.check = test__checkevent_genhw_modifier,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/L1-dcache-misses,name=cachepmu/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/L1-dcache-misses,name=cachepmu/",</div><div class='ctx'> 		.check = test__checkevent_config_cache,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/",</div><div class='ctx'> 		.check = test__checkevent_symbolic_name,</div><div class='ctx'> 		/* 9 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/cycles,period=100000,config2/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/cycles,period=100000,config2/",</div><div class='ctx'> 		.check = test__checkevent_symbolic_name_config,</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/h",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/h",</div><div class='ctx'> 		.check = test__checkevent_symbolic_name_modifier,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/G",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/G",</div><div class='ctx'> 		.check = test__checkevent_exclude_host_modifier,</div><div class='ctx'> 		/* 2 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/H",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/H",</div><div class='ctx'> 		.check = test__checkevent_exclude_guest_modifier,</div><div class='ctx'> 		/* 3 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/instructions/k,cpu/cycles/upp}",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/instructions/k,default_core/cycles/upp}",</div><div class='ctx'> 		.check = test__group1,</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/u,cpu/instructions/kp}:p",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/u,default_core/instructions/kp}:p",</div><div class='ctx'> 		.check = test__group4,</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/,cpu/cache-misses/G}:H",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/,default_core/cache-misses/G}:H",</div><div class='ctx'> 		.check = test__group_gh1,</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/,cpu/cache-misses/H}:G",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/,default_core/cache-misses/H}:G",</div><div class='ctx'> 		.check = test__group_gh2,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/G,cpu/cache-misses/H}:u",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/G,default_core/cache-misses/H}:u",</div><div class='ctx'> 		.check = test__group_gh3,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/G,cpu/cache-misses/H}:uG",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/G,default_core/cache-misses/H}:uG",</div><div class='ctx'> 		.check = test__group_gh4,</div><div class='ctx'> 		/* 9 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/,cpu/cache-misses/,cpu/branch-misses/}:S",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/,default_core/cache-misses/,default_core/branch-misses/}:S",</div><div class='ctx'> 		.check = test__leader_sample1,</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/instructions/,cpu/branch-misses/}:Su",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/instructions/,default_core/branch-misses/}:Su",</div><div class='ctx'> 		.check = test__leader_sample2,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/uDp",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/uDp",</div><div class='ctx'> 		.check = test__checkevent_pinned_modifier,</div><div class='ctx'> 		/* 2 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/,cpu/cache-misses/,cpu/branch-misses/}:D",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/,default_core/cache-misses/,default_core/branch-misses/}:D",</div><div class='ctx'> 		.check = test__pinned_group,</div><div class='ctx'> 		/* 3 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/I",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/I",</div><div class='ctx'> 		.check = test__checkevent_exclude_idle_modifier,</div><div class='ctx'> 		/* 4 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/kIG",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/kIG",</div><div class='ctx'> 		.check = test__checkevent_exclude_idle_modifier_1,</div><div class='ctx'> 		/* 5 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/cycles/u",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/cycles/u",</div><div class='ctx'> 		.check = test__sym_event_slash,</div><div class='ctx'> 		/* 6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/cycles/k",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/cycles/k",</div><div class='ctx'> 		.check = test__sym_event_dc,</div><div class='ctx'> 		/* 7 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/instructions/uep",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/instructions/uep",</div><div class='ctx'> 		.check = test__checkevent_exclusive_modifier,</div><div class='ctx'> 		/* 8 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "{cpu/cycles/,cpu/cache-misses/,cpu/branch-misses/}:e",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "{default_core/cycles/,default_core/cache-misses/,default_core/branch-misses/}:e",</div><div class='ctx'> 		.check = test__exclusive_group,</div><div class='ctx'> 		/* 9 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/cycles,name=name/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/cycles,name=name/",</div><div class='ctx'> 		.check = test__term_equal_term,</div><div class='ctx'> 		/* 0 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name  = "cpu/cycles,name=l1d/",</div><div class='del'>-		.valid = test__pmu_cpu_valid,</div><div class='add'>+		.name  = "default_core/cycles,name=l1d/",</div><div class='ctx'> 		.check = test__term_equal_legacy,</div><div class='ctx'> 		/* 1 */</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2451,7 +2527,7 @@ struct terms_test {</div><div class='ctx'> </div><div class='ctx'> static const struct terms_test test__terms[] = {</div><div class='ctx'> 	[0] = {</div><div class='del'>-		.str   = "config=10,config1,config2=3,config3=4,umask=1,read,r0xead",</div><div class='add'>+		.str   = "config=10,config1,config2=3,config3=4,config4=5,umask=1,read,r0xead",</div><div class='ctx'> 		.check = test__checkterms_simple,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -2528,15 +2604,30 @@ static int combine_test_results(int existing, int latest)</div><div class='ctx'> static int test_events(const struct evlist_test *events, int cnt)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = TEST_OK;</div><div class='add'>+	struct perf_pmu *core_pmu = perf_pmus__find_core_pmu();</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 0; i &lt; cnt; i++) {</div><div class='del'>-		const struct evlist_test *e = &amp;events[i];</div><div class='add'>+		struct evlist_test e = events[i];</div><div class='ctx'> 		int test_ret;</div><div class='add'>+		const char *pos = e.name;</div><div class='add'>+		char buf[1024], *buf_pos = buf, *end;</div><div class='add'>+</div><div class='add'>+		while ((end = strstr(pos, "default_core"))) {</div><div class='add'>+			size_t len = end - pos;</div><div class='add'>+</div><div class='add'>+			strncpy(buf_pos, pos, len);</div><div class='add'>+			pos = end + 12;</div><div class='add'>+			buf_pos += len;</div><div class='add'>+			strcpy(buf_pos, core_pmu-&gt;name);</div><div class='add'>+			buf_pos += strlen(core_pmu-&gt;name);</div><div class='add'>+		}</div><div class='add'>+		strcpy(buf_pos, pos);</div><div class='ctx'> </div><div class='del'>-		pr_debug("running test %d '%s'\n", i, e-&gt;name);</div><div class='del'>-		test_ret = test_event(e);</div><div class='add'>+		e.name = buf;</div><div class='add'>+		pr_debug("running test %d '%s'\n", i, e.name);</div><div class='add'>+		test_ret = test_event(&amp;e);</div><div class='ctx'> 		if (test_ret != TEST_OK) {</div><div class='del'>-			pr_debug("Event test failure: test %d '%s'", i, e-&gt;name);</div><div class='add'>+			pr_debug("Event test failure: test %d '%s'", i, e.name);</div><div class='ctx'> 			ret = combine_test_results(ret, test_ret);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2556,7 +2647,7 @@ static int test_term(const struct terms_test *t)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	parse_events_terms__init(&amp;terms);</div><div class='del'>-	ret = parse_events_terms(&amp;terms, t-&gt;str, /*input=*/ NULL);</div><div class='add'>+	ret = parse_events_terms(&amp;terms, t-&gt;str);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_debug("failed to parse terms '%s', err %d\n",</div><div class='ctx'> 			 t-&gt;str , ret);</div><div class='hunk'>@@ -2777,8 +2868,9 @@ static int test__checkevent_pmu_events_alias(struct evlist *evlist)</div><div class='ctx'> 	struct evsel *evsel1 = evlist__first(evlist);</div><div class='ctx'> 	struct evsel *evsel2 = evlist__last(evlist);</div><div class='ctx'> </div><div class='del'>-	TEST_ASSERT_VAL("wrong type", evsel1-&gt;core.attr.type == evsel2-&gt;core.attr.type);</div><div class='del'>-	TEST_ASSERT_VAL("wrong config", evsel1-&gt;core.attr.config == evsel2-&gt;core.attr.config);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong type", evsel1-&gt;core.attr.type == evsel2-&gt;core.attr.type, evsel1);</div><div class='add'>+	TEST_ASSERT_EVSEL("wrong config", evsel1-&gt;core.attr.config == evsel2-&gt;core.attr.config,</div><div class='add'>+			  evsel1);</div><div class='ctx'> 	return TEST_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/tests/parse-metric.c b/tools/perf/tests/parse-metric.c<br/>index 66a5275917e2..6bbc209a5c6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/parse-metric.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/parse-metric.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/parse-metric.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/parse-metric.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;perf/cpumap.h&gt;</div><div class='ctx'> #include &lt;perf/evlist.h&gt;</div><div class='hunk'>@@ -40,8 +41,6 @@ static void load_runtime_stat(struct evlist *evlist, struct value *vals)</div><div class='ctx'> 		count = find_value(evsel-&gt;name, vals);</div><div class='ctx'> 		evsel-&gt;supported = true;</div><div class='ctx'> 		evsel-&gt;stats-&gt;aggr-&gt;counts.val = count;</div><div class='del'>-		if (evsel__name_is(evsel, "duration_time"))</div><div class='del'>-			update_stats(&amp;walltime_nsecs_stats, count);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/tests/perf-record.c b/tools/perf/tests/perf-record.c<br/>index 0b3c37e66871..efbd9cd60c63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/perf-record.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/perf-record.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/perf-record.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/perf-record.c</a></div><div class='hunk'>@@ -13,15 +13,19 @@</div><div class='ctx'> #include "tests.h"</div><div class='ctx'> #include "util/mmap.h"</div><div class='ctx'> #include "util/sample.h"</div><div class='add'>+#include "util/cpumap.h"</div><div class='ctx'> </div><div class='ctx'> static int sched__get_first_possible_cpu(pid_t pid, cpu_set_t *maskp)</div><div class='ctx'> {</div><div class='del'>-	int i, cpu = -1, nrcpus = 1024;</div><div class='add'>+	int i, cpu = -1;</div><div class='add'>+	int nrcpus = cpu__max_cpu().cpu;</div><div class='add'>+	size_t size = CPU_ALLOC_SIZE(nrcpus);</div><div class='add'>+</div><div class='ctx'> realloc:</div><div class='del'>-	CPU_ZERO(maskp);</div><div class='add'>+	CPU_ZERO_S(size, maskp);</div><div class='ctx'> </div><div class='del'>-	if (sched_getaffinity(pid, sizeof(*maskp), maskp) == -1) {</div><div class='del'>-		if (errno == EINVAL &amp;&amp; nrcpus &lt; (1024 &lt;&lt; 8)) {</div><div class='add'>+	if (sched_getaffinity(pid, size, maskp) == -1) {</div><div class='add'>+		if (errno == EINVAL &amp;&amp; nrcpus &lt; (cpu__max_cpu().cpu &lt;&lt; 8)) {</div><div class='ctx'> 			nrcpus = nrcpus &lt;&lt; 2;</div><div class='ctx'> 			goto realloc;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -30,11 +34,11 @@ realloc:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nrcpus; i++) {</div><div class='del'>-		if (CPU_ISSET(i, maskp)) {</div><div class='add'>+		if (CPU_ISSET_S(i, size, maskp)) {</div><div class='ctx'> 			if (cpu == -1)</div><div class='ctx'> 				cpu = i;</div><div class='ctx'> 			else</div><div class='del'>-				CPU_CLR(i, maskp);</div><div class='add'>+				CPU_CLR_S(i, size, maskp);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -50,8 +54,9 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 		.no_buffering = true,</div><div class='ctx'> 		.mmap_pages   = 256,</div><div class='ctx'> 	};</div><div class='del'>-	cpu_set_t cpu_mask;</div><div class='del'>-	size_t cpu_mask_size = sizeof(cpu_mask);</div><div class='add'>+	int nrcpus = cpu__max_cpu().cpu;</div><div class='add'>+	cpu_set_t *cpu_mask;</div><div class='add'>+	size_t cpu_mask_size;</div><div class='ctx'> 	struct evlist *evlist = evlist__new_dummy();</div><div class='ctx'> 	struct evsel *evsel;</div><div class='ctx'> 	struct perf_sample sample;</div><div class='hunk'>@@ -69,12 +74,22 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	int total_events = 0, nr_events[PERF_RECORD_MAX] = { 0, };</div><div class='ctx'> 	char sbuf[STRERR_BUFSIZE];</div><div class='ctx'> </div><div class='add'>+	cpu_mask = CPU_ALLOC(nrcpus);</div><div class='add'>+	if (!cpu_mask) {</div><div class='add'>+		pr_debug("failed to create cpumask\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_mask_size = CPU_ALLOC_SIZE(nrcpus);</div><div class='add'>+	CPU_ZERO_S(cpu_mask_size, cpu_mask);</div><div class='add'>+</div><div class='ctx'> 	perf_sample__init(&amp;sample, /*all=*/false);</div><div class='ctx'> 	if (evlist == NULL) /* Fallback for kernels lacking PERF_COUNT_SW_DUMMY */</div><div class='ctx'> 		evlist = evlist__new_default();</div><div class='ctx'> </div><div class='ctx'> 	if (evlist == NULL) {</div><div class='ctx'> 		pr_debug("Not enough memory to create evlist\n");</div><div class='add'>+		CPU_FREE(cpu_mask);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -111,10 +126,11 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	evsel__set_sample_bit(evsel, TIME);</div><div class='ctx'> 	evlist__config(evlist, &amp;opts, NULL);</div><div class='ctx'> </div><div class='del'>-	err = sched__get_first_possible_cpu(evlist-&gt;workload.pid, &amp;cpu_mask);</div><div class='add'>+	err = sched__get_first_possible_cpu(evlist-&gt;workload.pid, cpu_mask);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		pr_debug("sched__get_first_possible_cpu: %s\n",</div><div class='ctx'> 			 str_error_r(errno, sbuf, sizeof(sbuf)));</div><div class='add'>+		evlist__cancel_workload(evlist);</div><div class='ctx'> 		goto out_delete_evlist;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -123,9 +139,10 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * So that we can check perf_sample.cpu on all the samples.</div><div class='ctx'> 	 */</div><div class='del'>-	if (sched_setaffinity(evlist-&gt;workload.pid, cpu_mask_size, &amp;cpu_mask) &lt; 0) {</div><div class='add'>+	if (sched_setaffinity(evlist-&gt;workload.pid, cpu_mask_size, cpu_mask) &lt; 0) {</div><div class='ctx'> 		pr_debug("sched_setaffinity: %s\n",</div><div class='ctx'> 			 str_error_r(errno, sbuf, sizeof(sbuf)));</div><div class='add'>+		evlist__cancel_workload(evlist);</div><div class='ctx'> 		goto out_delete_evlist;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +154,7 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		pr_debug("perf_evlist__open: %s\n",</div><div class='ctx'> 			 str_error_r(errno, sbuf, sizeof(sbuf)));</div><div class='add'>+		evlist__cancel_workload(evlist);</div><div class='ctx'> 		goto out_delete_evlist;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -149,6 +167,7 @@ static int test__PERF_RECORD(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		pr_debug("evlist__mmap: %s\n",</div><div class='ctx'> 			 str_error_r(errno, sbuf, sizeof(sbuf)));</div><div class='add'>+		evlist__cancel_workload(evlist);</div><div class='ctx'> 		goto out_delete_evlist;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -328,6 +347,7 @@ found_exit:</div><div class='ctx'> 		++errs;</div><div class='ctx'> 	}</div><div class='ctx'> out_delete_evlist:</div><div class='add'>+	CPU_FREE(cpu_mask);</div><div class='ctx'> 	evlist__delete(evlist);</div><div class='ctx'> out:</div><div class='ctx'> 	perf_sample__exit(&amp;sample);</div><div class='head'>diff --git a/tools/perf/tests/perf-time-to-tsc.c b/tools/perf/tests/perf-time-to-tsc.c<br/>index d4437410c99f..cca41bd37ae3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/perf-time-to-tsc.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/perf-time-to-tsc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/perf-time-to-tsc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/perf-time-to-tsc.c</a></div><div class='hunk'>@@ -101,11 +101,11 @@ static int test__perf_time_to_tsc(struct test_suite *test __maybe_unused, int su</div><div class='ctx'> </div><div class='ctx'> 	perf_evlist__set_maps(&amp;evlist-&gt;core, cpus, threads);</div><div class='ctx'> </div><div class='del'>-	CHECK__(parse_event(evlist, "cycles:u"));</div><div class='add'>+	CHECK__(parse_event(evlist, "cpu-cycles:u"));</div><div class='ctx'> </div><div class='ctx'> 	evlist__config(evlist, &amp;opts, NULL);</div><div class='ctx'> </div><div class='del'>-	/* For hybrid "cycles:u", it creates two events */</div><div class='add'>+	/* For hybrid "cpu-cycles:u", it creates two events */</div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='ctx'> 		evsel-&gt;core.attr.comm = 1;</div><div class='ctx'> 		evsel-&gt;core.attr.disabled = 1;</div><div class='head'>diff --git a/tools/perf/tests/pfm.c b/tools/perf/tests/pfm.c<br/>index 2e38dfa34b6c..fca4a86452df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pfm.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pfm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pfm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/pfm.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2020 Google LLC.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include "tests.h"</div><div class='ctx'> #include "util/debug.h"</div><div class='ctx'> #include "util/evlist.h"</div><div class='head'>diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c<br/>index 95fd9f671a22..a99716862168 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pmu-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pmu-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pmu-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/pmu-events.c</a></div><div class='hunk'>@@ -22,10 +22,6 @@ struct perf_pmu_test_event {</div><div class='ctx'> 	/* used for matching against events from generated pmu-events.c */</div><div class='ctx'> 	struct pmu_event event;</div><div class='ctx'> </div><div class='del'>-	/* used for matching against event aliases */</div><div class='del'>-	/* extra events for aliases */</div><div class='del'>-	const char *alias_str;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note: For when PublicDescription does not exist in the JSON, we</div><div class='ctx'> 	 * will have no long_desc in pmu_event.long_desc, but long_desc may</div><div class='hunk'>@@ -52,7 +48,6 @@ static const struct perf_pmu_test_event bp_l1_btb_correct = {</div><div class='ctx'> 		.desc = "L1 BTB Correction",</div><div class='ctx'> 		.topic = "branch",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x8a",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct perf_pmu_test_event bp_l2_btb_correct = {</div><div class='hunk'>@@ -63,7 +58,6 @@ static const struct perf_pmu_test_event bp_l2_btb_correct = {</div><div class='ctx'> 		.desc = "L2 BTB Correction",</div><div class='ctx'> 		.topic = "branch",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x8b",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct perf_pmu_test_event segment_reg_loads_any = {</div><div class='hunk'>@@ -74,7 +68,6 @@ static const struct perf_pmu_test_event segment_reg_loads_any = {</div><div class='ctx'> 		.desc = "Number of segment register loads",</div><div class='ctx'> 		.topic = "other",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x6,period=0x30d40,umask=0x80",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct perf_pmu_test_event dispatch_blocked_any = {</div><div class='hunk'>@@ -85,7 +78,6 @@ static const struct perf_pmu_test_event dispatch_blocked_any = {</div><div class='ctx'> 		.desc = "Memory cluster signals to block micro-op dispatch for any reason",</div><div class='ctx'> 		.topic = "other",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x9,period=0x30d40,umask=0x20",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct perf_pmu_test_event eist_trans = {</div><div class='hunk'>@@ -96,7 +88,6 @@ static const struct perf_pmu_test_event eist_trans = {</div><div class='ctx'> 		.desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",</div><div class='ctx'> 		.topic = "other",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x3a,period=0x30d40",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct perf_pmu_test_event l3_cache_rd = {</div><div class='hunk'>@@ -108,7 +99,6 @@ static const struct perf_pmu_test_event l3_cache_rd = {</div><div class='ctx'> 		.long_desc = "Attributable Level 3 cache access, read",</div><div class='ctx'> 		.topic = "cache",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x40",</div><div class='ctx'> 	.alias_long_desc = "Attributable Level 3 cache access, read",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -130,7 +120,6 @@ static const struct perf_pmu_test_event uncore_hisi_ddrc_flux_wcmd = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "hisi_sccl,ddrc",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x2",</div><div class='ctx'> 	.matching_pmu = "hisi_sccl1_ddrc2",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -142,7 +131,6 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "uncore_cbox",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x22,umask=0x81",</div><div class='ctx'> 	.matching_pmu = "uncore_cbox_0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +142,6 @@ static const struct perf_pmu_test_event uncore_hyphen = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "uncore_cbox",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0xe0",</div><div class='ctx'> 	.matching_pmu = "uncore_cbox_0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -166,7 +153,6 @@ static const struct perf_pmu_test_event uncore_two_hyph = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "uncore_cbox",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0xc0",</div><div class='ctx'> 	.matching_pmu = "uncore_cbox_0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +164,6 @@ static const struct perf_pmu_test_event uncore_hisi_l3c_rd_hit_cpipe = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "hisi_sccl,l3c",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x7",</div><div class='ctx'> 	.matching_pmu = "hisi_sccl3_l3c7",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -190,7 +175,6 @@ static const struct perf_pmu_test_event uncore_imc_free_running_cache_miss = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "uncore_imc_free_running",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x12",</div><div class='ctx'> 	.matching_pmu = "uncore_imc_free_running_0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -202,7 +186,6 @@ static const struct perf_pmu_test_event uncore_imc_cache_hits = {</div><div class='ctx'> 		.topic = "uncore",</div><div class='ctx'> 		.pmu = "uncore_imc",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x34",</div><div class='ctx'> 	.matching_pmu = "uncore_imc_0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -226,7 +209,6 @@ static const struct perf_pmu_test_event sys_ddr_pmu_write_cycles = {</div><div class='ctx'> 		.pmu = "uncore_sys_ddr_pmu",</div><div class='ctx'> 		.compat = "v8",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "event=0x2b",</div><div class='ctx'> 	.matching_pmu = "uncore_sys_ddr_pmu0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +221,6 @@ static const struct perf_pmu_test_event sys_ccn_pmu_read_cycles = {</div><div class='ctx'> 		.pmu = "uncore_sys_ccn_pmu",</div><div class='ctx'> 		.compat = "0x01",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "config=0x2c",</div><div class='ctx'> 	.matching_pmu = "uncore_sys_ccn_pmu4",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -252,7 +233,6 @@ static const struct perf_pmu_test_event sys_cmn_pmu_hnf_cache_miss = {</div><div class='ctx'> 		.pmu = "uncore_sys_cmn_pmu",</div><div class='ctx'> 		.compat = "(434|436|43c|43a).*",</div><div class='ctx'> 	},</div><div class='del'>-	.alias_str = "eventid=0x1,type=0x5",</div><div class='ctx'> 	.matching_pmu = "uncore_sys_cmn_pmu0",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -374,9 +354,9 @@ static int compare_alias_to_test_event(struct pmu_event_info *alias,</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!is_same(alias-&gt;str, test_event-&gt;alias_str)) {</div><div class='add'>+	if (!is_same(alias-&gt;str, test_event-&gt;event.event)) {</div><div class='ctx'> 		pr_debug("testing aliases PMU %s: mismatched str, %s vs %s\n",</div><div class='del'>-			  pmu_name, alias-&gt;str, test_event-&gt;alias_str);</div><div class='add'>+			  pmu_name, alias-&gt;str, test_event-&gt;event.event);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -892,8 +872,6 @@ static int test__parsing_callback(const struct pmu_metric *pm,</div><div class='ctx'> 	evlist__alloc_aggr_stats(evlist, 1);</div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='ctx'> 		evsel-&gt;stats-&gt;aggr-&gt;counts.val = k;</div><div class='del'>-		if (evsel__name_is(evsel, "duration_time"))</div><div class='del'>-			update_stats(&amp;walltime_nsecs_stats, k);</div><div class='ctx'> 		k++;</div><div class='ctx'> 	}</div><div class='ctx'> 	evlist__for_each_entry(evlist, evsel) {</div><div class='head'>diff --git a/tools/perf/tests/pmu.c b/tools/perf/tests/pmu.c<br/>index 4a9f8e090cf4..cbded2c6faa4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/pmu.c</a></div><div class='hunk'>@@ -169,8 +169,7 @@ static int test__pmu_format(struct test_suite *test __maybe_unused, int subtest</div><div class='ctx'> 	parse_events_terms__init(&amp;terms);</div><div class='ctx'> 	if (parse_events_terms(&amp;terms,</div><div class='ctx'> 				"krava01=15,krava02=170,krava03=1,krava11=27,krava12=1,"</div><div class='del'>-				"krava13=2,krava21=119,krava22=11,krava23=2",</div><div class='del'>-				NULL)) {</div><div class='add'>+				"krava13=2,krava21=119,krava22=11,krava23=2")) {</div><div class='ctx'> 		pr_err("Term parsing failed\n");</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/tools/perf/tests/python-use.c b/tools/perf/tests/python-use.c<br/>deleted file mode 100644<br/>index 0ebc22ac8d5b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/python-use.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/python-use.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Just test if we can load the python binding.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include "tests.h"</div><div class='del'>-#include "util/debug.h"</div><div class='del'>-</div><div class='del'>-static int test__python_use(struct test_suite *test __maybe_unused, int subtest __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	char *cmd;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (asprintf(&amp;cmd, "echo \"import sys ; sys.path.insert(0, '%s'); import perf\" | %s %s",</div><div class='del'>-		     PYTHONPATH, PYTHON, verbose &gt; 0 ? "" : "2&gt; /dev/null") &lt; 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	pr_debug("python usage test: \"%s\"\n", cmd);</div><div class='del'>-	ret = system(cmd) ? -1 : 0;</div><div class='del'>-	free(cmd);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_SUITE("'import perf' in python", python_use);</div><div class='head'>diff --git a/tools/perf/tests/shell/amd-ibs-swfilt.sh b/tools/perf/tests/shell/amd-ibs-swfilt.sh<br/>index 7045ec72ba4c..e7f66df05c4b 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/amd-ibs-swfilt.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/amd-ibs-swfilt.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/amd-ibs-swfilt.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/amd-ibs-swfilt.sh</a></div><div class='hunk'>@@ -1,6 +1,10 @@</div><div class='ctx'> #!/bin/bash</div><div class='ctx'> # AMD IBS software filtering</div><div class='ctx'> </div><div class='add'>+ParanoidAndNotRoot() {</div><div class='add'>+  [ "$(id -u)" != 0 ] &amp;&amp; [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ]</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> echo "check availability of IBS swfilt"</div><div class='ctx'> </div><div class='ctx'> # check if IBS PMU is available</div><div class='hunk'>@@ -16,6 +20,7 @@ if [ ! -f /sys/bus/event_source/devices/ibs_op/format/swfilt ]; then</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> echo "run perf record with modifier and swfilt"</div><div class='add'>+err=0</div><div class='ctx'> </div><div class='ctx'> # setting any modifiers should fail</div><div class='ctx'> perf record -B -e ibs_op//u -o /dev/null true 2&gt; /dev/null</div><div class='hunk'>@@ -31,11 +36,17 @@ if [ $? -ne 0 ]; then</div><div class='ctx'>     exit 1</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-# setting it with swfilt=1 should be fine</div><div class='del'>-perf record -B -e ibs_op/swfilt=1/k -o /dev/null true</div><div class='del'>-if [ $? -ne 0 ]; then</div><div class='del'>-    echo "[FAIL] IBS op PMU cannot handle swfilt for exclude_user"</div><div class='del'>-    exit 1</div><div class='add'>+if ! ParanoidAndNotRoot 1</div><div class='add'>+then</div><div class='add'>+    # setting it with swfilt=1 should be fine</div><div class='add'>+    perf record -B -e ibs_op/swfilt=1/k -o /dev/null true</div><div class='add'>+    if [ $? -ne 0 ]; then</div><div class='add'>+        echo "[FAIL] IBS op PMU cannot handle swfilt for exclude_user"</div><div class='add'>+        exit 1</div><div class='add'>+    fi</div><div class='add'>+else</div><div class='add'>+    echo "[SKIP] not root and perf_event_paranoid too high for exclude_user"</div><div class='add'>+    err=2</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> # check ibs_fetch PMU as well</div><div class='hunk'>@@ -46,10 +57,16 @@ if [ $? -ne 0 ]; then</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> # check system wide recording</div><div class='del'>-perf record -aB --synth=no -e ibs_op/swfilt/k -o /dev/null true</div><div class='del'>-if [ $? -ne 0 ]; then</div><div class='del'>-    echo "[FAIL] IBS op PMU cannot handle swfilt in system-wide mode"</div><div class='del'>-    exit 1</div><div class='add'>+if ! ParanoidAndNotRoot 0</div><div class='add'>+then</div><div class='add'>+    perf record -aB --synth=no -e ibs_op/swfilt/k -o /dev/null true</div><div class='add'>+    if [ $? -ne 0 ]; then</div><div class='add'>+        echo "[FAIL] IBS op PMU cannot handle swfilt in system-wide mode"</div><div class='add'>+        exit 1</div><div class='add'>+    fi</div><div class='add'>+else</div><div class='add'>+    echo "[SKIP] not root and perf_event_paranoid too high for system-wide/exclude_user"</div><div class='add'>+    err=2</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> echo "check number of samples with swfilt"</div><div class='hunk'>@@ -60,8 +77,16 @@ if [ ${kernel_sample} -ne 0 ]; then</div><div class='ctx'>     exit 1</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-user_sample=$(perf record -e ibs_fetch/swfilt/k -o- true | perf script -i- -F misc | grep -c ^U)</div><div class='del'>-if [ ${user_sample} -ne 0 ]; then</div><div class='del'>-    echo "[FAIL] unexpected user samples: " ${user_sample}</div><div class='del'>-    exit 1</div><div class='add'>+if ! ParanoidAndNotRoot 1</div><div class='add'>+then</div><div class='add'>+    user_sample=$(perf record -e ibs_fetch/swfilt/k -o- true | perf script -i- -F misc | grep -c ^U)</div><div class='add'>+    if [ ${user_sample} -ne 0 ]; then</div><div class='add'>+        echo "[FAIL] unexpected user samples: " ${user_sample}</div><div class='add'>+        exit 1</div><div class='add'>+    fi</div><div class='add'>+else</div><div class='add'>+    echo "[SKIP] not root and perf_event_paranoid too high for exclude_user"</div><div class='add'>+    err=2</div><div class='ctx'> fi</div><div class='add'>+</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/attr/test-stat-default b/tools/perf/tests/shell/attr/test-stat-default<br/>index e47fb4944679..8dd27c1fb661 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-default?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-default</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-default?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/attr/test-stat-default</a></div><div class='hunk'>@@ -227,3 +227,10 @@ fd=28</div><div class='ctx'> type=4</div><div class='ctx'> config=270</div><div class='ctx'> optional=1</div><div class='add'>+</div><div class='add'>+# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING</div><div class='add'>+[event29:base-stat]</div><div class='add'>+fd=29</div><div class='add'>+type=4</div><div class='add'>+config=4269</div><div class='add'>+optional=1
\ No newline at end of file</div><div class='head'>diff --git a/tools/perf/tests/shell/attr/test-stat-detailed-1 b/tools/perf/tests/shell/attr/test-stat-detailed-1<br/>index 3d500d3e0c5c..12a2ebf4e64a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-1?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-1</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-1?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/attr/test-stat-detailed-1</a></div><div class='hunk'>@@ -269,3 +269,10 @@ fd=32</div><div class='ctx'> type=3</div><div class='ctx'> config=65538</div><div class='ctx'> optional=1</div><div class='add'>+</div><div class='add'>+# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING</div><div class='add'>+[event33:base-stat]</div><div class='add'>+fd=33</div><div class='add'>+type=4</div><div class='add'>+config=4269</div><div class='add'>+optional=1
\ No newline at end of file</div><div class='head'>diff --git a/tools/perf/tests/shell/attr/test-stat-detailed-2 b/tools/perf/tests/shell/attr/test-stat-detailed-2<br/>index 01777a63752f..66ea25b7d38f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-2?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-2?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/attr/test-stat-detailed-2</a></div><div class='hunk'>@@ -329,3 +329,10 @@ fd=38</div><div class='ctx'> type=3</div><div class='ctx'> config=65540</div><div class='ctx'> optional=1</div><div class='add'>+</div><div class='add'>+# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING</div><div class='add'>+[event39:base-stat]</div><div class='add'>+fd=39</div><div class='add'>+type=4</div><div class='add'>+config=4269</div><div class='add'>+optional=1
\ No newline at end of file</div><div class='head'>diff --git a/tools/perf/tests/shell/attr/test-stat-detailed-3 b/tools/perf/tests/shell/attr/test-stat-detailed-3<br/>index 8400abd7e1e4..4a27bbfb9f87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-3?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/attr/test-stat-detailed-3</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/attr/test-stat-detailed-3?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/attr/test-stat-detailed-3</a></div><div class='hunk'>@@ -349,3 +349,10 @@ fd=40</div><div class='ctx'> type=3</div><div class='ctx'> config=66048</div><div class='ctx'> optional=1</div><div class='add'>+</div><div class='add'>+# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING</div><div class='add'>+[event41:base-stat]</div><div class='add'>+fd=41</div><div class='add'>+type=4</div><div class='add'>+config=4269</div><div class='add'>+optional=1
\ No newline at end of file</div><div class='head'>diff --git a/tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh b/tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh<br/>index 8226449ac5c3..f74aab5c5d7f 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_probe/test_adding_blacklisted.sh</a></div><div class='hunk'>@@ -13,11 +13,12 @@</div><div class='ctx'> #	they must be skipped.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> # skip if not supported</div><div class='ctx'> BLACKFUNC_LIST=`head -n 5 /sys/kernel/debug/kprobes/blacklist 2&gt; /dev/null | cut -f2`</div><div class='ctx'> if [ -z "$BLACKFUNC_LIST" ]; then</div><div class='hunk'>@@ -53,7 +54,8 @@ for BLACKFUNC in $BLACKFUNC_LIST; do</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> 	# check for bad DWARF polluting the result</div><div class='del'>-	../common/check_all_patterns_found.pl "$REGEX_MISSING_DECL_LINE" &gt;/dev/null &lt; $LOGS_DIR/adding_blacklisted.err</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"$REGEX_MISSING_DECL_LINE" &gt;/dev/null &lt; $LOGS_DIR/adding_blacklisted.err</div><div class='ctx'> </div><div class='ctx'> 	if [ $? -eq 0 ]; then</div><div class='ctx'> 		SKIP_DWARF=1</div><div class='hunk'>@@ -73,7 +75,11 @@ for BLACKFUNC in $BLACKFUNC_LIST; do</div><div class='ctx'> 			fi</div><div class='ctx'> 		fi</div><div class='ctx'> 	else</div><div class='del'>-		../common/check_all_lines_matched.pl "$REGEX_SKIP_MESSAGE" "$REGEX_NOT_FOUND_MESSAGE" "$REGEX_ERROR_MESSAGE" "$REGEX_SCOPE_FAIL" "$REGEX_INVALID_ARGUMENT" "$REGEX_SYMBOL_FAIL" "$REGEX_OUT_SECTION" &lt; $LOGS_DIR/adding_blacklisted.err</div><div class='add'>+		"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+			"$REGEX_SKIP_MESSAGE" "$REGEX_NOT_FOUND_MESSAGE" \</div><div class='add'>+			"$REGEX_ERROR_MESSAGE" "$REGEX_SCOPE_FAIL" \</div><div class='add'>+			"$REGEX_INVALID_ARGUMENT" "$REGEX_SYMBOL_FAIL" \</div><div class='add'>+			"$REGEX_OUT_SECTION" &lt; $LOGS_DIR/adding_blacklisted.err</div><div class='ctx'> 		CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> 		SKIP_DWARF=0</div><div class='hunk'>@@ -94,7 +100,9 @@ fi</div><div class='ctx'> $CMD_PERF list probe:\* &gt; $LOGS_DIR/adding_blacklisted_list.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_lines_matched.pl "$RE_LINE_EMPTY" "List of pre-defined events" "Metric Groups:" &lt; $LOGS_DIR/adding_blacklisted_list.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$RE_LINE_EMPTY" "List of pre-defined events" "Metric Groups:" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_blacklisted_list.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "listing blacklisted probe (should NOT be listed)"</div><div class='head'>diff --git a/tools/perf/tests/shell/base_probe/test_adding_kernel.sh b/tools/perf/tests/shell/base_probe/test_adding_kernel.sh<br/>index df288cf90cd6..555a825d55f2 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_adding_kernel.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_adding_kernel.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_adding_kernel.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_probe/test_adding_kernel.sh</a></div><div class='hunk'>@@ -13,13 +13,14 @@</div><div class='ctx'> #		and removing.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> # shellcheck source=lib/probe_vfs_getname.sh</div><div class='del'>-. "$(dirname "$0")/../lib/probe_vfs_getname.sh"</div><div class='add'>+. "$DIR_PATH/../lib/probe_vfs_getname.sh"</div><div class='ctx'> </div><div class='ctx'> TEST_PROBE=${TEST_PROBE:-"inode_permission"}</div><div class='ctx'> </div><div class='hunk'>@@ -44,7 +45,9 @@ for opt in "" "-a" "--add"; do</div><div class='ctx'> 	$CMD_PERF probe $opt $TEST_PROBE 2&gt; $LOGS_DIR/adding_kernel_add$opt.err</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-	../common/check_all_patterns_found.pl "Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_add$opt.err</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" \</div><div class='add'>+		&lt; $LOGS_DIR/adding_kernel_add$opt.err</div><div class='ctx'> 	CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> 	print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "adding probe $TEST_PROBE :: $opt"</div><div class='hunk'>@@ -58,7 +61,10 @@ done</div><div class='ctx'> $CMD_PERF list probe:\* &gt; $LOGS_DIR/adding_kernel_list.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_lines_matched.pl "$RE_LINE_EMPTY" "List of pre-defined events" "probe:${TEST_PROBE}(?:_\d+)?\s+\[Tracepoint event\]" "Metric Groups:" &lt; $LOGS_DIR/adding_kernel_list.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$RE_LINE_EMPTY" "List of pre-defined events" \</div><div class='add'>+	"probe:${TEST_PROBE}(?:_\d+)?\s+\[Tracepoint event\]" \</div><div class='add'>+	"Metric Groups:" &lt; $LOGS_DIR/adding_kernel_list.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "listing added probe :: perf list"</div><div class='hunk'>@@ -71,7 +77,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "listing added probe :: perf list</div><div class='ctx'> $CMD_PERF probe -l &gt; $LOGS_DIR/adding_kernel_list-l.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "\s*probe:${TEST_PROBE}(?:_\d+)?\s+\(on ${TEST_PROBE}(?:[:\+]$RE_NUMBER_HEX)?@.+\)" &lt; $LOGS_DIR/adding_kernel_list-l.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"\s*probe:${TEST_PROBE}(?:_\d+)?\s+\(on ${TEST_PROBE}(?:[:\+]$RE_NUMBER_HEX)?@.+\)" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_list-l.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> if [ $NO_DEBUGINFO ] ; then</div><div class='hunk'>@@ -93,9 +101,13 @@ REGEX_STAT_VALUES="\s*\d+\s+probe:$TEST_PROBE"</div><div class='ctx'> # the value should be greater than 1</div><div class='ctx'> REGEX_STAT_VALUE_NONZERO="\s*[1-9][0-9]*\s+probe:$TEST_PROBE"</div><div class='ctx'> REGEX_STAT_TIME="\s*$RE_NUMBER\s+seconds (?:time elapsed|user|sys)"</div><div class='del'>-../common/check_all_lines_matched.pl "$REGEX_STAT_HEADER" "$REGEX_STAT_VALUES" "$REGEX_STAT_TIME" "$RE_LINE_COMMENT" "$RE_LINE_EMPTY" &lt; $LOGS_DIR/adding_kernel_using_probe.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$REGEX_STAT_HEADER" "$REGEX_STAT_VALUES" "$REGEX_STAT_TIME" \</div><div class='add'>+	"$RE_LINE_COMMENT" "$RE_LINE_EMPTY" &lt; $LOGS_DIR/adding_kernel_using_probe.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_STAT_HEADER" "$REGEX_STAT_VALUE_NONZERO" "$REGEX_STAT_TIME" &lt; $LOGS_DIR/adding_kernel_using_probe.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_STAT_HEADER" "$REGEX_STAT_VALUE_NONZERO" "$REGEX_STAT_TIME" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_using_probe.log</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "using added probe"</div><div class='hunk'>@@ -108,7 +120,8 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "using added probe"</div><div class='ctx'> $CMD_PERF probe -d $TEST_PROBE\* 2&gt; $LOGS_DIR/adding_kernel_removing.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_lines_matched.pl "Removed event: probe:$TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_removing.err</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"Removed event: probe:$TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_removing.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "deleting added probe"</div><div class='hunk'>@@ -121,7 +134,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "deleting added probe"</div><div class='ctx'> $CMD_PERF list probe:\* &gt; $LOGS_DIR/adding_kernel_list_removed.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_lines_matched.pl "$RE_LINE_EMPTY" "List of pre-defined events" "Metric Groups:" &lt; $LOGS_DIR/adding_kernel_list_removed.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$RE_LINE_EMPTY" "List of pre-defined events" "Metric Groups:" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_list_removed.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "listing removed probe (should NOT be listed)"</div><div class='hunk'>@@ -135,7 +150,9 @@ $CMD_PERF probe -n --add $TEST_PROBE 2&gt; $LOGS_DIR/adding_kernel_dryrun.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> # check for the output (should be the same as usual)</div><div class='del'>-../common/check_all_patterns_found.pl "Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_dryrun.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_dryrun.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> # check that no probe was added in real</div><div class='hunk'>@@ -152,7 +169,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "dry run :: adding probe"</div><div class='ctx'> $CMD_PERF probe --add $TEST_PROBE 2&gt; $LOGS_DIR/adding_kernel_forceadd_01.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_forceadd_01.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_forceadd_01.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "force-adding probes :: first probe adding"</div><div class='hunk'>@@ -162,7 +181,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "force-adding probes :: first pro</div><div class='ctx'> ! $CMD_PERF probe --add $TEST_PROBE 2&gt; $LOGS_DIR/adding_kernel_forceadd_02.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "Error: event \"$TEST_PROBE\" already exists." "Error: Failed to add events." &lt; $LOGS_DIR/adding_kernel_forceadd_02.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Error: event \"$TEST_PROBE\" already exists." \</div><div class='add'>+	"Error: Failed to add events." &lt; $LOGS_DIR/adding_kernel_forceadd_02.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "force-adding probes :: second probe adding (without force)"</div><div class='hunk'>@@ -173,7 +194,9 @@ NO_OF_PROBES=`$CMD_PERF probe -l $TEST_PROBE| wc -l`</div><div class='ctx'> $CMD_PERF probe --force --add $TEST_PROBE 2&gt; $LOGS_DIR/adding_kernel_forceadd_03.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "Added new events?:" "probe:${TEST_PROBE}_${NO_OF_PROBES}" "on $TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_forceadd_03.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Added new events?:" "probe:${TEST_PROBE}_${NO_OF_PROBES}" \</div><div class='add'>+	"on $TEST_PROBE" &lt; $LOGS_DIR/adding_kernel_forceadd_03.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "force-adding probes :: second probe adding (with force)"</div><div class='hunk'>@@ -187,7 +210,9 @@ $CMD_PERF stat -e probe:$TEST_PROBE -e probe:${TEST_PROBE}_${NO_OF_PROBES} -x';'</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> REGEX_LINE="$RE_NUMBER;+probe:${TEST_PROBE}_?(?:$NO_OF_PROBES)?;$RE_NUMBER;$RE_NUMBER"</div><div class='del'>-../common/check_all_lines_matched.pl "$REGEX_LINE" "$RE_LINE_EMPTY" "$RE_LINE_COMMENT" &lt; $LOGS_DIR/adding_kernel_using_two.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$REGEX_LINE" "$RE_LINE_EMPTY" "$RE_LINE_COMMENT" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_using_two.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> VALUE_1=`grep "$TEST_PROBE;" $LOGS_DIR/adding_kernel_using_two.log | awk -F';' '{print $1}'`</div><div class='hunk'>@@ -205,7 +230,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "using doubled probe"</div><div class='ctx'> $CMD_PERF probe --del \* 2&gt; $LOGS_DIR/adding_kernel_removing_wildcard.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "Removed event: probe:$TEST_PROBE" "Removed event: probe:${TEST_PROBE}_1" &lt; $LOGS_DIR/adding_kernel_removing_wildcard.err</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"Removed event: probe:$TEST_PROBE" \</div><div class='add'>+	"Removed event: probe:${TEST_PROBE}_1" &lt; $LOGS_DIR/adding_kernel_removing_wildcard.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "removing multiple probes"</div><div class='hunk'>@@ -217,7 +244,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "removing multiple probes"</div><div class='ctx'> $CMD_PERF probe -nf --max-probes=512 -a 'vfs_* $params' 2&gt; $LOGS_DIR/adding_kernel_adding_wildcard.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "probe:vfs_mknod" "probe:vfs_create" "probe:vfs_rmdir" "probe:vfs_link" "probe:vfs_write" &lt; $LOGS_DIR/adding_kernel_adding_wildcard.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"probe:vfs_mknod" "probe:vfs_create" "probe:vfs_rmdir" \</div><div class='add'>+	"probe:vfs_link" "probe:vfs_write" &lt; $LOGS_DIR/adding_kernel_adding_wildcard.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> if [ $NO_DEBUGINFO ] ; then</div><div class='hunk'>@@ -240,13 +269,22 @@ test $PERF_EXIT_CODE -ne 139 -a $PERF_EXIT_CODE -ne 0</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> # check that the error message is reasonable</div><div class='del'>-../common/check_all_patterns_found.pl "Failed to find" "somenonexistingrandomstuffwhichisalsoprettylongorevenlongertoexceed64" &lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Failed to find" \</div><div class='add'>+	"somenonexistingrandomstuffwhichisalsoprettylongorevenlongertoexceed64" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_all_patterns_found.pl "in this function|at this address" "Error" "Failed to add events" &lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"in this function|at this address" "Error" "Failed to add events" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='del'>-../common/check_all_lines_matched.pl "Failed to find" "Error" "Probe point .+ not found" "optimized out" "Use.+\-\-range option to show.+location range" &lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"Failed to find" "Error" "Probe point .+ not found" "optimized out" \</div><div class='add'>+	"Use.+\-\-range option to show.+location range" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='del'>-../common/check_no_patterns_found.pl "$RE_SEGFAULT" &lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='add'>+"$DIR_PATH/../common/check_no_patterns_found.pl" \</div><div class='add'>+	"$RE_SEGFAULT" &lt; $LOGS_DIR/adding_kernel_nonexisting.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> if [ $NO_DEBUGINFO ]; then</div><div class='hunk'>@@ -264,7 +302,10 @@ fi</div><div class='ctx'> $CMD_PERF probe --add "$TEST_PROBE%return \$retval" 2&gt; $LOGS_DIR/adding_kernel_func_retval_add.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "Added new events?:" "probe:$TEST_PROBE" "on $TEST_PROBE%return with \\\$retval" &lt; $LOGS_DIR/adding_kernel_func_retval_add.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"Added new events?:" "probe:$TEST_PROBE" \</div><div class='add'>+	"on $TEST_PROBE%return with \\\$retval" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_func_retval_add.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "function with retval :: add"</div><div class='hunk'>@@ -274,7 +315,9 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "function with retval :: add"</div><div class='ctx'> $CMD_PERF record -e probe:$TEST_PROBE\* -o $CURRENT_TEST_DIR/perf.data -- cat /proc/cpuinfo &gt; /dev/null 2&gt; $LOGS_DIR/adding_kernel_func_retval_record.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "$RE_LINE_RECORD1" "$RE_LINE_RECORD2" &lt; $LOGS_DIR/adding_kernel_func_retval_record.err</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$RE_LINE_RECORD1" "$RE_LINE_RECORD2" \</div><div class='add'>+	&lt; $LOGS_DIR/adding_kernel_func_retval_record.err</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "function with retval :: record"</div><div class='hunk'>@@ -285,9 +328,11 @@ $CMD_PERF script -i $CURRENT_TEST_DIR/perf.data &gt; $LOGS_DIR/adding_kernel_func_r</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> REGEX_SCRIPT_LINE="\s*cat\s+$RE_NUMBER\s+\[$RE_NUMBER\]\s+$RE_NUMBER:\s+probe:$TEST_PROBE\w*:\s+\($RE_NUMBER_HEX\s+&lt;\-\s+$RE_NUMBER_HEX\)\s+arg1=$RE_NUMBER_HEX"</div><div class='del'>-../common/check_all_lines_matched.pl "$REGEX_SCRIPT_LINE" &lt; $LOGS_DIR/adding_kernel_func_retval_script.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$REGEX_SCRIPT_LINE" &lt; $LOGS_DIR/adding_kernel_func_retval_script.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_SCRIPT_LINE" &lt; $LOGS_DIR/adding_kernel_func_retval_script.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_SCRIPT_LINE" &lt; $LOGS_DIR/adding_kernel_func_retval_script.log</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "function argument probing :: script"</div><div class='head'>diff --git a/tools/perf/tests/shell/base_probe/test_basic.sh b/tools/perf/tests/shell/base_probe/test_basic.sh<br/>index 9d8b5afbeddd..162838ddc974 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_basic.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_basic.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_basic.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_probe/test_basic.sh</a></div><div class='hunk'>@@ -12,11 +12,12 @@</div><div class='ctx'> #		This test tests basic functionality of perf probe command.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> if ! check_kprobes_available; then</div><div class='ctx'> 	print_overall_skipped</div><div class='ctx'> 	exit 2</div><div class='hunk'>@@ -30,15 +31,25 @@ if [ "$PARAM_GENERAL_HELP_TEXT_CHECK" = "y" ]; then</div><div class='ctx'> 	$CMD_PERF probe --help &gt; $LOGS_DIR/basic_helpmsg.log 2&gt; $LOGS_DIR/basic_helpmsg.err</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-	../common/check_all_patterns_found.pl "PERF-PROBE" "NAME" "SYNOPSIS" "DESCRIPTION" "OPTIONS" "PROBE\s+SYNTAX" "PROBE\s+ARGUMENT" "LINE\s+SYNTAX" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"PERF-PROBE" "NAME" "SYNOPSIS" "DESCRIPTION" "OPTIONS" \</div><div class='add'>+		"PROBE\s+SYNTAX" "PROBE\s+ARGUMENT" "LINE\s+SYNTAX" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	CHECK_EXIT_CODE=$?</div><div class='del'>-	../common/check_all_patterns_found.pl "LAZY\s+MATCHING" "FILTER\s+PATTERN" "EXAMPLES" "SEE\s+ALSO" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"LAZY\s+MATCHING" "FILTER\s+PATTERN" "EXAMPLES" "SEE\s+ALSO" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "vmlinux" "module=" "source=" "verbose" "quiet" "add=" "del=" "list.*EVENT" "line=" "vars=" "externs" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"vmlinux" "module=" "source=" "verbose" "quiet" "add=" "del=" \</div><div class='add'>+		"list.*EVENT" "line=" "vars=" "externs" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "no-inlines" "funcs.*FILTER" "filter=FILTER" "force" "dry-run" "max-probes" "exec=" "demangle-kernel" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"no-inlines" "funcs.*FILTER" "filter=FILTER" "force" "dry-run" \</div><div class='add'>+		"max-probes" "exec=" "demangle-kernel" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_no_patterns_found.pl "No manual entry for" &lt; $LOGS_DIR/basic_helpmsg.err</div><div class='add'>+	"$DIR_PATH/../common/check_no_patterns_found.pl" \</div><div class='add'>+		"No manual entry for" &lt; $LOGS_DIR/basic_helpmsg.err</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> 	print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "help message"</div><div class='hunk'>@@ -53,7 +64,9 @@ fi</div><div class='ctx'> # without any args perf-probe should print usage</div><div class='ctx'> $CMD_PERF probe 2&gt; $LOGS_DIR/basic_usage.log &gt; /dev/null</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "[Uu]sage" "perf probe" "verbose" "quiet" "add" "del" "force" "line" "vars" "externs" "range" &lt; $LOGS_DIR/basic_usage.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"[Uu]sage" "perf probe" "verbose" "quiet" "add" "del" "force" \</div><div class='add'>+	"line" "vars" "externs" "range" &lt; $LOGS_DIR/basic_usage.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results 0 $CHECK_EXIT_CODE "usage message"</div><div class='head'>diff --git a/tools/perf/tests/shell/base_probe/test_invalid_options.sh b/tools/perf/tests/shell/base_probe/test_invalid_options.sh<br/>index 92f7254eb32a..44a3ae014bfa 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_invalid_options.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_invalid_options.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_invalid_options.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_probe/test_invalid_options.sh</a></div><div class='hunk'>@@ -12,11 +12,12 @@</div><div class='ctx'> #		This test checks whether the invalid and incompatible options are reported</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> if ! check_kprobes_available; then</div><div class='ctx'> 	print_overall_skipped</div><div class='ctx'> 	exit 2</div><div class='hunk'>@@ -33,7 +34,9 @@ for opt in '-a' '-d' '-L' '-V'; do</div><div class='ctx'> 	! $CMD_PERF probe $opt 2&gt; $LOGS_DIR/invalid_options_missing_argument$opt.err</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-	../common/check_all_patterns_found.pl "Error: switch .* requires a value" &lt; $LOGS_DIR/invalid_options_missing_argument$opt.err</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"Error: switch .* requires a value" \</div><div class='add'>+		&lt; $LOGS_DIR/invalid_options_missing_argument$opt.err</div><div class='ctx'> 	CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> 	print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "missing argument for $opt"</div><div class='hunk'>@@ -66,7 +69,8 @@ for opt in '-a xxx -d xxx' '-a xxx -L foo' '-a xxx -V foo' '-a xxx -l' '-a xxx -</div><div class='ctx'> 	! $CMD_PERF probe $opt &gt; /dev/null 2&gt; $LOGS_DIR/aux.log</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-	../common/check_all_patterns_found.pl "Error: switch .+ cannot be used with switch .+" &lt; $LOGS_DIR/aux.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"Error: switch .+ cannot be used with switch .+" &lt; $LOGS_DIR/aux.log</div><div class='ctx'> 	CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> 	print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "mutually exclusive options :: $opt"</div><div class='head'>diff --git a/tools/perf/tests/shell/base_probe/test_line_semantics.sh b/tools/perf/tests/shell/base_probe/test_line_semantics.sh<br/>index 20435b6bf6bc..576442d87a44 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_line_semantics.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_probe/test_line_semantics.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_probe/test_line_semantics.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_probe/test_line_semantics.sh</a></div><div class='hunk'>@@ -13,11 +13,12 @@</div><div class='ctx'> #		arguments are properly reported.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> if ! check_kprobes_available; then</div><div class='ctx'> 	print_overall_skipped</div><div class='ctx'> 	exit 2</div><div class='head'>diff --git a/tools/perf/tests/shell/base_report/setup.sh b/tools/perf/tests/shell/base_report/setup.sh<br/>index 8634e7e0dda6..bb49b0fabb11 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_report/setup.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_report/setup.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_report/setup.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_report/setup.sh</a></div><div class='hunk'>@@ -12,8 +12,10 @@</div><div class='ctx'> #</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='add'>+</div><div class='ctx'> # include working environment</div><div class='del'>-. ../common/init.sh</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='ctx'> </div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +26,8 @@ SW_EVENT="cpu-clock"</div><div class='ctx'> $CMD_PERF record -asdg -e $SW_EVENT -o $CURRENT_TEST_DIR/perf.data -- $CMD_LONGER_SLEEP 2&gt; $LOGS_DIR/setup.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "$RE_LINE_RECORD1" "$RE_LINE_RECORD2" &lt; $LOGS_DIR/setup.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$RE_LINE_RECORD1" "$RE_LINE_RECORD2" &lt; $LOGS_DIR/setup.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "prepare the perf.data file"</div><div class='hunk'>@@ -38,7 +41,8 @@ echo ==================</div><div class='ctx'> cat $LOGS_DIR/setup-latency.log</div><div class='ctx'> echo ==================</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "$RE_LINE_RECORD1" "$RE_LINE_RECORD2" &lt; $LOGS_DIR/setup-latency.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$RE_LINE_RECORD1" "$RE_LINE_RECORD2" &lt; $LOGS_DIR/setup-latency.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "prepare the perf.data.1 file"</div><div class='head'>diff --git a/tools/perf/tests/shell/base_report/test_basic.sh b/tools/perf/tests/shell/base_report/test_basic.sh<br/>index adfd8713b8f8..0dfe7e5fd1ca 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_report/test_basic.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/base_report/test_basic.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/base_report/test_basic.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/base_report/test_basic.sh</a></div><div class='hunk'>@@ -12,11 +12,12 @@</div><div class='ctx'> #</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-# include working environment</div><div class='del'>-. ../common/init.sh</div><div class='del'>-</div><div class='add'>+DIR_PATH="$(dirname $0)"</div><div class='ctx'> TEST_RESULT=0</div><div class='ctx'> </div><div class='add'>+# include working environment</div><div class='add'>+. "$DIR_PATH/../common/init.sh"</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> ### help message</div><div class='ctx'> </div><div class='hunk'>@@ -25,19 +26,37 @@ if [ "$PARAM_GENERAL_HELP_TEXT_CHECK" = "y" ]; then</div><div class='ctx'> 	$CMD_PERF report --help &gt; $LOGS_DIR/basic_helpmsg.log 2&gt; $LOGS_DIR/basic_helpmsg.err</div><div class='ctx'> 	PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-	../common/check_all_patterns_found.pl "PERF-REPORT" "NAME" "SYNOPSIS" "DESCRIPTION" "OPTIONS" "OVERHEAD\s+CALCULATION" "SEE ALSO" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"PERF-REPORT" "NAME" "SYNOPSIS" "DESCRIPTION" "OPTIONS" \</div><div class='add'>+		"OVERHEAD\s+CALCULATION" "SEE ALSO" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	CHECK_EXIT_CODE=$?</div><div class='del'>-	../common/check_all_patterns_found.pl "input" "verbose" "show-nr-samples" "show-cpu-utilization" "threads" "comms" "pid" "tid" "dsos" "symbols" "symbol-filter" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"input" "verbose" "show-nr-samples" "show-cpu-utilization" \</div><div class='add'>+		"threads" "comms" "pid" "tid" "dsos" "symbols" "symbol-filter" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "hide-unresolved" "sort" "fields" "parent" "exclude-other" "column-widths" "field-separator" "dump-raw-trace" "children" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"hide-unresolved" "sort" "fields" "parent" "exclude-other" \</div><div class='add'>+		"column-widths" "field-separator" "dump-raw-trace" "children" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "call-graph" "max-stack" "inverted" "ignore-callees" "pretty" "stdio" "tui" "gtk" "vmlinux" "kallsyms" "modules" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"call-graph" "max-stack" "inverted" "ignore-callees" "pretty" \</div><div class='add'>+		"stdio" "tui" "gtk" "vmlinux" "kallsyms" "modules" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "force" "symfs" "cpu" "disassembler-style" "source" "asm-raw" "show-total-period" "show-info" "branch-stack" "group" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"force" "symfs" "cpu" "disassembler-style" "source" "asm-raw" \</div><div class='add'>+		"show-total-period" "show-info" "branch-stack" "group" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_all_patterns_found.pl "branch-history" "objdump" "demangle" "percent-limit" "percentage" "header" "itrace" "full-source-path" "show-ref-call-graph" &lt; $LOGS_DIR/basic_helpmsg.log</div><div class='add'>+	"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+		"branch-history" "objdump" "demangle" "percent-limit" "percentage" \</div><div class='add'>+		"header" "itrace" "full-source-path" "show-ref-call-graph" \</div><div class='add'>+		&lt; $LOGS_DIR/basic_helpmsg.log</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='del'>-	../common/check_no_patterns_found.pl "No manual entry for" &lt; $LOGS_DIR/basic_helpmsg.err</div><div class='add'>+	"$DIR_PATH/../common/check_no_patterns_found.pl" \</div><div class='add'>+		"No manual entry for" &lt; $LOGS_DIR/basic_helpmsg.err</div><div class='ctx'> 	(( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> 	print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "help message"</div><div class='hunk'>@@ -57,9 +76,12 @@ REGEX_LOST_SAMPLES_INFO="#\s*Total Lost Samples:\s+$RE_NUMBER"</div><div class='ctx'> REGEX_SAMPLES_INFO="#\s*Samples:\s+(?:$RE_NUMBER)\w?\s+of\s+event\s+'$RE_EVENT_ANY'"</div><div class='ctx'> REGEX_LINES_HEADER="#\s*Children\s+Self\s+Command\s+Shared Object\s+Symbol"</div><div class='ctx'> REGEX_LINES="\s*$RE_NUMBER%\s+$RE_NUMBER%\s+\S+\s+\[kernel\.(?:vmlinux)|(?:kallsyms)\]\s+\[[k\.]\]\s+\w+"</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_LOST_SAMPLES_INFO" "$REGEX_SAMPLES_INFO" "$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_basic.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_LOST_SAMPLES_INFO" "$REGEX_SAMPLES_INFO" \</div><div class='add'>+	"$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_basic.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_basic.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_basic.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "basic execution"</div><div class='hunk'>@@ -74,9 +96,11 @@ PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> REGEX_LINES_HEADER="#\s*Children\s+Self\s+Samples\s+Command\s+Shared Object\s+Symbol"</div><div class='ctx'> REGEX_LINES="\s*$RE_NUMBER%\s+$RE_NUMBER%\s+$RE_NUMBER\s+\S+\s+\[kernel\.(?:vmlinux)|(?:kallsyms)\]\s+\[[k\.]\]\s+\w+"</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_nrsamples.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_nrsamples.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_nrsamples.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_nrsamples.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "number of samples"</div><div class='hunk'>@@ -98,7 +122,10 @@ REGEX_LINE_CPUS_ONLINE="#\s+nrcpus online\s*:\s*$MY_CPUS_ONLINE"</div><div class='ctx'> REGEX_LINE_CPUS_AVAIL="#\s+nrcpus avail\s*:\s*$MY_CPUS_AVAILABLE"</div><div class='ctx'> # disable precise check for "nrcpus avail" in BASIC runmode</div><div class='ctx'> test $PERFTOOL_TESTSUITE_RUNMODE -lt $RUNMODE_STANDARD &amp;&amp; REGEX_LINE_CPUS_AVAIL="#\s+nrcpus avail\s*:\s*$RE_NUMBER"</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_LINE_TIMESTAMP" "$REGEX_LINE_HOSTNAME" "$REGEX_LINE_KERNEL" "$REGEX_LINE_PERF" "$REGEX_LINE_ARCH" "$REGEX_LINE_CPUS_ONLINE" "$REGEX_LINE_CPUS_AVAIL" &lt; $LOGS_DIR/basic_header.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_LINE_TIMESTAMP" "$REGEX_LINE_HOSTNAME" "$REGEX_LINE_KERNEL" \</div><div class='add'>+	"$REGEX_LINE_PERF" "$REGEX_LINE_ARCH" "$REGEX_LINE_CPUS_ONLINE" \</div><div class='add'>+	"$REGEX_LINE_CPUS_AVAIL" &lt; $LOGS_DIR/basic_header.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "header"</div><div class='hunk'>@@ -129,9 +156,11 @@ PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> REGEX_LINES_HEADER="#\s*Children\s+Self\s+sys\s+usr\s+Command\s+Shared Object\s+Symbol"</div><div class='ctx'> REGEX_LINES="\s*$RE_NUMBER%\s+$RE_NUMBER%\s+$RE_NUMBER%\s+$RE_NUMBER%\s+\S+\s+\[kernel\.(?:vmlinux)|(?:kallsyms)\]\s+\[[k\.]\]\s+\w+"</div><div class='del'>-../common/check_all_patterns_found.pl "$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_cpuut.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"$REGEX_LINES_HEADER" "$REGEX_LINES" &lt; $LOGS_DIR/basic_cpuut.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_cpuut.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_cpuut.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "show CPU utilization"</div><div class='hunk'>@@ -144,9 +173,11 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "show CPU utilization"</div><div class='ctx'> $CMD_PERF report --stdio -i $CURRENT_TEST_DIR/perf.data --pid=1 &gt; $LOGS_DIR/basic_pid.log 2&gt; $LOGS_DIR/basic_pid.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-grep -P -v '^#' $LOGS_DIR/basic_pid.log | grep -P '\s+[\d\.]+%' | ../common/check_all_lines_matched.pl "systemd|init"</div><div class='add'>+grep -P -v '^#' $LOGS_DIR/basic_pid.log | grep -P '\s+[\d\.]+%' | \</div><div class='add'>+	"$DIR_PATH/../common/check_all_lines_matched.pl" "systemd|init"</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_pid.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_pid.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "pid"</div><div class='hunk'>@@ -159,9 +190,11 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "pid"</div><div class='ctx'> $CMD_PERF report --stdio -i $CURRENT_TEST_DIR/perf.data --symbols=dummynonexistingsymbol &gt; $LOGS_DIR/basic_symbols.log 2&gt; $LOGS_DIR/basic_symbols.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_lines_matched.pl "$RE_LINE_EMPTY" "$RE_LINE_COMMENT" &lt; $LOGS_DIR/basic_symbols.log</div><div class='add'>+"$DIR_PATH/../common/check_all_lines_matched.pl" \</div><div class='add'>+	"$RE_LINE_EMPTY" "$RE_LINE_COMMENT" &lt; $LOGS_DIR/basic_symbols.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_symbols.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_symbols.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "non-existing symbol"</div><div class='hunk'>@@ -174,9 +207,11 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "non-existing symbol"</div><div class='ctx'> $CMD_PERF report --stdio -i $CURRENT_TEST_DIR/perf.data --symbol-filter=map &gt; $LOGS_DIR/basic_symbolfilter.log 2&gt; $LOGS_DIR/basic_symbolfilter.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-grep -P -v '^#' $LOGS_DIR/basic_symbolfilter.log | grep -P '\s+[\d\.]+%' | ../common/check_all_lines_matched.pl "\[[k\.]\]\s+.*map"</div><div class='add'>+grep -P -v '^#' $LOGS_DIR/basic_symbolfilter.log | grep -P '\s+[\d\.]+%' | \</div><div class='add'>+	"$DIR_PATH/../common/check_all_lines_matched.pl" "\[[k\.]\]\s+.*map"</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/basic_symbolfilter.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"$DIR_PATH/stderr-whitelist.txt" &lt; $LOGS_DIR/basic_symbolfilter.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "symbol filter"</div><div class='hunk'>@@ -189,7 +224,8 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "symbol filter"</div><div class='ctx'> $CMD_PERF report -i $CURRENT_TEST_DIR/perf.data.1 --stdio --header-only &gt; $LOGS_DIR/latency_header.log</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl ", context_switch = 1, " &lt; $LOGS_DIR/latency_header.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	", context_switch = 1, " &lt; $LOGS_DIR/latency_header.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "latency header"</div><div class='hunk'>@@ -200,9 +236,11 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "latency header"</div><div class='ctx'> $CMD_PERF report --stdio -i $CURRENT_TEST_DIR/perf.data.1 &gt; $LOGS_DIR/latency_default.log 2&gt; $LOGS_DIR/latency_default.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "# Overhead   Latency  Command" &lt; $LOGS_DIR/latency_default.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"# Overhead   Latency  Command" &lt; $LOGS_DIR/latency_default.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/latency_default.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"stderr-whitelist.txt" &lt; $LOGS_DIR/latency_default.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "default report for latency profile"</div><div class='hunk'>@@ -213,9 +251,11 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "default report for latency profi</div><div class='ctx'> $CMD_PERF report --latency --stdio -i $CURRENT_TEST_DIR/perf.data.1 &gt; $LOGS_DIR/latency_latency.log 2&gt; $LOGS_DIR/latency_latency.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "#  Latency  Overhead  Command" &lt; $LOGS_DIR/latency_latency.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"#  Latency  Overhead  Command" &lt; $LOGS_DIR/latency_latency.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/latency_latency.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"stderr-whitelist.txt" &lt; $LOGS_DIR/latency_latency.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "latency report for latency profile"</div><div class='hunk'>@@ -226,9 +266,12 @@ print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "latency report for latency profi</div><div class='ctx'> $CMD_PERF report --hierarchy --sort latency,parallelism,comm,symbol --parallelism=1,2 --stdio -i $CURRENT_TEST_DIR/perf.data.1 &gt; $LOGS_DIR/parallelism_hierarchy.log 2&gt; $LOGS_DIR/parallelism_hierarchy.err</div><div class='ctx'> PERF_EXIT_CODE=$?</div><div class='ctx'> </div><div class='del'>-../common/check_all_patterns_found.pl "#           Latency  Parallelism / Command / Symbol" &lt; $LOGS_DIR/parallelism_hierarchy.log</div><div class='add'>+"$DIR_PATH/../common/check_all_patterns_found.pl" \</div><div class='add'>+	"#           Latency  Parallelism / Command / Symbol" \</div><div class='add'>+	&lt; $LOGS_DIR/parallelism_hierarchy.log</div><div class='ctx'> CHECK_EXIT_CODE=$?</div><div class='del'>-../common/check_errors_whitelisted.pl "stderr-whitelist.txt" &lt; $LOGS_DIR/parallelism_hierarchy.err</div><div class='add'>+"$DIR_PATH/../common/check_errors_whitelisted.pl" \</div><div class='add'>+	"stderr-whitelist.txt" &lt; $LOGS_DIR/parallelism_hierarchy.err</div><div class='ctx'> (( CHECK_EXIT_CODE += $? ))</div><div class='ctx'> </div><div class='ctx'> print_results $PERF_EXIT_CODE $CHECK_EXIT_CODE "parallelism histogram"</div><div class='head'>diff --git a/tools/perf/tests/shell/buildid.sh b/tools/perf/tests/shell/buildid.sh<br/>index d2eb213da01d..102808cca9db 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/buildid.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/buildid.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/buildid.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/buildid.sh</a></div><div class='hunk'>@@ -36,16 +36,69 @@ if [ ${run_pe} -eq 1 ]; then</div><div class='ctx'> 	unset WAYLAND_DISPLAY</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-ex_md5=$(mktemp /tmp/perf.ex.MD5.XXX)</div><div class='del'>-ex_sha1=$(mktemp /tmp/perf.ex.SHA1.XXX)</div><div class='add'>+build_id_dir=</div><div class='add'>+ex_source=$(mktemp /tmp/perf_buildid_test.ex.XXX.c)</div><div class='add'>+ex_md5=$(mktemp /tmp/perf_buildid_test.ex.MD5.XXX)</div><div class='add'>+ex_sha1=$(mktemp /tmp/perf_buildid_test.ex.SHA1.XXX)</div><div class='ctx'> ex_pe=$(dirname $0)/../pe-file.exe</div><div class='add'>+data=$(mktemp /tmp/perf_buildid_test.data.XXX)</div><div class='add'>+log_out=$(mktemp /tmp/perf_buildid_test.log.out.XXX)</div><div class='add'>+log_err=$(mktemp /tmp/perf_buildid_test.log.err.XXX)</div><div class='ctx'> </div><div class='del'>-echo 'int main(void) { return 0; }' | cc -Wl,--build-id=sha1 -o ${ex_sha1} -x c -</div><div class='del'>-echo 'int main(void) { return 0; }' | cc -Wl,--build-id=md5 -o ${ex_md5} -x c -</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f ${ex_source} ${ex_md5} ${ex_sha1} ${data} ${log_out} ${log_err}</div><div class='add'>+	if [ ${run_pe} -eq 1 ]; then</div><div class='add'>+		rm -r ${wineprefix}</div><div class='add'>+	fi</div><div class='add'>+        if [ -d ${build_id_dir} ]; then</div><div class='add'>+		rm -rf ${build_id_dir}</div><div class='add'>+        fi</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+# Test program based on the noploop workload.</div><div class='add'>+cat &lt;&lt;EOF &gt; ${ex_source}</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='ctx'> </div><div class='add'>+static volatile sig_atomic_t done;</div><div class='add'>+</div><div class='add'>+static void sighandler(int sig)</div><div class='add'>+{</div><div class='add'>+	(void)sig;</div><div class='add'>+	done = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int main(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	int sec = 1;</div><div class='add'>+</div><div class='add'>+	if (argc &gt; 1)</div><div class='add'>+		sec = atoi(argv[1]);</div><div class='add'>+</div><div class='add'>+	signal(SIGINT, sighandler);</div><div class='add'>+	signal(SIGALRM, sighandler);</div><div class='add'>+	alarm(sec);</div><div class='add'>+</div><div class='add'>+	while (!done)</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EOF</div><div class='add'>+cc -Wl,--build-id=sha1 ${ex_source} -o ${ex_sha1} -x c -</div><div class='add'>+cc -Wl,--build-id=md5 ${ex_source} -o ${ex_md5} -x c -</div><div class='ctx'> echo "test binaries: ${ex_sha1} ${ex_md5} ${ex_pe}"</div><div class='ctx'> </div><div class='del'>-check()</div><div class='add'>+get_build_id()</div><div class='ctx'> {</div><div class='ctx'> 	case $1 in</div><div class='ctx'> 	*.exe)</div><div class='hunk'>@@ -64,6 +117,15 @@ check()</div><div class='ctx'> 		id=`readelf -n ${1} 2&gt;/dev/null | grep 'Build ID' | awk '{print $3}'`</div><div class='ctx'> 		;;</div><div class='ctx'> 	esac</div><div class='add'>+	echo ${id}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+check()</div><div class='add'>+{</div><div class='add'>+	file=$1</div><div class='add'>+	perf_data=$2</div><div class='add'>+</div><div class='add'>+	id=$(get_build_id $file)</div><div class='ctx'> 	echo "build id: ${id}"</div><div class='ctx'> </div><div class='ctx'> 	id_file=${id#??}</div><div class='hunk'>@@ -76,45 +138,53 @@ check()</div><div class='ctx'> 		exit 1</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='del'>-	file=${build_id_dir}/.build-id/$id_dir/`readlink ${link}`/elf</div><div class='del'>-	echo "file: ${file}"</div><div class='add'>+	cached_file=${build_id_dir}/.build-id/$id_dir/`readlink ${link}`/elf</div><div class='add'>+	echo "file: ${cached_file}"</div><div class='ctx'> </div><div class='ctx'> 	# Check for file permission of original file</div><div class='ctx'> 	# in case of pe-file.exe file</div><div class='ctx'> 	echo $1 | grep ".exe"</div><div class='ctx'> 	if [ $? -eq 0 ]; then</div><div class='del'>-		if [ -x $1 ] &amp;&amp; [ ! -x $file ]; then</div><div class='del'>-			echo "failed: file ${file} executable does not exist"</div><div class='add'>+		if [ -x $1 ] &amp;&amp; [ ! -x $cached_file ]; then</div><div class='add'>+			echo "failed: file ${cached_file} executable does not exist"</div><div class='ctx'> 			exit 1</div><div class='ctx'> 		fi</div><div class='ctx'> </div><div class='del'>-		if [ ! -x $file ] &amp;&amp; [ ! -e $file ]; then</div><div class='del'>-			echo "failed: file ${file} does not exist"</div><div class='add'>+		if [ ! -x $cached_file ] &amp;&amp; [ ! -e $cached_file ]; then</div><div class='add'>+			echo "failed: file ${cached_file} does not exist"</div><div class='ctx'> 			exit 1</div><div class='ctx'> 		fi</div><div class='del'>-	elif [ ! -x $file ]; then</div><div class='del'>-		echo "failed: file ${file} does not exist"</div><div class='add'>+	elif [ ! -x $cached_file ]; then</div><div class='add'>+		echo "failed: file ${cached_file} does not exist"</div><div class='ctx'> 		exit 1</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='del'>-	diff ${file} ${1}</div><div class='add'>+	diff ${cached_file} ${1}</div><div class='ctx'> 	if [ $? -ne 0 ]; then</div><div class='del'>-		echo "failed: ${file} do not match"</div><div class='add'>+		echo "failed: ${cached_file} do not match"</div><div class='ctx'> 		exit 1</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='del'>-	${perf} buildid-cache -l | grep ${id}</div><div class='add'>+	${perf} buildid-cache -l | grep -q ${id}</div><div class='ctx'> 	if [ $? -ne 0 ]; then</div><div class='ctx'> 		echo "failed: ${id} is not reported by \"perf buildid-cache -l\""</div><div class='ctx'> 		exit 1</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='add'>+	if [ -n "${perf_data}" ]; then</div><div class='add'>+		${perf} buildid-list -i ${perf_data} | grep -q ${id}</div><div class='add'>+		if [ $? -ne 0 ]; then</div><div class='add'>+			echo "failed: ${id} is not reported by \"perf buildid-list -i ${perf_data}\""</div><div class='add'>+			exit 1</div><div class='add'>+		fi</div><div class='add'>+	fi</div><div class='add'>+</div><div class='ctx'> 	echo "OK for ${1}"</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> test_add()</div><div class='ctx'> {</div><div class='del'>-	build_id_dir=$(mktemp -d /tmp/perf.debug.XXX)</div><div class='add'>+	build_id_dir=$(mktemp -d /tmp/perf_buildid_test.debug.XXX)</div><div class='ctx'> 	perf="perf --buildid-dir ${build_id_dir}"</div><div class='ctx'> </div><div class='ctx'> 	${perf} buildid-cache -v -a ${1}</div><div class='hunk'>@@ -128,12 +198,88 @@ test_add()</div><div class='ctx'> 	rm -rf ${build_id_dir}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+test_remove()</div><div class='add'>+{</div><div class='add'>+	build_id_dir=$(mktemp -d /tmp/perf_buildid_test.debug.XXX)</div><div class='add'>+	perf="perf --buildid-dir ${build_id_dir}"</div><div class='add'>+</div><div class='add'>+	${perf} buildid-cache -v -a ${1}</div><div class='add'>+	if [ $? -ne 0 ]; then</div><div class='add'>+		echo "failed: add ${1} to build id cache"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	id=$(get_build_id ${1})</div><div class='add'>+	if ! ${perf} buildid-cache -l | grep -q ${id}; then</div><div class='add'>+		echo "failed: ${id} not in cache"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	${perf} buildid-cache -v -r ${1}</div><div class='add'>+	if [ $? -ne 0 ]; then</div><div class='add'>+		echo "failed: remove ${id} from build id cache"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ${perf} buildid-cache -l | grep -q ${id}; then</div><div class='add'>+		echo "failed: ${id} still in cache after remove"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "remove: OK"</div><div class='add'>+	rm -rf ${build_id_dir}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_purge()</div><div class='add'>+{</div><div class='add'>+	build_id_dir=$(mktemp -d /tmp/perf_buildid_test.debug.XXX)</div><div class='add'>+	perf="perf --buildid-dir ${build_id_dir}"</div><div class='add'>+</div><div class='add'>+	id1=$(get_build_id ${ex_sha1})</div><div class='add'>+	${perf} buildid-cache -v -a ${ex_sha1}</div><div class='add'>+	if ! ${perf} buildid-cache -l | grep -q ${id1}; then</div><div class='add'>+		echo "failed: ${id1} not in cache"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	id2=$(get_build_id ${ex_md5})</div><div class='add'>+	${perf} buildid-cache -v -a ${ex_md5}</div><div class='add'>+	if ! ${perf} buildid-cache -l | grep -q ${id2}; then</div><div class='add'>+		echo "failed: ${id2} not in cache"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Purge by path</div><div class='add'>+	${perf} buildid-cache -v -p ${ex_sha1}</div><div class='add'>+	if [ $? -ne 0 ]; then</div><div class='add'>+		echo "failed: purge build id cache of ${ex_sha1}"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	${perf} buildid-cache -v -p ${ex_md5}</div><div class='add'>+	if [ $? -ne 0 ]; then</div><div class='add'>+		echo "failed: purge build id cache of ${ex_md5}"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Verify both are gone</div><div class='add'>+	if ${perf} buildid-cache -l | grep -q ${id1}; then</div><div class='add'>+		echo "failed: ${id1} still in cache after purge"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ${perf} buildid-cache -l | grep -q ${id2}; then</div><div class='add'>+		echo "failed: ${id2} still in cache after purge"</div><div class='add'>+		exit 1</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "purge: OK"</div><div class='add'>+	rm -rf ${build_id_dir}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> test_record()</div><div class='ctx'> {</div><div class='del'>-	data=$(mktemp /tmp/perf.data.XXX)</div><div class='del'>-	build_id_dir=$(mktemp -d /tmp/perf.debug.XXX)</div><div class='del'>-	log_out=$(mktemp /tmp/perf.log.out.XXX)</div><div class='del'>-	log_err=$(mktemp /tmp/perf.log.err.XXX)</div><div class='add'>+	build_id_dir=$(mktemp -d /tmp/perf_buildid_test.debug.XXX)</div><div class='ctx'> 	perf="perf --buildid-dir ${build_id_dir}"</div><div class='ctx'> </div><div class='ctx'> 	echo "running: perf record $*"</div><div class='hunk'>@@ -145,7 +291,7 @@ test_record()</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='ctx'> 	args="$*"</div><div class='del'>-	check ${args##* }</div><div class='add'>+	check ${args##* } ${data}</div><div class='ctx'> </div><div class='ctx'> 	rm -f ${log_out} ${log_err}</div><div class='ctx'> 	rm -rf ${build_id_dir}</div><div class='hunk'>@@ -166,10 +312,15 @@ if [ ${run_pe} -eq 1 ]; then</div><div class='ctx'> 	test_record wine ${ex_pe}</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='del'>-# cleanup</div><div class='del'>-rm ${ex_sha1} ${ex_md5}</div><div class='del'>-if [ ${run_pe} -eq 1 ]; then</div><div class='del'>-	rm -r ${wineprefix}</div><div class='add'>+# remove binaries manually via perf buildid-cache -r</div><div class='add'>+test_remove ${ex_sha1}</div><div class='add'>+test_remove ${ex_md5}</div><div class='add'>+if [ ${add_pe} -eq 1 ]; then</div><div class='add'>+	test_remove ${ex_pe}</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='add'>+# purge binaries manually via perf buildid-cache -p</div><div class='add'>+test_purge</div><div class='add'>+</div><div class='add'>+cleanup</div><div class='ctx'> exit 0</div><div class='head'>diff --git a/tools/perf/tests/shell/c2c.sh b/tools/perf/tests/shell/c2c.sh<br/>new file mode 100755<br/>index 000000000000..2471d44595c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/c2c.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/c2c.sh</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf c2c tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+perfdata=$(mktemp /tmp/__perf_c2c_test.perf.data.XXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${perfdata}"</div><div class='add'>+	rm -f "${perfdata}".old</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+check_c2c_support() {</div><div class='add'>+	# Check if perf c2c record works.</div><div class='add'>+	if ! perf c2c record -o "${perfdata}" -- true &gt; /dev/null 2&gt;&amp;1 ; then</div><div class='add'>+		return 1</div><div class='add'>+	fi</div><div class='add'>+	return 0</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_c2c_record_report() {</div><div class='add'>+	echo "c2c record and report test"</div><div class='add'>+	if ! check_c2c_support ; then</div><div class='add'>+		echo "c2c record and report test [Skipped: perf c2c record failed (possibly missing hardware support)]"</div><div class='add'>+		err=2</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Run a workload that does some memory operations.</div><div class='add'>+	if ! perf c2c record -o "${perfdata}" -- perf test -w datasym 1 &gt; /dev/null 2&gt;&amp;1 ; then</div><div class='add'>+		echo "c2c record and report test [Skipped: perf c2c record failed during workload]"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! perf c2c report -i "${perfdata}" --stdio &gt; /dev/null 2&gt;&amp;1 ; then</div><div class='add'>+		echo "c2c record and report test [Failed: report failed]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! perf c2c report -i "${perfdata}" -N &gt; /dev/null 2&gt;&amp;1 ; then</div><div class='add'>+		echo "c2c record and report test [Failed: report -N failed]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "c2c record and report test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_c2c_record_report</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/common/init.sh b/tools/perf/tests/shell/common/init.sh<br/>index 26c7525651e0..cbfc78bec974 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/common/init.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/common/init.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/common/init.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/common/init.sh</a></div><div class='hunk'>@@ -11,8 +11,8 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-. ../common/settings.sh</div><div class='del'>-. ../common/patterns.sh</div><div class='add'>+. "$(dirname $0)/../common/settings.sh"</div><div class='add'>+. "$(dirname $0)/../common/patterns.sh"</div><div class='ctx'> </div><div class='ctx'> THIS_TEST_NAME=`basename $0 .sh`</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c b/tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c<br/>index 5f886cd09e6b..7e879217be30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/coresight/memcpy_thread/memcpy_thread.c</a></div><div class='hunk'>@@ -27,6 +27,8 @@ static void *thrfn(void *arg)</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; len; i++)</div><div class='ctx'> 		memcpy(dst, src, a-&gt;size * 1024);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static pthread_t new_thr(void *(*fn) (void *arg), void *arg)</div><div class='head'>diff --git a/tools/perf/tests/shell/coresight/thread_loop/thread_loop.c b/tools/perf/tests/shell/coresight/thread_loop/thread_loop.c<br/>index e05a559253ca..86f3f548b006 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/thread_loop/thread_loop.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/thread_loop/thread_loop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/thread_loop/thread_loop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/coresight/thread_loop/thread_loop.c</a></div><div class='hunk'>@@ -34,8 +34,8 @@ static void *thrfn(void *arg)</div><div class='ctx'> 	}</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"loop:\n"</div><div class='del'>-		"add %[i], %[i], #1\n"</div><div class='del'>-		"cmp %[i], %[len]\n"</div><div class='add'>+		"add %w[i], %w[i], #1\n"</div><div class='add'>+		"cmp %w[i], %w[len]\n"</div><div class='ctx'> 		"blt loop\n"</div><div class='ctx'> 		: /* out */</div><div class='ctx'> 		: /* in */ [i] "r" (i), [len] "r" (len)</div><div class='head'>diff --git a/tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c b/tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c<br/>index 0fc7bf1a25af..8f4e1c985ca3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/coresight/unroll_loop_thread/unroll_loop_thread.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@ static void *thrfn(void *arg)</div><div class='ctx'> 	for (i = 0; i &lt; 10000; i++) {</div><div class='ctx'> 		asm volatile (</div><div class='ctx'> // force an unroll of thia add instruction so we can test long runs of code</div><div class='del'>-#define SNIP1 "add %[in], %[in], #1\n"</div><div class='add'>+#define SNIP1 "add %w[in], %w[in], #1\n"</div><div class='ctx'> // 10</div><div class='ctx'> #define SNIP2 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1 SNIP1</div><div class='ctx'> // 100</div><div class='hunk'>@@ -36,6 +36,8 @@ static void *thrfn(void *arg)</div><div class='ctx'> 			: /* clobber */</div><div class='ctx'> 		);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static pthread_t new_thr(void *(*fn) (void *arg), void *arg)</div><div class='head'>diff --git a/tools/perf/tests/shell/evlist.sh b/tools/perf/tests/shell/evlist.sh<br/>new file mode 100755<br/>index 000000000000..140f099e75c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/evlist.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/evlist.sh</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf evlist tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+perfdata=$(mktemp /tmp/__perf_test.perf.data.XXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${perfdata}"</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+test_evlist_simple() {</div><div class='add'>+	echo "Simple evlist test"</div><div class='add'>+	if ! perf record -e cycles -o "${perfdata}" true 2&gt; /dev/null</div><div class='add'>+	then</div><div class='add'>+		echo "Simple evlist [Failed record]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	if ! perf evlist -i "${perfdata}" | grep -q "cycles"</div><div class='add'>+	then</div><div class='add'>+		echo "Simple evlist [Failed to list event]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	echo "Simple evlist test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_evlist_group() {</div><div class='add'>+	echo "Group evlist test"</div><div class='add'>+	if ! perf record -e "{cycles,instructions}" -o "${perfdata}" true 2&gt; /dev/null</div><div class='add'>+	then</div><div class='add'>+		echo "Group evlist [Skipped event group recording failed]"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! perf evlist -i "${perfdata}" -g | grep -q "{.*cycles.*,.*instructions.*}"</div><div class='add'>+	then</div><div class='add'>+		echo "Group evlist [Failed to list event group]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	echo "Group evlist test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_evlist_verbose() {</div><div class='add'>+	echo "Event configuration evlist test"</div><div class='add'>+	if ! perf record -e cycles -o "${perfdata}" true 2&gt; /dev/null</div><div class='add'>+	then</div><div class='add'>+		echo "Event configuration evlist [Failed record]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! perf evlist -i "${perfdata}" -v | grep -q "config:"</div><div class='add'>+	then</div><div class='add'>+		echo "Event configuration evlist [Failed to list verbose info]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	echo "Event configuration evlist test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_evlist_simple</div><div class='add'>+test_evlist_group</div><div class='add'>+test_evlist_verbose</div><div class='add'>+</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/jitdump-python.sh b/tools/perf/tests/shell/jitdump-python.sh<br/>new file mode 100755<br/>index 000000000000..ae86203b14a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/jitdump-python.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/jitdump-python.sh</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# python profiling with jitdump</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+SHELLDIR=$(dirname $0)</div><div class='add'>+# shellcheck source=lib/setup_python.sh</div><div class='add'>+. "${SHELLDIR}"/lib/setup_python.sh</div><div class='add'>+</div><div class='add'>+OUTPUT=$(${PYTHON} -Xperf_jit -c 'import os, sys; print(os.getpid(), sys.is_stack_trampoline_active())' 2&gt; /dev/null)</div><div class='add'>+PID=${OUTPUT% *}</div><div class='add'>+HAS_PERF_JIT=${OUTPUT#* }</div><div class='add'>+</div><div class='add'>+rm -f /tmp/jit-${PID}.dump 2&gt; /dev/null</div><div class='add'>+if [ "${HAS_PERF_JIT}" != "True" ]; then</div><div class='add'>+    echo "SKIP: python JIT dump is not available"</div><div class='add'>+    exit 2</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+PERF_DATA=$(mktemp /tmp/__perf_test.perf.data.XXXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+    echo "Cleaning up files..."</div><div class='add'>+    rm -f ${PERF_DATA} ${PERF_DATA}.jit /tmp/jit-${PID}.dump /tmp/jitted-${PID}-*.so 2&gt; /dev/null</div><div class='add'>+</div><div class='add'>+    trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+    echo "Unexpected termination"</div><div class='add'>+    cleanup</div><div class='add'>+    exit 1</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+echo "Run python with -Xperf_jit"</div><div class='add'>+cat &lt;&lt;EOF | perf record -k 1 -g --call-graph dwarf -o "${PERF_DATA}" \</div><div class='add'>+		 -- ${PYTHON} -Xperf_jit</div><div class='add'>+def foo(n):</div><div class='add'>+    result = 0</div><div class='add'>+    for _ in range(n):</div><div class='add'>+        result += 1</div><div class='add'>+    return result</div><div class='add'>+</div><div class='add'>+def bar(n):</div><div class='add'>+    foo(n)</div><div class='add'>+</div><div class='add'>+def baz(n):</div><div class='add'>+    bar(n)</div><div class='add'>+</div><div class='add'>+if __name__ == "__main__":</div><div class='add'>+    baz(1000000)</div><div class='add'>+EOF</div><div class='add'>+</div><div class='add'>+# extract PID of the target process from the data</div><div class='add'>+_PID=$(perf report -i "${PERF_DATA}" -F pid -q -g none | cut -d: -f1 -s)</div><div class='add'>+PID=$(echo -n $_PID)  # remove newlines</div><div class='add'>+</div><div class='add'>+echo "Generate JIT-ed DSOs using perf inject"</div><div class='add'>+DEBUGINFOD_URLS='' perf inject -i "${PERF_DATA}" -j -o "${PERF_DATA}.jit"</div><div class='add'>+</div><div class='add'>+echo "Add JIT-ed DSOs to the build-ID cache"</div><div class='add'>+for F in /tmp/jitted-${PID}-*.so; do</div><div class='add'>+  perf buildid-cache -a "${F}"</div><div class='add'>+done</div><div class='add'>+</div><div class='add'>+echo "Check the symbol containing the function/module name"</div><div class='add'>+NUM=$(perf report -i "${PERF_DATA}.jit" -s sym | grep -cE 'py::(foo|bar|baz):&lt;stdin&gt;')</div><div class='add'>+</div><div class='add'>+echo "Found ${NUM} matching lines"</div><div class='add'>+</div><div class='add'>+echo "Remove JIT-ed DSOs from the build-ID cache"</div><div class='add'>+for F in /tmp/jitted-${PID}-*.so; do</div><div class='add'>+  perf buildid-cache -r "${F}"</div><div class='add'>+done</div><div class='add'>+</div><div class='add'>+cleanup</div><div class='add'>+</div><div class='add'>+if [ "${NUM}" -eq 0 ]; then</div><div class='add'>+    exit 1</div><div class='add'>+fi</div><div class='head'>diff --git a/tools/perf/tests/shell/kallsyms.sh b/tools/perf/tests/shell/kallsyms.sh<br/>new file mode 100755<br/>index 000000000000..d0eb99753f47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/kallsyms.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/kallsyms.sh</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf kallsyms tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+</div><div class='add'>+test_kallsyms() {</div><div class='add'>+	echo "Basic perf kallsyms test"</div><div class='add'>+</div><div class='add'>+	# Check if /proc/kallsyms is readable</div><div class='add'>+	if [ ! -r /proc/kallsyms ]; then</div><div class='add'>+		echo "Basic perf kallsyms test [Skipped: /proc/kallsyms not readable]"</div><div class='add'>+		err=2</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Use a symbol that is definitely a function and present in all kernels, e.g. schedule</div><div class='add'>+	symbol="schedule"</div><div class='add'>+</div><div class='add'>+	# Run perf kallsyms</div><div class='add'>+	# It prints "address symbol_name"</div><div class='add'>+	output=$(perf kallsyms $symbol 2&gt;&amp;1)</div><div class='add'>+	ret=$?</div><div class='add'>+</div><div class='add'>+	if [ $ret -ne 0 ] || [ -z "$output" ]; then</div><div class='add'>+		# If empty or failed, it might be due to permissions (kptr_restrict)</div><div class='add'>+		# Check if we can grep the symbol from /proc/kallsyms directly</div><div class='add'>+		if grep -q "$symbol" /proc/kallsyms 2&gt;/dev/null; then</div><div class='add'>+			# If it's in /proc/kallsyms but perf kallsyms returned empty/error,</div><div class='add'>+			# it likely means perf couldn't parse it or access it correctly (e.g. kptr_restrict=2).</div><div class='add'>+			echo "Basic perf kallsyms test [Skipped: $symbol found in /proc/kallsyms but perf kallsyms failed (output: '$output')]"</div><div class='add'>+			err=2</div><div class='add'>+			return</div><div class='add'>+		else</div><div class='add'>+			echo "Basic perf kallsyms test [Skipped: $symbol not found in /proc/kallsyms]"</div><div class='add'>+			err=2</div><div class='add'>+			return</div><div class='add'>+		fi</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if echo "$output" | grep -q "not found"; then</div><div class='add'>+		echo "Basic perf kallsyms test [Failed: output '$output' does not contain $symbol]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if perf kallsyms ErlingHaaland | grep -vq "not found"; then</div><div class='add'>+		echo "Basic perf kallsyms test [Failed: ErlingHaaland found in the output]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	echo "Basic perf kallsyms test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_kallsyms</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/kvm.sh b/tools/perf/tests/shell/kvm.sh<br/>new file mode 100755<br/>index 000000000000..2fafde1a29cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/kvm.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/kvm.sh</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf kvm tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+perfdata=$(mktemp /tmp/__perf_kvm_test.perf.data.XXXXX)</div><div class='add'>+qemu_pid_file=$(mktemp /tmp/__perf_kvm_test.qemu.pid.XXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${perfdata}"</div><div class='add'>+	if [ -f "${qemu_pid_file}" ]; then</div><div class='add'>+		if [ -s "${qemu_pid_file}" ]; then</div><div class='add'>+			qemu_pid=$(cat "${qemu_pid_file}")</div><div class='add'>+			if [ -n "${qemu_pid}" ]; then</div><div class='add'>+				kill "${qemu_pid}" 2&gt;/dev/null || true</div><div class='add'>+			fi</div><div class='add'>+		fi</div><div class='add'>+		rm -f "${qemu_pid_file}"</div><div class='add'>+	fi</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+skip() {</div><div class='add'>+	echo "Skip: $1"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 2</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_kvm_stat() {</div><div class='add'>+	echo "Testing perf kvm stat"</div><div class='add'>+</div><div class='add'>+	echo "Recording kvm events for pid ${qemu_pid}..."</div><div class='add'>+	if ! perf kvm stat record -p "${qemu_pid}" -o "${perfdata}" sleep 1; then</div><div class='add'>+		echo "Failed to record kvm events"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "Reporting kvm events..."</div><div class='add'>+	if ! perf kvm -i "${perfdata}" stat report 2&gt;&amp;1 | grep -q "VM-EXIT"; then</div><div class='add'>+		echo "Failed to find VM-EXIT in report"</div><div class='add'>+		perf kvm -i "${perfdata}" stat report 2&gt;&amp;1</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "perf kvm stat test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_kvm_record_report() {</div><div class='add'>+	echo "Testing perf kvm record/report"</div><div class='add'>+</div><div class='add'>+	echo "Recording kvm profile for pid ${qemu_pid}..."</div><div class='add'>+	# Use --host to avoid needing guest symbols/mounts for this simple test</div><div class='add'>+	# We just want to verify the command runs and produces data</div><div class='add'>+	# We run in background and kill it because 'perf kvm record' appends options</div><div class='add'>+	# after the command, which breaks 'sleep' (e.g. it gets '-e cycles').</div><div class='add'>+	perf kvm --host record -p "${qemu_pid}" -o "${perfdata}" &amp;</div><div class='add'>+	rec_pid=$!</div><div class='add'>+	sleep 1</div><div class='add'>+	kill -INT "${rec_pid}"</div><div class='add'>+	wait "${rec_pid}" || true</div><div class='add'>+</div><div class='add'>+	echo "Reporting kvm profile..."</div><div class='add'>+	# Check for some standard output from report</div><div class='add'>+	if ! perf kvm -i "${perfdata}" report --stdio 2&gt;&amp;1 | grep -q "Event count"; then</div><div class='add'>+		echo "Failed to report kvm profile"</div><div class='add'>+		perf kvm -i "${perfdata}" report --stdio 2&gt;&amp;1</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "perf kvm record/report test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_kvm_buildid_list() {</div><div class='add'>+	echo "Testing perf kvm buildid-list"</div><div class='add'>+</div><div class='add'>+	# We reuse the perf.data from the previous record test</div><div class='add'>+	if ! perf kvm --host -i "${perfdata}" buildid-list 2&gt;&amp;1 | grep -q "."; then</div><div class='add'>+		echo "Failed to list buildids"</div><div class='add'>+		perf kvm --host -i "${perfdata}" buildid-list 2&gt;&amp;1</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "perf kvm buildid-list test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+setup_qemu() {</div><div class='add'>+	# Find qemu</div><div class='add'>+	if [ "$(uname -m)" = "x86_64" ]; then</div><div class='add'>+		qemu="qemu-system-x86_64"</div><div class='add'>+	elif [ "$(uname -m)" = "aarch64" ]; then</div><div class='add'>+		qemu="qemu-system-aarch64"</div><div class='add'>+	elif [ "$(uname -m)" = "s390x" ]; then</div><div class='add'>+		qemu="qemu-system-s390x"</div><div class='add'>+	elif [ "$(uname -m)" = "ppc64le" ]; then</div><div class='add'>+		qemu="qemu-system-ppc64"</div><div class='add'>+	else</div><div class='add'>+		qemu="qemu-system-$(uname -m)"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! which -s "$qemu"; then</div><div class='add'>+		skip "$qemu not found"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if [ ! -r /dev/kvm ] || [ ! -w /dev/kvm ]; then</div><div class='add'>+		skip "/dev/kvm not accessible"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! perf kvm stat record -a sleep 0.01 &gt;/dev/null 2&gt;&amp;1; then</div><div class='add'>+		skip "No permission to record kvm events"</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "Starting $qemu..."</div><div class='add'>+	# Start qemu in background, detached, with pidfile</div><div class='add'>+	# We use -display none -daemonize and a monitor to keep it alive/controllable if needed</div><div class='add'>+	# We don't need a real kernel, just KVM active.</div><div class='add'>+	if ! $qemu -enable-kvm -display none -daemonize -pidfile "${qemu_pid_file}" -monitor none; then</div><div class='add'>+		echo "Failed to start qemu"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Wait a bit for qemu to start</div><div class='add'>+	sleep 1</div><div class='add'>+	qemu_pid=$(cat "${qemu_pid_file}")</div><div class='add'>+</div><div class='add'>+	if ! kill -0 "${qemu_pid}" 2&gt;/dev/null; then</div><div class='add'>+		echo "Qemu process failed to stay alive"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+setup_qemu</div><div class='add'>+if [ $err -eq 0 ]; then</div><div class='add'>+	test_kvm_stat</div><div class='add'>+	test_kvm_record_report</div><div class='add'>+	test_kvm_buildid_list</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/lib/perf_json_output_lint.py b/tools/perf/tests/shell/lib/perf_json_output_lint.py<br/>index c6750ef06c0f..dafbde56cc76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lib/perf_json_output_lint.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lib/perf_json_output_lint.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lib/perf_json_output_lint.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/lib/perf_json_output_lint.py</a></div><div class='hunk'>@@ -43,6 +43,9 @@ def isint(num):</div><div class='ctx'> def is_counter_value(num):</div><div class='ctx'>   return isfloat(num) or num == '&lt;not counted&gt;' or num == '&lt;not supported&gt;'</div><div class='ctx'> </div><div class='add'>+def is_metric_value(num):</div><div class='add'>+  return isfloat(num) or num == 'none'</div><div class='add'>+</div><div class='ctx'> def check_json_output(expected_items):</div><div class='ctx'>   checks = {</div><div class='ctx'>       'counters': lambda x: isfloat(x),</div><div class='hunk'>@@ -57,7 +60,7 @@ def check_json_output(expected_items):</div><div class='ctx'>       'event-runtime': lambda x: isfloat(x),</div><div class='ctx'>       'interval': lambda x: isfloat(x),</div><div class='ctx'>       'metric-unit': lambda x: True,</div><div class='del'>-      'metric-value': lambda x: isfloat(x),</div><div class='add'>+      'metric-value': lambda x: is_metric_value(x),</div><div class='ctx'>       'metric-threshold': lambda x: x in ['unknown', 'good', 'less good', 'nearly bad', 'bad'],</div><div class='ctx'>       'metricgroup': lambda x: True,</div><div class='ctx'>       'node': lambda x: True,</div><div class='hunk'>@@ -65,8 +68,6 @@ def check_json_output(expected_items):</div><div class='ctx'>       'socket': lambda x: True,</div><div class='ctx'>       'thread': lambda x: True,</div><div class='ctx'>       'unit': lambda x: True,</div><div class='del'>-      'insn per cycle': lambda x: isfloat(x),</div><div class='del'>-      'GHz': lambda x: True,  # FIXME: it seems unintended for --metric-only</div><div class='ctx'>   }</div><div class='ctx'>   input = '[\n' + ','.join(Lines) + '\n]'</div><div class='ctx'>   for item in json.loads(input):</div><div class='hunk'>@@ -88,6 +89,8 @@ def check_json_output(expected_items):</div><div class='ctx'>                            f' in \'{item}\'')</div><div class='ctx'>     for key, value in item.items():</div><div class='ctx'>       if key not in checks:</div><div class='add'>+        if args.metric_only:</div><div class='add'>+          continue</div><div class='ctx'>         raise RuntimeError(f'Unexpected key: key={key} value={value}')</div><div class='ctx'>       if not checks[key](value):</div><div class='ctx'>         raise RuntimeError(f'Check failed for: key={key} value={value}')</div><div class='head'>diff --git a/tools/perf/tests/shell/lib/stat_output.sh b/tools/perf/tests/shell/lib/stat_output.sh<br/>index c2ec7881ec1d..3c36e80fe422 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lib/stat_output.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lib/stat_output.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lib/stat_output.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/lib/stat_output.sh</a></div><div class='hunk'>@@ -156,7 +156,7 @@ check_metric_only()</div><div class='ctx'> 		echo "[Skip] CPU-measurement counter facility not installed"</div><div class='ctx'> 		return</div><div class='ctx'> 	fi</div><div class='del'>-	perf stat --metric-only $2 -e instructions,cycles true</div><div class='add'>+	perf stat --metric-only $2 -M page_faults_per_second true</div><div class='ctx'> 	commachecker --metric-only</div><div class='ctx'> 	echo "[Success]"</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/tests/shell/lock_contention.sh b/tools/perf/tests/shell/lock_contention.sh<br/>index d33d9e4392b0..6dd90519f45c 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lock_contention.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/lock_contention.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/lock_contention.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/lock_contention.sh</a></div><div class='hunk'>@@ -7,18 +7,24 @@ set -e</div><div class='ctx'> err=0</div><div class='ctx'> perfdata=$(mktemp /tmp/__perf_test.perf.data.XXXXX)</div><div class='ctx'> result=$(mktemp /tmp/__perf_test.result.XXXXX)</div><div class='add'>+errout=$(mktemp /tmp/__perf_test.errout.XXXXX)</div><div class='ctx'> </div><div class='ctx'> cleanup() {</div><div class='ctx'> 	rm -f ${perfdata}</div><div class='ctx'> 	rm -f ${result}</div><div class='del'>-	trap - EXIT TERM INT</div><div class='add'>+	rm -f ${errout}</div><div class='add'>+	trap - EXIT TERM INT ERR</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> trap_cleanup() {</div><div class='add'>+	if (( $? == 139 )); then #SIGSEGV</div><div class='add'>+		err=1</div><div class='add'>+	fi</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='ctx'> 	cleanup</div><div class='ctx'> 	exit ${err}</div><div class='ctx'> }</div><div class='del'>-trap trap_cleanup EXIT TERM INT</div><div class='add'>+trap trap_cleanup EXIT TERM INT ERR</div><div class='ctx'> </div><div class='ctx'> check() {</div><div class='ctx'> 	if [ "$(id -u)" != 0 ]; then</div><div class='hunk'>@@ -75,10 +81,12 @@ test_bpf()</div><div class='ctx'> test_record_concurrent()</div><div class='ctx'> {</div><div class='ctx'> 	echo "Testing perf lock record and perf lock contention at the same time"</div><div class='del'>-	perf lock record -o- -- perf bench sched messaging -p 2&gt; /dev/null | \</div><div class='add'>+	perf lock record -o- -- perf bench sched messaging -p 2&gt; ${errout} | \</div><div class='ctx'> 	perf lock contention -i- -E 1 -q 2&gt; ${result}</div><div class='ctx'> 	if [ "$(cat "${result}" | wc -l)" != "1" ]; then</div><div class='ctx'> 		echo "[Fail] Recorded result count is not 1:" "$(cat "${result}" | wc -l)"</div><div class='add'>+		cat ${errout}</div><div class='add'>+		cat ${result}</div><div class='ctx'> 		err=1</div><div class='ctx'> 		exit</div><div class='ctx'> 	fi</div><div class='hunk'>@@ -140,7 +148,7 @@ test_aggr_cgroup()</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='ctx'> 	# the perf lock contention output goes to the stderr</div><div class='del'>-	perf lock con -a -b -g -E 1 -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='add'>+	perf lock con -a -b --lock-cgroup -E 1 -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='ctx'> 	if [ "$(cat "${result}" | wc -l)" != "1" ]; then</div><div class='ctx'> 		echo "[Fail] BPF result count is not 1:" "$(cat "${result}" | wc -l)"</div><div class='ctx'> 		err=1</div><div class='hunk'>@@ -266,7 +274,7 @@ test_cgroup_filter()</div><div class='ctx'> 		return</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='del'>-	perf lock con -a -b -g -E 1 -F wait_total -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='add'>+	perf lock con -a -b --lock-cgroup -E 1 -F wait_total -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='ctx'> 	if [ "$(cat "${result}" | wc -l)" != "1" ]; then</div><div class='ctx'> 		echo "[Fail] BPF result should have a cgroup result:" "$(cat "${result}")"</div><div class='ctx'> 		err=1</div><div class='hunk'>@@ -274,7 +282,7 @@ test_cgroup_filter()</div><div class='ctx'> 	fi</div><div class='ctx'> </div><div class='ctx'> 	cgroup=$(cat "${result}" | awk '{ print $3 }')</div><div class='del'>-	perf lock con -a -b -g -E 1 -G "${cgroup}" -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='add'>+	perf lock con -a -b --lock-cgroup -E 1 -G "${cgroup}" -q -- perf bench sched messaging -p &gt; /dev/null 2&gt; ${result}</div><div class='ctx'> 	if [ "$(cat "${result}" | wc -l)" != "1" ]; then</div><div class='ctx'> 		echo "[Fail] BPF result should have a result with cgroup filter:" "$(cat "${cgroup}")"</div><div class='ctx'> 		err=1</div><div class='hunk'>@@ -333,4 +341,5 @@ test_aggr_task_stack_filter</div><div class='ctx'> test_cgroup_filter</div><div class='ctx'> test_csv_output</div><div class='ctx'> </div><div class='add'>+cleanup</div><div class='ctx'> exit ${err}</div><div class='head'>diff --git a/tools/perf/tests/shell/python-use.sh b/tools/perf/tests/shell/python-use.sh<br/>new file mode 100755<br/>index 000000000000..fd2ee5390060<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/python-use.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/python-use.sh</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# 'import perf' in python</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Just test if we can load the python binding.</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+shelldir=$(dirname "$0")</div><div class='add'>+# shellcheck source=lib/setup_python.sh</div><div class='add'>+. "${shelldir}"/lib/setup_python.sh</div><div class='add'>+</div><div class='add'>+MODULE_DIR=$(dirname "$(which perf)")/python</div><div class='add'>+</div><div class='add'>+if [ -d "$MODULE_DIR" ]</div><div class='add'>+then</div><div class='add'>+    CMD=$(cat &lt;&lt;EOF</div><div class='add'>+import sys</div><div class='add'>+sys.path.insert(0, '$MODULE_DIR')</div><div class='add'>+import perf</div><div class='add'>+print('success!')</div><div class='add'>+EOF</div><div class='add'>+    )</div><div class='add'>+else</div><div class='add'>+    CMD=$(cat &lt;&lt;EOF</div><div class='add'>+import perf</div><div class='add'>+print('success!')</div><div class='add'>+EOF</div><div class='add'>+    )</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+echo -e "Testing 'import perf' with:\n$CMD"</div><div class='add'>+</div><div class='add'>+if ! echo "$CMD" | $PYTHON | grep -q "success!"</div><div class='add'>+then</div><div class='add'>+  exit 1</div><div class='add'>+fi</div><div class='add'>+exit 0</div><div class='head'>diff --git a/tools/perf/tests/shell/record.sh b/tools/perf/tests/shell/record.sh<br/>index b1ad24fb3b33..0f5841c479e7 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/record.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/record.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/record.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/record.sh</a></div><div class='hunk'>@@ -388,6 +388,45 @@ test_callgraph() {</div><div class='ctx'>   echo "Callgraph test [Success]"</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+test_ratio_to_prev() {</div><div class='add'>+  echo "ratio-to-prev test"</div><div class='add'>+  if ! perf record -o /dev/null -e "{instructions, cycles/period=100000,ratio-to-prev=0.5/}" \</div><div class='add'>+     true 2&gt; /dev/null</div><div class='add'>+  then</div><div class='add'>+    echo "ratio-to-prev [Skipped not supported]"</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  if ! perf record -o /dev/null -e "instructions, cycles/period=100000,ratio-to-prev=0.5/" \</div><div class='add'>+     true |&amp; grep -q 'Invalid use of ratio-to-prev term without preceding element in group'</div><div class='add'>+  then</div><div class='add'>+    echo "ratio-to-prev test [Failed elements must be in same group]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  if ! perf record -o /dev/null -e "{instructions,dummy,cycles/period=100000,ratio-to-prev=0.5/}" \</div><div class='add'>+     true |&amp; grep -q 'must have same PMU'</div><div class='add'>+  then</div><div class='add'>+    echo "ratio-to-prev test [Failed elements must have same PMU]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  if ! perf record -o /dev/null -e "{instructions,cycles/ratio-to-prev=0.5/}" \</div><div class='add'>+     true |&amp; grep -q 'Event period term or count (-c) must be set when using ratio-to-prev term.'</div><div class='add'>+  then</div><div class='add'>+    echo "ratio-to-prev test [Failed period must be set]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  if ! perf record -o /dev/null -e "{cycles/ratio-to-prev=0.5/}" \</div><div class='add'>+     true |&amp; grep -q 'Invalid use of ratio-to-prev term without preceding element in group'</div><div class='add'>+  then</div><div class='add'>+    echo "ratio-to-prev test [Failed need 2+ events]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  echo "Basic ratio-to-prev record test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> # raise the limit of file descriptors to minimum</div><div class='ctx'> if [[ $default_fd_limit -lt $min_fd_limit ]]; then</div><div class='ctx'>        ulimit -Sn $min_fd_limit</div><div class='hunk'>@@ -404,6 +443,7 @@ test_leader_sampling</div><div class='ctx'> test_topdown_leader_sampling</div><div class='ctx'> test_precise_max</div><div class='ctx'> test_callgraph</div><div class='add'>+test_ratio_to_prev</div><div class='ctx'> </div><div class='ctx'> # restore the default value</div><div class='ctx'> ulimit -Sn $default_fd_limit</div><div class='head'>diff --git a/tools/perf/tests/shell/record_lbr.sh b/tools/perf/tests/shell/record_lbr.sh<br/>index 6fcb5e52b9b4..78a02e90ece1 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/record_lbr.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/record_lbr.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/record_lbr.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/record_lbr.sh</a></div><div class='hunk'>@@ -4,6 +4,10 @@</div><div class='ctx'> </div><div class='ctx'> set -e</div><div class='ctx'> </div><div class='add'>+ParanoidAndNotRoot() {</div><div class='add'>+  [ "$(id -u)" != 0 ] &amp;&amp; [ "$(cat /proc/sys/kernel/perf_event_paranoid)" -gt $1 ]</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> if [ ! -f /sys/bus/event_source/devices/cpu/caps/branches ] &amp;&amp;</div><div class='ctx'>    [ ! -f /sys/bus/event_source/devices/cpu_core/caps/branches ]</div><div class='ctx'> then</div><div class='hunk'>@@ -23,6 +27,7 @@ cleanup() {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> trap_cleanup() {</div><div class='add'>+  echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='ctx'>   cleanup</div><div class='ctx'>   exit 1</div><div class='ctx'> }</div><div class='hunk'>@@ -123,8 +128,11 @@ lbr_test "-j ind_call" "any indirect call" 2</div><div class='ctx'> lbr_test "-j ind_jmp" "any indirect jump" 100</div><div class='ctx'> lbr_test "-j call" "direct calls" 2</div><div class='ctx'> lbr_test "-j ind_call,u" "any indirect user call" 100</div><div class='del'>-lbr_test "-a -b" "system wide any branch" 2</div><div class='del'>-lbr_test "-a -j any_call" "system wide any call" 2</div><div class='add'>+if ! ParanoidAndNotRoot 1</div><div class='add'>+then</div><div class='add'>+  lbr_test "-a -b" "system wide any branch" 2</div><div class='add'>+  lbr_test "-a -j any_call" "system wide any call" 2</div><div class='add'>+fi</div><div class='ctx'> </div><div class='ctx'> # Parallel</div><div class='ctx'> parallel_lbr_test "-b" "parallel any branch" 100 &amp;</div><div class='hunk'>@@ -141,10 +149,16 @@ parallel_lbr_test "-j call" "parallel direct calls" 100 &amp;</div><div class='ctx'> pid6=$!</div><div class='ctx'> parallel_lbr_test "-j ind_call,u" "parallel any indirect user call" 100 &amp;</div><div class='ctx'> pid7=$!</div><div class='del'>-parallel_lbr_test "-a -b" "parallel system wide any branch" 100 &amp;</div><div class='del'>-pid8=$!</div><div class='del'>-parallel_lbr_test "-a -j any_call" "parallel system wide any call" 100 &amp;</div><div class='del'>-pid9=$!</div><div class='add'>+if ParanoidAndNotRoot 1</div><div class='add'>+then</div><div class='add'>+  pid8=</div><div class='add'>+  pid9=</div><div class='add'>+else</div><div class='add'>+  parallel_lbr_test "-a -b" "parallel system wide any branch" 100 &amp;</div><div class='add'>+  pid8=$!</div><div class='add'>+  parallel_lbr_test "-a -j any_call" "parallel system wide any call" 100 &amp;</div><div class='add'>+  pid9=$!</div><div class='add'>+fi</div><div class='ctx'> </div><div class='ctx'> for pid in $pid1 $pid2 $pid3 $pid4 $pid5 $pid6 $pid7 $pid8 $pid9</div><div class='ctx'> do</div><div class='head'>diff --git a/tools/perf/tests/shell/record_weak_term.sh b/tools/perf/tests/shell/record_weak_term.sh<br/>new file mode 100755<br/>index 000000000000..811b00ffb47a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/record_weak_term.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/record_weak_term.sh</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# record weak terms</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Test that command line options override weak terms from sysfs or inbuilt json.</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+shelldir=$(dirname "$0")</div><div class='add'>+# shellcheck source=lib/setup_python.sh</div><div class='add'>+. "${shelldir}"/lib/setup_python.sh</div><div class='add'>+</div><div class='add'>+# Find the first event with a specified period, such as</div><div class='add'>+# "cpu_core/event=0x24,period=200003,umask=0xff/"</div><div class='add'>+event=$(perf list --json | $PYTHON -c '</div><div class='add'>+import json, sys</div><div class='add'>+for e in json.load(sys.stdin):</div><div class='add'>+    if "EventName" not in e or "/modifier" in e["EventName"]:</div><div class='add'>+        continue</div><div class='add'>+    if "Encoding" in e and "period=" in e["Encoding"]:</div><div class='add'>+        print(e["EventName"])</div><div class='add'>+        break</div><div class='add'>+')</div><div class='add'>+if [[ "$event" = "" ]]</div><div class='add'>+then</div><div class='add'>+  echo "Skip: No sysfs/json events with inbuilt period."</div><div class='add'>+  exit 2</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+echo "Testing that for $event the period is overridden with 1000"</div><div class='add'>+perf list --detail "$event"</div><div class='add'>+if ! perf record -c 1000 -vv -e "$event" -o /dev/null true 2&gt;&amp;1 | \</div><div class='add'>+  grep -q -F '{ sample_period, sample_freq }   1000'</div><div class='add'>+then</div><div class='add'>+  echo "Fail: Unexpected verbose output and sample period"</div><div class='add'>+  exit 1</div><div class='add'>+fi</div><div class='add'>+echo "Success"</div><div class='add'>+exit 0</div><div class='head'>diff --git a/tools/perf/tests/shell/script_dlfilter.sh b/tools/perf/tests/shell/script_dlfilter.sh<br/>new file mode 100755<br/>index 000000000000..45c97d4a7d5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/script_dlfilter.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/script_dlfilter.sh</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf script --dlfilter tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+shelldir=$(dirname "$0")</div><div class='add'>+# shellcheck source=lib/setup_python.sh</div><div class='add'>+. "${shelldir}"/lib/setup_python.sh</div><div class='add'>+</div><div class='add'>+# skip if there's no compiler</div><div class='add'>+if ! [ -x "$(command -v cc)" ]; then</div><div class='add'>+	echo "failed: no compiler, install gcc"</div><div class='add'>+	exit 2</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+perfdata=$(mktemp /tmp/__perf_test.perf.data.XXXXX)</div><div class='add'>+dlfilter_c=$(mktemp /tmp/__perf_test.dlfilter.test.c.XXXXX)</div><div class='add'>+dlfilter_so=$(mktemp /tmp/__perf_test.dlfilter.so.XXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${perfdata}"</div><div class='add'>+	rm -f "${dlfilter_c}"</div><div class='add'>+	rm -f "${dlfilter_so}"</div><div class='add'>+	rm -f "${dlfilter_so}.o"</div><div class='add'>+</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+cat &lt;&lt;EOF &gt; "${dlfilter_c}"</div><div class='add'>+#include &lt;perf/perf_dlfilter.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+</div><div class='add'>+struct perf_dlfilter_fns perf_dlfilter_fns;</div><div class='add'>+</div><div class='add'>+int filter_event(void *data, const struct perf_dlfilter_sample *sample, void *ctx)</div><div class='add'>+{</div><div class='add'>+	const struct perf_dlfilter_al *al;</div><div class='add'>+</div><div class='add'>+	if (!sample-&gt;ip)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	al = perf_dlfilter_fns.resolve_ip(ctx);</div><div class='add'>+	if (!al || !al-&gt;sym || strcmp(al-&gt;sym, "test_loop"))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EOF</div><div class='add'>+</div><div class='add'>+test_dlfilter() {</div><div class='add'>+	echo "Basic --dlfilter test"</div><div class='add'>+	# Generate perf.data file</div><div class='add'>+	if ! perf record -o "${perfdata}" perf test -w thloop 1 2&gt; /dev/null</div><div class='add'>+	then</div><div class='add'>+		echo "Basic --dlfilter test [Failed record]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Build the dlfilter</div><div class='add'>+	if ! cc -c -I tools/perf/include -fpic -x c "${dlfilter_c}" -o "${dlfilter_so}.o"</div><div class='add'>+	then</div><div class='add'>+		echo "Basic --dlfilter test [Failed to build dlfilter object]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	if ! cc -shared -o "${dlfilter_so}" "${dlfilter_so}.o"</div><div class='add'>+	then</div><div class='add'>+		echo "Basic --dlfilter test [Failed to link dlfilter shared object]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Check that the output contains "test_loop" and nothing else</div><div class='add'>+	if ! perf script -i "${perfdata}" --dlfilter "${dlfilter_so}" | grep -q "test_loop"</div><div class='add'>+	then</div><div class='add'>+		echo "Basic --dlfilter test [Failed missing output]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# The filter should filter out everything except test_loop, so ensure no other symbols are present</div><div class='add'>+	# This is a simple check; we could be more rigorous</div><div class='add'>+	if perf script -i "${perfdata}" --dlfilter "${dlfilter_so}" | grep -v "test_loop" | grep -q "perf"</div><div class='add'>+	then</div><div class='add'>+		echo "Basic --dlfilter test [Failed filtering]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "Basic --dlfilter test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_dlfilter</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/stat+csv_output.sh b/tools/perf/tests/shell/stat+csv_output.sh<br/>index 7a6f6e177402..cd6fff597091 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+csv_output.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+csv_output.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+csv_output.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat+csv_output.sh</a></div><div class='hunk'>@@ -44,7 +44,7 @@ function commachecker()</div><div class='ctx'> 	;; "--per-die")		exp=8</div><div class='ctx'> 	;; "--per-cluster")	exp=8</div><div class='ctx'> 	;; "--per-cache")	exp=8</div><div class='del'>-	;; "--metric-only")	exp=2</div><div class='add'>+	;; "--metric-only")	exp=1</div><div class='ctx'> 	esac</div><div class='ctx'> </div><div class='ctx'> 	while read line</div><div class='head'>diff --git a/tools/perf/tests/shell/stat+event_uniquifying.sh b/tools/perf/tests/shell/stat+event_uniquifying.sh<br/>index bf54bd6c3e2e..b5dec6b6da36 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+event_uniquifying.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+event_uniquifying.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+event_uniquifying.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat+event_uniquifying.sh</a></div><div class='hunk'>@@ -4,74 +4,63 @@</div><div class='ctx'> </div><div class='ctx'> set -e</div><div class='ctx'> </div><div class='del'>-stat_output=$(mktemp /tmp/__perf_test.stat_output.XXXXX)</div><div class='del'>-perf_tool=perf</div><div class='ctx'> err=0</div><div class='add'>+stat_output=$(mktemp /tmp/__perf_test.stat_output.XXXXX)</div><div class='ctx'> </div><div class='del'>-test_event_uniquifying() {</div><div class='del'>-  # We use `clockticks` in `uncore_imc` to verify the uniquify behavior.</div><div class='del'>-  pmu="uncore_imc"</div><div class='del'>-  event="clockticks"</div><div class='del'>-</div><div class='del'>-  # If the `-A` option is added, the event should be uniquified.</div><div class='del'>-  #</div><div class='del'>-  # $perf list -v clockticks</div><div class='del'>-  #</div><div class='del'>-  # List of pre-defined events (to be used in -e or -M):</div><div class='del'>-  #</div><div class='del'>-  #   uncore_imc_0/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #   uncore_imc_1/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #   uncore_imc_2/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #   uncore_imc_3/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #   uncore_imc_4/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #   uncore_imc_5/clockticks/                           [Kernel PMU event]</div><div class='del'>-  #</div><div class='del'>-  #   ...</div><div class='del'>-  #</div><div class='del'>-  # $perf stat -e clockticks -A -- true</div><div class='del'>-  #</div><div class='del'>-  #  Performance counter stats for 'system wide':</div><div class='del'>-  #</div><div class='del'>-  # CPU0            3,773,018      uncore_imc_0/clockticks/</div><div class='del'>-  # CPU0            3,609,025      uncore_imc_1/clockticks/</div><div class='del'>-  # CPU0                    0      uncore_imc_2/clockticks/</div><div class='del'>-  # CPU0            3,230,009      uncore_imc_3/clockticks/</div><div class='del'>-  # CPU0            3,049,897      uncore_imc_4/clockticks/</div><div class='del'>-  # CPU0                    0      uncore_imc_5/clockticks/</div><div class='del'>-  #</div><div class='del'>-  #        0.002029828 seconds time elapsed</div><div class='del'>-</div><div class='del'>-  echo "stat event uniquifying test"</div><div class='del'>-  uniquified_event_array=()</div><div class='add'>+cleanup() {</div><div class='add'>+  rm -f "${stat_output}"</div><div class='ctx'> </div><div class='del'>-  # Skip if the machine does not have `uncore_imc` device.</div><div class='del'>-  if ! ${perf_tool} list pmu | grep -q ${pmu}; then</div><div class='del'>-    echo "Target does not support PMU ${pmu} [Skipped]"</div><div class='del'>-    err=2</div><div class='del'>-    return</div><div class='del'>-  fi</div><div class='add'>+  trap - EXIT TERM INT</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-  # Check how many uniquified events.</div><div class='del'>-  while IFS= read -r line; do</div><div class='del'>-    uniquified_event=$(echo "$line" | awk '{print $1}')</div><div class='del'>-    uniquified_event_array+=("${uniquified_event}")</div><div class='del'>-  done &lt; &lt;(${perf_tool} list -v ${event} | grep ${pmu})</div><div class='add'>+trap_cleanup() {</div><div class='add'>+  echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+  cleanup</div><div class='add'>+  exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='ctx'> </div><div class='del'>-  perf_command="${perf_tool} stat -e $event -A -o ${stat_output} -- true"</div><div class='del'>-  $perf_command</div><div class='add'>+test_event_uniquifying() {</div><div class='add'>+  echo "Uniquification of PMU sysfs events test"</div><div class='ctx'> </div><div class='del'>-  # Check the output contains all uniquified events.</div><div class='del'>-  for uniquified_event in "${uniquified_event_array[@]}"; do</div><div class='del'>-    if ! cat "${stat_output}" | grep -q "${uniquified_event}"; then</div><div class='del'>-      echo "Event is not uniquified [Failed]"</div><div class='del'>-      echo "${perf_command}"</div><div class='del'>-      cat "${stat_output}"</div><div class='del'>-      err=1</div><div class='del'>-      break</div><div class='del'>-    fi</div><div class='add'>+  # Read events from perf list with and without -v. With -v the duplicate PMUs</div><div class='add'>+  # aren't deduplicated. Note, json events are listed by perf list without a</div><div class='add'>+  # PMU.</div><div class='add'>+  read -ra pmu_events &lt;&lt;&lt; "$(perf list --raw pmu)"</div><div class='add'>+  read -ra pmu_v_events &lt;&lt;&lt; "$(perf list -v --raw pmu)"</div><div class='add'>+  # For all non-deduplicated events.</div><div class='add'>+  for pmu_v_event in "${pmu_v_events[@]}"; do</div><div class='add'>+    # If the event matches an event in the deduplicated events then it musn't</div><div class='add'>+    # be an event with duplicate PMUs, continue the outer loop.</div><div class='add'>+    for pmu_event in "${pmu_events[@]}"; do</div><div class='add'>+      if [[ "$pmu_v_event" == "$pmu_event" ]]; then</div><div class='add'>+        continue 2</div><div class='add'>+      fi</div><div class='add'>+    done</div><div class='add'>+    # Strip the suffix from the non-deduplicated event's PMU.</div><div class='add'>+    event=$(echo "$pmu_v_event" | sed -E 's/_[0-9]+//')</div><div class='add'>+    for pmu_event in "${pmu_events[@]}"; do</div><div class='add'>+      if [[ "$event" == "$pmu_event" ]]; then</div><div class='add'>+        echo "Testing event ${event} is uniquified to ${pmu_v_event}"</div><div class='add'>+        if ! perf stat -e "$event" -A -o ${stat_output} -- true; then</div><div class='add'>+          echo "Error running perf stat for event '$event'  [Skip]"</div><div class='add'>+          if [ $err = 0 ]; then</div><div class='add'>+            err=2</div><div class='add'>+          fi</div><div class='add'>+          continue</div><div class='add'>+        fi</div><div class='add'>+        # Ensure the non-deduplicated event appears in the output.</div><div class='add'>+        if ! grep -q "${pmu_v_event}" "${stat_output}"; then</div><div class='add'>+          echo "Uniquification of PMU sysfs events test [Failed]"</div><div class='add'>+          cat "${stat_output}"</div><div class='add'>+          err=1</div><div class='add'>+        fi</div><div class='add'>+        break</div><div class='add'>+      fi</div><div class='add'>+    done</div><div class='ctx'>   done</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> test_event_uniquifying</div><div class='del'>-rm -f "${stat_output}"</div><div class='add'>+cleanup</div><div class='ctx'> exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/stat+json_output.sh b/tools/perf/tests/shell/stat+json_output.sh<br/>index 98fb65274ac4..85d1ad7186c6 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+json_output.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+json_output.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+json_output.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat+json_output.sh</a></div><div class='hunk'>@@ -181,7 +181,7 @@ check_metric_only()</div><div class='ctx'> 		echo "[Skip] CPU-measurement counter facility not installed"</div><div class='ctx'> 		return</div><div class='ctx'> 	fi</div><div class='del'>-	perf stat -j --metric-only -e instructions,cycles -o "${stat_output}" true</div><div class='add'>+	perf stat -j --metric-only -M page_faults_per_second -o "${stat_output}" true</div><div class='ctx'> 	$PYTHON $pythonchecker --metric-only --file "${stat_output}"</div><div class='ctx'> 	echo "[Success]"</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/tests/shell/stat+shadow_stat.sh b/tools/perf/tests/shell/stat+shadow_stat.sh<br/>index 8824f445d343..cabbbf17c662 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+shadow_stat.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+shadow_stat.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+shadow_stat.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat+shadow_stat.sh</a></div><div class='hunk'>@@ -14,7 +14,7 @@ perf stat -a -e cycles sleep 1 2&gt;&amp;1 | grep -e cpu_core &amp;&amp; exit 2</div><div class='ctx'> </div><div class='ctx'> test_global_aggr()</div><div class='ctx'> {</div><div class='del'>-	perf stat -a --no-big-num -e cycles,instructions sleep 1  2&gt;&amp;1 | \</div><div class='add'>+	perf stat -a --no-big-num -M insn_per_cycle sleep 1  2&gt;&amp;1 | \</div><div class='ctx'> 	grep -e cycles -e instructions | \</div><div class='ctx'> 	while read num evt _ ipc rest</div><div class='ctx'> 	do</div><div class='hunk'>@@ -53,7 +53,7 @@ test_global_aggr()</div><div class='ctx'> </div><div class='ctx'> test_no_aggr()</div><div class='ctx'> {</div><div class='del'>-	perf stat -a -A --no-big-num -e cycles,instructions sleep 1  2&gt;&amp;1 | \</div><div class='add'>+	perf stat -a -A --no-big-num -M insn_per_cycle sleep 1  2&gt;&amp;1 | \</div><div class='ctx'> 	grep ^CPU | \</div><div class='ctx'> 	while read cpu num evt _ ipc rest</div><div class='ctx'> 	do</div><div class='head'>diff --git a/tools/perf/tests/shell/stat+std_output.sh b/tools/perf/tests/shell/stat+std_output.sh<br/>index 6fee67693ba7..9c4b92ecf448 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+std_output.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat+std_output.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat+std_output.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat+std_output.sh</a></div><div class='hunk'>@@ -12,8 +12,8 @@ set -e</div><div class='ctx'> stat_output=$(mktemp /tmp/__perf_test.stat_output.std.XXXXX)</div><div class='ctx'> </div><div class='ctx'> event_name=(cpu-clock task-clock context-switches cpu-migrations page-faults stalled-cycles-frontend stalled-cycles-backend cycles instructions branches branch-misses)</div><div class='del'>-event_metric=("CPUs utilized" "CPUs utilized" "/sec" "/sec" "/sec" "frontend cycles idle" "backend cycles idle" "GHz" "insn per cycle" "/sec" "of all branches")</div><div class='del'>-skip_metric=("stalled cycles per insn" "tma_" "retiring" "frontend_bound" "bad_speculation" "backend_bound" "TopdownL1" "percent of slots")</div><div class='add'>+event_metric=("CPUs_utilized" "CPUs_utilized" "cs/sec" "migrations/sec" "faults/sec" "frontend_cycles_idle" "backend_cycles_idle" "GHz" "insn_per_cycle" "/sec" "branch_miss_rate")</div><div class='add'>+skip_metric=("tma_" "TopdownL1")</div><div class='ctx'> </div><div class='ctx'> cleanup() {</div><div class='ctx'>   rm -f "${stat_output}"</div><div class='hunk'>@@ -90,7 +90,11 @@ function commachecker()</div><div class='ctx'> 		}</div><div class='ctx'> 	done &lt; "${stat_output}"</div><div class='ctx'> </div><div class='del'>-	[ $metric_only -eq 1 ] &amp;&amp; exit 1</div><div class='add'>+	if [ $metric_only -ne 1 ]</div><div class='add'>+	then</div><div class='add'>+		echo "Missing metric only output in:"</div><div class='add'>+		cat "${stat_output}"</div><div class='add'>+	fi</div><div class='ctx'> 	return 0</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/tests/shell/stat.sh b/tools/perf/tests/shell/stat.sh<br/>index 8a100a7f2dc1..0b2f0f88ca16 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat.sh</a></div><div class='hunk'>@@ -16,9 +16,46 @@ test_default_stat() {</div><div class='ctx'>   echo "Basic stat command test [Success]"</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+test_null_stat() {</div><div class='add'>+  echo "Null stat command test"</div><div class='add'>+  if ! perf stat --null true 2&gt;&amp;1 | grep -E -q "Performance counter stats for 'true':"</div><div class='add'>+  then</div><div class='add'>+    echo "Null stat command test [Failed]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  echo "Null stat command test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+find_offline_cpu() {</div><div class='add'>+  for i in $(seq 1 4096)</div><div class='add'>+  do</div><div class='add'>+    if [[ ! -f /sys/devices/system/cpu/cpu$i/online || \</div><div class='add'>+          $(cat /sys/devices/system/cpu/cpu$i/online) == "0" ]]</div><div class='add'>+    then</div><div class='add'>+      echo $i</div><div class='add'>+      return</div><div class='add'>+    fi</div><div class='add'>+  done</div><div class='add'>+  echo "Failed to find offline CPU"</div><div class='add'>+  exit 1</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_offline_cpu_stat() {</div><div class='add'>+  cpu=$(find_offline_cpu)</div><div class='add'>+  echo "Offline CPU stat command test (cpu $cpu)"</div><div class='add'>+  if ! perf stat "-C$cpu" -e cycles true 2&gt;&amp;1 | grep -E -q "No supported events found."</div><div class='add'>+  then</div><div class='add'>+    echo "Offline CPU stat command test [Failed]"</div><div class='add'>+    err=1</div><div class='add'>+    return</div><div class='add'>+  fi</div><div class='add'>+  echo "Offline CPU stat command test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> test_stat_record_report() {</div><div class='ctx'>   echo "stat record and report test"</div><div class='del'>-  if ! perf stat record -o - true | perf stat report -i - 2&gt;&amp;1 | \</div><div class='add'>+  if ! perf stat record -e task-clock -o - true | perf stat report -i - 2&gt;&amp;1 | \</div><div class='ctx'>     grep -E -q "Performance counter stats for 'pipe':"</div><div class='ctx'>   then</div><div class='ctx'>     echo "stat record and report test [Failed]"</div><div class='hunk'>@@ -30,7 +67,7 @@ test_stat_record_report() {</div><div class='ctx'> </div><div class='ctx'> test_stat_record_script() {</div><div class='ctx'>   echo "stat record and script test"</div><div class='del'>-  if ! perf stat record -o - true | perf script -i - 2&gt;&amp;1 | \</div><div class='add'>+  if ! perf stat record -e task-clock -o - true | perf script -i - 2&gt;&amp;1 | \</div><div class='ctx'>     grep -E -q "CPU[[:space:]]+THREAD[[:space:]]+VAL[[:space:]]+ENA[[:space:]]+RUN[[:space:]]+TIME[[:space:]]+EVENT"</div><div class='ctx'>   then</div><div class='ctx'>     echo "stat record and script test [Failed]"</div><div class='hunk'>@@ -196,7 +233,7 @@ test_hybrid() {</div><div class='ctx'>   fi</div><div class='ctx'> </div><div class='ctx'>   # Run default Perf stat</div><div class='del'>-  cycles_events=$(perf stat -- true 2&gt;&amp;1 | grep -E "/cycles/[uH]*|  cycles[:uH]*  " -c)</div><div class='add'>+  cycles_events=$(perf stat -a -- sleep 0.1 2&gt;&amp;1 | grep -E "/cpu-cycles/[uH]*|  cpu-cycles[:uH]*  " -c)</div><div class='ctx'> </div><div class='ctx'>   # The expectation is that default output will have a cycles events on each</div><div class='ctx'>   # hybrid PMU. In situations with no cycles PMU events, like virtualized, this</div><div class='hunk'>@@ -212,6 +249,8 @@ test_hybrid() {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> test_default_stat</div><div class='add'>+test_null_stat</div><div class='add'>+test_offline_cpu_stat</div><div class='ctx'> test_stat_record_report</div><div class='ctx'> test_stat_record_script</div><div class='ctx'> test_stat_repeat_weak_groups</div><div class='head'>diff --git a/tools/perf/tests/shell/stat_all_metricgroups.sh b/tools/perf/tests/shell/stat_all_metricgroups.sh<br/>index c6d61a4ac3e7..1400880ec01f 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat_all_metricgroups.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat_all_metricgroups.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat_all_metricgroups.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat_all_metricgroups.sh</a></div><div class='hunk'>@@ -37,6 +37,9 @@ do</div><div class='ctx'>       then</div><div class='ctx'>         err=2 # Skip</div><div class='ctx'>       fi</div><div class='add'>+    elif [[ "$m" == @(Default2|Default3|Default4) ]]</div><div class='add'>+    then</div><div class='add'>+      echo "Ignoring failures in $m that may contain unsupported legacy events"</div><div class='ctx'>     else</div><div class='ctx'>       echo "Metric group $m failed"</div><div class='ctx'>       echo $result</div><div class='head'>diff --git a/tools/perf/tests/shell/stat_all_metrics.sh b/tools/perf/tests/shell/stat_all_metrics.sh<br/>index 6fa585a1e34c..3dabb39c7cc8 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat_all_metrics.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/stat_all_metrics.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/stat_all_metrics.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/stat_all_metrics.sh</a></div><div class='hunk'>@@ -25,16 +25,22 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     # No error result and metric shown.</div><div class='ctx'>     continue</div><div class='ctx'>   fi</div><div class='del'>-  if [[ "$result" =~ "Cannot resolve IDs for" ]]</div><div class='add'>+  if [[ "$result" =~ "Cannot resolve IDs for" || "$result" =~ "No supported events found" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Metric contains missing events"</div><div class='add'>+    if [[ $(perf list --raw-dump $m) == "Default"* ]]</div><div class='add'>+    then</div><div class='add'>+      echo "[Ignored $m] failed but as a Default metric this can be expected"</div><div class='add'>+      echo $result</div><div class='add'>+      continue</div><div class='add'>+    fi</div><div class='add'>+    echo "[Failed $m] Metric contains missing events"</div><div class='ctx'>     echo $result</div><div class='ctx'>     err=1 # Fail</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ \</div><div class='ctx'>         "Access to performance monitoring and observability operations is limited" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Permission failure"</div><div class='add'>+    echo "[Skipped $m] Permission failure"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -43,7 +49,7 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ "in per-thread mode, enable system wide" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Permissions - need system wide mode"</div><div class='add'>+    echo "[Skipped $m] Permissions - need system wide mode"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -52,7 +58,13 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ "&lt;not supported&gt;" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Not supported events"</div><div class='add'>+    if [[ $(perf list --raw-dump $m) == "Default"* ]]</div><div class='add'>+    then</div><div class='add'>+      echo "[Ignored $m] failed but as a Default metric this can be expected"</div><div class='add'>+      echo $result</div><div class='add'>+      continue</div><div class='add'>+    fi</div><div class='add'>+    echo "[Skipped $m] Not supported events"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -61,7 +73,7 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ "&lt;not counted&gt;" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Not counted events"</div><div class='add'>+    echo "[Skipped $m] Not counted events"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -70,7 +82,7 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ "FP_ARITH" || "$result" =~ "AMX" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "FP issues"</div><div class='add'>+    echo "[Skipped $m] FP issues"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -79,7 +91,7 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     continue</div><div class='ctx'>   elif [[ "$result" =~ "PMM" ]]</div><div class='ctx'>   then</div><div class='del'>-    echo "Optane memory issues"</div><div class='add'>+    echo "[Skipped $m] Optane memory issues"</div><div class='ctx'>     echo $result</div><div class='ctx'>     if [[ $err -eq 0 ]]</div><div class='ctx'>     then</div><div class='hunk'>@@ -96,7 +108,7 @@ for m in $(perf list --raw-dump metrics); do</div><div class='ctx'>     # No error result and metric shown.</div><div class='ctx'>     continue</div><div class='ctx'>   fi</div><div class='del'>-  echo "Metric '$m' has non-zero error '$result_err' or not printed in:"</div><div class='add'>+  echo "[Failed $m] has non-zero error '$result_err' or not printed in:"</div><div class='ctx'>   echo "$result"</div><div class='ctx'>   err=1</div><div class='ctx'> done</div><div class='head'>diff --git a/tools/perf/tests/shell/test_bpf_metadata.sh b/tools/perf/tests/shell/test_bpf_metadata.sh<br/>index 69e3c2055134..be67d56e0f09 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/test_bpf_metadata.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/test_bpf_metadata.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/test_bpf_metadata.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/test_bpf_metadata.sh</a></div><div class='hunk'>@@ -61,7 +61,7 @@ test_bpf_metadata() {</div><div class='ctx'> 		/perf_version/ {</div><div class='ctx'> 			if (entry) print $NF;</div><div class='ctx'> 		}</div><div class='del'>-	' | egrep "$VERS" &gt; /dev/null</div><div class='add'>+	' | grep -qF "$VERS"</div><div class='ctx'> 	then</div><div class='ctx'> 		echo "Basic BPF metadata test [Failed invalid output]"</div><div class='ctx'> 		err=1</div><div class='head'>diff --git a/tools/perf/tests/shell/test_brstack.sh b/tools/perf/tests/shell/test_brstack.sh<br/>index 9138fa83bf36..85233d435be6 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/test_brstack.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/test_brstack.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/test_brstack.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/test_brstack.sh</a></div><div class='hunk'>@@ -34,6 +34,17 @@ trap_cleanup() {</div><div class='ctx'> }</div><div class='ctx'> trap trap_cleanup EXIT TERM INT</div><div class='ctx'> </div><div class='add'>+is_arm64() {</div><div class='add'>+	[ "$(uname -m)" = "aarch64" ];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+check_branches() {</div><div class='add'>+	if ! tr -s ' ' '\n' &lt; "$TMPDIR/perf.script" | grep -E -m1 -q "$1"; then</div><div class='add'>+		echo "Branches missing $1"</div><div class='add'>+		err=1</div><div class='add'>+	fi</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> test_user_branches() {</div><div class='ctx'> 	echo "Testing user branch stack sampling"</div><div class='ctx'> </div><div class='hunk'>@@ -55,14 +66,67 @@ test_user_branches() {</div><div class='ctx'> 	)</div><div class='ctx'> 	for x in "${expected[@]}"</div><div class='ctx'> 	do</div><div class='del'>-		if ! tr -s ' ' '\n' &lt; "$TMPDIR/perf.script" | grep -E -m1 -q "$x"</div><div class='del'>-		then</div><div class='del'>-			echo "Branches missing $x"</div><div class='del'>-			err=1</div><div class='del'>-		fi</div><div class='add'>+		check_branches "$x"</div><div class='ctx'> 	done</div><div class='add'>+</div><div class='add'>+	# Dump addresses only this time</div><div class='add'>+	perf script -i "$TMPDIR/perf.data" --fields brstack | \</div><div class='add'>+		tr ' ' '\n' &gt; "$TMPDIR/perf.script"</div><div class='add'>+</div><div class='add'>+	# There should be no kernel addresses with the u option, in either</div><div class='add'>+	# source or target addresses.</div><div class='add'>+	if grep -E -m1 "0x[89a-f][0-9a-f]{15}" $TMPDIR/perf.script; then</div><div class='add'>+		echo "ERROR: Kernel address found in user mode"</div><div class='add'>+		err=1</div><div class='add'>+	fi</div><div class='ctx'> 	# some branch types are still not being tested:</div><div class='del'>-	# IND COND_CALL COND_RET SYSCALL SYSRET IRQ SERROR NO_TX</div><div class='add'>+	# IND COND_CALL COND_RET SYSRET SERROR NO_TX</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_trap_eret_branches() {</div><div class='add'>+	echo "Testing trap &amp; eret branches"</div><div class='add'>+	if ! is_arm64; then</div><div class='add'>+		echo "skip: not arm64"</div><div class='add'>+	else</div><div class='add'>+		perf record -o $TMPDIR/perf.data --branch-filter any,save_type,u,k -- \</div><div class='add'>+			perf test -w traploop 1000</div><div class='add'>+		perf script -i $TMPDIR/perf.data --fields brstacksym | \</div><div class='add'>+			tr ' ' '\n' &gt; $TMPDIR/perf.script</div><div class='add'>+</div><div class='add'>+		# BRBINF&lt;n&gt;.TYPE == TRAP are mapped to PERF_BR_IRQ by the BRBE driver</div><div class='add'>+		check_branches "^trap_bench\+[^ ]+/[^ ]/IRQ/"</div><div class='add'>+		check_branches "^[^ ]+/trap_bench\+[^ ]+/ERET/"</div><div class='add'>+	fi</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_kernel_branches() {</div><div class='add'>+	echo "Testing that k option only includes kernel source addresses"</div><div class='add'>+</div><div class='add'>+	if ! perf record --branch-filter any,k -o- -- true &gt; /dev/null; then</div><div class='add'>+		echo "skip: not enough privileges"</div><div class='add'>+	else</div><div class='add'>+		perf record -o $TMPDIR/perf.data --branch-filter any,k -- \</div><div class='add'>+			perf bench syscall basic --loop 1000</div><div class='add'>+		perf script -i $TMPDIR/perf.data --fields brstack | \</div><div class='add'>+			tr ' ' '\n' &gt; $TMPDIR/perf.script</div><div class='add'>+</div><div class='add'>+		# Example of branch entries:</div><div class='add'>+		#       "0xffffffff93bda241/0xffffffff93bda20f/M/-/-/..."</div><div class='add'>+		# Source addresses come first and target address can be either</div><div class='add'>+		# userspace or kernel even with k option, as long as the source</div><div class='add'>+		# is in kernel.</div><div class='add'>+</div><div class='add'>+		#Look for source addresses with top bit set</div><div class='add'>+		if ! grep -E -m1 "^0x[89a-f][0-9a-f]{15}" $TMPDIR/perf.script; then</div><div class='add'>+			echo "ERROR: Kernel branches missing"</div><div class='add'>+			err=1</div><div class='add'>+		fi</div><div class='add'>+		# Look for no source addresses without top bit set</div><div class='add'>+		if grep -E -m1 "^0x[0-7][0-9a-f]{0,15}" $TMPDIR/perf.script; then</div><div class='add'>+			echo "ERROR: User branches found with kernel filter"</div><div class='add'>+			err=1</div><div class='add'>+		fi</div><div class='add'>+	fi</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> # first argument &lt;arg0&gt; is the argument passed to "--branch-stack &lt;arg0&gt;,save_type,u"</div><div class='hunk'>@@ -97,18 +161,42 @@ test_filter() {</div><div class='ctx'> 	fi</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+test_syscall() {</div><div class='add'>+	echo "Testing syscalls"</div><div class='add'>+	# skip if perf doesn't have enough privileges</div><div class='add'>+	if ! perf record --branch-filter any,k -o- -- true &gt; /dev/null; then</div><div class='add'>+		echo "skip: not enough privileges"</div><div class='add'>+	else</div><div class='add'>+		perf record -o $TMPDIR/perf.data --branch-filter \</div><div class='add'>+			any_call,save_type,u,k -c 10000 -- \</div><div class='add'>+			perf bench syscall basic --loop 1000</div><div class='add'>+		perf script -i $TMPDIR/perf.data --fields brstacksym | \</div><div class='add'>+			tr ' ' '\n' &gt; $TMPDIR/perf.script</div><div class='add'>+</div><div class='add'>+		check_branches "getppid[^ ]*/SYSCALL/"</div><div class='add'>+	fi</div><div class='add'>+}</div><div class='ctx'> set -e</div><div class='ctx'> </div><div class='ctx'> test_user_branches</div><div class='add'>+test_syscall</div><div class='add'>+test_kernel_branches</div><div class='add'>+test_trap_eret_branches</div><div class='add'>+</div><div class='add'>+any_call="CALL|IND_CALL|COND_CALL|SYSCALL|IRQ"</div><div class='add'>+</div><div class='add'>+if is_arm64; then</div><div class='add'>+	any_call="$any_call|FAULT_DATA|FAULT_INST"</div><div class='add'>+fi</div><div class='ctx'> </div><div class='del'>-test_filter "any_call"	"CALL|IND_CALL|COND_CALL|SYSCALL|IRQ"</div><div class='add'>+test_filter "any_call" "$any_call"</div><div class='ctx'> test_filter "call"	"CALL|SYSCALL"</div><div class='ctx'> test_filter "cond"	"COND"</div><div class='ctx'> test_filter "any_ret"	"RET|COND_RET|SYSRET|ERET"</div><div class='ctx'> </div><div class='ctx'> test_filter "call,cond"		"CALL|SYSCALL|COND"</div><div class='del'>-test_filter "any_call,cond"		"CALL|IND_CALL|COND_CALL|IRQ|SYSCALL|COND"</div><div class='del'>-test_filter "cond,any_call,any_ret"	"COND|CALL|IND_CALL|COND_CALL|SYSCALL|IRQ|RET|COND_RET|SYSRET|ERET"</div><div class='add'>+test_filter "any_call,cond"	    "$any_call|COND"</div><div class='add'>+test_filter "any_call,cond,any_ret" "$any_call|COND|RET|COND_RET"</div><div class='ctx'> </div><div class='ctx'> cleanup</div><div class='ctx'> exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/test_event_open_fallback.sh b/tools/perf/tests/shell/test_event_open_fallback.sh<br/>new file mode 100755<br/>index 000000000000..9420a7557c13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/test_event_open_fallback.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/test_event_open_fallback.sh</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# Perf event open fallback test</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+skip_cnt=0</div><div class='add'>+ok_cnt=0</div><div class='add'>+err_cnt=0</div><div class='add'>+</div><div class='add'>+perf_record()</div><div class='add'>+{</div><div class='add'>+	perf record -o /dev/null "$@" -- true 1&gt;/dev/null 2&gt;&amp;1</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_decrease_precise_ip()</div><div class='add'>+{</div><div class='add'>+	echo "Decrease precise ip test"</div><div class='add'>+</div><div class='add'>+	perf list pmu | grep -q 'cycles' || return 2</div><div class='add'>+</div><div class='add'>+	if ! perf_record -e cycles; then</div><div class='add'>+		return 2</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# It should reduce precision level down to 0 if needed.</div><div class='add'>+	if ! perf_record -e cycles:P; then</div><div class='add'>+		return 1</div><div class='add'>+	fi</div><div class='add'>+	return 0</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_decrease_precise_ip_complicated()</div><div class='add'>+{</div><div class='add'>+	echo "Decrease precise ip test (complicated case)"</div><div class='add'>+</div><div class='add'>+	perf list pmu | grep -q 'mem-loads-aux' || return 2</div><div class='add'>+</div><div class='add'>+	if ! perf_record -e '{mem-loads-aux:S,mem-loads:PS}'; then</div><div class='add'>+		return 1</div><div class='add'>+	fi</div><div class='add'>+	return 0</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+count_result()</div><div class='add'>+{</div><div class='add'>+	if [ "$1" -eq 2 ] ; then</div><div class='add'>+		skip_cnt=$((skip_cnt + 1))</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	if [ "$1" -eq 0 ] ; then</div><div class='add'>+		ok_cnt=$((ok_cnt + 1))</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+	err_cnt=$((err_cnt + 1))</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+ret=0</div><div class='add'>+test_decrease_precise_ip		|| ret=$? ; count_result $ret ; ret=0</div><div class='add'>+test_decrease_precise_ip_complicated	|| ret=$? ; count_result $ret ; ret=0</div><div class='add'>+</div><div class='add'>+cleanup</div><div class='add'>+</div><div class='add'>+if [ ${err_cnt} -gt 0 ] ; then</div><div class='add'>+	exit 1</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+if [ ${ok_cnt} -gt 0 ] ; then</div><div class='add'>+	exit 0</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+# Skip</div><div class='add'>+exit 2</div><div class='head'>diff --git a/tools/perf/tests/shell/timechart.sh b/tools/perf/tests/shell/timechart.sh<br/>new file mode 100755<br/>index 000000000000..b14b3472c284<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/timechart.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/timechart.sh</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf timechart tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+perfdata=$(mktemp /tmp/__perf_timechart_test.perf.data.XXXXX)</div><div class='add'>+output=$(mktemp /tmp/__perf_timechart_test.output.XXXXX.svg)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${perfdata}"</div><div class='add'>+	rm -f "${output}"</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+test_timechart() {</div><div class='add'>+	echo "Basic perf timechart test"</div><div class='add'>+</div><div class='add'>+	# Try to record timechart data.</div><div class='add'>+	# perf timechart record uses system-wide recording and specific tracepoints.</div><div class='add'>+	# If it fails (e.g. permissions, missing tracepoints), skip the test.</div><div class='add'>+	if ! perf timechart record -o "${perfdata}" true &gt; /dev/null 2&gt;&amp;1; then</div><div class='add'>+		echo "Basic perf timechart test [Skipped: perf timechart record failed (permissions/events?)]"</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Generate the timechart</div><div class='add'>+	if ! perf timechart -i "${perfdata}" -o "${output}" &gt; /dev/null 2&gt;&amp;1; then</div><div class='add'>+		echo "Basic perf timechart test [Failed: perf timechart command failed]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Check if output file exists and is not empty</div><div class='add'>+	if [ ! -s "${output}" ]; then</div><div class='add'>+		echo "Basic perf timechart test [Failed: output file is empty or missing]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Check if it looks like an SVG</div><div class='add'>+	if ! grep -q "svg" "${output}"; then</div><div class='add'>+		echo "Basic perf timechart test [Failed: output doesn't look like SVG]"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "Basic perf timechart test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+if ! perf check feature -q libtraceevent ; then</div><div class='add'>+	echo "perf timechart is not supported. Skip."</div><div class='add'>+        cleanup</div><div class='add'>+	exit 2</div><div class='add'>+fi</div><div class='add'>+</div><div class='add'>+test_timechart</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/top.sh b/tools/perf/tests/shell/top.sh<br/>new file mode 100755<br/>index 000000000000..768ebcf7a89c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/top.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/top.sh</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+#!/bin/bash</div><div class='add'>+# perf top tests</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+set -e</div><div class='add'>+</div><div class='add'>+err=0</div><div class='add'>+log_file=$(mktemp /tmp/perf.top.log.XXXXX)</div><div class='add'>+</div><div class='add'>+cleanup() {</div><div class='add'>+	rm -f "${log_file}"</div><div class='add'>+	trap - EXIT TERM INT</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+trap_cleanup() {</div><div class='add'>+	echo "Unexpected signal in ${FUNCNAME[1]}"</div><div class='add'>+	cleanup</div><div class='add'>+	exit 1</div><div class='add'>+}</div><div class='add'>+trap trap_cleanup EXIT TERM INT</div><div class='add'>+</div><div class='add'>+test_basic_perf_top() {</div><div class='add'>+	echo "Basic perf top test"</div><div class='add'>+</div><div class='add'>+	# Start a workload that spins to generate samples</div><div class='add'>+	# thloop runs for the specified number of seconds</div><div class='add'>+	perf test -w thloop 20 &amp;</div><div class='add'>+	PID=$!</div><div class='add'>+</div><div class='add'>+	# Allow it to start</div><div class='add'>+	sleep 0.1</div><div class='add'>+</div><div class='add'>+	# Run perf top for 5 seconds, monitoring that PID</div><div class='add'>+	# Use --stdio to avoid TUI and redirect output</div><div class='add'>+	# Use -d 1 to avoid flooding output</div><div class='add'>+	# Use -e cpu-clock to ensure we get samples</div><div class='add'>+	# Use sleep to keep stdin open but silent, preventing EOF loop or interactive spam</div><div class='add'>+	if ! sleep 10 | timeout 5s perf top --stdio -d 1 -e cpu-clock -p $PID &gt; "${log_file}" 2&gt;&amp;1; then</div><div class='add'>+		retval=$?</div><div class='add'>+		if [ $retval -ne 124 ] &amp;&amp; [ $retval -ne 0 ]; then</div><div class='add'>+			echo "Basic perf top test [Failed: perf top failed to start or run (ret=$retval)]"</div><div class='add'>+			head -n 50 "${log_file}"</div><div class='add'>+			kill $PID</div><div class='add'>+			wait $PID 2&gt;/dev/null || true</div><div class='add'>+			err=1</div><div class='add'>+			return</div><div class='add'>+		fi</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	kill $PID</div><div class='add'>+	wait $PID 2&gt;/dev/null || true</div><div class='add'>+</div><div class='add'>+	# Check for some sample data (percentage)</div><div class='add'>+	if ! grep -E -q "[0-9]+\.[0-9]+%" "${log_file}"; then</div><div class='add'>+		echo "Basic perf top test [Failed: no sample percentage found]"</div><div class='add'>+		head -n 50 "${log_file}"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	# Check for the symbol</div><div class='add'>+	if ! grep -q "test_loop" "${log_file}"; then</div><div class='add'>+		echo "Basic perf top test [Failed: test_loop symbol not found]"</div><div class='add'>+		head -n 50 "${log_file}"</div><div class='add'>+		err=1</div><div class='add'>+		return</div><div class='add'>+	fi</div><div class='add'>+</div><div class='add'>+	echo "Basic perf top test [Success]"</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+test_basic_perf_top</div><div class='add'>+cleanup</div><div class='add'>+exit $err</div><div class='head'>diff --git a/tools/perf/tests/shell/trace_btf_enum.sh b/tools/perf/tests/shell/trace_btf_enum.sh<br/>index 572001d75d78..03e9f680a4a6 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/trace_btf_enum.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/shell/trace_btf_enum.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/shell/trace_btf_enum.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/shell/trace_btf_enum.sh</a></div><div class='hunk'>@@ -23,6 +23,14 @@ check_vmlinux() {</div><div class='ctx'>   fi</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+check_permissions() {</div><div class='add'>+  if perf trace -e $syscall $TESTPROG 2&gt;&amp;1 | grep -q "Operation not permitted"</div><div class='add'>+  then</div><div class='add'>+    echo "trace+enum test [Skipped permissions]"</div><div class='add'>+    err=2</div><div class='add'>+  fi</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> trace_landlock() {</div><div class='ctx'>   echo "Tracing syscall ${syscall}"</div><div class='ctx'> </div><div class='hunk'>@@ -56,6 +64,9 @@ trace_non_syscall() {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> check_vmlinux</div><div class='add'>+if [ $err = 0 ]; then</div><div class='add'>+  check_permissions</div><div class='add'>+fi</div><div class='ctx'> </div><div class='ctx'> if [ $err = 0 ]; then</div><div class='ctx'>   trace_landlock</div><div class='head'>diff --git a/tools/perf/tests/switch-tracking.c b/tools/perf/tests/switch-tracking.c<br/>index 5be294014d3b..15791fcb76b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/switch-tracking.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/switch-tracking.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/switch-tracking.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/switch-tracking.c</a></div><div class='hunk'>@@ -332,7 +332,7 @@ out_free_nodes:</div><div class='ctx'> static int test__switch_tracking(struct test_suite *test __maybe_unused, int subtest __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	const char *sched_switch = "sched:sched_switch";</div><div class='del'>-	const char *cycles = "cycles:u";</div><div class='add'>+	const char *cycles = "cpu-cycles:u";</div><div class='ctx'> 	struct switch_tracking switch_tracking = { .tids = NULL, };</div><div class='ctx'> 	struct record_opts opts = {</div><div class='ctx'> 		.mmap_pages	     = UINT_MAX,</div><div class='head'>diff --git a/tools/perf/tests/tests.h b/tools/perf/tests/tests.h<br/>index 97e62db8764a..cb67ddbd0375 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/tests.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/tests.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/tests.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/tests.h</a></div><div class='hunk'>@@ -120,7 +120,6 @@ DECLARE_SUITE(dso_data_cache);</div><div class='ctx'> DECLARE_SUITE(dso_data_reopen);</div><div class='ctx'> DECLARE_SUITE(parse_events);</div><div class='ctx'> DECLARE_SUITE(hists_link);</div><div class='del'>-DECLARE_SUITE(python_use);</div><div class='ctx'> DECLARE_SUITE(bp_signal);</div><div class='ctx'> DECLARE_SUITE(bp_signal_overflow);</div><div class='ctx'> DECLARE_SUITE(bp_accounting);</div><div class='hunk'>@@ -161,7 +160,7 @@ DECLARE_SUITE(bitmap_print);</div><div class='ctx'> DECLARE_SUITE(perf_hooks);</div><div class='ctx'> DECLARE_SUITE(unit_number__scnprint);</div><div class='ctx'> DECLARE_SUITE(mem2node);</div><div class='del'>-DECLARE_SUITE(maps__merge_in);</div><div class='add'>+DECLARE_SUITE(maps);</div><div class='ctx'> DECLARE_SUITE(time_utils);</div><div class='ctx'> DECLARE_SUITE(jit_write_elf);</div><div class='ctx'> DECLARE_SUITE(api_io);</div><div class='hunk'>@@ -179,6 +178,7 @@ DECLARE_SUITE(event_groups);</div><div class='ctx'> DECLARE_SUITE(symbols);</div><div class='ctx'> DECLARE_SUITE(util);</div><div class='ctx'> DECLARE_SUITE(subcmd_help);</div><div class='add'>+DECLARE_SUITE(kallsyms_split);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PowerPC and S390 do not support creation of instruction breakpoints using the</div><div class='hunk'>@@ -239,6 +239,7 @@ DECLARE_WORKLOAD(sqrtloop);</div><div class='ctx'> DECLARE_WORKLOAD(brstack);</div><div class='ctx'> DECLARE_WORKLOAD(datasym);</div><div class='ctx'> DECLARE_WORKLOAD(landlock);</div><div class='add'>+DECLARE_WORKLOAD(traploop);</div><div class='ctx'> </div><div class='ctx'> extern const char *dso_to_test;</div><div class='ctx'> extern const char *test_objdump_path;</div><div class='head'>diff --git a/tools/perf/tests/workloads/Build b/tools/perf/tests/workloads/Build<br/>index 5af17206f04d..fb1012cc4fc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/workloads/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/workloads/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/workloads/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/workloads/Build</a></div><div class='hunk'>@@ -7,8 +7,10 @@ perf-test-y += sqrtloop.o</div><div class='ctx'> perf-test-y += brstack.o</div><div class='ctx'> perf-test-y += datasym.o</div><div class='ctx'> perf-test-y += landlock.o</div><div class='add'>+perf-test-y += traploop.o</div><div class='ctx'> </div><div class='ctx'> CFLAGS_sqrtloop.o         = -g -O0 -fno-inline -U_FORTIFY_SOURCE</div><div class='ctx'> CFLAGS_leafloop.o         = -g -O0 -fno-inline -fno-omit-frame-pointer -U_FORTIFY_SOURCE</div><div class='ctx'> CFLAGS_brstack.o          = -g -O0 -fno-inline -U_FORTIFY_SOURCE</div><div class='ctx'> CFLAGS_datasym.o          = -g -O0 -fno-inline -U_FORTIFY_SOURCE</div><div class='add'>+CFLAGS_traploop.o         = -g -O0 -fno-inline -U_FORTIFY_SOURCE</div><div class='head'>diff --git a/tools/perf/tests/workloads/thloop.c b/tools/perf/tests/workloads/thloop.c<br/>index 457b29f91c3e..bd8168f883fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/workloads/thloop.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/tests/workloads/thloop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/workloads/thloop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/workloads/thloop.c</a></div><div class='hunk'>@@ -31,21 +31,52 @@ static void *thfunc(void *arg)</div><div class='ctx'> </div><div class='ctx'> static int thloop(int argc, const char **argv)</div><div class='ctx'> {</div><div class='del'>-	int sec = 1;</div><div class='del'>-	pthread_t th;</div><div class='add'>+	int nt = 2, sec = 1, err = 1;</div><div class='add'>+	pthread_t *thread_list = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (argc &gt; 0)</div><div class='ctx'> 		sec = atoi(argv[0]);</div><div class='ctx'> </div><div class='add'>+	if (sec &lt;= 0) {</div><div class='add'>+		fprintf(stderr, "Error: seconds (%d) must be &gt;= 1\n", sec);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (argc &gt; 1)</div><div class='add'>+		nt = atoi(argv[1]);</div><div class='add'>+</div><div class='add'>+	if (nt &lt;= 0) {</div><div class='add'>+		fprintf(stderr, "Error: thread count (%d) must be &gt;= 1\n", nt);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	signal(SIGINT, sighandler);</div><div class='ctx'> 	signal(SIGALRM, sighandler);</div><div class='del'>-	alarm(sec);</div><div class='ctx'> </div><div class='del'>-	pthread_create(&amp;th, NULL, thfunc, test_loop);</div><div class='del'>-	test_loop();</div><div class='del'>-	pthread_join(th, NULL);</div><div class='add'>+	thread_list = calloc(nt, sizeof(pthread_t));</div><div class='add'>+	if (thread_list == NULL) {</div><div class='add'>+		fprintf(stderr, "Error: malloc failed for %d threads\n", nt);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	for (int i = 1; i &lt; nt; i++) {</div><div class='add'>+		int ret = pthread_create(&amp;thread_list[i], NULL, thfunc, test_loop);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		if (ret) {</div><div class='add'>+			fprintf(stderr, "Error: failed to create thread %d\n", i);</div><div class='add'>+			done = 1; // Ensure started threads terminate.</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	alarm(sec);</div><div class='add'>+	test_loop();</div><div class='add'>+	err = 0;</div><div class='add'>+out:</div><div class='add'>+	for (int i = 1; i &lt; nt; i++) {</div><div class='add'>+		if (thread_list &amp;&amp; thread_list[i])</div><div class='add'>+			pthread_join(thread_list[i], /*retval=*/NULL);</div><div class='add'>+	}</div><div class='add'>+	free(thread_list);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> DEFINE_WORKLOAD(thloop);</div><div class='head'>diff --git a/tools/perf/tests/workloads/traploop.c b/tools/perf/tests/workloads/traploop.c<br/>new file mode 100644<br/>index 000000000000..68dec399a735<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/tests/workloads/traploop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/tests/workloads/traploop.c</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include "../tests.h"</div><div class='add'>+</div><div class='add'>+#define BENCH_RUNS 999999</div><div class='add'>+</div><div class='add'>+#ifdef __aarch64__</div><div class='add'>+static void trap_bench(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	asm("mrs %0, ID_AA64ISAR0_EL1" : "=r" (val));   /* TRAP + ERET */</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void trap_bench(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int traploop(int argc, const char **argv)</div><div class='add'>+{</div><div class='add'>+	int num_loops = BENCH_RUNS;</div><div class='add'>+</div><div class='add'>+	if (argc &gt; 0)</div><div class='add'>+		num_loops = atoi(argv[0]);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_loops; i++)</div><div class='add'>+		trap_bench();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_WORKLOAD(traploop);</div><div class='head'>diff --git a/tools/perf/trace/beauty/include/linux/socket.h b/tools/perf/trace/beauty/include/linux/socket.h<br/>index 3b262487ec06..77d7c59f5d8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/linux/socket.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/linux/socket.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/linux/socket.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/trace/beauty/include/linux/socket.h</a></div><div class='hunk'>@@ -34,10 +34,7 @@ typedef __kernel_sa_family_t	sa_family_t;</div><div class='ctx'> </div><div class='ctx'> struct sockaddr {</div><div class='ctx'> 	sa_family_t	sa_family;	/* address family, AF_xxx	*/</div><div class='del'>-	union {</div><div class='del'>-		char sa_data_min[14];		/* Minimum 14 bytes of protocol address	*/</div><div class='del'>-		DECLARE_FLEX_ARRAY(char, sa_data);</div><div class='del'>-	};</div><div class='add'>+	char		sa_data[14];	/* 14 bytes of protocol address	*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct linger {</div><div class='head'>diff --git a/tools/perf/trace/beauty/include/uapi/linux/fcntl.h b/tools/perf/trace/beauty/include/uapi/linux/fcntl.h<br/>index a15ac2fa4b20..3741ea1b73d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/fcntl.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/fcntl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/fcntl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/trace/beauty/include/uapi/linux/fcntl.h</a></div><div class='hunk'>@@ -90,10 +90,29 @@</div><div class='ctx'> #define DN_ATTRIB	0x00000020	/* File changed attibutes */</div><div class='ctx'> #define DN_MULTISHOT	0x80000000	/* Don't remove notifier */</div><div class='ctx'> </div><div class='add'>+/* Reserved kernel ranges [-100], [-10000, -40000]. */</div><div class='ctx'> #define AT_FDCWD		-100    /* Special value for dirfd used to</div><div class='ctx'> 					   indicate openat should use the</div><div class='ctx'> 					   current working directory. */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The concept of process and threads in userland and the kernel is a confusing</div><div class='add'>+ * one - within the kernel every thread is a 'task' with its own individual PID,</div><div class='add'>+ * however from userland's point of view threads are grouped by a single PID,</div><div class='add'>+ * which is that of the 'thread group leader', typically the first thread</div><div class='add'>+ * spawned.</div><div class='add'>+ *</div><div class='add'>+ * To cut the Gideon knot, for internal kernel usage, we refer to</div><div class='add'>+ * PIDFD_SELF_THREAD to refer to the current thread (or task from a kernel</div><div class='add'>+ * perspective), and PIDFD_SELF_THREAD_GROUP to refer to the current thread</div><div class='add'>+ * group leader...</div><div class='add'>+ */</div><div class='add'>+#define PIDFD_SELF_THREAD		-10000 /* Current thread. */</div><div class='add'>+#define PIDFD_SELF_THREAD_GROUP		-10001 /* Current thread group leader. */</div><div class='add'>+</div><div class='add'>+#define FD_PIDFS_ROOT			-10002 /* Root of the pidfs filesystem */</div><div class='add'>+#define FD_NSFS_ROOT			-10003 /* Root of the nsfs filesystem */</div><div class='add'>+#define FD_INVALID			-10009 /* Invalid file descriptor: -10000 - EBADF = -10009 */</div><div class='ctx'> </div><div class='ctx'> /* Generic flags for the *at(2) family of syscalls. */</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/trace/beauty/include/uapi/linux/fs.h b/tools/perf/trace/beauty/include/uapi/linux/fs.h<br/>index 0098b0ce8ccb..beb4c2d1e41c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/fs.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/fs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/fs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/trace/beauty/include/uapi/linux/fs.h</a></div><div class='hunk'>@@ -60,6 +60,17 @@</div><div class='ctx'> #define RENAME_EXCHANGE		(1 &lt;&lt; 1)	/* Exchange source and dest */</div><div class='ctx'> #define RENAME_WHITEOUT		(1 &lt;&lt; 2)	/* Whiteout source */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The root inode of procfs is guaranteed to always have the same inode number.</div><div class='add'>+ * For programs that make heavy use of procfs, verifying that the root is a</div><div class='add'>+ * real procfs root and using openat2(RESOLVE_{NO_{XDEV,MAGICLINKS},BENEATH})</div><div class='add'>+ * will allow you to make sure you are never tricked into operating on the</div><div class='add'>+ * wrong procfs file.</div><div class='add'>+ */</div><div class='add'>+enum procfs_ino {</div><div class='add'>+	PROCFS_ROOT_INO = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct file_clone_range {</div><div class='ctx'> 	__s64 src_fd;</div><div class='ctx'> 	__u64 src_offset;</div><div class='hunk'>@@ -91,6 +102,63 @@ struct fs_sysfs_path {</div><div class='ctx'> 	__u8			name[128];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Protection info capability flags */</div><div class='add'>+#define	LBMD_PI_CAP_INTEGRITY		(1 &lt;&lt; 0)</div><div class='add'>+#define	LBMD_PI_CAP_REFTAG		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+/* Checksum types for Protection Information */</div><div class='add'>+#define LBMD_PI_CSUM_NONE		0</div><div class='add'>+#define LBMD_PI_CSUM_IP			1</div><div class='add'>+#define LBMD_PI_CSUM_CRC16_T10DIF	2</div><div class='add'>+#define LBMD_PI_CSUM_CRC64_NVME		4</div><div class='add'>+</div><div class='add'>+/* sizeof first published struct */</div><div class='add'>+#define LBMD_SIZE_VER0			16</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Logical block metadata capability descriptor</div><div class='add'>+ * If the device does not support metadata, all the fields will be zero.</div><div class='add'>+ * Applications must check lbmd_flags to determine whether metadata is</div><div class='add'>+ * supported or not.</div><div class='add'>+ */</div><div class='add'>+struct logical_block_metadata_cap {</div><div class='add'>+	/* Bitmask of logical block metadata capability flags */</div><div class='add'>+	__u32	lbmd_flags;</div><div class='add'>+	/*</div><div class='add'>+	 * The amount of data described by each unit of logical block</div><div class='add'>+	 * metadata</div><div class='add'>+	 */</div><div class='add'>+	__u16	lbmd_interval;</div><div class='add'>+	/*</div><div class='add'>+	 * Size in bytes of the logical block metadata associated with each</div><div class='add'>+	 * interval</div><div class='add'>+	 */</div><div class='add'>+	__u8	lbmd_size;</div><div class='add'>+	/*</div><div class='add'>+	 * Size in bytes of the opaque block tag associated with each</div><div class='add'>+	 * interval</div><div class='add'>+	 */</div><div class='add'>+	__u8	lbmd_opaque_size;</div><div class='add'>+	/*</div><div class='add'>+	 * Offset in bytes of the opaque block tag within the logical block</div><div class='add'>+	 * metadata</div><div class='add'>+	 */</div><div class='add'>+	__u8	lbmd_opaque_offset;</div><div class='add'>+	/* Size in bytes of the T10 PI tuple associated with each interval */</div><div class='add'>+	__u8	lbmd_pi_size;</div><div class='add'>+	/* Offset in bytes of T10 PI tuple within the logical block metadata */</div><div class='add'>+	__u8	lbmd_pi_offset;</div><div class='add'>+	/* T10 PI guard tag type */</div><div class='add'>+	__u8	lbmd_guard_tag_type;</div><div class='add'>+	/* Size in bytes of the T10 PI application tag */</div><div class='add'>+	__u8	lbmd_app_tag_size;</div><div class='add'>+	/* Size in bytes of the T10 PI reference tag */</div><div class='add'>+	__u8	lbmd_ref_tag_size;</div><div class='add'>+	/* Size in bytes of the T10 PI storage tag */</div><div class='add'>+	__u8	lbmd_storage_tag_size;</div><div class='add'>+	__u8	pad;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* extent-same (dedupe) ioctls; these MUST match the btrfs ioctl definitions */</div><div class='ctx'> #define FILE_DEDUPE_RANGE_SAME		0</div><div class='ctx'> #define FILE_DEDUPE_RANGE_DIFFERS	1</div><div class='hunk'>@@ -149,6 +217,24 @@ struct fsxattr {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Variable size structure for file_[sg]et_attr().</div><div class='add'>+ *</div><div class='add'>+ * Note. This is alternative to the structure 'struct file_kattr'/'struct fsxattr'.</div><div class='add'>+ * As this structure is passed to/from userspace with its size, this can</div><div class='add'>+ * be versioned based on the size.</div><div class='add'>+ */</div><div class='add'>+struct file_attr {</div><div class='add'>+	__u64 fa_xflags;	/* xflags field value (get/set) */</div><div class='add'>+	__u32 fa_extsize;	/* extsize field value (get/set)*/</div><div class='add'>+	__u32 fa_nextents;	/* nextents field value (get)   */</div><div class='add'>+	__u32 fa_projid;	/* project identifier (get/set) */</div><div class='add'>+	__u32 fa_cowextsize;	/* CoW extsize field value (get/set) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FILE_ATTR_SIZE_VER0 24</div><div class='add'>+#define FILE_ATTR_SIZE_LATEST FILE_ATTR_SIZE_VER0</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Flags for the fsx_xflags field</div><div class='ctx'>  */</div><div class='ctx'> #define FS_XFLAG_REALTIME	0x00000001	/* data in realtime volume */</div><div class='hunk'>@@ -247,6 +333,8 @@ struct fsxattr {</div><div class='ctx'>  * also /sys/kernel/debug/ for filesystems with debugfs exports</div><div class='ctx'>  */</div><div class='ctx'> #define FS_IOC_GETFSSYSFSPATH		_IOR(0x15, 1, struct fs_sysfs_path)</div><div class='add'>+/* Get logical block metadata capability details */</div><div class='add'>+#define FS_IOC_GETLBMD_CAP		_IOWR(0x15, 2, struct logical_block_metadata_cap)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Inode flags (FS_IOC_GETFLAGS / FS_IOC_SETFLAGS)</div><div class='hunk'>@@ -342,10 +430,13 @@ typedef int __bitwise __kernel_rwf_t;</div><div class='ctx'> /* buffered IO that drops the cache after reading or writing data */</div><div class='ctx'> #define RWF_DONTCACHE	((__force __kernel_rwf_t)0x00000080)</div><div class='ctx'> </div><div class='add'>+/* prevent pipe and socket writes from raising SIGPIPE */</div><div class='add'>+#define RWF_NOSIGNAL	((__force __kernel_rwf_t)0x00000100)</div><div class='add'>+</div><div class='ctx'> /* mask of flags supported by the kernel */</div><div class='ctx'> #define RWF_SUPPORTED	(RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\</div><div class='ctx'> 			 RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\</div><div class='del'>-			 RWF_DONTCACHE)</div><div class='add'>+			 RWF_DONTCACHE | RWF_NOSIGNAL)</div><div class='ctx'> </div><div class='ctx'> #define PROCFS_IOCTL_MAGIC 'f'</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/trace/beauty/include/uapi/linux/prctl.h b/tools/perf/trace/beauty/include/uapi/linux/prctl.h<br/>index 3b93fb906e3c..51c4e8c82b1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/prctl.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/prctl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/prctl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/trace/beauty/include/uapi/linux/prctl.h</a></div><div class='hunk'>@@ -177,7 +177,17 @@ struct prctl_mm_map {</div><div class='ctx'> </div><div class='ctx'> #define PR_GET_TID_ADDRESS	40</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Flags for PR_SET_THP_DISABLE are only applicable when disabling. Bit 0</div><div class='add'>+ * is reserved, so PR_GET_THP_DISABLE can return "1 | flags", to effectively</div><div class='add'>+ * return "1" when no flags were specified for PR_SET_THP_DISABLE.</div><div class='add'>+ */</div><div class='ctx'> #define PR_SET_THP_DISABLE	41</div><div class='add'>+/*</div><div class='add'>+ * Don't disable THPs when explicitly advised (e.g., MADV_HUGEPAGE /</div><div class='add'>+ * VM_HUGEPAGE, MADV_COLLAPSE).</div><div class='add'>+ */</div><div class='add'>+# define PR_THP_DISABLE_EXCEPT_ADVISED	(1 &lt;&lt; 1)</div><div class='ctx'> #define PR_GET_THP_DISABLE	42</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -244,6 +254,8 @@ struct prctl_mm_map {</div><div class='ctx'> # define PR_MTE_TAG_MASK		(0xffffUL &lt;&lt; PR_MTE_TAG_SHIFT)</div><div class='ctx'> /* Unused; kept only for source compatibility */</div><div class='ctx'> # define PR_MTE_TCF_SHIFT		1</div><div class='add'>+/* MTE tag check store only */</div><div class='add'>+# define PR_MTE_STORE_ONLY		(1UL &lt;&lt; 19)</div><div class='ctx'> /* RISC-V pointer masking tag length */</div><div class='ctx'> # define PR_PMLEN_SHIFT			24</div><div class='ctx'> # define PR_PMLEN_MASK			(0x7fUL &lt;&lt; PR_PMLEN_SHIFT)</div><div class='hunk'>@@ -255,7 +267,12 @@ struct prctl_mm_map {</div><div class='ctx'> /* Dispatch syscalls to a userspace handler */</div><div class='ctx'> #define PR_SET_SYSCALL_USER_DISPATCH	59</div><div class='ctx'> # define PR_SYS_DISPATCH_OFF		0</div><div class='del'>-# define PR_SYS_DISPATCH_ON		1</div><div class='add'>+/* Enable dispatch except for the specified range */</div><div class='add'>+# define PR_SYS_DISPATCH_EXCLUSIVE_ON	1</div><div class='add'>+/* Enable dispatch for the specified range */</div><div class='add'>+# define PR_SYS_DISPATCH_INCLUSIVE_ON	2</div><div class='add'>+/* Legacy name for backwards compatibility */</div><div class='add'>+# define PR_SYS_DISPATCH_ON		PR_SYS_DISPATCH_EXCLUSIVE_ON</div><div class='ctx'> /* The control values for the user space selector when dispatch is enabled */</div><div class='ctx'> # define SYSCALL_DISPATCH_FILTER_ALLOW	0</div><div class='ctx'> # define SYSCALL_DISPATCH_FILTER_BLOCK	1</div><div class='head'>diff --git a/tools/perf/trace/beauty/include/uapi/linux/vhost.h b/tools/perf/trace/beauty/include/uapi/linux/vhost.h<br/>index d4b3e2ae1314..c57674a6aa0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/vhost.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/trace/beauty/include/uapi/linux/vhost.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/trace/beauty/include/uapi/linux/vhost.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/trace/beauty/include/uapi/linux/vhost.h</a></div><div class='hunk'>@@ -235,4 +235,39 @@</div><div class='ctx'>  */</div><div class='ctx'> #define VHOST_VDPA_GET_VRING_SIZE	_IOWR(VHOST_VIRTIO, 0x82,	\</div><div class='ctx'> 					      struct vhost_vring_state)</div><div class='add'>+</div><div class='add'>+/* Extended features manipulation */</div><div class='add'>+#define VHOST_GET_FEATURES_ARRAY _IOR(VHOST_VIRTIO, 0x83, \</div><div class='add'>+				       struct vhost_features_array)</div><div class='add'>+#define VHOST_SET_FEATURES_ARRAY _IOW(VHOST_VIRTIO, 0x83, \</div><div class='add'>+				       struct vhost_features_array)</div><div class='add'>+</div><div class='add'>+/* fork_owner values for vhost */</div><div class='add'>+#define VHOST_FORK_OWNER_KTHREAD 0</div><div class='add'>+#define VHOST_FORK_OWNER_TASK 1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * VHOST_SET_FORK_FROM_OWNER - Set the fork_owner flag for the vhost device,</div><div class='add'>+ * This ioctl must called before VHOST_SET_OWNER.</div><div class='add'>+ * Only available when CONFIG_VHOST_ENABLE_FORK_OWNER_CONTROL=y</div><div class='add'>+ *</div><div class='add'>+ * @param fork_owner: An 8-bit value that determines the vhost thread mode</div><div class='add'>+ *</div><div class='add'>+ * When fork_owner is set to VHOST_FORK_OWNER_TASK(default value):</div><div class='add'>+ *   - Vhost will create vhost worker as tasks forked from the owner,</div><div class='add'>+ *     inheriting all of the owner's attributes.</div><div class='add'>+ *</div><div class='add'>+ * When fork_owner is set to VHOST_FORK_OWNER_KTHREAD:</div><div class='add'>+ *   - Vhost will create vhost workers as kernel threads.</div><div class='add'>+ */</div><div class='add'>+#define VHOST_SET_FORK_FROM_OWNER _IOW(VHOST_VIRTIO, 0x84, __u8)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * VHOST_GET_FORK_OWNER - Get the current fork_owner flag for the vhost device.</div><div class='add'>+ * Only available when CONFIG_VHOST_ENABLE_FORK_OWNER_CONTROL=y</div><div class='add'>+ *</div><div class='add'>+ * @return: An 8-bit value indicating the current thread mode.</div><div class='add'>+ */</div><div class='add'>+#define VHOST_GET_FORK_FROM_OWNER _IOR(VHOST_VIRTIO, 0x85, __u8)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/perf/ui/browsers/annotate.c b/tools/perf/ui/browsers/annotate.c<br/>index 183902dac042..36aca8d6d003 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/browsers/annotate.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/browsers/annotate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/browsers/annotate.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/ui/browsers/annotate.c</a></div><div class='hunk'>@@ -4,7 +4,9 @@</div><div class='ctx'> #include "../ui.h"</div><div class='ctx'> #include "../../util/annotate.h"</div><div class='ctx'> #include "../../util/debug.h"</div><div class='add'>+#include "../../util/debuginfo.h"</div><div class='ctx'> #include "../../util/dso.h"</div><div class='add'>+#include "../../util/hashmap.h"</div><div class='ctx'> #include "../../util/hist.h"</div><div class='ctx'> #include "../../util/sort.h"</div><div class='ctx'> #include "../../util/map.h"</div><div class='hunk'>@@ -12,7 +14,9 @@</div><div class='ctx'> #include "../../util/symbol.h"</div><div class='ctx'> #include "../../util/evsel.h"</div><div class='ctx'> #include "../../util/evlist.h"</div><div class='add'>+#include "../../util/thread.h"</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='hunk'>@@ -27,10 +31,31 @@ struct annotate_browser {</div><div class='ctx'> 	struct rb_node		   *curr_hot;</div><div class='ctx'> 	struct annotation_line	   *selection;</div><div class='ctx'> 	struct arch		   *arch;</div><div class='add'>+	/*</div><div class='add'>+	 * perf top can delete hist_entry anytime.  Callers should make sure</div><div class='add'>+	 * its lifetime.</div><div class='add'>+	 */</div><div class='add'>+	struct hist_entry	   *he;</div><div class='add'>+	struct debuginfo	   *dbg;</div><div class='add'>+	struct evsel		   *evsel;</div><div class='add'>+	struct hashmap		   *type_hash;</div><div class='ctx'> 	bool			    searching_backwards;</div><div class='ctx'> 	char			    search_bf[128];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* A copy of target hist_entry for perf top. */</div><div class='add'>+static struct hist_entry annotate_he;</div><div class='add'>+</div><div class='add'>+static size_t type_hash(long key, void *ctx __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return key;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool type_equal(long key1, long key2, void *ctx __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return key1 == key2;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline struct annotation *browser__annotation(struct ui_browser *browser)</div><div class='ctx'> {</div><div class='ctx'> 	struct map_symbol *ms = browser-&gt;priv;</div><div class='hunk'>@@ -107,12 +132,21 @@ static void annotate_browser__write(struct ui_browser *browser, void *entry, int</div><div class='ctx'> 		.printf			 = annotate_browser__printf,</div><div class='ctx'> 		.write_graph		 = annotate_browser__write_graph,</div><div class='ctx'> 	};</div><div class='add'>+	struct annotation_print_data apd = {</div><div class='add'>+		.he = ab-&gt;he,</div><div class='add'>+		.arch = ab-&gt;arch,</div><div class='add'>+		.evsel = ab-&gt;evsel,</div><div class='add'>+		.dbg = ab-&gt;dbg,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/* The scroll bar isn't being used */</div><div class='ctx'> 	if (!browser-&gt;navkeypressed)</div><div class='ctx'> 		ops.width += 1;</div><div class='ctx'> </div><div class='del'>-	annotation_line__write(al, notes, &amp;ops);</div><div class='add'>+	if (!IS_ERR_OR_NULL(ab-&gt;type_hash))</div><div class='add'>+		apd.type_hash = ab-&gt;type_hash;</div><div class='add'>+</div><div class='add'>+	annotation_line__write(al, notes, &amp;ops, &amp;apd);</div><div class='ctx'> </div><div class='ctx'> 	if (ops.current_entry)</div><div class='ctx'> 		ab-&gt;selection = al;</div><div class='hunk'>@@ -515,9 +549,24 @@ static void ui_browser__init_asm_mode(struct ui_browser *browser)</div><div class='ctx'> static int sym_title(struct symbol *sym, struct map *map, char *title,</div><div class='ctx'> 		     size_t sz, int percent_type)</div><div class='ctx'> {</div><div class='del'>-	return snprintf(title, sz, "%s  %s [Percent: %s]", sym-&gt;name,</div><div class='add'>+	return snprintf(title, sz, "%s  %s [Percent: %s] %s", sym-&gt;name,</div><div class='ctx'> 			dso__long_name(map__dso(map)),</div><div class='del'>-			percent_type_str(percent_type));</div><div class='add'>+			percent_type_str(percent_type),</div><div class='add'>+			annotate_opts.code_with_type ? "[Type]" : "");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void annotate_browser__show_function_title(struct annotate_browser *browser)</div><div class='add'>+{</div><div class='add'>+	struct ui_browser *b = &amp;browser-&gt;b;</div><div class='add'>+	struct map_symbol *ms = b-&gt;priv;</div><div class='add'>+	struct symbol *sym = ms-&gt;sym;</div><div class='add'>+	char title[SYM_TITLE_MAX_SIZE];</div><div class='add'>+</div><div class='add'>+	sym_title(sym, ms-&gt;map, title, sizeof(title), annotate_opts.percent_type);</div><div class='add'>+</div><div class='add'>+	ui_browser__gotorc_title(b, 0, 0);</div><div class='add'>+	ui_browser__set_color(b, HE_COLORSET_ROOT);</div><div class='add'>+	ui_browser__write_nstring(b, title, b-&gt;width + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -536,7 +585,6 @@ static bool annotate_browser__callq(struct annotate_browser *browser,</div><div class='ctx'> 	struct map_symbol *ms = browser-&gt;b.priv, target_ms;</div><div class='ctx'> 	struct disasm_line *dl = disasm_line(browser-&gt;selection);</div><div class='ctx'> 	struct annotation *notes;</div><div class='del'>-	char title[SYM_TITLE_MAX_SIZE];</div><div class='ctx'> </div><div class='ctx'> 	if (!dl-&gt;ops.target.sym) {</div><div class='ctx'> 		ui_helpline__puts("The called function was not found.");</div><div class='hunk'>@@ -557,9 +605,14 @@ static bool annotate_browser__callq(struct annotate_browser *browser,</div><div class='ctx'> 	target_ms.map = ms-&gt;map;</div><div class='ctx'> 	target_ms.sym = dl-&gt;ops.target.sym;</div><div class='ctx'> 	annotation__unlock(notes);</div><div class='del'>-	symbol__tui_annotate(&amp;target_ms, evsel, hbt);</div><div class='del'>-	sym_title(ms-&gt;sym, ms-&gt;map, title, sizeof(title), annotate_opts.percent_type);</div><div class='del'>-	ui_browser__show_title(&amp;browser-&gt;b, title);</div><div class='add'>+	__hist_entry__tui_annotate(browser-&gt;he, &amp;target_ms, evsel, hbt, NO_ADDR);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The annotate_browser above changed the title with the target function</div><div class='add'>+	 * and now it's back to the original function.  Refresh the header line</div><div class='add'>+	 * for the original function again.</div><div class='add'>+	 */</div><div class='add'>+	annotate_browser__show_function_title(browser);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -731,20 +784,12 @@ bool annotate_browser__continue_search_reverse(struct annotate_browser *browser,</div><div class='ctx'> 	return __annotate_browser__search_reverse(browser);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int annotate_browser__show(struct ui_browser *browser, char *title, const char *help)</div><div class='add'>+static int annotate_browser__show(struct annotate_browser *browser, char *title, const char *help)</div><div class='ctx'> {</div><div class='del'>-	struct map_symbol *ms = browser-&gt;priv;</div><div class='del'>-	struct symbol *sym = ms-&gt;sym;</div><div class='del'>-	char symbol_dso[SYM_TITLE_MAX_SIZE];</div><div class='del'>-</div><div class='del'>-	if (ui_browser__show(browser, title, help) &lt; 0)</div><div class='add'>+	if (ui_browser__show(&amp;browser-&gt;b, title, help) &lt; 0)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	sym_title(sym, ms-&gt;map, symbol_dso, sizeof(symbol_dso), annotate_opts.percent_type);</div><div class='del'>-</div><div class='del'>-	ui_browser__gotorc_title(browser, 0, 0);</div><div class='del'>-	ui_browser__set_color(browser, HE_COLORSET_ROOT);</div><div class='del'>-	ui_browser__write_nstring(browser, symbol_dso, browser-&gt;width + 1);</div><div class='add'>+	annotate_browser__show_function_title(browser);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -793,6 +838,42 @@ static int annotate__scnprintf_title(struct hists *hists, char *bf, size_t size)</div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void annotate_browser__debuginfo_warning(struct annotate_browser *browser)</div><div class='add'>+{</div><div class='add'>+	struct map_symbol *ms = browser-&gt;b.priv;</div><div class='add'>+	struct dso *dso = map__dso(ms-&gt;map);</div><div class='add'>+</div><div class='add'>+	if (browser-&gt;dbg == NULL &amp;&amp; annotate_opts.code_with_type &amp;&amp;</div><div class='add'>+	    !dso__debuginfo_warned(dso)) {</div><div class='add'>+		ui__warning("DWARF debuginfo not found.\n\n"</div><div class='add'>+			    "Data-type in this DSO will not be displayed.\n"</div><div class='add'>+			    "Please make sure to have debug information.");</div><div class='add'>+		dso__set_debuginfo_warned(dso);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s64 annotate_browser__curr_hot_offset(struct annotate_browser *browser)</div><div class='add'>+{</div><div class='add'>+	struct annotation_line *al = NULL;</div><div class='add'>+</div><div class='add'>+	if (browser-&gt;curr_hot)</div><div class='add'>+		al = rb_entry(browser-&gt;curr_hot, struct annotation_line, rb_node);</div><div class='add'>+</div><div class='add'>+	return al ? al-&gt;offset : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void annotate_browser__symbol_annotate_error(struct annotate_browser *browser, int err)</div><div class='add'>+{</div><div class='add'>+	struct map_symbol *ms = browser-&gt;b.priv;</div><div class='add'>+	struct symbol *sym = ms-&gt;sym;</div><div class='add'>+	struct dso *dso = map__dso(ms-&gt;map);</div><div class='add'>+	char msg[BUFSIZ];</div><div class='add'>+</div><div class='add'>+	dso__set_annotate_warned(dso);</div><div class='add'>+	symbol__strerror_disassemble(ms, err, msg, sizeof(msg));</div><div class='add'>+	ui__error("Couldn't annotate %s:\n%s", sym-&gt;name, msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> 				 struct evsel *evsel,</div><div class='ctx'> 				 struct hist_browser_timer *hbt)</div><div class='hunk'>@@ -809,11 +890,16 @@ static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> 	int key;</div><div class='ctx'> </div><div class='ctx'> 	annotate__scnprintf_title(hists, title, sizeof(title));</div><div class='del'>-	if (annotate_browser__show(&amp;browser-&gt;b, title, help) &lt; 0)</div><div class='add'>+	if (annotate_browser__show(browser, title, help) &lt; 0)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	annotate_browser__calc_percent(browser, evsel);</div><div class='ctx'> </div><div class='add'>+	if (browser-&gt;selection != NULL) {</div><div class='add'>+		browser-&gt;curr_hot = &amp;browser-&gt;selection-&gt;rb_node;</div><div class='add'>+		browser-&gt;b.use_navkeypressed = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (browser-&gt;curr_hot) {</div><div class='ctx'> 		annotate_browser__set_rb_top(browser, browser-&gt;curr_hot);</div><div class='ctx'> 		browser-&gt;b.navkeypressed = false;</div><div class='hunk'>@@ -823,6 +909,8 @@ static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> </div><div class='ctx'> 	annotation_br_cntr_abbr_list(&amp;br_cntr_text, evsel, false);</div><div class='ctx'> </div><div class='add'>+	annotate_browser__debuginfo_warning(browser);</div><div class='add'>+</div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		key = ui_browser__run(&amp;browser-&gt;b, delay_secs);</div><div class='ctx'> </div><div class='hunk'>@@ -845,7 +933,7 @@ static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> 			if (delay_secs != 0) {</div><div class='ctx'> 				symbol__annotate_decay_histogram(sym, evsel);</div><div class='ctx'> 				annotate__scnprintf_title(hists, title, sizeof(title));</div><div class='del'>-				annotate_browser__show(&amp;browser-&gt;b, title, help);</div><div class='add'>+				annotate_browser__show(browser, title, help);</div><div class='ctx'> 			}</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case K_TAB:</div><div class='hunk'>@@ -891,11 +979,12 @@ static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> 		"b             Toggle percent base [period/hits]\n"</div><div class='ctx'> 		"B             Branch counter abbr list (Optional)\n"</div><div class='ctx'> 		"?             Search string backwards\n"</div><div class='del'>-		"f             Toggle showing offsets to full address\n");</div><div class='add'>+		"f             Toggle showing offsets to full address\n"</div><div class='add'>+		"T             Toggle data type display\n");</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case 'r':</div><div class='ctx'> 			script_browse(NULL, NULL);</div><div class='del'>-			annotate_browser__show(&amp;browser-&gt;b, title, help);</div><div class='add'>+			annotate_browser__show(browser, title, help);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case 'k':</div><div class='ctx'> 			annotate_opts.show_linenr = !annotate_opts.show_linenr;</div><div class='hunk'>@@ -906,12 +995,24 @@ static int annotate_browser__run(struct annotate_browser *browser,</div><div class='ctx'> 		case 'H':</div><div class='ctx'> 			nd = browser-&gt;curr_hot;</div><div class='ctx'> 			break;</div><div class='del'>-		case 's':</div><div class='add'>+		case 's': {</div><div class='add'>+			struct annotation_line *al = NULL;</div><div class='add'>+			s64 offset = annotate_browser__curr_hot_offset(browser);</div><div class='add'>+</div><div class='ctx'> 			if (annotate_browser__toggle_source(browser, evsel))</div><div class='ctx'> 				ui_helpline__puts(help);</div><div class='add'>+</div><div class='add'>+			/* Update the annotation browser's rb_tree, and reset the nd */</div><div class='add'>+			annotate_browser__calc_percent(browser, evsel);</div><div class='add'>+			/* Try to find the same asm line as before */</div><div class='add'>+			al = annotated_source__get_line(notes-&gt;src, offset);</div><div class='add'>+			browser-&gt;curr_hot = al ? &amp;al-&gt;rb_node : NULL;</div><div class='add'>+			nd = browser-&gt;curr_hot;</div><div class='add'>+</div><div class='ctx'> 			annotate__scnprintf_title(hists, title, sizeof(title));</div><div class='del'>-			annotate_browser__show(&amp;browser-&gt;b, title, help);</div><div class='add'>+			annotate_browser__show(browser, title, help);</div><div class='ctx'> 			continue;</div><div class='add'>+		}</div><div class='ctx'> 		case 'o':</div><div class='ctx'> 			annotate_opts.use_offset = !annotate_opts.use_offset;</div><div class='ctx'> 			annotation__update_column_widths(notes);</div><div class='hunk'>@@ -975,7 +1076,7 @@ show_sup_ins:</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		case 'P':</div><div class='del'>-			map_symbol__annotation_dump(ms, evsel);</div><div class='add'>+			map_symbol__annotation_dump(ms, evsel, browser-&gt;he);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case 't':</div><div class='ctx'> 			if (symbol_conf.show_total_period) {</div><div class='hunk'>@@ -998,7 +1099,7 @@ show_sup_ins:</div><div class='ctx'> 		case 'b':</div><div class='ctx'> 			switch_percent_type(&amp;annotate_opts, key == 'b');</div><div class='ctx'> 			annotate__scnprintf_title(hists, title, sizeof(title));</div><div class='del'>-			annotate_browser__show(&amp;browser-&gt;b, title, help);</div><div class='add'>+			annotate_browser__show(browser, title, help);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case 'B':</div><div class='ctx'> 			if (br_cntr_text)</div><div class='hunk'>@@ -1011,6 +1112,17 @@ show_sup_ins:</div><div class='ctx'> 		case 'f':</div><div class='ctx'> 			annotation__toggle_full_addr(notes, ms);</div><div class='ctx'> 			continue;</div><div class='add'>+		case 'T':</div><div class='add'>+			annotate_opts.code_with_type ^= 1;</div><div class='add'>+			if (browser-&gt;dbg == NULL)</div><div class='add'>+				browser-&gt;dbg = dso__debuginfo(map__dso(ms-&gt;map));</div><div class='add'>+			if (browser-&gt;type_hash == NULL) {</div><div class='add'>+				browser-&gt;type_hash = hashmap__new(type_hash, type_equal,</div><div class='add'>+								  /*ctx=*/NULL);</div><div class='add'>+			}</div><div class='add'>+			annotate_browser__show(browser, title, help);</div><div class='add'>+			annotate_browser__debuginfo_warning(browser);</div><div class='add'>+			continue;</div><div class='ctx'> 		case K_LEFT:</div><div class='ctx'> 		case '&lt;':</div><div class='ctx'> 		case '&gt;':</div><div class='hunk'>@@ -1032,25 +1144,20 @@ out:</div><div class='ctx'> 	return key;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int map_symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='del'>-			     struct hist_browser_timer *hbt)</div><div class='del'>-{</div><div class='del'>-	return symbol__tui_annotate(ms, evsel, hbt);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int hist_entry__tui_annotate(struct hist_entry *he, struct evsel *evsel,</div><div class='del'>-			     struct hist_browser_timer *hbt)</div><div class='add'>+			     struct hist_browser_timer *hbt, u64 al_addr)</div><div class='ctx'> {</div><div class='ctx'> 	/* reset abort key so that it can get Ctrl-C as a key */</div><div class='ctx'> 	SLang_reset_tty();</div><div class='ctx'> 	SLang_init_tty(0, 0, 0);</div><div class='ctx'> 	SLtty_set_suspend_state(true);</div><div class='ctx'> </div><div class='del'>-	return map_symbol__tui_annotate(&amp;he-&gt;ms, evsel, hbt);</div><div class='add'>+	return __hist_entry__tui_annotate(he, &amp;he-&gt;ms, evsel, hbt, al_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='del'>-			 struct hist_browser_timer *hbt)</div><div class='add'>+int __hist_entry__tui_annotate(struct hist_entry *he, struct map_symbol *ms,</div><div class='add'>+			       struct evsel *evsel,</div><div class='add'>+			       struct hist_browser_timer *hbt, u64 al_addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *sym = ms-&gt;sym;</div><div class='ctx'> 	struct annotation *notes = symbol__annotation(sym);</div><div class='hunk'>@@ -1064,6 +1171,8 @@ int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='ctx'> 			.priv	 = ms,</div><div class='ctx'> 			.use_navkeypressed = true,</div><div class='ctx'> 		},</div><div class='add'>+		.he = he,</div><div class='add'>+		.evsel = evsel,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct dso *dso;</div><div class='ctx'> 	int ret = -1, err;</div><div class='hunk'>@@ -1079,10 +1188,7 @@ int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='ctx'> 	if (not_annotated || !sym-&gt;annotate2) {</div><div class='ctx'> 		err = symbol__annotate2(ms, evsel, &amp;browser.arch);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			char msg[BUFSIZ];</div><div class='del'>-			dso__set_annotate_warned(dso);</div><div class='del'>-			symbol__strerror_disassemble(ms, err, msg, sizeof(msg));</div><div class='del'>-			ui__error("Couldn't annotate %s:\n%s", sym-&gt;name, msg);</div><div class='add'>+			annotate_browser__symbol_annotate_error(&amp;browser, err);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1091,10 +1197,31 @@ int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='ctx'> 			if (!annotation__has_source(notes))</div><div class='ctx'> 				ui__warning("Annotation has no source code.");</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		err = evsel__get_arch(evsel, &amp;browser.arch);</div><div class='add'>+		if (err) {</div><div class='add'>+			annotate_browser__symbol_annotate_error(&amp;browser, err);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy necessary information when it's called from perf top */</div><div class='add'>+	if (hbt != NULL &amp;&amp; he != &amp;annotate_he) {</div><div class='add'>+		annotate_he.hists = he-&gt;hists;</div><div class='add'>+		annotate_he.thread = thread__get(he-&gt;thread);</div><div class='add'>+		annotate_he.cpumode = he-&gt;cpumode;</div><div class='add'>+		map_symbol__copy(&amp;annotate_he.ms, ms);</div><div class='add'>+</div><div class='add'>+		browser.he = &amp;annotate_he;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ui_helpline__push("Press ESC to exit");</div><div class='ctx'> </div><div class='add'>+	if (annotate_opts.code_with_type) {</div><div class='add'>+		browser.dbg = dso__debuginfo(dso);</div><div class='add'>+		browser.type_hash = hashmap__new(type_hash, type_equal, /*ctx=*/NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	browser.b.width = notes-&gt;src-&gt;widths.max_line_len;</div><div class='ctx'> 	browser.b.nr_entries = notes-&gt;src-&gt;nr_entries;</div><div class='ctx'> 	browser.b.entries = &amp;notes-&gt;src-&gt;source;</div><div class='hunk'>@@ -1103,10 +1230,40 @@ int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='ctx'> 	if (annotate_opts.hide_src_code)</div><div class='ctx'> 		ui_browser__init_asm_mode(&amp;browser.b);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If al_addr is set, it means that there should be a line</div><div class='add'>+	 * intentionally selected, not based on the percentages</div><div class='add'>+	 * which caculated by the event sampling. In this case, we</div><div class='add'>+	 * convey this information into the browser selection, where</div><div class='add'>+	 * the selection in other cases should be empty.</div><div class='add'>+	 */</div><div class='add'>+	if (al_addr != NO_ADDR) {</div><div class='add'>+		struct annotation_line *al = annotated_source__get_line(notes-&gt;src,</div><div class='add'>+			al_addr - sym-&gt;start);</div><div class='add'>+</div><div class='add'>+		browser.selection = al;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = annotate_browser__run(&amp;browser, evsel, hbt);</div><div class='ctx'> </div><div class='add'>+	debuginfo__delete(browser.dbg);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR_OR_NULL(browser.type_hash)) {</div><div class='add'>+		struct hashmap_entry *cur;</div><div class='add'>+		size_t bkt;</div><div class='add'>+</div><div class='add'>+		hashmap__for_each_entry(browser.type_hash, cur, bkt)</div><div class='add'>+			zfree(&amp;cur-&gt;pvalue);</div><div class='add'>+		hashmap__free(browser.type_hash);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (not_annotated &amp;&amp; !notes-&gt;src-&gt;tried_source)</div><div class='ctx'> 		annotated_source__purge(notes-&gt;src);</div><div class='ctx'> </div><div class='add'>+	if (hbt != NULL &amp;&amp; he != &amp;annotate_he) {</div><div class='add'>+		thread__zput(annotate_he.thread);</div><div class='add'>+		map_symbol__exit(&amp;annotate_he.ms);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/ui/browsers/hists.c b/tools/perf/ui/browsers/hists.c<br/>index d9d3fb44477a..08fecbe28a52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/browsers/hists.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/browsers/hists.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/browsers/hists.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/ui/browsers/hists.c</a></div><div class='hunk'>@@ -2484,8 +2484,8 @@ do_annotate(struct hist_browser *browser, struct popup_action *act)</div><div class='ctx'> 	else</div><div class='ctx'> 		evsel = hists_to_evsel(browser-&gt;hists);</div><div class='ctx'> </div><div class='del'>-	err = map_symbol__tui_annotate(&amp;act-&gt;ms, evsel, browser-&gt;hbt);</div><div class='ctx'> 	he = hist_browser__selected_entry(browser);</div><div class='add'>+	err = __hist_entry__tui_annotate(he, &amp;act-&gt;ms, evsel, browser-&gt;hbt, NO_ADDR);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * offer option to annotate the other branch source or target</div><div class='ctx'> 	 * (if they exists) when returning from annotate</div><div class='head'>diff --git a/tools/perf/ui/hist.c b/tools/perf/ui/hist.c<br/>index b085eb0de849..e58327595d37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/hist.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/hist.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/hist.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/ui/hist.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;math.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='head'>diff --git a/tools/perf/ui/libslang.h b/tools/perf/ui/libslang.h<br/>index 1dff3020e9d5..6722561e0458 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/libslang.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/ui/libslang.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/ui/libslang.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/ui/libslang.h</a></div><div class='hunk'>@@ -15,11 +15,7 @@</div><div class='ctx'> #define ENABLE_SLFUTURE_CONST 1</div><div class='ctx'> #define ENABLE_SLFUTURE_VOID 1</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_SLANG_INCLUDE_SUBDIR</div><div class='del'>-#include &lt;slang/slang.h&gt;</div><div class='del'>-#else</div><div class='ctx'> #include &lt;slang.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define SL_KEY_UNTAB 0x1000</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/Build b/tools/perf/util/Build<br/>index 4959e7a990e4..1c2a43e1dc68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/Build</a></div><div class='hunk'>@@ -2,18 +2,19 @@ include $(srctree)/tools/scripts/Makefile.include</div><div class='ctx'> include $(srctree)/tools/scripts/utilities.mak</div><div class='ctx'> </div><div class='ctx'> perf-util-y += arm64-frame-pointer-unwind-support.o</div><div class='add'>+perf-util-y += addr2line.o</div><div class='ctx'> perf-util-y += addr_location.o</div><div class='ctx'> perf-util-y += annotate.o</div><div class='ctx'> perf-util-y += block-info.o</div><div class='ctx'> perf-util-y += block-range.o</div><div class='ctx'> perf-util-y += build-id.o</div><div class='ctx'> perf-util-y += cacheline.o</div><div class='add'>+perf-util-y += capstone.o</div><div class='ctx'> perf-util-y += config.o</div><div class='ctx'> perf-util-y += copyfile.o</div><div class='ctx'> perf-util-y += ctype.o</div><div class='ctx'> perf-util-y += db-export.o</div><div class='ctx'> perf-util-y += disasm.o</div><div class='del'>-perf-util-y += disasm_bpf.o</div><div class='ctx'> perf-util-y += env.o</div><div class='ctx'> perf-util-y += event.o</div><div class='ctx'> perf-util-y += evlist.o</div><div class='hunk'>@@ -23,8 +24,9 @@ perf-util-y += evsel_fprintf.o</div><div class='ctx'> perf-util-y += perf_event_attr_fprintf.o</div><div class='ctx'> perf-util-y += evswitch.o</div><div class='ctx'> perf-util-y += find_bit.o</div><div class='del'>-perf-util-y += get_current_dir_name.o</div><div class='ctx'> perf-util-y += levenshtein.o</div><div class='add'>+perf-util-$(CONFIG_LIBBFD) += libbfd.o</div><div class='add'>+perf-util-y += llvm.o</div><div class='ctx'> perf-util-y += mmap.o</div><div class='ctx'> perf-util-y += memswap.o</div><div class='ctx'> perf-util-y += parse-events.o</div><div class='hunk'>@@ -127,21 +129,22 @@ perf-util-y += iostat.o</div><div class='ctx'> perf-util-y += stream.o</div><div class='ctx'> perf-util-y += kvm-stat.o</div><div class='ctx'> perf-util-y += lock-contention.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += auxtrace.o</div><div class='add'>+perf-util-y += auxtrace.o</div><div class='ctx'> perf-util-y += intel-pt-decoder/</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += intel-pt.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += intel-bts.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += arm-spe.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += arm-spe-decoder/</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += hisi-ptt.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += hisi-ptt-decoder/</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += s390-cpumsf.o</div><div class='add'>+perf-util-y += intel-pt.o</div><div class='add'>+perf-util-y += intel-bts.o</div><div class='add'>+perf-util-y += arm-spe.o</div><div class='add'>+perf-util-y += arm-spe-decoder/</div><div class='add'>+perf-util-y += hisi-ptt.o</div><div class='add'>+perf-util-y += hisi-ptt-decoder/</div><div class='add'>+perf-util-y += s390-cpumsf.o</div><div class='add'>+perf-util-y += powerpc-vpadtl.o</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_LIBOPENCSD</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += cs-etm.o</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += cs-etm-decoder/</div><div class='add'>+perf-util-y += cs-etm.o</div><div class='add'>+perf-util-y += cs-etm-decoder/</div><div class='ctx'> endif</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += cs-etm-base.o</div><div class='add'>+perf-util-y += cs-etm-base.o</div><div class='ctx'> </div><div class='ctx'> perf-util-y += parse-branch-options.o</div><div class='ctx'> perf-util-y += dump-insn.o</div><div class='head'>diff --git a/tools/perf/util/addr2line.c b/tools/perf/util/addr2line.c<br/>new file mode 100644<br/>index 000000000000..f2d94a3272d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/addr2line.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/addr2line.c</a></div><div class='hunk'>@@ -0,0 +1,439 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "addr2line.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "dso.h"</div><div class='add'>+#include "string2.h"</div><div class='add'>+#include "srcline.h"</div><div class='add'>+#include "symbol.h"</div><div class='add'>+#include "symbol_conf.h"</div><div class='add'>+</div><div class='add'>+#include &lt;api/io.h&gt;</div><div class='add'>+#include &lt;linux/zalloc.h&gt;</div><div class='add'>+#include &lt;subcmd/run-command.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX_INLINE_NEST 1024</div><div class='add'>+</div><div class='add'>+/* If addr2line doesn't return data for 1 second then timeout. */</div><div class='add'>+int addr2line_timeout_ms = 1 * 1000;</div><div class='add'>+</div><div class='add'>+static int filename_split(char *filename, unsigned int *line_nr)</div><div class='add'>+{</div><div class='add'>+	char *sep;</div><div class='add'>+</div><div class='add'>+	sep = strchr(filename, '\n');</div><div class='add'>+	if (sep)</div><div class='add'>+		*sep = '\0';</div><div class='add'>+</div><div class='add'>+	if (!strcmp(filename, "??:0"))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sep = strchr(filename, ':');</div><div class='add'>+	if (sep) {</div><div class='add'>+		*sep++ = '\0';</div><div class='add'>+		*line_nr = strtoul(sep, NULL, 0);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	pr_debug("addr2line missing ':' in filename split\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void addr2line_subprocess_cleanup(struct child_process *a2l)</div><div class='add'>+{</div><div class='add'>+	if (a2l-&gt;pid != -1) {</div><div class='add'>+		kill(a2l-&gt;pid, SIGKILL);</div><div class='add'>+		finish_command(a2l); /* ignore result, we don't care */</div><div class='add'>+		a2l-&gt;pid = -1;</div><div class='add'>+		close(a2l-&gt;in);</div><div class='add'>+		close(a2l-&gt;out);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(a2l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct child_process *addr2line_subprocess_init(const char *addr2line_path,</div><div class='add'>+							const char *binary_path)</div><div class='add'>+{</div><div class='add'>+	const char *argv[] = {</div><div class='add'>+		addr2line_path ?: "addr2line",</div><div class='add'>+		"-e", binary_path,</div><div class='add'>+		"-a", "-i", "-f", NULL</div><div class='add'>+	};</div><div class='add'>+	struct child_process *a2l = zalloc(sizeof(*a2l));</div><div class='add'>+	int start_command_status = 0;</div><div class='add'>+</div><div class='add'>+	if (a2l == NULL) {</div><div class='add'>+		pr_err("Failed to allocate memory for addr2line");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a2l-&gt;pid = -1;</div><div class='add'>+	a2l-&gt;in = -1;</div><div class='add'>+	a2l-&gt;out = -1;</div><div class='add'>+	a2l-&gt;no_stderr = 1;</div><div class='add'>+</div><div class='add'>+	a2l-&gt;argv = argv;</div><div class='add'>+	start_command_status = start_command(a2l);</div><div class='add'>+	a2l-&gt;argv = NULL; /* it's not used after start_command; avoid dangling pointers */</div><div class='add'>+</div><div class='add'>+	if (start_command_status != 0) {</div><div class='add'>+		pr_warning("could not start addr2line (%s) for %s: start_command return code %d\n",</div><div class='add'>+			addr2line_path, binary_path, start_command_status);</div><div class='add'>+		addr2line_subprocess_cleanup(a2l);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return a2l;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum a2l_style {</div><div class='add'>+	BROKEN,</div><div class='add'>+	GNU_BINUTILS,</div><div class='add'>+	LLVM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum a2l_style addr2line_configure(struct child_process *a2l, const char *dso_name)</div><div class='add'>+{</div><div class='add'>+	static bool cached;</div><div class='add'>+	static enum a2l_style style;</div><div class='add'>+</div><div class='add'>+	if (!cached) {</div><div class='add'>+		char buf[128];</div><div class='add'>+		struct io io;</div><div class='add'>+		int ch;</div><div class='add'>+		int lines;</div><div class='add'>+</div><div class='add'>+		if (write(a2l-&gt;in, ",\n", 2) != 2)</div><div class='add'>+			return BROKEN;</div><div class='add'>+</div><div class='add'>+		io__init(&amp;io, a2l-&gt;out, buf, sizeof(buf));</div><div class='add'>+		ch = io__get_char(&amp;io);</div><div class='add'>+		if (ch == ',') {</div><div class='add'>+			style = LLVM;</div><div class='add'>+			cached = true;</div><div class='add'>+			lines = 1;</div><div class='add'>+			pr_debug3("Detected LLVM addr2line style\n");</div><div class='add'>+		} else if (ch == '0') {</div><div class='add'>+			style = GNU_BINUTILS;</div><div class='add'>+			cached = true;</div><div class='add'>+			lines = 3;</div><div class='add'>+			pr_debug3("Detected binutils addr2line style\n");</div><div class='add'>+		} else {</div><div class='add'>+			if (!symbol_conf.disable_add2line_warn) {</div><div class='add'>+				char *output = NULL;</div><div class='add'>+				size_t output_len;</div><div class='add'>+</div><div class='add'>+				io__getline(&amp;io, &amp;output, &amp;output_len);</div><div class='add'>+				pr_warning("%s %s: addr2line configuration failed\n",</div><div class='add'>+					   __func__, dso_name);</div><div class='add'>+				pr_warning("\t%c%s", ch, output);</div><div class='add'>+			}</div><div class='add'>+			pr_debug("Unknown/broken addr2line style\n");</div><div class='add'>+			return BROKEN;</div><div class='add'>+		}</div><div class='add'>+		while (lines) {</div><div class='add'>+			ch = io__get_char(&amp;io);</div><div class='add'>+			if (ch &lt;= 0)</div><div class='add'>+				break;</div><div class='add'>+			if (ch == '\n')</div><div class='add'>+				lines--;</div><div class='add'>+		}</div><div class='add'>+		/* Ignore SIGPIPE in the event addr2line exits. */</div><div class='add'>+		signal(SIGPIPE, SIG_IGN);</div><div class='add'>+	}</div><div class='add'>+	return style;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_addr2line_record(struct io *io,</div><div class='add'>+				 enum a2l_style style,</div><div class='add'>+				 const char *dso_name,</div><div class='add'>+				 u64 addr,</div><div class='add'>+				 bool first,</div><div class='add'>+				 char **function,</div><div class='add'>+				 char **filename,</div><div class='add'>+				 unsigned int *line_nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Returns:</div><div class='add'>+	 * -1 ==&gt; error</div><div class='add'>+	 * 0 ==&gt; sentinel (or other ill-formed) record read</div><div class='add'>+	 * 1 ==&gt; a genuine record read</div><div class='add'>+	 */</div><div class='add'>+	char *line = NULL;</div><div class='add'>+	size_t line_len = 0;</div><div class='add'>+	unsigned int dummy_line_nr = 0;</div><div class='add'>+	int ret = -1;</div><div class='add'>+</div><div class='add'>+	if (function != NULL)</div><div class='add'>+		zfree(function);</div><div class='add'>+</div><div class='add'>+	if (filename != NULL)</div><div class='add'>+		zfree(filename);</div><div class='add'>+</div><div class='add'>+	if (line_nr != NULL)</div><div class='add'>+		*line_nr = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Read the first line. Without an error this will be:</div><div class='add'>+	 * - for the first line an address like 0x1234,</div><div class='add'>+	 * - the binutils sentinel 0x0000000000000000,</div><div class='add'>+	 * - the llvm-addr2line the sentinel ',' character,</div><div class='add'>+	 * - the function name line for an inlined function.</div><div class='add'>+	 */</div><div class='add'>+	if (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	pr_debug3("%s %s: addr2line read address for sentinel: %s", __func__, dso_name, line);</div><div class='add'>+	if (style == LLVM &amp;&amp; line_len == 2 &amp;&amp; line[0] == ',') {</div><div class='add'>+		/* Found the llvm-addr2line sentinel character. */</div><div class='add'>+		zfree(&amp;line);</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (style == GNU_BINUTILS &amp;&amp; (!first || addr != 0)) {</div><div class='add'>+		int zero_count = 0, non_zero_count = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * Check for binutils sentinel ignoring it for the case the</div><div class='add'>+		 * requested address is 0.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* A given address should always start 0x. */</div><div class='add'>+		if (line_len &gt;= 2 || line[0] != '0' || line[1] != 'x') {</div><div class='add'>+			for (size_t i = 2; i &lt; line_len; i++) {</div><div class='add'>+				if (line[i] == '0')</div><div class='add'>+					zero_count++;</div><div class='add'>+				else if (line[i] != '\n')</div><div class='add'>+					non_zero_count++;</div><div class='add'>+			}</div><div class='add'>+			if (!non_zero_count) {</div><div class='add'>+				int ch;</div><div class='add'>+</div><div class='add'>+				if (first &amp;&amp; !zero_count) {</div><div class='add'>+					/* Line was erroneous just '0x'. */</div><div class='add'>+					goto error;</div><div class='add'>+				}</div><div class='add'>+				/*</div><div class='add'>+				 * Line was 0x0..0, the sentinel for binutils. Remove</div><div class='add'>+				 * the function and filename lines.</div><div class='add'>+				 */</div><div class='add'>+				zfree(&amp;line);</div><div class='add'>+				do {</div><div class='add'>+					ch = io__get_char(io);</div><div class='add'>+				} while (ch &gt; 0 &amp;&amp; ch != '\n');</div><div class='add'>+				do {</div><div class='add'>+					ch = io__get_char(io);</div><div class='add'>+				} while (ch &gt; 0 &amp;&amp; ch != '\n');</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* Read the second function name line (if inline data then this is the first line). */</div><div class='add'>+	if (first &amp;&amp; (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len))</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	pr_debug3("%s %s: addr2line read line: %s", __func__, dso_name, line);</div><div class='add'>+	if (function != NULL)</div><div class='add'>+		*function = strdup(strim(line));</div><div class='add'>+</div><div class='add'>+	zfree(&amp;line);</div><div class='add'>+	line_len = 0;</div><div class='add'>+</div><div class='add'>+	/* Read the third filename and line number line. */</div><div class='add'>+	if (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	pr_debug3("%s %s: addr2line filename:number : %s", __func__, dso_name, line);</div><div class='add'>+	if (filename_split(line, line_nr == NULL ? &amp;dummy_line_nr : line_nr) == 0 &amp;&amp;</div><div class='add'>+	    style == GNU_BINUTILS) {</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (filename != NULL)</div><div class='add'>+		*filename = strdup(line);</div><div class='add'>+</div><div class='add'>+	zfree(&amp;line);</div><div class='add'>+	line_len = 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	free(line);</div><div class='add'>+	if (function != NULL)</div><div class='add'>+		zfree(function);</div><div class='add'>+	if (filename != NULL)</div><div class='add'>+		zfree(filename);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int inline_list__append_record(struct dso *dso,</div><div class='add'>+				      struct inline_node *node,</div><div class='add'>+				      struct symbol *sym,</div><div class='add'>+				      const char *function,</div><div class='add'>+				      const char *filename,</div><div class='add'>+				      unsigned int line_nr)</div><div class='add'>+{</div><div class='add'>+	struct symbol *inline_sym = new_inline_sym(dso, sym, function);</div><div class='add'>+</div><div class='add'>+	return inline_list__append(inline_sym, srcline_from_fileline(filename, line_nr), node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cmd__addr2line(const char *dso_name, u64 addr,</div><div class='add'>+		   char **file, unsigned int *line_nr,</div><div class='add'>+		   struct dso *dso,</div><div class='add'>+		   bool unwind_inlines,</div><div class='add'>+		   struct inline_node *node,</div><div class='add'>+		   struct symbol *sym __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct child_process *a2l = dso__a2l(dso);</div><div class='add'>+	char *record_function = NULL;</div><div class='add'>+	char *record_filename = NULL;</div><div class='add'>+	unsigned int record_line_nr = 0;</div><div class='add'>+	int record_status = -1;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	size_t inline_count = 0;</div><div class='add'>+	int len;</div><div class='add'>+	char buf[128];</div><div class='add'>+	ssize_t written;</div><div class='add'>+	struct io io = { .eof = false };</div><div class='add'>+	enum a2l_style a2l_style;</div><div class='add'>+</div><div class='add'>+	if (!a2l) {</div><div class='add'>+		if (!filename__has_section(dso_name, ".debug_line"))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		dso__set_a2l(dso,</div><div class='add'>+			     addr2line_subprocess_init(symbol_conf.addr2line_path, dso_name));</div><div class='add'>+		a2l = dso__a2l(dso);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (a2l == NULL) {</div><div class='add'>+		if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+			pr_warning("%s %s: addr2line_subprocess_init failed\n", __func__, dso_name);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	a2l_style = addr2line_configure(a2l, dso_name);</div><div class='add'>+	if (a2l_style == BROKEN)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Send our request and then *deliberately* send something that can't be</div><div class='add'>+	 * interpreted as a valid address to ask addr2line about (namely,</div><div class='add'>+	 * ","). This causes addr2line to first write out the answer to our</div><div class='add'>+	 * request, in an unbounded/unknown number of records, and then to write</div><div class='add'>+	 * out the lines "0x0...0", "??" and "??:0", for GNU binutils, or ","</div><div class='add'>+	 * for llvm-addr2line, so that we can detect when it has finished giving</div><div class='add'>+	 * us anything useful.</div><div class='add'>+	 */</div><div class='add'>+	len = snprintf(buf, sizeof(buf), "%016"PRIx64"\n,\n", addr);</div><div class='add'>+	written = len &gt; 0 ? write(a2l-&gt;in, buf, len) : -1;</div><div class='add'>+	if (written != len) {</div><div class='add'>+		if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+			pr_warning("%s %s: could not send request\n", __func__, dso_name);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	io__init(&amp;io, a2l-&gt;out, buf, sizeof(buf));</div><div class='add'>+	io.timeout_ms = addr2line_timeout_ms;</div><div class='add'>+	switch (read_addr2line_record(&amp;io, a2l_style, dso_name, addr, /*first=*/true,</div><div class='add'>+				      &amp;record_function, &amp;record_filename, &amp;record_line_nr)) {</div><div class='add'>+	case -1:</div><div class='add'>+		if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+			pr_warning("%s %s: could not read first record\n", __func__, dso_name);</div><div class='add'>+		goto out;</div><div class='add'>+	case 0:</div><div class='add'>+		/*</div><div class='add'>+		 * The first record was invalid, so return failure, but first</div><div class='add'>+		 * read another record, since we sent a sentinel ',' for the</div><div class='add'>+		 * sake of detected the last inlined function. Treat this as the</div><div class='add'>+		 * first of a record as the ',' generates a new start with GNU</div><div class='add'>+		 * binutils, also force a non-zero address as we're no longer</div><div class='add'>+		 * reading that record.</div><div class='add'>+		 */</div><div class='add'>+		switch (read_addr2line_record(&amp;io, a2l_style, dso_name,</div><div class='add'>+					      /*addr=*/1, /*first=*/true,</div><div class='add'>+					      NULL, NULL, NULL)) {</div><div class='add'>+		case -1:</div><div class='add'>+			if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+				pr_warning("%s %s: could not read sentinel record\n",</div><div class='add'>+					   __func__, dso_name);</div><div class='add'>+			break;</div><div class='add'>+		case 0:</div><div class='add'>+			/* The sentinel as expected. */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+				pr_warning("%s %s: unexpected record instead of sentinel",</div><div class='add'>+					   __func__, dso_name);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		goto out;</div><div class='add'>+	default:</div><div class='add'>+		/* First record as expected. */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (file) {</div><div class='add'>+		*file = strdup(record_filename);</div><div class='add'>+		ret = 1;</div><div class='add'>+	}</div><div class='add'>+	if (line_nr)</div><div class='add'>+		*line_nr = record_line_nr;</div><div class='add'>+</div><div class='add'>+	if (unwind_inlines) {</div><div class='add'>+		if (node &amp;&amp; inline_list__append_record(dso, node, sym,</div><div class='add'>+						       record_function,</div><div class='add'>+						       record_filename,</div><div class='add'>+						       record_line_nr)) {</div><div class='add'>+			ret = 0;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We have to read the records even if we don't care about the inline</div><div class='add'>+	 * info. This isn't the first record and force the address to non-zero</div><div class='add'>+	 * as we're reading records beyond the first.</div><div class='add'>+	 */</div><div class='add'>+	while ((record_status = read_addr2line_record(&amp;io,</div><div class='add'>+						      a2l_style,</div><div class='add'>+						      dso_name,</div><div class='add'>+						      /*addr=*/1,</div><div class='add'>+						      /*first=*/false,</div><div class='add'>+						      &amp;record_function,</div><div class='add'>+						      &amp;record_filename,</div><div class='add'>+						      &amp;record_line_nr)) == 1) {</div><div class='add'>+		if (unwind_inlines &amp;&amp; node &amp;&amp; inline_count++ &lt; MAX_INLINE_NEST) {</div><div class='add'>+			if (inline_list__append_record(dso, node, sym,</div><div class='add'>+						       record_function,</div><div class='add'>+						       record_filename,</div><div class='add'>+						       record_line_nr)) {</div><div class='add'>+				ret = 0;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			ret = 1; /* found at least one inline frame */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	free(record_function);</div><div class='add'>+	free(record_filename);</div><div class='add'>+	if (io.eof) {</div><div class='add'>+		dso__set_a2l(dso, NULL);</div><div class='add'>+		addr2line_subprocess_cleanup(a2l);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dso__free_a2l(struct dso *dso)</div><div class='add'>+{</div><div class='add'>+	struct child_process *a2l = dso__a2l(dso);</div><div class='add'>+</div><div class='add'>+	if (!a2l)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	addr2line_subprocess_cleanup(a2l);</div><div class='add'>+</div><div class='add'>+	dso__set_a2l(dso, NULL);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/addr2line.h b/tools/perf/util/addr2line.h<br/>new file mode 100644<br/>index 000000000000..d35a47ba8dab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/addr2line.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/addr2line.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __PERF_ADDR2LINE_H</div><div class='add'>+#define __PERF_ADDR2LINE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct dso;</div><div class='add'>+struct inline_node;</div><div class='add'>+struct symbol;</div><div class='add'>+</div><div class='add'>+extern int addr2line_timeout_ms;</div><div class='add'>+</div><div class='add'>+int cmd__addr2line(const char *dso_name, u64 addr,</div><div class='add'>+		   char **file, unsigned int *line_nr,</div><div class='add'>+		   struct dso *dso,</div><div class='add'>+		   bool unwind_inlines,</div><div class='add'>+		   struct inline_node *node,</div><div class='add'>+		   struct symbol *sym);</div><div class='add'>+</div><div class='add'>+#endif /* __PERF_ADDR2LINE_H */</div><div class='head'>diff --git a/tools/perf/util/annotate-data.c b/tools/perf/util/annotate-data.c<br/>index 1ef2edbc71d9..07cf9c334be0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate-data.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate-data.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate-data.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/annotate-data.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Written by Namhyung Kim &lt;namhyung@kernel.org&gt;</div><div class='ctx'>  */</div><div class='del'>-</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='hunk'>@@ -58,6 +58,10 @@ void pr_debug_type_name(Dwarf_Die *die, enum type_state_kind kind)</div><div class='ctx'> 	case TSR_KIND_CONST:</div><div class='ctx'> 		pr_info(" constant\n");</div><div class='ctx'> 		return;</div><div class='add'>+	case TSR_KIND_PERCPU_POINTER:</div><div class='add'>+		pr_info(" percpu pointer");</div><div class='add'>+		/* it also prints the type info */</div><div class='add'>+		break;</div><div class='ctx'> 	case TSR_KIND_POINTER:</div><div class='ctx'> 		pr_info(" pointer");</div><div class='ctx'> 		/* it also prints the type info */</div><div class='hunk'>@@ -573,25 +577,35 @@ struct type_state_stack *find_stack_state(struct type_state *state,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void set_stack_state(struct type_state_stack *stack, int offset, u8 kind,</div><div class='del'>-			    Dwarf_Die *type_die)</div><div class='add'>+			    Dwarf_Die *type_die, int ptr_offset)</div><div class='ctx'> {</div><div class='ctx'> 	int tag;</div><div class='ctx'> 	Dwarf_Word size;</div><div class='ctx'> </div><div class='del'>-	if (dwarf_aggregate_size(type_die, &amp;size) &lt; 0)</div><div class='add'>+	if (kind == TSR_KIND_POINTER) {</div><div class='add'>+		/* TODO: arch-dependent pointer size */</div><div class='add'>+		size = sizeof(void *);</div><div class='add'>+	}</div><div class='add'>+	else if (dwarf_aggregate_size(type_die, &amp;size) &lt; 0)</div><div class='ctx'> 		size = 0;</div><div class='ctx'> </div><div class='del'>-	tag = dwarf_tag(type_die);</div><div class='del'>-</div><div class='ctx'> 	stack-&gt;type = *type_die;</div><div class='ctx'> 	stack-&gt;size = size;</div><div class='ctx'> 	stack-&gt;offset = offset;</div><div class='add'>+	stack-&gt;ptr_offset = ptr_offset;</div><div class='ctx'> 	stack-&gt;kind = kind;</div><div class='ctx'> </div><div class='add'>+	if (kind == TSR_KIND_POINTER) {</div><div class='add'>+		stack-&gt;compound = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tag = dwarf_tag(type_die);</div><div class='add'>+</div><div class='ctx'> 	switch (tag) {</div><div class='ctx'> 	case DW_TAG_structure_type:</div><div class='ctx'> 	case DW_TAG_union_type:</div><div class='del'>-		stack-&gt;compound = (kind != TSR_KIND_POINTER);</div><div class='add'>+		stack-&gt;compound = (kind != TSR_KIND_PERCPU_POINTER);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		stack-&gt;compound = false;</div><div class='hunk'>@@ -601,18 +615,19 @@ void set_stack_state(struct type_state_stack *stack, int offset, u8 kind,</div><div class='ctx'> </div><div class='ctx'> struct type_state_stack *findnew_stack_state(struct type_state *state,</div><div class='ctx'> 						    int offset, u8 kind,</div><div class='del'>-						    Dwarf_Die *type_die)</div><div class='add'>+						    Dwarf_Die *type_die,</div><div class='add'>+						    int ptr_offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct type_state_stack *stack = find_stack_state(state, offset);</div><div class='ctx'> </div><div class='ctx'> 	if (stack) {</div><div class='del'>-		set_stack_state(stack, offset, kind, type_die);</div><div class='add'>+		set_stack_state(stack, offset, kind, type_die, ptr_offset);</div><div class='ctx'> 		return stack;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	stack = malloc(sizeof(*stack));</div><div class='ctx'> 	if (stack) {</div><div class='del'>-		set_stack_state(stack, offset, kind, type_die);</div><div class='add'>+		set_stack_state(stack, offset, kind, type_die, ptr_offset);</div><div class='ctx'> 		list_add(&amp;stack-&gt;list, &amp;state-&gt;stack_vars);</div><div class='ctx'> 	}</div><div class='ctx'> 	return stack;</div><div class='hunk'>@@ -868,6 +883,11 @@ static void update_var_state(struct type_state *state, struct data_loc_info *dlo</div><div class='ctx'> 			int offset = var-&gt;offset;</div><div class='ctx'> 			struct type_state_stack *stack;</div><div class='ctx'> </div><div class='add'>+			/* If the reg location holds the pointer value, dereference the type */</div><div class='add'>+			if (!var-&gt;is_reg_var_addr &amp;&amp; is_pointer_type(&amp;mem_die) &amp;&amp;</div><div class='add'>+				__die_get_real_type(&amp;mem_die, &amp;mem_die) == NULL)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='ctx'> 			if (var-&gt;reg != DWARF_REG_FB)</div><div class='ctx'> 				offset -= fb_offset;</div><div class='ctx'> </div><div class='hunk'>@@ -877,7 +897,7 @@ static void update_var_state(struct type_state *state, struct data_loc_info *dlo</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			findnew_stack_state(state, offset, TSR_KIND_TYPE,</div><div class='del'>-					    &amp;mem_die);</div><div class='add'>+					    &amp;mem_die, /*ptr_offset=*/0);</div><div class='ctx'> </div><div class='ctx'> 			if (var-&gt;reg == state-&gt;stack_reg) {</div><div class='ctx'> 				pr_debug_dtp("var [%"PRIx64"] %#x(reg%d)",</div><div class='hunk'>@@ -887,24 +907,45 @@ static void update_var_state(struct type_state *state, struct data_loc_info *dlo</div><div class='ctx'> 					     insn_offset, -offset);</div><div class='ctx'> 			}</div><div class='ctx'> 			pr_debug_type_name(&amp;mem_die, TSR_KIND_TYPE);</div><div class='del'>-		} else if (has_reg_type(state, var-&gt;reg) &amp;&amp; var-&gt;offset == 0) {</div><div class='add'>+		} else if (has_reg_type(state, var-&gt;reg)) {</div><div class='ctx'> 			struct type_state_reg *reg;</div><div class='ctx'> 			Dwarf_Die orig_type;</div><div class='ctx'> </div><div class='ctx'> 			reg = &amp;state-&gt;regs[var-&gt;reg];</div><div class='ctx'> </div><div class='ctx'> 			if (reg-&gt;ok &amp;&amp; reg-&gt;kind == TSR_KIND_TYPE &amp;&amp;</div><div class='del'>-			    !is_better_type(&amp;reg-&gt;type, &amp;mem_die))</div><div class='add'>+			   (!is_better_type(&amp;reg-&gt;type, &amp;mem_die) || var-&gt;is_reg_var_addr))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			orig_type = reg-&gt;type;</div><div class='add'>+			/* Handle address registers with TSR_KIND_POINTER */</div><div class='add'>+			if (var-&gt;is_reg_var_addr) {</div><div class='add'>+				if (reg-&gt;ok &amp;&amp; reg-&gt;kind == TSR_KIND_POINTER &amp;&amp;</div><div class='add'>+				    !is_better_type(&amp;reg-&gt;type, &amp;mem_die))</div><div class='add'>+					continue;</div><div class='ctx'> </div><div class='add'>+				reg-&gt;offset = -var-&gt;offset;</div><div class='add'>+				reg-&gt;type = mem_die;</div><div class='add'>+				reg-&gt;kind = TSR_KIND_POINTER;</div><div class='add'>+				reg-&gt;ok = true;</div><div class='add'>+</div><div class='add'>+				pr_debug_dtp("var [%"PRIx64"] reg%d addr offset %x",</div><div class='add'>+					     insn_offset, var-&gt;reg, var-&gt;offset);</div><div class='add'>+				pr_debug_type_name(&amp;mem_die, TSR_KIND_POINTER);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			orig_type = reg-&gt;type;</div><div class='add'>+			/*</div><div class='add'>+			 * var-&gt;offset + reg value is the beginning of the struct</div><div class='add'>+			 * reg-&gt;offset is the offset the reg points</div><div class='add'>+			 */</div><div class='add'>+			reg-&gt;offset = -var-&gt;offset;</div><div class='ctx'> 			reg-&gt;type = mem_die;</div><div class='ctx'> 			reg-&gt;kind = TSR_KIND_TYPE;</div><div class='ctx'> 			reg-&gt;ok = true;</div><div class='ctx'> </div><div class='del'>-			pr_debug_dtp("var [%"PRIx64"] reg%d",</div><div class='del'>-				     insn_offset, var-&gt;reg);</div><div class='add'>+			pr_debug_dtp("var [%"PRIx64"] reg%d offset %x",</div><div class='add'>+				     insn_offset, var-&gt;reg, var-&gt;offset);</div><div class='ctx'> 			pr_debug_type_name(&amp;mem_die, TSR_KIND_TYPE);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1092,7 +1133,7 @@ again:</div><div class='ctx'> 		if (__die_get_real_type(&amp;state-&gt;regs[reg].type, type_die) == NULL)</div><div class='ctx'> 			return PERF_TMR_NO_POINTER;</div><div class='ctx'> </div><div class='del'>-		dloc-&gt;type_offset = dloc-&gt;op-&gt;offset;</div><div class='add'>+		dloc-&gt;type_offset = dloc-&gt;op-&gt;offset + state-&gt;regs[reg].offset;</div><div class='ctx'> </div><div class='ctx'> 		if (dwarf_tag(type_die) == DW_TAG_typedef)</div><div class='ctx'> 			die_get_real_type(type_die, &amp;sized_type);</div><div class='hunk'>@@ -1108,6 +1149,30 @@ again:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (state-&gt;regs[reg].kind == TSR_KIND_POINTER) {</div><div class='add'>+		struct strbuf sb;</div><div class='add'>+</div><div class='add'>+		strbuf_init(&amp;sb, 32);</div><div class='add'>+		die_get_typename_from_type(&amp;state-&gt;regs[reg].type, &amp;sb);</div><div class='add'>+		pr_debug_dtp("(ptr-&gt;%s)", sb.buf);</div><div class='add'>+		strbuf_release(&amp;sb);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Register holds a pointer (address) to the target variable.</div><div class='add'>+		 * The type is the type of the variable it points to.</div><div class='add'>+		 */</div><div class='add'>+		*type_die = state-&gt;regs[reg].type;</div><div class='add'>+</div><div class='add'>+		dloc-&gt;type_offset = dloc-&gt;op-&gt;offset + state-&gt;regs[reg].offset;</div><div class='add'>+</div><div class='add'>+		/* Get the size of the actual type */</div><div class='add'>+		if (dwarf_aggregate_size(type_die, &amp;size) &lt; 0 ||</div><div class='add'>+		    (unsigned)dloc-&gt;type_offset &gt;= size)</div><div class='add'>+			return PERF_TMR_BAD_OFFSET;</div><div class='add'>+</div><div class='add'>+		return PERF_TMR_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state-&gt;regs[reg].kind == TSR_KIND_PERCPU_POINTER) {</div><div class='ctx'> 		pr_debug_dtp("percpu ptr");</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='head'>diff --git a/tools/perf/util/annotate-data.h b/tools/perf/util/annotate-data.h<br/>index 541fee1a5f0a..869307c7f130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate-data.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate-data.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate-data.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/annotate-data.h</a></div><div class='hunk'>@@ -34,6 +34,7 @@ enum type_state_kind {</div><div class='ctx'> 	TSR_KIND_TYPE,</div><div class='ctx'> 	TSR_KIND_PERCPU_BASE,</div><div class='ctx'> 	TSR_KIND_CONST,</div><div class='add'>+	TSR_KIND_PERCPU_POINTER,</div><div class='ctx'> 	TSR_KIND_POINTER,</div><div class='ctx'> 	TSR_KIND_CANARY,</div><div class='ctx'> };</div><div class='hunk'>@@ -173,6 +174,12 @@ extern struct annotated_data_stat ann_data_stat;</div><div class='ctx'> struct type_state_reg {</div><div class='ctx'> 	Dwarf_Die type;</div><div class='ctx'> 	u32 imm_value;</div><div class='add'>+	/*</div><div class='add'>+	 * The offset within the struct that the register points to.</div><div class='add'>+	 * A value of 0 means the register points to the beginning.</div><div class='add'>+	 * type_offset = op-&gt;offset + reg-&gt;offset</div><div class='add'>+	 */</div><div class='add'>+	s32 offset;</div><div class='ctx'> 	bool ok;</div><div class='ctx'> 	bool caller_saved;</div><div class='ctx'> 	u8 kind;</div><div class='hunk'>@@ -184,17 +191,22 @@ struct type_state_stack {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	Dwarf_Die type;</div><div class='ctx'> 	int offset;</div><div class='add'>+	/* pointer offset, saves tsr-&gt;offset on the stack state */</div><div class='add'>+	int ptr_offset;</div><div class='ctx'> 	int size;</div><div class='ctx'> 	bool compound;</div><div class='ctx'> 	u8 kind;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* FIXME: This should be arch-dependent */</div><div class='del'>-#ifdef __powerpc__</div><div class='add'>+/*</div><div class='add'>+ * Maximum number of registers tracked in type_state.</div><div class='add'>+ *</div><div class='add'>+ * This limit must cover all supported architectures, since perf</div><div class='add'>+ * may analyze perf.data files generated on systems with a different</div><div class='add'>+ * register set. Use 32 as a safe upper bound instead of relying on</div><div class='add'>+ * build-arch specific values.</div><div class='add'>+ */</div><div class='ctx'> #define TYPE_STATE_MAX_REGS  32</div><div class='del'>-#else</div><div class='del'>-#define TYPE_STATE_MAX_REGS  16</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * State table to maintain type info in each register and stack location.</div><div class='hunk'>@@ -237,9 +249,10 @@ int annotated_data_type__get_member_name(struct annotated_data_type *adt,</div><div class='ctx'> bool has_reg_type(struct type_state *state, int reg);</div><div class='ctx'> struct type_state_stack *findnew_stack_state(struct type_state *state,</div><div class='ctx'> 						int offset, u8 kind,</div><div class='del'>-						Dwarf_Die *type_die);</div><div class='add'>+						Dwarf_Die *type_die,</div><div class='add'>+						int ptr_offset);</div><div class='ctx'> void set_stack_state(struct type_state_stack *stack, int offset, u8 kind,</div><div class='del'>-				Dwarf_Die *type_die);</div><div class='add'>+				Dwarf_Die *type_die, int ptr_offset);</div><div class='ctx'> struct type_state_stack *find_stack_state(struct type_state *state,</div><div class='ctx'> 						int offset);</div><div class='ctx'> bool get_global_var_type(Dwarf_Die *cu_die, struct data_loc_info *dloc,</div><div class='head'>diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c<br/>index 0dd475a744b6..cc7764455faf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/annotate.c</a></div><div class='hunk'>@@ -765,14 +765,16 @@ __hist_entry__get_data_type(struct hist_entry *he, struct arch *arch,</div><div class='ctx'> 			    struct debuginfo *dbg, struct disasm_line *dl,</div><div class='ctx'> 			    int *type_offset);</div><div class='ctx'> </div><div class='del'>-struct annotation_print_data {</div><div class='del'>-	struct hist_entry *he;</div><div class='del'>-	struct evsel *evsel;</div><div class='del'>-	struct arch *arch;</div><div class='del'>-	struct debuginfo *dbg;</div><div class='del'>-	u64 start;</div><div class='del'>-	int addr_fmt_width;</div><div class='del'>-};</div><div class='add'>+static bool needs_type_info(struct annotated_data_type *data_type)</div><div class='add'>+{</div><div class='add'>+	if (data_type == NULL || data_type == NO_TYPE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (verbose)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return (data_type != &amp;stackop_type) &amp;&amp; (data_type != &amp;canary_type);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> annotation_line__print(struct annotation_line *al, struct annotation_print_data *apd,</div><div class='hunk'>@@ -845,7 +847,7 @@ annotation_line__print(struct annotation_line *al, struct annotation_print_data</div><div class='ctx'> </div><div class='ctx'> 		printf(" : ");</div><div class='ctx'> </div><div class='del'>-		disasm_line__print(dl, apd-&gt;start, apd-&gt;addr_fmt_width);</div><div class='add'>+		disasm_line__print(dl, notes-&gt;src-&gt;start, apd-&gt;addr_fmt_width);</div><div class='ctx'> </div><div class='ctx'> 		if (opts-&gt;code_with_type &amp;&amp; apd-&gt;dbg) {</div><div class='ctx'> 			struct annotated_data_type *data_type;</div><div class='hunk'>@@ -853,7 +855,7 @@ annotation_line__print(struct annotation_line *al, struct annotation_print_data</div><div class='ctx'> </div><div class='ctx'> 			data_type = __hist_entry__get_data_type(apd-&gt;he, apd-&gt;arch,</div><div class='ctx'> 								apd-&gt;dbg, dl, &amp;offset);</div><div class='del'>-			if (data_type &amp;&amp; data_type != NO_TYPE) {</div><div class='add'>+			if (needs_type_info(data_type)) {</div><div class='ctx'> 				char buf[4096];</div><div class='ctx'> </div><div class='ctx'> 				printf("\t\t# data-type: %s",</div><div class='hunk'>@@ -978,7 +980,7 @@ void symbol__calc_percent(struct symbol *sym, struct evsel *evsel)</div><div class='ctx'> 	annotation__calc_percent(notes, evsel, symbol__size(sym));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int evsel__get_arch(struct evsel *evsel, struct arch **parch)</div><div class='add'>+int evsel__get_arch(struct evsel *evsel, struct arch **parch)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_env *env = evsel__env(evsel);</div><div class='ctx'> 	const char *arch_name = perf_env__arch(env);</div><div class='hunk'>@@ -1013,14 +1015,13 @@ int symbol__annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='ctx'> 	struct symbol *sym = ms-&gt;sym;</div><div class='ctx'> 	struct annotation *notes = symbol__annotation(sym);</div><div class='ctx'> 	struct annotate_args args = {</div><div class='del'>-		.evsel		= evsel,</div><div class='ctx'> 		.options	= &amp;annotate_opts,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct arch *arch = NULL;</div><div class='ctx'> 	int err, nr;</div><div class='ctx'> </div><div class='ctx'> 	err = evsel__get_arch(evsel, &amp;arch);</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (parch)</div><div class='hunk'>@@ -1230,7 +1231,6 @@ int hist_entry__annotate_printf(struct hist_entry *he, struct evsel *evsel)</div><div class='ctx'> 	struct annotation_print_data apd = {</div><div class='ctx'> 		.he = he,</div><div class='ctx'> 		.evsel = evsel,</div><div class='del'>-		.start = map__rip_2objdump(map, sym-&gt;start),</div><div class='ctx'> 	};</div><div class='ctx'> 	int printed = 2, queue_len = 0;</div><div class='ctx'> 	int more = 0;</div><div class='hunk'>@@ -1267,9 +1267,9 @@ int hist_entry__annotate_printf(struct hist_entry *he, struct evsel *evsel)</div><div class='ctx'> 		symbol__annotate_hits(sym, evsel);</div><div class='ctx'> </div><div class='ctx'> 	apd.addr_fmt_width = annotated_source__addr_fmt_width(&amp;notes-&gt;src-&gt;source,</div><div class='del'>-							      apd.start);</div><div class='add'>+							      notes-&gt;src-&gt;start);</div><div class='ctx'> 	evsel__get_arch(evsel, &amp;apd.arch);</div><div class='del'>-	apd.dbg = debuginfo__new(filename);</div><div class='add'>+	apd.dbg = dso__debuginfo(dso);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(pos, &amp;notes-&gt;src-&gt;source, node) {</div><div class='ctx'> 		int err;</div><div class='hunk'>@@ -1357,7 +1357,8 @@ static void FILE__write_graph(void *fp, int graph)</div><div class='ctx'> 	fputs(s, fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp)</div><div class='add'>+static int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp,</div><div class='add'>+				     struct annotation_print_data *apd)</div><div class='ctx'> {</div><div class='ctx'> 	struct annotation *notes = symbol__annotation(sym);</div><div class='ctx'> 	struct annotation_write_ops wops = {</div><div class='hunk'>@@ -1371,24 +1372,37 @@ static int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp)</div><div class='ctx'> 	};</div><div class='ctx'> 	struct annotation_line *al;</div><div class='ctx'> </div><div class='add'>+	if (annotate_opts.code_with_type) {</div><div class='add'>+		evsel__get_arch(apd-&gt;evsel, &amp;apd-&gt;arch);</div><div class='add'>+		apd-&gt;dbg = dso__debuginfo(map__dso(apd-&gt;he-&gt;ms.map));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(al, &amp;notes-&gt;src-&gt;source, node) {</div><div class='ctx'> 		if (annotation_line__filter(al))</div><div class='ctx'> 			continue;</div><div class='del'>-		annotation_line__write(al, notes, &amp;wops);</div><div class='add'>+		annotation_line__write(al, notes, &amp;wops, apd);</div><div class='ctx'> 		fputc('\n', fp);</div><div class='ctx'> 		wops.first_line = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (annotate_opts.code_with_type)</div><div class='add'>+		debuginfo__delete(apd-&gt;dbg);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int map_symbol__annotation_dump(struct map_symbol *ms, struct evsel *evsel)</div><div class='add'>+int map_symbol__annotation_dump(struct map_symbol *ms, struct evsel *evsel,</div><div class='add'>+				struct hist_entry *he)</div><div class='ctx'> {</div><div class='ctx'> 	const char *ev_name = evsel__name(evsel);</div><div class='ctx'> 	char buf[1024];</div><div class='ctx'> 	char *filename;</div><div class='ctx'> 	int err = -1;</div><div class='ctx'> 	FILE *fp;</div><div class='add'>+	struct annotation_print_data apd = {</div><div class='add'>+		.he = he,</div><div class='add'>+		.evsel = evsel,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	if (asprintf(&amp;filename, "%s.annotation", ms-&gt;sym-&gt;name) &lt; 0)</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1404,7 +1418,7 @@ int map_symbol__annotation_dump(struct map_symbol *ms, struct evsel *evsel)</div><div class='ctx'> </div><div class='ctx'> 	fprintf(fp, "%s() %s\nEvent: %s\n\n",</div><div class='ctx'> 		ms-&gt;sym-&gt;name, dso__long_name(map__dso(ms-&gt;map)), ev_name);</div><div class='del'>-	symbol__annotate_fprintf2(ms-&gt;sym, fp);</div><div class='add'>+	symbol__annotate_fprintf2(ms-&gt;sym, fp, &amp;apd);</div><div class='ctx'> </div><div class='ctx'> 	fclose(fp);</div><div class='ctx'> 	err = 0;</div><div class='hunk'>@@ -1656,6 +1670,10 @@ int hist_entry__tty_annotate2(struct hist_entry *he, struct evsel *evsel)</div><div class='ctx'> 	struct symbol *sym = ms-&gt;sym;</div><div class='ctx'> 	struct rb_root source_line = RB_ROOT;</div><div class='ctx'> 	struct hists *hists = evsel__hists(evsel);</div><div class='add'>+	struct annotation_print_data apd = {</div><div class='add'>+		.he = he,</div><div class='add'>+		.evsel = evsel,</div><div class='add'>+	};</div><div class='ctx'> 	char buf[1024];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1678,7 +1696,7 @@ int hist_entry__tty_annotate2(struct hist_entry *he, struct evsel *evsel)</div><div class='ctx'> 	hists__scnprintf_title(hists, buf, sizeof(buf));</div><div class='ctx'> 	fprintf(stdout, "%s, [percent: %s]\n%s() %s\n",</div><div class='ctx'> 		buf, percent_type_str(annotate_opts.percent_type), sym-&gt;name, dso__long_name(dso));</div><div class='del'>-	symbol__annotate_fprintf2(sym, stdout);</div><div class='add'>+	symbol__annotate_fprintf2(sym, stdout, &amp;apd);</div><div class='ctx'> </div><div class='ctx'> 	annotated_source__purge(symbol__annotation(sym)-&gt;src);</div><div class='ctx'> </div><div class='hunk'>@@ -1743,7 +1761,7 @@ static double annotation_line__max_percent(struct annotation_line *al,</div><div class='ctx'> 	return percent_max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void disasm_line__write(struct disasm_line *dl, struct annotation *notes,</div><div class='add'>+static int disasm_line__write(struct disasm_line *dl, struct annotation *notes,</div><div class='ctx'> 			       void *obj, char *bf, size_t size,</div><div class='ctx'> 			       void (*obj__printf)(void *obj, const char *fmt, ...),</div><div class='ctx'> 			       void (*obj__write_graph)(void *obj, int graph))</div><div class='hunk'>@@ -1771,8 +1789,8 @@ call_like:</div><div class='ctx'> 		obj__printf(obj, "  ");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	disasm_line__scnprintf(dl, bf, size, !annotate_opts.use_offset,</div><div class='del'>-			       notes-&gt;src-&gt;widths.max_ins_name);</div><div class='add'>+	return disasm_line__scnprintf(dl, bf, size, !annotate_opts.use_offset,</div><div class='add'>+				      notes-&gt;src-&gt;widths.max_ins_name) + 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ipc_coverage_string(char *bf, int size, struct annotation *notes)</div><div class='hunk'>@@ -1935,24 +1953,82 @@ err:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __annotation_line__write(struct annotation_line *al, struct annotation *notes,</div><div class='del'>-				     bool first_line, bool current_entry, bool change_color, int width,</div><div class='del'>-				     void *obj, unsigned int percent_type,</div><div class='del'>-				     int  (*obj__set_color)(void *obj, int color),</div><div class='del'>-				     void (*obj__set_percent_color)(void *obj, double percent, bool current),</div><div class='del'>-				     int  (*obj__set_jumps_percent_color)(void *obj, int nr, bool current),</div><div class='del'>-				     void (*obj__printf)(void *obj, const char *fmt, ...),</div><div class='del'>-				     void (*obj__write_graph)(void *obj, int graph))</div><div class='add'>+struct type_hash_entry {</div><div class='add'>+	struct annotated_data_type *type;</div><div class='add'>+	int offset;</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+static int disasm_line__snprint_type_info(struct disasm_line *dl,</div><div class='add'>+					  char *buf, int len,</div><div class='add'>+					  struct annotation_print_data *apd)</div><div class='ctx'> {</div><div class='del'>-	double percent_max = annotation_line__max_percent(al, percent_type);</div><div class='del'>-	int pcnt_width = annotation__pcnt_width(notes),</div><div class='del'>-	    cycles_width = annotation__cycles_width(notes);</div><div class='add'>+	struct annotated_data_type *data_type = NULL;</div><div class='add'>+	struct type_hash_entry *entry = NULL;</div><div class='add'>+	char member[256];</div><div class='add'>+	int offset = 0;</div><div class='add'>+	int printed;</div><div class='add'>+</div><div class='add'>+	scnprintf(buf, len, " ");</div><div class='add'>+</div><div class='add'>+	if (!annotate_opts.code_with_type || apd-&gt;dbg == NULL)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (apd-&gt;type_hash) {</div><div class='add'>+		hashmap__find(apd-&gt;type_hash, dl-&gt;al.offset, &amp;entry);</div><div class='add'>+		if (entry != NULL) {</div><div class='add'>+			data_type = entry-&gt;type;</div><div class='add'>+			offset = entry-&gt;offset;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data_type == NULL)</div><div class='add'>+		data_type = __hist_entry__get_data_type(apd-&gt;he, apd-&gt;arch, apd-&gt;dbg, dl, &amp;offset);</div><div class='add'>+</div><div class='add'>+	if (apd-&gt;type_hash &amp;&amp; entry == NULL) {</div><div class='add'>+		entry = malloc(sizeof(*entry));</div><div class='add'>+		if (entry != NULL) {</div><div class='add'>+			entry-&gt;type = data_type;</div><div class='add'>+			entry-&gt;offset = offset;</div><div class='add'>+			hashmap__add(apd-&gt;type_hash, dl-&gt;al.offset, entry);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!needs_type_info(data_type))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	printed = scnprintf(buf, len, "\t\t# data-type: %s", data_type-&gt;self.type_name);</div><div class='add'>+</div><div class='add'>+	if (data_type != &amp;stackop_type &amp;&amp; data_type != &amp;canary_type &amp;&amp; len &gt; printed)</div><div class='add'>+		printed += scnprintf(buf + printed, len - printed, " +%#x", offset);</div><div class='add'>+</div><div class='add'>+	if (annotated_data_type__get_member_name(data_type, member, sizeof(member), offset) &amp;&amp;</div><div class='add'>+	    len &gt; printed) {</div><div class='add'>+		printed += scnprintf(buf + printed, len - printed, " (%s)", member);</div><div class='add'>+	}</div><div class='add'>+	return printed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void annotation_line__write(struct annotation_line *al, struct annotation *notes,</div><div class='add'>+			    const struct annotation_write_ops *wops,</div><div class='add'>+			    struct annotation_print_data *apd)</div><div class='add'>+{</div><div class='add'>+	bool current_entry = wops-&gt;current_entry;</div><div class='add'>+	bool change_color = wops-&gt;change_color;</div><div class='add'>+	double percent_max = annotation_line__max_percent(al, annotate_opts.percent_type);</div><div class='add'>+	int width = wops-&gt;width;</div><div class='add'>+	int pcnt_width = annotation__pcnt_width(notes);</div><div class='add'>+	int cycles_width = annotation__cycles_width(notes);</div><div class='ctx'> 	bool show_title = false;</div><div class='ctx'> 	char bf[256];</div><div class='ctx'> 	int printed;</div><div class='del'>-</div><div class='del'>-	if (first_line &amp;&amp; (al-&gt;offset == -1 || percent_max == 0.0)) {</div><div class='add'>+	void *obj = wops-&gt;obj;</div><div class='add'>+	int  (*obj__set_color)(void *obj, int color) = wops-&gt;set_color;</div><div class='add'>+	void (*obj__set_percent_color)(void *obj, double percent, bool current) = wops-&gt;set_percent_color;</div><div class='add'>+	int  (*obj__set_jumps_percent_color)(void *obj, int nr, bool current) = wops-&gt;set_jumps_percent_color;</div><div class='add'>+	void (*obj__printf)(void *obj, const char *fmt, ...) = wops-&gt;printf;</div><div class='add'>+	void (*obj__write_graph)(void *obj, int graph) = wops-&gt;write_graph;</div><div class='add'>+</div><div class='add'>+	if (wops-&gt;first_line &amp;&amp; (al-&gt;offset == -1 || percent_max == 0.0)) {</div><div class='ctx'> 		if (notes-&gt;branch &amp;&amp; al-&gt;cycles) {</div><div class='ctx'> 			if (al-&gt;cycles-&gt;ipc == 0.0 &amp;&amp; al-&gt;cycles-&gt;avg == 0)</div><div class='ctx'> 				show_title = true;</div><div class='hunk'>@@ -1966,7 +2042,8 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati</div><div class='ctx'> 		for (i = 0; i &lt; al-&gt;data_nr; i++) {</div><div class='ctx'> 			double percent;</div><div class='ctx'> </div><div class='del'>-			percent = annotation_data__percent(&amp;al-&gt;data[i], percent_type);</div><div class='add'>+			percent = annotation_data__percent(&amp;al-&gt;data[i],</div><div class='add'>+							   annotate_opts.percent_type);</div><div class='ctx'> </div><div class='ctx'> 			obj__set_percent_color(obj, percent, current_entry);</div><div class='ctx'> 			if (symbol_conf.show_total_period) {</div><div class='hunk'>@@ -1989,6 +2066,7 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati</div><div class='ctx'> 					   symbol_conf.show_nr_samples ? "Samples" : "Percent");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	width -= pcnt_width;</div><div class='ctx'> </div><div class='ctx'> 	if (notes-&gt;branch) {</div><div class='ctx'> 		if (al-&gt;cycles &amp;&amp; al-&gt;cycles-&gt;ipc)</div><div class='hunk'>@@ -2052,11 +2130,13 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati</div><div class='ctx'> 			obj__printf(obj, "%*s", ANNOTATION__AVG_IPC_WIDTH, bf);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	width -= cycles_width;</div><div class='ctx'> </div><div class='ctx'> 	obj__printf(obj, " ");</div><div class='add'>+	width -= 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!*al-&gt;line)</div><div class='del'>-		obj__printf(obj, "%-*s", width - pcnt_width - cycles_width, " ");</div><div class='add'>+		obj__printf(obj, "%-*s", width, " ");</div><div class='ctx'> 	else if (al-&gt;offset == -1) {</div><div class='ctx'> 		if (al-&gt;line_nr &amp;&amp; annotate_opts.show_linenr)</div><div class='ctx'> 			printed = scnprintf(bf, sizeof(bf), "%-*d ",</div><div class='hunk'>@@ -2065,7 +2145,8 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati</div><div class='ctx'> 			printed = scnprintf(bf, sizeof(bf), "%-*s  ",</div><div class='ctx'> 					    notes-&gt;src-&gt;widths.addr, " ");</div><div class='ctx'> 		obj__printf(obj, bf);</div><div class='del'>-		obj__printf(obj, "%-*s", width - printed - pcnt_width - cycles_width + 1, al-&gt;line);</div><div class='add'>+		width -= printed;</div><div class='add'>+		obj__printf(obj, "%-*s", width, al-&gt;line);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		u64 addr = al-&gt;offset;</div><div class='ctx'> 		int color = -1;</div><div class='hunk'>@@ -2108,22 +2189,18 @@ print_addr:</div><div class='ctx'> 		if (change_color)</div><div class='ctx'> 			obj__set_color(obj, color);</div><div class='ctx'> </div><div class='del'>-		disasm_line__write(disasm_line(al), notes, obj, bf, sizeof(bf), obj__printf, obj__write_graph);</div><div class='add'>+		width -= printed;</div><div class='ctx'> </div><div class='del'>-		obj__printf(obj, "%-*s", width - pcnt_width - cycles_width - 3 - printed, bf);</div><div class='del'>-	}</div><div class='add'>+		printed = disasm_line__write(disasm_line(al), notes, obj, bf, sizeof(bf),</div><div class='add'>+					     obj__printf, obj__write_graph);</div><div class='ctx'> </div><div class='del'>-}</div><div class='add'>+		obj__printf(obj, "%s", bf);</div><div class='add'>+		width -= printed;</div><div class='add'>+</div><div class='add'>+		disasm_line__snprint_type_info(disasm_line(al), bf, sizeof(bf), apd);</div><div class='add'>+		obj__printf(obj, "%-*s", width, bf);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-void annotation_line__write(struct annotation_line *al, struct annotation *notes,</div><div class='del'>-			    struct annotation_write_ops *wops)</div><div class='del'>-{</div><div class='del'>-	__annotation_line__write(al, notes, wops-&gt;first_line, wops-&gt;current_entry,</div><div class='del'>-				 wops-&gt;change_color, wops-&gt;width, wops-&gt;obj,</div><div class='del'>-				 annotate_opts.percent_type,</div><div class='del'>-				 wops-&gt;set_color, wops-&gt;set_percent_color,</div><div class='del'>-				 wops-&gt;set_jumps_percent_color, wops-&gt;printf,</div><div class='del'>-				 wops-&gt;write_graph);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int symbol__annotate2(struct map_symbol *ms, struct evsel *evsel,</div><div class='hunk'>@@ -2621,6 +2698,20 @@ static bool is_stack_canary(struct arch *arch, struct annotated_op_loc *loc)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * Returns true if the instruction has a memory operand without</div><div class='add'>+ * performing a load/store</div><div class='add'>+ */</div><div class='add'>+static bool is_address_gen_insn(struct arch *arch, struct disasm_line *dl)</div><div class='add'>+{</div><div class='add'>+	if (arch__is(arch, "x86")) {</div><div class='add'>+		if (!strncmp(dl-&gt;ins.name, "lea", 3))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct disasm_line *</div><div class='ctx'> annotation__prev_asm_line(struct annotation *notes, struct disasm_line *curr)</div><div class='ctx'> {</div><div class='hunk'>@@ -2729,6 +2820,12 @@ __hist_entry__get_data_type(struct hist_entry *he, struct arch *arch,</div><div class='ctx'> 		return &amp;stackop_type;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (is_address_gen_insn(arch, dl)) {</div><div class='add'>+		istat-&gt;bad++;</div><div class='add'>+		ann_data_stat.no_mem_ops++;</div><div class='add'>+		return NO_TYPE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for_each_insn_op_loc(&amp;loc, i, op_loc) {</div><div class='ctx'> 		struct data_loc_info dloc = {</div><div class='ctx'> 			.arch = arch,</div><div class='hunk'>@@ -2829,7 +2926,7 @@ struct annotated_data_type *hist_entry__get_data_type(struct hist_entry *he)</div><div class='ctx'> 		di_cache.dso = dso__get(map__dso(ms-&gt;map));</div><div class='ctx'> </div><div class='ctx'> 		debuginfo__delete(di_cache.dbg);</div><div class='del'>-		di_cache.dbg = debuginfo__new(dso__long_name(di_cache.dso));</div><div class='add'>+		di_cache.dbg = dso__debuginfo(di_cache.dso);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (di_cache.dbg == NULL) {</div><div class='head'>diff --git a/tools/perf/util/annotate.h b/tools/perf/util/annotate.h<br/>index 8b5131d257b0..d4990bff29a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/annotate.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/annotate.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/annotate.h</a></div><div class='hunk'>@@ -199,8 +199,20 @@ struct annotation_write_ops {</div><div class='ctx'> 	void (*write_graph)(void *obj, int graph);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct annotation_print_data {</div><div class='add'>+	struct hist_entry *he;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+	struct arch *arch;</div><div class='add'>+	struct debuginfo *dbg;</div><div class='add'>+	/* save data type info keyed by al-&gt;offset */</div><div class='add'>+	struct hashmap *type_hash;</div><div class='add'>+	/* It'll be set in hist_entry__annotate_printf() */</div><div class='add'>+	int addr_fmt_width;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void annotation_line__write(struct annotation_line *al, struct annotation *notes,</div><div class='del'>-			    struct annotation_write_ops *ops);</div><div class='add'>+			    const struct annotation_write_ops *ops,</div><div class='add'>+			    struct annotation_print_data *apd);</div><div class='ctx'> </div><div class='ctx'> int __annotation__scnprintf_samples_period(struct annotation *notes,</div><div class='ctx'> 					   char *bf, size_t size,</div><div class='hunk'>@@ -463,7 +475,8 @@ void symbol__annotate_zero_histogram(struct symbol *sym, struct evsel *evsel);</div><div class='ctx'> void symbol__annotate_decay_histogram(struct symbol *sym, struct evsel *evsel);</div><div class='ctx'> void annotated_source__purge(struct annotated_source *as);</div><div class='ctx'> </div><div class='del'>-int map_symbol__annotation_dump(struct map_symbol *ms, struct evsel *evsel);</div><div class='add'>+int map_symbol__annotation_dump(struct map_symbol *ms, struct evsel *evsel,</div><div class='add'>+				struct hist_entry *he);</div><div class='ctx'> </div><div class='ctx'> bool ui__has_annotation(void);</div><div class='ctx'> </div><div class='hunk'>@@ -471,18 +484,6 @@ int hist_entry__annotate_printf(struct hist_entry *he, struct evsel *evsel);</div><div class='ctx'> int hist_entry__tty_annotate(struct hist_entry *he, struct evsel *evsel);</div><div class='ctx'> int hist_entry__tty_annotate2(struct hist_entry *he, struct evsel *evsel);</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_SLANG_SUPPORT</div><div class='del'>-int symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='del'>-			 struct hist_browser_timer *hbt);</div><div class='del'>-#else</div><div class='del'>-static inline int symbol__tui_annotate(struct map_symbol *ms __maybe_unused,</div><div class='del'>-				struct evsel *evsel  __maybe_unused,</div><div class='del'>-				struct hist_browser_timer *hbt __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> void annotation_options__init(void);</div><div class='ctx'> void annotation_options__exit(void);</div><div class='ctx'> </div><div class='hunk'>@@ -584,4 +585,6 @@ void debuginfo_cache__delete(void);</div><div class='ctx'> int annotation_br_cntr_entry(char **str, int br_cntr_nr, u64 *br_cntr,</div><div class='ctx'> 			     int num_aggr, struct evsel *evsel);</div><div class='ctx'> int annotation_br_cntr_abbr_list(char **str, struct evsel *evsel, bool header);</div><div class='add'>+</div><div class='add'>+int evsel__get_arch(struct evsel *evsel, struct arch **parch);</div><div class='ctx'> #endif	/* __PERF_ANNOTATE_H */</div><div class='head'>diff --git a/tools/perf/util/arm-spe-decoder/Build b/tools/perf/util/arm-spe-decoder/Build<br/>index 960062b3cb9e..ab500e0efe24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe-decoder/Build</a></div><div class='hunk'>@@ -1 +1 @@</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o arm-spe-decoder.o</div><div class='add'>+perf-util-y += arm-spe-pkt-decoder.o arm-spe-decoder.o</div><div class='head'>diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c<br/>index 688fe6d75244..9e02b2bdd117 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.c</a></div><div class='hunk'>@@ -200,13 +200,61 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)</div><div class='ctx'> 					decoder-&gt;record.op |= ARM_SPE_OP_ST;</div><div class='ctx'> 				else</div><div class='ctx'> 					decoder-&gt;record.op |= ARM_SPE_OP_LD;</div><div class='del'>-				if (SPE_OP_PKT_IS_LDST_SVE(payload))</div><div class='del'>-					decoder-&gt;record.op |= ARM_SPE_OP_SVE_LDST;</div><div class='add'>+</div><div class='add'>+				if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_GP_REG;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_SIMD_FP;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_UNSPEC_REG;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_NV_SYSREG;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_MTE_TAG;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(payload)) {</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_AR)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_AR;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_EXCL)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_EXCL;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_AT)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_ATOMIC;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_SVE;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_SVE_PRED)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_PRED;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_SVE_SG)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_SG;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_MEMCPY;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_MEMSET;</div><div class='add'>+				} else if (SPE_OP_PKT_LDST_SUBCLASS_GCS(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_GCS;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_GCS_COMM)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_COMM;</div><div class='add'>+				}</div><div class='add'>+</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPE_OP_PKT_HDR_CLASS_OTHER:</div><div class='ctx'> 				decoder-&gt;record.op |= ARM_SPE_OP_OTHER;</div><div class='del'>-				if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload))</div><div class='del'>-					decoder-&gt;record.op |= ARM_SPE_OP_SVE_OTHER;</div><div class='add'>+				if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_SVE | ARM_SPE_OP_DP;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_OTHER_FP)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_FP;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_SVE_PRED)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_PRED;</div><div class='add'>+				} else if (SPE_OP_PKT_OTHER_SUBCLASS_SME(payload)) {</div><div class='add'>+					decoder-&gt;record.op |= ARM_SPE_OP_SME;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_OTHER_FP)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_FP;</div><div class='add'>+				} else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_OTHER_ASE)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_ASE;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_OTHER_FP)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_FP;</div><div class='add'>+					if (payload &amp; SPE_OP_PKT_COND)</div><div class='add'>+						decoder-&gt;record.op |= ARM_SPE_OP_COND;</div><div class='add'>+				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPE_OP_PKT_HDR_CLASS_BR_ERET:</div><div class='ctx'> 				decoder-&gt;record.op |= ARM_SPE_OP_BRANCH_ERET;</div><div class='hunk'>@@ -229,42 +277,7 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ARM_SPE_EVENTS:</div><div class='del'>-			if (payload &amp; BIT(EV_L1D_REFILL))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_L1D_MISS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_L1D_ACCESS))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_L1D_ACCESS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_TLB_WALK))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_TLB_MISS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_TLB_ACCESS))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_TLB_ACCESS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_LLC_MISS))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_LLC_MISS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_LLC_ACCESS))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_LLC_ACCESS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_REMOTE_ACCESS))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_REMOTE_ACCESS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_MISPRED))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_BRANCH_MISS;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_NOT_TAKEN))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_BRANCH_NOT_TAKEN;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_TRANSACTIONAL))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_IN_TXN;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_PARTIAL_PREDICATE))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_SVE_PARTIAL_PRED;</div><div class='del'>-</div><div class='del'>-			if (payload &amp; BIT(EV_EMPTY_PREDICATE))</div><div class='del'>-				decoder-&gt;record.type |= ARM_SPE_SVE_EMPTY_PRED;</div><div class='del'>-</div><div class='add'>+			decoder-&gt;record.type = payload;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ARM_SPE_DATA_SOURCE:</div><div class='ctx'> 			decoder-&gt;record.source = payload;</div><div class='head'>diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h<br/>index 881d9f29c138..3310e05122f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe-decoder/arm-spe-decoder.h</a></div><div class='hunk'>@@ -13,53 +13,65 @@</div><div class='ctx'> </div><div class='ctx'> #include "arm-spe-pkt-decoder.h"</div><div class='ctx'> </div><div class='del'>-enum arm_spe_sample_type {</div><div class='del'>-	ARM_SPE_L1D_ACCESS		= 1 &lt;&lt; 0,</div><div class='del'>-	ARM_SPE_L1D_MISS		= 1 &lt;&lt; 1,</div><div class='del'>-	ARM_SPE_LLC_ACCESS		= 1 &lt;&lt; 2,</div><div class='del'>-	ARM_SPE_LLC_MISS		= 1 &lt;&lt; 3,</div><div class='del'>-	ARM_SPE_TLB_ACCESS		= 1 &lt;&lt; 4,</div><div class='del'>-	ARM_SPE_TLB_MISS		= 1 &lt;&lt; 5,</div><div class='del'>-	ARM_SPE_BRANCH_MISS		= 1 &lt;&lt; 6,</div><div class='del'>-	ARM_SPE_REMOTE_ACCESS		= 1 &lt;&lt; 7,</div><div class='del'>-	ARM_SPE_SVE_PARTIAL_PRED	= 1 &lt;&lt; 8,</div><div class='del'>-	ARM_SPE_SVE_EMPTY_PRED		= 1 &lt;&lt; 9,</div><div class='del'>-	ARM_SPE_BRANCH_NOT_TAKEN	= 1 &lt;&lt; 10,</div><div class='del'>-	ARM_SPE_IN_TXN			= 1 &lt;&lt; 11,</div><div class='del'>-};</div><div class='add'>+#define ARM_SPE_L1D_ACCESS		BIT(EV_L1D_ACCESS)</div><div class='add'>+#define ARM_SPE_L1D_MISS		BIT(EV_L1D_REFILL)</div><div class='add'>+#define ARM_SPE_LLC_ACCESS		BIT(EV_LLC_ACCESS)</div><div class='add'>+#define ARM_SPE_LLC_MISS		BIT(EV_LLC_MISS)</div><div class='add'>+#define ARM_SPE_TLB_ACCESS		BIT(EV_TLB_ACCESS)</div><div class='add'>+#define ARM_SPE_TLB_MISS		BIT(EV_TLB_WALK)</div><div class='add'>+#define ARM_SPE_BRANCH_MISS		BIT(EV_MISPRED)</div><div class='add'>+#define ARM_SPE_BRANCH_NOT_TAKEN	BIT(EV_NOT_TAKEN)</div><div class='add'>+#define ARM_SPE_REMOTE_ACCESS		BIT(EV_REMOTE_ACCESS)</div><div class='add'>+#define ARM_SPE_SVE_PARTIAL_PRED	BIT(EV_PARTIAL_PREDICATE)</div><div class='add'>+#define ARM_SPE_SVE_EMPTY_PRED		BIT(EV_EMPTY_PREDICATE)</div><div class='add'>+#define ARM_SPE_IN_TXN			BIT(EV_TRANSACTIONAL)</div><div class='add'>+#define ARM_SPE_L2D_ACCESS		BIT(EV_L2D_ACCESS)</div><div class='add'>+#define ARM_SPE_L2D_MISS		BIT(EV_L2D_MISS)</div><div class='add'>+#define ARM_SPE_RECENTLY_FETCHED	BIT(EV_RECENTLY_FETCHED)</div><div class='add'>+#define ARM_SPE_DATA_SNOOPED		BIT(EV_DATA_SNOOPED)</div><div class='add'>+#define ARM_SPE_HITM			BIT(EV_CACHE_DATA_MODIFIED)</div><div class='ctx'> </div><div class='ctx'> enum arm_spe_op_type {</div><div class='ctx'> 	/* First level operation type */</div><div class='ctx'> 	ARM_SPE_OP_OTHER	= 1 &lt;&lt; 0,</div><div class='ctx'> 	ARM_SPE_OP_LDST		= 1 &lt;&lt; 1,</div><div class='ctx'> 	ARM_SPE_OP_BRANCH_ERET	= 1 &lt;&lt; 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum arm_spe_2nd_op_ldst {</div><div class='add'>+	ARM_SPE_OP_GP_REG		= 1 &lt;&lt; 8,</div><div class='add'>+	ARM_SPE_OP_UNSPEC_REG		= 1 &lt;&lt; 9,</div><div class='add'>+	ARM_SPE_OP_NV_SYSREG		= 1 &lt;&lt; 10,</div><div class='add'>+	ARM_SPE_OP_SIMD_FP		= 1 &lt;&lt; 11,</div><div class='add'>+	ARM_SPE_OP_SVE			= 1 &lt;&lt; 12,</div><div class='add'>+	ARM_SPE_OP_MTE_TAG		= 1 &lt;&lt; 13,</div><div class='add'>+	ARM_SPE_OP_MEMCPY		= 1 &lt;&lt; 14,</div><div class='add'>+	ARM_SPE_OP_MEMSET		= 1 &lt;&lt; 15,</div><div class='add'>+	ARM_SPE_OP_GCS			= 1 &lt;&lt; 16,</div><div class='add'>+	ARM_SPE_OP_SME			= 1 &lt;&lt; 17,</div><div class='add'>+	ARM_SPE_OP_ASE			= 1 &lt;&lt; 18,</div><div class='add'>+</div><div class='add'>+	/* Assisted information for memory / SIMD */</div><div class='add'>+	ARM_SPE_OP_LD			= 1 &lt;&lt; 20,</div><div class='add'>+	ARM_SPE_OP_ST			= 1 &lt;&lt; 21,</div><div class='add'>+	ARM_SPE_OP_ATOMIC		= 1 &lt;&lt; 22,</div><div class='add'>+	ARM_SPE_OP_EXCL			= 1 &lt;&lt; 23,</div><div class='add'>+	ARM_SPE_OP_AR			= 1 &lt;&lt; 24,</div><div class='add'>+	ARM_SPE_OP_DP			= 1 &lt;&lt; 25,	/* Data processing */</div><div class='add'>+	ARM_SPE_OP_PRED			= 1 &lt;&lt; 26,	/* Predicated */</div><div class='add'>+	ARM_SPE_OP_SG			= 1 &lt;&lt; 27,	/* Gather/Scatter */</div><div class='add'>+	ARM_SPE_OP_COMM			= 1 &lt;&lt; 28,	/* Common */</div><div class='add'>+	ARM_SPE_OP_FP			= 1 &lt;&lt; 29,	/* Floating-point */</div><div class='add'>+	ARM_SPE_OP_COND			= 1 &lt;&lt; 30,	/* Conditional */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* Second level operation type for OTHER */</div><div class='del'>-	ARM_SPE_OP_SVE_OTHER		= 1 &lt;&lt; 16,</div><div class='del'>-	ARM_SPE_OP_SVE_FP		= 1 &lt;&lt; 17,</div><div class='del'>-	ARM_SPE_OP_SVE_PRED_OTHER	= 1 &lt;&lt; 18,</div><div class='del'>-</div><div class='del'>-	/* Second level operation type for LDST */</div><div class='del'>-	ARM_SPE_OP_LD			= 1 &lt;&lt; 16,</div><div class='del'>-	ARM_SPE_OP_ST			= 1 &lt;&lt; 17,</div><div class='del'>-	ARM_SPE_OP_ATOMIC		= 1 &lt;&lt; 18,</div><div class='del'>-	ARM_SPE_OP_EXCL			= 1 &lt;&lt; 19,</div><div class='del'>-	ARM_SPE_OP_AR			= 1 &lt;&lt; 20,</div><div class='del'>-	ARM_SPE_OP_SIMD_FP		= 1 &lt;&lt; 21,</div><div class='del'>-	ARM_SPE_OP_GP_REG		= 1 &lt;&lt; 22,</div><div class='del'>-	ARM_SPE_OP_UNSPEC_REG		= 1 &lt;&lt; 23,</div><div class='del'>-	ARM_SPE_OP_NV_SYSREG		= 1 &lt;&lt; 24,</div><div class='del'>-	ARM_SPE_OP_SVE_LDST		= 1 &lt;&lt; 25,</div><div class='del'>-	ARM_SPE_OP_SVE_PRED_LDST	= 1 &lt;&lt; 26,</div><div class='del'>-	ARM_SPE_OP_SVE_SG		= 1 &lt;&lt; 27,</div><div class='del'>-</div><div class='del'>-	/* Second level operation type for BRANCH_ERET */</div><div class='del'>-	ARM_SPE_OP_BR_COND		= 1 &lt;&lt; 16,</div><div class='del'>-	ARM_SPE_OP_BR_INDIRECT		= 1 &lt;&lt; 17,</div><div class='del'>-	ARM_SPE_OP_BR_GCS		= 1 &lt;&lt; 18,</div><div class='del'>-	ARM_SPE_OP_BR_CR_BL		= 1 &lt;&lt; 19,</div><div class='del'>-	ARM_SPE_OP_BR_CR_RET		= 1 &lt;&lt; 20,</div><div class='del'>-	ARM_SPE_OP_BR_CR_NON_BL_RET	= 1 &lt;&lt; 21,</div><div class='add'>+enum arm_spe_2nd_op_branch {</div><div class='add'>+	ARM_SPE_OP_BR_COND		= 1 &lt;&lt; 8,</div><div class='add'>+	ARM_SPE_OP_BR_INDIRECT		= 1 &lt;&lt; 9,</div><div class='add'>+	ARM_SPE_OP_BR_GCS		= 1 &lt;&lt; 10,</div><div class='add'>+	ARM_SPE_OP_BR_CR_BL		= 1 &lt;&lt; 11,</div><div class='add'>+	ARM_SPE_OP_BR_CR_RET		= 1 &lt;&lt; 12,</div><div class='add'>+	ARM_SPE_OP_BR_CR_NON_BL_RET	= 1 &lt;&lt; 13,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum arm_spe_common_data_source {</div><div class='hunk'>@@ -100,7 +112,7 @@ enum arm_spe_hisi_hip_data_source {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct arm_spe_record {</div><div class='del'>-	enum arm_spe_sample_type type;</div><div class='add'>+	u64 type;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u32 op;</div><div class='ctx'> 	u32 latency;</div><div class='head'>diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c<br/>index 13cadb2f1cea..5769ba2f4140 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c</a></div><div class='hunk'>@@ -314,6 +314,20 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,</div><div class='ctx'> 		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SVE-PARTIAL-PRED");</div><div class='ctx'> 	if (payload &amp; BIT(EV_EMPTY_PREDICATE))</div><div class='ctx'> 		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SVE-EMPTY-PRED");</div><div class='add'>+	if (payload &amp; BIT(EV_L2D_ACCESS))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " L2D-ACCESS");</div><div class='add'>+	if (payload &amp; BIT(EV_L2D_MISS))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " L2D-MISS");</div><div class='add'>+	if (payload &amp; BIT(EV_CACHE_DATA_MODIFIED))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " HITM");</div><div class='add'>+	if (payload &amp; BIT(EV_RECENTLY_FETCHED))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " LFB");</div><div class='add'>+	if (payload &amp; BIT(EV_DATA_SNOOPED))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SNOOPED");</div><div class='add'>+	if (payload &amp; BIT(EV_STREAMING_SVE_MODE))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " STREAMING-SVE");</div><div class='add'>+	if (payload &amp; BIT(EV_SMCU))</div><div class='add'>+		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SMCU");</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -326,7 +340,7 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,</div><div class='ctx'> </div><div class='ctx'> 	switch (packet-&gt;index) {</div><div class='ctx'> 	case SPE_OP_PKT_HDR_CLASS_OTHER:</div><div class='del'>-		if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) {</div><div class='add'>+		if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, "SVE-OTHER");</div><div class='ctx'> </div><div class='ctx'> 			/* SVE effective vector length */</div><div class='hunk'>@@ -337,8 +351,21 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " FP");</div><div class='ctx'> 			if (payload &amp; SPE_OP_PKT_SVE_PRED)</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " PRED");</div><div class='del'>-		} else {</div><div class='add'>+		} else if (SPE_OP_PKT_OTHER_SUBCLASS_SME(payload)) {</div><div class='add'>+			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, "SME-OTHER");</div><div class='add'>+</div><div class='add'>+			/* SME effective vector length or tile size */</div><div class='add'>+			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " ETS %d",</div><div class='add'>+					       SPE_OP_PKG_SME_ETS(payload));</div><div class='add'>+</div><div class='add'>+			if (payload &amp; SPE_OP_PKT_OTHER_FP)</div><div class='add'>+				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " FP");</div><div class='add'>+		} else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, "OTHER");</div><div class='add'>+			if (payload &amp; SPE_OP_PKT_OTHER_ASE)</div><div class='add'>+				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " ASE");</div><div class='add'>+			if (payload &amp; SPE_OP_PKT_OTHER_FP)</div><div class='add'>+				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " FP");</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " %s",</div><div class='ctx'> 					       payload &amp; SPE_OP_PKT_COND ?</div><div class='ctx'> 					       "COND-SELECT" : "INSN-OTHER");</div><div class='hunk'>@@ -348,42 +375,30 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,</div><div class='ctx'> 		arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len,</div><div class='ctx'> 				       payload &amp; 0x1 ? "ST" : "LD");</div><div class='ctx'> </div><div class='del'>-		if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {</div><div class='add'>+		if (SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(payload)) {</div><div class='ctx'> 			if (payload &amp; SPE_OP_PKT_AT)</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " AT");</div><div class='ctx'> 			if (payload &amp; SPE_OP_PKT_EXCL)</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " EXCL");</div><div class='ctx'> 			if (payload &amp; SPE_OP_PKT_AR)</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " AR");</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) {</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SIMD-FP");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_GP_REG:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " GP-REG");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " UNSPEC-REG");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " NV-SYSREG");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " MTE-TAG");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_MEMCPY:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " MEMCPY");</div><div class='del'>-			break;</div><div class='del'>-		case SPE_OP_PKT_LDST_SUBCLASS_MEMSET:</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload)) {</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " MEMSET");</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload)) {</div><div class='add'>+			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SVE-SME-REG");</div><div class='ctx'> </div><div class='del'>-		if (SPE_OP_PKT_IS_LDST_SVE(payload)) {</div><div class='ctx'> 			/* SVE effective vector length */</div><div class='ctx'> 			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " EVLEN %d",</div><div class='ctx'> 					       SPE_OP_PKG_SVE_EVL(payload));</div><div class='hunk'>@@ -392,6 +407,10 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " PRED");</div><div class='ctx'> 			if (payload &amp; SPE_OP_PKT_SVE_SG)</div><div class='ctx'> 				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " SG");</div><div class='add'>+		} else if (SPE_OP_PKT_LDST_SUBCLASS_GCS(payload)) {</div><div class='add'>+			arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " GCS");</div><div class='add'>+			if (payload &amp; SPE_OP_PKT_GCS_COMM)</div><div class='add'>+				arm_spe_pkt_out_string(&amp;err, &amp;buf, &amp;buf_len, " COMM");</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPE_OP_PKT_HDR_CLASS_BR_ERET:</div><div class='head'>diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h<br/>index 2cdf9f6da268..adf4cde320aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h</a></div><div class='hunk'>@@ -108,6 +108,13 @@ enum arm_spe_events {</div><div class='ctx'> 	EV_TRANSACTIONAL	= 16,</div><div class='ctx'> 	EV_PARTIAL_PREDICATE	= 17,</div><div class='ctx'> 	EV_EMPTY_PREDICATE	= 18,</div><div class='add'>+	EV_L2D_ACCESS		= 19,</div><div class='add'>+	EV_L2D_MISS		= 20,</div><div class='add'>+	EV_CACHE_DATA_MODIFIED	= 21,</div><div class='add'>+	EV_RECENTLY_FETCHED	= 22,</div><div class='add'>+	EV_DATA_SNOOPED		= 23,</div><div class='add'>+	EV_STREAMING_SVE_MODE	= 24,</div><div class='add'>+	EV_SMCU			= 25,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Operation packet header */</div><div class='hunk'>@@ -116,25 +123,39 @@ enum arm_spe_events {</div><div class='ctx'> #define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC	0x1</div><div class='ctx'> #define SPE_OP_PKT_HDR_CLASS_BR_ERET		0x2</div><div class='ctx'> </div><div class='del'>-#define SPE_OP_PKT_IS_OTHER_SVE_OP(v)		(((v) &amp; (BIT(7) | BIT(3) | BIT(0))) == 0x8)</div><div class='add'>+#define SPE_OP_PKT_OTHER_SUBCLASS_OTHER(v)	(((v) &amp; GENMASK_ULL(7, 3)) == 0x0)</div><div class='add'>+#define SPE_OP_PKT_OTHER_SUBCLASS_SVE(v)	(((v) &amp; (BIT(7) | BIT(3) | BIT(0))) == 0x8)</div><div class='add'>+#define SPE_OP_PKT_OTHER_SUBCLASS_SME(v)	(((v) &amp; (BIT(7) | BIT(3) | BIT(0))) == 0x88)</div><div class='ctx'> </div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)		((v) &amp; GENMASK_ULL(7, 1))</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG		0x0</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP	0x4</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG	0x10</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG	0x30</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG	0x14</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY		0x20</div><div class='del'>-#define SPE_OP_PKT_LDST_SUBCLASS_MEMSET		0x25</div><div class='add'>+#define SPE_OP_PKT_OTHER_ASE			BIT(2)</div><div class='add'>+#define SPE_OP_PKT_OTHER_FP			BIT(1)</div><div class='ctx'> </div><div class='del'>-#define SPE_OP_PKT_IS_LDST_ATOMIC(v)		(((v) &amp; (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)</div><div class='add'>+/*</div><div class='add'>+ * SME effective vector length or tile size (ETS) is stored in byte 0</div><div class='add'>+ * bits [6:4,2]; the length is rounded up to a power of two and use 128</div><div class='add'>+ * as one step, so ETS calculation is:</div><div class='add'>+ *</div><div class='add'>+ *   128 * (2 ^ bits [6:4,2]) = 32 &lt;&lt; (bits [6:4,2])</div><div class='add'>+ */</div><div class='add'>+#define SPE_OP_PKG_SME_ETS(v)			(128 &lt;&lt; (FIELD_GET(GENMASK_ULL(6, 4), (v)) &lt;&lt; 1 | \</div><div class='add'>+							(FIELD_GET(BIT(2), (v)))))</div><div class='add'>+</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x0)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x4)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x10)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x30)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x14)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(v)	(((v) &amp; GENMASK_ULL(7, 1)) == 0x20)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_MEMSET(v)	(((v) &amp; GENMASK_ULL(7, 0)) == 0x25)</div><div class='add'>+</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(v)	(((v) &amp; (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)</div><div class='ctx'> </div><div class='ctx'> #define SPE_OP_PKT_AR				BIT(4)</div><div class='ctx'> #define SPE_OP_PKT_EXCL				BIT(3)</div><div class='ctx'> #define SPE_OP_PKT_AT				BIT(2)</div><div class='ctx'> #define SPE_OP_PKT_ST				BIT(0)</div><div class='ctx'> </div><div class='del'>-#define SPE_OP_PKT_IS_LDST_SVE(v)		(((v) &amp; (BIT(3) | BIT(1))) == 0x8)</div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(v)	(((v) &amp; (BIT(3) | BIT(1))) == 0x8)</div><div class='ctx'> </div><div class='ctx'> #define SPE_OP_PKT_SVE_SG			BIT(7)</div><div class='ctx'> /*</div><div class='hunk'>@@ -148,6 +169,10 @@ enum arm_spe_events {</div><div class='ctx'> #define SPE_OP_PKT_SVE_PRED			BIT(2)</div><div class='ctx'> #define SPE_OP_PKT_SVE_FP			BIT(1)</div><div class='ctx'> </div><div class='add'>+#define SPE_OP_PKT_LDST_SUBCLASS_GCS(v)		(((v) &amp; (GENMASK_ULL(7, 3) | BIT(1))) == 0x40)</div><div class='add'>+</div><div class='add'>+#define SPE_OP_PKT_GCS_COMM			BIT(2)</div><div class='add'>+</div><div class='ctx'> #define SPE_OP_PKT_CR_MASK			GENMASK_ULL(4, 3)</div><div class='ctx'> #define SPE_OP_PKT_CR_BL(v)			(FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 1)</div><div class='ctx'> #define SPE_OP_PKT_CR_RET(v)			(FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 2)</div><div class='head'>diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c<br/>index 8942fa598a84..dc19e72258f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe.c</a></div><div class='hunk'>@@ -39,6 +39,23 @@</div><div class='ctx'> </div><div class='ctx'> #define is_ldst_op(op)		(!!((op) &amp; ARM_SPE_OP_LDST))</div><div class='ctx'> </div><div class='add'>+#define is_simd_op(op)		(!!((op) &amp; (ARM_SPE_OP_SIMD_FP | ARM_SPE_OP_SVE | \</div><div class='add'>+					    ARM_SPE_OP_SME | ARM_SPE_OP_ASE)))</div><div class='add'>+</div><div class='add'>+#define is_mem_op(op)		(is_ldst_op(op) || is_simd_op(op))</div><div class='add'>+</div><div class='add'>+#define ARM_SPE_CACHE_EVENT(lvl) \</div><div class='add'>+	(ARM_SPE_##lvl##_ACCESS | ARM_SPE_##lvl##_MISS)</div><div class='add'>+</div><div class='add'>+#define arm_spe_is_cache_level(type, lvl) \</div><div class='add'>+	((type) &amp; ARM_SPE_CACHE_EVENT(lvl))</div><div class='add'>+</div><div class='add'>+#define arm_spe_is_cache_hit(type, lvl) \</div><div class='add'>+	(((type) &amp; ARM_SPE_CACHE_EVENT(lvl)) == ARM_SPE_##lvl##_ACCESS)</div><div class='add'>+</div><div class='add'>+#define arm_spe_is_cache_miss(type, lvl) \</div><div class='add'>+	((type) &amp; ARM_SPE_##lvl##_MISS)</div><div class='add'>+</div><div class='ctx'> struct arm_spe {</div><div class='ctx'> 	struct auxtrace			auxtrace;</div><div class='ctx'> 	struct auxtrace_queues		queues;</div><div class='hunk'>@@ -62,7 +79,6 @@ struct arm_spe {</div><div class='ctx'> 	u8				sample_remote_access;</div><div class='ctx'> 	u8				sample_memory;</div><div class='ctx'> 	u8				sample_instructions;</div><div class='del'>-	u64				instructions_sample_period;</div><div class='ctx'> </div><div class='ctx'> 	u64				l1d_miss_id;</div><div class='ctx'> 	u64				l1d_access_id;</div><div class='hunk'>@@ -101,7 +117,7 @@ struct arm_spe_queue {</div><div class='ctx'> 	u64				time;</div><div class='ctx'> 	u64				timestamp;</div><div class='ctx'> 	struct thread			*thread;</div><div class='del'>-	u64				period_instructions;</div><div class='add'>+	u64				sample_count;</div><div class='ctx'> 	u32				flags;</div><div class='ctx'> 	struct branch_stack		*last_branch;</div><div class='ctx'> };</div><div class='hunk'>@@ -228,7 +244,6 @@ static struct arm_spe_queue *arm_spe__alloc_queue(struct arm_spe *spe,</div><div class='ctx'> 	speq-&gt;pid = -1;</div><div class='ctx'> 	speq-&gt;tid = -1;</div><div class='ctx'> 	speq-&gt;cpu = -1;</div><div class='del'>-	speq-&gt;period_instructions = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* params set */</div><div class='ctx'> 	params.get_trace = arm_spe_get_trace;</div><div class='hunk'>@@ -305,15 +320,28 @@ static int arm_spe_set_tid(struct arm_spe_queue *speq, pid_t tid)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 *arm_spe__get_metadata_by_cpu(struct arm_spe *spe, u64 cpu)</div><div class='add'>+static u64 *arm_spe__get_metadata_by_cpu(struct arm_spe *spe, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!spe-&gt;metadata)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	/* CPU ID is -1 for per-thread mode */</div><div class='add'>+	if (cpu &lt; 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * On the heterogeneous system, due to CPU ID is -1,</div><div class='add'>+		 * cannot confirm the data source packet is supported.</div><div class='add'>+		 */</div><div class='add'>+		if (!spe-&gt;is_homogeneous)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		/* In homogeneous system, simply use CPU0's metadata */</div><div class='add'>+		return spe-&gt;metadata[0];</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; spe-&gt;metadata_nr_cpu; i++)</div><div class='del'>-		if (spe-&gt;metadata[i][ARM_SPE_CPU] == cpu)</div><div class='add'>+		if (spe-&gt;metadata[i][ARM_SPE_CPU] == (u64)cpu)</div><div class='ctx'> 			return spe-&gt;metadata[i];</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -323,10 +351,7 @@ static struct simd_flags arm_spe__synth_simd_flags(const struct arm_spe_record *</div><div class='ctx'> {</div><div class='ctx'> 	struct simd_flags simd_flags = {};</div><div class='ctx'> </div><div class='del'>-	if ((record-&gt;op &amp; ARM_SPE_OP_LDST) &amp;&amp; (record-&gt;op &amp; ARM_SPE_OP_SVE_LDST))</div><div class='del'>-		simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE;</div><div class='del'>-</div><div class='del'>-	if ((record-&gt;op &amp; ARM_SPE_OP_OTHER) &amp;&amp; (record-&gt;op &amp; ARM_SPE_OP_SVE_OTHER))</div><div class='add'>+	if (record-&gt;op &amp; ARM_SPE_OP_SVE)</div><div class='ctx'> 		simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE;</div><div class='ctx'> </div><div class='ctx'> 	if (record-&gt;type &amp; ARM_SPE_SVE_PARTIAL_PRED)</div><div class='hunk'>@@ -352,7 +377,7 @@ static void arm_spe_prep_sample(struct arm_spe *spe,</div><div class='ctx'> 	sample-&gt;cpumode = arm_spe_cpumode(spe, sample-&gt;ip);</div><div class='ctx'> 	sample-&gt;pid = speq-&gt;pid;</div><div class='ctx'> 	sample-&gt;tid = speq-&gt;tid;</div><div class='del'>-	sample-&gt;period = 1;</div><div class='add'>+	sample-&gt;period = spe-&gt;synth_opts.period;</div><div class='ctx'> 	sample-&gt;cpu = speq-&gt;cpu;</div><div class='ctx'> 	sample-&gt;simd_flags = arm_spe__synth_simd_flags(record);</div><div class='ctx'> </div><div class='hunk'>@@ -471,7 +496,8 @@ arm_spe_deliver_synth_event(struct arm_spe *spe,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,</div><div class='del'>-				     u64 spe_events_id, u64 data_src)</div><div class='add'>+				     u64 spe_events_id,</div><div class='add'>+				     union perf_mem_data_src data_src)</div><div class='ctx'> {</div><div class='ctx'> 	struct arm_spe *spe = speq-&gt;spe;</div><div class='ctx'> 	struct arm_spe_record *record = &amp;speq-&gt;decoder-&gt;record;</div><div class='hunk'>@@ -486,7 +512,7 @@ static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,</div><div class='ctx'> 	sample.stream_id = spe_events_id;</div><div class='ctx'> 	sample.addr = record-&gt;virt_addr;</div><div class='ctx'> 	sample.phys_addr = record-&gt;phys_addr;</div><div class='del'>-	sample.data_src = data_src;</div><div class='add'>+	sample.data_src = data_src.val;</div><div class='ctx'> 	sample.weight = record-&gt;latency;</div><div class='ctx'> </div><div class='ctx'> 	ret = arm_spe_deliver_synth_event(spe, speq, event, &amp;sample);</div><div class='hunk'>@@ -519,7 +545,8 @@ static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,</div><div class='del'>-					     u64 spe_events_id, u64 data_src)</div><div class='add'>+					     u64 spe_events_id,</div><div class='add'>+					     union perf_mem_data_src data_src)</div><div class='ctx'> {</div><div class='ctx'> 	struct arm_spe *spe = speq-&gt;spe;</div><div class='ctx'> 	struct arm_spe_record *record = &amp;speq-&gt;decoder-&gt;record;</div><div class='hunk'>@@ -527,14 +554,6 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,</div><div class='ctx'> 	struct perf_sample sample;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Handles perf instruction sampling period.</div><div class='del'>-	 */</div><div class='del'>-	speq-&gt;period_instructions++;</div><div class='del'>-	if (speq-&gt;period_instructions &lt; spe-&gt;instructions_sample_period)</div><div class='del'>-		return 0;</div><div class='del'>-	speq-&gt;period_instructions = 0;</div><div class='del'>-</div><div class='ctx'> 	perf_sample__init(&amp;sample, /*all=*/true);</div><div class='ctx'> 	arm_spe_prep_sample(spe, speq, event, &amp;sample);</div><div class='ctx'> </div><div class='hunk'>@@ -542,8 +561,7 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,</div><div class='ctx'> 	sample.stream_id = spe_events_id;</div><div class='ctx'> 	sample.addr = record-&gt;to_ip;</div><div class='ctx'> 	sample.phys_addr = record-&gt;phys_addr;</div><div class='del'>-	sample.data_src = data_src;</div><div class='del'>-	sample.period = spe-&gt;instructions_sample_period;</div><div class='add'>+	sample.data_src = data_src.val;</div><div class='ctx'> 	sample.weight = record-&gt;latency;</div><div class='ctx'> 	sample.flags = speq-&gt;flags;</div><div class='ctx'> 	sample.branch_stack = speq-&gt;last_branch;</div><div class='hunk'>@@ -554,15 +572,21 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct midr_range common_ds_encoding_cpus[] = {</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_A720AE),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),</div><div class='ctx'> 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -670,8 +694,8 @@ static void arm_spe__synth_data_source_common(const struct arm_spe_record *recor</div><div class='ctx'> 	 * socket</div><div class='ctx'> 	 */</div><div class='ctx'> 	case ARM_SPE_COMMON_DS_REMOTE:</div><div class='del'>-		data_src-&gt;mem_lvl = PERF_MEM_LVL_REM_CCE1;</div><div class='del'>-		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_ANY_CACHE;</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_NA;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_NA;</div><div class='ctx'> 		data_src-&gt;mem_remote = PERF_MEM_REMOTE_REMOTE;</div><div class='ctx'> 		data_src-&gt;mem_snoopx = PERF_MEM_SNOOPX_PEER;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -819,30 +843,121 @@ static const struct data_source_handle data_source_handles[] = {</div><div class='ctx'> 	DS(hisi_hip_ds_encoding_cpus, data_source_hisi_hip),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void arm_spe__synth_memory_level(const struct arm_spe_record *record,</div><div class='del'>-					union perf_mem_data_src *data_src)</div><div class='add'>+static void arm_spe__synth_ld_memory_level(const struct arm_spe_record *record,</div><div class='add'>+					   union perf_mem_data_src *data_src)</div><div class='ctx'> {</div><div class='del'>-	if (record-&gt;type &amp; (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {</div><div class='del'>-		data_src-&gt;mem_lvl = PERF_MEM_LVL_L3;</div><div class='add'>+	/*</div><div class='add'>+	 * To find a cache hit, search in ascending order from the lower level</div><div class='add'>+	 * caches to the higher level caches. This reflects the best scenario</div><div class='add'>+	 * for a cache hit.</div><div class='add'>+	 */</div><div class='add'>+	if (arm_spe_is_cache_hit(record-&gt;type, L1D)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L1;</div><div class='add'>+	} else if (record-&gt;type &amp; ARM_SPE_RECENTLY_FETCHED) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_LFB | PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_LFB;</div><div class='add'>+	} else if (arm_spe_is_cache_hit(record-&gt;type, L2D)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L2;</div><div class='add'>+	} else if (arm_spe_is_cache_hit(record-&gt;type, LLC)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L3;</div><div class='add'>+	/*</div><div class='add'>+	 * To find a cache miss, search in descending order from the higher</div><div class='add'>+	 * level cache to the lower level cache. This represents the worst</div><div class='add'>+	 * scenario for a cache miss.</div><div class='add'>+	 */</div><div class='add'>+	} else if (arm_spe_is_cache_miss(record-&gt;type, LLC)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_MISS;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L3;</div><div class='add'>+	} else if (arm_spe_is_cache_miss(record-&gt;type, L2D)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_MISS;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L2;</div><div class='add'>+	} else if (arm_spe_is_cache_miss(record-&gt;type, L1D)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_MISS;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (record-&gt;type &amp; ARM_SPE_LLC_MISS)</div><div class='del'>-			data_src-&gt;mem_lvl |= PERF_MEM_LVL_MISS;</div><div class='del'>-		else</div><div class='del'>-			data_src-&gt;mem_lvl |= PERF_MEM_LVL_HIT;</div><div class='del'>-	} else if (record-&gt;type &amp; (ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS)) {</div><div class='add'>+static void arm_spe__synth_st_memory_level(const struct arm_spe_record *record,</div><div class='add'>+					   union perf_mem_data_src *data_src)</div><div class='add'>+{</div><div class='add'>+	/* Record the greatest level info for a store operation. */</div><div class='add'>+	if (arm_spe_is_cache_level(record-&gt;type, LLC)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L3;</div><div class='add'>+		data_src-&gt;mem_lvl |= arm_spe_is_cache_miss(record-&gt;type, LLC) ?</div><div class='add'>+				     PERF_MEM_LVL_MISS : PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L3;</div><div class='add'>+	} else if (arm_spe_is_cache_level(record-&gt;type, L2D)) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_L2;</div><div class='add'>+		data_src-&gt;mem_lvl |= arm_spe_is_cache_miss(record-&gt;type, L2D) ?</div><div class='add'>+				     PERF_MEM_LVL_MISS : PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L2;</div><div class='add'>+	} else if (arm_spe_is_cache_level(record-&gt;type, L1D)) {</div><div class='ctx'> 		data_src-&gt;mem_lvl = PERF_MEM_LVL_L1;</div><div class='add'>+		data_src-&gt;mem_lvl |= arm_spe_is_cache_miss(record-&gt;type, L1D) ?</div><div class='add'>+				     PERF_MEM_LVL_MISS : PERF_MEM_LVL_HIT;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_L1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (record-&gt;type &amp; ARM_SPE_L1D_MISS)</div><div class='del'>-			data_src-&gt;mem_lvl |= PERF_MEM_LVL_MISS;</div><div class='del'>-		else</div><div class='del'>-			data_src-&gt;mem_lvl |= PERF_MEM_LVL_HIT;</div><div class='add'>+static void arm_spe__synth_memory_level(struct arm_spe_queue *speq,</div><div class='add'>+					const struct arm_spe_record *record,</div><div class='add'>+					union perf_mem_data_src *data_src)</div><div class='add'>+{</div><div class='add'>+	struct arm_spe *spe = speq-&gt;spe;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The data source packet contains more info for cache levels for</div><div class='add'>+	 * peer snooping. So respect the memory level if has been set by</div><div class='add'>+	 * data source parsing.</div><div class='add'>+	 */</div><div class='add'>+	if (!data_src-&gt;mem_lvl) {</div><div class='add'>+		if (data_src-&gt;mem_op == PERF_MEM_OP_LOAD)</div><div class='add'>+			arm_spe__synth_ld_memory_level(record, data_src);</div><div class='add'>+		if (data_src-&gt;mem_op == PERF_MEM_OP_STORE)</div><div class='add'>+			arm_spe__synth_st_memory_level(record, data_src);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data_src-&gt;mem_lvl) {</div><div class='add'>+		data_src-&gt;mem_lvl = PERF_MEM_LVL_NA;</div><div class='add'>+		data_src-&gt;mem_lvl_num = PERF_MEM_LVLNUM_NA;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (record-&gt;type &amp; ARM_SPE_REMOTE_ACCESS)</div><div class='del'>-		data_src-&gt;mem_lvl |= PERF_MEM_LVL_REM_CCE1;</div><div class='add'>+	/*</div><div class='add'>+	 * If 'mem_snoop' has been set by data source packet, skip to set</div><div class='add'>+	 * it at here.</div><div class='add'>+	 */</div><div class='add'>+	if (!data_src-&gt;mem_snoop) {</div><div class='add'>+		if (record-&gt;type &amp; ARM_SPE_DATA_SNOOPED) {</div><div class='add'>+			if (record-&gt;type &amp; ARM_SPE_HITM)</div><div class='add'>+				data_src-&gt;mem_snoop = PERF_MEM_SNOOP_HITM;</div><div class='add'>+			else</div><div class='add'>+				data_src-&gt;mem_snoop = PERF_MEM_SNOOP_HIT;</div><div class='add'>+		} else {</div><div class='add'>+			u64 *metadata =</div><div class='add'>+				arm_spe__get_metadata_by_cpu(spe, speq-&gt;cpu);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Set NA ("Not available") mode if no meta data or the</div><div class='add'>+			 * SNOOPED event is not supported.</div><div class='add'>+			 */</div><div class='add'>+			if (!metadata ||</div><div class='add'>+			    !(metadata[ARM_SPE_CAP_EVENT_FILTER] &amp; ARM_SPE_DATA_SNOOPED))</div><div class='add'>+				data_src-&gt;mem_snoop = PERF_MEM_SNOOP_NA;</div><div class='add'>+			else</div><div class='add'>+				data_src-&gt;mem_snoop = PERF_MEM_SNOOP_NONE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data_src-&gt;mem_remote) {</div><div class='add'>+		if (record-&gt;type &amp; ARM_SPE_REMOTE_ACCESS)</div><div class='add'>+			data_src-&gt;mem_remote = PERF_MEM_REMOTE_REMOTE;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool arm_spe__synth_ds(struct arm_spe_queue *speq,</div><div class='add'>+static void arm_spe__synth_ds(struct arm_spe_queue *speq,</div><div class='ctx'> 			      const struct arm_spe_record *record,</div><div class='ctx'> 			      union perf_mem_data_src *data_src)</div><div class='ctx'> {</div><div class='hunk'>@@ -859,56 +974,40 @@ static bool arm_spe__synth_ds(struct arm_spe_queue *speq,</div><div class='ctx'> 		cpuid = perf_env__cpuid(perf_session__env(spe-&gt;session));</div><div class='ctx'> 		midr = strtol(cpuid, NULL, 16);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* CPU ID is -1 for per-thread mode */</div><div class='del'>-		if (speq-&gt;cpu &lt; 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * On the heterogeneous system, due to CPU ID is -1,</div><div class='del'>-			 * cannot confirm the data source packet is supported.</div><div class='del'>-			 */</div><div class='del'>-			if (!spe-&gt;is_homogeneous)</div><div class='del'>-				return false;</div><div class='del'>-</div><div class='del'>-			/* In homogeneous system, simply use CPU0's metadata */</div><div class='del'>-			if (spe-&gt;metadata)</div><div class='del'>-				metadata = spe-&gt;metadata[0];</div><div class='del'>-		} else {</div><div class='del'>-			metadata = arm_spe__get_metadata_by_cpu(spe, speq-&gt;cpu);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		metadata = arm_spe__get_metadata_by_cpu(spe, speq-&gt;cpu);</div><div class='ctx'> 		if (!metadata)</div><div class='del'>-			return false;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		midr = metadata[ARM_SPE_CPU_MIDR];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(data_source_handles); i++) {</div><div class='ctx'> 		if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) {</div><div class='del'>-			data_source_handles[i].ds_synth(record, data_src);</div><div class='del'>-			return true;</div><div class='add'>+			return data_source_handles[i].ds_synth(record, data_src);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,</div><div class='del'>-				      const struct arm_spe_record *record)</div><div class='add'>+static union perf_mem_data_src</div><div class='add'>+arm_spe__synth_data_source(struct arm_spe_queue *speq,</div><div class='add'>+			   const struct arm_spe_record *record)</div><div class='ctx'> {</div><div class='del'>-	union perf_mem_data_src	data_src = { .mem_op = PERF_MEM_OP_NA };</div><div class='add'>+	union perf_mem_data_src	data_src = {};</div><div class='ctx'> </div><div class='del'>-	/* Only synthesize data source for LDST operations */</div><div class='del'>-	if (!is_ldst_op(record-&gt;op))</div><div class='del'>-		return 0;</div><div class='add'>+	if (!is_mem_op(record-&gt;op))</div><div class='add'>+		return data_src;</div><div class='ctx'> </div><div class='ctx'> 	if (record-&gt;op &amp; ARM_SPE_OP_LD)</div><div class='ctx'> 		data_src.mem_op = PERF_MEM_OP_LOAD;</div><div class='ctx'> 	else if (record-&gt;op &amp; ARM_SPE_OP_ST)</div><div class='ctx'> 		data_src.mem_op = PERF_MEM_OP_STORE;</div><div class='ctx'> 	else</div><div class='del'>-		return 0;</div><div class='add'>+		data_src.mem_op = PERF_MEM_OP_NA;</div><div class='ctx'> </div><div class='del'>-	if (!arm_spe__synth_ds(speq, record, &amp;data_src))</div><div class='del'>-		arm_spe__synth_memory_level(record, &amp;data_src);</div><div class='add'>+	arm_spe__synth_ds(speq, record, &amp;data_src);</div><div class='add'>+	arm_spe__synth_memory_level(speq, record, &amp;data_src);</div><div class='ctx'> </div><div class='ctx'> 	if (record-&gt;type &amp; (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {</div><div class='ctx'> 		data_src.mem_dtlb = PERF_MEM_TLB_WK;</div><div class='hunk'>@@ -919,16 +1018,24 @@ static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,</div><div class='ctx'> 			data_src.mem_dtlb |= PERF_MEM_TLB_HIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return data_src.val;</div><div class='add'>+	return data_src;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int arm_spe_sample(struct arm_spe_queue *speq)</div><div class='ctx'> {</div><div class='ctx'> 	const struct arm_spe_record *record = &amp;speq-&gt;decoder-&gt;record;</div><div class='ctx'> 	struct arm_spe *spe = speq-&gt;spe;</div><div class='del'>-	u64 data_src;</div><div class='add'>+	union perf_mem_data_src data_src;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Discard all samples until period is reached</div><div class='add'>+	 */</div><div class='add'>+	speq-&gt;sample_count++;</div><div class='add'>+	if (speq-&gt;sample_count &lt; spe-&gt;synth_opts.period)</div><div class='add'>+		return 0;</div><div class='add'>+	speq-&gt;sample_count = 0;</div><div class='add'>+</div><div class='ctx'> 	arm_spe__sample_flags(speq);</div><div class='ctx'> 	data_src = arm_spe__synth_data_source(speq, record);</div><div class='ctx'> </div><div class='hunk'>@@ -998,11 +1105,7 @@ static int arm_spe_sample(struct arm_spe_queue *speq)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * When data_src is zero it means the record is not a memory operation,</div><div class='del'>-	 * skip to synthesize memory sample for this case.</div><div class='del'>-	 */</div><div class='del'>-	if (spe-&gt;sample_memory &amp;&amp; is_ldst_op(record-&gt;op)) {</div><div class='add'>+	if (spe-&gt;sample_memory &amp;&amp; is_mem_op(record-&gt;op)) {</div><div class='ctx'> 		err = arm_spe__synth_mem_sample(speq, spe-&gt;memory_id, data_src);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -1532,6 +1635,7 @@ static const char * const metadata_per_cpu_fmts[] = {</div><div class='ctx'> 	[ARM_SPE_CPU_MIDR]		= "    MIDR             :0x%"PRIx64"\n",</div><div class='ctx'> 	[ARM_SPE_CPU_PMU_TYPE]		= "    PMU Type         :%"PRId64"\n",</div><div class='ctx'> 	[ARM_SPE_CAP_MIN_IVAL]		= "    Min Interval     :%"PRId64"\n",</div><div class='add'>+	[ARM_SPE_CAP_EVENT_FILTER]	= "    Event Filter     :0x%"PRIx64"\n",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void arm_spe_print_info(struct arm_spe *spe, __u64 *arr)</div><div class='hunk'>@@ -1628,12 +1732,10 @@ arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)</div><div class='ctx'> 	attr.exclude_guest = evsel-&gt;core.attr.exclude_guest;</div><div class='ctx'> 	attr.sample_id_all = evsel-&gt;core.attr.sample_id_all;</div><div class='ctx'> 	attr.read_format = evsel-&gt;core.attr.read_format;</div><div class='add'>+	attr.sample_period = spe-&gt;synth_opts.period;</div><div class='ctx'> </div><div class='ctx'> 	/* create new id val to be a fixed offset from evsel id */</div><div class='del'>-	id = evsel-&gt;core.id[0] + 1000000000;</div><div class='del'>-</div><div class='del'>-	if (!id)</div><div class='del'>-		id = 1;</div><div class='add'>+	id = auxtrace_synth_id_range_start(evsel);</div><div class='ctx'> </div><div class='ctx'> 	if (spe-&gt;synth_opts.flc) {</div><div class='ctx'> 		spe-&gt;sample_flc = true;</div><div class='hunk'>@@ -1744,25 +1846,15 @@ arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (spe-&gt;synth_opts.instructions) {</div><div class='del'>-		if (spe-&gt;synth_opts.period_type != PERF_ITRACE_PERIOD_INSTRUCTIONS) {</div><div class='del'>-			pr_warning("Only instruction-based sampling period is currently supported by Arm SPE.\n");</div><div class='del'>-			goto synth_instructions_out;</div><div class='del'>-		}</div><div class='del'>-		if (spe-&gt;synth_opts.period &gt; 1)</div><div class='del'>-			pr_warning("Arm SPE has a hardware-based sample period.\n"</div><div class='del'>-				   "Additional instruction events will be discarded by --itrace\n");</div><div class='del'>-</div><div class='ctx'> 		spe-&gt;sample_instructions = true;</div><div class='ctx'> 		attr.config = PERF_COUNT_HW_INSTRUCTIONS;</div><div class='del'>-		attr.sample_period = spe-&gt;synth_opts.period;</div><div class='del'>-		spe-&gt;instructions_sample_period = attr.sample_period;</div><div class='add'>+</div><div class='ctx'> 		err = perf_session__deliver_synth_attr_event(session, &amp;attr, id);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		spe-&gt;instructions_id = id;</div><div class='ctx'> 		arm_spe_set_event_name(evlist, id, "instructions");</div><div class='ctx'> 	}</div><div class='del'>-synth_instructions_out:</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1871,10 +1963,23 @@ int arm_spe_process_auxtrace_info(union perf_event *event,</div><div class='ctx'> 	if (dump_trace)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (session-&gt;itrace_synth_opts &amp;&amp; session-&gt;itrace_synth_opts-&gt;set)</div><div class='add'>+	if (session-&gt;itrace_synth_opts &amp;&amp; session-&gt;itrace_synth_opts-&gt;set) {</div><div class='ctx'> 		spe-&gt;synth_opts = *session-&gt;itrace_synth_opts;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		itrace_synth_opts__set_default(&amp;spe-&gt;synth_opts, false);</div><div class='add'>+		/* Default nanoseconds period not supported */</div><div class='add'>+		spe-&gt;synth_opts.period_type = PERF_ITRACE_PERIOD_INSTRUCTIONS;</div><div class='add'>+		spe-&gt;synth_opts.period = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (spe-&gt;synth_opts.period_type != PERF_ITRACE_PERIOD_INSTRUCTIONS) {</div><div class='add'>+		ui__error("You must only use i (instructions) --itrace period with Arm SPE. e.g --itrace=i1i\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_free_queues;</div><div class='add'>+	}</div><div class='add'>+	if (spe-&gt;synth_opts.period &gt; 1)</div><div class='add'>+		ui__warning("Arm SPE has a hardware-based sampling period.\n\n"</div><div class='add'>+			    "--itrace periods &gt; 1i downsample by an interval of n SPE samples rather than n instructions.\n");</div><div class='ctx'> </div><div class='ctx'> 	err = arm_spe_synth_events(spe, session);</div><div class='ctx'> 	if (err)</div><div class='head'>diff --git a/tools/perf/util/arm-spe.h b/tools/perf/util/arm-spe.h<br/>index 390679a4af2f..3966df1856d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/arm-spe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/arm-spe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/arm-spe.h</a></div><div class='hunk'>@@ -47,6 +47,8 @@ enum {</div><div class='ctx'> 	ARM_SPE_CPU_PMU_TYPE,</div><div class='ctx'> 	/* Minimal interval */</div><div class='ctx'> 	ARM_SPE_CAP_MIN_IVAL,</div><div class='add'>+	/* Event filter */</div><div class='add'>+	ARM_SPE_CAP_EVENT_FILTER,</div><div class='ctx'> 	ARM_SPE_CPU_PRIV_MAX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c<br/>index ebd32f1b8f12..a224687ffbc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/auxtrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/auxtrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/auxtrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/auxtrace.c</a></div><div class='hunk'>@@ -55,12 +55,29 @@</div><div class='ctx'> #include "hisi-ptt.h"</div><div class='ctx'> #include "s390-cpumsf.h"</div><div class='ctx'> #include "util/mmap.h"</div><div class='add'>+#include "powerpc-vpadtl.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include "symbol/kallsyms.h"</div><div class='ctx'> #include &lt;internal/lib.h&gt;</div><div class='ctx'> #include "util/sample.h"</div><div class='ctx'> </div><div class='add'>+#define AUXTRACE_SYNTH_EVENT_ID_OFFSET	1000000000ULL</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Event IDs are allocated sequentially, so a big offset from any</div><div class='add'>+ * existing ID will reach a unused range.</div><div class='add'>+ */</div><div class='add'>+u64 auxtrace_synth_id_range_start(struct evsel *evsel)</div><div class='add'>+{</div><div class='add'>+	u64 id = evsel-&gt;core.id[0] + AUXTRACE_SYNTH_EVENT_ID_OFFSET;</div><div class='add'>+</div><div class='add'>+	if (!id)</div><div class='add'>+		id = 1;</div><div class='add'>+</div><div class='add'>+	return id;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Make a group from 'leader' to 'last', requiring that the events were not</div><div class='ctx'>  * already grouped to a different leader.</div><div class='hunk'>@@ -185,10 +202,7 @@ void auxtrace_mmap_params__set_idx(struct auxtrace_mmap_params *mp,</div><div class='ctx'> </div><div class='ctx'> 	if (per_cpu) {</div><div class='ctx'> 		mp-&gt;cpu = perf_cpu_map__cpu(evlist-&gt;core.all_cpus, idx);</div><div class='del'>-		if (evlist-&gt;core.threads)</div><div class='del'>-			mp-&gt;tid = perf_thread_map__pid(evlist-&gt;core.threads, 0);</div><div class='del'>-		else</div><div class='del'>-			mp-&gt;tid = -1;</div><div class='add'>+		mp-&gt;tid = perf_thread_map__pid(evlist-&gt;core.threads, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		mp-&gt;cpu.cpu = -1;</div><div class='ctx'> 		mp-&gt;tid = perf_thread_map__pid(evlist-&gt;core.threads, idx);</div><div class='hunk'>@@ -1365,7 +1379,8 @@ static void unleader_auxtrace(struct perf_session *session)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int perf_event__process_auxtrace_info(struct perf_session *session,</div><div class='add'>+int perf_event__process_auxtrace_info(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				      struct perf_session *session,</div><div class='ctx'> 				      union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	enum auxtrace_type type = event-&gt;auxtrace_info.type;</div><div class='hunk'>@@ -1393,6 +1408,9 @@ int perf_event__process_auxtrace_info(struct perf_session *session,</div><div class='ctx'> 	case PERF_AUXTRACE_HISI_PTT:</div><div class='ctx'> 		err = hisi_ptt_process_auxtrace_info(event, session);</div><div class='ctx'> 		break;</div><div class='add'>+	case PERF_AUXTRACE_VPA_DTL:</div><div class='add'>+		err = powerpc_vpadtl_process_auxtrace_info(event, session);</div><div class='add'>+		break;</div><div class='ctx'> 	case PERF_AUXTRACE_UNKNOWN:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1406,7 +1424,8 @@ int perf_event__process_auxtrace_info(struct perf_session *session,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-s64 perf_event__process_auxtrace(struct perf_session *session,</div><div class='add'>+s64 perf_event__process_auxtrace(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	s64 err;</div><div class='hunk'>@@ -1803,7 +1822,8 @@ void events_stats__auxtrace_error_warn(const struct events_stats *stats)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int perf_event__process_auxtrace_error(struct perf_session *session,</div><div class='add'>+int perf_event__process_auxtrace_error(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				       struct perf_session *session,</div><div class='ctx'> 				       union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (auxtrace__dont_decode(session))</div><div class='head'>diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h<br/>index f001cbb68f8e..6947f3f284c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/auxtrace.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/auxtrace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/auxtrace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/auxtrace.h</a></div><div class='hunk'>@@ -8,16 +8,11 @@</div><div class='ctx'> #define __PERF_AUXTRACE_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='del'>-#include &lt;errno.h&gt;</div><div class='del'>-#include &lt;stdbool.h&gt;</div><div class='del'>-#include &lt;stddef.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt; // FILE</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;perf/cpumap.h&gt;</div><div class='del'>-#include &lt;asm/bitsperlong.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='add'>+#include &lt;perf/cpumap.h&gt;</div><div class='ctx'> </div><div class='ctx'> union perf_event;</div><div class='ctx'> struct perf_session;</div><div class='hunk'>@@ -50,6 +45,7 @@ enum auxtrace_type {</div><div class='ctx'> 	PERF_AUXTRACE_ARM_SPE,</div><div class='ctx'> 	PERF_AUXTRACE_S390_CPUMSF,</div><div class='ctx'> 	PERF_AUXTRACE_HISI_PTT,</div><div class='add'>+	PERF_AUXTRACE_VPA_DTL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum itrace_period_type {</div><div class='hunk'>@@ -458,8 +454,6 @@ struct addr_filters {</div><div class='ctx'> </div><div class='ctx'> struct auxtrace_cache;</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='del'>-</div><div class='ctx'> u64 compat_auxtrace_mmap__read_head(struct auxtrace_mmap *mm);</div><div class='ctx'> int compat_auxtrace_mmap__write_tail(struct auxtrace_mmap *mm, u64 tail);</div><div class='ctx'> </div><div class='hunk'>@@ -614,11 +608,14 @@ void auxtrace_synth_error(struct perf_record_auxtrace_error *auxtrace_error, int</div><div class='ctx'> 			  int code, int cpu, pid_t pid, pid_t tid, u64 ip,</div><div class='ctx'> 			  const char *msg, u64 timestamp);</div><div class='ctx'> </div><div class='del'>-int perf_event__process_auxtrace_info(struct perf_session *session,</div><div class='add'>+int perf_event__process_auxtrace_info(const struct perf_tool *tool,</div><div class='add'>+				      struct perf_session *session,</div><div class='ctx'> 				      union perf_event *event);</div><div class='del'>-s64 perf_event__process_auxtrace(struct perf_session *session,</div><div class='add'>+s64 perf_event__process_auxtrace(const struct perf_tool *tool,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event);</div><div class='del'>-int perf_event__process_auxtrace_error(struct perf_session *session,</div><div class='add'>+int perf_event__process_auxtrace_error(const struct perf_tool *tool,</div><div class='add'>+				       struct perf_session *session,</div><div class='ctx'> 				       union perf_event *event);</div><div class='ctx'> int itrace_do_parse_synth_opts(struct itrace_synth_opts *synth_opts,</div><div class='ctx'> 			       const char *str, int unset);</div><div class='hunk'>@@ -647,6 +644,7 @@ void auxtrace__free_events(struct perf_session *session);</div><div class='ctx'> void auxtrace__free(struct perf_session *session);</div><div class='ctx'> bool auxtrace__evsel_is_auxtrace(struct perf_session *session,</div><div class='ctx'> 				 struct evsel *evsel);</div><div class='add'>+u64 auxtrace_synth_id_range_start(struct evsel *evsel);</div><div class='ctx'> </div><div class='ctx'> #define ITRACE_HELP \</div><div class='ctx'> "				i[period]:    		synthesize instructions events\n" \</div><div class='hunk'>@@ -701,212 +699,4 @@ void itrace_synth_opts__clear_time_range(struct itrace_synth_opts *opts)</div><div class='ctx'> 	opts-&gt;range_num = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-#include "debug.h"</div><div class='del'>-</div><div class='del'>-static inline struct auxtrace_record *</div><div class='del'>-auxtrace_record__init(struct evlist *evlist __maybe_unused,</div><div class='del'>-		      int *err)</div><div class='del'>-{</div><div class='del'>-	*err = 0;</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace_record__free(struct auxtrace_record *itr __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_record__options(struct auxtrace_record *itr __maybe_unused,</div><div class='del'>-			     struct evlist *evlist __maybe_unused,</div><div class='del'>-			     struct record_opts *opts __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int perf_event__process_auxtrace_info(struct perf_session *session __maybe_unused,</div><div class='del'>-				      union perf_event *event __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-s64 perf_event__process_auxtrace(struct perf_session *session __maybe_unused,</div><div class='del'>-				 union perf_event *event __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int perf_event__process_auxtrace_error(struct perf_session *session __maybe_unused,</div><div class='del'>-				       union perf_event *event __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void perf_session__auxtrace_error_inc(struct perf_session *session</div><div class='del'>-				      __maybe_unused,</div><div class='del'>-				      union perf_event *event</div><div class='del'>-				      __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void events_stats__auxtrace_error_warn(const struct events_stats *stats</div><div class='del'>-				       __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int itrace_do_parse_synth_opts(struct itrace_synth_opts *synth_opts __maybe_unused,</div><div class='del'>-			       const char *str __maybe_unused, int unset __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int itrace_parse_synth_opts(const struct option *opt __maybe_unused,</div><div class='del'>-			    const char *str __maybe_unused,</div><div class='del'>-			    int unset __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_parse_snapshot_options(struct auxtrace_record *itr __maybe_unused,</div><div class='del'>-				    struct record_opts *opts __maybe_unused,</div><div class='del'>-				    const char *str)</div><div class='del'>-{</div><div class='del'>-	if (!str)</div><div class='del'>-		return 0;</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_parse_sample_options(struct auxtrace_record *itr __maybe_unused,</div><div class='del'>-				  struct evlist *evlist __maybe_unused,</div><div class='del'>-				  struct record_opts *opts __maybe_unused,</div><div class='del'>-				  const char *str)</div><div class='del'>-{</div><div class='del'>-	if (!str)</div><div class='del'>-		return 0;</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_parse_aux_action(struct evlist *evlist __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	pr_err("AUX area tracing not supported\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace__process_event(struct perf_session *session __maybe_unused,</div><div class='del'>-			    union perf_event *event __maybe_unused,</div><div class='del'>-			    struct perf_sample *sample __maybe_unused,</div><div class='del'>-			    const struct perf_tool *tool __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace__dump_auxtrace_sample(struct perf_session *session __maybe_unused,</div><div class='del'>-				    struct perf_sample *sample __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace__flush_events(struct perf_session *session __maybe_unused,</div><div class='del'>-			   const struct perf_tool *tool __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace__free_events(struct perf_session *session __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace_cache__free(struct auxtrace_cache *auxtrace_cache __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace__free(struct perf_session *session __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_index__write(int fd __maybe_unused,</div><div class='del'>-			  struct list_head *head __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_index__process(int fd __maybe_unused,</div><div class='del'>-			    u64 size __maybe_unused,</div><div class='del'>-			    struct perf_session *session __maybe_unused,</div><div class='del'>-			    bool needs_swap __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void auxtrace_index__free(struct list_head *head __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-bool auxtrace__evsel_is_auxtrace(struct perf_session *session __maybe_unused,</div><div class='del'>-				 struct evsel *evsel __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-int auxtrace_parse_filters(struct evlist *evlist __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int auxtrace_mmap__mmap(struct auxtrace_mmap *mm,</div><div class='del'>-			struct auxtrace_mmap_params *mp,</div><div class='del'>-			void *userpg, int fd);</div><div class='del'>-void auxtrace_mmap__munmap(struct auxtrace_mmap *mm);</div><div class='del'>-void auxtrace_mmap_params__init(struct auxtrace_mmap_params *mp,</div><div class='del'>-				off_t auxtrace_offset,</div><div class='del'>-				unsigned int auxtrace_pages,</div><div class='del'>-				bool auxtrace_overwrite);</div><div class='del'>-void auxtrace_mmap_params__set_idx(struct auxtrace_mmap_params *mp,</div><div class='del'>-				   struct evlist *evlist,</div><div class='del'>-				   struct evsel *evsel, int idx);</div><div class='del'>-</div><div class='del'>-#define ITRACE_HELP ""</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void itrace_synth_opts__set_time_range(struct itrace_synth_opts *opts</div><div class='del'>-				       __maybe_unused,</div><div class='del'>-				       struct perf_time_interval *ptime_range</div><div class='del'>-				       __maybe_unused,</div><div class='del'>-				       int range_num __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline</div><div class='del'>-void itrace_synth_opts__clear_time_range(struct itrace_synth_opts *opts</div><div class='del'>-					 __maybe_unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/perf/util/bpf-event.c b/tools/perf/util/bpf-event.c<br/>index 5b6d3e899e11..2298cd396c42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-event.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-event.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-event.c</a></div><div class='hunk'>@@ -657,9 +657,15 @@ static int perf_event__synthesize_one_bpf_prog(struct perf_session *session,</div><div class='ctx'> 		info_node-&gt;info_linear = info_linear;</div><div class='ctx'> 		info_node-&gt;metadata = NULL;</div><div class='ctx'> 		if (!perf_env__insert_bpf_prog_info(env, info_node)) {</div><div class='del'>-			free(info_linear);</div><div class='add'>+			/*</div><div class='add'>+			 * Insert failed, likely because of a duplicate event</div><div class='add'>+			 * made by the sideband thread. Ignore synthesizing the</div><div class='add'>+			 * metadata.</div><div class='add'>+			 */</div><div class='ctx'> 			free(info_node);</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		/* info_linear is now owned by info_node and shouldn't be freed below. */</div><div class='ctx'> 		info_linear = NULL;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -827,18 +833,18 @@ int perf_event__synthesize_bpf_events(struct perf_session *session,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void perf_env__add_bpf_info(struct perf_env *env, u32 id)</div><div class='add'>+static int perf_env__add_bpf_info(struct perf_env *env, u32 id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_prog_info_node *info_node;</div><div class='ctx'> 	struct perf_bpil *info_linear;</div><div class='ctx'> 	struct btf *btf = NULL;</div><div class='ctx'> 	u64 arrays;</div><div class='ctx'> 	u32 btf_id;</div><div class='del'>-	int fd;</div><div class='add'>+	int fd, err = 0;</div><div class='ctx'> </div><div class='ctx'> 	fd = bpf_prog_get_fd_by_id(id);</div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	arrays = 1UL &lt;&lt; PERF_BPIL_JITED_KSYMS;</div><div class='ctx'> 	arrays |= 1UL &lt;&lt; PERF_BPIL_JITED_FUNC_LENS;</div><div class='hunk'>@@ -852,6 +858,7 @@ static void perf_env__add_bpf_info(struct perf_env *env, u32 id)</div><div class='ctx'> 	info_linear = get_bpf_prog_info_linear(fd, arrays);</div><div class='ctx'> 	if (IS_ERR_OR_NULL(info_linear)) {</div><div class='ctx'> 		pr_debug("%s: failed to get BPF program info. aborting\n", __func__);</div><div class='add'>+		err = PTR_ERR(info_linear);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -862,38 +869,46 @@ static void perf_env__add_bpf_info(struct perf_env *env, u32 id)</div><div class='ctx'> 		info_node-&gt;info_linear = info_linear;</div><div class='ctx'> 		info_node-&gt;metadata = bpf_metadata_create(&amp;info_linear-&gt;info);</div><div class='ctx'> 		if (!perf_env__insert_bpf_prog_info(env, info_node)) {</div><div class='add'>+			pr_debug("%s: duplicate add bpf info request for id %u\n",</div><div class='add'>+				 __func__, btf_id);</div><div class='ctx'> 			free(info_linear);</div><div class='ctx'> 			free(info_node);</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		free(info_linear);</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (btf_id == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	btf = btf__load_from_kernel_by_id(btf_id);</div><div class='del'>-	if (libbpf_get_error(btf)) {</div><div class='del'>-		pr_debug("%s: failed to get BTF of id %u, aborting\n",</div><div class='del'>-			 __func__, btf_id);</div><div class='del'>-		goto out;</div><div class='add'>+	if (!btf) {</div><div class='add'>+		err = -errno;</div><div class='add'>+		pr_debug("%s: failed to get BTF of id %u %d\n", __func__, btf_id, err);</div><div class='add'>+	} else {</div><div class='add'>+		perf_env__fetch_btf(env, btf_id, btf);</div><div class='ctx'> 	}</div><div class='del'>-	perf_env__fetch_btf(env, btf_id, btf);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	btf__free(btf);</div><div class='ctx'> 	close(fd);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bpf_event__sb_cb(union perf_event *event, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_env *env = data;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;header.type != PERF_RECORD_BPF_EVENT)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	switch (event-&gt;bpf.type) {</div><div class='ctx'> 	case PERF_BPF_EVENT_PROG_LOAD:</div><div class='del'>-		perf_env__add_bpf_info(env, event-&gt;bpf.id);</div><div class='add'>+		ret = perf_env__add_bpf_info(env, event-&gt;bpf.id);</div><div class='ctx'> </div><div class='ctx'> 	case PERF_BPF_EVENT_PROG_UNLOAD:</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -907,7 +922,7 @@ static int bpf_event__sb_cb(union perf_event *event, void *data)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int evlist__add_bpf_sb_event(struct evlist *evlist, struct perf_env *env)</div><div class='head'>diff --git a/tools/perf/util/bpf-filter.c b/tools/perf/util/bpf-filter.c<br/>index a0b11f35395f..1a2e7b388d57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-filter.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-filter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-filter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-filter.c</a></div><div class='hunk'>@@ -56,6 +56,7 @@</div><div class='ctx'> #include "util/debug.h"</div><div class='ctx'> #include "util/evsel.h"</div><div class='ctx'> #include "util/target.h"</div><div class='add'>+#include "util/bpf-utils.h"</div><div class='ctx'> </div><div class='ctx'> #include "util/bpf-filter.h"</div><div class='ctx'> #include &lt;util/bpf-filter-flex.h&gt;</div><div class='hunk'>@@ -451,8 +452,12 @@ int perf_bpf_filter__prepare(struct evsel *evsel, struct target *target)</div><div class='ctx'> 	struct bpf_link *link;</div><div class='ctx'> 	struct perf_bpf_filter_entry *entry;</div><div class='ctx'> 	bool needs_idx_hash = !target__has_cpu(target);</div><div class='add'>+#if LIBBPF_CURRENT_VERSION_GEQ(1, 7)</div><div class='ctx'> 	DECLARE_LIBBPF_OPTS(bpf_perf_event_opts, pe_opts,</div><div class='ctx'> 			    .dont_enable = true);</div><div class='add'>+#else</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_perf_event_opts, pe_opts);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	entry = calloc(MAX_FILTERS, sizeof(*entry));</div><div class='ctx'> 	if (entry == NULL)</div><div class='head'>diff --git a/tools/perf/util/bpf-filter.h b/tools/perf/util/bpf-filter.h<br/>index 122477f2de44..818c554b91b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-filter.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-filter.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-filter.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-filter.h</a></div><div class='hunk'>@@ -36,6 +36,8 @@ int perf_bpf_filter__unpin(void);</div><div class='ctx'> </div><div class='ctx'> #else /* !HAVE_BPF_SKEL */</div><div class='ctx'> </div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+</div><div class='ctx'> static inline int perf_bpf_filter__parse(struct list_head *expr_head __maybe_unused,</div><div class='ctx'> 					 const char *str __maybe_unused)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/perf/util/bpf-trace-summary.c b/tools/perf/util/bpf-trace-summary.c<br/>index 69fb165da206..cf6e1e4402d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-trace-summary.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-trace-summary.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-trace-summary.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-trace-summary.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;math.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='hunk'>@@ -138,11 +139,14 @@ static bool sc_node_equal(long key1, long key2, void *ctx __maybe_unused)</div><div class='ctx'> 	return key1 == key2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_common_stats(struct syscall_data *data, FILE *fp)</div><div class='add'>+static int print_common_stats(struct syscall_data *data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; data-&gt;nr_nodes; i++) {</div><div class='add'>+	if (max_summary == 0 || max_summary &gt; data-&gt;nr_nodes)</div><div class='add'>+		max_summary = data-&gt;nr_nodes;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; max_summary; i++) {</div><div class='ctx'> 		struct syscall_node *node = &amp;data-&gt;nodes[i];</div><div class='ctx'> 		struct syscall_stats *stat = &amp;node-&gt;stats;</div><div class='ctx'> 		double total = (double)(stat-&gt;total_time) / NSEC_PER_MSEC;</div><div class='hunk'>@@ -200,7 +204,7 @@ static int update_thread_stats(struct hashmap *hash, struct syscall_key *map_key</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_thread_stat(struct syscall_data *data, FILE *fp)</div><div class='add'>+static int print_thread_stat(struct syscall_data *data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -213,18 +217,18 @@ static int print_thread_stat(struct syscall_data *data, FILE *fp)</div><div class='ctx'> 	printed += fprintf(fp, "                                     (msec)    (msec)    (msec)    (msec)        (%%)\n");</div><div class='ctx'> 	printed += fprintf(fp, "   --------------- --------  ------ -------- --------- --------- ---------     ------\n");</div><div class='ctx'> </div><div class='del'>-	printed += print_common_stats(data, fp);</div><div class='add'>+	printed += print_common_stats(data, max_summary, fp);</div><div class='ctx'> 	printed += fprintf(fp, "\n\n");</div><div class='ctx'> </div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_thread_stats(struct syscall_data **data, int nr_data, FILE *fp)</div><div class='add'>+static int print_thread_stats(struct syscall_data **data, int nr_data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 0; i &lt; nr_data; i++)</div><div class='del'>-		printed += print_thread_stat(data[i], fp);</div><div class='add'>+		printed += print_thread_stat(data[i], max_summary, fp);</div><div class='ctx'> </div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='hunk'>@@ -277,7 +281,7 @@ static int update_total_stats(struct hashmap *hash, struct syscall_key *map_key,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_total_stats(struct syscall_data **data, int nr_data, FILE *fp)</div><div class='add'>+static int print_total_stats(struct syscall_data **data, int nr_data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> 	int nr_events = 0;</div><div class='hunk'>@@ -291,8 +295,11 @@ static int print_total_stats(struct syscall_data **data, int nr_data, FILE *fp)</div><div class='ctx'> 	printed += fprintf(fp, "                                     (msec)    (msec)    (msec)    (msec)        (%%)\n");</div><div class='ctx'> 	printed += fprintf(fp, "   --------------- --------  ------ -------- --------- --------- ---------     ------\n");</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; nr_data; i++)</div><div class='del'>-		printed += print_common_stats(data[i], fp);</div><div class='add'>+	if (max_summary == 0 || max_summary &gt; nr_data)</div><div class='add'>+		max_summary = nr_data;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; max_summary; i++)</div><div class='add'>+		printed += print_common_stats(data[i], max_summary, fp);</div><div class='ctx'> </div><div class='ctx'> 	printed += fprintf(fp, "\n\n");</div><div class='ctx'> 	return printed;</div><div class='hunk'>@@ -333,7 +340,7 @@ static int update_cgroup_stats(struct hashmap *hash, struct syscall_key *map_key</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_cgroup_stat(struct syscall_data *data, FILE *fp)</div><div class='add'>+static int print_cgroup_stat(struct syscall_data *data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> 	struct cgroup *cgrp = __cgroup__find(&amp;cgroups, data-&gt;key);</div><div class='hunk'>@@ -351,23 +358,23 @@ static int print_cgroup_stat(struct syscall_data *data, FILE *fp)</div><div class='ctx'> 	printed += fprintf(fp, "                                     (msec)    (msec)    (msec)    (msec)        (%%)\n");</div><div class='ctx'> 	printed += fprintf(fp, "   --------------- --------  ------ -------- --------- --------- ---------     ------\n");</div><div class='ctx'> </div><div class='del'>-	printed += print_common_stats(data, fp);</div><div class='add'>+	printed += print_common_stats(data, max_summary, fp);</div><div class='ctx'> 	printed += fprintf(fp, "\n\n");</div><div class='ctx'> </div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int print_cgroup_stats(struct syscall_data **data, int nr_data, FILE *fp)</div><div class='add'>+static int print_cgroup_stats(struct syscall_data **data, int nr_data, int max_summary, FILE *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int printed = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 0; i &lt; nr_data; i++)</div><div class='del'>-		printed += print_cgroup_stat(data[i], fp);</div><div class='add'>+		printed += print_cgroup_stat(data[i], max_summary, fp);</div><div class='ctx'> </div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int trace_print_bpf_summary(FILE *fp)</div><div class='add'>+int trace_print_bpf_summary(FILE *fp, int max_summary)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_map *map = skel-&gt;maps.syscall_stats_map;</div><div class='ctx'> 	struct syscall_key *prev_key, key;</div><div class='hunk'>@@ -420,13 +427,13 @@ int trace_print_bpf_summary(FILE *fp)</div><div class='ctx'> </div><div class='ctx'> 	switch (skel-&gt;rodata-&gt;aggr_mode) {</div><div class='ctx'> 	case SYSCALL_AGGR_THREAD:</div><div class='del'>-		printed += print_thread_stats(data, nr_data, fp);</div><div class='add'>+		printed += print_thread_stats(data, nr_data, max_summary, fp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYSCALL_AGGR_CPU:</div><div class='del'>-		printed += print_total_stats(data, nr_data, fp);</div><div class='add'>+		printed += print_total_stats(data, nr_data, max_summary, fp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYSCALL_AGGR_CGROUP:</div><div class='del'>-		printed += print_cgroup_stats(data, nr_data, fp);</div><div class='add'>+		printed += print_cgroup_stats(data, nr_data, max_summary, fp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/tools/perf/util/bpf-utils.c b/tools/perf/util/bpf-utils.c<br/>index 80b1d2b3729b..5a66dc8594aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-utils.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-utils.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-utils.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@ struct bpil_array_desc {</div><div class='ctx'> 				 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct bpil_array_desc bpil_array_desc[] = {</div><div class='add'>+static const struct bpil_array_desc bpil_array_desc[] = {</div><div class='ctx'> 	[PERF_BPIL_JITED_INSNS] = {</div><div class='ctx'> 		offsetof(struct bpf_prog_info, jited_prog_insns),</div><div class='ctx'> 		offsetof(struct bpf_prog_info, jited_prog_len),</div><div class='hunk'>@@ -115,7 +115,7 @@ get_bpf_prog_info_linear(int fd, __u64 arrays)</div><div class='ctx'> 	__u32 info_len = sizeof(info);</div><div class='ctx'> 	__u32 data_len = 0;</div><div class='ctx'> 	int i, err;</div><div class='del'>-	void *ptr;</div><div class='add'>+	__u8 *ptr;</div><div class='ctx'> </div><div class='ctx'> 	if (arrays &gt;&gt; PERF_BPIL_LAST_ARRAY)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='hunk'>@@ -126,15 +126,15 @@ get_bpf_prog_info_linear(int fd, __u64 arrays)</div><div class='ctx'> 		pr_debug("can't get prog info: %s", strerror(errno));</div><div class='ctx'> 		return ERR_PTR(-EFAULT);</div><div class='ctx'> 	}</div><div class='add'>+	if (info.type &gt;= __MAX_BPF_PROG_TYPE)</div><div class='add'>+		pr_debug("%s:%d: unexpected program type %u\n", __func__, __LINE__, info.type);</div><div class='ctx'> </div><div class='ctx'> 	/* step 2: calculate total size of all arrays */</div><div class='ctx'> 	for (i = PERF_BPIL_FIRST_ARRAY; i &lt; PERF_BPIL_LAST_ARRAY; ++i) {</div><div class='add'>+		const struct bpil_array_desc *desc = &amp;bpil_array_desc[i];</div><div class='ctx'> 		bool include_array = (arrays &amp; (1UL &lt;&lt; i)) &gt; 0;</div><div class='del'>-		struct bpil_array_desc *desc;</div><div class='ctx'> 		__u32 count, size;</div><div class='ctx'> </div><div class='del'>-		desc = bpil_array_desc + i;</div><div class='del'>-</div><div class='ctx'> 		/* kernel is too old to support this field */</div><div class='ctx'> 		if (info_len &lt; desc-&gt;array_offset + sizeof(__u32) ||</div><div class='ctx'> 		    info_len &lt; desc-&gt;count_offset + sizeof(__u32) ||</div><div class='hunk'>@@ -163,19 +163,20 @@ get_bpf_prog_info_linear(int fd, __u64 arrays)</div><div class='ctx'> 	ptr = info_linear-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	for (i = PERF_BPIL_FIRST_ARRAY; i &lt; PERF_BPIL_LAST_ARRAY; ++i) {</div><div class='del'>-		struct bpil_array_desc *desc;</div><div class='add'>+		const struct bpil_array_desc *desc = &amp;bpil_array_desc[i];</div><div class='ctx'> 		__u32 count, size;</div><div class='ctx'> </div><div class='ctx'> 		if ((arrays &amp; (1UL &lt;&lt; i)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		desc  = bpil_array_desc + i;</div><div class='ctx'> 		count = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;count_offset);</div><div class='ctx'> 		size  = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;size_offset);</div><div class='ctx'> 		bpf_prog_info_set_offset_u32(&amp;info_linear-&gt;info,</div><div class='ctx'> 					     desc-&gt;count_offset, count);</div><div class='ctx'> 		bpf_prog_info_set_offset_u32(&amp;info_linear-&gt;info,</div><div class='ctx'> 					     desc-&gt;size_offset, size);</div><div class='add'>+		assert(ptr &gt;= info_linear-&gt;data);</div><div class='add'>+		assert(ptr &lt; &amp;info_linear-&gt;data[data_len]);</div><div class='ctx'> 		bpf_prog_info_set_offset_u64(&amp;info_linear-&gt;info,</div><div class='ctx'> 					     desc-&gt;array_offset,</div><div class='ctx'> 					     ptr_to_u64(ptr));</div><div class='hunk'>@@ -189,27 +190,45 @@ get_bpf_prog_info_linear(int fd, __u64 arrays)</div><div class='ctx'> 		free(info_linear);</div><div class='ctx'> 		return ERR_PTR(-EFAULT);</div><div class='ctx'> 	}</div><div class='add'>+	if (info_linear-&gt;info.type &gt;= __MAX_BPF_PROG_TYPE) {</div><div class='add'>+		pr_debug("%s:%d: unexpected program type %u\n",</div><div class='add'>+			 __func__, __LINE__, info_linear-&gt;info.type);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* step 6: verify the data */</div><div class='add'>+	ptr = info_linear-&gt;data;</div><div class='ctx'> 	for (i = PERF_BPIL_FIRST_ARRAY; i &lt; PERF_BPIL_LAST_ARRAY; ++i) {</div><div class='del'>-		struct bpil_array_desc *desc;</div><div class='del'>-		__u32 v1, v2;</div><div class='add'>+		const struct bpil_array_desc *desc = &amp;bpil_array_desc[i];</div><div class='add'>+		__u32 count1, count2, size1, size2;</div><div class='add'>+		__u64 ptr2;</div><div class='ctx'> </div><div class='ctx'> 		if ((arrays &amp; (1UL &lt;&lt; i)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		desc = bpil_array_desc + i;</div><div class='del'>-		v1 = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;count_offset);</div><div class='del'>-		v2 = bpf_prog_info_read_offset_u32(&amp;info_linear-&gt;info,</div><div class='add'>+		count1 = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;count_offset);</div><div class='add'>+		count2 = bpf_prog_info_read_offset_u32(&amp;info_linear-&gt;info,</div><div class='ctx'> 						   desc-&gt;count_offset);</div><div class='del'>-		if (v1 != v2)</div><div class='del'>-			pr_warning("%s: mismatch in element count\n", __func__);</div><div class='add'>+		if (count1 != count2) {</div><div class='add'>+			pr_warning("%s: mismatch in element count %u vs %u\n", __func__, count1, count2);</div><div class='add'>+			free(info_linear);</div><div class='add'>+			return ERR_PTR(-ERANGE);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		v1 = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;size_offset);</div><div class='del'>-		v2 = bpf_prog_info_read_offset_u32(&amp;info_linear-&gt;info,</div><div class='add'>+		size1 = bpf_prog_info_read_offset_u32(&amp;info, desc-&gt;size_offset);</div><div class='add'>+		size2 = bpf_prog_info_read_offset_u32(&amp;info_linear-&gt;info,</div><div class='ctx'> 						   desc-&gt;size_offset);</div><div class='del'>-		if (v1 != v2)</div><div class='del'>-			pr_warning("%s: mismatch in rec size\n", __func__);</div><div class='add'>+		if (size1 != size2) {</div><div class='add'>+			pr_warning("%s: mismatch in rec size %u vs %u\n", __func__, size1, size2);</div><div class='add'>+			free(info_linear);</div><div class='add'>+			return ERR_PTR(-ERANGE);</div><div class='add'>+		}</div><div class='add'>+		ptr2 = bpf_prog_info_read_offset_u64(&amp;info_linear-&gt;info, desc-&gt;array_offset);</div><div class='add'>+		if (ptr_to_u64(ptr) != ptr2) {</div><div class='add'>+			pr_warning("%s: mismatch in array %p vs %llx\n", __func__, ptr, ptr2);</div><div class='add'>+			free(info_linear);</div><div class='add'>+			return ERR_PTR(-ERANGE);</div><div class='add'>+		}</div><div class='add'>+		ptr += roundup(count1 * size1, sizeof(__u64));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* step 7: update info_len and data_len */</div><div class='hunk'>@@ -224,13 +243,12 @@ void bpil_addr_to_offs(struct perf_bpil *info_linear)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = PERF_BPIL_FIRST_ARRAY; i &lt; PERF_BPIL_LAST_ARRAY; ++i) {</div><div class='del'>-		struct bpil_array_desc *desc;</div><div class='add'>+		const struct bpil_array_desc *desc = &amp;bpil_array_desc[i];</div><div class='ctx'> 		__u64 addr, offs;</div><div class='ctx'> </div><div class='ctx'> 		if ((info_linear-&gt;arrays &amp; (1UL &lt;&lt; i)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		desc = bpil_array_desc + i;</div><div class='ctx'> 		addr = bpf_prog_info_read_offset_u64(&amp;info_linear-&gt;info,</div><div class='ctx'> 						     desc-&gt;array_offset);</div><div class='ctx'> 		offs = addr - ptr_to_u64(info_linear-&gt;data);</div><div class='hunk'>@@ -244,13 +262,12 @@ void bpil_offs_to_addr(struct perf_bpil *info_linear)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = PERF_BPIL_FIRST_ARRAY; i &lt; PERF_BPIL_LAST_ARRAY; ++i) {</div><div class='del'>-		struct bpil_array_desc *desc;</div><div class='add'>+		const struct bpil_array_desc *desc = &amp;bpil_array_desc[i];</div><div class='ctx'> 		__u64 addr, offs;</div><div class='ctx'> </div><div class='ctx'> 		if ((info_linear-&gt;arrays &amp; (1UL &lt;&lt; i)) == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		desc = bpil_array_desc + i;</div><div class='ctx'> 		offs = bpf_prog_info_read_offset_u64(&amp;info_linear-&gt;info,</div><div class='ctx'> 						     desc-&gt;array_offset);</div><div class='ctx'> 		addr = offs + ptr_to_u64(info_linear-&gt;data);</div><div class='head'>diff --git a/tools/perf/util/bpf-utils.h b/tools/perf/util/bpf-utils.h<br/>index 86a5055cdfad..a8bc1a232968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-utils.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf-utils.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf-utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf-utils.h</a></div><div class='hunk'>@@ -8,6 +8,16 @@</div><div class='ctx'> #ifdef HAVE_LIBBPF_SUPPORT</div><div class='ctx'> </div><div class='ctx'> #include &lt;bpf/libbpf.h&gt;</div><div class='add'>+#include &lt;bpf/libbpf_version.h&gt;</div><div class='add'>+</div><div class='add'>+#define LIBBPF_CURRENT_VERSION_GEQ(major, minor)                       \</div><div class='add'>+       (LIBBPF_MAJOR_VERSION &gt; (major) ||                              \</div><div class='add'>+        (LIBBPF_MAJOR_VERSION == (major) &amp;&amp; LIBBPF_MINOR_VERSION &gt;= (minor)))</div><div class='add'>+</div><div class='add'>+#if LIBBPF_CURRENT_VERSION_GEQ(1, 7)</div><div class='add'>+// libbpf 1.7+ support the btf_dump_type_data_opts.emit_strings option.</div><div class='add'>+#define HAVE_LIBBPF_STRINGS_SUPPORT 1</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Get bpf_prog_info in continuous memory</div><div class='head'>diff --git a/tools/perf/util/bpf_counter.c b/tools/perf/util/bpf_counter.c<br/>index 73fcafbffc6a..a5882b582205 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_counter.c</a></div><div class='hunk'>@@ -6,10 +6,14 @@</div><div class='ctx'> #include &lt;limits.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/file.h&gt;</div><div class='add'>+#include &lt;sys/resource.h&gt;</div><div class='ctx'> #include &lt;sys/time.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='add'>+#include &lt;bpf/btf.h&gt;</div><div class='ctx'> #include &lt;perf/bpf_perf.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bpf_counter.h"</div><div class='hunk'>@@ -28,13 +32,67 @@</div><div class='ctx'> #include "bpf_skel/bperf_leader.skel.h"</div><div class='ctx'> #include "bpf_skel/bperf_follower.skel.h"</div><div class='ctx'> </div><div class='add'>+struct bpf_counter {</div><div class='add'>+	void *skel;</div><div class='add'>+	struct list_head list;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define ATTR_MAP_SIZE 16</div><div class='ctx'> </div><div class='del'>-static inline void *u64_to_ptr(__u64 ptr)</div><div class='add'>+static void *u64_to_ptr(__u64 ptr)</div><div class='ctx'> {</div><div class='ctx'> 	return (void *)(unsigned long)ptr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+void set_max_rlimit(void)</div><div class='add'>+{</div><div class='add'>+	struct rlimit rinf = { RLIM_INFINITY, RLIM_INFINITY };</div><div class='add'>+</div><div class='add'>+	setrlimit(RLIMIT_MEMLOCK, &amp;rinf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __u32 bpf_link_get_id(int fd)</div><div class='add'>+{</div><div class='add'>+	struct bpf_link_info link_info = { .id = 0, };</div><div class='add'>+	__u32 link_info_len = sizeof(link_info);</div><div class='add'>+</div><div class='add'>+	bpf_obj_get_info_by_fd(fd, &amp;link_info, &amp;link_info_len);</div><div class='add'>+	return link_info.id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __u32 bpf_link_get_prog_id(int fd)</div><div class='add'>+{</div><div class='add'>+	struct bpf_link_info link_info = { .id = 0, };</div><div class='add'>+	__u32 link_info_len = sizeof(link_info);</div><div class='add'>+</div><div class='add'>+	bpf_obj_get_info_by_fd(fd, &amp;link_info, &amp;link_info_len);</div><div class='add'>+	return link_info.prog_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __u32 bpf_map_get_id(int fd)</div><div class='add'>+{</div><div class='add'>+	struct bpf_map_info map_info = { .id = 0, };</div><div class='add'>+	__u32 map_info_len = sizeof(map_info);</div><div class='add'>+</div><div class='add'>+	bpf_obj_get_info_by_fd(fd, &amp;map_info, &amp;map_info_len);</div><div class='add'>+	return map_info.id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* trigger the leader program on a cpu */</div><div class='add'>+int bperf_trigger_reading(int prog_fd, int cpu)</div><div class='add'>+{</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_test_run_opts, opts,</div><div class='add'>+			    .ctx_in = NULL,</div><div class='add'>+			    .ctx_size_in = 0,</div><div class='add'>+			    .flags = BPF_F_TEST_RUN_ON_CPU,</div><div class='add'>+			    .cpu = cpu,</div><div class='add'>+			    .retval = 0,</div><div class='add'>+		);</div><div class='add'>+</div><div class='add'>+	return bpf_prog_test_run_opts(prog_fd, &amp;opts);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct bpf_counter *bpf_counter_alloc(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_counter *counter;</div><div class='hunk'>@@ -278,6 +336,7 @@ static int bpf_program_profiler__install_pe(struct evsel *evsel, int cpu_map_idx</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_prog_profiler_bpf *skel;</div><div class='ctx'> 	struct bpf_counter *counter;</div><div class='add'>+	int cpu = perf_cpu_map__cpu(evsel-&gt;core.cpus, cpu_map_idx).cpu;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(counter, &amp;evsel-&gt;bpf_counter_list, list) {</div><div class='hunk'>@@ -285,7 +344,7 @@ static int bpf_program_profiler__install_pe(struct evsel *evsel, int cpu_map_idx</div><div class='ctx'> 		assert(skel != NULL);</div><div class='ctx'> </div><div class='ctx'> 		ret = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.events),</div><div class='del'>-					  &amp;cpu_map_idx, &amp;fd, BPF_ANY);</div><div class='add'>+					  &amp;cpu, &amp;fd, BPF_ANY);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -393,7 +452,6 @@ static int bperf_check_target(struct evsel *evsel,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static	struct perf_cpu_map *all_cpu_map;</div><div class='ctx'> static __u32 filter_entry_cnt;</div><div class='ctx'> </div><div class='ctx'> static int bperf_reload_leader_program(struct evsel *evsel, int attr_map_fd,</div><div class='hunk'>@@ -402,6 +460,7 @@ static int bperf_reload_leader_program(struct evsel *evsel, int attr_map_fd,</div><div class='ctx'> 	struct bperf_leader_bpf *skel = bperf_leader_bpf__open();</div><div class='ctx'> 	int link_fd, diff_map_fd, err;</div><div class='ctx'> 	struct bpf_link *link = NULL;</div><div class='add'>+	struct perf_thread_map *threads;</div><div class='ctx'> </div><div class='ctx'> 	if (!skel) {</div><div class='ctx'> 		pr_err("Failed to open leader skeleton\n");</div><div class='hunk'>@@ -437,7 +496,11 @@ static int bperf_reload_leader_program(struct evsel *evsel, int attr_map_fd,</div><div class='ctx'> 	 * following evsel__open_per_cpu call</div><div class='ctx'> 	 */</div><div class='ctx'> 	evsel-&gt;leader_skel = skel;</div><div class='del'>-	evsel__open_per_cpu(evsel, all_cpu_map, -1);</div><div class='add'>+	assert(!perf_cpu_map__has_any_cpu_or_is_empty(evsel-&gt;core.cpus));</div><div class='add'>+	/* Always open system wide. */</div><div class='add'>+	threads = thread_map__new_by_tid(-1);</div><div class='add'>+	evsel__open(evsel, evsel-&gt;core.cpus, threads);</div><div class='add'>+	perf_thread_map__put(threads);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	bperf_leader_bpf__destroy(skel);</div><div class='hunk'>@@ -475,12 +538,6 @@ static int bperf__load(struct evsel *evsel, struct target *target)</div><div class='ctx'> 	if (bperf_check_target(evsel, target, &amp;filter_type, &amp;filter_entry_cnt))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	if (!all_cpu_map) {</div><div class='del'>-		all_cpu_map = perf_cpu_map__new_online_cpus();</div><div class='del'>-		if (!all_cpu_map)</div><div class='del'>-			return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	evsel-&gt;bperf_leader_prog_fd = -1;</div><div class='ctx'> 	evsel-&gt;bperf_leader_link_fd = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -598,9 +655,10 @@ out:</div><div class='ctx'> static int bperf__install_pe(struct evsel *evsel, int cpu_map_idx, int fd)</div><div class='ctx'> {</div><div class='ctx'> 	struct bperf_leader_bpf *skel = evsel-&gt;leader_skel;</div><div class='add'>+	int cpu = perf_cpu_map__cpu(evsel-&gt;core.cpus, cpu_map_idx).cpu;</div><div class='ctx'> </div><div class='ctx'> 	return bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.events),</div><div class='del'>-				   &amp;cpu_map_idx, &amp;fd, BPF_ANY);</div><div class='add'>+				   &amp;cpu, &amp;fd, BPF_ANY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -609,13 +667,12 @@ static int bperf__install_pe(struct evsel *evsel, int cpu_map_idx, int fd)</div><div class='ctx'>  */</div><div class='ctx'> static int bperf_sync_counters(struct evsel *evsel)</div><div class='ctx'> {</div><div class='del'>-	int num_cpu, i, cpu;</div><div class='add'>+	struct perf_cpu cpu;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	perf_cpu_map__for_each_cpu(cpu, idx, evsel-&gt;core.cpus)</div><div class='add'>+		bperf_trigger_reading(evsel-&gt;bperf_leader_prog_fd, cpu.cpu);</div><div class='ctx'> </div><div class='del'>-	num_cpu = perf_cpu_map__nr(all_cpu_map);</div><div class='del'>-	for (i = 0; i &lt; num_cpu; i++) {</div><div class='del'>-		cpu = perf_cpu_map__cpu(all_cpu_map, i).cpu;</div><div class='del'>-		bperf_trigger_reading(evsel-&gt;bperf_leader_prog_fd, cpu);</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -785,7 +842,7 @@ struct bpf_counter_ops bperf_ops = {</div><div class='ctx'> </div><div class='ctx'> extern struct bpf_counter_ops bperf_cgrp_ops;</div><div class='ctx'> </div><div class='del'>-static inline bool bpf_counter_skip(struct evsel *evsel)</div><div class='add'>+static bool bpf_counter_skip(struct evsel *evsel)</div><div class='ctx'> {</div><div class='ctx'> 	return evsel-&gt;bpf_counter_ops == NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/util/bpf_counter.h b/tools/perf/util/bpf_counter.h<br/>index c6d21c07b14c..658d8e7d507e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_counter.h</a></div><div class='hunk'>@@ -2,18 +2,10 @@</div><div class='ctx'> #ifndef __PERF_BPF_COUNTER_H</div><div class='ctx'> #define __PERF_BPF_COUNTER_H 1</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;sys/resource.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_LIBBPF_SUPPORT</div><div class='del'>-#include &lt;bpf/bpf.h&gt;</div><div class='del'>-#include &lt;bpf/btf.h&gt;</div><div class='del'>-#include &lt;bpf/libbpf.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct evsel;</div><div class='ctx'> struct target;</div><div class='del'>-struct bpf_counter;</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_BPF_SKEL</div><div class='ctx'> </div><div class='ctx'> typedef int (*bpf_counter_evsel_op)(struct evsel *evsel);</div><div class='ctx'> typedef int (*bpf_counter_evsel_target_op)(struct evsel *evsel,</div><div class='hunk'>@@ -22,6 +14,7 @@ typedef int (*bpf_counter_evsel_install_pe_op)(struct evsel *evsel,</div><div class='ctx'> 					       int cpu_map_idx,</div><div class='ctx'> 					       int fd);</div><div class='ctx'> </div><div class='add'>+/* Shared ops between bpf_counter, bpf_counter_cgroup, etc. */</div><div class='ctx'> struct bpf_counter_ops {</div><div class='ctx'> 	bpf_counter_evsel_target_op load;</div><div class='ctx'> 	bpf_counter_evsel_op enable;</div><div class='hunk'>@@ -31,13 +24,6 @@ struct bpf_counter_ops {</div><div class='ctx'> 	bpf_counter_evsel_install_pe_op install_pe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct bpf_counter {</div><div class='del'>-	void *skel;</div><div class='del'>-	struct list_head list;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_BPF_SKEL</div><div class='del'>-</div><div class='ctx'> int bpf_counter__load(struct evsel *evsel, struct target *target);</div><div class='ctx'> int bpf_counter__enable(struct evsel *evsel);</div><div class='ctx'> int bpf_counter__disable(struct evsel *evsel);</div><div class='hunk'>@@ -45,6 +31,9 @@ int bpf_counter__read(struct evsel *evsel);</div><div class='ctx'> void bpf_counter__destroy(struct evsel *evsel);</div><div class='ctx'> int bpf_counter__install_pe(struct evsel *evsel, int cpu_map_idx, int fd);</div><div class='ctx'> </div><div class='add'>+int bperf_trigger_reading(int prog_fd, int cpu);</div><div class='add'>+void set_max_rlimit(void);</div><div class='add'>+</div><div class='ctx'> #else /* HAVE_BPF_SKEL */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -83,55 +72,4 @@ static inline int bpf_counter__install_pe(struct evsel *evsel __maybe_unused,</div><div class='ctx'> </div><div class='ctx'> #endif /* HAVE_BPF_SKEL */</div><div class='ctx'> </div><div class='del'>-static inline void set_max_rlimit(void)</div><div class='del'>-{</div><div class='del'>-	struct rlimit rinf = { RLIM_INFINITY, RLIM_INFINITY };</div><div class='del'>-</div><div class='del'>-	setrlimit(RLIMIT_MEMLOCK, &amp;rinf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_BPF_SKEL</div><div class='del'>-</div><div class='del'>-static inline __u32 bpf_link_get_id(int fd)</div><div class='del'>-{</div><div class='del'>-	struct bpf_link_info link_info = { .id = 0, };</div><div class='del'>-	__u32 link_info_len = sizeof(link_info);</div><div class='del'>-</div><div class='del'>-	bpf_obj_get_info_by_fd(fd, &amp;link_info, &amp;link_info_len);</div><div class='del'>-	return link_info.id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline __u32 bpf_link_get_prog_id(int fd)</div><div class='del'>-{</div><div class='del'>-	struct bpf_link_info link_info = { .id = 0, };</div><div class='del'>-	__u32 link_info_len = sizeof(link_info);</div><div class='del'>-</div><div class='del'>-	bpf_obj_get_info_by_fd(fd, &amp;link_info, &amp;link_info_len);</div><div class='del'>-	return link_info.prog_id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline __u32 bpf_map_get_id(int fd)</div><div class='del'>-{</div><div class='del'>-	struct bpf_map_info map_info = { .id = 0, };</div><div class='del'>-	__u32 map_info_len = sizeof(map_info);</div><div class='del'>-</div><div class='del'>-	bpf_obj_get_info_by_fd(fd, &amp;map_info, &amp;map_info_len);</div><div class='del'>-	return map_info.id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* trigger the leader program on a cpu */</div><div class='del'>-static inline int bperf_trigger_reading(int prog_fd, int cpu)</div><div class='del'>-{</div><div class='del'>-	DECLARE_LIBBPF_OPTS(bpf_test_run_opts, opts,</div><div class='del'>-			    .ctx_in = NULL,</div><div class='del'>-			    .ctx_size_in = 0,</div><div class='del'>-			    .flags = BPF_F_TEST_RUN_ON_CPU,</div><div class='del'>-			    .cpu = cpu,</div><div class='del'>-			    .retval = 0,</div><div class='del'>-		);</div><div class='del'>-</div><div class='del'>-	return bpf_prog_test_run_opts(prog_fd, &amp;opts);</div><div class='del'>-}</div><div class='del'>-#endif /* HAVE_BPF_SKEL */</div><div class='del'>-</div><div class='ctx'> #endif /* __PERF_BPF_COUNTER_H */</div><div class='head'>diff --git a/tools/perf/util/bpf_counter_cgroup.c b/tools/perf/util/bpf_counter_cgroup.c<br/>index 6ff42619de12..17d7196c6589 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter_cgroup.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_counter_cgroup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_counter_cgroup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_counter_cgroup.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> /* Copyright (c) 2021 Google */</div><div class='ctx'> </div><div class='ctx'> #include &lt;assert.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;limits.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;sys/file.h&gt;</div><div class='hunk'>@@ -13,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='ctx'> #include &lt;perf/bpf_perf.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "affinity.h"</div><div class='hunk'>@@ -26,6 +28,7 @@</div><div class='ctx'> #include "cpumap.h"</div><div class='ctx'> #include "thread_map.h"</div><div class='ctx'> </div><div class='add'>+#include "bpf_skel/bperf_cgroup.h"</div><div class='ctx'> #include "bpf_skel/bperf_cgroup.skel.h"</div><div class='ctx'> </div><div class='ctx'> static struct perf_event_attr cgrp_switch_attr = {</div><div class='hunk'>@@ -41,6 +44,55 @@ static struct bperf_cgroup_bpf *skel;</div><div class='ctx'> </div><div class='ctx'> #define FD(evt, cpu) (*(int *)xyarray__entry(evt-&gt;core.fd, cpu, 0))</div><div class='ctx'> </div><div class='add'>+static void setup_rodata(struct bperf_cgroup_bpf *sk, int evlist_size)</div><div class='add'>+{</div><div class='add'>+	int map_size, total_cpus = cpu__max_cpu().cpu;</div><div class='add'>+</div><div class='add'>+	sk-&gt;rodata-&gt;num_cpus = total_cpus;</div><div class='add'>+	sk-&gt;rodata-&gt;num_events = evlist_size / nr_cgroups;</div><div class='add'>+</div><div class='add'>+	if (cgroup_is_v2("perf_event") &gt; 0)</div><div class='add'>+		sk-&gt;rodata-&gt;use_cgroup_v2 = 1;</div><div class='add'>+</div><div class='add'>+	BUG_ON(evlist_size % nr_cgroups != 0);</div><div class='add'>+</div><div class='add'>+	/* we need one copy of events per cpu for reading */</div><div class='add'>+	map_size = total_cpus * evlist_size / nr_cgroups;</div><div class='add'>+	bpf_map__set_max_entries(sk-&gt;maps.events, map_size);</div><div class='add'>+	bpf_map__set_max_entries(sk-&gt;maps.cgrp_idx, nr_cgroups);</div><div class='add'>+	/* previous result is saved in a per-cpu array */</div><div class='add'>+	map_size = evlist_size / nr_cgroups;</div><div class='add'>+	bpf_map__set_max_entries(sk-&gt;maps.prev_readings, map_size);</div><div class='add'>+	/* cgroup result needs all events (per-cpu) */</div><div class='add'>+	map_size = evlist_size;</div><div class='add'>+	bpf_map__set_max_entries(sk-&gt;maps.cgrp_readings, map_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_max_events_program_load(void)</div><div class='add'>+{</div><div class='add'>+#ifndef NDEBUG</div><div class='add'>+	/*</div><div class='add'>+	 * Test that the program verifies with the maximum number of events. If</div><div class='add'>+	 * this test fails unfortunately perf needs recompiling with a lower</div><div class='add'>+	 * BPERF_CGROUP__MAX_EVENTS to avoid BPF verifier issues.</div><div class='add'>+	 */</div><div class='add'>+	int err, max_events = BPERF_CGROUP__MAX_EVENTS * nr_cgroups;</div><div class='add'>+	struct bperf_cgroup_bpf *test_skel = bperf_cgroup_bpf__open();</div><div class='add'>+</div><div class='add'>+	if (!test_skel) {</div><div class='add'>+		pr_err("Failed to open cgroup skeleton\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	setup_rodata(test_skel, max_events);</div><div class='add'>+	err = bperf_cgroup_bpf__load(test_skel);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("Failed to load cgroup skeleton with max events %d.\n",</div><div class='add'>+			BPERF_CGROUP__MAX_EVENTS);</div><div class='add'>+	}</div><div class='add'>+	bperf_cgroup_bpf__destroy(test_skel);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bperf_load_program(struct evlist *evlist)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_link *link;</div><div class='hunk'>@@ -49,35 +101,18 @@ static int bperf_load_program(struct evlist *evlist)</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	struct perf_cpu cpu;</div><div class='ctx'> 	int total_cpus = cpu__max_cpu().cpu;</div><div class='del'>-	int map_size, map_fd;</div><div class='del'>-	int prog_fd, err;</div><div class='add'>+	int map_fd, prog_fd, err;</div><div class='add'>+</div><div class='add'>+	set_max_rlimit();</div><div class='add'>+</div><div class='add'>+	test_max_events_program_load();</div><div class='ctx'> </div><div class='ctx'> 	skel = bperf_cgroup_bpf__open();</div><div class='ctx'> 	if (!skel) {</div><div class='ctx'> 		pr_err("Failed to open cgroup skeleton\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	skel-&gt;rodata-&gt;num_cpus = total_cpus;</div><div class='del'>-	skel-&gt;rodata-&gt;num_events = evlist-&gt;core.nr_entries / nr_cgroups;</div><div class='del'>-</div><div class='del'>-	if (cgroup_is_v2("perf_event") &gt; 0)</div><div class='del'>-		skel-&gt;rodata-&gt;use_cgroup_v2 = 1;</div><div class='del'>-</div><div class='del'>-	BUG_ON(evlist-&gt;core.nr_entries % nr_cgroups != 0);</div><div class='del'>-</div><div class='del'>-	/* we need one copy of events per cpu for reading */</div><div class='del'>-	map_size = total_cpus * evlist-&gt;core.nr_entries / nr_cgroups;</div><div class='del'>-	bpf_map__set_max_entries(skel-&gt;maps.events, map_size);</div><div class='del'>-	bpf_map__set_max_entries(skel-&gt;maps.cgrp_idx, nr_cgroups);</div><div class='del'>-	/* previous result is saved in a per-cpu array */</div><div class='del'>-	map_size = evlist-&gt;core.nr_entries / nr_cgroups;</div><div class='del'>-	bpf_map__set_max_entries(skel-&gt;maps.prev_readings, map_size);</div><div class='del'>-	/* cgroup result needs all events (per-cpu) */</div><div class='del'>-	map_size = evlist-&gt;core.nr_entries;</div><div class='del'>-	bpf_map__set_max_entries(skel-&gt;maps.cgrp_readings, map_size);</div><div class='del'>-</div><div class='del'>-	set_max_rlimit();</div><div class='add'>+	setup_rodata(skel, evlist-&gt;core.nr_entries);</div><div class='ctx'> </div><div class='ctx'> 	err = bperf_cgroup_bpf__load(skel);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -185,7 +220,8 @@ static int bperf_cgrp__load(struct evsel *evsel,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bperf_cgrp__install_pe(struct evsel *evsel __maybe_unused,</div><div class='del'>-				  int cpu __maybe_unused, int fd __maybe_unused)</div><div class='add'>+				  int cpu_map_idx __maybe_unused,</div><div class='add'>+				  int fd __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	/* nothing to do */</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/tools/perf/util/bpf_ftrace.c b/tools/perf/util/bpf_ftrace.c<br/>index 0cb02412043c..c456d24efa30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_ftrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_ftrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_ftrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_ftrace.c</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;stdint.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "util/ftrace.h"</div><div class='head'>diff --git a/tools/perf/util/bpf_lock_contention.c b/tools/perf/util/bpf_lock_contention.c<br/>index 60b81d586323..7b5671f13c53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_lock_contention.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_lock_contention.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_lock_contention.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_lock_contention.c</a></div><div class='hunk'>@@ -184,6 +184,9 @@ int lock_contention_prepare(struct lock_contention *con)</div><div class='ctx'> 	struct evlist *evlist = con-&gt;evlist;</div><div class='ctx'> 	struct target *target = con-&gt;target;</div><div class='ctx'> </div><div class='add'>+	/* make sure it loads the kernel map before lookup */</div><div class='add'>+	map__load(machine__kernel_map(con-&gt;machine));</div><div class='add'>+</div><div class='ctx'> 	skel = lock_contention_bpf__open();</div><div class='ctx'> 	if (!skel) {</div><div class='ctx'> 		pr_err("Failed to open lock-contention BPF skeleton\n");</div><div class='hunk'>@@ -749,9 +752,6 @@ int lock_contention_read(struct lock_contention *con)</div><div class='ctx'> 		bpf_prog_test_run_opts(prog_fd, &amp;opts);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* make sure it loads the kernel map */</div><div class='del'>-	maps__load_first(machine-&gt;kmaps);</div><div class='del'>-</div><div class='ctx'> 	prev_key = NULL;</div><div class='ctx'> 	while (!bpf_map_get_next_key(fd, prev_key, &amp;key)) {</div><div class='ctx'> 		s64 ls_key;</div><div class='head'>diff --git a/tools/perf/util/bpf_map.c b/tools/perf/util/bpf_map.c<br/>index 578f27d2d6b4..442f91b4e8e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_map.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_map.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_map.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_map.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;bpf/libbpf.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='head'>diff --git a/tools/perf/util/bpf_off_cpu.c b/tools/perf/util/bpf_off_cpu.c<br/>index c367fefe6ecb..88e0660c4bff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_off_cpu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_off_cpu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_off_cpu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_off_cpu.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include "util/cgroup.h"</div><div class='ctx'> #include "util/strlist.h"</div><div class='ctx'> #include &lt;bpf/bpf.h&gt;</div><div class='add'>+#include &lt;bpf/btf.h&gt;</div><div class='ctx'> #include &lt;internal/xyarray.h&gt;</div><div class='ctx'> #include &lt;linux/time64.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c b/tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c<br/>index cb86e261b4de..2a6e61864ee0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_skel/augmented_raw_syscalls.bpf.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@ struct syscalls_sys_enter {</div><div class='ctx'> 	__uint(type, BPF_MAP_TYPE_PROG_ARRAY);</div><div class='ctx'> 	__type(key, __u32);</div><div class='ctx'> 	__type(value, __u32);</div><div class='del'>-	__uint(max_entries, 512);</div><div class='add'>+	__uint(max_entries, 1024);</div><div class='ctx'> } syscalls_sys_enter SEC(".maps");</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -57,7 +57,7 @@ struct syscalls_sys_exit {</div><div class='ctx'> 	__uint(type, BPF_MAP_TYPE_PROG_ARRAY);</div><div class='ctx'> 	__type(key, __u32);</div><div class='ctx'> 	__type(value, __u32);</div><div class='del'>-	__uint(max_entries, 512);</div><div class='add'>+	__uint(max_entries, 1024);</div><div class='ctx'> } syscalls_sys_exit SEC(".maps");</div><div class='ctx'> </div><div class='ctx'> struct syscall_enter_args {</div><div class='head'>diff --git a/tools/perf/util/bpf_skel/bperf_cgroup.bpf.c b/tools/perf/util/bpf_skel/bperf_cgroup.bpf.c<br/>index 57cab7647a9a..c2298a2decc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/bperf_cgroup.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/bperf_cgroup.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/bperf_cgroup.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_skel/bperf_cgroup.bpf.c</a></div><div class='hunk'>@@ -1,14 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> // Copyright (c) 2021 Facebook</div><div class='ctx'> // Copyright (c) 2021 Google</div><div class='add'>+#include "bperf_cgroup.h"</div><div class='ctx'> #include "vmlinux.h"</div><div class='ctx'> #include &lt;bpf/bpf_helpers.h&gt;</div><div class='ctx'> #include &lt;bpf/bpf_tracing.h&gt;</div><div class='ctx'> #include &lt;bpf/bpf_core_read.h&gt;</div><div class='ctx'> </div><div class='del'>-#define MAX_LEVELS  10  // max cgroup hierarchy level: arbitrary</div><div class='del'>-#define MAX_EVENTS  32  // max events per cgroup: arbitrary</div><div class='del'>-</div><div class='ctx'> // NOTE: many of map and global data will be modified before loading</div><div class='ctx'> //       from the userspace (perf tool) using the skeleton helpers.</div><div class='ctx'> </div><div class='hunk'>@@ -97,7 +95,7 @@ static inline int get_cgroup_v1_idx(__u32 *cgrps, int size)</div><div class='ctx'> 	cgrp = BPF_CORE_READ(p, cgroups, subsys[perf_subsys_id], cgroup);</div><div class='ctx'> 	level = BPF_CORE_READ(cgrp, level);</div><div class='ctx'> </div><div class='del'>-	for (cnt = 0; i &lt; MAX_LEVELS; i++) {</div><div class='add'>+	for (cnt = 0; i &lt; BPERF_CGROUP__MAX_LEVELS; i++) {</div><div class='ctx'> 		__u64 cgrp_id;</div><div class='ctx'> </div><div class='ctx'> 		if (i &gt; level)</div><div class='hunk'>@@ -123,7 +121,7 @@ static inline int get_cgroup_v2_idx(__u32 *cgrps, int size)</div><div class='ctx'> 	__u32 *elem;</div><div class='ctx'> 	int cnt;</div><div class='ctx'> </div><div class='del'>-	for (cnt = 0; i &lt; MAX_LEVELS; i++) {</div><div class='add'>+	for (cnt = 0; i &lt; BPERF_CGROUP__MAX_LEVELS; i++) {</div><div class='ctx'> 		__u64 cgrp_id = bpf_get_current_ancestor_cgroup_id(i);</div><div class='ctx'> </div><div class='ctx'> 		if (cgrp_id == 0)</div><div class='hunk'>@@ -148,17 +146,17 @@ static int bperf_cgroup_count(void)</div><div class='ctx'> 	register int c = 0;</div><div class='ctx'> 	struct bpf_perf_event_value val, delta, *prev_val, *cgrp_val;</div><div class='ctx'> 	__u32 cpu = bpf_get_smp_processor_id();</div><div class='del'>-	__u32 cgrp_idx[MAX_LEVELS];</div><div class='add'>+	__u32 cgrp_idx[BPERF_CGROUP__MAX_LEVELS];</div><div class='ctx'> 	int cgrp_cnt;</div><div class='ctx'> 	__u32 key, cgrp;</div><div class='ctx'> 	long err;</div><div class='ctx'> </div><div class='ctx'> 	if (use_cgroup_v2)</div><div class='del'>-		cgrp_cnt = get_cgroup_v2_idx(cgrp_idx, MAX_LEVELS);</div><div class='add'>+		cgrp_cnt = get_cgroup_v2_idx(cgrp_idx, BPERF_CGROUP__MAX_LEVELS);</div><div class='ctx'> 	else</div><div class='del'>-		cgrp_cnt = get_cgroup_v1_idx(cgrp_idx, MAX_LEVELS);</div><div class='add'>+		cgrp_cnt = get_cgroup_v1_idx(cgrp_idx, BPERF_CGROUP__MAX_LEVELS);</div><div class='ctx'> </div><div class='del'>-	for ( ; idx &lt; MAX_EVENTS; idx++) {</div><div class='add'>+	for ( ; idx &lt; BPERF_CGROUP__MAX_EVENTS; idx++) {</div><div class='ctx'> 		if (idx == num_events)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -186,7 +184,7 @@ static int bperf_cgroup_count(void)</div><div class='ctx'> 			delta.enabled = val.enabled - prev_val-&gt;enabled;</div><div class='ctx'> 			delta.running = val.running - prev_val-&gt;running;</div><div class='ctx'> </div><div class='del'>-			for (c = 0; c &lt; MAX_LEVELS; c++) {</div><div class='add'>+			for (c = 0; c &lt; BPERF_CGROUP__MAX_LEVELS; c++) {</div><div class='ctx'> 				if (c == cgrp_cnt)</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/bpf_skel/bperf_cgroup.h b/tools/perf/util/bpf_skel/bperf_cgroup.h<br/>new file mode 100644<br/>index 000000000000..3fb84b19d39a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/bperf_cgroup.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_skel/bperf_cgroup.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/* Data structures shared between BPF and tools. */</div><div class='add'>+#ifndef __BPERF_CGROUP_H</div><div class='add'>+#define __BPERF_CGROUP_H</div><div class='add'>+</div><div class='add'>+// These constants impact code size of bperf_cgroup.bpf.c that may result in BPF</div><div class='add'>+// verifier issues. They are exposed to control the size and also to disable BPF</div><div class='add'>+// counters when the number of user events is too large.</div><div class='add'>+</div><div class='add'>+// max cgroup hierarchy level: arbitrary</div><div class='add'>+#define BPERF_CGROUP__MAX_LEVELS  10</div><div class='add'>+// max events per cgroup: arbitrary</div><div class='add'>+#define BPERF_CGROUP__MAX_EVENTS  128</div><div class='add'>+</div><div class='add'>+#endif /* __BPERF_CGROUP_H */</div><div class='head'>diff --git a/tools/perf/util/bpf_skel/kwork_top.bpf.c b/tools/perf/util/bpf_skel/kwork_top.bpf.c<br/>index 73e32e063030..6673386302e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/kwork_top.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/kwork_top.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/kwork_top.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_skel/kwork_top.bpf.c</a></div><div class='hunk'>@@ -18,9 +18,7 @@ enum kwork_class_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define MAX_ENTRIES     102400</div><div class='del'>-#ifndef MAX_NR_CPUS</div><div class='ctx'> #define MAX_NR_CPUS     4096</div><div class='del'>-#endif</div><div class='ctx'> #define PF_KTHREAD      0x00200000</div><div class='ctx'> #define MAX_COMMAND_LEN 16</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/bpf_skel/sample_filter.bpf.c b/tools/perf/util/bpf_skel/sample_filter.bpf.c<br/>index b195e6efeb8b..e5666d4c1722 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/sample_filter.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/bpf_skel/sample_filter.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/bpf_skel/sample_filter.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/bpf_skel/sample_filter.bpf.c</a></div><div class='hunk'>@@ -164,7 +164,7 @@ static inline __u64 perf_get_sample(struct bpf_perf_event_data_kern *kctx,</div><div class='ctx'> 		if (entry-&gt;part == 8) {</div><div class='ctx'> 			union perf_mem_data_src___new *data = (void *)&amp;kctx-&gt;data-&gt;data_src;</div><div class='ctx'> </div><div class='del'>-			if (bpf_core_field_exists(data-&gt;mem_hops))</div><div class='add'>+			if (__builtin_preserve_field_info(data-&gt;mem_hops, BPF_FIELD_EXISTS))</div><div class='ctx'> 				return data-&gt;mem_hops;</div><div class='ctx'> </div><div class='ctx'> 			return 0;</div><div class='head'>diff --git a/tools/perf/util/build-id.c b/tools/perf/util/build-id.c<br/>index a7018a3b0437..fdb35133fde4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/build-id.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/build-id.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/build-id.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/build-id.c</a></div><div class='hunk'>@@ -86,6 +86,13 @@ int build_id__snprintf(const struct build_id *build_id, char *bf, size_t bf_size</div><div class='ctx'> {</div><div class='ctx'> 	size_t offs = 0;</div><div class='ctx'> </div><div class='add'>+	if (build_id-&gt;size == 0) {</div><div class='add'>+		/* Ensure bf is always \0 terminated. */</div><div class='add'>+		if (bf_size &gt; 0)</div><div class='add'>+			bf[0] = '\0';</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (size_t i = 0; i &lt; build_id-&gt;size &amp;&amp; offs &lt; bf_size; ++i)</div><div class='ctx'> 		offs += snprintf(bf + offs, bf_size - offs, "%02x", build_id-&gt;data[i]);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/callchain.c b/tools/perf/util/callchain.c<br/>index d7b7eef740b9..428e5350d7a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/callchain.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/callchain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/callchain.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/callchain.c</a></div><div class='hunk'>@@ -275,9 +275,13 @@ int parse_callchain_record(const char *arg, struct callchain_param *param)</div><div class='ctx'> 			if (tok) {</div><div class='ctx'> 				unsigned long size;</div><div class='ctx'> </div><div class='del'>-				size = strtoul(tok, &amp;name, 0);</div><div class='del'>-				if (size &lt; (unsigned) sysctl__max_stack())</div><div class='del'>-					param-&gt;max_stack = size;</div><div class='add'>+				if (!strncmp(tok, "defer", sizeof("defer"))) {</div><div class='add'>+					param-&gt;defer = true;</div><div class='add'>+				} else {</div><div class='add'>+					size = strtoul(tok, &amp;name, 0);</div><div class='add'>+					if (size &lt; (unsigned) sysctl__max_stack())</div><div class='add'>+						param-&gt;max_stack = size;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -314,6 +318,12 @@ int parse_callchain_record(const char *arg, struct callchain_param *param)</div><div class='ctx'> 	} while (0);</div><div class='ctx'> </div><div class='ctx'> 	free(buf);</div><div class='add'>+</div><div class='add'>+	if (param-&gt;defer &amp;&amp; param-&gt;record_mode != CALLCHAIN_FP) {</div><div class='add'>+		pr_err("callchain: deferred callchain only works with FP\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1828,3 +1838,38 @@ int sample__for_each_callchain_node(struct thread *thread, struct evsel *evsel,</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function merges earlier samples (@sample_orig) waiting for deferred</div><div class='add'>+ * user callchains with the matching callchain record (@sample_callchain)</div><div class='add'>+ * which is delivered now.  The @sample_orig-&gt;callchain should be released</div><div class='add'>+ * after use if -&gt;deferred_callchain is set.</div><div class='add'>+ */</div><div class='add'>+int sample__merge_deferred_callchain(struct perf_sample *sample_orig,</div><div class='add'>+				     struct perf_sample *sample_callchain)</div><div class='add'>+{</div><div class='add'>+	u64 nr_orig = sample_orig-&gt;callchain-&gt;nr - 1;</div><div class='add'>+	u64 nr_deferred = sample_callchain-&gt;callchain-&gt;nr;</div><div class='add'>+	struct ip_callchain *callchain;</div><div class='add'>+</div><div class='add'>+	if (sample_orig-&gt;callchain-&gt;nr &lt; 2) {</div><div class='add'>+		sample_orig-&gt;deferred_callchain = false;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	callchain = calloc(1 + nr_orig + nr_deferred, sizeof(u64));</div><div class='add'>+	if (callchain == NULL) {</div><div class='add'>+		sample_orig-&gt;deferred_callchain = false;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	callchain-&gt;nr = nr_orig + nr_deferred;</div><div class='add'>+	/* copy original including PERF_CONTEXT_USER_DEFERRED (but the cookie) */</div><div class='add'>+	memcpy(callchain-&gt;ips, sample_orig-&gt;callchain-&gt;ips, nr_orig * sizeof(u64));</div><div class='add'>+	/* copy deferred user callchains */</div><div class='add'>+	memcpy(&amp;callchain-&gt;ips[nr_orig], sample_callchain-&gt;callchain-&gt;ips,</div><div class='add'>+	       nr_deferred * sizeof(u64));</div><div class='add'>+</div><div class='add'>+	sample_orig-&gt;callchain = callchain;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/callchain.h b/tools/perf/util/callchain.h<br/>index 86ed9e4d04f9..2a52af8c80ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/callchain.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/callchain.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/callchain.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/callchain.h</a></div><div class='hunk'>@@ -98,6 +98,7 @@ extern bool dwarf_callchain_users;</div><div class='ctx'> </div><div class='ctx'> struct callchain_param {</div><div class='ctx'> 	bool			enabled;</div><div class='add'>+	bool			defer;</div><div class='ctx'> 	enum perf_call_graph_mode record_mode;</div><div class='ctx'> 	u32			dump_size;</div><div class='ctx'> 	enum chain_mode 	mode;</div><div class='hunk'>@@ -317,4 +318,7 @@ int sample__for_each_callchain_node(struct thread *thread, struct evsel *evsel,</div><div class='ctx'> 				    struct perf_sample *sample, int max_stack,</div><div class='ctx'> 				    bool symbols, callchain_iter_fn cb, void *data);</div><div class='ctx'> </div><div class='add'>+int sample__merge_deferred_callchain(struct perf_sample *sample_orig,</div><div class='add'>+				     struct perf_sample *sample_callchain);</div><div class='add'>+</div><div class='ctx'> #endif	/* __PERF_CALLCHAIN_H */</div><div class='head'>diff --git a/tools/perf/util/capstone.c b/tools/perf/util/capstone.c<br/>new file mode 100644<br/>index 000000000000..be5fd44b1f9d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/capstone.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/capstone.c</a></div><div class='hunk'>@@ -0,0 +1,471 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "capstone.h"</div><div class='add'>+#include "annotate.h"</div><div class='add'>+#include "addr_location.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "disasm.h"</div><div class='add'>+#include "dso.h"</div><div class='add'>+#include "machine.h"</div><div class='add'>+#include "map.h"</div><div class='add'>+#include "namespaces.h"</div><div class='add'>+#include "print_insn.h"</div><div class='add'>+#include "symbol.h"</div><div class='add'>+#include "thread.h"</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+#include &lt;capstone/capstone.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+static int capstone_init(struct machine *machine, csh *cs_handle, bool is64,</div><div class='add'>+			 bool disassembler_style)</div><div class='add'>+{</div><div class='add'>+	cs_arch arch;</div><div class='add'>+	cs_mode mode;</div><div class='add'>+</div><div class='add'>+	if (machine__is(machine, "x86_64") &amp;&amp; is64) {</div><div class='add'>+		arch = CS_ARCH_X86;</div><div class='add'>+		mode = CS_MODE_64;</div><div class='add'>+	} else if (machine__normalized_is(machine, "x86")) {</div><div class='add'>+		arch = CS_ARCH_X86;</div><div class='add'>+		mode = CS_MODE_32;</div><div class='add'>+	} else if (machine__normalized_is(machine, "arm64")) {</div><div class='add'>+		arch = CS_ARCH_ARM64;</div><div class='add'>+		mode = CS_MODE_ARM;</div><div class='add'>+	} else if (machine__normalized_is(machine, "arm")) {</div><div class='add'>+		arch = CS_ARCH_ARM;</div><div class='add'>+		mode = CS_MODE_ARM + CS_MODE_V8;</div><div class='add'>+	} else if (machine__normalized_is(machine, "s390")) {</div><div class='add'>+		arch = CS_ARCH_SYSZ;</div><div class='add'>+		mode = CS_MODE_BIG_ENDIAN;</div><div class='add'>+	} else {</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cs_open(arch, mode, cs_handle) != CS_ERR_OK) {</div><div class='add'>+		pr_warning_once("cs_open failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (machine__normalized_is(machine, "x86")) {</div><div class='add'>+		/*</div><div class='add'>+		 * In case of using capstone_init while symbol__disassemble</div><div class='add'>+		 * setting CS_OPT_SYNTAX_ATT depends if disassembler_style opts</div><div class='add'>+		 * is set via annotation args</div><div class='add'>+		 */</div><div class='add'>+		if (disassembler_style)</div><div class='add'>+			cs_option(*cs_handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);</div><div class='add'>+		/*</div><div class='add'>+		 * Resolving address operands to symbols is implemented</div><div class='add'>+		 * on x86 by investigating instruction details.</div><div class='add'>+		 */</div><div class='add'>+		cs_option(*cs_handle, CS_OPT_DETAIL, CS_OPT_ON);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+static size_t print_insn_x86(struct thread *thread, u8 cpumode, cs_insn *insn,</div><div class='add'>+			     int print_opts, FILE *fp)</div><div class='add'>+{</div><div class='add'>+	struct addr_location al;</div><div class='add'>+	size_t printed = 0;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;detail &amp;&amp; insn-&gt;detail-&gt;x86.op_count == 1) {</div><div class='add'>+		cs_x86_op *op = &amp;insn-&gt;detail-&gt;x86.operands[0];</div><div class='add'>+</div><div class='add'>+		addr_location__init(&amp;al);</div><div class='add'>+		if (op-&gt;type == X86_OP_IMM &amp;&amp;</div><div class='add'>+		    thread__find_symbol(thread, cpumode, op-&gt;imm, &amp;al)) {</div><div class='add'>+			printed += fprintf(fp, "%s ", insn[0].mnemonic);</div><div class='add'>+			printed += symbol__fprintf_symname_offs(al.sym, &amp;al, fp);</div><div class='add'>+			if (print_opts &amp; PRINT_INSN_IMM_HEX)</div><div class='add'>+				printed += fprintf(fp, " [%#" PRIx64 "]", op-&gt;imm);</div><div class='add'>+			addr_location__exit(&amp;al);</div><div class='add'>+			return printed;</div><div class='add'>+		}</div><div class='add'>+		addr_location__exit(&amp;al);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	printed += fprintf(fp, "%s %s", insn[0].mnemonic, insn[0].op_str);</div><div class='add'>+	return printed;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+ssize_t capstone__fprintf_insn_asm(struct machine *machine __maybe_unused,</div><div class='add'>+				   struct thread *thread __maybe_unused,</div><div class='add'>+				   u8 cpumode __maybe_unused, bool is64bit __maybe_unused,</div><div class='add'>+				   const uint8_t *code __maybe_unused,</div><div class='add'>+				   size_t code_size __maybe_unused,</div><div class='add'>+				   uint64_t ip __maybe_unused, int *lenp __maybe_unused,</div><div class='add'>+				   int print_opts __maybe_unused, FILE *fp __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+	size_t printed;</div><div class='add'>+	cs_insn *insn;</div><div class='add'>+	csh cs_handle;</div><div class='add'>+	size_t count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* TODO: Try to initiate capstone only once but need a proper place. */</div><div class='add'>+	ret = capstone_init(machine, &amp;cs_handle, is64bit, true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	count = cs_disasm(cs_handle, code, code_size, ip, 1, &amp;insn);</div><div class='add'>+	if (count &gt; 0) {</div><div class='add'>+		if (machine__normalized_is(machine, "x86"))</div><div class='add'>+			printed = print_insn_x86(thread, cpumode, &amp;insn[0], print_opts, fp);</div><div class='add'>+		else</div><div class='add'>+			printed = fprintf(fp, "%s %s", insn[0].mnemonic, insn[0].op_str);</div><div class='add'>+		if (lenp)</div><div class='add'>+			*lenp = insn-&gt;size;</div><div class='add'>+		cs_free(insn, count);</div><div class='add'>+	} else {</div><div class='add'>+		printed = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cs_close(&amp;cs_handle);</div><div class='add'>+	return printed;</div><div class='add'>+#else</div><div class='add'>+	return -1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+static void print_capstone_detail(cs_insn *insn, char *buf, size_t len,</div><div class='add'>+				  struct annotate_args *args, u64 addr)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct map *map = args-&gt;ms.map;</div><div class='add'>+	struct symbol *sym;</div><div class='add'>+</div><div class='add'>+	/* TODO: support more architectures */</div><div class='add'>+	if (!arch__is(args-&gt;arch, "x86"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;detail == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; insn-&gt;detail-&gt;x86.op_count; i++) {</div><div class='add'>+		cs_x86_op *op = &amp;insn-&gt;detail-&gt;x86.operands[i];</div><div class='add'>+		u64 orig_addr;</div><div class='add'>+</div><div class='add'>+		if (op-&gt;type != X86_OP_MEM)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* only print RIP-based global symbols for now */</div><div class='add'>+		if (op-&gt;mem.base != X86_REG_RIP)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* get the target address */</div><div class='add'>+		orig_addr = addr + insn-&gt;size + op-&gt;mem.disp;</div><div class='add'>+		addr = map__objdump_2mem(map, orig_addr);</div><div class='add'>+</div><div class='add'>+		if (dso__kernel(map__dso(map))) {</div><div class='add'>+			/*</div><div class='add'>+			 * The kernel maps can be split into sections, let's</div><div class='add'>+			 * find the map first and the search the symbol.</div><div class='add'>+			 */</div><div class='add'>+			map = maps__find(map__kmaps(map), addr);</div><div class='add'>+			if (map == NULL)</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* convert it to map-relative address for search */</div><div class='add'>+		addr = map__map_ip(map, addr);</div><div class='add'>+</div><div class='add'>+		sym = map__find_symbol(map, addr);</div><div class='add'>+		if (sym == NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (addr == sym-&gt;start) {</div><div class='add'>+			scnprintf(buf, len, "\t# %"PRIx64" &lt;%s&gt;",</div><div class='add'>+				  orig_addr, sym-&gt;name);</div><div class='add'>+		} else {</div><div class='add'>+			scnprintf(buf, len, "\t# %"PRIx64" &lt;%s+%#"PRIx64"&gt;",</div><div class='add'>+				  orig_addr, sym-&gt;name, addr - sym-&gt;start);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+struct find_file_offset_data {</div><div class='add'>+	u64 ip;</div><div class='add'>+	u64 offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This will be called for each PHDR in an ELF binary */</div><div class='add'>+static int find_file_offset(u64 start, u64 len, u64 pgoff, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct find_file_offset_data *data = arg;</div><div class='add'>+</div><div class='add'>+	if (start &lt;= data-&gt;ip &amp;&amp; data-&gt;ip &lt; start + len) {</div><div class='add'>+		data-&gt;offset = pgoff + data-&gt;ip - start;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_capstone(const char *filename __maybe_unused,</div><div class='add'>+				 struct symbol *sym __maybe_unused,</div><div class='add'>+				 struct annotate_args *args __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+	struct annotation *notes = symbol__annotation(sym);</div><div class='add'>+	struct map *map = args-&gt;ms.map;</div><div class='add'>+	struct dso *dso = map__dso(map);</div><div class='add'>+	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='add'>+	u64 offset;</div><div class='add'>+	int i, count, free_count;</div><div class='add'>+	bool is_64bit = false;</div><div class='add'>+	bool needs_cs_close = false;</div><div class='add'>+	/* Malloc-ed buffer containing instructions read from disk. */</div><div class='add'>+	u8 *code_buf = NULL;</div><div class='add'>+	/* Pointer to code to be disassembled. */</div><div class='add'>+	const u8 *buf;</div><div class='add'>+	u64 buf_len;</div><div class='add'>+	csh handle;</div><div class='add'>+	cs_insn *insn = NULL;</div><div class='add'>+	char disasm_buf[512];</div><div class='add'>+	struct disasm_line *dl;</div><div class='add'>+	bool disassembler_style = false;</div><div class='add'>+</div><div class='add'>+	if (args-&gt;options-&gt;objdump_path)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	buf = dso__read_symbol(dso, filename, map, sym,</div><div class='add'>+			       &amp;code_buf, &amp;buf_len, &amp;is_64bit);</div><div class='add'>+	if (buf == NULL)</div><div class='add'>+		return errno;</div><div class='add'>+</div><div class='add'>+	/* add the function address and name */</div><div class='add'>+	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='add'>+		  start, sym-&gt;name);</div><div class='add'>+</div><div class='add'>+	args-&gt;offset = -1;</div><div class='add'>+	args-&gt;line = disasm_buf;</div><div class='add'>+	args-&gt;line_nr = 0;</div><div class='add'>+	args-&gt;fileloc = NULL;</div><div class='add'>+	args-&gt;ms.sym = sym;</div><div class='add'>+</div><div class='add'>+	dl = disasm_line__new(args);</div><div class='add'>+	if (dl == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+	if (!args-&gt;options-&gt;disassembler_style ||</div><div class='add'>+	    !strcmp(args-&gt;options-&gt;disassembler_style, "att"))</div><div class='add'>+		disassembler_style = true;</div><div class='add'>+</div><div class='add'>+	if (capstone_init(maps__machine(args-&gt;ms.maps), &amp;handle, is_64bit, disassembler_style) &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	needs_cs_close = true;</div><div class='add'>+</div><div class='add'>+	free_count = count = cs_disasm(handle, buf, buf_len, start, buf_len, &amp;insn);</div><div class='add'>+	for (i = 0, offset = 0; i &lt; count; i++) {</div><div class='add'>+		int printed;</div><div class='add'>+</div><div class='add'>+		printed = scnprintf(disasm_buf, sizeof(disasm_buf),</div><div class='add'>+				    "       %-7s %s",</div><div class='add'>+				    insn[i].mnemonic, insn[i].op_str);</div><div class='add'>+		print_capstone_detail(&amp;insn[i], disasm_buf + printed,</div><div class='add'>+				      sizeof(disasm_buf) - printed, args,</div><div class='add'>+				      start + offset);</div><div class='add'>+</div><div class='add'>+		args-&gt;offset = offset;</div><div class='add'>+		args-&gt;line = disasm_buf;</div><div class='add'>+</div><div class='add'>+		dl = disasm_line__new(args);</div><div class='add'>+		if (dl == NULL)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+		offset += insn[i].size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* It failed in the middle: probably due to unknown instructions */</div><div class='add'>+	if (offset != buf_len) {</div><div class='add'>+		struct list_head *list = &amp;notes-&gt;src-&gt;source;</div><div class='add'>+</div><div class='add'>+		/* Discard all lines and fallback to objdump */</div><div class='add'>+		while (!list_empty(list)) {</div><div class='add'>+			dl = list_first_entry(list, struct disasm_line, al.node);</div><div class='add'>+</div><div class='add'>+			list_del_init(&amp;dl-&gt;al.node);</div><div class='add'>+			disasm_line__free(dl);</div><div class='add'>+		}</div><div class='add'>+		count = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (needs_cs_close) {</div><div class='add'>+		cs_close(&amp;handle);</div><div class='add'>+		if (free_count &gt; 0)</div><div class='add'>+			cs_free(insn, free_count);</div><div class='add'>+	}</div><div class='add'>+	free(code_buf);</div><div class='add'>+	return count &lt; 0 ? count : 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (needs_cs_close) {</div><div class='add'>+		struct disasm_line *tmp;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * It probably failed in the middle of the above loop.</div><div class='add'>+		 * Release any resources it might add.</div><div class='add'>+		 */</div><div class='add'>+		list_for_each_entry_safe(dl, tmp, &amp;notes-&gt;src-&gt;source, al.node) {</div><div class='add'>+			list_del(&amp;dl-&gt;al.node);</div><div class='add'>+			disasm_line__free(dl);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	count = -1;</div><div class='add'>+	goto out;</div><div class='add'>+#else</div><div class='add'>+	return -1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_capstone_powerpc(const char *filename __maybe_unused,</div><div class='add'>+					 struct symbol *sym __maybe_unused,</div><div class='add'>+					 struct annotate_args *args __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='add'>+	struct annotation *notes = symbol__annotation(sym);</div><div class='add'>+	struct map *map = args-&gt;ms.map;</div><div class='add'>+	struct dso *dso = map__dso(map);</div><div class='add'>+	struct nscookie nsc;</div><div class='add'>+	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='add'>+	u64 end = map__rip_2objdump(map, sym-&gt;end);</div><div class='add'>+	u64 len = end - start;</div><div class='add'>+	u64 offset;</div><div class='add'>+	int i, fd, count;</div><div class='add'>+	bool is_64bit = false;</div><div class='add'>+	bool needs_cs_close = false;</div><div class='add'>+	u8 *buf = NULL;</div><div class='add'>+	struct find_file_offset_data data = {</div><div class='add'>+		.ip = start,</div><div class='add'>+	};</div><div class='add'>+	csh handle;</div><div class='add'>+	char disasm_buf[512];</div><div class='add'>+	struct disasm_line *dl;</div><div class='add'>+	u32 *line;</div><div class='add'>+	bool disassembler_style = false;</div><div class='add'>+</div><div class='add'>+	if (args-&gt;options-&gt;objdump_path)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	nsinfo__mountns_enter(dso__nsinfo(dso), &amp;nsc);</div><div class='add'>+	fd = open(filename, O_RDONLY);</div><div class='add'>+	nsinfo__mountns_exit(&amp;nsc);</div><div class='add'>+	if (fd &lt; 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (file__read_maps(fd, /*exe=*/true, find_file_offset, &amp;data,</div><div class='add'>+			    &amp;is_64bit) == 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (!args-&gt;options-&gt;disassembler_style ||</div><div class='add'>+	    !strcmp(args-&gt;options-&gt;disassembler_style, "att"))</div><div class='add'>+		disassembler_style = true;</div><div class='add'>+</div><div class='add'>+	if (capstone_init(maps__machine(args-&gt;ms.maps), &amp;handle, is_64bit, disassembler_style) &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	needs_cs_close = true;</div><div class='add'>+</div><div class='add'>+	buf = malloc(len);</div><div class='add'>+	if (buf == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	count = pread(fd, buf, len, data.offset);</div><div class='add'>+	close(fd);</div><div class='add'>+	fd = -1;</div><div class='add'>+</div><div class='add'>+	if ((u64)count != len)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	line = (u32 *)buf;</div><div class='add'>+</div><div class='add'>+	/* add the function address and name */</div><div class='add'>+	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='add'>+		  start, sym-&gt;name);</div><div class='add'>+</div><div class='add'>+	args-&gt;offset = -1;</div><div class='add'>+	args-&gt;line = disasm_buf;</div><div class='add'>+	args-&gt;line_nr = 0;</div><div class='add'>+	args-&gt;fileloc = NULL;</div><div class='add'>+	args-&gt;ms.sym = sym;</div><div class='add'>+</div><div class='add'>+	dl = disasm_line__new(args);</div><div class='add'>+	if (dl == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: enable disassm for powerpc</div><div class='add'>+	 * count = cs_disasm(handle, buf, len, start, len, &amp;insn);</div><div class='add'>+	 *</div><div class='add'>+	 * For now, only binary code is saved in disassembled line</div><div class='add'>+	 * to be used in "type" and "typeoff" sort keys. Each raw code</div><div class='add'>+	 * is 32 bit instruction. So use "len/4" to get the number of</div><div class='add'>+	 * entries.</div><div class='add'>+	 */</div><div class='add'>+	count = len/4;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 0; i &lt; count; i++) {</div><div class='add'>+		args-&gt;offset = offset;</div><div class='add'>+		sprintf(args-&gt;line, "%x", line[i]);</div><div class='add'>+</div><div class='add'>+		dl = disasm_line__new(args);</div><div class='add'>+		if (dl == NULL)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+		offset += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* It failed in the middle */</div><div class='add'>+	if (offset != len) {</div><div class='add'>+		struct list_head *list = &amp;notes-&gt;src-&gt;source;</div><div class='add'>+</div><div class='add'>+		/* Discard all lines and fallback to objdump */</div><div class='add'>+		while (!list_empty(list)) {</div><div class='add'>+			dl = list_first_entry(list, struct disasm_line, al.node);</div><div class='add'>+</div><div class='add'>+			list_del_init(&amp;dl-&gt;al.node);</div><div class='add'>+			disasm_line__free(dl);</div><div class='add'>+		}</div><div class='add'>+		count = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (needs_cs_close)</div><div class='add'>+		cs_close(&amp;handle);</div><div class='add'>+	free(buf);</div><div class='add'>+	return count &lt; 0 ? count : 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (fd &gt;= 0)</div><div class='add'>+		close(fd);</div><div class='add'>+	count = -1;</div><div class='add'>+	goto out;</div><div class='add'>+#else</div><div class='add'>+	return -1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/capstone.h b/tools/perf/util/capstone.h<br/>new file mode 100644<br/>index 000000000000..0f030ea034b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/capstone.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/capstone.h</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __PERF_CAPSTONE_H</div><div class='add'>+#define __PERF_CAPSTONE_H</div><div class='add'>+</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stdint.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct annotate_args;</div><div class='add'>+struct machine;</div><div class='add'>+struct symbol;</div><div class='add'>+struct thread;</div><div class='add'>+</div><div class='add'>+ssize_t capstone__fprintf_insn_asm(struct machine *machine, struct thread *thread, u8 cpumode,</div><div class='add'>+				   bool is64bit, const uint8_t *code, size_t code_size,</div><div class='add'>+				   uint64_t ip, int *lenp, int print_opts, FILE *fp);</div><div class='add'>+int symbol__disassemble_capstone(const char *filename, struct symbol *sym,</div><div class='add'>+				 struct annotate_args *args);</div><div class='add'>+int symbol__disassemble_capstone_powerpc(const char *filename, struct symbol *sym,</div><div class='add'>+					 struct annotate_args *args);</div><div class='add'>+</div><div class='add'>+#endif /* __PERF_CAPSTONE_H */</div><div class='head'>diff --git a/tools/perf/util/cgroup.c b/tools/perf/util/cgroup.c<br/>index 25e2769b5e74..040eb75f0804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cgroup.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cgroup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cgroup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/cgroup.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;sys/statfs.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='head'>diff --git a/tools/perf/util/config.c b/tools/perf/util/config.c<br/>index ae72b66b6ded..e0219bc6330a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/config.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/config.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include "util/hist.h"  /* perf_hist_config */</div><div class='ctx'> #include "util/stat.h"  /* perf_stat__set_big_num */</div><div class='ctx'> #include "util/evsel.h"  /* evsel__hw_names, evsel__use_bpf_counters */</div><div class='del'>-#include "util/srcline.h"  /* addr2line_timeout_ms */</div><div class='add'>+#include "util/addr2line.h"  /* addr2line_timeout_ms */</div><div class='ctx'> #include "build-id.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "config.h"</div><div class='hunk'>@@ -37,6 +37,8 @@</div><div class='ctx'> </div><div class='ctx'> #define METRIC_ONLY_LEN 20</div><div class='ctx'> </div><div class='add'>+static struct stats walltime_nsecs_stats;</div><div class='add'>+</div><div class='ctx'> struct perf_stat_config stat_config = {</div><div class='ctx'> 	.aggr_mode		= AGGR_GLOBAL,</div><div class='ctx'> 	.aggr_level		= MAX_CACHE_LVL + 1,</div><div class='hunk'>@@ -45,7 +47,6 @@ struct perf_stat_config stat_config = {</div><div class='ctx'> 	.run_count		= 1,</div><div class='ctx'> 	.metric_only_len	= METRIC_ONLY_LEN,</div><div class='ctx'> 	.walltime_nsecs_stats	= &amp;walltime_nsecs_stats,</div><div class='del'>-	.ru_stats		= &amp;ru_stats,</div><div class='ctx'> 	.big_num		= true,</div><div class='ctx'> 	.ctl_fd			= -1,</div><div class='ctx'> 	.ctl_fd_ack		= -1,</div><div class='head'>diff --git a/tools/perf/util/cpumap.c b/tools/perf/util/cpumap.c<br/>index 89570397a4b3..a80845038a5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cpumap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cpumap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cpumap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/cpumap.c</a></div><div class='hunk'>@@ -684,16 +684,21 @@ size_t cpu_map__snprint_mask(struct perf_cpu_map *map, char *buf, size_t size)</div><div class='ctx'> 	unsigned char *bitmap;</div><div class='ctx'> 	struct perf_cpu c, last_cpu = perf_cpu_map__max(map);</div><div class='ctx'> </div><div class='del'>-	if (buf == NULL)</div><div class='add'>+	if (buf == NULL || size == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (last_cpu.cpu &lt; 0) {</div><div class='add'>+		buf[0] = '\0';</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bitmap = zalloc(last_cpu.cpu / 8 + 1);</div><div class='ctx'> 	if (bitmap == NULL) {</div><div class='ctx'> 		buf[0] = '\0';</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	perf_cpu_map__for_each_cpu(c, idx, map)</div><div class='add'>+	perf_cpu_map__for_each_cpu_skip_any(c, idx, map)</div><div class='ctx'> 		bitmap[c.cpu / 8] |= 1 &lt;&lt; (c.cpu % 8);</div><div class='ctx'> </div><div class='ctx'> 	for (int cpu = last_cpu.cpu / 4 * 4; cpu &gt;= 0; cpu -= 4) {</div><div class='head'>diff --git a/tools/perf/util/cs-etm-decoder/Build b/tools/perf/util/cs-etm-decoder/Build<br/>index 056d665f7f88..27550db2aa4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm-decoder/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm-decoder/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm-decoder/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/cs-etm-decoder/Build</a></div><div class='hunk'>@@ -1 +1 @@</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += cs-etm-decoder.o</div><div class='add'>+perf-util-y += cs-etm-decoder.o</div><div class='head'>diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c<br/>index b85a8837bddc..3050fe212666 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm-decoder/cs-etm-decoder.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/cs-etm-decoder/cs-etm-decoder.c</a></div><div class='hunk'>@@ -588,6 +588,7 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer(</div><div class='ctx'> 				const ocsd_generic_trace_elem *elem)</div><div class='ctx'> {</div><div class='ctx'> 	ocsd_datapath_resp_t resp = OCSD_RESP_CONT;</div><div class='add'>+	ocsd_gen_trc_elem_t type;</div><div class='ctx'> 	struct cs_etm_decoder *decoder = (struct cs_etm_decoder *) context;</div><div class='ctx'> 	struct cs_etm_queue *etmq = decoder-&gt;data;</div><div class='ctx'> 	struct cs_etm_packet_queue *packet_queue;</div><div class='hunk'>@@ -597,52 +598,29 @@ static ocsd_datapath_resp_t cs_etm_decoder__gen_trace_elem_printer(</div><div class='ctx'> 	if (!packet_queue)</div><div class='ctx'> 		return OCSD_RESP_FATAL_SYS_ERR;</div><div class='ctx'> </div><div class='del'>-	switch (elem-&gt;elem_type) {</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_UNKNOWN:</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_EO_TRACE:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_NO_SYNC:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_TRACE_ON:</div><div class='add'>+	type = elem-&gt;elem_type;</div><div class='add'>+</div><div class='add'>+	if (type == OCSD_GEN_TRC_ELEM_EO_TRACE ||</div><div class='add'>+	    type == OCSD_GEN_TRC_ELEM_NO_SYNC ||</div><div class='add'>+	    type == OCSD_GEN_TRC_ELEM_TRACE_ON)</div><div class='ctx'> 		resp = cs_etm_decoder__buffer_discontinuity(etmq, packet_queue,</div><div class='ctx'> 							    trace_chan_id);</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_INSTR_RANGE:</div><div class='add'>+	else if (type == OCSD_GEN_TRC_ELEM_INSTR_RANGE)</div><div class='ctx'> 		resp = cs_etm_decoder__buffer_range(etmq, packet_queue, elem,</div><div class='ctx'> 						    trace_chan_id);</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_EXCEPTION:</div><div class='add'>+	else if (type == OCSD_GEN_TRC_ELEM_EXCEPTION)</div><div class='ctx'> 		resp = cs_etm_decoder__buffer_exception(etmq, packet_queue, elem,</div><div class='ctx'> 							trace_chan_id);</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_EXCEPTION_RET:</div><div class='add'>+	else if (type == OCSD_GEN_TRC_ELEM_EXCEPTION_RET)</div><div class='ctx'> 		resp = cs_etm_decoder__buffer_exception_ret(etmq, packet_queue,</div><div class='ctx'> 							    trace_chan_id);</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_TIMESTAMP:</div><div class='add'>+	else if (type == OCSD_GEN_TRC_ELEM_TIMESTAMP)</div><div class='ctx'> 		resp = cs_etm_decoder__do_hard_timestamp(etmq, elem,</div><div class='ctx'> 							 trace_chan_id,</div><div class='ctx'> 							 indx);</div><div class='del'>-		break;</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_PE_CONTEXT:</div><div class='add'>+	else if (type == OCSD_GEN_TRC_ELEM_PE_CONTEXT)</div><div class='ctx'> 		resp = cs_etm_decoder__set_tid(etmq, packet_queue,</div><div class='ctx'> 					       elem, trace_chan_id);</div><div class='del'>-		break;</div><div class='del'>-	/* Unused packet types */</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_I_RANGE_NOPATH:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_ADDR_NACC:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_CYCLE_COUNT:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_ADDR_UNKNOWN:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_EVENT:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_SWTRACE:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_CUSTOM:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_SYNC_MARKER:</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_MEMTRANS:</div><div class='del'>-#if (OCSD_VER_NUM &gt;= 0x010400)</div><div class='del'>-	case OCSD_GEN_TRC_ELEM_INSTRUMENTATION:</div><div class='del'>-#endif</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return resp;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c<br/>index 30f4bb3e7fa3..25d56e0f1c07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/cs-etm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/cs-etm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/cs-etm.c</a></div><div class='hunk'>@@ -777,7 +777,7 @@ static void cs_etm__packet_dump(const char *pkt_string, void *data)</div><div class='ctx'> 	char queue_nr[64];</div><div class='ctx'> </div><div class='ctx'> 	if (verbose)</div><div class='del'>-		snprintf(queue_nr, sizeof(queue_nr), "Qnr:%d; ", etmq-&gt;queue_nr);</div><div class='add'>+		snprintf(queue_nr, sizeof(queue_nr), "Qnr:%u; ", etmq-&gt;queue_nr);</div><div class='ctx'> 	else</div><div class='ctx'> 		queue_nr[0] = '\0';</div><div class='ctx'> </div><div class='hunk'>@@ -1726,10 +1726,7 @@ static int cs_etm__synth_events(struct cs_etm_auxtrace *etm,</div><div class='ctx'> 	attr.read_format = evsel-&gt;core.attr.read_format;</div><div class='ctx'> </div><div class='ctx'> 	/* create new id val to be a fixed offset from evsel id */</div><div class='del'>-	id = evsel-&gt;core.id[0] + 1000000000;</div><div class='del'>-</div><div class='del'>-	if (!id)</div><div class='del'>-		id = 1;</div><div class='add'>+	id = auxtrace_synth_id_range_start(evsel);</div><div class='ctx'> </div><div class='ctx'> 	if (etm-&gt;synth_opts.branches) {</div><div class='ctx'> 		attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;</div><div class='head'>diff --git a/tools/perf/util/debuginfo.c b/tools/perf/util/debuginfo.c<br/>index a44c70f93156..4a559b3e8cdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/debuginfo.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/debuginfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/debuginfo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/debuginfo.c</a></div><div class='hunk'>@@ -110,8 +110,12 @@ struct debuginfo *debuginfo__new(const char *path)</div><div class='ctx'> 	if (!dso)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Set the build id for DSO_BINARY_TYPE__BUILDID_DEBUGINFO */</div><div class='del'>-	if (is_regular_file(path) &amp;&amp; filename__read_build_id(path, &amp;bid) &gt; 0)</div><div class='add'>+	/*</div><div class='add'>+	 * Set the build id for DSO_BINARY_TYPE__BUILDID_DEBUGINFO. Don't block</div><div class='add'>+	 * incase the path isn't for a regular file.</div><div class='add'>+	 */</div><div class='add'>+	assert(!dso__has_build_id(dso));</div><div class='add'>+	if (filename__read_build_id(path, &amp;bid) &gt; 0)</div><div class='ctx'> 		dso__set_build_id(dso, &amp;bid);</div><div class='ctx'> </div><div class='ctx'> 	for (type = distro_dwarf_types;</div><div class='head'>diff --git a/tools/perf/util/disasm.c b/tools/perf/util/disasm.c<br/>index b1e4919d016f..50b9433f3f8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/disasm.c</a></div><div class='hunk'>@@ -14,13 +14,15 @@</div><div class='ctx'> #include "annotate.h"</div><div class='ctx'> #include "annotate-data.h"</div><div class='ctx'> #include "build-id.h"</div><div class='add'>+#include "capstone.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "disasm.h"</div><div class='del'>-#include "disasm_bpf.h"</div><div class='ctx'> #include "dso.h"</div><div class='ctx'> #include "dwarf-regs.h"</div><div class='ctx'> #include "env.h"</div><div class='ctx'> #include "evsel.h"</div><div class='add'>+#include "libbfd.h"</div><div class='add'>+#include "llvm.h"</div><div class='ctx'> #include "map.h"</div><div class='ctx'> #include "maps.h"</div><div class='ctx'> #include "namespaces.h"</div><div class='hunk'>@@ -49,7 +51,6 @@ static int call__scnprintf(struct ins *ins, char *bf, size_t size,</div><div class='ctx'> static void ins__sort(struct arch *arch);</div><div class='ctx'> static int disasm_line__parse(char *line, const char **namep, char **rawp);</div><div class='ctx'> static int disasm_line__parse_powerpc(struct disasm_line *dl, struct annotate_args *args);</div><div class='del'>-static char *expand_tabs(char *line, char **storage, size_t *storage_len);</div><div class='ctx'> </div><div class='ctx'> static __attribute__((constructor)) void symbol__init_regexpr(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -246,8 +247,8 @@ static int ins__raw_scnprintf(struct ins *ins, char *bf, size_t size,</div><div class='ctx'> 	return scnprintf(bf, size, "%-*s %s", max_ins_name, ins-&gt;name, ops-&gt;raw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ins__scnprintf(struct ins *ins, char *bf, size_t size,</div><div class='del'>-		   struct ins_operands *ops, int max_ins_name)</div><div class='add'>+static int ins__scnprintf(struct ins *ins, char *bf, size_t size,</div><div class='add'>+			  struct ins_operands *ops, int max_ins_name)</div><div class='ctx'> {</div><div class='ctx'> 	if (ins-&gt;ops-&gt;scnprintf)</div><div class='ctx'> 		return ins-&gt;ops-&gt;scnprintf(ins, bf, size, ops, max_ins_name);</div><div class='hunk'>@@ -390,13 +391,16 @@ static int jump__parse(struct arch *arch, struct ins_operands *ops, struct map_s</div><div class='ctx'> 	 * skip over possible up to 2 operands to get to address, e.g.:</div><div class='ctx'> 	 * tbnz	 w0, #26, ffff0000083cd190 &lt;security_file_permission+0xd0&gt;</div><div class='ctx'> 	 */</div><div class='del'>-	if (c++ != NULL) {</div><div class='add'>+	if (c != NULL) {</div><div class='add'>+		c++;</div><div class='ctx'> 		ops-&gt;target.addr = strtoull(c, NULL, 16);</div><div class='ctx'> 		if (!ops-&gt;target.addr) {</div><div class='ctx'> 			c = strchr(c, ',');</div><div class='ctx'> 			c = validate_comma(c, ops);</div><div class='del'>-			if (c++ != NULL)</div><div class='add'>+			if (c != NULL) {</div><div class='add'>+				c++;</div><div class='ctx'> 				ops-&gt;target.addr = strtoull(c, NULL, 16);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ops-&gt;target.addr = strtoull(ops-&gt;raw, NULL, 16);</div><div class='hunk'>@@ -824,7 +828,7 @@ static struct ins_ops ret_ops = {</div><div class='ctx'> 	.scnprintf = ins__raw_scnprintf,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-bool ins__is_nop(const struct ins *ins)</div><div class='add'>+static bool ins__is_nop(const struct ins *ins)</div><div class='ctx'> {</div><div class='ctx'> 	return ins-&gt;ops == &amp;nop_ops;</div><div class='ctx'> }</div><div class='hunk'>@@ -1330,420 +1334,6 @@ fallback:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='del'>-#include &lt;capstone/capstone.h&gt;</div><div class='del'>-</div><div class='del'>-int capstone_init(struct machine *machine, csh *cs_handle, bool is64, bool disassembler_style);</div><div class='del'>-</div><div class='del'>-static int open_capstone_handle(struct annotate_args *args, bool is_64bit,</div><div class='del'>-				csh *handle)</div><div class='del'>-{</div><div class='del'>-	struct annotation_options *opt = args-&gt;options;</div><div class='del'>-	cs_mode mode = is_64bit ? CS_MODE_64 : CS_MODE_32;</div><div class='del'>-</div><div class='del'>-	/* TODO: support more architectures */</div><div class='del'>-	if (!arch__is(args-&gt;arch, "x86"))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (cs_open(CS_ARCH_X86, mode, handle) != CS_ERR_OK)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (!opt-&gt;disassembler_style ||</div><div class='del'>-	    !strcmp(opt-&gt;disassembler_style, "att"))</div><div class='del'>-		cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Resolving address operands to symbols is implemented</div><div class='del'>-	 * on x86 by investigating instruction details.</div><div class='del'>-	 */</div><div class='del'>-	cs_option(*handle, CS_OPT_DETAIL, CS_OPT_ON);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(HAVE_LIBCAPSTONE_SUPPORT) || defined(HAVE_LIBLLVM_SUPPORT)</div><div class='del'>-struct find_file_offset_data {</div><div class='del'>-	u64 ip;</div><div class='del'>-	u64 offset;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* This will be called for each PHDR in an ELF binary */</div><div class='del'>-static int find_file_offset(u64 start, u64 len, u64 pgoff, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct find_file_offset_data *data = arg;</div><div class='del'>-</div><div class='del'>-	if (start &lt;= data-&gt;ip &amp;&amp; data-&gt;ip &lt; start + len) {</div><div class='del'>-		data-&gt;offset = pgoff + data-&gt;ip - start;</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u8 *</div><div class='del'>-read_symbol(const char *filename, struct map *map, struct symbol *sym,</div><div class='del'>-	    u64 *len, bool *is_64bit)</div><div class='del'>-{</div><div class='del'>-	struct dso *dso = map__dso(map);</div><div class='del'>-	struct nscookie nsc;</div><div class='del'>-	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='del'>-	u64 end = map__rip_2objdump(map, sym-&gt;end);</div><div class='del'>-	int fd, count;</div><div class='del'>-	u8 *buf = NULL;</div><div class='del'>-	struct find_file_offset_data data = {</div><div class='del'>-		.ip = start,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	*is_64bit = false;</div><div class='del'>-</div><div class='del'>-	nsinfo__mountns_enter(dso__nsinfo(dso), &amp;nsc);</div><div class='del'>-	fd = open(filename, O_RDONLY);</div><div class='del'>-	nsinfo__mountns_exit(&amp;nsc);</div><div class='del'>-	if (fd &lt; 0)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (file__read_maps(fd, /*exe=*/true, find_file_offset, &amp;data,</div><div class='del'>-			    is_64bit) == 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	*len = end - start;</div><div class='del'>-	buf = malloc(*len);</div><div class='del'>-	if (buf == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	count = pread(fd, buf, *len, data.offset);</div><div class='del'>-	close(fd);</div><div class='del'>-	fd = -1;</div><div class='del'>-</div><div class='del'>-	if ((u64)count != *len)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	return buf;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	if (fd &gt;= 0)</div><div class='del'>-		close(fd);</div><div class='del'>-	free(buf);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if !defined(HAVE_LIBCAPSTONE_SUPPORT) || !defined(HAVE_LIBLLVM_SUPPORT)</div><div class='del'>-static void symbol__disassembler_missing(const char *disassembler, const char *filename,</div><div class='del'>-					 struct symbol *sym)</div><div class='del'>-{</div><div class='del'>-	pr_debug("The %s disassembler isn't linked in for %s in %s\n",</div><div class='del'>-		 disassembler, sym-&gt;name, filename);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='del'>-static void print_capstone_detail(cs_insn *insn, char *buf, size_t len,</div><div class='del'>-				  struct annotate_args *args, u64 addr)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct map *map = args-&gt;ms.map;</div><div class='del'>-	struct symbol *sym;</div><div class='del'>-</div><div class='del'>-	/* TODO: support more architectures */</div><div class='del'>-	if (!arch__is(args-&gt;arch, "x86"))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (insn-&gt;detail == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; insn-&gt;detail-&gt;x86.op_count; i++) {</div><div class='del'>-		cs_x86_op *op = &amp;insn-&gt;detail-&gt;x86.operands[i];</div><div class='del'>-		u64 orig_addr;</div><div class='del'>-</div><div class='del'>-		if (op-&gt;type != X86_OP_MEM)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* only print RIP-based global symbols for now */</div><div class='del'>-		if (op-&gt;mem.base != X86_REG_RIP)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* get the target address */</div><div class='del'>-		orig_addr = addr + insn-&gt;size + op-&gt;mem.disp;</div><div class='del'>-		addr = map__objdump_2mem(map, orig_addr);</div><div class='del'>-</div><div class='del'>-		if (dso__kernel(map__dso(map))) {</div><div class='del'>-			/*</div><div class='del'>-			 * The kernel maps can be splitted into sections,</div><div class='del'>-			 * let's find the map first and the search the symbol.</div><div class='del'>-			 */</div><div class='del'>-			map = maps__find(map__kmaps(map), addr);</div><div class='del'>-			if (map == NULL)</div><div class='del'>-				continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* convert it to map-relative address for search */</div><div class='del'>-		addr = map__map_ip(map, addr);</div><div class='del'>-</div><div class='del'>-		sym = map__find_symbol(map, addr);</div><div class='del'>-		if (sym == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (addr == sym-&gt;start) {</div><div class='del'>-			scnprintf(buf, len, "\t# %"PRIx64" &lt;%s&gt;",</div><div class='del'>-				  orig_addr, sym-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			scnprintf(buf, len, "\t# %"PRIx64" &lt;%s+%#"PRIx64"&gt;",</div><div class='del'>-				  orig_addr, sym-&gt;name, addr - sym-&gt;start);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int symbol__disassemble_capstone_powerpc(char *filename, struct symbol *sym,</div><div class='del'>-					struct annotate_args *args)</div><div class='del'>-{</div><div class='del'>-	struct annotation *notes = symbol__annotation(sym);</div><div class='del'>-	struct map *map = args-&gt;ms.map;</div><div class='del'>-	struct dso *dso = map__dso(map);</div><div class='del'>-	struct nscookie nsc;</div><div class='del'>-	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='del'>-	u64 end = map__rip_2objdump(map, sym-&gt;end);</div><div class='del'>-	u64 len = end - start;</div><div class='del'>-	u64 offset;</div><div class='del'>-	int i, fd, count;</div><div class='del'>-	bool is_64bit = false;</div><div class='del'>-	bool needs_cs_close = false;</div><div class='del'>-	u8 *buf = NULL;</div><div class='del'>-	struct find_file_offset_data data = {</div><div class='del'>-		.ip = start,</div><div class='del'>-	};</div><div class='del'>-	csh handle;</div><div class='del'>-	char disasm_buf[512];</div><div class='del'>-	struct disasm_line *dl;</div><div class='del'>-	u32 *line;</div><div class='del'>-	bool disassembler_style = false;</div><div class='del'>-</div><div class='del'>-	if (args-&gt;options-&gt;objdump_path)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	nsinfo__mountns_enter(dso__nsinfo(dso), &amp;nsc);</div><div class='del'>-	fd = open(filename, O_RDONLY);</div><div class='del'>-	nsinfo__mountns_exit(&amp;nsc);</div><div class='del'>-	if (fd &lt; 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (file__read_maps(fd, /*exe=*/true, find_file_offset, &amp;data,</div><div class='del'>-			    &amp;is_64bit) == 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (!args-&gt;options-&gt;disassembler_style ||</div><div class='del'>-			!strcmp(args-&gt;options-&gt;disassembler_style, "att"))</div><div class='del'>-		disassembler_style = true;</div><div class='del'>-</div><div class='del'>-	if (capstone_init(maps__machine(args-&gt;ms.maps), &amp;handle, is_64bit, disassembler_style) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	needs_cs_close = true;</div><div class='del'>-</div><div class='del'>-	buf = malloc(len);</div><div class='del'>-	if (buf == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	count = pread(fd, buf, len, data.offset);</div><div class='del'>-	close(fd);</div><div class='del'>-	fd = -1;</div><div class='del'>-</div><div class='del'>-	if ((u64)count != len)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	line = (u32 *)buf;</div><div class='del'>-</div><div class='del'>-	/* add the function address and name */</div><div class='del'>-	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='del'>-		  start, sym-&gt;name);</div><div class='del'>-</div><div class='del'>-	args-&gt;offset = -1;</div><div class='del'>-	args-&gt;line = disasm_buf;</div><div class='del'>-	args-&gt;line_nr = 0;</div><div class='del'>-	args-&gt;fileloc = NULL;</div><div class='del'>-	args-&gt;ms.sym = sym;</div><div class='del'>-</div><div class='del'>-	dl = disasm_line__new(args);</div><div class='del'>-	if (dl == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * TODO: enable disassm for powerpc</div><div class='del'>-	 * count = cs_disasm(handle, buf, len, start, len, &amp;insn);</div><div class='del'>-	 *</div><div class='del'>-	 * For now, only binary code is saved in disassembled line</div><div class='del'>-	 * to be used in "type" and "typeoff" sort keys. Each raw code</div><div class='del'>-	 * is 32 bit instruction. So use "len/4" to get the number of</div><div class='del'>-	 * entries.</div><div class='del'>-	 */</div><div class='del'>-	count = len/4;</div><div class='del'>-</div><div class='del'>-	for (i = 0, offset = 0; i &lt; count; i++) {</div><div class='del'>-		args-&gt;offset = offset;</div><div class='del'>-		sprintf(args-&gt;line, "%x", line[i]);</div><div class='del'>-</div><div class='del'>-		dl = disasm_line__new(args);</div><div class='del'>-		if (dl == NULL)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-		offset += 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* It failed in the middle */</div><div class='del'>-	if (offset != len) {</div><div class='del'>-		struct list_head *list = &amp;notes-&gt;src-&gt;source;</div><div class='del'>-</div><div class='del'>-		/* Discard all lines and fallback to objdump */</div><div class='del'>-		while (!list_empty(list)) {</div><div class='del'>-			dl = list_first_entry(list, struct disasm_line, al.node);</div><div class='del'>-</div><div class='del'>-			list_del_init(&amp;dl-&gt;al.node);</div><div class='del'>-			disasm_line__free(dl);</div><div class='del'>-		}</div><div class='del'>-		count = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	if (needs_cs_close)</div><div class='del'>-		cs_close(&amp;handle);</div><div class='del'>-	free(buf);</div><div class='del'>-	return count &lt; 0 ? count : 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	if (fd &gt;= 0)</div><div class='del'>-		close(fd);</div><div class='del'>-	count = -1;</div><div class='del'>-	goto out;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int symbol__disassemble_capstone(char *filename, struct symbol *sym,</div><div class='del'>-					struct annotate_args *args)</div><div class='del'>-{</div><div class='del'>-	struct annotation *notes = symbol__annotation(sym);</div><div class='del'>-	struct map *map = args-&gt;ms.map;</div><div class='del'>-	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='del'>-	u64 len;</div><div class='del'>-	u64 offset;</div><div class='del'>-	int i, count, free_count;</div><div class='del'>-	bool is_64bit = false;</div><div class='del'>-	bool needs_cs_close = false;</div><div class='del'>-	u8 *buf = NULL;</div><div class='del'>-	csh handle;</div><div class='del'>-	cs_insn *insn = NULL;</div><div class='del'>-	char disasm_buf[512];</div><div class='del'>-	struct disasm_line *dl;</div><div class='del'>-</div><div class='del'>-	if (args-&gt;options-&gt;objdump_path)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	buf = read_symbol(filename, map, sym, &amp;len, &amp;is_64bit);</div><div class='del'>-	if (buf == NULL)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/* add the function address and name */</div><div class='del'>-	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='del'>-		  start, sym-&gt;name);</div><div class='del'>-</div><div class='del'>-	args-&gt;offset = -1;</div><div class='del'>-	args-&gt;line = disasm_buf;</div><div class='del'>-	args-&gt;line_nr = 0;</div><div class='del'>-	args-&gt;fileloc = NULL;</div><div class='del'>-	args-&gt;ms.sym = sym;</div><div class='del'>-</div><div class='del'>-	dl = disasm_line__new(args);</div><div class='del'>-	if (dl == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-	if (open_capstone_handle(args, is_64bit, &amp;handle) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	needs_cs_close = true;</div><div class='del'>-</div><div class='del'>-	free_count = count = cs_disasm(handle, buf, len, start, len, &amp;insn);</div><div class='del'>-	for (i = 0, offset = 0; i &lt; count; i++) {</div><div class='del'>-		int printed;</div><div class='del'>-</div><div class='del'>-		printed = scnprintf(disasm_buf, sizeof(disasm_buf),</div><div class='del'>-				    "       %-7s %s",</div><div class='del'>-				    insn[i].mnemonic, insn[i].op_str);</div><div class='del'>-		print_capstone_detail(&amp;insn[i], disasm_buf + printed,</div><div class='del'>-				      sizeof(disasm_buf) - printed, args,</div><div class='del'>-				      start + offset);</div><div class='del'>-</div><div class='del'>-		args-&gt;offset = offset;</div><div class='del'>-		args-&gt;line = disasm_buf;</div><div class='del'>-</div><div class='del'>-		dl = disasm_line__new(args);</div><div class='del'>-		if (dl == NULL)</div><div class='del'>-			goto err;</div><div class='del'>-</div><div class='del'>-		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-		offset += insn[i].size;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* It failed in the middle: probably due to unknown instructions */</div><div class='del'>-	if (offset != len) {</div><div class='del'>-		struct list_head *list = &amp;notes-&gt;src-&gt;source;</div><div class='del'>-</div><div class='del'>-		/* Discard all lines and fallback to objdump */</div><div class='del'>-		while (!list_empty(list)) {</div><div class='del'>-			dl = list_first_entry(list, struct disasm_line, al.node);</div><div class='del'>-</div><div class='del'>-			list_del_init(&amp;dl-&gt;al.node);</div><div class='del'>-			disasm_line__free(dl);</div><div class='del'>-		}</div><div class='del'>-		count = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	if (needs_cs_close) {</div><div class='del'>-		cs_close(&amp;handle);</div><div class='del'>-		if (free_count &gt; 0)</div><div class='del'>-			cs_free(insn, free_count);</div><div class='del'>-	}</div><div class='del'>-	free(buf);</div><div class='del'>-	return count &lt; 0 ? count : 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	if (needs_cs_close) {</div><div class='del'>-		struct disasm_line *tmp;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * It probably failed in the middle of the above loop.</div><div class='del'>-		 * Release any resources it might add.</div><div class='del'>-		 */</div><div class='del'>-		list_for_each_entry_safe(dl, tmp, &amp;notes-&gt;src-&gt;source, al.node) {</div><div class='del'>-			list_del(&amp;dl-&gt;al.node);</div><div class='del'>-			disasm_line__free(dl);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	count = -1;</div><div class='del'>-	goto out;</div><div class='del'>-}</div><div class='del'>-#else // HAVE_LIBCAPSTONE_SUPPORT</div><div class='del'>-static int symbol__disassemble_capstone(char *filename, struct symbol *sym,</div><div class='del'>-					struct annotate_args *args __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	symbol__disassembler_missing("capstone", filename, sym);</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int symbol__disassemble_capstone_powerpc(char *filename, struct symbol *sym,</div><div class='del'>-						struct annotate_args *args __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	symbol__disassembler_missing("capstone powerpc", filename, sym);</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-#endif // HAVE_LIBCAPSTONE_SUPPORT</div><div class='del'>-</div><div class='ctx'> static int symbol__disassemble_raw(char *filename, struct symbol *sym,</div><div class='ctx'> 					struct annotate_args *args)</div><div class='ctx'> {</div><div class='hunk'>@@ -1830,201 +1420,12 @@ err:</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='del'>-#include &lt;llvm-c/Disassembler.h&gt;</div><div class='del'>-#include &lt;llvm-c/Target.h&gt;</div><div class='del'>-#include "util/llvm-c-helpers.h"</div><div class='del'>-</div><div class='del'>-struct symbol_lookup_storage {</div><div class='del'>-	u64 branch_addr;</div><div class='del'>-	u64 pcrel_load_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Whenever LLVM wants to resolve an address into a symbol, it calls this</div><div class='del'>- * callback. We don't ever actually _return_ anything (in particular, because</div><div class='del'>- * it puts quotation marks around what we return), but we use this as a hint</div><div class='del'>- * that there is a branch or PC-relative address in the expression that we</div><div class='del'>- * should add some textual annotation for after the instruction. The caller</div><div class='del'>- * will use this information to add the actual annotation.</div><div class='del'>- */</div><div class='del'>-static const char *</div><div class='del'>-symbol_lookup_callback(void *disinfo, uint64_t value,</div><div class='del'>-		       uint64_t *ref_type,</div><div class='del'>-		       uint64_t address __maybe_unused,</div><div class='del'>-		       const char **ref __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	struct symbol_lookup_storage *storage = disinfo;</div><div class='del'>-</div><div class='del'>-	if (*ref_type == LLVMDisassembler_ReferenceType_In_Branch)</div><div class='del'>-		storage-&gt;branch_addr = value;</div><div class='del'>-	else if (*ref_type == LLVMDisassembler_ReferenceType_In_PCrel_Load)</div><div class='del'>-		storage-&gt;pcrel_load_addr = value;</div><div class='del'>-	*ref_type = LLVMDisassembler_ReferenceType_InOut_None;</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int symbol__disassemble_llvm(char *filename, struct symbol *sym,</div><div class='del'>-				    struct annotate_args *args)</div><div class='del'>-{</div><div class='del'>-	struct annotation *notes = symbol__annotation(sym);</div><div class='del'>-	struct map *map = args-&gt;ms.map;</div><div class='del'>-	struct dso *dso = map__dso(map);</div><div class='del'>-	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='del'>-	u8 *buf;</div><div class='del'>-	u64 len;</div><div class='del'>-	u64 pc;</div><div class='del'>-	bool is_64bit;</div><div class='del'>-	char triplet[64];</div><div class='del'>-	char disasm_buf[2048];</div><div class='del'>-	size_t disasm_len;</div><div class='del'>-	struct disasm_line *dl;</div><div class='del'>-	LLVMDisasmContextRef disasm = NULL;</div><div class='del'>-	struct symbol_lookup_storage storage;</div><div class='del'>-	char *line_storage = NULL;</div><div class='del'>-	size_t line_storage_len = 0;</div><div class='del'>-	int ret = -1;</div><div class='del'>-</div><div class='del'>-	if (args-&gt;options-&gt;objdump_path)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	LLVMInitializeAllTargetInfos();</div><div class='del'>-	LLVMInitializeAllTargetMCs();</div><div class='del'>-	LLVMInitializeAllDisassemblers();</div><div class='del'>-</div><div class='del'>-	buf = read_symbol(filename, map, sym, &amp;len, &amp;is_64bit);</div><div class='del'>-	if (buf == NULL)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (arch__is(args-&gt;arch, "x86")) {</div><div class='del'>-		if (is_64bit)</div><div class='del'>-			scnprintf(triplet, sizeof(triplet), "x86_64-pc-linux");</div><div class='del'>-		else</div><div class='del'>-			scnprintf(triplet, sizeof(triplet), "i686-pc-linux");</div><div class='del'>-	} else {</div><div class='del'>-		scnprintf(triplet, sizeof(triplet), "%s-linux-gnu",</div><div class='del'>-			  args-&gt;arch-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	disasm = LLVMCreateDisasm(triplet, &amp;storage, 0, NULL,</div><div class='del'>-				  symbol_lookup_callback);</div><div class='del'>-	if (disasm == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (args-&gt;options-&gt;disassembler_style &amp;&amp;</div><div class='del'>-	    !strcmp(args-&gt;options-&gt;disassembler_style, "intel"))</div><div class='del'>-		LLVMSetDisasmOptions(disasm,</div><div class='del'>-				     LLVMDisassembler_Option_AsmPrinterVariant);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This needs to be set after AsmPrinterVariant, due to a bug in LLVM;</div><div class='del'>-	 * setting AsmPrinterVariant makes a new instruction printer, making it</div><div class='del'>-	 * forget about the PrintImmHex flag (which is applied before if both</div><div class='del'>-	 * are given to the same call).</div><div class='del'>-	 */</div><div class='del'>-	LLVMSetDisasmOptions(disasm, LLVMDisassembler_Option_PrintImmHex);</div><div class='del'>-</div><div class='del'>-	/* add the function address and name */</div><div class='del'>-	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='del'>-		  start, sym-&gt;name);</div><div class='del'>-</div><div class='del'>-	args-&gt;offset = -1;</div><div class='del'>-	args-&gt;line = disasm_buf;</div><div class='del'>-	args-&gt;line_nr = 0;</div><div class='del'>-	args-&gt;fileloc = NULL;</div><div class='del'>-	args-&gt;ms.sym = sym;</div><div class='del'>-</div><div class='del'>-	dl = disasm_line__new(args);</div><div class='del'>-	if (dl == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-	pc = start;</div><div class='del'>-	for (u64 offset = 0; offset &lt; len; ) {</div><div class='del'>-		unsigned int ins_len;</div><div class='del'>-</div><div class='del'>-		storage.branch_addr = 0;</div><div class='del'>-		storage.pcrel_load_addr = 0;</div><div class='del'>-</div><div class='del'>-		ins_len = LLVMDisasmInstruction(disasm, buf + offset,</div><div class='del'>-						len - offset, pc,</div><div class='del'>-						disasm_buf, sizeof(disasm_buf));</div><div class='del'>-		if (ins_len == 0)</div><div class='del'>-			goto err;</div><div class='del'>-		disasm_len = strlen(disasm_buf);</div><div class='del'>-</div><div class='del'>-		if (storage.branch_addr != 0) {</div><div class='del'>-			char *name = llvm_name_for_code(dso, filename,</div><div class='del'>-							storage.branch_addr);</div><div class='del'>-			if (name != NULL) {</div><div class='del'>-				disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='del'>-							sizeof(disasm_buf) -</div><div class='del'>-								disasm_len,</div><div class='del'>-							" &lt;%s&gt;", name);</div><div class='del'>-				free(name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (storage.pcrel_load_addr != 0) {</div><div class='del'>-			char *name = llvm_name_for_data(dso, filename,</div><div class='del'>-							storage.pcrel_load_addr);</div><div class='del'>-			disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='del'>-						sizeof(disasm_buf) - disasm_len,</div><div class='del'>-						"  # %#"PRIx64,</div><div class='del'>-						storage.pcrel_load_addr);</div><div class='del'>-			if (name) {</div><div class='del'>-				disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='del'>-							sizeof(disasm_buf) -</div><div class='del'>-							disasm_len,</div><div class='del'>-							" &lt;%s&gt;", name);</div><div class='del'>-				free(name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		args-&gt;offset = offset;</div><div class='del'>-		args-&gt;line = expand_tabs(disasm_buf, &amp;line_storage,</div><div class='del'>-					 &amp;line_storage_len);</div><div class='del'>-		args-&gt;line_nr = 0;</div><div class='del'>-		args-&gt;fileloc = NULL;</div><div class='del'>-		args-&gt;ms.sym = sym;</div><div class='del'>-</div><div class='del'>-		llvm_addr2line(filename, pc, &amp;args-&gt;fileloc,</div><div class='del'>-			       (unsigned int *)&amp;args-&gt;line_nr, false, NULL);</div><div class='del'>-</div><div class='del'>-		dl = disasm_line__new(args);</div><div class='del'>-		if (dl == NULL)</div><div class='del'>-			goto err;</div><div class='del'>-</div><div class='del'>-		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-		free(args-&gt;fileloc);</div><div class='del'>-		pc += ins_len;</div><div class='del'>-		offset += ins_len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	LLVMDisasmDispose(disasm);</div><div class='del'>-	free(buf);</div><div class='del'>-	free(line_storage);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#else // HAVE_LIBLLVM_SUPPORT</div><div class='del'>-static int symbol__disassemble_llvm(char *filename, struct symbol *sym,</div><div class='del'>-				    struct annotate_args *args __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	symbol__disassembler_missing("LLVM", filename, sym);</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-#endif // HAVE_LIBLLVM_SUPPORT</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Possibly create a new version of line with tabs expanded. Returns the</div><div class='ctx'>  * existing or new line, storage is updated if a new line is allocated. If</div><div class='ctx'>  * allocation fails then NULL is returned.</div><div class='ctx'>  */</div><div class='del'>-static char *expand_tabs(char *line, char **storage, size_t *storage_len)</div><div class='add'>+char *expand_tabs(char *line, char **storage, size_t *storage_len)</div><div class='ctx'> {</div><div class='ctx'> 	size_t i, src, dst, len, new_storage_len, num_tabs;</div><div class='ctx'> 	char *new_line;</div><div class='hunk'>@@ -2079,6 +1480,23 @@ static char *expand_tabs(char *line, char **storage, size_t *storage_len)</div><div class='ctx'> 	return new_line;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int symbol__disassemble_bpf_image(struct symbol *sym, struct annotate_args *args)</div><div class='add'>+{</div><div class='add'>+	struct annotation *notes = symbol__annotation(sym);</div><div class='add'>+	struct disasm_line *dl;</div><div class='add'>+</div><div class='add'>+	args-&gt;offset = -1;</div><div class='add'>+	args-&gt;line = strdup("to be implemented");</div><div class='add'>+	args-&gt;line_nr = 0;</div><div class='add'>+	args-&gt;fileloc = NULL;</div><div class='add'>+	dl = disasm_line__new(args);</div><div class='add'>+	if (dl)</div><div class='add'>+		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+	zfree(&amp;args-&gt;line);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int symbol__disassemble_objdump(const char *filename, struct symbol *sym,</div><div class='ctx'> 				       struct annotate_args *args)</div><div class='ctx'> {</div><div class='hunk'>@@ -2103,6 +1521,12 @@ static int symbol__disassemble_objdump(const char *filename, struct symbol *sym,</div><div class='ctx'> 	struct child_process objdump_process;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_PROG_INFO)</div><div class='add'>+		return symbol__disassemble_bpf_libbfd(sym, args);</div><div class='add'>+</div><div class='add'>+	if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_IMAGE)</div><div class='add'>+		return symbol__disassemble_bpf_image(sym, args);</div><div class='add'>+</div><div class='ctx'> 	err = asprintf(&amp;command,</div><div class='ctx'> 		 "%s %s%s --start-address=0x%016" PRIx64</div><div class='ctx'> 		 " --stop-address=0x%016" PRIx64</div><div class='hunk'>@@ -2237,11 +1661,7 @@ int symbol__disassemble(struct symbol *sym, struct annotate_args *args)</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("annotating [%p] %30s : [%p] %30s\n", dso, dso__long_name(dso), sym, sym-&gt;name);</div><div class='ctx'> </div><div class='del'>-	if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_PROG_INFO) {</div><div class='del'>-		return symbol__disassemble_bpf(sym, args);</div><div class='del'>-	} else if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_IMAGE) {</div><div class='del'>-		return symbol__disassemble_bpf_image(sym, args);</div><div class='del'>-	} else if (dso__binary_type(dso) == DSO_BINARY_TYPE__NOT_FOUND) {</div><div class='add'>+	if (dso__binary_type(dso) == DSO_BINARY_TYPE__NOT_FOUND) {</div><div class='ctx'> 		return SYMBOL_ANNOTATE_ERRNO__COULDNT_DETERMINE_FILE_TYPE;</div><div class='ctx'> 	} else if (dso__is_kcore(dso)) {</div><div class='ctx'> 		kce.addr = map__rip_2objdump(map, sym-&gt;start);</div><div class='head'>diff --git a/tools/perf/util/disasm.h b/tools/perf/util/disasm.h<br/>index c135db2416b5..d2cb555e4a3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/disasm.h</a></div><div class='hunk'>@@ -98,7 +98,6 @@ struct ins_ops {</div><div class='ctx'> struct annotate_args {</div><div class='ctx'> 	struct arch		  *arch;</div><div class='ctx'> 	struct map_symbol	  ms;</div><div class='del'>-	struct evsel		  *evsel;</div><div class='ctx'> 	struct annotation_options *options;</div><div class='ctx'> 	s64			  offset;</div><div class='ctx'> 	char			  *line;</div><div class='hunk'>@@ -110,13 +109,10 @@ struct arch *arch__find(const char *name);</div><div class='ctx'> bool arch__is(struct arch *arch, const char *name);</div><div class='ctx'> </div><div class='ctx'> struct ins_ops *ins__find(struct arch *arch, const char *name, struct disasm_line *dl);</div><div class='del'>-int ins__scnprintf(struct ins *ins, char *bf, size_t size,</div><div class='del'>-		   struct ins_operands *ops, int max_ins_name);</div><div class='ctx'> </div><div class='ctx'> bool ins__is_call(const struct ins *ins);</div><div class='ctx'> bool ins__is_jump(const struct ins *ins);</div><div class='ctx'> bool ins__is_fused(struct arch *arch, const char *ins1, const char *ins2);</div><div class='del'>-bool ins__is_nop(const struct ins *ins);</div><div class='ctx'> bool ins__is_ret(const struct ins *ins);</div><div class='ctx'> bool ins__is_lock(const struct ins *ins);</div><div class='ctx'> </div><div class='hunk'>@@ -128,4 +124,6 @@ int disasm_line__scnprintf(struct disasm_line *dl, char *bf, size_t size,</div><div class='ctx'> </div><div class='ctx'> int symbol__disassemble(struct symbol *sym, struct annotate_args *args);</div><div class='ctx'> </div><div class='add'>+char *expand_tabs(char *line, char **storage, size_t *storage_len);</div><div class='add'>+</div><div class='ctx'> #endif /* __PERF_UTIL_DISASM_H */</div><div class='head'>diff --git a/tools/perf/util/disasm_bpf.c b/tools/perf/util/disasm_bpf.c<br/>deleted file mode 100644<br/>index 1fee71c79b62..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm_bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm_bpf.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,195 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-</div><div class='del'>-#include "util/annotate.h"</div><div class='del'>-#include "util/disasm_bpf.h"</div><div class='del'>-#include "util/symbol.h"</div><div class='del'>-#include &lt;linux/zalloc.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-</div><div class='del'>-#if defined(HAVE_LIBBFD_SUPPORT) &amp;&amp; defined(HAVE_LIBBPF_SUPPORT)</div><div class='del'>-#define PACKAGE "perf"</div><div class='del'>-#include &lt;bfd.h&gt;</div><div class='del'>-#include &lt;bpf/bpf.h&gt;</div><div class='del'>-#include &lt;bpf/btf.h&gt;</div><div class='del'>-#include &lt;bpf/libbpf.h&gt;</div><div class='del'>-#include &lt;dis-asm.h&gt;</div><div class='del'>-#include &lt;errno.h&gt;</div><div class='del'>-#include &lt;linux/btf.h&gt;</div><div class='del'>-#include &lt;tools/dis-asm-compat.h&gt;</div><div class='del'>-</div><div class='del'>-#include "util/bpf-event.h"</div><div class='del'>-#include "util/bpf-utils.h"</div><div class='del'>-#include "util/debug.h"</div><div class='del'>-#include "util/dso.h"</div><div class='del'>-#include "util/map.h"</div><div class='del'>-#include "util/env.h"</div><div class='del'>-#include "util/util.h"</div><div class='del'>-</div><div class='del'>-int symbol__disassemble_bpf(struct symbol *sym, struct annotate_args *args)</div><div class='del'>-{</div><div class='del'>-	struct annotation *notes = symbol__annotation(sym);</div><div class='del'>-	struct bpf_prog_linfo *prog_linfo = NULL;</div><div class='del'>-	struct bpf_prog_info_node *info_node;</div><div class='del'>-	int len = sym-&gt;end - sym-&gt;start;</div><div class='del'>-	disassembler_ftype disassemble;</div><div class='del'>-	struct map *map = args-&gt;ms.map;</div><div class='del'>-	struct perf_bpil *info_linear;</div><div class='del'>-	struct disassemble_info info;</div><div class='del'>-	struct dso *dso = map__dso(map);</div><div class='del'>-	int pc = 0, count, sub_id;</div><div class='del'>-	struct btf *btf = NULL;</div><div class='del'>-	char tpath[PATH_MAX];</div><div class='del'>-	size_t buf_size;</div><div class='del'>-	int nr_skip = 0;</div><div class='del'>-	char *buf;</div><div class='del'>-	bfd *bfdf;</div><div class='del'>-	int ret;</div><div class='del'>-	FILE *s;</div><div class='del'>-</div><div class='del'>-	if (dso__binary_type(dso) != DSO_BINARY_TYPE__BPF_PROG_INFO)</div><div class='del'>-		return SYMBOL_ANNOTATE_ERRNO__BPF_INVALID_FILE;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: handling sym %s addr %" PRIx64 " len %" PRIx64 "\n", __func__,</div><div class='del'>-		  sym-&gt;name, sym-&gt;start, sym-&gt;end - sym-&gt;start);</div><div class='del'>-</div><div class='del'>-	memset(tpath, 0, sizeof(tpath));</div><div class='del'>-	perf_exe(tpath, sizeof(tpath));</div><div class='del'>-</div><div class='del'>-	bfdf = bfd_openr(tpath, NULL);</div><div class='del'>-	if (bfdf == NULL)</div><div class='del'>-		abort();</div><div class='del'>-</div><div class='del'>-	if (!bfd_check_format(bfdf, bfd_object))</div><div class='del'>-		abort();</div><div class='del'>-</div><div class='del'>-	s = open_memstream(&amp;buf, &amp;buf_size);</div><div class='del'>-	if (!s) {</div><div class='del'>-		ret = errno;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	init_disassemble_info_compat(&amp;info, s,</div><div class='del'>-				     (fprintf_ftype) fprintf,</div><div class='del'>-				     fprintf_styled);</div><div class='del'>-	info.arch = bfd_get_arch(bfdf);</div><div class='del'>-	info.mach = bfd_get_mach(bfdf);</div><div class='del'>-</div><div class='del'>-	info_node = perf_env__find_bpf_prog_info(dso__bpf_prog(dso)-&gt;env,</div><div class='del'>-						 dso__bpf_prog(dso)-&gt;id);</div><div class='del'>-	if (!info_node) {</div><div class='del'>-		ret = SYMBOL_ANNOTATE_ERRNO__BPF_MISSING_BTF;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	info_linear = info_node-&gt;info_linear;</div><div class='del'>-	sub_id = dso__bpf_prog(dso)-&gt;sub_id;</div><div class='del'>-</div><div class='del'>-	info.buffer = (void *)(uintptr_t)(info_linear-&gt;info.jited_prog_insns);</div><div class='del'>-	info.buffer_length = info_linear-&gt;info.jited_prog_len;</div><div class='del'>-</div><div class='del'>-	if (info_linear-&gt;info.nr_line_info)</div><div class='del'>-		prog_linfo = bpf_prog_linfo__new(&amp;info_linear-&gt;info);</div><div class='del'>-</div><div class='del'>-	if (info_linear-&gt;info.btf_id) {</div><div class='del'>-		struct btf_node *node;</div><div class='del'>-</div><div class='del'>-		node = perf_env__find_btf(dso__bpf_prog(dso)-&gt;env,</div><div class='del'>-					  info_linear-&gt;info.btf_id);</div><div class='del'>-		if (node)</div><div class='del'>-			btf = btf__new((__u8 *)(node-&gt;data),</div><div class='del'>-				       node-&gt;data_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	disassemble_init_for_target(&amp;info);</div><div class='del'>-</div><div class='del'>-#ifdef DISASM_FOUR_ARGS_SIGNATURE</div><div class='del'>-	disassemble = disassembler(info.arch,</div><div class='del'>-				   bfd_big_endian(bfdf),</div><div class='del'>-				   info.mach,</div><div class='del'>-				   bfdf);</div><div class='del'>-#else</div><div class='del'>-	disassemble = disassembler(bfdf);</div><div class='del'>-#endif</div><div class='del'>-	if (disassemble == NULL)</div><div class='del'>-		abort();</div><div class='del'>-</div><div class='del'>-	fflush(s);</div><div class='del'>-	do {</div><div class='del'>-		const struct bpf_line_info *linfo = NULL;</div><div class='del'>-		struct disasm_line *dl;</div><div class='del'>-		size_t prev_buf_size;</div><div class='del'>-		const char *srcline;</div><div class='del'>-		u64 addr;</div><div class='del'>-</div><div class='del'>-		addr = pc + ((u64 *)(uintptr_t)(info_linear-&gt;info.jited_ksyms))[sub_id];</div><div class='del'>-		count = disassemble(pc, &amp;info);</div><div class='del'>-</div><div class='del'>-		if (prog_linfo)</div><div class='del'>-			linfo = bpf_prog_linfo__lfind_addr_func(prog_linfo,</div><div class='del'>-								addr, sub_id,</div><div class='del'>-								nr_skip);</div><div class='del'>-</div><div class='del'>-		if (linfo &amp;&amp; btf) {</div><div class='del'>-			srcline = btf__name_by_offset(btf, linfo-&gt;line_off);</div><div class='del'>-			nr_skip++;</div><div class='del'>-		} else</div><div class='del'>-			srcline = NULL;</div><div class='del'>-</div><div class='del'>-		fprintf(s, "\n");</div><div class='del'>-		prev_buf_size = buf_size;</div><div class='del'>-		fflush(s);</div><div class='del'>-</div><div class='del'>-		if (!annotate_opts.hide_src_code &amp;&amp; srcline) {</div><div class='del'>-			args-&gt;offset = -1;</div><div class='del'>-			args-&gt;line = strdup(srcline);</div><div class='del'>-			args-&gt;line_nr = 0;</div><div class='del'>-			args-&gt;fileloc = NULL;</div><div class='del'>-			args-&gt;ms.sym  = sym;</div><div class='del'>-			dl = disasm_line__new(args);</div><div class='del'>-			if (dl) {</div><div class='del'>-				annotation_line__add(&amp;dl-&gt;al,</div><div class='del'>-						     &amp;notes-&gt;src-&gt;source);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		args-&gt;offset = pc;</div><div class='del'>-		args-&gt;line = buf + prev_buf_size;</div><div class='del'>-		args-&gt;line_nr = 0;</div><div class='del'>-		args-&gt;fileloc = NULL;</div><div class='del'>-		args-&gt;ms.sym  = sym;</div><div class='del'>-		dl = disasm_line__new(args);</div><div class='del'>-		if (dl)</div><div class='del'>-			annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-		pc += count;</div><div class='del'>-	} while (count &gt; 0 &amp;&amp; pc &lt; len);</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-out:</div><div class='del'>-	free(prog_linfo);</div><div class='del'>-	btf__free(btf);</div><div class='del'>-	fclose(s);</div><div class='del'>-	bfd_close(bfdf);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#else // defined(HAVE_LIBBFD_SUPPORT) &amp;&amp; defined(HAVE_LIBBPF_SUPPORT)</div><div class='del'>-int symbol__disassemble_bpf(struct symbol *sym __maybe_unused, struct annotate_args *args __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return SYMBOL_ANNOTATE_ERRNO__NO_LIBOPCODES_FOR_BPF;</div><div class='del'>-}</div><div class='del'>-#endif // defined(HAVE_LIBBFD_SUPPORT) &amp;&amp; defined(HAVE_LIBBPF_SUPPORT)</div><div class='del'>-</div><div class='del'>-int symbol__disassemble_bpf_image(struct symbol *sym, struct annotate_args *args)</div><div class='del'>-{</div><div class='del'>-	struct annotation *notes = symbol__annotation(sym);</div><div class='del'>-	struct disasm_line *dl;</div><div class='del'>-</div><div class='del'>-	args-&gt;offset = -1;</div><div class='del'>-	args-&gt;line = strdup("to be implemented");</div><div class='del'>-	args-&gt;line_nr = 0;</div><div class='del'>-	args-&gt;fileloc = NULL;</div><div class='del'>-	dl = disasm_line__new(args);</div><div class='del'>-	if (dl)</div><div class='del'>-		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='del'>-</div><div class='del'>-	zfree(&amp;args-&gt;line);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/tools/perf/util/disasm_bpf.h b/tools/perf/util/disasm_bpf.h<br/>deleted file mode 100644<br/>index 2ecb19545388..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/disasm_bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/disasm_bpf.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-</div><div class='del'>-#ifndef __PERF_DISASM_BPF_H</div><div class='del'>-#define __PERF_DISASM_BPF_H</div><div class='del'>-</div><div class='del'>-struct symbol;</div><div class='del'>-struct annotate_args;</div><div class='del'>-</div><div class='del'>-int symbol__disassemble_bpf(struct symbol *sym, struct annotate_args *args);</div><div class='del'>-int symbol__disassemble_bpf_image(struct symbol *sym, struct annotate_args *args);</div><div class='del'>-</div><div class='del'>-#endif /* __PERF_DISASM_BPF_H */</div><div class='head'>diff --git a/tools/perf/util/drm_pmu.c b/tools/perf/util/drm_pmu.c<br/>index 988890f37ba7..b48a375e4584 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/drm_pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/drm_pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/drm_pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/drm_pmu.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;api/io.h&gt;</div><div class='ctx'> #include &lt;ctype.h&gt;</div><div class='ctx'> #include &lt;dirent.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;linux/unistd.h&gt;</div><div class='hunk'>@@ -119,7 +120,7 @@ static struct drm_pmu *add_drm_pmu(struct list_head *pmus, char *line, size_t li</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm-&gt;pmu.cpus = perf_cpu_map__new("0");</div><div class='add'>+	drm-&gt;pmu.cpus = perf_cpu_map__new_int(0);</div><div class='ctx'> 	if (!drm-&gt;pmu.cpus) {</div><div class='ctx'> 		perf_pmu__delete(&amp;drm-&gt;pmu);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -458,8 +459,10 @@ static int for_each_drm_fdinfo_in_dir(int (*cb)(void *args, int fdinfo_dir_fd, c</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = cb(args, fdinfo_dir_fd, fd_entry-&gt;d_name);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+			goto close_fdinfo;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+close_fdinfo:</div><div class='ctx'> 	if (fdinfo_dir_fd != -1)</div><div class='ctx'> 		close(fdinfo_dir_fd);</div><div class='ctx'> 	closedir(fd_dir);</div><div class='head'>diff --git a/tools/perf/util/dso.c b/tools/perf/util/dso.c<br/>index 282e3af85d5a..344e689567ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dso.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dso.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/dso.c</a></div><div class='hunk'>@@ -1798,3 +1798,115 @@ bool is_perf_pid_map_name(const char *dso_name)</div><div class='ctx'> </div><div class='ctx'> 	return perf_pid_map_tid(dso_name, &amp;tid);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct find_file_offset_data {</div><div class='add'>+	u64 ip;</div><div class='add'>+	u64 offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This will be called for each PHDR in an ELF binary */</div><div class='add'>+static int find_file_offset(u64 start, u64 len, u64 pgoff, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct find_file_offset_data *data = arg;</div><div class='add'>+</div><div class='add'>+	if (start &lt;= data-&gt;ip &amp;&amp; data-&gt;ip &lt; start + len) {</div><div class='add'>+		data-&gt;offset = pgoff + data-&gt;ip - start;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 *__dso__read_symbol(struct dso *dso, const char *symfs_filename,</div><div class='add'>+				    u64 start, size_t len,</div><div class='add'>+				    u8 **out_buf, u64 *out_buf_len, bool *is_64bit)</div><div class='add'>+{</div><div class='add'>+	struct nscookie nsc;</div><div class='add'>+	int fd;</div><div class='add'>+	ssize_t count;</div><div class='add'>+	struct find_file_offset_data data = {</div><div class='add'>+		.ip = start,</div><div class='add'>+	};</div><div class='add'>+	u8 *code_buf = NULL;</div><div class='add'>+	int saved_errno;</div><div class='add'>+</div><div class='add'>+	nsinfo__mountns_enter(dso__nsinfo(dso), &amp;nsc);</div><div class='add'>+	fd = open(symfs_filename, O_RDONLY);</div><div class='add'>+	saved_errno = errno;</div><div class='add'>+	nsinfo__mountns_exit(&amp;nsc);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		errno = saved_errno;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	if (file__read_maps(fd, /*exe=*/true, find_file_offset, &amp;data, is_64bit) &lt;= 0) {</div><div class='add'>+		close(fd);</div><div class='add'>+		errno = ENOENT;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	code_buf = malloc(len);</div><div class='add'>+	if (code_buf == NULL) {</div><div class='add'>+		close(fd);</div><div class='add'>+		errno = ENOMEM;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	count = pread(fd, code_buf, len, data.offset);</div><div class='add'>+	saved_errno = errno;</div><div class='add'>+	close(fd);</div><div class='add'>+	if ((u64)count != len) {</div><div class='add'>+		free(code_buf);</div><div class='add'>+		errno = saved_errno;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	*out_buf = code_buf;</div><div class='add'>+	*out_buf_len = len;</div><div class='add'>+	return code_buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read a symbol into memory for disassembly by a library like capstone of</div><div class='add'>+ * libLLVM. If memory is allocated out_buf holds it.</div><div class='add'>+ */</div><div class='add'>+const u8 *dso__read_symbol(struct dso *dso, const char *symfs_filename,</div><div class='add'>+			   const struct map *map, const struct symbol *sym,</div><div class='add'>+			   u8 **out_buf, u64 *out_buf_len, bool *is_64bit)</div><div class='add'>+{</div><div class='add'>+	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='add'>+	u64 end = map__rip_2objdump(map, sym-&gt;end);</div><div class='add'>+	size_t len = end - start;</div><div class='add'>+</div><div class='add'>+	*out_buf = NULL;</div><div class='add'>+	*out_buf_len = 0;</div><div class='add'>+	*is_64bit = false;</div><div class='add'>+</div><div class='add'>+	if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_IMAGE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Note, there is fallback BPF image disassembly in the objdump</div><div class='add'>+		 * version but it currently does nothing.</div><div class='add'>+		 */</div><div class='add'>+		errno = EOPNOTSUPP;</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	if (dso__binary_type(dso) == DSO_BINARY_TYPE__BPF_PROG_INFO) {</div><div class='add'>+#ifdef HAVE_LIBBPF_SUPPORT</div><div class='add'>+		struct bpf_prog_info_node *info_node;</div><div class='add'>+		struct perf_bpil *info_linear;</div><div class='add'>+</div><div class='add'>+		*is_64bit = sizeof(void *) == sizeof(u64);</div><div class='add'>+		info_node = perf_env__find_bpf_prog_info(dso__bpf_prog(dso)-&gt;env,</div><div class='add'>+							 dso__bpf_prog(dso)-&gt;id);</div><div class='add'>+		if (!info_node) {</div><div class='add'>+			errno = SYMBOL_ANNOTATE_ERRNO__BPF_MISSING_BTF;</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		info_linear = info_node-&gt;info_linear;</div><div class='add'>+		assert(len &lt;= info_linear-&gt;info.jited_prog_len);</div><div class='add'>+		*out_buf_len = len;</div><div class='add'>+		return (const u8 *)(uintptr_t)(info_linear-&gt;info.jited_prog_insns);</div><div class='add'>+#else</div><div class='add'>+		pr_debug("No BPF program disassembly support\n");</div><div class='add'>+		errno = EOPNOTSUPP;</div><div class='add'>+		return NULL;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+	return __dso__read_symbol(dso, symfs_filename, start, len,</div><div class='add'>+				  out_buf, out_buf_len, is_64bit);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/dso.h b/tools/perf/util/dso.h<br/>index 3457d713d3c5..f8ccb9816b89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dso.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dso.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dso.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/dso.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include "build-id.h"</div><div class='add'>+#include "debuginfo.h"</div><div class='ctx'> #include "mutex.h"</div><div class='ctx'> #include &lt;internal/rc_check.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -299,6 +300,7 @@ DECLARE_RC_STRUCT(dso) {</div><div class='ctx'> 	u8		 hit:1;</div><div class='ctx'> 	u8		 annotate_warned:1;</div><div class='ctx'> 	u8		 auxtrace_warned:1;</div><div class='add'>+	u8		 debuginfo_warned:1;</div><div class='ctx'> 	u8		 short_name_allocated:1;</div><div class='ctx'> 	u8		 long_name_allocated:1;</div><div class='ctx'> 	u8		 is_64_bit:1;</div><div class='hunk'>@@ -362,6 +364,16 @@ static inline void dso__set_annotate_warned(struct dso *dso)</div><div class='ctx'> 	RC_CHK_ACCESS(dso)-&gt;annotate_warned = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool dso__debuginfo_warned(const struct dso *dso)</div><div class='add'>+{</div><div class='add'>+	return RC_CHK_ACCESS(dso)-&gt;debuginfo_warned;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void dso__set_debuginfo_warned(struct dso *dso)</div><div class='add'>+{</div><div class='add'>+	RC_CHK_ACCESS(dso)-&gt;debuginfo_warned = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool dso__auxtrace_warned(const struct dso *dso)</div><div class='ctx'> {</div><div class='ctx'> 	return RC_CHK_ACCESS(dso)-&gt;auxtrace_warned;</div><div class='hunk'>@@ -903,4 +915,17 @@ u64 dso__findnew_global_type(struct dso *dso, u64 addr, u64 offset);</div><div class='ctx'> bool perf_pid_map_tid(const char *dso_name, int *tid);</div><div class='ctx'> bool is_perf_pid_map_name(const char *dso_name);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * In the future, we may get debuginfo using build-ID (w/o path).</div><div class='add'>+ * Add this helper is for the smooth conversion.</div><div class='add'>+ */</div><div class='add'>+static inline struct debuginfo *dso__debuginfo(struct dso *dso)</div><div class='add'>+{</div><div class='add'>+	return debuginfo__new(dso__long_name(dso));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const u8 *dso__read_symbol(struct dso *dso, const char *symfs_filename,</div><div class='add'>+			   const struct map *map, const struct symbol *sym,</div><div class='add'>+			   u8 **out_buf, u64 *out_buf_len, bool *is_64bit);</div><div class='add'>+</div><div class='ctx'> #endif /* __PERF_DSO */</div><div class='head'>diff --git a/tools/perf/util/dwarf-aux.c b/tools/perf/util/dwarf-aux.c<br/>index 559c953ca172..9267af204c7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dwarf-aux.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dwarf-aux.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dwarf-aux.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/dwarf-aux.c</a></div><div class='hunk'>@@ -1388,18 +1388,19 @@ struct find_var_data {</div><div class='ctx'> #define DWARF_OP_DIRECT_REGS  32</div><div class='ctx'> </div><div class='ctx'> static bool match_var_offset(Dwarf_Die *die_mem, struct find_var_data *data,</div><div class='del'>-			     u64 addr_offset, u64 addr_type, bool is_pointer)</div><div class='add'>+			     s64 addr_offset, s64 addr_type, bool is_pointer)</div><div class='ctx'> {</div><div class='ctx'> 	Dwarf_Die type_die;</div><div class='ctx'> 	Dwarf_Word size;</div><div class='add'>+	s64 offset = addr_offset - addr_type;</div><div class='ctx'> </div><div class='del'>-	if (addr_offset == addr_type) {</div><div class='add'>+	if (offset == 0) {</div><div class='ctx'> 		/* Update offset relative to the start of the variable */</div><div class='ctx'> 		data-&gt;offset = 0;</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (addr_offset &lt; addr_type)</div><div class='add'>+	if (offset &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (die_get_real_type(die_mem, &amp;type_die) == NULL)</div><div class='hunk'>@@ -1414,14 +1415,42 @@ static bool match_var_offset(Dwarf_Die *die_mem, struct find_var_data *data,</div><div class='ctx'> 	if (dwarf_aggregate_size(&amp;type_die, &amp;size) &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (addr_offset &gt;= addr_type + size)</div><div class='add'>+	if ((u64)offset &gt;= size)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Update offset relative to the start of the variable */</div><div class='del'>-	data-&gt;offset = addr_offset - addr_type;</div><div class='add'>+	data-&gt;offset = offset;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * is_breg_access_indirect - Check if breg based access implies type</div><div class='add'>+ * dereference</div><div class='add'>+ * @ops: DWARF operations array</div><div class='add'>+ * @nops: Number of operations in @ops</div><div class='add'>+ *</div><div class='add'>+ * Returns true if the DWARF expression evaluates to the variable's</div><div class='add'>+ * value, so the memory access on that register needs type dereference.</div><div class='add'>+ * Returns false if the expression evaluates to the variable's address.</div><div class='add'>+ * This is called after check_allowed_ops.</div><div class='add'>+ */</div><div class='add'>+static bool is_breg_access_indirect(Dwarf_Op *ops, size_t nops)</div><div class='add'>+{</div><div class='add'>+	/* only the base register */</div><div class='add'>+	if (nops == 1)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (nops == 2 &amp;&amp; ops[1].atom == DW_OP_stack_value)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (nops == 3 &amp;&amp; (ops[1].atom == DW_OP_deref ||</div><div class='add'>+		ops[1].atom == DW_OP_deref_size) &amp;&amp;</div><div class='add'>+		ops[2].atom == DW_OP_stack_value)</div><div class='add'>+		return false;</div><div class='add'>+	/* unreachable, OP not supported */</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Only checks direct child DIEs in the given scope. */</div><div class='ctx'> static int __die_find_var_reg_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1450,7 +1479,7 @@ static int __die_find_var_reg_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> 		if (data-&gt;is_fbreg &amp;&amp; ops-&gt;atom == DW_OP_fbreg &amp;&amp;</div><div class='ctx'> 		    check_allowed_ops(ops, nops) &amp;&amp;</div><div class='ctx'> 		    match_var_offset(die_mem, data, data-&gt;offset, ops-&gt;number,</div><div class='del'>-				     /*is_pointer=*/false))</div><div class='add'>+				     is_breg_access_indirect(ops, nops)))</div><div class='ctx'> 			return DIE_FIND_CB_END;</div><div class='ctx'> </div><div class='ctx'> 		/* Only match with a simple case */</div><div class='hunk'>@@ -1462,11 +1491,11 @@ static int __die_find_var_reg_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> 					     /*is_pointer=*/true))</div><div class='ctx'> 				return DIE_FIND_CB_END;</div><div class='ctx'> </div><div class='del'>-			/* Local variables accessed by a register + offset */</div><div class='add'>+			/* variables accessed by a register + offset */</div><div class='ctx'> 			if (ops-&gt;atom == (DW_OP_breg0 + data-&gt;reg) &amp;&amp;</div><div class='ctx'> 			    check_allowed_ops(ops, nops) &amp;&amp;</div><div class='ctx'> 			    match_var_offset(die_mem, data, data-&gt;offset, ops-&gt;number,</div><div class='del'>-					     /*is_pointer=*/false))</div><div class='add'>+					     is_breg_access_indirect(ops, nops)))</div><div class='ctx'> 				return DIE_FIND_CB_END;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* pointer variables saved in a register 32 or above */</div><div class='hunk'>@@ -1476,11 +1505,11 @@ static int __die_find_var_reg_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> 					     /*is_pointer=*/true))</div><div class='ctx'> 				return DIE_FIND_CB_END;</div><div class='ctx'> </div><div class='del'>-			/* Local variables accessed by a register + offset */</div><div class='add'>+			/* variables accessed by a register + offset */</div><div class='ctx'> 			if (ops-&gt;atom == DW_OP_bregx &amp;&amp; data-&gt;reg == ops-&gt;number &amp;&amp;</div><div class='ctx'> 			    check_allowed_ops(ops, nops) &amp;&amp;</div><div class='ctx'> 			    match_var_offset(die_mem, data, data-&gt;offset, ops-&gt;number2,</div><div class='del'>-					     /*is_poitner=*/false))</div><div class='add'>+					     is_breg_access_indirect(ops, nops)))</div><div class='ctx'> 				return DIE_FIND_CB_END;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1598,13 +1627,22 @@ static int __die_collect_vars_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> 	if (!check_allowed_ops(ops, nops))</div><div class='ctx'> 		return DIE_FIND_CB_SIBLING;</div><div class='ctx'> </div><div class='del'>-	if (die_get_real_type(die_mem, &amp;type_die) == NULL)</div><div class='add'>+	if (__die_get_real_type(die_mem, &amp;type_die) == NULL)</div><div class='ctx'> 		return DIE_FIND_CB_SIBLING;</div><div class='ctx'> </div><div class='ctx'> 	vt = malloc(sizeof(*vt));</div><div class='ctx'> 	if (vt == NULL)</div><div class='ctx'> 		return DIE_FIND_CB_END;</div><div class='ctx'> </div><div class='add'>+	/* Usually a register holds the value of a variable */</div><div class='add'>+	vt-&gt;is_reg_var_addr = false;</div><div class='add'>+</div><div class='add'>+	if (((ops-&gt;atom &gt;= DW_OP_breg0 &amp;&amp; ops-&gt;atom &lt;= DW_OP_breg31) ||</div><div class='add'>+	      ops-&gt;atom == DW_OP_bregx || ops-&gt;atom == DW_OP_fbreg) &amp;&amp;</div><div class='add'>+	      !is_breg_access_indirect(ops, nops))</div><div class='add'>+		/* The register contains an address of the variable. */</div><div class='add'>+		vt-&gt;is_reg_var_addr = true;</div><div class='add'>+</div><div class='ctx'> 	vt-&gt;die_off = dwarf_dieoffset(&amp;type_die);</div><div class='ctx'> 	vt-&gt;addr = start;</div><div class='ctx'> 	vt-&gt;reg = reg_from_dwarf_op(ops);</div><div class='hunk'>@@ -1920,6 +1958,7 @@ struct find_scope_data {</div><div class='ctx'> static int __die_find_scope_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct find_scope_data *data = arg;</div><div class='add'>+	int tag = dwarf_tag(die_mem);</div><div class='ctx'> </div><div class='ctx'> 	if (dwarf_haspc(die_mem, data-&gt;pc)) {</div><div class='ctx'> 		Dwarf_Die *tmp;</div><div class='hunk'>@@ -1933,6 +1972,14 @@ static int __die_find_scope_cb(Dwarf_Die *die_mem, void *arg)</div><div class='ctx'> 		data-&gt;nr++;</div><div class='ctx'> 		return DIE_FIND_CB_CHILD;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the DIE doesn't have the PC, we still need to check its children</div><div class='add'>+	 * and siblings if it's a container like a namespace.</div><div class='add'>+	 */</div><div class='add'>+	if (tag == DW_TAG_namespace)</div><div class='add'>+		return DIE_FIND_CB_CONTINUE;</div><div class='add'>+</div><div class='ctx'> 	return DIE_FIND_CB_SIBLING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/dwarf-aux.h b/tools/perf/util/dwarf-aux.h<br/>index 892c8c5c23fc..cd481ec9c5a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dwarf-aux.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/dwarf-aux.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/dwarf-aux.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/dwarf-aux.h</a></div><div class='hunk'>@@ -148,6 +148,8 @@ struct die_var_type {</div><div class='ctx'> 	u64 addr;</div><div class='ctx'> 	int reg;</div><div class='ctx'> 	int offset;</div><div class='add'>+	/* Whether the register holds a address to the type */</div><div class='add'>+	bool is_reg_var_addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Return type info of a member at offset */</div><div class='head'>diff --git a/tools/perf/util/env.c b/tools/perf/util/env.c<br/>index c8c248754621..f1626d2032cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/env.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/env.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/env.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/env.c</a></div><div class='hunk'>@@ -802,3 +802,25 @@ bool x86__is_amd_cpu(void)</div><div class='ctx'> </div><div class='ctx'> 	return is_amd;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool perf_env__is_x86_intel_cpu(struct perf_env *env)</div><div class='add'>+{</div><div class='add'>+	static int is_intel; /* 0: Uninitialized, 1: Yes, -1: No */</div><div class='add'>+</div><div class='add'>+	if (is_intel == 0)</div><div class='add'>+		is_intel = env-&gt;cpuid &amp;&amp; strstarts(env-&gt;cpuid, "GenuineIntel") ? 1 : -1;</div><div class='add'>+</div><div class='add'>+	return is_intel &gt;= 1 ? true : false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool x86__is_intel_cpu(void)</div><div class='add'>+{</div><div class='add'>+	struct perf_env env = { .total_mem = 0, };</div><div class='add'>+	bool is_intel;</div><div class='add'>+</div><div class='add'>+	perf_env__cpuid(&amp;env);</div><div class='add'>+	is_intel = perf_env__is_x86_intel_cpu(&amp;env);</div><div class='add'>+	perf_env__exit(&amp;env);</div><div class='add'>+</div><div class='add'>+	return is_intel;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/env.h b/tools/perf/util/env.h<br/>index e00179787a34..9977b85523a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/env.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/env.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/env.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/env.h</a></div><div class='hunk'>@@ -201,5 +201,7 @@ void perf_env__find_br_cntr_info(struct perf_env *env,</div><div class='ctx'> </div><div class='ctx'> bool x86__is_amd_cpu(void);</div><div class='ctx'> bool perf_env__is_x86_amd_cpu(struct perf_env *env);</div><div class='add'>+bool x86__is_intel_cpu(void);</div><div class='add'>+bool perf_env__is_x86_intel_cpu(struct perf_env *env);</div><div class='ctx'> </div><div class='ctx'> #endif /* __PERF_ENV_H */</div><div class='head'>diff --git a/tools/perf/util/event.c b/tools/perf/util/event.c<br/>index fcf44149feb2..4c92cc1a952c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/event.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/event.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/event.c</a></div><div class='hunk'>@@ -61,6 +61,7 @@ static const char *perf_event__names[] = {</div><div class='ctx'> 	[PERF_RECORD_CGROUP]			= "CGROUP",</div><div class='ctx'> 	[PERF_RECORD_TEXT_POKE]			= "TEXT_POKE",</div><div class='ctx'> 	[PERF_RECORD_AUX_OUTPUT_HW_ID]		= "AUX_OUTPUT_HW_ID",</div><div class='add'>+	[PERF_RECORD_CALLCHAIN_DEFERRED]	= "CALLCHAIN_DEFERRED",</div><div class='ctx'> 	[PERF_RECORD_HEADER_ATTR]		= "ATTR",</div><div class='ctx'> 	[PERF_RECORD_HEADER_EVENT_TYPE]		= "EVENT_TYPE",</div><div class='ctx'> 	[PERF_RECORD_HEADER_TRACING_DATA]	= "TRACING_DATA",</div><div class='head'>diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h<br/>index e40d16d3246c..64c63b59d617 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/event.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/event.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/event.h</a></div><div class='hunk'>@@ -117,6 +117,7 @@ enum perf_synth_id {</div><div class='ctx'> 	PERF_SYNTH_INTEL_PSB,</div><div class='ctx'> 	PERF_SYNTH_INTEL_EVT,</div><div class='ctx'> 	PERF_SYNTH_INTEL_IFLAG_CHG,</div><div class='add'>+	PERF_SYNTH_POWERPC_VPA_DTL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -254,6 +255,25 @@ struct perf_synth_intel_iflag_chg {</div><div class='ctx'> 	u64	branch_ip; /* If via_branch */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The powerpc VPA DTL entries are of below format</div><div class='add'>+ */</div><div class='add'>+struct powerpc_vpadtl_entry {</div><div class='add'>+	u8      dispatch_reason;</div><div class='add'>+	u8      preempt_reason;</div><div class='add'>+	u16     processor_id;</div><div class='add'>+	u32     enqueue_to_dispatch_time;</div><div class='add'>+	u32     ready_to_enqueue_time;</div><div class='add'>+	u32     waiting_to_ready_time;</div><div class='add'>+	u64     timebase;</div><div class='add'>+	u64     fault_addr;</div><div class='add'>+	u64     srr0;</div><div class='add'>+	u64     srr1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const char *dispatch_reasons[11];</div><div class='add'>+extern const char *preempt_reasons[10];</div><div class='add'>+</div><div class='ctx'> static inline void *perf_synth__raw_data(void *p)</div><div class='ctx'> {</div><div class='ctx'> 	return p + 4;</div><div class='head'>diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c<br/>index 80d8387e6b97..03674d2cbd01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evlist.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evlist.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evlist.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evlist.c</a></div><div class='hunk'>@@ -85,6 +85,7 @@ void evlist__init(struct evlist *evlist, struct perf_cpu_map *cpus,</div><div class='ctx'> 	evlist-&gt;ctl_fd.pos = -1;</div><div class='ctx'> 	evlist-&gt;nr_br_cntr = -1;</div><div class='ctx'> 	metricgroup__rblist_init(&amp;evlist-&gt;metric_events);</div><div class='add'>+	INIT_LIST_HEAD(&amp;evlist-&gt;deferred_samples);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct evlist *evlist__new(void)</div><div class='hunk'>@@ -101,16 +102,24 @@ struct evlist *evlist__new_default(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct evlist *evlist = evlist__new();</div><div class='ctx'> 	bool can_profile_kernel;</div><div class='del'>-	int err;</div><div class='add'>+	struct perf_pmu *pmu = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!evlist)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	can_profile_kernel = perf_event_paranoid_check(1);</div><div class='del'>-	err = parse_event(evlist, can_profile_kernel ? "cycles:P" : "cycles:Pu");</div><div class='del'>-	if (err) {</div><div class='del'>-		evlist__delete(evlist);</div><div class='del'>-		return NULL;</div><div class='add'>+</div><div class='add'>+	while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {</div><div class='add'>+		char buf[256];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		snprintf(buf, sizeof(buf), "%s/cycles/%s", pmu-&gt;name,</div><div class='add'>+			 can_profile_kernel ? "P" : "Pu");</div><div class='add'>+		err = parse_event(evlist, buf);</div><div class='add'>+		if (err) {</div><div class='add'>+			evlist__delete(evlist);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (evlist-&gt;core.nr_entries &gt; 1) {</div><div class='head'>diff --git a/tools/perf/util/evlist.h b/tools/perf/util/evlist.h<br/>index 5e71e3dc6042..911834ae7c2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evlist.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evlist.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evlist.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evlist.h</a></div><div class='hunk'>@@ -92,6 +92,8 @@ struct evlist {</div><div class='ctx'> 	 * of struct metric_expr.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct rblist	metric_events;</div><div class='add'>+	/* samples with deferred_callchain would wait here. */</div><div class='add'>+	struct list_head deferred_samples;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct evsel_str_handler {</div><div class='head'>diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c<br/>index d264c143b592..9cd706f62793 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evsel.c</a></div><div class='hunk'>@@ -402,11 +402,11 @@ void evsel__init(struct evsel *evsel,</div><div class='ctx'> 	evsel-&gt;sample_size = __evsel__sample_size(attr-&gt;sample_type);</div><div class='ctx'> 	evsel__calc_id_pos(evsel);</div><div class='ctx'> 	evsel-&gt;cmdline_group_boundary = false;</div><div class='del'>-	evsel-&gt;metric_events = NULL;</div><div class='ctx'> 	evsel-&gt;per_pkg_mask  = NULL;</div><div class='ctx'> 	evsel-&gt;collect_stat  = false;</div><div class='ctx'> 	evsel-&gt;group_pmu_name = NULL;</div><div class='ctx'> 	evsel-&gt;skippable     = false;</div><div class='add'>+	evsel-&gt;supported     = true;</div><div class='ctx'> 	evsel-&gt;alternate_hw_config = PERF_COUNT_HW_MAX;</div><div class='ctx'> 	evsel-&gt;script_output_type = -1; // FIXME: OUTPUT_TYPE_UNSET, see builtin-script.c</div><div class='ctx'> }</div><div class='hunk'>@@ -538,6 +538,7 @@ struct evsel *evsel__clone(struct evsel *dest, struct evsel *orig)</div><div class='ctx'> #endif</div><div class='ctx'> 	evsel-&gt;handler = orig-&gt;handler;</div><div class='ctx'> 	evsel-&gt;core.leader = orig-&gt;core.leader;</div><div class='add'>+	evsel-&gt;metric_leader = orig-&gt;metric_leader;</div><div class='ctx'> </div><div class='ctx'> 	evsel-&gt;max_events = orig-&gt;max_events;</div><div class='ctx'> 	zfree(&amp;evsel-&gt;unit);</div><div class='hunk'>@@ -1065,6 +1066,9 @@ static void __evsel__config_callchain(struct evsel *evsel, struct record_opts *o</div><div class='ctx'> 		pr_info("Disabling user space callchains for function trace event.\n");</div><div class='ctx'> 		attr-&gt;exclude_callchain_user = 1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (param-&gt;defer &amp;&amp; !attr-&gt;exclude_callchain_user)</div><div class='add'>+		attr-&gt;defer_callchain = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void evsel__config_callchain(struct evsel *evsel, struct record_opts *opts,</div><div class='hunk'>@@ -1091,6 +1095,71 @@ static void evsel__reset_callgraph(struct evsel *evsel, struct callchain_param *</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void evsel__apply_ratio_to_prev(struct evsel *evsel,</div><div class='add'>+				       struct perf_event_attr *attr,</div><div class='add'>+				       struct record_opts *opts,</div><div class='add'>+				       const char *buf)</div><div class='add'>+{</div><div class='add'>+	struct perf_event_attr *prev_attr = NULL;</div><div class='add'>+	struct evsel *evsel_prev = NULL;</div><div class='add'>+	u64 type = evsel-&gt;core.attr.sample_type;</div><div class='add'>+	u64 prev_type = 0;</div><div class='add'>+	double rtp;</div><div class='add'>+</div><div class='add'>+	rtp = strtod(buf, NULL);</div><div class='add'>+	if (rtp &lt;= 0) {</div><div class='add'>+		pr_err("Invalid ratio-to-prev value %lf\n", rtp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (evsel == evsel__leader(evsel)) {</div><div class='add'>+		pr_err("Invalid use of ratio-to-prev term without preceding element in group\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (!evsel-&gt;pmu-&gt;is_core) {</div><div class='add'>+		pr_err("Event using ratio-to-prev term must have a core PMU\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	evsel_prev = evsel__prev(evsel);</div><div class='add'>+	if (!evsel_prev) {</div><div class='add'>+		pr_err("Previous event does not exist.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (evsel_prev-&gt;pmu-&gt;type != evsel-&gt;pmu-&gt;type) {</div><div class='add'>+		pr_err("Compared events (\"%s\", \"%s\") must have same PMU\n",</div><div class='add'>+			evsel-&gt;name, evsel_prev-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prev_attr = &amp;evsel_prev-&gt;core.attr;</div><div class='add'>+	prev_type = evsel_prev-&gt;core.attr.sample_type;</div><div class='add'>+</div><div class='add'>+	if (!(prev_type &amp; PERF_SAMPLE_PERIOD)) {</div><div class='add'>+		attr-&gt;sample_period = prev_attr-&gt;sample_period * rtp;</div><div class='add'>+		attr-&gt;freq = 0;</div><div class='add'>+		evsel__reset_sample_bit(evsel, PERIOD);</div><div class='add'>+	} else if (!(type &amp; PERF_SAMPLE_PERIOD)) {</div><div class='add'>+		prev_attr-&gt;sample_period = attr-&gt;sample_period / rtp;</div><div class='add'>+		prev_attr-&gt;freq = 0;</div><div class='add'>+		evsel__reset_sample_bit(evsel_prev, PERIOD);</div><div class='add'>+	} else {</div><div class='add'>+		if (opts-&gt;user_interval != ULLONG_MAX) {</div><div class='add'>+			prev_attr-&gt;sample_period = opts-&gt;user_interval;</div><div class='add'>+			attr-&gt;sample_period = prev_attr-&gt;sample_period * rtp;</div><div class='add'>+			prev_attr-&gt;freq = 0;</div><div class='add'>+			attr-&gt;freq = 0;</div><div class='add'>+			evsel__reset_sample_bit(evsel_prev, PERIOD);</div><div class='add'>+			evsel__reset_sample_bit(evsel, PERIOD);</div><div class='add'>+		} else {</div><div class='add'>+			pr_err("Event period term or count (-c) must be set when using ratio-to-prev term.\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	arch_evsel__apply_ratio_to_prev(evsel, attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void evsel__apply_config_terms(struct evsel *evsel,</div><div class='ctx'> 				      struct record_opts *opts, bool track)</div><div class='ctx'> {</div><div class='hunk'>@@ -1104,6 +1173,7 @@ static void evsel__apply_config_terms(struct evsel *evsel,</div><div class='ctx'> 	u32 dump_size = 0;</div><div class='ctx'> 	int max_stack = 0;</div><div class='ctx'> 	const char *callgraph_buf = NULL;</div><div class='add'>+	const char *rtp_buf = NULL;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(term, config_terms, list) {</div><div class='ctx'> 		switch (term-&gt;type) {</div><div class='hunk'>@@ -1174,6 +1244,9 @@ static void evsel__apply_config_terms(struct evsel *evsel,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case EVSEL__CONFIG_TERM_CFG_CHG:</div><div class='ctx'> 			break;</div><div class='add'>+		case EVSEL__CONFIG_TERM_RATIO_TO_PREV:</div><div class='add'>+			rtp_buf = term-&gt;val.str;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1225,6 +1298,8 @@ static void evsel__apply_config_terms(struct evsel *evsel,</div><div class='ctx'> 			evsel__config_callchain(evsel, opts, &amp;param);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	if (rtp_buf)</div><div class='add'>+		evsel__apply_ratio_to_prev(evsel, attr, opts, rtp_buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct evsel_config_term *__evsel__get_config_term(struct evsel *evsel, enum evsel_term_type type)</div><div class='hunk'>@@ -1249,6 +1324,11 @@ void __weak arch__post_evsel_config(struct evsel *evsel __maybe_unused,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __weak arch_evsel__apply_ratio_to_prev(struct evsel *evsel __maybe_unused,</div><div class='add'>+					    struct perf_event_attr *attr __maybe_unused)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void evsel__set_default_freq_period(struct record_opts *opts,</div><div class='ctx'> 					   struct perf_event_attr *attr)</div><div class='ctx'> {</div><div class='hunk'>@@ -1435,6 +1515,7 @@ void evsel__config(struct evsel *evsel, struct record_opts *opts,</div><div class='ctx'> 	attr-&gt;mmap2    = track &amp;&amp; !perf_missing_features.mmap2;</div><div class='ctx'> 	attr-&gt;comm     = track;</div><div class='ctx'> 	attr-&gt;build_id = track &amp;&amp; opts-&gt;build_id;</div><div class='add'>+	attr-&gt;defer_output = track &amp;&amp; callchain &amp;&amp; callchain-&gt;defer;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ksymbol is tracked separately with text poke because it needs to be</div><div class='hunk'>@@ -1677,7 +1758,6 @@ void evsel__exit(struct evsel *evsel)</div><div class='ctx'> 	evsel__zero_per_pkg(evsel);</div><div class='ctx'> 	hashmap__free(evsel-&gt;per_pkg_mask);</div><div class='ctx'> 	evsel-&gt;per_pkg_mask = NULL;</div><div class='del'>-	zfree(&amp;evsel-&gt;metric_events);</div><div class='ctx'> 	if (evsel__priv_destructor)</div><div class='ctx'> 		evsel__priv_destructor(evsel-&gt;priv);</div><div class='ctx'> 	perf_evsel__object.fini(evsel);</div><div class='hunk'>@@ -1863,16 +1943,19 @@ bool __evsel__match(const struct evsel *evsel, u32 type, u64 config)</div><div class='ctx'> 	u32 e_type = evsel-&gt;core.attr.type;</div><div class='ctx'> 	u64 e_config = evsel-&gt;core.attr.config;</div><div class='ctx'> </div><div class='del'>-	if (e_type != type) {</div><div class='del'>-		return type == PERF_TYPE_HARDWARE &amp;&amp; evsel-&gt;pmu &amp;&amp; evsel-&gt;pmu-&gt;is_core &amp;&amp;</div><div class='del'>-			evsel-&gt;alternate_hw_config == config;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((type == PERF_TYPE_HARDWARE || type == PERF_TYPE_HW_CACHE) &amp;&amp;</div><div class='del'>-	    perf_pmus__supports_extended_type())</div><div class='add'>+	if (e_type == type &amp;&amp; e_config == config)</div><div class='add'>+		return true;</div><div class='add'>+	if (type != PERF_TYPE_HARDWARE &amp;&amp; type != PERF_TYPE_HW_CACHE)</div><div class='add'>+		return false;</div><div class='add'>+	if ((e_type == PERF_TYPE_HARDWARE || e_type == PERF_TYPE_HW_CACHE) &amp;&amp;</div><div class='add'>+		perf_pmus__supports_extended_type())</div><div class='ctx'> 		e_config &amp;= PERF_HW_EVENT_MASK;</div><div class='del'>-</div><div class='del'>-	return e_config == config;</div><div class='add'>+	if (e_type == type &amp;&amp; e_config == config)</div><div class='add'>+		return true;</div><div class='add'>+	if (type == PERF_TYPE_HARDWARE &amp;&amp; evsel-&gt;pmu &amp;&amp; evsel-&gt;pmu-&gt;is_core &amp;&amp;</div><div class='add'>+	    evsel-&gt;alternate_hw_config == config)</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int evsel__read_counter(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='hunk'>@@ -1941,7 +2024,7 @@ static int get_group_fd(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> 	struct evsel *leader = evsel__leader(evsel);</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='del'>-	if (evsel__is_group_leader(evsel))</div><div class='add'>+	if (!evsel-&gt;supported || evsel__is_group_leader(evsel))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1955,7 +2038,7 @@ static int get_group_fd(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	fd = FD(leader, cpu_map_idx, thread);</div><div class='del'>-	BUG_ON(fd == -1 &amp;&amp; !leader-&gt;skippable);</div><div class='add'>+	BUG_ON(fd == -1 &amp;&amp; leader-&gt;supported);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When the leader has been skipped, return -2 to distinguish from no</div><div class='hunk'>@@ -2121,6 +2204,10 @@ static int __evsel__prepare_open(struct evsel *evsel, struct perf_cpu_map *cpus,</div><div class='ctx'> </div><div class='ctx'> static void evsel__disable_missing_features(struct evsel *evsel)</div><div class='ctx'> {</div><div class='add'>+	if (perf_missing_features.defer_callchain &amp;&amp; evsel-&gt;core.attr.defer_callchain)</div><div class='add'>+		evsel-&gt;core.attr.defer_callchain = 0;</div><div class='add'>+	if (perf_missing_features.defer_callchain &amp;&amp; evsel-&gt;core.attr.defer_output)</div><div class='add'>+		evsel-&gt;core.attr.defer_output = 0;</div><div class='ctx'> 	if (perf_missing_features.inherit_sample_read &amp;&amp; evsel-&gt;core.attr.inherit &amp;&amp;</div><div class='ctx'> 	    (evsel-&gt;core.attr.sample_type &amp; PERF_SAMPLE_READ))</div><div class='ctx'> 		evsel-&gt;core.attr.inherit = 0;</div><div class='hunk'>@@ -2395,8 +2482,15 @@ static bool evsel__detect_missing_features(struct evsel *evsel, struct perf_cpu</div><div class='ctx'> </div><div class='ctx'> 	/* Please add new feature detection here. */</div><div class='ctx'> </div><div class='add'>+	attr.defer_callchain = true;</div><div class='add'>+	if (has_attr_feature(&amp;attr, /*flags=*/0))</div><div class='add'>+		goto found;</div><div class='add'>+	perf_missing_features.defer_callchain = true;</div><div class='add'>+	pr_debug2("switching off deferred callchain support\n");</div><div class='add'>+	attr.defer_callchain = false;</div><div class='add'>+</div><div class='ctx'> 	attr.inherit = true;</div><div class='del'>-	attr.sample_type = PERF_SAMPLE_READ;</div><div class='add'>+	attr.sample_type = PERF_SAMPLE_READ | PERF_SAMPLE_TID;</div><div class='ctx'> 	if (has_attr_feature(&amp;attr, /*flags=*/0))</div><div class='ctx'> 		goto found;</div><div class='ctx'> 	perf_missing_features.inherit_sample_read = true;</div><div class='hunk'>@@ -2506,6 +2600,10 @@ found:</div><div class='ctx'> 	errno = old_errno;</div><div class='ctx'> </div><div class='ctx'> check:</div><div class='add'>+	if ((evsel-&gt;core.attr.defer_callchain || evsel-&gt;core.attr.defer_output) &amp;&amp;</div><div class='add'>+	    perf_missing_features.defer_callchain)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	if (evsel-&gt;core.attr.inherit &amp;&amp;</div><div class='ctx'> 	    (evsel-&gt;core.attr.sample_type &amp; PERF_SAMPLE_READ) &amp;&amp;</div><div class='ctx'> 	    perf_missing_features.inherit_sample_read)</div><div class='hunk'>@@ -2573,12 +2671,14 @@ static int evsel__open_cpu(struct evsel *evsel, struct perf_cpu_map *cpus,</div><div class='ctx'> 	enum rlimit_action set_rlimit = NO_CHANGE;</div><div class='ctx'> 	struct perf_cpu cpu;</div><div class='ctx'> </div><div class='del'>-	if (evsel__is_retire_lat(evsel))</div><div class='del'>-		return evsel__tpebs_open(evsel);</div><div class='add'>+	if (evsel__is_retire_lat(evsel)) {</div><div class='add'>+		err = evsel__tpebs_open(evsel);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = __evsel__prepare_open(evsel, cpus, threads);</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (cpus == NULL)</div><div class='ctx'> 		cpus = empty_cpu_map;</div><div class='hunk'>@@ -2598,19 +2698,22 @@ fallback_missing_features:</div><div class='ctx'> 	display_attr(&amp;evsel-&gt;core.attr);</div><div class='ctx'> </div><div class='ctx'> 	if (evsel__is_tool(evsel)) {</div><div class='del'>-		return evsel__tool_pmu_open(evsel, threads,</div><div class='del'>-					    start_cpu_map_idx,</div><div class='del'>-					    end_cpu_map_idx);</div><div class='add'>+		err = evsel__tool_pmu_open(evsel, threads,</div><div class='add'>+					   start_cpu_map_idx,</div><div class='add'>+					   end_cpu_map_idx);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (evsel__is_hwmon(evsel)) {</div><div class='del'>-		return evsel__hwmon_pmu_open(evsel, threads,</div><div class='del'>-					     start_cpu_map_idx,</div><div class='del'>-					     end_cpu_map_idx);</div><div class='add'>+		err = evsel__hwmon_pmu_open(evsel, threads,</div><div class='add'>+					    start_cpu_map_idx,</div><div class='add'>+					    end_cpu_map_idx);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (evsel__is_drm(evsel)) {</div><div class='del'>-		return evsel__drm_pmu_open(evsel, threads,</div><div class='del'>-					   start_cpu_map_idx,</div><div class='del'>-					   end_cpu_map_idx);</div><div class='add'>+		err = evsel__drm_pmu_open(evsel, threads,</div><div class='add'>+					  start_cpu_map_idx,</div><div class='add'>+					  end_cpu_map_idx);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (idx = start_cpu_map_idx; idx &lt; end_cpu_map_idx; idx++) {</div><div class='hunk'>@@ -2689,7 +2792,8 @@ retry_open:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	err = 0;</div><div class='add'>+	goto out;</div><div class='ctx'> </div><div class='ctx'> try_fallback:</div><div class='ctx'> 	if (evsel__ignore_missing_thread(evsel, perf_cpu_map__nr(cpus),</div><div class='hunk'>@@ -2728,6 +2832,9 @@ out_close:</div><div class='ctx'> 		thread = nthreads;</div><div class='ctx'> 	} while (--idx &gt;= 0);</div><div class='ctx'> 	errno = old_errno;</div><div class='add'>+out:</div><div class='add'>+	if (err)</div><div class='add'>+		evsel-&gt;supported = false;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3002,6 +3109,20 @@ int evsel__parse_sample(struct evsel *evsel, union perf_event *event,</div><div class='ctx'> 	data-&gt;data_src = PERF_MEM_DATA_SRC_NONE;</div><div class='ctx'> 	data-&gt;vcpu = -1;</div><div class='ctx'> </div><div class='add'>+	if (event-&gt;header.type == PERF_RECORD_CALLCHAIN_DEFERRED) {</div><div class='add'>+		const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);</div><div class='add'>+</div><div class='add'>+		data-&gt;callchain = (struct ip_callchain *)&amp;event-&gt;callchain_deferred.nr;</div><div class='add'>+		if (data-&gt;callchain-&gt;nr &gt; max_callchain_nr)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		data-&gt;deferred_cookie = event-&gt;callchain_deferred.cookie;</div><div class='add'>+</div><div class='add'>+		if (evsel-&gt;core.attr.sample_id_all)</div><div class='add'>+			perf_evsel__parse_id_sample(evsel, event, data);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (event-&gt;header.type != PERF_RECORD_SAMPLE) {</div><div class='ctx'> 		if (!evsel-&gt;core.attr.sample_id_all)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -3126,12 +3247,25 @@ int evsel__parse_sample(struct evsel *evsel, union perf_event *event,</div><div class='ctx'> </div><div class='ctx'> 	if (type &amp; PERF_SAMPLE_CALLCHAIN) {</div><div class='ctx'> 		const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);</div><div class='add'>+		u64 callchain_nr;</div><div class='ctx'> </div><div class='ctx'> 		OVERFLOW_CHECK_u64(array);</div><div class='ctx'> 		data-&gt;callchain = (struct ip_callchain *)array++;</div><div class='del'>-		if (data-&gt;callchain-&gt;nr &gt; max_callchain_nr)</div><div class='add'>+		callchain_nr = data-&gt;callchain-&gt;nr;</div><div class='add'>+		if (callchain_nr &gt; max_callchain_nr)</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		sz = data-&gt;callchain-&gt;nr * sizeof(u64);</div><div class='add'>+		sz = callchain_nr * sizeof(u64);</div><div class='add'>+		/*</div><div class='add'>+		 * Save the cookie for the deferred user callchain.  The last 2</div><div class='add'>+		 * entries in the callchain should be the context marker and the</div><div class='add'>+		 * cookie.  The cookie will be used to match PERF_RECORD_</div><div class='add'>+		 * CALLCHAIN_DEFERRED later.</div><div class='add'>+		 */</div><div class='add'>+		if (evsel-&gt;core.attr.defer_callchain &amp;&amp; callchain_nr &gt;= 2 &amp;&amp;</div><div class='add'>+		    data-&gt;callchain-&gt;ips[callchain_nr - 2] == PERF_CONTEXT_USER_DEFERRED) {</div><div class='add'>+			data-&gt;deferred_cookie = data-&gt;callchain-&gt;ips[callchain_nr - 1];</div><div class='add'>+			data-&gt;deferred_callchain = true;</div><div class='add'>+		}</div><div class='ctx'> 		OVERFLOW_CHECK(array, sz, max_size);</div><div class='ctx'> 		array = (void *)array + sz;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3562,7 +3696,7 @@ bool evsel__fallback(struct evsel *evsel, struct target *target, int err,</div><div class='ctx'> </div><div class='ctx'> 		/* If event has exclude user then don't exclude kernel. */</div><div class='ctx'> 		if (evsel-&gt;core.attr.exclude_user)</div><div class='del'>-			return false;</div><div class='add'>+			goto no_fallback;</div><div class='ctx'> </div><div class='ctx'> 		/* Is there already the separator in the name. */</div><div class='ctx'> 		if (strchr(name, '/') ||</div><div class='hunk'>@@ -3570,7 +3704,7 @@ bool evsel__fallback(struct evsel *evsel, struct target *target, int err,</div><div class='ctx'> 			sep = "";</div><div class='ctx'> </div><div class='ctx'> 		if (asprintf(&amp;new_name, "%s%su", name, sep) &lt; 0)</div><div class='del'>-			return false;</div><div class='add'>+			goto no_fallback;</div><div class='ctx'> </div><div class='ctx'> 		free(evsel-&gt;name);</div><div class='ctx'> 		evsel-&gt;name = new_name;</div><div class='hunk'>@@ -3593,17 +3727,19 @@ bool evsel__fallback(struct evsel *evsel, struct target *target, int err,</div><div class='ctx'> 			sep = "";</div><div class='ctx'> </div><div class='ctx'> 		if (asprintf(&amp;new_name, "%s%sH", name, sep) &lt; 0)</div><div class='del'>-			return false;</div><div class='add'>+			goto no_fallback;</div><div class='ctx'> </div><div class='ctx'> 		free(evsel-&gt;name);</div><div class='ctx'> 		evsel-&gt;name = new_name;</div><div class='ctx'> 		/* Apple M1 requires exclude_guest */</div><div class='del'>-		scnprintf(msg, msgsize, "trying to fall back to excluding guest samples");</div><div class='add'>+		scnprintf(msg, msgsize, "Trying to fall back to excluding guest samples");</div><div class='ctx'> 		evsel-&gt;core.attr.exclude_guest = 1;</div><div class='ctx'> </div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+no_fallback:</div><div class='add'>+	scnprintf(msg, msgsize, "No fallback found for '%s' for error %d",</div><div class='add'>+		  evsel__name(evsel), err);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3716,6 +3852,7 @@ static int dump_perf_event_processes(char *msg, size_t size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __weak arch_evsel__open_strerror(struct evsel *evsel __maybe_unused,</div><div class='add'>+				     int err __maybe_unused,</div><div class='ctx'> 				     char *msg __maybe_unused,</div><div class='ctx'> 				     size_t size __maybe_unused)</div><div class='ctx'> {</div><div class='hunk'>@@ -3725,6 +3862,7 @@ int __weak arch_evsel__open_strerror(struct evsel *evsel __maybe_unused,</div><div class='ctx'> int evsel__open_strerror(struct evsel *evsel, struct target *target,</div><div class='ctx'> 			 int err, char *msg, size_t size)</div><div class='ctx'> {</div><div class='add'>+	struct perf_pmu *pmu;</div><div class='ctx'> 	char sbuf[STRERR_BUFSIZE];</div><div class='ctx'> 	int printed = 0, enforced = 0;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -3840,7 +3978,8 @@ int evsel__open_strerror(struct evsel *evsel, struct target *target,</div><div class='ctx'> 			return scnprintf(msg, size, "The 'aux_action' feature is not supported, update the kernel.");</div><div class='ctx'> 		if (perf_missing_features.aux_output)</div><div class='ctx'> 			return scnprintf(msg, size, "The 'aux_output' feature is not supported, update the kernel.");</div><div class='del'>-		if (!target__has_cpu(target))</div><div class='add'>+		pmu = evsel__find_pmu(evsel);</div><div class='add'>+		if (!pmu-&gt;is_core &amp;&amp; !target__has_cpu(target))</div><div class='ctx'> 			return scnprintf(msg, size,</div><div class='ctx'> 	"Invalid event (%s) in per-thread mode, enable system wide with '-a'.",</div><div class='ctx'> 					evsel__name(evsel));</div><div class='hunk'>@@ -3853,7 +3992,7 @@ int evsel__open_strerror(struct evsel *evsel, struct target *target,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = arch_evsel__open_strerror(evsel, msg, size);</div><div class='add'>+	ret = arch_evsel__open_strerror(evsel, err, msg, size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3882,6 +4021,9 @@ static int store_evsel_ids(struct evsel *evsel, struct evlist *evlist)</div><div class='ctx'> 	if (evsel__is_retire_lat(evsel))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (perf_pmu__kind(evsel-&gt;pmu) != PERF_PMU_KIND_PE)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	for (cpu_map_idx = 0; cpu_map_idx &lt; xyarray__max_x(evsel-&gt;core.fd); cpu_map_idx++) {</div><div class='ctx'> 		for (thread = 0; thread &lt; xyarray__max_y(evsel-&gt;core.fd);</div><div class='ctx'> 		     thread++) {</div><div class='hunk'>@@ -3935,6 +4077,8 @@ bool evsel__is_hybrid(const struct evsel *evsel)</div><div class='ctx'> </div><div class='ctx'> struct evsel *evsel__leader(const struct evsel *evsel)</div><div class='ctx'> {</div><div class='add'>+	if (evsel-&gt;core.leader == NULL)</div><div class='add'>+		return NULL;</div><div class='ctx'> 	return container_of(evsel-&gt;core.leader, struct evsel, core);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4048,9 +4192,9 @@ bool evsel__set_needs_uniquify(struct evsel *counter, const struct perf_stat_con</div><div class='ctx'> </div><div class='ctx'> void evsel__uniquify_counter(struct evsel *counter)</div><div class='ctx'> {</div><div class='del'>-	const char *name, *pmu_name;</div><div class='del'>-	char *new_name, *config;</div><div class='del'>-	int ret;</div><div class='add'>+	const char *name, *pmu_name, *config;</div><div class='add'>+	char *new_name;</div><div class='add'>+	int len, ret;</div><div class='ctx'> </div><div class='ctx'> 	/* No uniquification necessary. */</div><div class='ctx'> 	if (!counter-&gt;needs_uniquify)</div><div class='hunk'>@@ -4064,15 +4208,23 @@ void evsel__uniquify_counter(struct evsel *counter)</div><div class='ctx'> 	counter-&gt;uniquified_name = true;</div><div class='ctx'> </div><div class='ctx'> 	name = evsel__name(counter);</div><div class='add'>+	config = strchr(name, '/');</div><div class='ctx'> 	pmu_name = counter-&gt;pmu-&gt;name;</div><div class='del'>-	/* Already prefixed by the PMU name. */</div><div class='del'>-	if (!strncmp(name, pmu_name, strlen(pmu_name)))</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='del'>-	config = strchr(name, '/');</div><div class='del'>-	if (config) {</div><div class='del'>-		int len = config - name;</div><div class='add'>+	/* Already prefixed by the PMU name? */</div><div class='add'>+	len = pmu_name_len_no_suffix(pmu_name);</div><div class='add'>+</div><div class='add'>+	if (!strncmp(name, pmu_name, len)) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the PMU name is there, then there is no sense in not</div><div class='add'>+		 * having a slash. Do this for robustness.</div><div class='add'>+		 */</div><div class='add'>+		if (config == NULL)</div><div class='add'>+			config = name - 1;</div><div class='ctx'> </div><div class='add'>+		ret = asprintf(&amp;new_name, "%s/%s", pmu_name, config + 1);</div><div class='add'>+	} else if (config) {</div><div class='add'>+		len = config - name;</div><div class='ctx'> 		if (config[1] == '/') {</div><div class='ctx'> 			/* case: event// */</div><div class='ctx'> 			ret = asprintf(&amp;new_name, "%s/%.*s/%s", pmu_name, len, name, config + 2);</div><div class='hunk'>@@ -4084,7 +4236,7 @@ void evsel__uniquify_counter(struct evsel *counter)</div><div class='ctx'> 		config = strchr(name, ':');</div><div class='ctx'> 		if (config) {</div><div class='ctx'> 			/* case: event:.. */</div><div class='del'>-			int len = config - name;</div><div class='add'>+			len = config - name;</div><div class='ctx'> </div><div class='ctx'> 			ret = asprintf(&amp;new_name, "%s/%.*s/%s", pmu_name, len, name, config + 1);</div><div class='ctx'> 		} else {</div><div class='head'>diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h<br/>index 5797a02e5d6a..a08130ff2e47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evsel.h</a></div><div class='hunk'>@@ -89,6 +89,7 @@ struct evsel {</div><div class='ctx'> 		bool			use_config_name;</div><div class='ctx'> 		bool			skippable;</div><div class='ctx'> 		bool			retire_lat;</div><div class='add'>+		bool			dont_regroup;</div><div class='ctx'> 		int			bpf_fd;</div><div class='ctx'> 		struct bpf_object	*bpf_obj;</div><div class='ctx'> 		struct list_head	config_terms;</div><div class='hunk'>@@ -99,7 +100,6 @@ struct evsel {</div><div class='ctx'> 	 * metric fields are similar, but needs more care as they can have</div><div class='ctx'> 	 * references to other metric (evsel).</div><div class='ctx'> 	 */</div><div class='del'>-	struct evsel		**metric_events;</div><div class='ctx'> 	struct evsel		*metric_leader;</div><div class='ctx'> </div><div class='ctx'> 	void			*handler;</div><div class='hunk'>@@ -120,9 +120,9 @@ struct evsel {</div><div class='ctx'> 	bool			forced_leader;</div><div class='ctx'> 	bool			cmdline_group_boundary;</div><div class='ctx'> 	bool			reset_group;</div><div class='del'>-	bool			errored;</div><div class='ctx'> 	bool			needs_auxtrace_mmap;</div><div class='ctx'> 	bool			default_metricgroup; /* A member of the Default metricgroup */</div><div class='add'>+	bool			default_show_events; /* If a default group member, show the event */</div><div class='ctx'> 	bool			needs_uniquify;</div><div class='ctx'> 	struct hashmap		*per_pkg_mask;</div><div class='ctx'> 	int			err;</div><div class='hunk'>@@ -221,6 +221,7 @@ struct perf_missing_features {</div><div class='ctx'> 	bool branch_counters;</div><div class='ctx'> 	bool aux_action;</div><div class='ctx'> 	bool inherit_sample_read;</div><div class='add'>+	bool defer_callchain;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct perf_missing_features perf_missing_features;</div><div class='hunk'>@@ -341,7 +342,8 @@ void evsel__set_sample_id(struct evsel *evsel, bool use_sample_identifier);</div><div class='ctx'> </div><div class='ctx'> void arch_evsel__set_sample_weight(struct evsel *evsel);</div><div class='ctx'> void arch__post_evsel_config(struct evsel *evsel, struct perf_event_attr *attr);</div><div class='del'>-int arch_evsel__open_strerror(struct evsel *evsel, char *msg, size_t size);</div><div class='add'>+int arch_evsel__open_strerror(struct evsel *evsel, int err, char *msg, size_t size);</div><div class='add'>+void arch_evsel__apply_ratio_to_prev(struct evsel *evsel, struct perf_event_attr *attr);</div><div class='ctx'> </div><div class='ctx'> int evsel__set_filter(struct evsel *evsel, const char *filter);</div><div class='ctx'> int evsel__append_tp_filter(struct evsel *evsel, const char *filter);</div><div class='head'>diff --git a/tools/perf/util/evsel_config.h b/tools/perf/util/evsel_config.h<br/>index 94a1e9cf73d6..bcd3a978f0c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel_config.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel_config.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel_config.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evsel_config.h</a></div><div class='hunk'>@@ -28,6 +28,7 @@ enum evsel_term_type {</div><div class='ctx'> 	EVSEL__CONFIG_TERM_AUX_ACTION,</div><div class='ctx'> 	EVSEL__CONFIG_TERM_AUX_SAMPLE_SIZE,</div><div class='ctx'> 	EVSEL__CONFIG_TERM_CFG_CHG,</div><div class='add'>+	EVSEL__CONFIG_TERM_RATIO_TO_PREV,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct evsel_config_term {</div><div class='head'>diff --git a/tools/perf/util/evsel_fprintf.c b/tools/perf/util/evsel_fprintf.c<br/>index 103984b29b1e..10f1a03c2860 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel_fprintf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evsel_fprintf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evsel_fprintf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evsel_fprintf.c</a></div><div class='hunk'>@@ -168,7 +168,10 @@ int sample__fprintf_callchain(struct perf_sample *sample, int left_alignment,</div><div class='ctx'> 				node_al.addr = addr;</div><div class='ctx'> 				node_al.map  = map__get(map);</div><div class='ctx'> </div><div class='del'>-				if (print_symoffset) {</div><div class='add'>+				if (sample-&gt;deferred_callchain &amp;&amp;</div><div class='add'>+				    sample-&gt;deferred_cookie == node-&gt;ip) {</div><div class='add'>+					printed += fprintf(fp, "(cookie)");</div><div class='add'>+				} else if (print_symoffset) {</div><div class='ctx'> 					printed += __symbol__fprintf_symname_offs(sym, &amp;node_al,</div><div class='ctx'> 										  print_unknown_as_addr,</div><div class='ctx'> 										  true, fp);</div><div class='head'>diff --git a/tools/perf/util/evswitch.c b/tools/perf/util/evswitch.c<br/>index 40cb56a9347d..d4c06a3f825a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evswitch.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/evswitch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/evswitch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/evswitch.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> // Copyright (C) 2019, Red Hat Inc, Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include "evswitch.h"</div><div class='ctx'> #include "evlist.h"</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/expr.c b/tools/perf/util/expr.c<br/>index 7fda0ff89c16..465fe2e9bbbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/expr.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/expr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/expr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/expr.c</a></div><div class='hunk'>@@ -401,14 +401,12 @@ double expr__get_literal(const char *literal, const struct expr_scanner_ctx *ctx</div><div class='ctx'> 	if (ev != TOOL_PMU__EVENT_NONE) {</div><div class='ctx'> 		u64 count;</div><div class='ctx'> </div><div class='del'>-		if (tool_pmu__read_event(ev, /*evsel=*/NULL, &amp;count))</div><div class='add'>+		if (tool_pmu__read_event(ev, /*evsel=*/NULL,</div><div class='add'>+					 ctx-&gt;system_wide, ctx-&gt;user_requested_cpu_list,</div><div class='add'>+					 &amp;count))</div><div class='ctx'> 			result = count;</div><div class='ctx'> 		else</div><div class='ctx'> 			pr_err("Failure to read '%s'", literal);</div><div class='del'>-</div><div class='del'>-	} else if (!strcmp("#core_wide", literal)) {</div><div class='del'>-		result = core_wide(ctx-&gt;system_wide, ctx-&gt;user_requested_cpu_list)</div><div class='del'>-			? 1.0 : 0.0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_err("Unrecognized literal '%s'", literal);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/tools/perf/util/genelf.c b/tools/perf/util/genelf.c<br/>index 591548b10e34..a1cd5196f4ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/genelf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/genelf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/genelf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/genelf.c</a></div><div class='hunk'>@@ -173,6 +173,8 @@ jit_write_elf(int fd, uint64_t load_addr __maybe_unused, const char *sym,</div><div class='ctx'> 	Elf_Shdr *shdr;</div><div class='ctx'> 	uint64_t eh_frame_base_offset;</div><div class='ctx'> 	char *strsym = NULL;</div><div class='add'>+	void *build_id_data = NULL, *tmp;</div><div class='add'>+	int build_id_data_len;</div><div class='ctx'> 	int symlen;</div><div class='ctx'> 	int retval = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -251,6 +253,14 @@ jit_write_elf(int fd, uint64_t load_addr __maybe_unused, const char *sym,</div><div class='ctx'> 	shdr-&gt;sh_flags = SHF_EXECINSTR | SHF_ALLOC;</div><div class='ctx'> 	shdr-&gt;sh_entsize = 0;</div><div class='ctx'> </div><div class='add'>+	build_id_data = malloc(csize);</div><div class='add'>+	if (build_id_data == NULL) {</div><div class='add'>+		warnx("cannot allocate build-id data");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+	memcpy(build_id_data, code, csize);</div><div class='add'>+	build_id_data_len = csize;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Setup .eh_frame_hdr and .eh_frame</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -334,6 +344,15 @@ jit_write_elf(int fd, uint64_t load_addr __maybe_unused, const char *sym,</div><div class='ctx'> 	shdr-&gt;sh_entsize = sizeof(Elf_Sym);</div><div class='ctx'> 	shdr-&gt;sh_link = unwinding ? 6 : 4; /* index of .strtab section */</div><div class='ctx'> </div><div class='add'>+	tmp = realloc(build_id_data, build_id_data_len + sizeof(symtab));</div><div class='add'>+	if (tmp == NULL) {</div><div class='add'>+		warnx("cannot allocate build-id data");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+	memcpy(tmp + build_id_data_len, symtab, sizeof(symtab));</div><div class='add'>+	build_id_data = tmp;</div><div class='add'>+	build_id_data_len += sizeof(symtab);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * setup symbols string table</div><div class='ctx'> 	 * 2 = 1 for 0 in 1st entry, 1 for the 0 at end of symbol for 2nd entry</div><div class='hunk'>@@ -376,6 +395,15 @@ jit_write_elf(int fd, uint64_t load_addr __maybe_unused, const char *sym,</div><div class='ctx'> 	shdr-&gt;sh_flags = 0;</div><div class='ctx'> 	shdr-&gt;sh_entsize = 0;</div><div class='ctx'> </div><div class='add'>+	tmp = realloc(build_id_data, build_id_data_len + symlen);</div><div class='add'>+	if (tmp == NULL) {</div><div class='add'>+		warnx("cannot allocate build-id data");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+	memcpy(tmp + build_id_data_len, strsym, symlen);</div><div class='add'>+	build_id_data = tmp;</div><div class='add'>+	build_id_data_len += symlen;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * setup build-id section</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -394,7 +422,7 @@ jit_write_elf(int fd, uint64_t load_addr __maybe_unused, const char *sym,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * build-id generation</div><div class='ctx'> 	 */</div><div class='del'>-	sha1(code, csize, bnote.build_id);</div><div class='add'>+	sha1(build_id_data, build_id_data_len, bnote.build_id);</div><div class='ctx'> 	bnote.desc.namesz = sizeof(bnote.name); /* must include 0 termination */</div><div class='ctx'> 	bnote.desc.descsz = sizeof(bnote.build_id);</div><div class='ctx'> 	bnote.desc.type   = NT_GNU_BUILD_ID;</div><div class='hunk'>@@ -439,7 +467,7 @@ error:</div><div class='ctx'> 	(void)elf_end(e);</div><div class='ctx'> </div><div class='ctx'> 	free(strsym);</div><div class='del'>-</div><div class='add'>+	free(build_id_data);</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/util/get_current_dir_name.c b/tools/perf/util/get_current_dir_name.c<br/>deleted file mode 100644<br/>index e68935e9ac8c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/get_current_dir_name.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/get_current_dir_name.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: LGPL-2.1</div><div class='del'>-// Copyright (C) 2018, 2019 Red Hat Inc, Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;</div><div class='del'>-//</div><div class='del'>-#ifndef HAVE_GET_CURRENT_DIR_NAME</div><div class='del'>-#include "get_current_dir_name.h"</div><div class='del'>-#include &lt;limits.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-#include &lt;unistd.h&gt;</div><div class='del'>-</div><div class='del'>-/* Android's 'bionic' library, for one, doesn't have this */</div><div class='del'>-</div><div class='del'>-char *get_current_dir_name(void)</div><div class='del'>-{</div><div class='del'>-	char pwd[PATH_MAX];</div><div class='del'>-</div><div class='del'>-	return getcwd(pwd, sizeof(pwd)) == NULL ? NULL : strdup(pwd);</div><div class='del'>-}</div><div class='del'>-#endif // HAVE_GET_CURRENT_DIR_NAME</div><div class='head'>diff --git a/tools/perf/util/get_current_dir_name.h b/tools/perf/util/get_current_dir_name.h<br/>deleted file mode 100644<br/>index 69f7d5537d32..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/get_current_dir_name.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/get_current_dir_name.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: LGPL-2.1</div><div class='del'>-// Copyright (C) 2018, 2019 Red Hat Inc, Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;</div><div class='del'>-//</div><div class='del'>-#ifndef __PERF_GET_CURRENT_DIR_NAME_H</div><div class='del'>-#ifndef HAVE_GET_CURRENT_DIR_NAME</div><div class='del'>-char *get_current_dir_name(void);</div><div class='del'>-#endif // HAVE_GET_CURRENT_DIR_NAME</div><div class='del'>-#endif // __PERF_GET_CURRENT_DIR_NAME_H</div><div class='head'>diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c<br/>index 4f2a6e10ed5c..f5cad377c99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/header.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/header.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/header.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/header.c</a></div><div class='hunk'>@@ -335,7 +335,6 @@ static int write_build_id(struct feat_fd *ff,</div><div class='ctx'> 		pr_debug("failed to write buildid table\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='del'>-	perf_session__cache_build_ids(session);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1022,12 +1021,9 @@ static int write_bpf_prog_info(struct feat_fd *ff,</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;env-&gt;bpf_progs.lock);</div><div class='ctx'> </div><div class='del'>-	if (env-&gt;bpf_progs.infos_cnt == 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	ret = do_write(ff, &amp;env-&gt;bpf_progs.infos_cnt,</div><div class='ctx'> 		       sizeof(env-&gt;bpf_progs.infos_cnt));</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (ret &lt; 0 || env-&gt;bpf_progs.infos_cnt == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	root = &amp;env-&gt;bpf_progs.infos;</div><div class='hunk'>@@ -1067,13 +1063,10 @@ static int write_bpf_btf(struct feat_fd *ff,</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;env-&gt;bpf_progs.lock);</div><div class='ctx'> </div><div class='del'>-	if (env-&gt;bpf_progs.btfs_cnt == 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	ret = do_write(ff, &amp;env-&gt;bpf_progs.btfs_cnt,</div><div class='ctx'> 		       sizeof(env-&gt;bpf_progs.btfs_cnt));</div><div class='ctx'> </div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (ret &lt; 0 || env-&gt;bpf_progs.btfs_cnt == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	root = &amp;env-&gt;bpf_progs.btfs;</div><div class='hunk'>@@ -1561,7 +1554,7 @@ static int __write_pmu_caps(struct feat_fd *ff, struct perf_pmu *pmu,</div><div class='ctx'> static int write_cpu_pmu_caps(struct feat_fd *ff,</div><div class='ctx'> 			      struct evlist *evlist __maybe_unused)</div><div class='ctx'> {</div><div class='del'>-	struct perf_pmu *cpu_pmu = perf_pmus__find("cpu");</div><div class='add'>+	struct perf_pmu *cpu_pmu = perf_pmus__find_core_pmu();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_pmu)</div><div class='hunk'>@@ -4541,7 +4534,8 @@ int perf_event__process_event_update(const struct perf_tool *tool __maybe_unused</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_LIBTRACEEVENT</div><div class='del'>-int perf_event__process_tracing_data(struct perf_session *session,</div><div class='add'>+int perf_event__process_tracing_data(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				     struct perf_session *session,</div><div class='ctx'> 				     union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	ssize_t size_read, padding, size = event-&gt;tracing_data.size;</div><div class='hunk'>@@ -4589,7 +4583,8 @@ int perf_event__process_tracing_data(struct perf_session *session,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-int perf_event__process_build_id(struct perf_session *session,</div><div class='add'>+int perf_event__process_build_id(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	__event_process_build_id(&amp;event-&gt;build_id,</div><div class='head'>diff --git a/tools/perf/util/header.h b/tools/perf/util/header.h<br/>index d16dfceccd74..c058021c3150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/header.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/header.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/header.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/header.h</a></div><div class='hunk'>@@ -178,10 +178,12 @@ int perf_event__process_event_update(const struct perf_tool *tool,</div><div class='ctx'> size_t perf_event__fprintf_attr(union perf_event *event, FILE *fp);</div><div class='ctx'> size_t perf_event__fprintf_event_update(union perf_event *event, FILE *fp);</div><div class='ctx'> #ifdef HAVE_LIBTRACEEVENT</div><div class='del'>-int perf_event__process_tracing_data(struct perf_session *session,</div><div class='add'>+int perf_event__process_tracing_data(const struct perf_tool *tool,</div><div class='add'>+				     struct perf_session *session,</div><div class='ctx'> 				     union perf_event *event);</div><div class='ctx'> #endif</div><div class='del'>-int perf_event__process_build_id(struct perf_session *session,</div><div class='add'>+int perf_event__process_build_id(const struct perf_tool *tool,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event);</div><div class='ctx'> bool is_perf_magic(u64 magic);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/hisi-ptt-decoder/Build b/tools/perf/util/hisi-ptt-decoder/Build<br/>index 3298f7b7e308..2ee0eb731656 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hisi-ptt-decoder/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hisi-ptt-decoder/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hisi-ptt-decoder/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/hisi-ptt-decoder/Build</a></div><div class='hunk'>@@ -1 +1 @@</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += hisi-ptt-pkt-decoder.o</div><div class='add'>+perf-util-y += hisi-ptt-pkt-decoder.o</div><div class='head'>diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c<br/>index 64ff427040c3..ef4b569f7df4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hist.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hist.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hist.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/hist.c</a></div><div class='hunk'>@@ -608,10 +608,8 @@ err_infos:</div><div class='ctx'> 		map_symbol__exit(&amp;he-&gt;branch_info-&gt;to.ms);</div><div class='ctx'> 		zfree(&amp;he-&gt;branch_info);</div><div class='ctx'> 	}</div><div class='del'>-	if (he-&gt;mem_info) {</div><div class='del'>-		map_symbol__exit(&amp;mem_info__iaddr(he-&gt;mem_info)-&gt;ms);</div><div class='del'>-		map_symbol__exit(&amp;mem_info__daddr(he-&gt;mem_info)-&gt;ms);</div><div class='del'>-	}</div><div class='add'>+	if (he-&gt;mem_info)</div><div class='add'>+		mem_info__zput(he-&gt;mem_info);</div><div class='ctx'> err:</div><div class='ctx'> 	map_symbol__exit(&amp;he-&gt;ms);</div><div class='ctx'> 	zfree(&amp;he-&gt;stat_acc);</div><div class='head'>diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h<br/>index 70438d03ca9c..1d5ea632ca4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hist.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hist.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hist.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/hist.h</a></div><div class='hunk'>@@ -709,15 +709,18 @@ struct block_hist {</div><div class='ctx'> 	struct hist_entry	he;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define NO_ADDR 0</div><div class='add'>+</div><div class='ctx'> #ifdef HAVE_SLANG_SUPPORT</div><div class='ctx'> #include "../ui/keysyms.h"</div><div class='ctx'> void attr_to_script(char *buf, struct perf_event_attr *attr);</div><div class='ctx'> </div><div class='del'>-int map_symbol__tui_annotate(struct map_symbol *ms, struct evsel *evsel,</div><div class='del'>-			     struct hist_browser_timer *hbt);</div><div class='add'>+int __hist_entry__tui_annotate(struct hist_entry *he, struct map_symbol *ms,</div><div class='add'>+			       struct evsel *evsel,</div><div class='add'>+			       struct hist_browser_timer *hbt, u64 al_addr);</div><div class='ctx'> </div><div class='ctx'> int hist_entry__tui_annotate(struct hist_entry *he, struct evsel *evsel,</div><div class='del'>-			     struct hist_browser_timer *hbt);</div><div class='add'>+			     struct hist_browser_timer *hbt, u64 al_addr);</div><div class='ctx'> </div><div class='ctx'> int evlist__tui_browse_hists(struct evlist *evlist, const char *help, struct hist_browser_timer *hbt,</div><div class='ctx'> 			     float min_pcnt, struct perf_env *env, bool warn_lost_event);</div><div class='hunk'>@@ -742,16 +745,19 @@ int evlist__tui_browse_hists(struct evlist *evlist __maybe_unused,</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static inline int map_symbol__tui_annotate(struct map_symbol *ms __maybe_unused,</div><div class='del'>-					   struct evsel *evsel __maybe_unused,</div><div class='del'>-					   struct hist_browser_timer *hbt __maybe_unused)</div><div class='add'>+static inline int __hist_entry__tui_annotate(struct hist_entry *he __maybe_unused,</div><div class='add'>+					     struct map_symbol *ms __maybe_unused,</div><div class='add'>+					     struct evsel *evsel __maybe_unused,</div><div class='add'>+					     struct hist_browser_timer *hbt __maybe_unused,</div><div class='add'>+					     u64 al_addr __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int hist_entry__tui_annotate(struct hist_entry *he __maybe_unused,</div><div class='ctx'> 					   struct evsel *evsel __maybe_unused,</div><div class='del'>-					   struct hist_browser_timer *hbt __maybe_unused)</div><div class='add'>+					   struct hist_browser_timer *hbt __maybe_unused,</div><div class='add'>+					   u64 al_addr __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/util/hwmon_pmu.c b/tools/perf/util/hwmon_pmu.c<br/>index 416dfea9ffff..279d6b1a47f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hwmon_pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hwmon_pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hwmon_pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/hwmon_pmu.c</a></div><div class='hunk'>@@ -376,7 +376,7 @@ struct perf_pmu *hwmon_pmu__new(struct list_head *pmus, const char *hwmon_dir,</div><div class='ctx'> 		perf_pmu__delete(&amp;hwm-&gt;pmu);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-	hwm-&gt;pmu.cpus = perf_cpu_map__new("0");</div><div class='add'>+	hwm-&gt;pmu.cpus = perf_cpu_map__new_int(0);</div><div class='ctx'> 	if (!hwm-&gt;pmu.cpus) {</div><div class='ctx'> 		perf_pmu__delete(&amp;hwm-&gt;pmu);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -742,8 +742,7 @@ int perf_pmus__read_hwmon_pmus(struct list_head *pmus)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		io__init(&amp;io, name_fd, buf2, sizeof(buf2));</div><div class='del'>-		io__getline(&amp;io, &amp;line, &amp;line_len);</div><div class='del'>-		if (line_len &gt; 0 &amp;&amp; line[line_len - 1] == '\n')</div><div class='add'>+		if (io__getline(&amp;io, &amp;line, &amp;line_len) &gt; 0 &amp;&amp; line[line_len - 1] == '\n')</div><div class='ctx'> 			line[line_len - 1] = '\0';</div><div class='ctx'> 		hwmon_pmu__new(pmus, buf, class_hwmon_ent-&gt;d_name, line);</div><div class='ctx'> 		close(name_fd);</div><div class='head'>diff --git a/tools/perf/util/hwmon_pmu.h b/tools/perf/util/hwmon_pmu.h<br/>index dc711b289ff5..d1e403c8b70b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hwmon_pmu.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/hwmon_pmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/hwmon_pmu.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/hwmon_pmu.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@ enum hwmon_type {</div><div class='ctx'> /**</div><div class='ctx'>  * enum hwmon_item:</div><div class='ctx'>  *</div><div class='del'>- * Similar to enum hwmon_type but describes the item part of a a sysfs filename.</div><div class='add'>+ * Similar to enum hwmon_type but describes the item part of a sysfs filename.</div><div class='ctx'>  *</div><div class='ctx'>  * This enum is exposed for testing.</div><div class='ctx'>  */</div><div class='head'>diff --git a/tools/perf/util/include/linux/linkage.h b/tools/perf/util/include/linux/linkage.h<br/>index 89979ca23c3f..34e2fdfe7300 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/include/linux/linkage.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/include/linux/linkage.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/include/linux/linkage.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/include/linux/linkage.h</a></div><div class='hunk'>@@ -120,7 +120,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> // In the kernel sources (include/linux/cfi_types.h), this has a different</div><div class='del'>-// definition when CONFIG_CFI_CLANG is used, for tools/ just use the !clang</div><div class='add'>+// definition when CONFIG_CFI is used, for tools/ just use the !cfi</div><div class='ctx'> // definition:</div><div class='ctx'> #ifndef SYM_TYPED_START</div><div class='ctx'> #define SYM_TYPED_START(name, linkage, align...)        \</div><div class='head'>diff --git a/tools/perf/util/intel-bts.c b/tools/perf/util/intel-bts.c<br/>index 3625c6224750..382255393fb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-bts.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-bts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-bts.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/intel-bts.c</a></div><div class='hunk'>@@ -777,9 +777,7 @@ static int intel_bts_synth_events(struct intel_bts *bts,</div><div class='ctx'> 	attr.sample_id_all = evsel-&gt;core.attr.sample_id_all;</div><div class='ctx'> 	attr.read_format = evsel-&gt;core.attr.read_format;</div><div class='ctx'> </div><div class='del'>-	id = evsel-&gt;core.id[0] + 1000000000;</div><div class='del'>-	if (!id)</div><div class='del'>-		id = 1;</div><div class='add'>+	id = auxtrace_synth_id_range_start(evsel);</div><div class='ctx'> </div><div class='ctx'> 	if (bts-&gt;synth_opts.branches) {</div><div class='ctx'> 		attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;</div><div class='head'>diff --git a/tools/perf/util/intel-pt-decoder/Build b/tools/perf/util/intel-pt-decoder/Build<br/>index 5b8f0149167d..8fd7e4330044 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt-decoder/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt-decoder/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt-decoder/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/intel-pt-decoder/Build</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-perf-util-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o intel-pt-decoder.o</div><div class='add'>+perf-util-y += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o intel-pt-decoder.o</div><div class='ctx'> </div><div class='ctx'> inat_tables_script = $(srctree)/tools/arch/x86/tools/gen-insn-attr-x86.awk</div><div class='ctx'> inat_tables_maps = $(srctree)/tools/arch/x86/lib/x86-opcode-map.txt</div><div class='hunk'>@@ -7,11 +7,7 @@ $(OUTPUT)util/intel-pt-decoder/inat-tables.c: $(inat_tables_script) $(inat_table</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='ctx'> 	@$(call echo-cmd,gen)$(AWK) -f $(inat_tables_script) $(inat_tables_maps) &gt; $@ || rm -f $@</div><div class='ctx'> </div><div class='del'>-ifeq ($(SRCARCH),x86)</div><div class='del'>-  perf-util-y += inat.o insn.o</div><div class='del'>-else</div><div class='del'>-  perf-util-$(CONFIG_AUXTRACE) += inat.o insn.o</div><div class='del'>-endif</div><div class='add'>+perf-util-y += inat.o insn.o</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)util/intel-pt-decoder/inat.o: $(srctree)/tools/arch/x86/lib/inat.c $(OUTPUT)util/intel-pt-decoder/inat-tables.c</div><div class='ctx'> 	$(call rule_mkdir)</div><div class='head'>diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c<br/>index 8fabddc1c0da..72c7a4e15d61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ static void intel_pt_insn_decoder(struct insn *insn,</div><div class='ctx'> 	intel_pt_insn-&gt;rel = 0;</div><div class='ctx'> 	intel_pt_insn-&gt;emulated_ptwrite = false;</div><div class='ctx'> </div><div class='del'>-	if (insn_is_avx(insn)) {</div><div class='add'>+	if (insn_is_avx_or_xop(insn)) {</div><div class='ctx'> 		intel_pt_insn-&gt;op = INTEL_PT_OP_OTHER;</div><div class='ctx'> 		intel_pt_insn-&gt;branch = INTEL_PT_BR_NO_BRANCH;</div><div class='ctx'> 		intel_pt_insn-&gt;length = insn-&gt;length;</div><div class='head'>diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c<br/>index 9b1011fe4826..fc9eec8b54b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-pt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-pt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/intel-pt.c</a></div><div class='hunk'>@@ -3987,9 +3987,7 @@ static int intel_pt_synth_events(struct intel_pt *pt,</div><div class='ctx'> 	attr.sample_id_all = evsel-&gt;core.attr.sample_id_all;</div><div class='ctx'> 	attr.read_format = evsel-&gt;core.attr.read_format;</div><div class='ctx'> </div><div class='del'>-	id = evsel-&gt;core.id[0] + 1000000000;</div><div class='del'>-	if (!id)</div><div class='del'>-		id = 1;</div><div class='add'>+	id = auxtrace_synth_id_range_start(evsel);</div><div class='ctx'> </div><div class='ctx'> 	if (pt-&gt;synth_opts.branches) {</div><div class='ctx'> 		attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;</div><div class='head'>diff --git a/tools/perf/util/intel-tpebs.c b/tools/perf/util/intel-tpebs.c<br/>index 8c9aee157ec4..3c958d738ca6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-tpebs.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/intel-tpebs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/intel-tpebs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/intel-tpebs.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include "stat.h"</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;sys/file.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;poll.h&gt;</div><div class='ctx'> #include &lt;math.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -216,7 +217,8 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_feature_event(struct perf_session *session,</div><div class='add'>+static int process_feature_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (event-&gt;feat.feat_id &lt; HEADER_LAST_FEATURE)</div><div class='head'>diff --git a/tools/perf/util/jitdump.c b/tools/perf/util/jitdump.c<br/>index b062b1f234b6..f00814e37de9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/jitdump.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/jitdump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/jitdump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/jitdump.c</a></div><div class='hunk'>@@ -233,7 +233,8 @@ jit_open(struct jit_buf_desc *jd, const char *name)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * keep dirname for generating files and mmap records</div><div class='ctx'> 	 */</div><div class='del'>-	strcpy(jd-&gt;dir, name);</div><div class='add'>+	strncpy(jd-&gt;dir, name, PATH_MAX);</div><div class='add'>+	jd-&gt;dir[PATH_MAX - 1] = '\0';</div><div class='ctx'> 	dirname(jd-&gt;dir);</div><div class='ctx'> 	free(buf);</div><div class='ctx'> </div><div class='hunk'>@@ -546,6 +547,8 @@ static int jit_repipe_code_load(struct jit_buf_desc *jd, union jr_entry *jr)</div><div class='ctx'> </div><div class='ctx'> 		if (dso)</div><div class='ctx'> 			dso__set_hit(dso);</div><div class='add'>+</div><div class='add'>+		dso__put(dso);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	perf_sample__exit(&amp;sample);</div><div class='head'>diff --git a/tools/perf/util/kvm-stat.h b/tools/perf/util/kvm-stat.h<br/>index 4249542544bb..a356b839c2ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/kvm-stat.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/kvm-stat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/kvm-stat.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/kvm-stat.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include "symbol.h"</div><div class='ctx'> #include "record.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -190,5 +191,15 @@ static inline struct kvm_info *kvm_info__new(void)</div><div class='ctx'> #define kvm_info__zput(ki) do { } while (0)</div><div class='ctx'> #endif /* HAVE_KVM_STAT_SUPPORT */</div><div class='ctx'> </div><div class='add'>+#define STRDUP_FAIL_EXIT(s)		\</div><div class='add'>+	({	char *_p;		\</div><div class='add'>+		_p = strdup(s);		\</div><div class='add'>+		if (!_p) {		\</div><div class='add'>+			ret = -ENOMEM;	\</div><div class='add'>+			goto EXIT;	\</div><div class='add'>+		}			\</div><div class='add'>+		_p;			\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> extern int kvm_add_default_arch_event(int *argc, const char **argv);</div><div class='ctx'> #endif /* __PERF_KVM_STAT_H */</div><div class='head'>diff --git a/tools/perf/util/libbfd.c b/tools/perf/util/libbfd.c<br/>new file mode 100644<br/>index 000000000000..cc0c474cbfaa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/libbfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/libbfd.c</a></div><div class='hunk'>@@ -0,0 +1,643 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "libbfd.h"</div><div class='add'>+#include "annotate.h"</div><div class='add'>+#include "bpf-event.h"</div><div class='add'>+#include "bpf-utils.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "dso.h"</div><div class='add'>+#include "env.h"</div><div class='add'>+#include "map.h"</div><div class='add'>+#include "srcline.h"</div><div class='add'>+#include "symbol.h"</div><div class='add'>+#include "symbol_conf.h"</div><div class='add'>+#include "util.h"</div><div class='add'>+#include &lt;tools/dis-asm-compat.h&gt;</div><div class='add'>+#ifdef HAVE_LIBBPF_SUPPORT</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='add'>+#include &lt;bpf/btf.h&gt;</div><div class='add'>+#endif</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#define PACKAGE "perf"</div><div class='add'>+#include &lt;bfd.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Implement addr2line using libbfd.</div><div class='add'>+ */</div><div class='add'>+struct a2l_data {</div><div class='add'>+	const char *input;</div><div class='add'>+	u64 addr;</div><div class='add'>+</div><div class='add'>+	bool found;</div><div class='add'>+	const char *filename;</div><div class='add'>+	const char *funcname;</div><div class='add'>+	unsigned int line;</div><div class='add'>+</div><div class='add'>+	bfd *abfd;</div><div class='add'>+	asymbol **syms;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool perf_bfd_lock(void *bfd_mutex)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(bfd_mutex);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool perf_bfd_unlock(void *bfd_mutex)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(bfd_mutex);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void perf_bfd_init(void)</div><div class='add'>+{</div><div class='add'>+	static struct mutex bfd_mutex;</div><div class='add'>+</div><div class='add'>+	mutex_init_recursive(&amp;bfd_mutex);</div><div class='add'>+</div><div class='add'>+	if (bfd_init() != BFD_INIT_MAGIC) {</div><div class='add'>+		pr_err("Error initializing libbfd\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (!bfd_thread_init(perf_bfd_lock, perf_bfd_unlock, &amp;bfd_mutex))</div><div class='add'>+		pr_err("Error initializing libbfd threading\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ensure_bfd_init(void)</div><div class='add'>+{</div><div class='add'>+	static pthread_once_t bfd_init_once = PTHREAD_ONCE_INIT;</div><div class='add'>+</div><div class='add'>+	pthread_once(&amp;bfd_init_once, perf_bfd_init);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bfd_error(const char *string)</div><div class='add'>+{</div><div class='add'>+	const char *errmsg;</div><div class='add'>+</div><div class='add'>+	errmsg = bfd_errmsg(bfd_get_error());</div><div class='add'>+	fflush(stdout);</div><div class='add'>+</div><div class='add'>+	if (string)</div><div class='add'>+		pr_debug("%s: %s\n", string, errmsg);</div><div class='add'>+	else</div><div class='add'>+		pr_debug("%s\n", errmsg);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slurp_symtab(bfd *abfd, struct a2l_data *a2l)</div><div class='add'>+{</div><div class='add'>+	long storage;</div><div class='add'>+	long symcount;</div><div class='add'>+	asymbol **syms;</div><div class='add'>+	bfd_boolean dynamic = FALSE;</div><div class='add'>+</div><div class='add'>+	if ((bfd_get_file_flags(abfd) &amp; HAS_SYMS) == 0)</div><div class='add'>+		return bfd_error(bfd_get_filename(abfd));</div><div class='add'>+</div><div class='add'>+	storage = bfd_get_symtab_upper_bound(abfd);</div><div class='add'>+	if (storage == 0L) {</div><div class='add'>+		storage = bfd_get_dynamic_symtab_upper_bound(abfd);</div><div class='add'>+		dynamic = TRUE;</div><div class='add'>+	}</div><div class='add'>+	if (storage &lt; 0L)</div><div class='add'>+		return bfd_error(bfd_get_filename(abfd));</div><div class='add'>+</div><div class='add'>+	syms = malloc(storage);</div><div class='add'>+	if (dynamic)</div><div class='add'>+		symcount = bfd_canonicalize_dynamic_symtab(abfd, syms);</div><div class='add'>+	else</div><div class='add'>+		symcount = bfd_canonicalize_symtab(abfd, syms);</div><div class='add'>+</div><div class='add'>+	if (symcount &lt; 0) {</div><div class='add'>+		free(syms);</div><div class='add'>+		return bfd_error(bfd_get_filename(abfd));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a2l-&gt;syms = syms;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void find_address_in_section(bfd *abfd, asection *section, void *data)</div><div class='add'>+{</div><div class='add'>+	bfd_vma pc, vma;</div><div class='add'>+	bfd_size_type size;</div><div class='add'>+	struct a2l_data *a2l = data;</div><div class='add'>+	flagword flags;</div><div class='add'>+</div><div class='add'>+	if (a2l-&gt;found)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+#ifdef bfd_get_section_flags</div><div class='add'>+	flags = bfd_get_section_flags(abfd, section);</div><div class='add'>+#else</div><div class='add'>+	flags = bfd_section_flags(section);</div><div class='add'>+#endif</div><div class='add'>+	if ((flags &amp; SEC_ALLOC) == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pc = a2l-&gt;addr;</div><div class='add'>+#ifdef bfd_get_section_vma</div><div class='add'>+	vma = bfd_get_section_vma(abfd, section);</div><div class='add'>+#else</div><div class='add'>+	vma = bfd_section_vma(section);</div><div class='add'>+#endif</div><div class='add'>+#ifdef bfd_get_section_size</div><div class='add'>+	size = bfd_get_section_size(section);</div><div class='add'>+#else</div><div class='add'>+	size = bfd_section_size(section);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (pc &lt; vma || pc &gt;= vma + size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	a2l-&gt;found = bfd_find_nearest_line(abfd, section, a2l-&gt;syms, pc - vma,</div><div class='add'>+					   &amp;a2l-&gt;filename, &amp;a2l-&gt;funcname,</div><div class='add'>+					   &amp;a2l-&gt;line);</div><div class='add'>+</div><div class='add'>+	if (a2l-&gt;filename &amp;&amp; !strlen(a2l-&gt;filename))</div><div class='add'>+		a2l-&gt;filename = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct a2l_data *addr2line_init(const char *path)</div><div class='add'>+{</div><div class='add'>+	bfd *abfd;</div><div class='add'>+	struct a2l_data *a2l = NULL;</div><div class='add'>+</div><div class='add'>+	ensure_bfd_init();</div><div class='add'>+	abfd = bfd_openr(path, NULL);</div><div class='add'>+	if (abfd == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!bfd_check_format(abfd, bfd_object))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	a2l = zalloc(sizeof(*a2l));</div><div class='add'>+	if (a2l == NULL)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	a2l-&gt;abfd = abfd;</div><div class='add'>+	a2l-&gt;input = strdup(path);</div><div class='add'>+	if (a2l-&gt;input == NULL)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (slurp_symtab(abfd, a2l))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	return a2l;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (a2l) {</div><div class='add'>+		zfree((char **)&amp;a2l-&gt;input);</div><div class='add'>+		free(a2l);</div><div class='add'>+	}</div><div class='add'>+	bfd_close(abfd);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void addr2line_cleanup(struct a2l_data *a2l)</div><div class='add'>+{</div><div class='add'>+	if (a2l-&gt;abfd)</div><div class='add'>+		bfd_close(a2l-&gt;abfd);</div><div class='add'>+	zfree((char **)&amp;a2l-&gt;input);</div><div class='add'>+	zfree(&amp;a2l-&gt;syms);</div><div class='add'>+	free(a2l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int inline_list__append_dso_a2l(struct dso *dso,</div><div class='add'>+				       struct inline_node *node,</div><div class='add'>+				       struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	struct a2l_data *a2l = dso__a2l(dso);</div><div class='add'>+	struct symbol *inline_sym = new_inline_sym(dso, sym, a2l-&gt;funcname);</div><div class='add'>+	char *srcline = NULL;</div><div class='add'>+</div><div class='add'>+	if (a2l-&gt;filename)</div><div class='add'>+		srcline = srcline_from_fileline(a2l-&gt;filename, a2l-&gt;line);</div><div class='add'>+</div><div class='add'>+	return inline_list__append(inline_sym, srcline, node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int libbfd__addr2line(const char *dso_name, u64 addr,</div><div class='add'>+		      char **file, unsigned int *line, struct dso *dso,</div><div class='add'>+		      bool unwind_inlines, struct inline_node *node,</div><div class='add'>+		      struct symbol *sym)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct a2l_data *a2l = dso__a2l(dso);</div><div class='add'>+</div><div class='add'>+	if (!a2l) {</div><div class='add'>+		a2l = addr2line_init(dso_name);</div><div class='add'>+		dso__set_a2l(dso, a2l);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (a2l == NULL) {</div><div class='add'>+		if (!symbol_conf.disable_add2line_warn)</div><div class='add'>+			pr_warning("addr2line_init failed for %s\n", dso_name);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a2l-&gt;addr = addr;</div><div class='add'>+	a2l-&gt;found = false;</div><div class='add'>+</div><div class='add'>+	bfd_map_over_sections(a2l-&gt;abfd, find_address_in_section, a2l);</div><div class='add'>+</div><div class='add'>+	if (!a2l-&gt;found)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (unwind_inlines) {</div><div class='add'>+		int cnt = 0;</div><div class='add'>+</div><div class='add'>+		if (node &amp;&amp; inline_list__append_dso_a2l(dso, node, sym))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		while (bfd_find_inliner_info(a2l-&gt;abfd, &amp;a2l-&gt;filename,</div><div class='add'>+					     &amp;a2l-&gt;funcname, &amp;a2l-&gt;line) &amp;&amp;</div><div class='add'>+		       cnt++ &lt; MAX_INLINE_NEST) {</div><div class='add'>+</div><div class='add'>+			if (a2l-&gt;filename &amp;&amp; !strlen(a2l-&gt;filename))</div><div class='add'>+				a2l-&gt;filename = NULL;</div><div class='add'>+</div><div class='add'>+			if (node != NULL) {</div><div class='add'>+				if (inline_list__append_dso_a2l(dso, node, sym))</div><div class='add'>+					return 0;</div><div class='add'>+				// found at least one inline frame</div><div class='add'>+				ret = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (file) {</div><div class='add'>+		*file = a2l-&gt;filename ? strdup(a2l-&gt;filename) : NULL;</div><div class='add'>+		ret = *file ? 1 : 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (line)</div><div class='add'>+		*line = a2l-&gt;line;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dso__free_a2l_libbfd(struct dso *dso)</div><div class='add'>+{</div><div class='add'>+	struct a2l_data *a2l = dso__a2l(dso);</div><div class='add'>+</div><div class='add'>+	if (!a2l)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	addr2line_cleanup(a2l);</div><div class='add'>+</div><div class='add'>+	dso__set_a2l(dso, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bfd_symbols__cmpvalue(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	const asymbol *as = *(const asymbol **)a, *bs = *(const asymbol **)b;</div><div class='add'>+</div><div class='add'>+	if (bfd_asymbol_value(as) != bfd_asymbol_value(bs))</div><div class='add'>+		return bfd_asymbol_value(as) - bfd_asymbol_value(bs);</div><div class='add'>+</div><div class='add'>+	return bfd_asymbol_name(as)[0] - bfd_asymbol_name(bs)[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bfd2elf_binding(asymbol *symbol)</div><div class='add'>+{</div><div class='add'>+	if (symbol-&gt;flags &amp; BSF_WEAK)</div><div class='add'>+		return STB_WEAK;</div><div class='add'>+	if (symbol-&gt;flags &amp; BSF_GLOBAL)</div><div class='add'>+		return STB_GLOBAL;</div><div class='add'>+	if (symbol-&gt;flags &amp; BSF_LOCAL)</div><div class='add'>+		return STB_LOCAL;</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int dso__load_bfd_symbols(struct dso *dso, const char *debugfile)</div><div class='add'>+{</div><div class='add'>+	int err = -1;</div><div class='add'>+	long symbols_size, symbols_count, i;</div><div class='add'>+	asection *section;</div><div class='add'>+	asymbol **symbols, *sym;</div><div class='add'>+	struct symbol *symbol;</div><div class='add'>+	bfd *abfd;</div><div class='add'>+	u64 start, len;</div><div class='add'>+</div><div class='add'>+	ensure_bfd_init();</div><div class='add'>+	abfd = bfd_openr(debugfile, NULL);</div><div class='add'>+	if (!abfd)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='add'>+		pr_debug2("%s: cannot read %s bfd file.\n", __func__,</div><div class='add'>+			  dso__long_name(dso));</div><div class='add'>+		goto out_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bfd_get_flavour(abfd) == bfd_target_elf_flavour)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	symbols_size = bfd_get_symtab_upper_bound(abfd);</div><div class='add'>+	if (symbols_size == 0) {</div><div class='add'>+		bfd_close(abfd);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (symbols_size &lt; 0)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	symbols = malloc(symbols_size);</div><div class='add'>+	if (!symbols)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	symbols_count = bfd_canonicalize_symtab(abfd, symbols);</div><div class='add'>+	if (symbols_count &lt; 0)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	section = bfd_get_section_by_name(abfd, ".text");</div><div class='add'>+	if (section) {</div><div class='add'>+		for (i = 0; i &lt; symbols_count; ++i) {</div><div class='add'>+			if (!strcmp(bfd_asymbol_name(symbols[i]), "__ImageBase") ||</div><div class='add'>+			    !strcmp(bfd_asymbol_name(symbols[i]), "__image_base__"))</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		if (i &lt; symbols_count) {</div><div class='add'>+			/* PE symbols can only have 4 bytes, so use .text high bits */</div><div class='add'>+			u64 text_offset = (section-&gt;vma - (u32)section-&gt;vma)</div><div class='add'>+				+ (u32)bfd_asymbol_value(symbols[i]);</div><div class='add'>+			dso__set_text_offset(dso, text_offset);</div><div class='add'>+			dso__set_text_end(dso, (section-&gt;vma - text_offset) + section-&gt;size);</div><div class='add'>+		} else {</div><div class='add'>+			dso__set_text_offset(dso, section-&gt;vma - section-&gt;filepos);</div><div class='add'>+			dso__set_text_end(dso, section-&gt;filepos + section-&gt;size);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qsort(symbols, symbols_count, sizeof(asymbol *), bfd_symbols__cmpvalue);</div><div class='add'>+</div><div class='add'>+#ifdef bfd_get_section</div><div class='add'>+#define bfd_asymbol_section bfd_get_section</div><div class='add'>+#endif</div><div class='add'>+	for (i = 0; i &lt; symbols_count; ++i) {</div><div class='add'>+		sym = symbols[i];</div><div class='add'>+		section = bfd_asymbol_section(sym);</div><div class='add'>+		if (bfd2elf_binding(sym) &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		while (i + 1 &lt; symbols_count &amp;&amp;</div><div class='add'>+		       bfd_asymbol_section(symbols[i + 1]) == section &amp;&amp;</div><div class='add'>+		       bfd2elf_binding(symbols[i + 1]) &lt; 0)</div><div class='add'>+			i++;</div><div class='add'>+</div><div class='add'>+		if (i + 1 &lt; symbols_count &amp;&amp;</div><div class='add'>+		    bfd_asymbol_section(symbols[i + 1]) == section)</div><div class='add'>+			len = symbols[i + 1]-&gt;value - sym-&gt;value;</div><div class='add'>+		else</div><div class='add'>+			len = section-&gt;size - sym-&gt;value;</div><div class='add'>+</div><div class='add'>+		start = bfd_asymbol_value(sym) - dso__text_offset(dso);</div><div class='add'>+		symbol = symbol__new(start, len, bfd2elf_binding(sym), STT_FUNC,</div><div class='add'>+				     bfd_asymbol_name(sym));</div><div class='add'>+		if (!symbol)</div><div class='add'>+			goto out_free;</div><div class='add'>+</div><div class='add'>+		symbols__insert(dso__symbols(dso), symbol);</div><div class='add'>+	}</div><div class='add'>+#ifdef bfd_get_section</div><div class='add'>+#undef bfd_asymbol_section</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	symbols__fixup_end(dso__symbols(dso), false);</div><div class='add'>+	symbols__fixup_duplicate(dso__symbols(dso));</div><div class='add'>+	dso__set_adjust_symbols(dso, true);</div><div class='add'>+</div><div class='add'>+	err = 0;</div><div class='add'>+out_free:</div><div class='add'>+	free(symbols);</div><div class='add'>+out_close:</div><div class='add'>+	bfd_close(abfd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int libbfd__read_build_id(const char *filename, struct build_id *bid)</div><div class='add'>+{</div><div class='add'>+	size_t size = sizeof(bid-&gt;data);</div><div class='add'>+	int err = -1, fd;</div><div class='add'>+	bfd *abfd;</div><div class='add'>+</div><div class='add'>+	if (!filename)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	if (!is_regular_file(filename))</div><div class='add'>+		return -EWOULDBLOCK;</div><div class='add'>+</div><div class='add'>+	fd = open(filename, O_RDONLY);</div><div class='add'>+	if (fd &lt; 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	ensure_bfd_init();</div><div class='add'>+	abfd = bfd_fdopenr(filename, /*target=*/NULL, fd);</div><div class='add'>+	if (!abfd)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='add'>+		pr_debug2("%s: cannot read %s bfd file.\n", __func__, filename);</div><div class='add'>+		goto out_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!abfd-&gt;build_id || abfd-&gt;build_id-&gt;size &gt; size)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	memcpy(bid-&gt;data, abfd-&gt;build_id-&gt;data, abfd-&gt;build_id-&gt;size);</div><div class='add'>+	memset(bid-&gt;data + abfd-&gt;build_id-&gt;size, 0, size - abfd-&gt;build_id-&gt;size);</div><div class='add'>+	err = bid-&gt;size = abfd-&gt;build_id-&gt;size;</div><div class='add'>+</div><div class='add'>+out_close:</div><div class='add'>+	bfd_close(abfd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int libbfd_filename__read_debuglink(const char *filename, char *debuglink,</div><div class='add'>+				    size_t size)</div><div class='add'>+{</div><div class='add'>+	int err = -1;</div><div class='add'>+	asection *section;</div><div class='add'>+	bfd *abfd;</div><div class='add'>+</div><div class='add'>+	ensure_bfd_init();</div><div class='add'>+	abfd = bfd_openr(filename, NULL);</div><div class='add'>+	if (!abfd)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='add'>+		pr_debug2("%s: cannot read %s bfd file.\n", __func__, filename);</div><div class='add'>+		goto out_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	section = bfd_get_section_by_name(abfd, ".gnu_debuglink");</div><div class='add'>+	if (!section)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	if (section-&gt;size &gt; size)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	if (!bfd_get_section_contents(abfd, section, debuglink, 0,</div><div class='add'>+				      section-&gt;size))</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	err = 0;</div><div class='add'>+</div><div class='add'>+out_close:</div><div class='add'>+	bfd_close(abfd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_bpf_libbfd(struct symbol *sym __maybe_unused,</div><div class='add'>+				   struct annotate_args *args  __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBBPF_SUPPORT</div><div class='add'>+	struct annotation *notes = symbol__annotation(sym);</div><div class='add'>+	struct bpf_prog_linfo *prog_linfo = NULL;</div><div class='add'>+	struct bpf_prog_info_node *info_node;</div><div class='add'>+	int len = sym-&gt;end - sym-&gt;start;</div><div class='add'>+	disassembler_ftype disassemble;</div><div class='add'>+	struct map *map = args-&gt;ms.map;</div><div class='add'>+	struct perf_bpil *info_linear;</div><div class='add'>+	struct disassemble_info info;</div><div class='add'>+	struct dso *dso = map__dso(map);</div><div class='add'>+	int pc = 0, count, sub_id;</div><div class='add'>+	struct btf *btf = NULL;</div><div class='add'>+	char tpath[PATH_MAX];</div><div class='add'>+	size_t buf_size;</div><div class='add'>+	int nr_skip = 0;</div><div class='add'>+	char *buf;</div><div class='add'>+	bfd *bfdf;</div><div class='add'>+	int ret;</div><div class='add'>+	FILE *s;</div><div class='add'>+</div><div class='add'>+	if (dso__binary_type(dso) != DSO_BINARY_TYPE__BPF_PROG_INFO)</div><div class='add'>+		return SYMBOL_ANNOTATE_ERRNO__BPF_INVALID_FILE;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: handling sym %s addr %" PRIx64 " len %" PRIx64 "\n", __func__,</div><div class='add'>+		  sym-&gt;name, sym-&gt;start, sym-&gt;end - sym-&gt;start);</div><div class='add'>+</div><div class='add'>+	memset(tpath, 0, sizeof(tpath));</div><div class='add'>+	perf_exe(tpath, sizeof(tpath));</div><div class='add'>+</div><div class='add'>+	ensure_bfd_init();</div><div class='add'>+	bfdf = bfd_openr(tpath, NULL);</div><div class='add'>+	if (bfdf == NULL)</div><div class='add'>+		abort();</div><div class='add'>+</div><div class='add'>+	if (!bfd_check_format(bfdf, bfd_object))</div><div class='add'>+		abort();</div><div class='add'>+</div><div class='add'>+	s = open_memstream(&amp;buf, &amp;buf_size);</div><div class='add'>+	if (!s) {</div><div class='add'>+		ret = errno;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	init_disassemble_info_compat(&amp;info, s,</div><div class='add'>+				     (fprintf_ftype) fprintf,</div><div class='add'>+				     fprintf_styled);</div><div class='add'>+	info.arch = bfd_get_arch(bfdf);</div><div class='add'>+	info.mach = bfd_get_mach(bfdf);</div><div class='add'>+</div><div class='add'>+	info_node = perf_env__find_bpf_prog_info(dso__bpf_prog(dso)-&gt;env,</div><div class='add'>+						 dso__bpf_prog(dso)-&gt;id);</div><div class='add'>+	if (!info_node) {</div><div class='add'>+		ret = SYMBOL_ANNOTATE_ERRNO__BPF_MISSING_BTF;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	info_linear = info_node-&gt;info_linear;</div><div class='add'>+	sub_id = dso__bpf_prog(dso)-&gt;sub_id;</div><div class='add'>+</div><div class='add'>+	info.buffer = (void *)(uintptr_t)(info_linear-&gt;info.jited_prog_insns);</div><div class='add'>+	info.buffer_length = info_linear-&gt;info.jited_prog_len;</div><div class='add'>+</div><div class='add'>+	if (info_linear-&gt;info.nr_line_info)</div><div class='add'>+		prog_linfo = bpf_prog_linfo__new(&amp;info_linear-&gt;info);</div><div class='add'>+</div><div class='add'>+	if (info_linear-&gt;info.btf_id) {</div><div class='add'>+		struct btf_node *node;</div><div class='add'>+</div><div class='add'>+		node = perf_env__find_btf(dso__bpf_prog(dso)-&gt;env,</div><div class='add'>+					  info_linear-&gt;info.btf_id);</div><div class='add'>+		if (node)</div><div class='add'>+			btf = btf__new((__u8 *)(node-&gt;data),</div><div class='add'>+				       node-&gt;data_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disassemble_init_for_target(&amp;info);</div><div class='add'>+</div><div class='add'>+#ifdef DISASM_FOUR_ARGS_SIGNATURE</div><div class='add'>+	disassemble = disassembler(info.arch,</div><div class='add'>+				   bfd_big_endian(bfdf),</div><div class='add'>+				   info.mach,</div><div class='add'>+				   bfdf);</div><div class='add'>+#else</div><div class='add'>+	disassemble = disassembler(bfdf);</div><div class='add'>+#endif</div><div class='add'>+	if (disassemble == NULL)</div><div class='add'>+		abort();</div><div class='add'>+</div><div class='add'>+	fflush(s);</div><div class='add'>+	do {</div><div class='add'>+		const struct bpf_line_info *linfo = NULL;</div><div class='add'>+		struct disasm_line *dl;</div><div class='add'>+		size_t prev_buf_size;</div><div class='add'>+		const char *srcline;</div><div class='add'>+		u64 addr;</div><div class='add'>+</div><div class='add'>+		addr = pc + ((u64 *)(uintptr_t)(info_linear-&gt;info.jited_ksyms))[sub_id];</div><div class='add'>+		count = disassemble(pc, &amp;info);</div><div class='add'>+</div><div class='add'>+		if (prog_linfo)</div><div class='add'>+			linfo = bpf_prog_linfo__lfind_addr_func(prog_linfo,</div><div class='add'>+								addr, sub_id,</div><div class='add'>+								nr_skip);</div><div class='add'>+</div><div class='add'>+		if (linfo &amp;&amp; btf) {</div><div class='add'>+			srcline = btf__name_by_offset(btf, linfo-&gt;line_off);</div><div class='add'>+			nr_skip++;</div><div class='add'>+		} else</div><div class='add'>+			srcline = NULL;</div><div class='add'>+</div><div class='add'>+		fprintf(s, "\n");</div><div class='add'>+		prev_buf_size = buf_size;</div><div class='add'>+		fflush(s);</div><div class='add'>+</div><div class='add'>+		if (!annotate_opts.hide_src_code &amp;&amp; srcline) {</div><div class='add'>+			args-&gt;offset = -1;</div><div class='add'>+			args-&gt;line = strdup(srcline);</div><div class='add'>+			args-&gt;line_nr = 0;</div><div class='add'>+			args-&gt;fileloc = NULL;</div><div class='add'>+			args-&gt;ms.sym  = sym;</div><div class='add'>+			dl = disasm_line__new(args);</div><div class='add'>+			if (dl) {</div><div class='add'>+				annotation_line__add(&amp;dl-&gt;al,</div><div class='add'>+						     &amp;notes-&gt;src-&gt;source);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		args-&gt;offset = pc;</div><div class='add'>+		args-&gt;line = buf + prev_buf_size;</div><div class='add'>+		args-&gt;line_nr = 0;</div><div class='add'>+		args-&gt;fileloc = NULL;</div><div class='add'>+		args-&gt;ms.sym  = sym;</div><div class='add'>+		dl = disasm_line__new(args);</div><div class='add'>+		if (dl)</div><div class='add'>+			annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+		pc += count;</div><div class='add'>+	} while (count &gt; 0 &amp;&amp; pc &lt; len);</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+out:</div><div class='add'>+	free(prog_linfo);</div><div class='add'>+	btf__free(btf);</div><div class='add'>+	fclose(s);</div><div class='add'>+	bfd_close(bfdf);</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return SYMBOL_ANNOTATE_ERRNO__NO_LIBOPCODES_FOR_BPF;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/libbfd.h b/tools/perf/util/libbfd.h<br/>new file mode 100644<br/>index 000000000000..953886f3d62f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/libbfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/libbfd.h</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __PERF_LIBBFD_H</div><div class='add'>+#define __PERF_LIBBFD_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;stddef.h&gt;</div><div class='add'>+</div><div class='add'>+struct annotate_args;</div><div class='add'>+struct build_id;</div><div class='add'>+struct dso;</div><div class='add'>+struct inline_node;</div><div class='add'>+struct symbol;</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBBFD_SUPPORT</div><div class='add'>+int libbfd__addr2line(const char *dso_name, u64 addr,</div><div class='add'>+		char **file, unsigned int *line, struct dso *dso,</div><div class='add'>+		bool unwind_inlines, struct inline_node *node,</div><div class='add'>+		struct symbol *sym);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void dso__free_a2l_libbfd(struct dso *dso);</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_libbfd(const char *filename, struct symbol *sym,</div><div class='add'>+			     struct annotate_args *args);</div><div class='add'>+</div><div class='add'>+int libbfd__read_build_id(const char *filename, struct build_id *bid);</div><div class='add'>+</div><div class='add'>+int libbfd_filename__read_debuglink(const char *filename, char *debuglink, size_t size);</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_bpf_libbfd(struct symbol *sym, struct annotate_args *args);</div><div class='add'>+</div><div class='add'>+#else // !defined(HAVE_LIBBFD_SUPPORT)</div><div class='add'>+#include "annotate.h"</div><div class='add'>+</div><div class='add'>+static inline int libbfd__addr2line(const char *dso_name __always_unused,</div><div class='add'>+				u64 addr __always_unused,</div><div class='add'>+				char **file __always_unused,</div><div class='add'>+				unsigned int *line __always_unused,</div><div class='add'>+				struct dso *dso __always_unused,</div><div class='add'>+				bool unwind_inlines __always_unused,</div><div class='add'>+				struct inline_node *node __always_unused,</div><div class='add'>+				struct symbol *sym __always_unused)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void dso__free_a2l_libbfd(struct dso *dso __always_unused)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int symbol__disassemble_libbfd(const char *filename __always_unused,</div><div class='add'>+					struct symbol *sym __always_unused,</div><div class='add'>+					struct annotate_args *args __always_unused)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int libbfd__read_build_id(const char *filename __always_unused,</div><div class='add'>+					struct build_id *bid __always_unused)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int libbfd_filename__read_debuglink(const char *filename __always_unused,</div><div class='add'>+						char *debuglink __always_unused,</div><div class='add'>+						size_t size __always_unused)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int symbol__disassemble_bpf_libbfd(struct symbol *sym __always_unused,</div><div class='add'>+						 struct annotate_args *args __always_unused)</div><div class='add'>+{</div><div class='add'>+	return SYMBOL_ANNOTATE_ERRNO__NO_LIBOPCODES_FOR_BPF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif // defined(HAVE_LIBBFD_SUPPORT)</div><div class='add'>+</div><div class='add'>+#endif /* __PERF_LIBBFD_H */</div><div class='head'>diff --git a/tools/perf/util/llvm.c b/tools/perf/util/llvm.c<br/>new file mode 100644<br/>index 000000000000..2ebf1f5f65bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/llvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/llvm.c</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include "llvm.h"</div><div class='add'>+#include "annotate.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "dso.h"</div><div class='add'>+#include "map.h"</div><div class='add'>+#include "namespaces.h"</div><div class='add'>+#include "srcline.h"</div><div class='add'>+#include "symbol.h"</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;linux/zalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='add'>+#include "llvm-c-helpers.h"</div><div class='add'>+#include &lt;llvm-c/Disassembler.h&gt;</div><div class='add'>+#include &lt;llvm-c/Target.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='add'>+static void free_llvm_inline_frames(struct llvm_a2l_frame *inline_frames,</div><div class='add'>+				    int num_frames)</div><div class='add'>+{</div><div class='add'>+	if (inline_frames != NULL) {</div><div class='add'>+		for (int i = 0; i &lt; num_frames; ++i) {</div><div class='add'>+			zfree(&amp;inline_frames[i].filename);</div><div class='add'>+			zfree(&amp;inline_frames[i].funcname);</div><div class='add'>+		}</div><div class='add'>+		zfree(&amp;inline_frames);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int llvm__addr2line(const char *dso_name __maybe_unused, u64 addr __maybe_unused,</div><div class='add'>+		     char **file __maybe_unused, unsigned int *line __maybe_unused,</div><div class='add'>+		     struct dso *dso __maybe_unused, bool unwind_inlines __maybe_unused,</div><div class='add'>+		     struct inline_node *node __maybe_unused, struct symbol *sym __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='add'>+	struct llvm_a2l_frame *inline_frames = NULL;</div><div class='add'>+	int num_frames = llvm_addr2line(dso_name, addr, file, line,</div><div class='add'>+					node &amp;&amp; unwind_inlines, &amp;inline_frames);</div><div class='add'>+</div><div class='add'>+	if (num_frames == 0 || !inline_frames) {</div><div class='add'>+		/* Error, or we didn't want inlines. */</div><div class='add'>+		return num_frames;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_frames; ++i) {</div><div class='add'>+		struct symbol *inline_sym =</div><div class='add'>+			new_inline_sym(dso, sym, inline_frames[i].funcname);</div><div class='add'>+		char *srcline = NULL;</div><div class='add'>+</div><div class='add'>+		if (inline_frames[i].filename) {</div><div class='add'>+			srcline =</div><div class='add'>+				srcline_from_fileline(inline_frames[i].filename,</div><div class='add'>+						      inline_frames[i].line);</div><div class='add'>+		}</div><div class='add'>+		if (inline_list__append(inline_sym, srcline, node) != 0) {</div><div class='add'>+			free_llvm_inline_frames(inline_frames, num_frames);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	free_llvm_inline_frames(inline_frames, num_frames);</div><div class='add'>+</div><div class='add'>+	return num_frames;</div><div class='add'>+#else</div><div class='add'>+	return -1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='add'>+static void init_llvm(void)</div><div class='add'>+{</div><div class='add'>+	static bool init;</div><div class='add'>+</div><div class='add'>+	if (!init) {</div><div class='add'>+		LLVMInitializeAllTargetInfos();</div><div class='add'>+		LLVMInitializeAllTargetMCs();</div><div class='add'>+		LLVMInitializeAllDisassemblers();</div><div class='add'>+		init = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Whenever LLVM wants to resolve an address into a symbol, it calls this</div><div class='add'>+ * callback. We don't ever actually _return_ anything (in particular, because</div><div class='add'>+ * it puts quotation marks around what we return), but we use this as a hint</div><div class='add'>+ * that there is a branch or PC-relative address in the expression that we</div><div class='add'>+ * should add some textual annotation for after the instruction. The caller</div><div class='add'>+ * will use this information to add the actual annotation.</div><div class='add'>+ */</div><div class='add'>+struct symbol_lookup_storage {</div><div class='add'>+	u64 branch_addr;</div><div class='add'>+	u64 pcrel_load_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *</div><div class='add'>+symbol_lookup_callback(void *disinfo, uint64_t value,</div><div class='add'>+		       uint64_t *ref_type,</div><div class='add'>+		       uint64_t address __maybe_unused,</div><div class='add'>+		       const char **ref __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct symbol_lookup_storage *storage = disinfo;</div><div class='add'>+</div><div class='add'>+	if (*ref_type == LLVMDisassembler_ReferenceType_In_Branch)</div><div class='add'>+		storage-&gt;branch_addr = value;</div><div class='add'>+	else if (*ref_type == LLVMDisassembler_ReferenceType_In_PCrel_Load)</div><div class='add'>+		storage-&gt;pcrel_load_addr = value;</div><div class='add'>+	*ref_type = LLVMDisassembler_ReferenceType_InOut_None;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_llvm(const char *filename, struct symbol *sym,</div><div class='add'>+			     struct annotate_args *args __maybe_unused)</div><div class='add'>+{</div><div class='add'>+#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='add'>+	struct annotation *notes = symbol__annotation(sym);</div><div class='add'>+	struct map *map = args-&gt;ms.map;</div><div class='add'>+	struct dso *dso = map__dso(map);</div><div class='add'>+	u64 start = map__rip_2objdump(map, sym-&gt;start);</div><div class='add'>+	/* Malloc-ed buffer containing instructions read from disk. */</div><div class='add'>+	u8 *code_buf = NULL;</div><div class='add'>+	/* Pointer to code to be disassembled. */</div><div class='add'>+	const u8 *buf;</div><div class='add'>+	u64 buf_len;</div><div class='add'>+	u64 pc;</div><div class='add'>+	bool is_64bit;</div><div class='add'>+	char disasm_buf[2048];</div><div class='add'>+	size_t disasm_len;</div><div class='add'>+	struct disasm_line *dl;</div><div class='add'>+	LLVMDisasmContextRef disasm = NULL;</div><div class='add'>+	struct symbol_lookup_storage storage;</div><div class='add'>+	char *line_storage = NULL;</div><div class='add'>+	size_t line_storage_len = 0;</div><div class='add'>+	int ret = -1;</div><div class='add'>+</div><div class='add'>+	if (args-&gt;options-&gt;objdump_path)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	buf = dso__read_symbol(dso, filename, map, sym,</div><div class='add'>+			       &amp;code_buf, &amp;buf_len, &amp;is_64bit);</div><div class='add'>+	if (buf == NULL)</div><div class='add'>+		return errno;</div><div class='add'>+</div><div class='add'>+	init_llvm();</div><div class='add'>+	if (arch__is(args-&gt;arch, "x86")) {</div><div class='add'>+		const char *triplet = is_64bit ? "x86_64-pc-linux" : "i686-pc-linux";</div><div class='add'>+</div><div class='add'>+		disasm = LLVMCreateDisasm(triplet, &amp;storage, /*tag_type=*/0,</div><div class='add'>+					  /*get_op_info=*/NULL, symbol_lookup_callback);</div><div class='add'>+	} else {</div><div class='add'>+		char triplet[64];</div><div class='add'>+</div><div class='add'>+		scnprintf(triplet, sizeof(triplet), "%s-linux-gnu",</div><div class='add'>+			  args-&gt;arch-&gt;name);</div><div class='add'>+		disasm = LLVMCreateDisasm(triplet, &amp;storage, /*tag_type=*/0,</div><div class='add'>+					  /*get_op_info=*/NULL, symbol_lookup_callback);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (disasm == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (args-&gt;options-&gt;disassembler_style &amp;&amp;</div><div class='add'>+	    !strcmp(args-&gt;options-&gt;disassembler_style, "intel"))</div><div class='add'>+		LLVMSetDisasmOptions(disasm,</div><div class='add'>+				     LLVMDisassembler_Option_AsmPrinterVariant);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This needs to be set after AsmPrinterVariant, due to a bug in LLVM;</div><div class='add'>+	 * setting AsmPrinterVariant makes a new instruction printer, making it</div><div class='add'>+	 * forget about the PrintImmHex flag (which is applied before if both</div><div class='add'>+	 * are given to the same call).</div><div class='add'>+	 */</div><div class='add'>+	LLVMSetDisasmOptions(disasm, LLVMDisassembler_Option_PrintImmHex);</div><div class='add'>+</div><div class='add'>+	/* add the function address and name */</div><div class='add'>+	scnprintf(disasm_buf, sizeof(disasm_buf), "%#"PRIx64" &lt;%s&gt;:",</div><div class='add'>+		  start, sym-&gt;name);</div><div class='add'>+</div><div class='add'>+	args-&gt;offset = -1;</div><div class='add'>+	args-&gt;line = disasm_buf;</div><div class='add'>+	args-&gt;line_nr = 0;</div><div class='add'>+	args-&gt;fileloc = NULL;</div><div class='add'>+	args-&gt;ms.sym = sym;</div><div class='add'>+</div><div class='add'>+	dl = disasm_line__new(args);</div><div class='add'>+	if (dl == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+	pc = start;</div><div class='add'>+	for (u64 offset = 0; offset &lt; buf_len; ) {</div><div class='add'>+		unsigned int ins_len;</div><div class='add'>+</div><div class='add'>+		storage.branch_addr = 0;</div><div class='add'>+		storage.pcrel_load_addr = 0;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LLVM's API has the code be disassembled as non-const, cast</div><div class='add'>+		 * here as we may be disassembling from mapped read-only memory.</div><div class='add'>+		 */</div><div class='add'>+		ins_len = LLVMDisasmInstruction(disasm, (u8 *)(buf + offset),</div><div class='add'>+						buf_len - offset, pc,</div><div class='add'>+						disasm_buf, sizeof(disasm_buf));</div><div class='add'>+		if (ins_len == 0)</div><div class='add'>+			goto err;</div><div class='add'>+		disasm_len = strlen(disasm_buf);</div><div class='add'>+</div><div class='add'>+		if (storage.branch_addr != 0) {</div><div class='add'>+			char *name = llvm_name_for_code(dso, filename,</div><div class='add'>+							storage.branch_addr);</div><div class='add'>+			if (name != NULL) {</div><div class='add'>+				disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='add'>+							sizeof(disasm_buf) -</div><div class='add'>+								disasm_len,</div><div class='add'>+							" &lt;%s&gt;", name);</div><div class='add'>+				free(name);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (storage.pcrel_load_addr != 0) {</div><div class='add'>+			char *name = llvm_name_for_data(dso, filename,</div><div class='add'>+							storage.pcrel_load_addr);</div><div class='add'>+			disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='add'>+						sizeof(disasm_buf) - disasm_len,</div><div class='add'>+						"  # %#"PRIx64,</div><div class='add'>+						storage.pcrel_load_addr);</div><div class='add'>+			if (name) {</div><div class='add'>+				disasm_len += scnprintf(disasm_buf + disasm_len,</div><div class='add'>+							sizeof(disasm_buf) -</div><div class='add'>+							disasm_len,</div><div class='add'>+							" &lt;%s&gt;", name);</div><div class='add'>+				free(name);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		args-&gt;offset = offset;</div><div class='add'>+		args-&gt;line = expand_tabs(disasm_buf, &amp;line_storage,</div><div class='add'>+					 &amp;line_storage_len);</div><div class='add'>+		args-&gt;line_nr = 0;</div><div class='add'>+		args-&gt;fileloc = NULL;</div><div class='add'>+		args-&gt;ms.sym = sym;</div><div class='add'>+</div><div class='add'>+		llvm_addr2line(filename, pc, &amp;args-&gt;fileloc,</div><div class='add'>+			       (unsigned int *)&amp;args-&gt;line_nr, false, NULL);</div><div class='add'>+</div><div class='add'>+		dl = disasm_line__new(args);</div><div class='add'>+		if (dl == NULL)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		annotation_line__add(&amp;dl-&gt;al, &amp;notes-&gt;src-&gt;source);</div><div class='add'>+</div><div class='add'>+		free(args-&gt;fileloc);</div><div class='add'>+		pc += ins_len;</div><div class='add'>+		offset += ins_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	LLVMDisasmDispose(disasm);</div><div class='add'>+	free(code_buf);</div><div class='add'>+	free(line_storage);</div><div class='add'>+	return ret;</div><div class='add'>+#else // HAVE_LIBLLVM_SUPPORT</div><div class='add'>+	pr_debug("The LLVM disassembler isn't linked in for %s in %s\n",</div><div class='add'>+		 sym-&gt;name, filename);</div><div class='add'>+	return -1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/llvm.h b/tools/perf/util/llvm.h<br/>new file mode 100644<br/>index 000000000000..57f6bafb24bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/llvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/llvm.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __PERF_LLVM_H</div><div class='add'>+#define __PERF_LLVM_H</div><div class='add'>+</div><div class='add'>+#include &lt;stdbool.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct annotate_args;</div><div class='add'>+struct dso;</div><div class='add'>+struct inline_node;</div><div class='add'>+struct symbol;</div><div class='add'>+</div><div class='add'>+int llvm__addr2line(const char *dso_name, u64 addr,</div><div class='add'>+		char **file, unsigned int *line, struct dso *dso,</div><div class='add'>+		bool unwind_inlines, struct inline_node *node,</div><div class='add'>+		struct symbol *sym);</div><div class='add'>+</div><div class='add'>+int symbol__disassemble_llvm(const char *filename, struct symbol *sym,</div><div class='add'>+			     struct annotate_args *args);</div><div class='add'>+</div><div class='add'>+#endif /* __PERF_LLVM_H */</div><div class='head'>diff --git a/tools/perf/util/lzma.c b/tools/perf/util/lzma.c<br/>index bbcd2ffcf4bd..c355757ed391 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/lzma.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/lzma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/lzma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/lzma.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ bool lzma_is_compressed(const char *input)</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> </div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-		return -1;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	rc = read(fd, buf, sizeof(buf));</div><div class='ctx'> 	close(fd);</div><div class='head'>diff --git a/tools/perf/util/machine.c b/tools/perf/util/machine.c<br/>index b5dd42588c91..841b711d970e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/machine.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/machine.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/machine.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/machine.c</a></div><div class='hunk'>@@ -2124,6 +2124,7 @@ static int add_callchain_ip(struct thread *thread,</div><div class='ctx'> 				*cpumode = PERF_RECORD_MISC_KERNEL;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case PERF_CONTEXT_USER:</div><div class='add'>+			case PERF_CONTEXT_USER_DEFERRED:</div><div class='ctx'> 				*cpumode = PERF_RECORD_MISC_USER;</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='head'>diff --git a/tools/perf/util/map.c b/tools/perf/util/map.c<br/>index b46c68c24d1c..41cdddc987ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/map.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/map.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/map.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/map.c</a></div><div class='hunk'>@@ -513,6 +513,8 @@ void srccode_state_free(struct srccode_state *state)</div><div class='ctx'> 	state-&gt;line = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct kmap *__map__const_kmap(const struct map *map);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * map__rip_2objdump - convert symbol start address to objdump address.</div><div class='ctx'>  * @map: memory map</div><div class='hunk'>@@ -524,9 +526,9 @@ void srccode_state_free(struct srccode_state *state)</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Address suitable for passing to "objdump --start-address="</div><div class='ctx'>  */</div><div class='del'>-u64 map__rip_2objdump(struct map *map, u64 rip)</div><div class='add'>+u64 map__rip_2objdump(const struct map *map, u64 rip)</div><div class='ctx'> {</div><div class='del'>-	struct kmap *kmap = __map__kmap(map);</div><div class='add'>+	const struct kmap *kmap = __map__const_kmap(map);</div><div class='ctx'> 	const struct dso *dso = map__dso(map);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -569,7 +571,7 @@ u64 map__rip_2objdump(struct map *map, u64 rip)</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Memory address.</div><div class='ctx'>  */</div><div class='del'>-u64 map__objdump_2mem(struct map *map, u64 ip)</div><div class='add'>+u64 map__objdump_2mem(const struct map *map, u64 ip)</div><div class='ctx'> {</div><div class='ctx'> 	const struct dso *dso = map__dso(map);</div><div class='ctx'> </div><div class='hunk'>@@ -586,7 +588,7 @@ u64 map__objdump_2mem(struct map *map, u64 ip)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* convert objdump address to relative address.  (To be removed) */</div><div class='del'>-u64 map__objdump_2rip(struct map *map, u64 ip)</div><div class='add'>+u64 map__objdump_2rip(const struct map *map, u64 ip)</div><div class='ctx'> {</div><div class='ctx'> 	const struct dso *dso = map__dso(map);</div><div class='ctx'> </div><div class='hunk'>@@ -618,6 +620,15 @@ struct kmap *__map__kmap(struct map *map)</div><div class='ctx'> 	return (struct kmap *)(&amp;RC_CHK_ACCESS(map)[1]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct kmap *__map__const_kmap(const struct map *map)</div><div class='add'>+{</div><div class='add'>+	const struct dso *dso = map__dso(map);</div><div class='add'>+</div><div class='add'>+	if (!dso || !dso__kernel(dso))</div><div class='add'>+		return NULL;</div><div class='add'>+	return (struct kmap *)(&amp;RC_CHK_ACCESS(map)[1]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct kmap *map__kmap(struct map *map)</div><div class='ctx'> {</div><div class='ctx'> 	struct kmap *kmap = __map__kmap(map);</div><div class='head'>diff --git a/tools/perf/util/map.h b/tools/perf/util/map.h<br/>index 9cadf533a561..979b3e11b9bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/map.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/map.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/map.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/map.h</a></div><div class='hunk'>@@ -133,13 +133,13 @@ static inline u64 map__unmap_ip(const struct map *map, u64 ip_or_rip)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* rip/ip &lt;-&gt; addr suitable for passing to `objdump --start-address=` */</div><div class='del'>-u64 map__rip_2objdump(struct map *map, u64 rip);</div><div class='add'>+u64 map__rip_2objdump(const struct map *map, u64 rip);</div><div class='ctx'> </div><div class='ctx'> /* objdump address -&gt; memory address */</div><div class='del'>-u64 map__objdump_2mem(struct map *map, u64 ip);</div><div class='add'>+u64 map__objdump_2mem(const struct map *map, u64 ip);</div><div class='ctx'> </div><div class='ctx'> /* objdump address -&gt; rip */</div><div class='del'>-u64 map__objdump_2rip(struct map *map, u64 ip);</div><div class='add'>+u64 map__objdump_2rip(const struct map *map, u64 ip);</div><div class='ctx'> </div><div class='ctx'> struct symbol;</div><div class='ctx'> struct thread;</div><div class='head'>diff --git a/tools/perf/util/maps.c b/tools/perf/util/maps.c<br/>index 85b2a93a59ac..c321d4f4d846 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/maps.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/maps.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/maps.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/maps.c</a></div><div class='hunk'>@@ -477,6 +477,7 @@ static int __maps__insert(struct maps *maps, struct map *new)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Insert the value at the end. */</div><div class='ctx'> 	maps_by_address[nr_maps] = map__get(new);</div><div class='add'>+	map__set_kmap_maps(new, maps);</div><div class='ctx'> 	if (maps_by_name)</div><div class='ctx'> 		maps_by_name[nr_maps] = map__get(new);</div><div class='ctx'> </div><div class='hunk'>@@ -502,8 +503,6 @@ static int __maps__insert(struct maps *maps, struct map *new)</div><div class='ctx'> 	if (map__end(new) &lt; map__start(new))</div><div class='ctx'> 		RC_CHK_ACCESS(maps)-&gt;ends_broken = true;</div><div class='ctx'> </div><div class='del'>-	map__set_kmap_maps(new, maps);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -891,6 +890,7 @@ static int __maps__fixup_overlap_and_insert(struct maps *maps, struct map *new)</div><div class='ctx'> 		if (before) {</div><div class='ctx'> 			map__put(maps_by_address[i]);</div><div class='ctx'> 			maps_by_address[i] = before;</div><div class='add'>+			map__set_kmap_maps(before, maps);</div><div class='ctx'> </div><div class='ctx'> 			if (maps_by_name) {</div><div class='ctx'> 				map__put(maps_by_name[ni]);</div><div class='hunk'>@@ -918,6 +918,7 @@ static int __maps__fixup_overlap_and_insert(struct maps *maps, struct map *new)</div><div class='ctx'> 			 */</div><div class='ctx'> 			map__put(maps_by_address[i]);</div><div class='ctx'> 			maps_by_address[i] = map__get(new);</div><div class='add'>+			map__set_kmap_maps(new, maps);</div><div class='ctx'> </div><div class='ctx'> 			if (maps_by_name) {</div><div class='ctx'> 				map__put(maps_by_name[ni]);</div><div class='hunk'>@@ -930,8 +931,9 @@ static int __maps__fixup_overlap_and_insert(struct maps *maps, struct map *new)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			struct map *next = NULL;</div><div class='add'>+			unsigned int nr_maps = maps__nr_maps(maps);</div><div class='ctx'> </div><div class='del'>-			if (i + 1 &lt; maps__nr_maps(maps))</div><div class='add'>+			if (i + 1 &lt; nr_maps)</div><div class='ctx'> 				next = maps_by_address[i + 1];</div><div class='ctx'> </div><div class='ctx'> 			if (!next  || map__start(next) &gt;= map__end(new)) {</div><div class='hunk'>@@ -942,18 +944,34 @@ static int __maps__fixup_overlap_and_insert(struct maps *maps, struct map *new)</div><div class='ctx'> 				 */</div><div class='ctx'> 				map__put(maps_by_address[i]);</div><div class='ctx'> 				maps_by_address[i] = map__get(new);</div><div class='add'>+				map__set_kmap_maps(new, maps);</div><div class='ctx'> </div><div class='ctx'> 				if (maps_by_name) {</div><div class='ctx'> 					map__put(maps_by_name[ni]);</div><div class='ctx'> 					maps_by_name[ni] = map__get(new);</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='del'>-				map__set_kmap_maps(new, maps);</div><div class='del'>-</div><div class='ctx'> 				check_invariants(maps);</div><div class='ctx'> 				return err;</div><div class='ctx'> 			}</div><div class='del'>-			__maps__remove(maps, pos);</div><div class='add'>+			/*</div><div class='add'>+			 * pos fully covers the previous mapping so remove</div><div class='add'>+			 * it. The following is an inlined version of</div><div class='add'>+			 * maps__remove that reuses the already computed</div><div class='add'>+			 * indices.</div><div class='add'>+			 */</div><div class='add'>+			map__put(maps_by_address[i]);</div><div class='add'>+			memmove(&amp;maps_by_address[i],</div><div class='add'>+				&amp;maps_by_address[i + 1],</div><div class='add'>+				(nr_maps - i - 1) * sizeof(*maps_by_address));</div><div class='add'>+</div><div class='add'>+			if (maps_by_name) {</div><div class='add'>+				map__put(maps_by_name[ni]);</div><div class='add'>+				memmove(&amp;maps_by_name[ni],</div><div class='add'>+					&amp;maps_by_name[ni + 1],</div><div class='add'>+					(nr_maps - ni - 1) *  sizeof(*maps_by_name));</div><div class='add'>+			}</div><div class='add'>+			--RC_CHK_ACCESS(maps)-&gt;nr_maps;</div><div class='ctx'> 			check_invariants(maps);</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Maps are ordered but no need to increase `i` as the</div><div class='hunk'>@@ -1019,6 +1037,7 @@ int maps__copy_from(struct maps *dest, struct maps *parent)</div><div class='ctx'> 				err = unwind__prepare_access(dest, new, NULL);</div><div class='ctx'> 				if (!err) {</div><div class='ctx'> 					dest_maps_by_address[i] = new;</div><div class='add'>+					map__set_kmap_maps(new, dest);</div><div class='ctx'> 					if (dest_maps_by_name)</div><div class='ctx'> 						dest_maps_by_name[i] = map__get(new);</div><div class='ctx'> 					RC_CHK_ACCESS(dest)-&gt;nr_maps = i + 1;</div><div class='head'>diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c<br/>index 80b3069427bc..0b49fce251fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mem-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mem-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mem-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/mem-events.c</a></div><div class='hunk'>@@ -303,12 +303,15 @@ int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, char **eve</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_map) {</div><div class='del'>-		if (!perf_cpu_map__equal(cpu_map, cpu_map__online())) {</div><div class='add'>+		struct perf_cpu_map *online = cpu_map__online();</div><div class='add'>+</div><div class='add'>+		if (!perf_cpu_map__equal(cpu_map, online)) {</div><div class='ctx'> 			char buf[200];</div><div class='ctx'> </div><div class='ctx'> 			cpu_map__snprint(cpu_map, buf, sizeof(buf));</div><div class='ctx'> 			pr_warning("Memory events are enabled on a subset of CPUs: %s\n", buf);</div><div class='ctx'> 		}</div><div class='add'>+		perf_cpu_map__put(online);</div><div class='ctx'> 		perf_cpu_map__put(cpu_map);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c<br/>index 595b83142d2c..25c75fdbfc52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/metricgroup.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/metricgroup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/metricgroup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/metricgroup.c</a></div><div class='hunk'>@@ -152,6 +152,8 @@ struct metric {</div><div class='ctx'> 	 * Should events of the metric be grouped?</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool group_events;</div><div class='add'>+	/** Show events even if in the Default metric group. */</div><div class='add'>+	bool default_show_events;</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * Parsed events for the metric. Optional as events may be taken from a</div><div class='ctx'> 	 * different metric whose group contains all the IDs necessary for this</div><div class='hunk'>@@ -255,6 +257,7 @@ static struct metric *metric__new(const struct pmu_metric *pm,</div><div class='ctx'> 	m-&gt;pctx-&gt;sctx.runtime = runtime;</div><div class='ctx'> 	m-&gt;pctx-&gt;sctx.system_wide = system_wide;</div><div class='ctx'> 	m-&gt;group_events = !metric_no_group &amp;&amp; metric__group_events(pm, metric_no_threshold);</div><div class='add'>+	m-&gt;default_show_events = pm-&gt;default_show_events;</div><div class='ctx'> 	m-&gt;metric_refs = NULL;</div><div class='ctx'> 	m-&gt;evlist = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -424,10 +427,18 @@ int metricgroup__for_each_metric(const struct pmu_metrics_table *table, pmu_metr</div><div class='ctx'> 		.fn = fn,</div><div class='ctx'> 		.data = data,</div><div class='ctx'> 	};</div><div class='add'>+	const struct pmu_metrics_table *tables[2] = {</div><div class='add'>+		table,</div><div class='add'>+		pmu_metrics_table__default(),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(tables); i++) {</div><div class='add'>+		int ret;</div><div class='ctx'> </div><div class='del'>-	if (table) {</div><div class='del'>-		int ret = pmu_metrics_table__for_each_metric(table, fn, data);</div><div class='add'>+		if (!tables[i])</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='add'>+		ret = pmu_metrics_table__for_each_metric(tables[i], fn, data);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1323,6 +1334,51 @@ err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* How many times will a given evsel be used in a set of metrics? */</div><div class='add'>+static int count_uses(struct list_head *metric_list, struct evsel *evsel)</div><div class='add'>+{</div><div class='add'>+	const char *metric_id = evsel__metric_id(evsel);</div><div class='add'>+	struct metric *m;</div><div class='add'>+	int uses = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(m, metric_list, nd) {</div><div class='add'>+		if (hashmap__find(m-&gt;pctx-&gt;ids, metric_id, NULL))</div><div class='add'>+			uses++;</div><div class='add'>+	}</div><div class='add'>+	return uses;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Select the evsel that stat-display will use to trigger shadow/metric</div><div class='add'>+ * printing. Pick the least shared non-tool evsel, encouraging metrics to be</div><div class='add'>+ * with a hardware counter that is specific to them.</div><div class='add'>+ */</div><div class='add'>+static struct evsel *pick_display_evsel(struct list_head *metric_list,</div><div class='add'>+					struct evsel **metric_events)</div><div class='add'>+{</div><div class='add'>+	struct evsel *selected = metric_events[0];</div><div class='add'>+	size_t selected_uses;</div><div class='add'>+	bool selected_is_tool;</div><div class='add'>+</div><div class='add'>+	if (!selected)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	selected_uses = count_uses(metric_list, selected);</div><div class='add'>+	selected_is_tool = evsel__is_tool(selected);</div><div class='add'>+	for (int i = 1; metric_events[i]; i++) {</div><div class='add'>+		struct evsel *candidate = metric_events[i];</div><div class='add'>+		size_t candidate_uses = count_uses(metric_list, candidate);</div><div class='add'>+</div><div class='add'>+		if ((selected_is_tool &amp;&amp; !evsel__is_tool(candidate)) ||</div><div class='add'>+		    (candidate_uses &lt; selected_uses)) {</div><div class='add'>+			selected = candidate;</div><div class='add'>+			selected_uses = candidate_uses;</div><div class='add'>+			selected_is_tool = evsel__is_tool(selected);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return selected;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int parse_groups(struct evlist *perf_evlist,</div><div class='ctx'> 			const char *pmu, const char *str,</div><div class='ctx'> 			bool metric_no_group,</div><div class='hunk'>@@ -1430,7 +1486,8 @@ static int parse_groups(struct evlist *perf_evlist,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		me = metricgroup__lookup(&amp;perf_evlist-&gt;metric_events, metric_events[0],</div><div class='add'>+		me = metricgroup__lookup(&amp;perf_evlist-&gt;metric_events,</div><div class='add'>+					 pick_display_evsel(&amp;metric_list, metric_events),</div><div class='ctx'> 					 /*create=*/true);</div><div class='ctx'> </div><div class='ctx'> 		expr = malloc(sizeof(struct metric_expr));</div><div class='hunk'>@@ -1455,9 +1512,20 @@ static int parse_groups(struct evlist *perf_evlist,</div><div class='ctx'> </div><div class='ctx'> 		if (!expr-&gt;metric_name) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='add'>+			free(expr);</div><div class='ctx'> 			free(metric_events);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		if (m-&gt;default_show_events) {</div><div class='add'>+			struct evsel *pos;</div><div class='add'>+</div><div class='add'>+			for (int i = 0; metric_events[i]; i++)</div><div class='add'>+				metric_events[i]-&gt;default_show_events = true;</div><div class='add'>+			evlist__for_each_entry(metric_evlist, pos) {</div><div class='add'>+				if (pos-&gt;metric_leader &amp;&amp; pos-&gt;metric_leader-&gt;default_show_events)</div><div class='add'>+					pos-&gt;default_show_events = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		expr-&gt;metric_threshold = m-&gt;metric_threshold;</div><div class='ctx'> 		expr-&gt;metric_unit = m-&gt;metric_unit;</div><div class='ctx'> 		expr-&gt;metric_events = metric_events;</div><div class='hunk'>@@ -1534,19 +1602,22 @@ static int metricgroup__has_metric_or_groups_callback(const struct pmu_metric *p</div><div class='ctx'> </div><div class='ctx'> bool metricgroup__has_metric_or_groups(const char *pmu, const char *metric_or_groups)</div><div class='ctx'> {</div><div class='del'>-	const struct pmu_metrics_table *table = pmu_metrics_table__find();</div><div class='add'>+	const struct pmu_metrics_table *tables[2] = {</div><div class='add'>+		pmu_metrics_table__find(),</div><div class='add'>+		pmu_metrics_table__default(),</div><div class='add'>+	};</div><div class='ctx'> 	struct metricgroup__has_metric_data data = {</div><div class='ctx'> 		.pmu = pmu,</div><div class='ctx'> 		.metric_or_groups = metric_or_groups,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	if (!table)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return pmu_metrics_table__for_each_metric(table,</div><div class='del'>-						  metricgroup__has_metric_or_groups_callback,</div><div class='del'>-						  &amp;data)</div><div class='del'>-		? true : false;</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(tables); i++) {</div><div class='add'>+		if (pmu_metrics_table__for_each_metric(tables[i],</div><div class='add'>+							metricgroup__has_metric_or_groups_callback,</div><div class='add'>+							&amp;data))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int metricgroup__topdown_max_level_callback(const struct pmu_metric *pm,</div><div class='hunk'>@@ -1607,6 +1678,7 @@ int metricgroup__copy_metric_events(struct evlist *evlist, struct cgroup *cgrp,</div><div class='ctx'> 		pr_debug("copying metric event for cgroup '%s': %s (idx=%d)\n",</div><div class='ctx'> 			 cgrp ? cgrp-&gt;name : "root", evsel-&gt;name, evsel-&gt;core.idx);</div><div class='ctx'> </div><div class='add'>+		new_me-&gt;is_default = old_me-&gt;is_default;</div><div class='ctx'> 		list_for_each_entry(old_expr, &amp;old_me-&gt;head, nd) {</div><div class='ctx'> 			new_expr = malloc(sizeof(*new_expr));</div><div class='ctx'> 			if (!new_expr)</div><div class='hunk'>@@ -1620,6 +1692,7 @@ int metricgroup__copy_metric_events(struct evlist *evlist, struct cgroup *cgrp,</div><div class='ctx'> </div><div class='ctx'> 			new_expr-&gt;metric_unit = old_expr-&gt;metric_unit;</div><div class='ctx'> 			new_expr-&gt;runtime = old_expr-&gt;runtime;</div><div class='add'>+			new_expr-&gt;default_metricgroup_name = old_expr-&gt;default_metricgroup_name;</div><div class='ctx'> </div><div class='ctx'> 			if (old_expr-&gt;metric_refs) {</div><div class='ctx'> 				/* calculate number of metric_events */</div><div class='head'>diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h<br/>index 324880b2ed8f..4be6bfc13c46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/metricgroup.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/metricgroup.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/metricgroup.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/metricgroup.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@ struct cgroup;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * A node in a rblist keyed by the evsel. The global rblist of metric events</div><div class='del'>- * generally exists in perf_stat_config. The evsel is looked up in the rblist</div><div class='add'>+ * generally exists in evlist. The evsel is looked up in the rblist</div><div class='ctx'>  * yielding a list of metric_expr.</div><div class='ctx'>  */</div><div class='ctx'> struct metric_event {</div><div class='head'>diff --git a/tools/perf/util/mmap.c b/tools/perf/util/mmap.c<br/>index a34726219af3..b69f926d314b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mmap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/mmap.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;sys/mman.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;asm/bug.h&gt;</div><div class='ctx'> #include &lt;linux/zalloc.h&gt;</div><div class='head'>diff --git a/tools/perf/util/mutex.c b/tools/perf/util/mutex.c<br/>index bca7f0717f35..7aa1f3f55a7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mutex.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mutex.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mutex.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/mutex.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@ static void check_err(const char *fn, int err)</div><div class='ctx'> </div><div class='ctx'> #define CHECK_ERR(err) check_err(__func__, err)</div><div class='ctx'> </div><div class='del'>-static void __mutex_init(struct mutex *mtx, bool pshared)</div><div class='add'>+static void __mutex_init(struct mutex *mtx, bool pshared, bool recursive)</div><div class='ctx'> {</div><div class='ctx'> 	pthread_mutexattr_t attr;</div><div class='ctx'> </div><div class='hunk'>@@ -27,21 +27,27 @@ static void __mutex_init(struct mutex *mtx, bool pshared)</div><div class='ctx'> 	/* In normal builds enable error checking, such as recursive usage. */</div><div class='ctx'> 	CHECK_ERR(pthread_mutexattr_settype(&amp;attr, PTHREAD_MUTEX_ERRORCHECK));</div><div class='ctx'> #endif</div><div class='add'>+	if (recursive)</div><div class='add'>+		CHECK_ERR(pthread_mutexattr_settype(&amp;attr, PTHREAD_MUTEX_RECURSIVE));</div><div class='ctx'> 	if (pshared)</div><div class='ctx'> 		CHECK_ERR(pthread_mutexattr_setpshared(&amp;attr, PTHREAD_PROCESS_SHARED));</div><div class='del'>-</div><div class='ctx'> 	CHECK_ERR(pthread_mutex_init(&amp;mtx-&gt;lock, &amp;attr));</div><div class='ctx'> 	CHECK_ERR(pthread_mutexattr_destroy(&amp;attr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mutex_init(struct mutex *mtx)</div><div class='ctx'> {</div><div class='del'>-	__mutex_init(mtx, /*pshared=*/false);</div><div class='add'>+	__mutex_init(mtx, /*pshared=*/false, /*recursive=*/false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mutex_init_pshared(struct mutex *mtx)</div><div class='ctx'> {</div><div class='del'>-	__mutex_init(mtx, /*pshared=*/true);</div><div class='add'>+	__mutex_init(mtx, /*pshared=*/true, /*recursive=*/false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mutex_init_recursive(struct mutex *mtx)</div><div class='add'>+{</div><div class='add'>+	__mutex_init(mtx, /*pshared=*/false, /*recursive=*/true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mutex_destroy(struct mutex *mtx)</div><div class='head'>diff --git a/tools/perf/util/mutex.h b/tools/perf/util/mutex.h<br/>index 38458f00846f..70232d8d094f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mutex.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/mutex.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/mutex.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/mutex.h</a></div><div class='hunk'>@@ -104,6 +104,8 @@ void mutex_init(struct mutex *mtx);</div><div class='ctx'>  * process-private attribute.</div><div class='ctx'>  */</div><div class='ctx'> void mutex_init_pshared(struct mutex *mtx);</div><div class='add'>+/* Initializes a mutex that may be recursively held on the same thread. */</div><div class='add'>+void mutex_init_recursive(struct mutex *mtx);</div><div class='ctx'> void mutex_destroy(struct mutex *mtx);</div><div class='ctx'> </div><div class='ctx'> void mutex_lock(struct mutex *mtx) EXCLUSIVE_LOCK_FUNCTION(*mtx);</div><div class='head'>diff --git a/tools/perf/util/namespaces.c b/tools/perf/util/namespaces.c<br/>index 68f5de2d79c7..01502570b32d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/namespaces.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/namespaces.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/namespaces.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/namespaces.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "namespaces.h"</div><div class='ctx'> #include "event.h"</div><div class='del'>-#include "get_current_dir_name.h"</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='hunk'>@@ -293,14 +292,14 @@ void nsinfo__mountns_enter(struct nsinfo *nsi,</div><div class='ctx'> 	if (!nsi || !nsinfo__need_setns(nsi))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (snprintf(curpath, PATH_MAX, "/proc/self/ns/mnt") &gt;= PATH_MAX)</div><div class='add'>+	if (!getcwd(curpath, sizeof(curpath)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	oldcwd = get_current_dir_name();</div><div class='add'>+	oldcwd = strdup(curpath);</div><div class='ctx'> 	if (!oldcwd)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	oldns = open(curpath, O_RDONLY);</div><div class='add'>+	oldns = open("/proc/self/ns/mnt", O_RDONLY);</div><div class='ctx'> 	if (oldns &lt; 0)</div><div class='ctx'> 		goto errout;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c<br/>index 8282ddf68b98..17c1c36a7bf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/parse-events.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "util/event.h"</div><div class='ctx'> #include "util/bpf-filter.h"</div><div class='ctx'> #include "util/stat.h"</div><div class='add'>+#include "util/tool_pmu.h"</div><div class='ctx'> #include "util/util.h"</div><div class='ctx'> #include "tracepoint.h"</div><div class='ctx'> #include &lt;api/fs/tracing_path.h&gt;</div><div class='hunk'>@@ -40,49 +41,7 @@ static int get_config_terms(const struct parse_events_terms *head_config,</div><div class='ctx'> 			    struct list_head *head_terms);</div><div class='ctx'> static int parse_events_terms__copy(const struct parse_events_terms *src,</div><div class='ctx'> 				    struct parse_events_terms *dest);</div><div class='del'>-</div><div class='del'>-const struct event_symbol event_symbols_hw[PERF_COUNT_HW_MAX] = {</div><div class='del'>-	[PERF_COUNT_HW_CPU_CYCLES] = {</div><div class='del'>-		.symbol = "cpu-cycles",</div><div class='del'>-		.alias  = "cycles",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_INSTRUCTIONS] = {</div><div class='del'>-		.symbol = "instructions",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_CACHE_REFERENCES] = {</div><div class='del'>-		.symbol = "cache-references",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_CACHE_MISSES] = {</div><div class='del'>-		.symbol = "cache-misses",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = {</div><div class='del'>-		.symbol = "branch-instructions",</div><div class='del'>-		.alias  = "branches",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_BRANCH_MISSES] = {</div><div class='del'>-		.symbol = "branch-misses",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_BUS_CYCLES] = {</div><div class='del'>-		.symbol = "bus-cycles",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = {</div><div class='del'>-		.symbol = "stalled-cycles-frontend",</div><div class='del'>-		.alias  = "idle-cycles-frontend",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = {</div><div class='del'>-		.symbol = "stalled-cycles-backend",</div><div class='del'>-		.alias  = "idle-cycles-backend",</div><div class='del'>-	},</div><div class='del'>-	[PERF_COUNT_HW_REF_CPU_CYCLES] = {</div><div class='del'>-		.symbol = "ref-cycles",</div><div class='del'>-		.alias  = "",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static int parse_events_terms__to_strbuf(const struct parse_events_terms *terms, struct strbuf *sb);</div><div class='ctx'> </div><div class='ctx'> static const char *const event_types[] = {</div><div class='ctx'> 	[PERF_TYPE_HARDWARE]	= "hardware",</div><div class='hunk'>@@ -126,7 +85,8 @@ static char *get_config_name(const struct parse_events_terms *head_terms)</div><div class='ctx'> 	return get_config_str(head_terms, PARSE_EVENTS__TERM_TYPE_NAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct perf_cpu_map *get_config_cpu(const struct parse_events_terms *head_terms)</div><div class='add'>+static struct perf_cpu_map *get_config_cpu(const struct parse_events_terms *head_terms,</div><div class='add'>+					   bool fake_pmu)</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='ctx'> 	struct perf_cpu_map *cpus = NULL;</div><div class='hunk'>@@ -135,24 +95,33 @@ static struct perf_cpu_map *get_config_cpu(const struct parse_events_terms *head</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(term, &amp;head_terms-&gt;terms, list) {</div><div class='del'>-		if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_CPU) {</div><div class='del'>-			struct perf_cpu_map *term_cpus;</div><div class='add'>+		struct perf_cpu_map *term_cpus;</div><div class='add'>+</div><div class='add'>+		if (term-&gt;type_term != PARSE_EVENTS__TERM_TYPE_CPU)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM) {</div><div class='add'>+			term_cpus = perf_cpu_map__new_int(term-&gt;val.num);</div><div class='add'>+		} else {</div><div class='add'>+			struct perf_pmu *pmu = perf_pmus__find(term-&gt;val.str);</div><div class='ctx'> </div><div class='del'>-			if (term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM) {</div><div class='del'>-				term_cpus = perf_cpu_map__new_int(term-&gt;val.num);</div><div class='add'>+			if (pmu) {</div><div class='add'>+				term_cpus = pmu-&gt;is_core &amp;&amp; perf_cpu_map__is_empty(pmu-&gt;cpus)</div><div class='add'>+					    ? cpu_map__online()</div><div class='add'>+					    : perf_cpu_map__get(pmu-&gt;cpus);</div><div class='ctx'> 			} else {</div><div class='del'>-				struct perf_pmu *pmu = perf_pmus__find(term-&gt;val.str);</div><div class='del'>-</div><div class='del'>-				if (pmu &amp;&amp; perf_cpu_map__is_empty(pmu-&gt;cpus))</div><div class='del'>-					term_cpus = pmu-&gt;is_core ? cpu_map__online() : NULL;</div><div class='del'>-				else if (pmu)</div><div class='del'>-					term_cpus = perf_cpu_map__get(pmu-&gt;cpus);</div><div class='del'>-				else</div><div class='del'>-					term_cpus = perf_cpu_map__new(term-&gt;val.str);</div><div class='add'>+				term_cpus = perf_cpu_map__new(term-&gt;val.str);</div><div class='add'>+				if (!term_cpus &amp;&amp; fake_pmu) {</div><div class='add'>+					/*</div><div class='add'>+					 * Assume the PMU string makes sense on a different</div><div class='add'>+					 * machine and fake a value with all online CPUs.</div><div class='add'>+					 */</div><div class='add'>+					term_cpus = cpu_map__online();</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='del'>-			perf_cpu_map__merge(&amp;cpus, term_cpus);</div><div class='del'>-			perf_cpu_map__put(term_cpus);</div><div class='ctx'> 		}</div><div class='add'>+		perf_cpu_map__merge(&amp;cpus, term_cpus);</div><div class='add'>+		perf_cpu_map__put(term_cpus);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return cpus;</div><div class='hunk'>@@ -247,6 +216,8 @@ __add_event(struct list_head *list, int *idx,</div><div class='ctx'> 						PERF_PMU_FORMAT_VALUE_CONFIG2, "config2");</div><div class='ctx'> 			perf_pmu__warn_invalid_config(pmu, attr-&gt;config3, name,</div><div class='ctx'> 						PERF_PMU_FORMAT_VALUE_CONFIG3, "config3");</div><div class='add'>+			perf_pmu__warn_invalid_config(pmu, attr-&gt;config4, name,</div><div class='add'>+						PERF_PMU_FORMAT_VALUE_CONFIG4, "config4");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -259,8 +230,12 @@ __add_event(struct list_head *list, int *idx,</div><div class='ctx'> 	if (pmu) {</div><div class='ctx'> 		is_pmu_core = pmu-&gt;is_core;</div><div class='ctx'> 		pmu_cpus = perf_cpu_map__get(pmu-&gt;cpus);</div><div class='del'>-		if (perf_cpu_map__is_empty(pmu_cpus))</div><div class='del'>-			pmu_cpus = cpu_map__online();</div><div class='add'>+		if (perf_cpu_map__is_empty(pmu_cpus)) {</div><div class='add'>+			if (perf_pmu__is_tool(pmu))</div><div class='add'>+				pmu_cpus = tool_pmu__cpus(attr);</div><div class='add'>+			else</div><div class='add'>+				pmu_cpus = cpu_map__online();</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		is_pmu_core = (attr-&gt;type == PERF_TYPE_HARDWARE ||</div><div class='ctx'> 			       attr-&gt;type == PERF_TYPE_HW_CACHE);</div><div class='hunk'>@@ -369,13 +344,13 @@ static int parse_aliases(const char *str, const char *const names[][EVSEL__MAX_A</div><div class='ctx'> </div><div class='ctx'> typedef int config_term_func_t(struct perf_event_attr *attr,</div><div class='ctx'> 			       struct parse_events_term *term,</div><div class='del'>-			       struct parse_events_error *err);</div><div class='add'>+			       struct parse_events_state *parse_state);</div><div class='ctx'> static int config_term_common(struct perf_event_attr *attr,</div><div class='ctx'> 			      struct parse_events_term *term,</div><div class='del'>-			      struct parse_events_error *err);</div><div class='add'>+			      struct parse_events_state *parse_state);</div><div class='ctx'> static int config_attr(struct perf_event_attr *attr,</div><div class='ctx'> 		       const struct parse_events_terms *head,</div><div class='del'>-		       struct parse_events_error *err,</div><div class='add'>+		       struct parse_events_state *parse_state,</div><div class='ctx'> 		       config_term_func_t config_term);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -461,85 +436,7 @@ bool parse_events__filter_pmu(const struct parse_events_state *parse_state,</div><div class='ctx'> static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> 				struct list_head *list, struct perf_pmu *pmu,</div><div class='ctx'> 				const struct parse_events_terms *const_parsed_terms,</div><div class='del'>-				struct evsel *first_wildcard_match, u64 alternate_hw_config);</div><div class='del'>-</div><div class='del'>-int parse_events_add_cache(struct list_head *list, int *idx, const char *name,</div><div class='del'>-			   struct parse_events_state *parse_state,</div><div class='del'>-			   struct parse_events_terms *parsed_terms)</div><div class='del'>-{</div><div class='del'>-	struct perf_pmu *pmu = NULL;</div><div class='del'>-	bool found_supported = false;</div><div class='del'>-	const char *config_name = get_config_name(parsed_terms);</div><div class='del'>-	const char *metric_id = get_config_metric_id(parsed_terms);</div><div class='del'>-	struct perf_cpu_map *cpus = get_config_cpu(parsed_terms);</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct evsel *first_wildcard_match = NULL;</div><div class='del'>-</div><div class='del'>-	while ((pmu = perf_pmus__scan_for_event(pmu, name)) != NULL) {</div><div class='del'>-		LIST_HEAD(config_terms);</div><div class='del'>-		struct perf_event_attr attr;</div><div class='del'>-</div><div class='del'>-		if (parse_events__filter_pmu(parse_state, pmu))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (perf_pmu__have_event(pmu, name)) {</div><div class='del'>-			/*</div><div class='del'>-			 * The PMU has the event so add as not a legacy cache</div><div class='del'>-			 * event.</div><div class='del'>-			 */</div><div class='del'>-			ret = parse_events_add_pmu(parse_state, list, pmu,</div><div class='del'>-						   parsed_terms,</div><div class='del'>-						   first_wildcard_match,</div><div class='del'>-						   /*alternate_hw_config=*/PERF_COUNT_HW_MAX);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto out_err;</div><div class='del'>-			if (first_wildcard_match == NULL)</div><div class='del'>-				first_wildcard_match =</div><div class='del'>-					container_of(list-&gt;prev, struct evsel, core.node);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!pmu-&gt;is_core) {</div><div class='del'>-			/* Legacy cache events are only supported by core PMUs. */</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		memset(&amp;attr, 0, sizeof(attr));</div><div class='del'>-		attr.type = PERF_TYPE_HW_CACHE;</div><div class='del'>-</div><div class='del'>-		ret = parse_events__decode_legacy_cache(name, pmu-&gt;type, &amp;attr.config);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		found_supported = true;</div><div class='del'>-</div><div class='del'>-		if (parsed_terms) {</div><div class='del'>-			if (config_attr(&amp;attr, parsed_terms, parse_state-&gt;error,</div><div class='del'>-					config_term_common)) {</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				goto out_err;</div><div class='del'>-			}</div><div class='del'>-			if (get_config_terms(parsed_terms, &amp;config_terms)) {</div><div class='del'>-				ret = -ENOMEM;</div><div class='del'>-				goto out_err;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (__add_event(list, idx, &amp;attr, /*init_attr*/true, config_name ?: name,</div><div class='del'>-				metric_id, pmu, &amp;config_terms, first_wildcard_match,</div><div class='del'>-				cpus, /*alternate_hw_config=*/PERF_COUNT_HW_MAX) == NULL)</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-</div><div class='del'>-		if (first_wildcard_match == NULL)</div><div class='del'>-			first_wildcard_match = container_of(list-&gt;prev, struct evsel, core.node);</div><div class='del'>-		free_config_terms(&amp;config_terms);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_err;</div><div class='del'>-	}</div><div class='del'>-out_err:</div><div class='del'>-	perf_cpu_map__put(cpus);</div><div class='del'>-	return found_supported ? 0 : -EINVAL;</div><div class='del'>-}</div><div class='add'>+				struct evsel *first_wildcard_match);</div><div class='ctx'> </div><div class='ctx'> static void tracepoint_error(struct parse_events_error *e, int err,</div><div class='ctx'> 			     const char *sys, const char *name, int column)</div><div class='hunk'>@@ -767,8 +664,7 @@ int parse_events_add_breakpoint(struct parse_events_state *parse_state,</div><div class='ctx'> 	attr.sample_period = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (head_config) {</div><div class='del'>-		if (config_attr(&amp;attr, head_config, parse_state-&gt;error,</div><div class='del'>-				config_term_common))</div><div class='add'>+		if (config_attr(&amp;attr, head_config, parse_state, config_term_common))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		if (get_config_terms(head_config, &amp;config_terms))</div><div class='hunk'>@@ -811,6 +707,7 @@ const char *parse_events__term_type_str(enum parse_events__term_type term_type)</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_CONFIG1]		= "config1",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_CONFIG2]		= "config2",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_CONFIG3]		= "config3",</div><div class='add'>+		[PARSE_EVENTS__TERM_TYPE_CONFIG4]		= "config4",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_NAME]			= "name",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD]		= "period",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ]		= "freq",</div><div class='hunk'>@@ -831,9 +728,10 @@ const char *parse_events__term_type_str(enum parse_events__term_type term_type)</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE]	= "aux-sample-size",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_METRIC_ID]		= "metric-id",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_RAW]                   = "raw",</div><div class='del'>-		[PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE]          = "legacy-cache",</div><div class='del'>-		[PARSE_EVENTS__TERM_TYPE_HARDWARE]              = "hardware",</div><div class='add'>+		[PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG]	= "legacy-hardware-config",</div><div class='add'>+		[PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG]	= "legacy-cache-config",</div><div class='ctx'> 		[PARSE_EVENTS__TERM_TYPE_CPU]			= "cpu",</div><div class='add'>+		[PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV]         = "ratio-to-prev",</div><div class='ctx'> 	};</div><div class='ctx'> 	if ((unsigned int)term_type &gt;= __PARSE_EVENTS__TERM_TYPE_NR)</div><div class='ctx'> 		return "unknown term";</div><div class='hunk'>@@ -859,6 +757,7 @@ config_term_avail(enum parse_events__term_type term_type, struct parse_events_er</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG1:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG2:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG3:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_NAME:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_METRIC_ID:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD:</div><div class='hunk'>@@ -882,8 +781,9 @@ config_term_avail(enum parse_events__term_type term_type, struct parse_events_er</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_ACTION:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_RAW:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_HARDWARE:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG:</div><div class='ctx'> 	default:</div><div class='ctx'> 		if (!err)</div><div class='ctx'> 			return false;</div><div class='hunk'>@@ -903,12 +803,12 @@ void parse_events__shrink_config_terms(void)</div><div class='ctx'> </div><div class='ctx'> static int config_term_common(struct perf_event_attr *attr,</div><div class='ctx'> 			      struct parse_events_term *term,</div><div class='del'>-			      struct parse_events_error *err)</div><div class='add'>+			      struct parse_events_state *parse_state)</div><div class='ctx'> {</div><div class='del'>-#define CHECK_TYPE_VAL(type)						   \</div><div class='del'>-do {									   \</div><div class='del'>-	if (check_type_val(term, err, PARSE_EVENTS__TERM_TYPE_ ## type)) \</div><div class='del'>-		return -EINVAL;						   \</div><div class='add'>+#define CHECK_TYPE_VAL(type)								\</div><div class='add'>+do {											\</div><div class='add'>+	if (check_type_val(term, parse_state-&gt;error, PARSE_EVENTS__TERM_TYPE_ ## type))	\</div><div class='add'>+		return -EINVAL;								\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> 	switch (term-&gt;type_term) {</div><div class='hunk'>@@ -928,6 +828,10 @@ do {									   \</div><div class='ctx'> 		CHECK_TYPE_VAL(NUM);</div><div class='ctx'> 		attr-&gt;config3 = term-&gt;val.num;</div><div class='ctx'> 		break;</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='add'>+		CHECK_TYPE_VAL(NUM);</div><div class='add'>+		attr-&gt;config4 = term-&gt;val.num;</div><div class='add'>+		break;</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD:</div><div class='ctx'> 		CHECK_TYPE_VAL(NUM);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -939,7 +843,7 @@ do {									   \</div><div class='ctx'> 		if (strcmp(term-&gt;val.str, "no") &amp;&amp;</div><div class='ctx'> 		    parse_branch_str(term-&gt;val.str,</div><div class='ctx'> 				    &amp;attr-&gt;branch_sample_type)) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 					strdup("invalid branch sample type"),</div><div class='ctx'> 					NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -948,7 +852,7 @@ do {									   \</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_TIME:</div><div class='ctx'> 		CHECK_TYPE_VAL(NUM);</div><div class='ctx'> 		if (term-&gt;val.num &gt; 1) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 						strdup("expected 0 or 1"),</div><div class='ctx'> 						NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -990,7 +894,7 @@ do {									   \</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_PERCORE:</div><div class='ctx'> 		CHECK_TYPE_VAL(NUM);</div><div class='ctx'> 		if ((unsigned int)term-&gt;val.num &gt; 1) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 						strdup("expected 0 or 1"),</div><div class='ctx'> 						NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -1005,7 +909,7 @@ do {									   \</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE:</div><div class='ctx'> 		CHECK_TYPE_VAL(NUM);</div><div class='ctx'> 		if (term-&gt;val.num &gt; UINT_MAX) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 						strdup("too big"),</div><div class='ctx'> 						NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -1016,7 +920,7 @@ do {									   \</div><div class='ctx'> </div><div class='ctx'> 		if (term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM) {</div><div class='ctx'> 			if (term-&gt;val.num &gt;= (u64)cpu__max_present_cpu().cpu) {</div><div class='del'>-				parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+				parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 							strdup("too big"),</div><div class='ctx'> 							/*help=*/NULL);</div><div class='ctx'> 				return -EINVAL;</div><div class='hunk'>@@ -1028,8 +932,8 @@ do {									   \</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		map = perf_cpu_map__new(term-&gt;val.str);</div><div class='del'>-		if (!map) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+		if (!map &amp;&amp; !parse_state-&gt;fake_pmu) {</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='ctx'> 						   strdup("not a valid PMU or CPU number"),</div><div class='ctx'> 						   /*help=*/NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -1037,12 +941,27 @@ do {									   \</div><div class='ctx'> 		perf_cpu_map__put(map);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='add'>+		CHECK_TYPE_VAL(STR);</div><div class='add'>+		if (strtod(term-&gt;val.str, NULL) &lt;= 0) {</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='add'>+						   strdup("zero or negative"),</div><div class='add'>+						   NULL);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		if (errno == ERANGE) {</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='add'>+						   strdup("too big"),</div><div class='add'>+						   NULL);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_DRV_CFG:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_USER:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_HARDWARE:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG:</div><div class='ctx'> 	default:</div><div class='del'>-		parse_events_error__handle(err, term-&gt;err_term,</div><div class='add'>+		parse_events_error__handle(parse_state-&gt;error, term-&gt;err_term,</div><div class='ctx'> 					strdup(parse_events__term_type_str(term-&gt;type_term)),</div><div class='ctx'> 					parse_events_formats_error_string(NULL));</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1057,67 +976,72 @@ do {									   \</div><div class='ctx'> 	 * if an invalid config term is provided for legacy events</div><div class='ctx'> 	 * (for example, instructions/badterm/...), which is confusing.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!config_term_avail(term-&gt;type_term, err))</div><div class='add'>+	if (!config_term_avail(term-&gt;type_term, parse_state-&gt;error))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	return 0;</div><div class='ctx'> #undef CHECK_TYPE_VAL</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int config_term_pmu(struct perf_event_attr *attr,</div><div class='del'>-			   struct parse_events_term *term,</div><div class='del'>-			   struct parse_events_error *err)</div><div class='add'>+static bool check_pmu_is_core(__u32 type, const struct parse_events_term *term,</div><div class='add'>+			      struct parse_events_error *err)</div><div class='ctx'> {</div><div class='del'>-	if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE) {</div><div class='del'>-		struct perf_pmu *pmu = perf_pmus__find_by_type(attr-&gt;type);</div><div class='add'>+	struct perf_pmu *pmu = NULL;</div><div class='ctx'> </div><div class='del'>-		if (!pmu) {</div><div class='del'>-			char *err_str;</div><div class='add'>+	/* Avoid loading all PMUs with perf_pmus__find_by_type, just scan the core ones. */</div><div class='add'>+	while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {</div><div class='add'>+		if (pmu-&gt;type == type)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+	parse_events_error__handle(err, term-&gt;err_val,</div><div class='add'>+				strdup("needs a core PMU"),</div><div class='add'>+				NULL);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			if (asprintf(&amp;err_str, "Failed to find PMU for type %d", attr-&gt;type) &gt;= 0)</div><div class='del'>-				parse_events_error__handle(err, term-&gt;err_term,</div><div class='del'>-							   err_str, /*help=*/NULL);</div><div class='add'>+static int config_term_pmu(struct perf_event_attr *attr,</div><div class='add'>+			   struct parse_events_term *term,</div><div class='add'>+			   struct parse_events_state *parse_state)</div><div class='add'>+{</div><div class='add'>+	if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG) {</div><div class='add'>+		if (check_type_val(term, parse_state-&gt;error, PARSE_EVENTS__TERM_TYPE_NUM))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (term-&gt;val.num &gt;= PERF_COUNT_HW_MAX) {</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='add'>+						   strdup("too big"),</div><div class='add'>+						   NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		/*</div><div class='del'>-		 * Rewrite the PMU event to a legacy cache one unless the PMU</div><div class='del'>-		 * doesn't support legacy cache events or the event is present</div><div class='del'>-		 * within the PMU.</div><div class='del'>-		 */</div><div class='del'>-		if (perf_pmu__supports_legacy_cache(pmu) &amp;&amp;</div><div class='del'>-		    !perf_pmu__have_event(pmu, term-&gt;config)) {</div><div class='del'>-			attr-&gt;type = PERF_TYPE_HW_CACHE;</div><div class='del'>-			return parse_events__decode_legacy_cache(term-&gt;config, pmu-&gt;type,</div><div class='del'>-								 &amp;attr-&gt;config);</div><div class='del'>-		} else {</div><div class='del'>-			term-&gt;type_term = PARSE_EVENTS__TERM_TYPE_USER;</div><div class='del'>-			term-&gt;no_value = true;</div><div class='del'>-		}</div><div class='add'>+		if (!check_pmu_is_core(attr-&gt;type, term, parse_state-&gt;error))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		attr-&gt;config = term-&gt;val.num;</div><div class='add'>+		if (perf_pmus__supports_extended_type())</div><div class='add'>+			attr-&gt;config |= (__u64)attr-&gt;type &lt;&lt; PERF_PMU_TYPE_SHIFT;</div><div class='add'>+		attr-&gt;type = PERF_TYPE_HARDWARE;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_HARDWARE) {</div><div class='del'>-		struct perf_pmu *pmu = perf_pmus__find_by_type(attr-&gt;type);</div><div class='del'>-</div><div class='del'>-		if (!pmu) {</div><div class='del'>-			char *err_str;</div><div class='add'>+	if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG) {</div><div class='add'>+		int cache_type, cache_op, cache_result;</div><div class='ctx'> </div><div class='del'>-			if (asprintf(&amp;err_str, "Failed to find PMU for type %d", attr-&gt;type) &gt;= 0)</div><div class='del'>-				parse_events_error__handle(err, term-&gt;err_term,</div><div class='del'>-							   err_str, /*help=*/NULL);</div><div class='add'>+		if (check_type_val(term, parse_state-&gt;error, PARSE_EVENTS__TERM_TYPE_NUM))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		cache_type = term-&gt;val.num &amp; 0xFF;</div><div class='add'>+		cache_op = (term-&gt;val.num &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+		cache_result = (term-&gt;val.num &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+		if ((term-&gt;val.num &amp; ~0xFFFFFF) ||</div><div class='add'>+		     cache_type &gt;= PERF_COUNT_HW_CACHE_MAX ||</div><div class='add'>+		     cache_op &gt;= PERF_COUNT_HW_CACHE_OP_MAX ||</div><div class='add'>+		     cache_result &gt;= PERF_COUNT_HW_CACHE_RESULT_MAX) {</div><div class='add'>+			parse_events_error__handle(parse_state-&gt;error, term-&gt;err_val,</div><div class='add'>+						   strdup("too big"),</div><div class='add'>+						   NULL);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		/*</div><div class='del'>-		 * If the PMU has a sysfs or json event prefer it over</div><div class='del'>-		 * legacy. ARM requires this.</div><div class='del'>-		 */</div><div class='del'>-		if (perf_pmu__have_event(pmu, term-&gt;config)) {</div><div class='del'>-			term-&gt;type_term = PARSE_EVENTS__TERM_TYPE_USER;</div><div class='del'>-			term-&gt;no_value = true;</div><div class='del'>-			term-&gt;alternate_hw_config = true;</div><div class='del'>-		} else {</div><div class='del'>-			attr-&gt;type = PERF_TYPE_HARDWARE;</div><div class='del'>-			attr-&gt;config = term-&gt;val.num;</div><div class='del'>-			if (perf_pmus__supports_extended_type())</div><div class='del'>-				attr-&gt;config |= (__u64)pmu-&gt;type &lt;&lt; PERF_PMU_TYPE_SHIFT;</div><div class='del'>-		}</div><div class='add'>+		if (!check_pmu_is_core(attr-&gt;type, term, parse_state-&gt;error))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		attr-&gt;config = term-&gt;val.num;</div><div class='add'>+		if (perf_pmus__supports_extended_type())</div><div class='add'>+			attr-&gt;config |= (__u64)attr-&gt;type &lt;&lt; PERF_PMU_TYPE_SHIFT;</div><div class='add'>+		attr-&gt;type = PERF_TYPE_HW_CACHE;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (term-&gt;type_term == PARSE_EVENTS__TERM_TYPE_USER ||</div><div class='hunk'>@@ -1128,12 +1052,12 @@ static int config_term_pmu(struct perf_event_attr *attr,</div><div class='ctx'> 		 */</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	return config_term_common(attr, term, err);</div><div class='add'>+	return config_term_common(attr, term, parse_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int config_term_tracepoint(struct perf_event_attr *attr,</div><div class='ctx'> 				  struct parse_events_term *term,</div><div class='del'>-				  struct parse_events_error *err)</div><div class='add'>+				  struct parse_events_state *parse_state)</div><div class='ctx'> {</div><div class='ctx'> 	switch (term-&gt;type_term) {</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CALLGRAPH:</div><div class='hunk'>@@ -1147,12 +1071,15 @@ static int config_term_tracepoint(struct perf_event_attr *attr,</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_OUTPUT:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_ACTION:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE:</div><div class='del'>-		return config_term_common(attr, term, err);</div><div class='add'>+		return config_term_common(attr, term, parse_state);</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_USER:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG1:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG2:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CONFIG3:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_NAME:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ:</div><div class='hunk'>@@ -1162,16 +1089,13 @@ static int config_term_tracepoint(struct perf_event_attr *attr,</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_PERCORE:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_METRIC_ID:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_RAW:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE:</div><div class='del'>-	case PARSE_EVENTS__TERM_TYPE_HARDWARE:</div><div class='ctx'> 	case PARSE_EVENTS__TERM_TYPE_CPU:</div><div class='add'>+	case PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='ctx'> 	default:</div><div class='del'>-		if (err) {</div><div class='del'>-			parse_events_error__handle(err, term-&gt;err_term,</div><div class='add'>+		parse_events_error__handle(parse_state-&gt;error, term-&gt;err_term,</div><div class='ctx'> 					strdup(parse_events__term_type_str(term-&gt;type_term)),</div><div class='ctx'> 					strdup("valid terms: call-graph,stack-size\n")</div><div class='ctx'> 				);</div><div class='del'>-		}</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1180,13 +1104,13 @@ static int config_term_tracepoint(struct perf_event_attr *attr,</div><div class='ctx'> </div><div class='ctx'> static int config_attr(struct perf_event_attr *attr,</div><div class='ctx'> 		       const struct parse_events_terms *head,</div><div class='del'>-		       struct parse_events_error *err,</div><div class='add'>+		       struct parse_events_state *parse_state,</div><div class='ctx'> 		       config_term_func_t config_term)</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(term, &amp;head-&gt;terms, list)</div><div class='del'>-		if (config_term(attr, term, err))</div><div class='add'>+		if (config_term(attr, term, parse_state))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1289,16 +1213,20 @@ do {								\</div><div class='ctx'> 			ADD_CONFIG_TERM_VAL(AUX_SAMPLE_SIZE, aux_sample_size,</div><div class='ctx'> 					    term-&gt;val.num, term-&gt;weak);</div><div class='ctx'> 			break;</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='add'>+			ADD_CONFIG_TERM_STR(RATIO_TO_PREV, term-&gt;val.str, term-&gt;weak);</div><div class='add'>+			break;</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_USER:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG1:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG2:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG3:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_NAME:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_METRIC_ID:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_RAW:</div><div class='del'>-		case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE:</div><div class='del'>-		case PARSE_EVENTS__TERM_TYPE_HARDWARE:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CPU:</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1332,6 +1260,9 @@ static int get_config_chgs(struct perf_pmu *pmu, struct parse_events_terms *head</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG1:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG2:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CONFIG3:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_NAME:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ:</div><div class='hunk'>@@ -1352,9 +1283,8 @@ static int get_config_chgs(struct perf_pmu *pmu, struct parse_events_terms *head</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_METRIC_ID:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_RAW:</div><div class='del'>-		case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE:</div><div class='del'>-		case PARSE_EVENTS__TERM_TYPE_HARDWARE:</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_CPU:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1378,8 +1308,7 @@ int parse_events_add_tracepoint(struct parse_events_state *parse_state,</div><div class='ctx'> 	if (head_config) {</div><div class='ctx'> 		struct perf_event_attr attr;</div><div class='ctx'> </div><div class='del'>-		if (config_attr(&amp;attr, head_config, err,</div><div class='del'>-				config_term_tracepoint))</div><div class='add'>+		if (config_attr(&amp;attr, head_config, parse_state, config_term_tracepoint))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1408,8 +1337,7 @@ static int __parse_events_add_numeric(struct parse_events_state *parse_state,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (head_config) {</div><div class='del'>-		if (config_attr(&amp;attr, head_config, parse_state-&gt;error,</div><div class='del'>-				config_term_common))</div><div class='add'>+		if (config_attr(&amp;attr, head_config, parse_state, config_term_common))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		if (get_config_terms(head_config, &amp;config_terms))</div><div class='hunk'>@@ -1418,7 +1346,7 @@ static int __parse_events_add_numeric(struct parse_events_state *parse_state,</div><div class='ctx'> </div><div class='ctx'> 	name = get_config_name(head_config);</div><div class='ctx'> 	metric_id = get_config_metric_id(head_config);</div><div class='del'>-	cpus = get_config_cpu(head_config);</div><div class='add'>+	cpus = get_config_cpu(head_config, parse_state-&gt;fake_pmu);</div><div class='ctx'> 	ret = __add_event(list, &amp;parse_state-&gt;idx, &amp;attr, /*init_attr*/true, name,</div><div class='ctx'> 			metric_id, pmu, &amp;config_terms, first_wildcard_match,</div><div class='ctx'> 			cpus, /*alternate_hw_config=*/PERF_COUNT_HW_MAX) ? 0 : -ENOMEM;</div><div class='hunk'>@@ -1479,8 +1407,9 @@ static bool config_term_percore(struct list_head *config_terms)</div><div class='ctx'> static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> 				struct list_head *list, struct perf_pmu *pmu,</div><div class='ctx'> 				const struct parse_events_terms *const_parsed_terms,</div><div class='del'>-				struct evsel *first_wildcard_match, u64 alternate_hw_config)</div><div class='add'>+				struct evsel *first_wildcard_match)</div><div class='ctx'> {</div><div class='add'>+	u64 alternate_hw_config = PERF_COUNT_HW_MAX;</div><div class='ctx'> 	struct perf_event_attr attr;</div><div class='ctx'> 	struct perf_pmu_info info;</div><div class='ctx'> 	struct evsel *evsel;</div><div class='hunk'>@@ -1531,7 +1460,7 @@ static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> 	fix_raw(&amp;parsed_terms, pmu);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure attr/terms with a known PMU, this will set hardcoded terms. */</div><div class='del'>-	if (config_attr(&amp;attr, &amp;parsed_terms, parse_state-&gt;error, config_term_pmu)) {</div><div class='add'>+	if (config_attr(&amp;attr, &amp;parsed_terms, parse_state, config_term_pmu)) {</div><div class='ctx'> 		parse_events_terms__exit(&amp;parsed_terms);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1555,7 +1484,7 @@ static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> </div><div class='ctx'> 	/* Configure attr/terms again if an alias was expanded. */</div><div class='ctx'> 	if (alias_rewrote_terms &amp;&amp;</div><div class='del'>-	    config_attr(&amp;attr, &amp;parsed_terms, parse_state-&gt;error, config_term_pmu)) {</div><div class='add'>+	    config_attr(&amp;attr, &amp;parsed_terms, parse_state, config_term_pmu)) {</div><div class='ctx'> 		parse_events_terms__exit(&amp;parsed_terms);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1583,7 +1512,7 @@ static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	term_cpu = get_config_cpu(&amp;parsed_terms);</div><div class='add'>+	term_cpu = get_config_cpu(&amp;parsed_terms, parse_state-&gt;fake_pmu);</div><div class='ctx'> 	evsel = __add_event(list, &amp;parse_state-&gt;idx, &amp;attr, /*init_attr=*/true,</div><div class='ctx'> 			    get_config_name(&amp;parsed_terms),</div><div class='ctx'> 			    get_config_metric_id(&amp;parsed_terms), pmu,</div><div class='hunk'>@@ -1613,7 +1542,7 @@ static int parse_events_add_pmu(struct parse_events_state *parse_state,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int parse_events_multi_pmu_add(struct parse_events_state *parse_state,</div><div class='del'>-			       const char *event_name, u64 hw_config,</div><div class='add'>+			       const char *event_name,</div><div class='ctx'> 			       const struct parse_events_terms *const_parsed_terms,</div><div class='ctx'> 			       struct list_head **listp, void *loc_)</div><div class='ctx'> {</div><div class='hunk'>@@ -1665,7 +1594,7 @@ int parse_events_multi_pmu_add(struct parse_events_state *parse_state,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (!parse_events_add_pmu(parse_state, list, pmu,</div><div class='del'>-					  &amp;parsed_terms, first_wildcard_match, hw_config)) {</div><div class='add'>+					  &amp;parsed_terms, first_wildcard_match)) {</div><div class='ctx'> 			struct strbuf sb;</div><div class='ctx'> </div><div class='ctx'> 			strbuf_init(&amp;sb, /*hint=*/ 0);</div><div class='hunk'>@@ -1680,7 +1609,7 @@ int parse_events_multi_pmu_add(struct parse_events_state *parse_state,</div><div class='ctx'> </div><div class='ctx'> 	if (parse_state-&gt;fake_pmu) {</div><div class='ctx'> 		if (!parse_events_add_pmu(parse_state, list, perf_pmus__fake_pmu(), &amp;parsed_terms,</div><div class='del'>-					 first_wildcard_match, hw_config)) {</div><div class='add'>+					  first_wildcard_match)) {</div><div class='ctx'> 			struct strbuf sb;</div><div class='ctx'> </div><div class='ctx'> 			strbuf_init(&amp;sb, /*hint=*/ 0);</div><div class='hunk'>@@ -1722,15 +1651,13 @@ int parse_events_multi_pmu_add_or_add_pmu(struct parse_events_state *parse_state</div><div class='ctx'> 	/* Attempt to add to list assuming event_or_pmu is a PMU name. */</div><div class='ctx'> 	pmu = perf_pmus__find(event_or_pmu);</div><div class='ctx'> 	if (pmu &amp;&amp; !parse_events_add_pmu(parse_state, *listp, pmu, const_parsed_terms,</div><div class='del'>-					 first_wildcard_match,</div><div class='del'>-					 /*alternate_hw_config=*/PERF_COUNT_HW_MAX))</div><div class='add'>+					 first_wildcard_match))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (parse_state-&gt;fake_pmu) {</div><div class='ctx'> 		if (!parse_events_add_pmu(parse_state, *listp, perf_pmus__fake_pmu(),</div><div class='ctx'> 					  const_parsed_terms,</div><div class='del'>-					  first_wildcard_match,</div><div class='del'>-					  /*alternate_hw_config=*/PERF_COUNT_HW_MAX))</div><div class='add'>+					  first_wildcard_match))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1743,8 +1670,7 @@ int parse_events_multi_pmu_add_or_add_pmu(struct parse_events_state *parse_state</div><div class='ctx'> </div><div class='ctx'> 		if (!parse_events_add_pmu(parse_state, *listp, pmu,</div><div class='ctx'> 					  const_parsed_terms,</div><div class='del'>-					  first_wildcard_match,</div><div class='del'>-					  /*alternate_hw_config=*/PERF_COUNT_HW_MAX)) {</div><div class='add'>+					  first_wildcard_match)) {</div><div class='ctx'> 			ok++;</div><div class='ctx'> 			parse_state-&gt;wild_card_pmus = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1758,7 +1684,7 @@ int parse_events_multi_pmu_add_or_add_pmu(struct parse_events_state *parse_state</div><div class='ctx'> </div><div class='ctx'> 	/* Failure to add, assume event_or_pmu is an event name. */</div><div class='ctx'> 	zfree(listp);</div><div class='del'>-	if (!parse_events_multi_pmu_add(parse_state, event_or_pmu, PERF_COUNT_HW_MAX,</div><div class='add'>+	if (!parse_events_multi_pmu_add(parse_state, event_or_pmu,</div><div class='ctx'> 					const_parsed_terms, listp, loc))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1892,6 +1818,8 @@ static int parse_events__modifier_list(struct parse_events_state *parse_state,</div><div class='ctx'> 			evsel-&gt;bpf_counter = true;</div><div class='ctx'> 		if (mod.retire_lat)</div><div class='ctx'> 			evsel-&gt;retire_lat = true;</div><div class='add'>+		if (mod.dont_regroup)</div><div class='add'>+			evsel-&gt;dont_regroup = true;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1929,7 +1857,6 @@ int parse_events__set_default_name(struct list_head *list, char *name)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int parse_events__scanner(const char *str,</div><div class='del'>-				 FILE *input,</div><div class='ctx'> 				 struct parse_events_state *parse_state)</div><div class='ctx'> {</div><div class='ctx'> 	YY_BUFFER_STATE buffer;</div><div class='hunk'>@@ -1940,10 +1867,7 @@ static int parse_events__scanner(const char *str,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (str)</div><div class='del'>-		buffer = parse_events__scan_string(str, scanner);</div><div class='del'>-	else</div><div class='del'>-	        parse_events_set_in(input, scanner);</div><div class='add'>+	buffer = parse_events__scan_string(str, scanner);</div><div class='ctx'> </div><div class='ctx'> #ifdef PARSER_DEBUG</div><div class='ctx'> 	parse_events_debug = 1;</div><div class='hunk'>@@ -1951,10 +1875,8 @@ static int parse_events__scanner(const char *str,</div><div class='ctx'> #endif</div><div class='ctx'> 	ret = parse_events_parse(parse_state, scanner);</div><div class='ctx'> </div><div class='del'>-	if (str) {</div><div class='del'>-		parse_events__flush_buffer(buffer, scanner);</div><div class='del'>-		parse_events__delete_buffer(buffer, scanner);</div><div class='del'>-	}</div><div class='add'>+	parse_events__flush_buffer(buffer, scanner);</div><div class='add'>+	parse_events__delete_buffer(buffer, scanner);</div><div class='ctx'> 	parse_events_lex_destroy(scanner);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1962,7 +1884,7 @@ static int parse_events__scanner(const char *str,</div><div class='ctx'> /*</div><div class='ctx'>  * parse event config string, return a list of event terms.</div><div class='ctx'>  */</div><div class='del'>-int parse_events_terms(struct parse_events_terms *terms, const char *str, FILE *input)</div><div class='add'>+int parse_events_terms(struct parse_events_terms *terms, const char *str)</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_state parse_state = {</div><div class='ctx'> 		.terms  = NULL,</div><div class='hunk'>@@ -1970,7 +1892,7 @@ int parse_events_terms(struct parse_events_terms *terms, const char *str, FILE *</div><div class='ctx'> 	};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = parse_events__scanner(str, input, &amp;parse_state);</div><div class='add'>+	ret = parse_events__scanner(str, &amp;parse_state);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		list_splice(&amp;parse_state.terms-&gt;terms, &amp;terms-&gt;terms);</div><div class='ctx'> </div><div class='hunk'>@@ -2067,14 +1989,18 @@ static int evlist__cmp(void *_fg_idx, const struct list_head *l, const struct li</div><div class='ctx'> 	 * event's index is used. An index may be forced for events that</div><div class='ctx'> 	 * must be in the same group, namely Intel topdown events.</div><div class='ctx'> 	 */</div><div class='del'>-	if (*force_grouped_idx != -1 &amp;&amp; arch_evsel__must_be_in_group(lhs)) {</div><div class='add'>+	if (lhs-&gt;dont_regroup) {</div><div class='add'>+		lhs_sort_idx = lhs_core-&gt;idx;</div><div class='add'>+	} else if (*force_grouped_idx != -1 &amp;&amp; arch_evsel__must_be_in_group(lhs)) {</div><div class='ctx'> 		lhs_sort_idx = *force_grouped_idx;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bool lhs_has_group = lhs_core-&gt;leader != lhs_core || lhs_core-&gt;nr_members &gt; 1;</div><div class='ctx'> </div><div class='ctx'> 		lhs_sort_idx = lhs_has_group ? lhs_core-&gt;leader-&gt;idx : lhs_core-&gt;idx;</div><div class='ctx'> 	}</div><div class='del'>-	if (*force_grouped_idx != -1 &amp;&amp; arch_evsel__must_be_in_group(rhs)) {</div><div class='add'>+	if (rhs-&gt;dont_regroup) {</div><div class='add'>+		rhs_sort_idx = rhs_core-&gt;idx;</div><div class='add'>+	} else if (*force_grouped_idx != -1 &amp;&amp; arch_evsel__must_be_in_group(rhs)) {</div><div class='ctx'> 		rhs_sort_idx = *force_grouped_idx;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bool rhs_has_group = rhs_core-&gt;leader != rhs_core || rhs_core-&gt;nr_members &gt; 1;</div><div class='hunk'>@@ -2172,10 +2098,10 @@ static int parse_events__sort_events_and_fix_groups(struct list_head *list)</div><div class='ctx'> 	 */</div><div class='ctx'> 	idx = 0;</div><div class='ctx'> 	list_for_each_entry(pos, list, core.node) {</div><div class='del'>-		const struct evsel *pos_leader = evsel__leader(pos);</div><div class='add'>+		struct evsel *pos_leader = evsel__leader(pos);</div><div class='ctx'> 		const char *pos_pmu_name = pos-&gt;group_pmu_name;</div><div class='ctx'> 		const char *cur_leader_pmu_name;</div><div class='del'>-		bool pos_force_grouped = force_grouped_idx != -1 &amp;&amp;</div><div class='add'>+		bool pos_force_grouped = force_grouped_idx != -1 &amp;&amp; !pos-&gt;dont_regroup &amp;&amp;</div><div class='ctx'> 			arch_evsel__must_be_in_group(pos);</div><div class='ctx'> </div><div class='ctx'> 		/* Reset index and nr_members. */</div><div class='hunk'>@@ -2188,13 +2114,12 @@ static int parse_events__sort_events_and_fix_groups(struct list_head *list)</div><div class='ctx'> 		 * Set the group leader respecting the given groupings and that</div><div class='ctx'> 		 * groups can't span PMUs.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!cur_leader) {</div><div class='del'>-			cur_leader = pos;</div><div class='del'>-			cur_leaders_grp = &amp;pos-&gt;core;</div><div class='add'>+		if (!cur_leader || pos-&gt;dont_regroup) {</div><div class='add'>+			cur_leader = pos-&gt;dont_regroup ? pos_leader : pos;</div><div class='add'>+			cur_leaders_grp = &amp;cur_leader-&gt;core;</div><div class='ctx'> 			if (pos_force_grouped)</div><div class='ctx'> 				force_grouped_leader = pos;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 		cur_leader_pmu_name = cur_leader-&gt;group_pmu_name;</div><div class='ctx'> 		if (strcmp(cur_leader_pmu_name, pos_pmu_name)) {</div><div class='ctx'> 			/* PMU changed so the group/leader must change. */</div><div class='hunk'>@@ -2275,7 +2200,7 @@ int __parse_events(struct evlist *evlist, const char *str, const char *pmu_filte</div><div class='ctx'> 	};</div><div class='ctx'> 	int ret, ret2;</div><div class='ctx'> </div><div class='del'>-	ret = parse_events__scanner(str, /*input=*/ NULL, &amp;parse_state);</div><div class='add'>+	ret = parse_events__scanner(str, &amp;parse_state);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret &amp;&amp; list_empty(&amp;parse_state.list)) {</div><div class='ctx'> 		WARN_ONCE(true, "WARNING: event parser found nothing\n");</div><div class='hunk'>@@ -2327,6 +2252,8 @@ int parse_event(struct evlist *evlist, const char *str)</div><div class='ctx'> </div><div class='ctx'> 	parse_events_error__init(&amp;err);</div><div class='ctx'> 	ret = parse_events(evlist, str, &amp;err);</div><div class='add'>+	if (ret &amp;&amp; verbose &gt; 0)</div><div class='add'>+		parse_events_error__print(&amp;err, str);</div><div class='ctx'> 	parse_events_error__exit(&amp;err);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2823,7 +2750,7 @@ void parse_events_terms__delete(struct parse_events_terms *terms)</div><div class='ctx'> 	free(terms);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int parse_events_terms__to_strbuf(const struct parse_events_terms *terms, struct strbuf *sb)</div><div class='add'>+static int parse_events_terms__to_strbuf(const struct parse_events_terms *terms, struct strbuf *sb)</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='ctx'> 	bool first = true;</div><div class='head'>diff --git a/tools/perf/util/parse-events.h b/tools/perf/util/parse-events.h<br/>index 62dc7202e3ba..3577ab213730 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/parse-events.h</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;sys/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -60,6 +59,7 @@ enum parse_events__term_type {</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_CONFIG1,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_CONFIG2,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_CONFIG3,</div><div class='add'>+	PARSE_EVENTS__TERM_TYPE_CONFIG4,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_NAME,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ,</div><div class='hunk'>@@ -80,10 +80,11 @@ enum parse_events__term_type {</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_METRIC_ID,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_RAW,</div><div class='del'>-	PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE,</div><div class='del'>-	PARSE_EVENTS__TERM_TYPE_HARDWARE,</div><div class='ctx'> 	PARSE_EVENTS__TERM_TYPE_CPU,</div><div class='del'>-#define	__PARSE_EVENTS__TERM_TYPE_NR (PARSE_EVENTS__TERM_TYPE_CPU + 1)</div><div class='add'>+	PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV,</div><div class='add'>+	PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG,</div><div class='add'>+	PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG,</div><div class='add'>+#define	__PARSE_EVENTS__TERM_TYPE_NR (PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG + 1)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct parse_events_term {</div><div class='hunk'>@@ -131,12 +132,6 @@ struct parse_events_term {</div><div class='ctx'> 	 * value is assumed to be 1. An event name also has no value.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool no_value;</div><div class='del'>-	/**</div><div class='del'>-	 * @alternate_hw_config: config is the event name but num is an</div><div class='del'>-	 * alternate PERF_TYPE_HARDWARE config value which is often nice for the</div><div class='del'>-	 * sake of quick matching.</div><div class='del'>-	 */</div><div class='del'>-	bool alternate_hw_config;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct parse_events_error {</div><div class='hunk'>@@ -198,8 +193,7 @@ void parse_events_term__delete(struct parse_events_term *term);</div><div class='ctx'> void parse_events_terms__delete(struct parse_events_terms *terms);</div><div class='ctx'> void parse_events_terms__init(struct parse_events_terms *terms);</div><div class='ctx'> void parse_events_terms__exit(struct parse_events_terms *terms);</div><div class='del'>-int parse_events_terms(struct parse_events_terms *terms, const char *str, FILE *input);</div><div class='del'>-int parse_events_terms__to_strbuf(const struct parse_events_terms *terms, struct strbuf *sb);</div><div class='add'>+int parse_events_terms(struct parse_events_terms *terms, const char *str);</div><div class='ctx'> </div><div class='ctx'> struct parse_events_modifier {</div><div class='ctx'> 	u8 precise;	/* Number of repeated 'p' for precision. */</div><div class='hunk'>@@ -216,6 +210,7 @@ struct parse_events_modifier {</div><div class='ctx'> 	bool guest : 1;		/* 'G' */</div><div class='ctx'> 	bool host : 1;		/* 'H' */</div><div class='ctx'> 	bool retire_lat : 1;	/* 'R' */</div><div class='add'>+	bool dont_regroup : 1;	/* 'X' */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int parse_events__modifier_event(struct parse_events_state *parse_state, void *loc,</div><div class='hunk'>@@ -233,9 +228,6 @@ int parse_events_add_numeric(struct parse_events_state *parse_state,</div><div class='ctx'> 			     u32 type, u64 config,</div><div class='ctx'> 			     const struct parse_events_terms *head_config,</div><div class='ctx'> 			     bool wildcard);</div><div class='del'>-int parse_events_add_cache(struct list_head *list, int *idx, const char *name,</div><div class='del'>-			   struct parse_events_state *parse_state,</div><div class='del'>-			   struct parse_events_terms *parsed_terms);</div><div class='ctx'> int parse_events__decode_legacy_cache(const char *name, int pmu_type, __u64 *config);</div><div class='ctx'> int parse_events_add_breakpoint(struct parse_events_state *parse_state,</div><div class='ctx'> 				struct list_head *list,</div><div class='hunk'>@@ -247,7 +239,7 @@ struct evsel *parse_events__add_event(int idx, struct perf_event_attr *attr,</div><div class='ctx'> 				      struct perf_pmu *pmu);</div><div class='ctx'> </div><div class='ctx'> int parse_events_multi_pmu_add(struct parse_events_state *parse_state,</div><div class='del'>-			       const char *event_name, u64 hw_config,</div><div class='add'>+			       const char *event_name,</div><div class='ctx'> 			       const struct parse_events_terms *const_parsed_terms,</div><div class='ctx'> 			       struct list_head **listp, void *loc);</div><div class='ctx'> </div><div class='hunk'>@@ -263,7 +255,6 @@ struct event_symbol {</div><div class='ctx'> 	const char	*symbol;</div><div class='ctx'> 	const char	*alias;</div><div class='ctx'> };</div><div class='del'>-extern const struct event_symbol event_symbols_hw[];</div><div class='ctx'> </div><div class='ctx'> char *parse_events_formats_error_string(char *additional_terms);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/parse-events.l b/tools/perf/util/parse-events.l<br/>index 2034590eb789..251ce4321878 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.l?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.l</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.l?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/parse-events.l</a></div><div class='hunk'>@@ -5,16 +5,14 @@</div><div class='ctx'> %option stack</div><div class='ctx'> %option bison-locations</div><div class='ctx'> %option yylineno</div><div class='del'>-%option reject</div><div class='add'>+%option noyywrap</div><div class='ctx'> </div><div class='ctx'> %{</div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='del'>-#include &lt;sys/types.h&gt;</div><div class='del'>-#include &lt;sys/stat.h&gt;</div><div class='del'>-#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;stdlib.h&gt;</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='ctx'> #include "parse-events.h"</div><div class='ctx'> #include "parse-events-bison.h"</div><div class='del'>-#include "evsel.h"</div><div class='ctx'> </div><div class='ctx'> char *parse_events_get_text(yyscan_t yyscanner);</div><div class='ctx'> YYSTYPE *parse_events_get_lval(yyscan_t yyscanner);</div><div class='hunk'>@@ -75,11 +73,6 @@ static int quoted_str(yyscan_t scanner, int token)</div><div class='ctx'> 	return token;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lc_str(yyscan_t scanner, const struct parse_events_state *state)</div><div class='del'>-{</div><div class='del'>-	return str(scanner, state-&gt;match_legacy_cache_terms ? PE_LEGACY_CACHE : PE_NAME);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This function is called when the parser gets two kind of input:</div><div class='ctx'>  *</div><div class='hunk'>@@ -117,14 +110,6 @@ do {								\</div><div class='ctx'> 	yyless(0);						\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-static int sym(yyscan_t scanner, int config)</div><div class='del'>-{</div><div class='del'>-	YYSTYPE *yylval = parse_events_get_lval(scanner);</div><div class='del'>-</div><div class='del'>-	yylval-&gt;num = config;</div><div class='del'>-	return PE_VALUE_SYM_HW;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int term(yyscan_t scanner, enum parse_events__term_type type)</div><div class='ctx'> {</div><div class='ctx'> 	YYSTYPE *yylval = parse_events_get_lval(scanner);</div><div class='hunk'>@@ -133,16 +118,6 @@ static int term(yyscan_t scanner, enum parse_events__term_type type)</div><div class='ctx'> 	return PE_TERM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hw_term(yyscan_t scanner, int config)</div><div class='del'>-{</div><div class='del'>-	YYSTYPE *yylval = parse_events_get_lval(scanner);</div><div class='del'>-	char *text = parse_events_get_text(scanner);</div><div class='del'>-</div><div class='del'>-	yylval-&gt;hardware_term.str = strdup(text);</div><div class='del'>-	yylval-&gt;hardware_term.num = PERF_TYPE_HARDWARE + config;</div><div class='del'>-	return PE_TERM_HW;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void modifiers_error(struct parse_events_state *parse_state, yyscan_t scanner,</div><div class='ctx'> 			    int pos, char mod_char, const char *mod_name)</div><div class='ctx'> {</div><div class='hunk'>@@ -206,6 +181,7 @@ static int modifiers(struct parse_events_state *parse_state, yyscan_t scanner)</div><div class='ctx'> 		CASE('e', exclusive);</div><div class='ctx'> 		CASE('b', bpf);</div><div class='ctx'> 		CASE('R', retire_lat);</div><div class='add'>+		CASE('X', dont_regroup);</div><div class='ctx'> 		default:</div><div class='ctx'> 			return PE_ERROR;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -222,10 +198,6 @@ do {							\</div><div class='ctx'> 	yycolumn += yyleng;				\</div><div class='ctx'> } while (0);</div><div class='ctx'> </div><div class='del'>-#define USER_REJECT		\</div><div class='del'>-	yycolumn -= yyleng;	\</div><div class='del'>-	REJECT</div><div class='del'>-</div><div class='ctx'> %}</div><div class='ctx'> </div><div class='ctx'> %x mem</div><div class='hunk'>@@ -251,13 +223,11 @@ term_name	{name_start}[a-zA-Z0-9_*?.\[\]!\-:]*</div><div class='ctx'> quoted_name	[\']{name_start}[a-zA-Z0-9_*?.\[\]!\-:,\.=]*[\']</div><div class='ctx'> drv_cfg_term	[a-zA-Z0-9_\.]+(=[a-zA-Z0-9_*?\.:]+)?</div><div class='ctx'> /*</div><div class='del'>- * If you add a modifier you need to update check_modifier().</div><div class='add'>+ * If you add a modifier you need to update modifiers().</div><div class='ctx'>  * Also, the letters in modifier_event must not be in modifier_bp.</div><div class='ctx'>  */</div><div class='del'>-modifier_event	[ukhpPGHSDIWebR]{1,16}</div><div class='add'>+modifier_event	[ukhpPGHSDIWebRX]{1,17}</div><div class='ctx'> modifier_bp	[rwx]{1,3}</div><div class='del'>-lc_type 	(L1-dcache|l1-d|l1d|L1-data|L1-icache|l1-i|l1i|L1-instruction|LLC|L2|dTLB|d-tlb|Data-TLB|iTLB|i-tlb|Instruction-TLB|branch|branches|bpu|btb|bpc|node)</div><div class='del'>-lc_op_result	(load|loads|read|store|stores|write|prefetch|prefetches|speculative-read|speculative-load|refs|Reference|ops|access|misses|miss)</div><div class='ctx'> digit		[0-9]</div><div class='ctx'> non_digit	[^0-9]</div><div class='ctx'> </div><div class='hunk'>@@ -317,6 +287,7 @@ config			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG); }</div><div class='ctx'> config1			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG1); }</div><div class='ctx'> config2			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG2); }</div><div class='ctx'> config3			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG3); }</div><div class='add'>+config4			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG4); }</div><div class='ctx'> name			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_NAME); }</div><div class='ctx'> period			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD); }</div><div class='ctx'> freq			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_SAMPLE_FREQ); }</div><div class='hunk'>@@ -336,23 +307,13 @@ aux-action		{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_ACTION); }</div><div class='ctx'> aux-sample-size		{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_AUX_SAMPLE_SIZE); }</div><div class='ctx'> metric-id		{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_METRIC_ID); }</div><div class='ctx'> cpu			{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CPU); }</div><div class='del'>-cpu-cycles|cycles				{ return hw_term(yyscanner, PERF_COUNT_HW_CPU_CYCLES); }</div><div class='del'>-stalled-cycles-frontend|idle-cycles-frontend	{ return hw_term(yyscanner, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND); }</div><div class='del'>-stalled-cycles-backend|idle-cycles-backend	{ return hw_term(yyscanner, PERF_COUNT_HW_STALLED_CYCLES_BACKEND); }</div><div class='del'>-instructions					{ return hw_term(yyscanner, PERF_COUNT_HW_INSTRUCTIONS); }</div><div class='del'>-cache-references				{ return hw_term(yyscanner, PERF_COUNT_HW_CACHE_REFERENCES); }</div><div class='del'>-cache-misses					{ return hw_term(yyscanner, PERF_COUNT_HW_CACHE_MISSES); }</div><div class='del'>-branch-instructions|branches			{ return hw_term(yyscanner, PERF_COUNT_HW_BRANCH_INSTRUCTIONS); }</div><div class='del'>-branch-misses					{ return hw_term(yyscanner, PERF_COUNT_HW_BRANCH_MISSES); }</div><div class='del'>-bus-cycles					{ return hw_term(yyscanner, PERF_COUNT_HW_BUS_CYCLES); }</div><div class='del'>-ref-cycles					{ return hw_term(yyscanner, PERF_COUNT_HW_REF_CPU_CYCLES); }</div><div class='add'>+ratio-to-prev		{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV); }</div><div class='add'>+legacy-hardware-config 	{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG); }</div><div class='add'>+legacy-cache-config	{ return term(yyscanner, PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG); }</div><div class='ctx'> r{num_raw_hex}		{ return str(yyscanner, PE_RAW); }</div><div class='ctx'> r0x{num_raw_hex}	{ return str(yyscanner, PE_RAW); }</div><div class='ctx'> ,			{ return ','; }</div><div class='ctx'> "/"			{ BEGIN(INITIAL); return '/'; }</div><div class='del'>-{lc_type}			{ return lc_str(yyscanner, _parse_state); }</div><div class='del'>-{lc_type}-{lc_op_result}	{ return lc_str(yyscanner, _parse_state); }</div><div class='del'>-{lc_type}-{lc_op_result}-{lc_op_result}	{ return lc_str(yyscanner, _parse_state); }</div><div class='ctx'> {num_dec}		{ return value(_parse_state, yyscanner, 10); }</div><div class='ctx'> {num_hex}		{ return value(_parse_state, yyscanner, 16); }</div><div class='ctx'> {term_name}		{ return str(yyscanner, PE_NAME); }</div><div class='hunk'>@@ -391,20 +352,6 @@ r0x{num_raw_hex}	{ return str(yyscanner, PE_RAW); }</div><div class='ctx'> &lt;&lt;EOF&gt;&gt;			{ BEGIN(INITIAL); }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-cpu-cycles|cycles				{ return sym(yyscanner, PERF_COUNT_HW_CPU_CYCLES); }</div><div class='del'>-stalled-cycles-frontend|idle-cycles-frontend	{ return sym(yyscanner, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND); }</div><div class='del'>-stalled-cycles-backend|idle-cycles-backend	{ return sym(yyscanner, PERF_COUNT_HW_STALLED_CYCLES_BACKEND); }</div><div class='del'>-instructions					{ return sym(yyscanner, PERF_COUNT_HW_INSTRUCTIONS); }</div><div class='del'>-cache-references				{ return sym(yyscanner, PERF_COUNT_HW_CACHE_REFERENCES); }</div><div class='del'>-cache-misses					{ return sym(yyscanner, PERF_COUNT_HW_CACHE_MISSES); }</div><div class='del'>-branch-instructions|branches			{ return sym(yyscanner, PERF_COUNT_HW_BRANCH_INSTRUCTIONS); }</div><div class='del'>-branch-misses					{ return sym(yyscanner, PERF_COUNT_HW_BRANCH_MISSES); }</div><div class='del'>-bus-cycles					{ return sym(yyscanner, PERF_COUNT_HW_BUS_CYCLES); }</div><div class='del'>-ref-cycles					{ return sym(yyscanner, PERF_COUNT_HW_REF_CPU_CYCLES); }</div><div class='del'>-</div><div class='del'>-{lc_type}			{ return str(yyscanner, PE_LEGACY_CACHE); }</div><div class='del'>-{lc_type}-{lc_op_result}	{ return str(yyscanner, PE_LEGACY_CACHE); }</div><div class='del'>-{lc_type}-{lc_op_result}-{lc_op_result}	{ return str(yyscanner, PE_LEGACY_CACHE); }</div><div class='ctx'> mem:			{ BEGIN(mem); return PE_PREFIX_MEM; }</div><div class='ctx'> r{num_raw_hex}		{ return str(yyscanner, PE_RAW); }</div><div class='ctx'> {num_dec}		{ return value(_parse_state, yyscanner, 10); }</div><div class='hunk'>@@ -423,8 +370,3 @@ r{num_raw_hex}		{ return str(yyscanner, PE_RAW); }</div><div class='ctx'> .			{ }</div><div class='ctx'> </div><div class='ctx'> %%</div><div class='del'>-</div><div class='del'>-int parse_events_wrap(void *scanner __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='head'>diff --git a/tools/perf/util/parse-events.y b/tools/perf/util/parse-events.y<br/>index a2361c0040d7..c194de5ec1ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.y?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/parse-events.y</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/parse-events.y?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/parse-events.y</a></div><div class='hunk'>@@ -55,22 +55,18 @@ static void free_list_evsel(struct list_head* list_evsel)</div><div class='ctx'> %}</div><div class='ctx'> </div><div class='ctx'> %token PE_START_EVENTS PE_START_TERMS</div><div class='del'>-%token PE_VALUE PE_VALUE_SYM_HW PE_TERM</div><div class='add'>+%token PE_VALUE PE_TERM</div><div class='ctx'> %token PE_EVENT_NAME</div><div class='ctx'> %token PE_RAW PE_NAME</div><div class='ctx'> %token PE_MODIFIER_EVENT PE_MODIFIER_BP PE_BP_COLON PE_BP_SLASH</div><div class='del'>-%token PE_LEGACY_CACHE</div><div class='ctx'> %token PE_PREFIX_MEM</div><div class='ctx'> %token PE_ERROR</div><div class='ctx'> %token PE_DRV_CFG_TERM</div><div class='del'>-%token PE_TERM_HW</div><div class='ctx'> %type &lt;num&gt; PE_VALUE</div><div class='del'>-%type &lt;num&gt; PE_VALUE_SYM_HW</div><div class='ctx'> %type &lt;mod&gt; PE_MODIFIER_EVENT</div><div class='ctx'> %type &lt;term_type&gt; PE_TERM</div><div class='ctx'> %type &lt;str&gt; PE_RAW</div><div class='ctx'> %type &lt;str&gt; PE_NAME</div><div class='del'>-%type &lt;str&gt; PE_LEGACY_CACHE</div><div class='ctx'> %type &lt;str&gt; PE_MODIFIER_BP</div><div class='ctx'> %type &lt;str&gt; PE_EVENT_NAME</div><div class='ctx'> %type &lt;str&gt; PE_DRV_CFG_TERM</div><div class='hunk'>@@ -83,8 +79,6 @@ static void free_list_evsel(struct list_head* list_evsel)</div><div class='ctx'> %type &lt;list_terms&gt; opt_pmu_config</div><div class='ctx'> %destructor { parse_events_terms__delete ($$); } &lt;list_terms&gt;</div><div class='ctx'> %type &lt;list_evsel&gt; event_pmu</div><div class='del'>-%type &lt;list_evsel&gt; event_legacy_symbol</div><div class='del'>-%type &lt;list_evsel&gt; event_legacy_cache</div><div class='ctx'> %type &lt;list_evsel&gt; event_legacy_mem</div><div class='ctx'> %type &lt;list_evsel&gt; event_legacy_tracepoint</div><div class='ctx'> %type &lt;list_evsel&gt; event_legacy_numeric</div><div class='hunk'>@@ -100,8 +94,6 @@ static void free_list_evsel(struct list_head* list_evsel)</div><div class='ctx'> %destructor { free_list_evsel ($$); } &lt;list_evsel&gt;</div><div class='ctx'> %type &lt;tracepoint_name&gt; tracepoint_name</div><div class='ctx'> %destructor { free ($$.sys); free ($$.event); } &lt;tracepoint_name&gt;</div><div class='del'>-%type &lt;hardware_term&gt; PE_TERM_HW</div><div class='del'>-%destructor { free ($$.str); } &lt;hardware_term&gt;</div><div class='ctx'> </div><div class='ctx'> %union</div><div class='ctx'> {</div><div class='hunk'>@@ -116,10 +108,6 @@ static void free_list_evsel(struct list_head* list_evsel)</div><div class='ctx'> 		char *sys;</div><div class='ctx'> 		char *event;</div><div class='ctx'> 	} tracepoint_name;</div><div class='del'>-	struct hardware_term {</div><div class='del'>-		char *str;</div><div class='del'>-		u64 num;</div><div class='del'>-	} hardware_term;</div><div class='ctx'> }</div><div class='ctx'> %%</div><div class='ctx'> </div><div class='hunk'>@@ -262,8 +250,6 @@ PE_EVENT_NAME event_def</div><div class='ctx'> event_def</div><div class='ctx'> </div><div class='ctx'> event_def: event_pmu |</div><div class='del'>-	   event_legacy_symbol |</div><div class='del'>-	   event_legacy_cache sep_dc |</div><div class='ctx'> 	   event_legacy_mem sep_dc |</div><div class='ctx'> 	   event_legacy_tracepoint sep_dc |</div><div class='ctx'> 	   event_legacy_numeric sep_dc |</div><div class='hunk'>@@ -288,7 +274,7 @@ PE_NAME sep_dc</div><div class='ctx'> 	struct list_head *list;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = parse_events_multi_pmu_add(_parse_state, $1, PERF_COUNT_HW_MAX, NULL, &amp;list, &amp;@1);</div><div class='add'>+	err = parse_events_multi_pmu_add(_parse_state, $1, /*const_parsed_terms*/NULL, &amp;list, &amp;@1);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		struct parse_events_state *parse_state = _parse_state;</div><div class='ctx'> 		struct parse_events_error *error = parse_state-&gt;error;</div><div class='hunk'>@@ -304,66 +290,6 @@ PE_NAME sep_dc</div><div class='ctx'> 	$$ = list;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-event_legacy_symbol:</div><div class='del'>-PE_VALUE_SYM_HW '/' event_config '/'</div><div class='del'>-{</div><div class='del'>-	struct list_head *list;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	list = alloc_list();</div><div class='del'>-	if (!list)</div><div class='del'>-		YYNOMEM;</div><div class='del'>-	err = parse_events_add_numeric(_parse_state, list,</div><div class='del'>-				       PERF_TYPE_HARDWARE, $1,</div><div class='del'>-				       $3,</div><div class='del'>-				       /*wildcard=*/true);</div><div class='del'>-	parse_events_terms__delete($3);</div><div class='del'>-	if (err) {</div><div class='del'>-		free_list_evsel(list);</div><div class='del'>-		PE_ABORT(err);</div><div class='del'>-	}</div><div class='del'>-	$$ = list;</div><div class='del'>-}</div><div class='del'>-|</div><div class='del'>-PE_VALUE_SYM_HW sep_slash_slash_dc</div><div class='del'>-{</div><div class='del'>-	struct list_head *list;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	list = alloc_list();</div><div class='del'>-	if (!list)</div><div class='del'>-		YYNOMEM;</div><div class='del'>-	err = parse_events_add_numeric(_parse_state, list,</div><div class='del'>-				       PERF_TYPE_HARDWARE, $1,</div><div class='del'>-				       /*head_config=*/NULL,</div><div class='del'>-				       /*wildcard=*/true);</div><div class='del'>-	if (err)</div><div class='del'>-		PE_ABORT(err);</div><div class='del'>-	$$ = list;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-event_legacy_cache:</div><div class='del'>-PE_LEGACY_CACHE opt_event_config</div><div class='del'>-{</div><div class='del'>-	struct parse_events_state *parse_state = _parse_state;</div><div class='del'>-	struct list_head *list;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	list = alloc_list();</div><div class='del'>-	if (!list)</div><div class='del'>-		YYNOMEM;</div><div class='del'>-</div><div class='del'>-	err = parse_events_add_cache(list, &amp;parse_state-&gt;idx, $1, parse_state, $2);</div><div class='del'>-</div><div class='del'>-	parse_events_terms__delete($2);</div><div class='del'>-	free($1);</div><div class='del'>-	if (err) {</div><div class='del'>-		free_list_evsel(list);</div><div class='del'>-		PE_ABORT(err);</div><div class='del'>-	}</div><div class='del'>-	$$ = list;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> event_legacy_mem:</div><div class='ctx'> PE_PREFIX_MEM PE_VALUE PE_BP_SLASH PE_VALUE PE_BP_COLON PE_MODIFIER_BP opt_event_config</div><div class='ctx'> {</div><div class='hunk'>@@ -582,12 +508,7 @@ event_term</div><div class='ctx'> 	$$ = head;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-name_or_raw: PE_RAW | PE_NAME | PE_LEGACY_CACHE</div><div class='del'>-|</div><div class='del'>-PE_TERM_HW</div><div class='del'>-{</div><div class='del'>-	$$ = $1.str;</div><div class='del'>-}</div><div class='add'>+name_or_raw: PE_RAW | PE_NAME</div><div class='ctx'> </div><div class='ctx'> event_term:</div><div class='ctx'> PE_RAW</div><div class='hunk'>@@ -629,19 +550,6 @@ name_or_raw '=' PE_VALUE</div><div class='ctx'> 	$$ = term;</div><div class='ctx'> }</div><div class='ctx'> |</div><div class='del'>-PE_LEGACY_CACHE</div><div class='del'>-{</div><div class='del'>-	struct parse_events_term *term;</div><div class='del'>-	int err = parse_events_term__num(&amp;term, PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE,</div><div class='del'>-					 $1, /*num=*/1, /*novalue=*/true, &amp;@1, /*loc_val=*/NULL);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		free($1);</div><div class='del'>-		PE_ABORT(err);</div><div class='del'>-	}</div><div class='del'>-	$$ = term;</div><div class='del'>-}</div><div class='del'>-|</div><div class='ctx'> PE_NAME</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='hunk'>@@ -655,20 +563,6 @@ PE_NAME</div><div class='ctx'> 	$$ = term;</div><div class='ctx'> }</div><div class='ctx'> |</div><div class='del'>-PE_TERM_HW</div><div class='del'>-{</div><div class='del'>-	struct parse_events_term *term;</div><div class='del'>-	int err = parse_events_term__num(&amp;term, PARSE_EVENTS__TERM_TYPE_HARDWARE,</div><div class='del'>-					 $1.str, $1.num &amp; 255, /*novalue=*/false,</div><div class='del'>-					 &amp;@1, /*loc_val=*/NULL);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		free($1.str);</div><div class='del'>-		PE_ABORT(err);</div><div class='del'>-	}</div><div class='del'>-	$$ = term;</div><div class='del'>-}</div><div class='del'>-|</div><div class='ctx'> PE_TERM '=' name_or_raw</div><div class='ctx'> {</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='hunk'>@@ -737,8 +631,6 @@ PE_DRV_CFG_TERM</div><div class='ctx'> </div><div class='ctx'> sep_dc: ':' |</div><div class='ctx'> </div><div class='del'>-sep_slash_slash_dc: '/' '/' | ':' |</div><div class='del'>-</div><div class='ctx'> %%</div><div class='ctx'> </div><div class='ctx'> void parse_events_error(YYLTYPE *loc, void *_parse_state,</div><div class='head'>diff --git a/tools/perf/util/perf_api_probe.c b/tools/perf/util/perf_api_probe.c<br/>index 1de3b69cdf4a..6ecf38314f01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/perf_api_probe.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/perf_api_probe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/perf_api_probe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/perf_api_probe.c</a></div><div class='hunk'>@@ -59,10 +59,10 @@ out_delete:</div><div class='ctx'> </div><div class='ctx'> static bool perf_probe_api(setup_probe_fn_t fn)</div><div class='ctx'> {</div><div class='del'>-	const char *try[] = {"cycles:u", "instructions:u", "cpu-clock:u", NULL};</div><div class='add'>+	struct perf_pmu *pmu;</div><div class='ctx'> 	struct perf_cpu_map *cpus;</div><div class='ctx'> 	struct perf_cpu cpu;</div><div class='del'>-	int ret, i = 0;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	cpus = perf_cpu_map__new_online_cpus();</div><div class='ctx'> 	if (!cpus)</div><div class='hunk'>@@ -70,12 +70,23 @@ static bool perf_probe_api(setup_probe_fn_t fn)</div><div class='ctx'> 	cpu = perf_cpu_map__cpu(cpus, 0);</div><div class='ctx'> 	perf_cpu_map__put(cpus);</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		ret = perf_do_probe_api(fn, cpu, try[i++]);</div><div class='del'>-		if (!ret)</div><div class='del'>-			return true;</div><div class='del'>-	} while (ret == -EAGAIN &amp;&amp; try[i]);</div><div class='del'>-</div><div class='add'>+	ret = perf_do_probe_api(fn, cpu, "software/cpu-clock/u");</div><div class='add'>+	if (!ret)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	pmu = perf_pmus__scan_core(/*pmu=*/NULL);</div><div class='add'>+	if (pmu) {</div><div class='add'>+		const char *try[] = {"cycles", "instructions", NULL};</div><div class='add'>+		char buf[256];</div><div class='add'>+		int i = 0;</div><div class='add'>+</div><div class='add'>+		while (ret == -EAGAIN &amp;&amp; try[i]) {</div><div class='add'>+			snprintf(buf, sizeof(buf), "%s/%s/u", pmu-&gt;name, try[i++]);</div><div class='add'>+			ret = perf_do_probe_api(fn, cpu, buf);</div><div class='add'>+			if (!ret)</div><div class='add'>+				return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/perf_event_attr_fprintf.c b/tools/perf/util/perf_event_attr_fprintf.c<br/>index 66b666d9ce64..741c3d657a8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/perf_event_attr_fprintf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/perf_event_attr_fprintf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/perf_event_attr_fprintf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/perf_event_attr_fprintf.c</a></div><div class='hunk'>@@ -343,6 +343,8 @@ int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr,</div><div class='ctx'> 	PRINT_ATTRf(inherit_thread, p_unsigned);</div><div class='ctx'> 	PRINT_ATTRf(remove_on_exec, p_unsigned);</div><div class='ctx'> 	PRINT_ATTRf(sigtrap, p_unsigned);</div><div class='add'>+	PRINT_ATTRf(defer_callchain, p_unsigned);</div><div class='add'>+	PRINT_ATTRf(defer_output, p_unsigned);</div><div class='ctx'> </div><div class='ctx'> 	PRINT_ATTRn("{ wakeup_events, wakeup_watermark }", wakeup_events, p_unsigned, false);</div><div class='ctx'> 	PRINT_ATTRf(bp_type, p_unsigned);</div><div class='head'>diff --git a/tools/perf/util/pfm.c b/tools/perf/util/pfm.c<br/>index e5b3a2a5ddef..d9043f4afbe7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pfm.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pfm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pfm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/pfm.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include "util/strbuf.h"</div><div class='ctx'> #include "util/thread_map.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;perfmon/pfmlib_perf_event.h&gt;</div><div class='head'>diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c<br/>index 5a291f1380ed..956ea273c2c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/pmu.c</a></div><div class='hunk'>@@ -67,8 +67,13 @@ struct perf_pmu_alias {</div><div class='ctx'> 	 * json events.</div><div class='ctx'> 	 */</div><div class='ctx'> 	char *topic;</div><div class='del'>-	/** @terms: Owned list of the original parsed parameters. */</div><div class='del'>-	struct parse_events_terms terms;</div><div class='add'>+	/** @terms: Owned copy of the event terms. */</div><div class='add'>+	char *terms;</div><div class='add'>+	/**</div><div class='add'>+	 * @legacy_terms: If the event aliases a legacy event, holds a copy</div><div class='add'>+	 * ofthe legacy event string.</div><div class='add'>+	 */</div><div class='add'>+	char *legacy_terms;</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * @pmu_name: The name copied from the json struct pmu_event. This can</div><div class='ctx'> 	 * differ from the PMU name as it won't have suffixes.</div><div class='hunk'>@@ -101,6 +106,12 @@ struct perf_pmu_alias {</div><div class='ctx'> 	 * default.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool deprecated;</div><div class='add'>+	/**</div><div class='add'>+	 * @legacy_deprecated_checked: Legacy events may not be supported by the</div><div class='add'>+	 * PMU need to be checked. If they aren't supported they are marked</div><div class='add'>+	 * deprecated.</div><div class='add'>+	 */</div><div class='add'>+	bool legacy_deprecated_checked;</div><div class='ctx'> 	/** @from_sysfs: Was the alias from sysfs or a json event? */</div><div class='ctx'> 	bool from_sysfs;</div><div class='ctx'> 	/** @info_loaded: Have the scale, unit and other values been read from disk? */</div><div class='hunk'>@@ -429,7 +440,8 @@ static void perf_pmu_free_alias(struct perf_pmu_alias *alias)</div><div class='ctx'> 	zfree(&amp;alias-&gt;long_desc);</div><div class='ctx'> 	zfree(&amp;alias-&gt;topic);</div><div class='ctx'> 	zfree(&amp;alias-&gt;pmu_name);</div><div class='del'>-	parse_events_terms__exit(&amp;alias-&gt;terms);</div><div class='add'>+	zfree(&amp;alias-&gt;terms);</div><div class='add'>+	zfree(&amp;alias-&gt;legacy_terms);</div><div class='ctx'> 	free(alias);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -522,6 +534,7 @@ static void read_alias_info(struct perf_pmu *pmu, struct perf_pmu_alias *alias)</div><div class='ctx'> struct update_alias_data {</div><div class='ctx'> 	struct perf_pmu *pmu;</div><div class='ctx'> 	struct perf_pmu_alias *alias;</div><div class='add'>+	bool legacy;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int update_alias(const struct pmu_event *pe,</div><div class='hunk'>@@ -537,8 +550,13 @@ static int update_alias(const struct pmu_event *pe,</div><div class='ctx'> 	assign_str(pe-&gt;name, "topic", &amp;data-&gt;alias-&gt;topic, pe-&gt;topic);</div><div class='ctx'> 	data-&gt;alias-&gt;per_pkg = pe-&gt;perpkg;</div><div class='ctx'> 	if (pe-&gt;event) {</div><div class='del'>-		parse_events_terms__exit(&amp;data-&gt;alias-&gt;terms);</div><div class='del'>-		ret = parse_events_terms(&amp;data-&gt;alias-&gt;terms, pe-&gt;event, /*input=*/NULL);</div><div class='add'>+		if (data-&gt;legacy) {</div><div class='add'>+			zfree(&amp;data-&gt;alias-&gt;legacy_terms);</div><div class='add'>+			data-&gt;alias-&gt;legacy_terms = strdup(pe-&gt;event);</div><div class='add'>+		} else {</div><div class='add'>+			zfree(&amp;data-&gt;alias-&gt;terms);</div><div class='add'>+			data-&gt;alias-&gt;terms = strdup(pe-&gt;event);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!ret &amp;&amp; pe-&gt;unit) {</div><div class='ctx'> 		char *unit;</div><div class='hunk'>@@ -563,7 +581,7 @@ static int update_alias(const struct pmu_event *pe,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int perf_pmu__new_alias(struct perf_pmu *pmu, const char *name,</div><div class='del'>-				const char *desc, const char *val, FILE *val_fd,</div><div class='add'>+				const char *desc, const char *val, int val_fd,</div><div class='ctx'> 			        const struct pmu_event *pe, enum event_source src)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_pmu_alias *alias, *old_alias;</div><div class='hunk'>@@ -590,7 +608,6 @@ static int perf_pmu__new_alias(struct perf_pmu *pmu, const char *name,</div><div class='ctx'> 	if (!alias)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	parse_events_terms__init(&amp;alias-&gt;terms);</div><div class='ctx'> 	alias-&gt;scale = 1.0;</div><div class='ctx'> 	alias-&gt;unit[0] = '\0';</div><div class='ctx'> 	alias-&gt;per_pkg = perpkg;</div><div class='hunk'>@@ -615,13 +632,22 @@ static int perf_pmu__new_alias(struct perf_pmu *pmu, const char *name,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = parse_events_terms(&amp;alias-&gt;terms, val, val_fd);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("Cannot parse alias %s: %d\n", val, ret);</div><div class='del'>-		free(alias);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	if (val_fd &lt; 0) {</div><div class='add'>+		alias-&gt;terms = strdup(val);</div><div class='add'>+	} else {</div><div class='add'>+		char buf[256];</div><div class='add'>+		struct io io;</div><div class='add'>+		size_t line_len;</div><div class='ctx'> </div><div class='add'>+		io__init(&amp;io, val_fd, buf, sizeof(buf));</div><div class='add'>+		ret = io__getline(&amp;io, &amp;alias-&gt;terms, &amp;line_len) &lt; 0 ? -errno : 0;</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("Failed to read alias %s\n", name);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		if (line_len &gt;= 1 &amp;&amp; alias-&gt;terms[line_len - 1] == '\n')</div><div class='add'>+			alias-&gt;terms[line_len - 1] = '\0';</div><div class='add'>+	}</div><div class='ctx'> 	alias-&gt;name = strdup(name);</div><div class='ctx'> 	alias-&gt;desc = desc ? strdup(desc) : NULL;</div><div class='ctx'> 	alias-&gt;long_desc = long_desc ? strdup(long_desc) : NULL;</div><div class='hunk'>@@ -638,15 +664,29 @@ static int perf_pmu__new_alias(struct perf_pmu *pmu, const char *name,</div><div class='ctx'> 	default:</div><div class='ctx'> 	case EVENT_SRC_SYSFS:</div><div class='ctx'> 		alias-&gt;from_sysfs = true;</div><div class='del'>-		if (pmu-&gt;events_table) {</div><div class='add'>+		if (pmu-&gt;events_table || pmu-&gt;is_core) {</div><div class='ctx'> 			/* Update an event from sysfs with json data. */</div><div class='ctx'> 			struct update_alias_data data = {</div><div class='ctx'> 				.pmu = pmu,</div><div class='ctx'> 				.alias = alias,</div><div class='add'>+				.legacy = false,</div><div class='ctx'> 			};</div><div class='del'>-			if (pmu_events_table__find_event(pmu-&gt;events_table, pmu, name,</div><div class='del'>-							 update_alias, &amp;data) == 0)</div><div class='add'>+			if ((pmu_events_table__find_event(pmu-&gt;events_table, pmu, name,</div><div class='add'>+							  update_alias, &amp;data) == 0)) {</div><div class='add'>+				/*</div><div class='add'>+				 * Override sysfs encodings with json encodings</div><div class='add'>+				 * specific to the cpuid.</div><div class='add'>+				 */</div><div class='ctx'> 				pmu-&gt;cpu_common_json_aliases++;</div><div class='add'>+			}</div><div class='add'>+			if (pmu-&gt;is_core) {</div><div class='add'>+				/* Add in legacy encodings. */</div><div class='add'>+				data.legacy = true;</div><div class='add'>+				if (pmu_events_table__find_event(</div><div class='add'>+						perf_pmu__default_core_events_table(),</div><div class='add'>+						pmu, name, update_alias, &amp;data) == 0)</div><div class='add'>+					pmu-&gt;cpu_common_json_aliases++;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		pmu-&gt;sysfs_aliases++;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -694,7 +734,6 @@ static int __pmu_aliases_parse(struct perf_pmu *pmu, int events_dir_fd)</div><div class='ctx'> 	while ((evt_ent = io_dir__readdir(&amp;event_dir))) {</div><div class='ctx'> 		char *name = evt_ent-&gt;d_name;</div><div class='ctx'> 		int fd;</div><div class='del'>-		FILE *file;</div><div class='ctx'> </div><div class='ctx'> 		if (!strcmp(name, ".") || !strcmp(name, ".."))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -710,17 +749,12 @@ static int __pmu_aliases_parse(struct perf_pmu *pmu, int events_dir_fd)</div><div class='ctx'> 			pr_debug("Cannot open %s\n", name);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		file = fdopen(fd, "r");</div><div class='del'>-		if (!file) {</div><div class='del'>-			close(fd);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		if (perf_pmu__new_alias(pmu, name, /*desc=*/ NULL,</div><div class='del'>-					/*val=*/ NULL, file, /*pe=*/ NULL,</div><div class='add'>+					/*val=*/ NULL, fd, /*pe=*/ NULL,</div><div class='ctx'> 					EVENT_SRC_SYSFS) &lt; 0)</div><div class='ctx'> 			pr_debug("Cannot set up %s\n", name);</div><div class='del'>-		fclose(file);</div><div class='add'>+		close(fd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pmu-&gt;sysfs_aliases_loaded = true;</div><div class='hunk'>@@ -767,29 +801,29 @@ static int pmu_aliases_parse_eager(struct perf_pmu *pmu, int sysfs_fd)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pmu_alias_terms(struct perf_pmu_alias *alias, int err_loc, struct list_head *terms)</div><div class='add'>+static int pmu_alias_terms(struct perf_pmu_alias *alias, struct list_head *terms)</div><div class='ctx'> {</div><div class='del'>-	struct parse_events_term *term, *cloned;</div><div class='del'>-	struct parse_events_terms clone_terms;</div><div class='del'>-</div><div class='del'>-	parse_events_terms__init(&amp;clone_terms);</div><div class='del'>-	list_for_each_entry(term, &amp;alias-&gt;terms.terms, list) {</div><div class='del'>-		int ret = parse_events_term__clone(&amp;cloned, term);</div><div class='add'>+	struct parse_events_terms alias_terms;</div><div class='add'>+	struct parse_events_term *term;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-		if (ret) {</div><div class='del'>-			parse_events_terms__exit(&amp;clone_terms);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='add'>+	parse_events_terms__init(&amp;alias_terms);</div><div class='add'>+	ret = parse_events_terms(&amp;alias_terms, alias-&gt;terms);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Cannot parse '%s' terms '%s': %d\n",</div><div class='add'>+		       alias-&gt;name, alias-&gt;terms, ret);</div><div class='add'>+		parse_events_terms__exit(&amp;alias_terms);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	list_for_each_entry(term, &amp;alias_terms.terms, list) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Weak terms don't override command line options,</div><div class='ctx'> 		 * which we don't want for implicit terms in aliases.</div><div class='ctx'> 		 */</div><div class='del'>-		cloned-&gt;weak = true;</div><div class='del'>-		cloned-&gt;err_term = cloned-&gt;err_val = err_loc;</div><div class='del'>-		list_add_tail(&amp;cloned-&gt;list, &amp;clone_terms.terms);</div><div class='add'>+		term-&gt;weak = true;</div><div class='ctx'> 	}</div><div class='del'>-	list_splice_init(&amp;clone_terms.terms, terms);</div><div class='del'>-	parse_events_terms__exit(&amp;clone_terms);</div><div class='add'>+	list_splice_init(&amp;alias_terms.terms, terms);</div><div class='add'>+	parse_events_terms__exit(&amp;alias_terms);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1045,7 +1079,7 @@ static int pmu_add_cpu_aliases_map_callback(const struct pmu_event *pe,</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_pmu *pmu = vdata;</div><div class='ctx'> </div><div class='del'>-	perf_pmu__new_alias(pmu, pe-&gt;name, pe-&gt;desc, pe-&gt;event, /*val_fd=*/ NULL,</div><div class='add'>+	perf_pmu__new_alias(pmu, pe-&gt;name, pe-&gt;desc, pe-&gt;event, /*val_fd=*/ -1,</div><div class='ctx'> 			    pe, EVENT_SRC_CPU_JSON);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1061,13 +1095,16 @@ void pmu_add_cpu_aliases_table(struct perf_pmu *pmu, const struct pmu_events_tab</div><div class='ctx'> </div><div class='ctx'> static void pmu_add_cpu_aliases(struct perf_pmu *pmu)</div><div class='ctx'> {</div><div class='del'>-	if (!pmu-&gt;events_table)</div><div class='add'>+	if (!pmu-&gt;events_table &amp;&amp; !pmu-&gt;is_core)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (pmu-&gt;cpu_aliases_added)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pmu_add_cpu_aliases_table(pmu, pmu-&gt;events_table);</div><div class='add'>+	if (pmu-&gt;is_core)</div><div class='add'>+		pmu_add_cpu_aliases_table(pmu, perf_pmu__default_core_events_table());</div><div class='add'>+</div><div class='ctx'> 	pmu-&gt;cpu_aliases_added = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1094,7 +1131,7 @@ static int pmu_add_sys_aliases_iter_fn(const struct pmu_event *pe,</div><div class='ctx'> 				pe-&gt;name,</div><div class='ctx'> 				pe-&gt;desc,</div><div class='ctx'> 				pe-&gt;event,</div><div class='del'>-				/*val_fd=*/ NULL,</div><div class='add'>+				/*val_fd=*/ -1,</div><div class='ctx'> 				pe,</div><div class='ctx'> 				EVENT_SRC_SYS_JSON);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1539,9 +1576,41 @@ static int pmu_config_term(const struct perf_pmu *pmu,</div><div class='ctx'> 			assert(term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM);</div><div class='ctx'> 			pmu_format_value(bits, term-&gt;val.num, &amp;attr-&gt;config3, zero);</div><div class='ctx'> 			break;</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_CONFIG4:</div><div class='add'>+			assert(term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM);</div><div class='add'>+			pmu_format_value(bits, term-&gt;val.num, &amp;attr-&gt;config4, zero);</div><div class='add'>+			break;</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_HARDWARE_CONFIG:</div><div class='add'>+			assert(term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM);</div><div class='add'>+			assert(term-&gt;val.num &lt; PERF_COUNT_HW_MAX);</div><div class='add'>+			assert(pmu-&gt;is_core);</div><div class='add'>+			attr-&gt;config = term-&gt;val.num;</div><div class='add'>+			if (perf_pmus__supports_extended_type())</div><div class='add'>+				attr-&gt;config |= (__u64)pmu-&gt;type &lt;&lt; PERF_PMU_TYPE_SHIFT;</div><div class='add'>+			attr-&gt;type = PERF_TYPE_HARDWARE;</div><div class='add'>+			break;</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_LEGACY_CACHE_CONFIG: {</div><div class='add'>+#ifndef NDEBUG</div><div class='add'>+			int cache_type = term-&gt;val.num &amp; 0xFF;</div><div class='add'>+			int cache_op = (term-&gt;val.num &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+			int cache_result = (term-&gt;val.num &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+</div><div class='add'>+			assert(cache_type &lt; PERF_COUNT_HW_CACHE_MAX);</div><div class='add'>+			assert(cache_op &lt; PERF_COUNT_HW_CACHE_OP_MAX);</div><div class='add'>+			assert(cache_result &lt; PERF_COUNT_HW_CACHE_RESULT_MAX);</div><div class='add'>+#endif</div><div class='add'>+			assert(term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_NUM);</div><div class='add'>+			assert((term-&gt;val.num &amp; ~0xFFFFFF) == 0);</div><div class='add'>+			assert(pmu-&gt;is_core);</div><div class='add'>+			attr-&gt;config = term-&gt;val.num;</div><div class='add'>+			if (perf_pmus__supports_extended_type())</div><div class='add'>+				attr-&gt;config |= (__u64)pmu-&gt;type &lt;&lt; PERF_PMU_TYPE_SHIFT;</div><div class='add'>+			attr-&gt;type = PERF_TYPE_HW_CACHE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		case PARSE_EVENTS__TERM_TYPE_USER: /* Not hardcoded. */</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		case PARSE_EVENTS__TERM_TYPE_NAME ... PARSE_EVENTS__TERM_TYPE_CPU:</div><div class='add'>+		case PARSE_EVENTS__TERM_TYPE_NAME ... PARSE_EVENTS__TERM_TYPE_RATIO_TO_PREV:</div><div class='ctx'> 			/* Skip non-config terms. */</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1586,6 +1655,9 @@ static int pmu_config_term(const struct perf_pmu *pmu,</div><div class='ctx'> 	case PERF_PMU_FORMAT_VALUE_CONFIG3:</div><div class='ctx'> 		vp = &amp;attr-&gt;config3;</div><div class='ctx'> 		break;</div><div class='add'>+	case PERF_PMU_FORMAT_VALUE_CONFIG4:</div><div class='add'>+		vp = &amp;attr-&gt;config4;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1717,10 +1789,14 @@ static struct perf_pmu_alias *pmu_find_alias(struct perf_pmu *pmu,</div><div class='ctx'> 		return alias;</div><div class='ctx'> </div><div class='ctx'> 	/* Alias doesn't exist, try to get it from the json events. */</div><div class='del'>-	if (pmu-&gt;events_table &amp;&amp;</div><div class='del'>-	    pmu_events_table__find_event(pmu-&gt;events_table, pmu, name,</div><div class='del'>-				         pmu_add_cpu_aliases_map_callback,</div><div class='del'>-				         pmu) == 0) {</div><div class='add'>+	if ((pmu_events_table__find_event(pmu-&gt;events_table, pmu, name,</div><div class='add'>+					  pmu_add_cpu_aliases_map_callback,</div><div class='add'>+					  pmu) == 0) ||</div><div class='add'>+	    (pmu-&gt;is_core &amp;&amp;</div><div class='add'>+	     pmu_events_table__find_event(perf_pmu__default_core_events_table(),</div><div class='add'>+					  pmu, name,</div><div class='add'>+					  pmu_add_cpu_aliases_map_callback,</div><div class='add'>+					  pmu) == 0)) {</div><div class='ctx'> 		alias = perf_pmu__find_alias(pmu, name, /*load=*/ false);</div><div class='ctx'> 	}</div><div class='ctx'> 	return alias;</div><div class='hunk'>@@ -1770,6 +1846,24 @@ static int check_info_data(struct perf_pmu *pmu,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int perf_pmu__parse_terms_to_attr(struct perf_pmu *pmu, const char *terms_str,</div><div class='add'>+					 struct perf_event_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct parse_events_terms terms;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	parse_events_terms__init(&amp;terms);</div><div class='add'>+	ret = parse_events_terms(&amp;terms, terms_str);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_debug("Failed to parse terms '%s': %d\n", terms_str, ret);</div><div class='add'>+		parse_events_terms__exit(&amp;terms);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	ret = perf_pmu__config(pmu, attr, &amp;terms, /*apply_hardcoded=*/true, /*err=*/NULL);</div><div class='add'>+	parse_events_terms__exit(&amp;terms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Find alias in the terms list and replace it with the terms</div><div class='ctx'>  * defined for the alias</div><div class='hunk'>@@ -1813,10 +1907,10 @@ int perf_pmu__check_alias(struct perf_pmu *pmu, struct parse_events_terms *head_</div><div class='ctx'> 		alias = pmu_find_alias(pmu, term);</div><div class='ctx'> 		if (!alias)</div><div class='ctx'> 			continue;</div><div class='del'>-		ret = pmu_alias_terms(alias, term-&gt;err_term, &amp;term-&gt;list);</div><div class='add'>+		ret = pmu_alias_terms(alias, &amp;term-&gt;list);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			parse_events_error__handle(err, term-&gt;err_term,</div><div class='del'>-						strdup("Failure to duplicate terms"),</div><div class='add'>+						strdup("Failed to parse terms"),</div><div class='ctx'> 						NULL);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1826,12 +1920,23 @@ int perf_pmu__check_alias(struct perf_pmu *pmu, struct parse_events_terms *head_</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='add'>+		if (alias-&gt;legacy_terms) {</div><div class='add'>+			struct perf_event_attr attr = {.config = 0,};</div><div class='add'>+</div><div class='add'>+			ret = perf_pmu__parse_terms_to_attr(pmu, alias-&gt;legacy_terms, &amp;attr);</div><div class='add'>+			if (ret) {</div><div class='add'>+				parse_events_error__handle(err, term-&gt;err_term,</div><div class='add'>+							strdup("Error evaluating legacy terms"),</div><div class='add'>+							NULL);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			if (attr.type == PERF_TYPE_HARDWARE)</div><div class='add'>+				*alternate_hw_config = attr.config &amp; PERF_HW_EVENT_MASK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (alias-&gt;per_pkg)</div><div class='ctx'> 			info-&gt;per_pkg = true;</div><div class='ctx'> </div><div class='del'>-		if (term-&gt;alternate_hw_config)</div><div class='del'>-			*alternate_hw_config = term-&gt;val.num;</div><div class='del'>-</div><div class='ctx'> 		info-&gt;retirement_latency_mean = alias-&gt;retirement_latency_mean;</div><div class='ctx'> 		info-&gt;retirement_latency_min = alias-&gt;retirement_latency_min;</div><div class='ctx'> 		info-&gt;retirement_latency_max = alias-&gt;retirement_latency_max;</div><div class='hunk'>@@ -1912,6 +2017,9 @@ int perf_pmu__for_each_format(struct perf_pmu *pmu, void *state, pmu_format_call</div><div class='ctx'> 		"config1=0..0xffffffffffffffff",</div><div class='ctx'> 		"config2=0..0xffffffffffffffff",</div><div class='ctx'> 		"config3=0..0xffffffffffffffff",</div><div class='add'>+		"config4=0..0xffffffffffffffff",</div><div class='add'>+		"legacy-hardware-config=0..9,",</div><div class='add'>+		"legacy-cache-config=0..0xffffff,",</div><div class='ctx'> 		"name=string",</div><div class='ctx'> 		"period=number",</div><div class='ctx'> 		"freq=number",</div><div class='hunk'>@@ -1930,16 +2038,17 @@ int perf_pmu__for_each_format(struct perf_pmu *pmu, void *state, pmu_format_call</div><div class='ctx'> 		"aux-action=(pause|resume|start-paused)",</div><div class='ctx'> 		"aux-sample-size=number",</div><div class='ctx'> 		"cpu=number",</div><div class='add'>+		"ratio-to-prev=string",</div><div class='ctx'> 	};</div><div class='ctx'> 	struct perf_pmu_format *format;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * max-events and driver-config are missing above as are the internal</div><div class='del'>-	 * types user, metric-id, raw, legacy cache and hardware. Assert against</div><div class='del'>-	 * the enum parse_events__term_type so they are kept in sync.</div><div class='add'>+	 * types user, metric-id, and raw. Assert against the enum</div><div class='add'>+	 * parse_events__term_type so they are kept in sync.</div><div class='ctx'> 	 */</div><div class='del'>-	_Static_assert(ARRAY_SIZE(terms) == __PARSE_EVENTS__TERM_TYPE_NR - 6,</div><div class='add'>+	_Static_assert(ARRAY_SIZE(terms) == __PARSE_EVENTS__TERM_TYPE_NR - 4,</div><div class='ctx'> 		       "perf_pmu__for_each_format()'s terms must be kept in sync with enum parse_events__term_type");</div><div class='ctx'> 	list_for_each_entry(format, &amp;pmu-&gt;format, list) {</div><div class='ctx'> 		perf_pmu_format__load(pmu, format);</div><div class='hunk'>@@ -1992,9 +2101,13 @@ bool perf_pmu__have_event(struct perf_pmu *pmu, const char *name)</div><div class='ctx'> 		return drm_pmu__have_event(pmu, name);</div><div class='ctx'> 	if (perf_pmu__find_alias(pmu, name, /*load=*/ true) != NULL)</div><div class='ctx'> 		return true;</div><div class='del'>-	if (pmu-&gt;cpu_aliases_added || !pmu-&gt;events_table)</div><div class='add'>+	if (pmu-&gt;cpu_aliases_added || (!pmu-&gt;events_table &amp;&amp; !pmu-&gt;is_core))</div><div class='ctx'> 		return false;</div><div class='del'>-	return pmu_events_table__find_event(pmu-&gt;events_table, pmu, name, NULL, NULL) == 0;</div><div class='add'>+	if (pmu_events_table__find_event(pmu-&gt;events_table, pmu, name, NULL, NULL) == 0)</div><div class='add'>+		return true;</div><div class='add'>+	return pmu-&gt;is_core &amp;&amp;</div><div class='add'>+		pmu_events_table__find_event(perf_pmu__default_core_events_table(),</div><div class='add'>+					     pmu, name, NULL, NULL) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> size_t perf_pmu__num_events(struct perf_pmu *pmu)</div><div class='hunk'>@@ -2011,13 +2124,18 @@ size_t perf_pmu__num_events(struct perf_pmu *pmu)</div><div class='ctx'> 	pmu_aliases_parse(pmu);</div><div class='ctx'> 	nr = pmu-&gt;sysfs_aliases + pmu-&gt;sys_json_aliases;</div><div class='ctx'> </div><div class='del'>-	if (pmu-&gt;cpu_aliases_added)</div><div class='del'>-		 nr += pmu-&gt;cpu_json_aliases;</div><div class='del'>-	else if (pmu-&gt;events_table)</div><div class='del'>-		nr += pmu_events_table__num_events(pmu-&gt;events_table, pmu) -</div><div class='del'>-			pmu-&gt;cpu_common_json_aliases;</div><div class='del'>-	else</div><div class='add'>+	if (pmu-&gt;cpu_aliases_added) {</div><div class='add'>+		nr += pmu-&gt;cpu_json_aliases;</div><div class='add'>+	} else if (pmu-&gt;events_table || pmu-&gt;is_core) {</div><div class='add'>+		nr += pmu_events_table__num_events(pmu-&gt;events_table, pmu);</div><div class='add'>+		if (pmu-&gt;is_core) {</div><div class='add'>+			nr += pmu_events_table__num_events(</div><div class='add'>+				perf_pmu__default_core_events_table(), pmu);</div><div class='add'>+		}</div><div class='add'>+		nr -= pmu-&gt;cpu_common_json_aliases;</div><div class='add'>+	} else {</div><div class='ctx'> 		assert(pmu-&gt;cpu_json_aliases == 0 &amp;&amp; pmu-&gt;cpu_common_json_aliases == 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (perf_pmu__is_tool(pmu))</div><div class='ctx'> 		nr -= tool_pmu__num_skip_events();</div><div class='hunk'>@@ -2035,18 +2153,37 @@ static int sub_non_neg(int a, int b)</div><div class='ctx'> static char *format_alias(char *buf, int len, const struct perf_pmu *pmu,</div><div class='ctx'> 			  const struct perf_pmu_alias *alias, bool skip_duplicate_pmus)</div><div class='ctx'> {</div><div class='add'>+	struct parse_events_terms terms;</div><div class='ctx'> 	struct parse_events_term *term;</div><div class='add'>+	int ret, used;</div><div class='ctx'> 	size_t pmu_name_len = pmu_deduped_name_len(pmu, pmu-&gt;name,</div><div class='ctx'> 						   skip_duplicate_pmus);</div><div class='del'>-	int used = snprintf(buf, len, "%.*s/%s", (int)pmu_name_len, pmu-&gt;name, alias-&gt;name);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(term, &amp;alias-&gt;terms.terms, list) {</div><div class='add'>+	/* Paramemterized events have the parameters shown. */</div><div class='add'>+	if (strstr(alias-&gt;terms, "=?")) {</div><div class='add'>+		/* No parameters. */</div><div class='add'>+		snprintf(buf, len, "%.*s/%s/", (int)pmu_name_len, pmu-&gt;name, alias-&gt;name);</div><div class='add'>+		return buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	parse_events_terms__init(&amp;terms);</div><div class='add'>+	ret = parse_events_terms(&amp;terms, alias-&gt;terms);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failure to parse '%s' terms '%s': %d\n",</div><div class='add'>+			alias-&gt;name, alias-&gt;terms, ret);</div><div class='add'>+		parse_events_terms__exit(&amp;terms);</div><div class='add'>+		snprintf(buf, len, "%.*s/%s/", (int)pmu_name_len, pmu-&gt;name, alias-&gt;name);</div><div class='add'>+		return buf;</div><div class='add'>+	}</div><div class='add'>+	used = snprintf(buf, len, "%.*s/%s", (int)pmu_name_len, pmu-&gt;name, alias-&gt;name);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(term, &amp;terms.terms, list) {</div><div class='ctx'> 		if (term-&gt;type_val == PARSE_EVENTS__TERM_TYPE_STR)</div><div class='ctx'> 			used += snprintf(buf + used, sub_non_neg(len, used),</div><div class='ctx'> 					",%s=%s", term-&gt;config,</div><div class='ctx'> 					term-&gt;val.str);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	parse_events_terms__exit(&amp;terms);</div><div class='ctx'> 	if (sub_non_neg(len, used) &gt; 0) {</div><div class='ctx'> 		buf[used] = '/';</div><div class='ctx'> 		used++;</div><div class='hunk'>@@ -2060,6 +2197,42 @@ static char *format_alias(char *buf, int len, const struct perf_pmu *pmu,</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool perf_pmu_alias__check_deprecated(struct perf_pmu *pmu, struct perf_pmu_alias *alias)</div><div class='add'>+{</div><div class='add'>+	struct perf_event_attr attr = {.config = 0,};</div><div class='add'>+	const char *check_terms;</div><div class='add'>+	bool has_legacy_config;</div><div class='add'>+</div><div class='add'>+	if (alias-&gt;legacy_deprecated_checked)</div><div class='add'>+		return alias-&gt;deprecated;</div><div class='add'>+</div><div class='add'>+	alias-&gt;legacy_deprecated_checked = true;</div><div class='add'>+	if (alias-&gt;deprecated)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	check_terms = alias-&gt;terms;</div><div class='add'>+	has_legacy_config =</div><div class='add'>+		strstr(check_terms, "legacy-hardware-config=") != NULL ||</div><div class='add'>+		strstr(check_terms, "legacy-cache-config=") != NULL;</div><div class='add'>+	if (!has_legacy_config &amp;&amp; alias-&gt;legacy_terms) {</div><div class='add'>+		check_terms = alias-&gt;legacy_terms;</div><div class='add'>+		has_legacy_config =</div><div class='add'>+			strstr(check_terms, "legacy-hardware-config=") != NULL ||</div><div class='add'>+			strstr(check_terms, "legacy-cache-config=") != NULL;</div><div class='add'>+	}</div><div class='add'>+	if (!has_legacy_config)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (perf_pmu__parse_terms_to_attr(pmu, check_terms, &amp;attr) != 0) {</div><div class='add'>+		/* Parsing failed, set as deprecated. */</div><div class='add'>+		alias-&gt;deprecated = true;</div><div class='add'>+	} else if (attr.type &lt; PERF_TYPE_MAX) {</div><div class='add'>+		/* Flag unsupported legacy events as deprecated. */</div><div class='add'>+		alias-&gt;deprecated = !is_event_supported(attr.type, attr.config);</div><div class='add'>+	}</div><div class='add'>+	return alias-&gt;deprecated;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int perf_pmu__for_each_event(struct perf_pmu *pmu, bool skip_duplicate_pmus,</div><div class='ctx'> 			     void *state, pmu_event_callback cb)</div><div class='ctx'> {</div><div class='hunk'>@@ -2069,7 +2242,6 @@ int perf_pmu__for_each_event(struct perf_pmu *pmu, bool skip_duplicate_pmus,</div><div class='ctx'> 		.event_type_desc = "Kernel PMU event",</div><div class='ctx'> 	};</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	struct strbuf sb;</div><div class='ctx'> 	struct hashmap_entry *entry;</div><div class='ctx'> 	size_t bkt;</div><div class='ctx'> </div><div class='hunk'>@@ -2080,7 +2252,6 @@ int perf_pmu__for_each_event(struct perf_pmu *pmu, bool skip_duplicate_pmus,</div><div class='ctx'> 	if (perf_pmu__is_drm(pmu))</div><div class='ctx'> 		return drm_pmu__for_each_event(pmu, state, cb);</div><div class='ctx'> </div><div class='del'>-	strbuf_init(&amp;sb, /*hint=*/ 0);</div><div class='ctx'> 	pmu_aliases_parse(pmu);</div><div class='ctx'> 	pmu_add_cpu_aliases(pmu);</div><div class='ctx'> 	hashmap__for_each_entry(pmu-&gt;aliases, entry, bkt) {</div><div class='hunk'>@@ -2115,16 +2286,14 @@ int perf_pmu__for_each_event(struct perf_pmu *pmu, bool skip_duplicate_pmus,</div><div class='ctx'> 		info.desc = event-&gt;desc;</div><div class='ctx'> 		info.long_desc = event-&gt;long_desc;</div><div class='ctx'> 		info.encoding_desc = buf + buf_used;</div><div class='del'>-		parse_events_terms__to_strbuf(&amp;event-&gt;terms, &amp;sb);</div><div class='ctx'> 		buf_used += snprintf(buf + buf_used, sizeof(buf) - buf_used,</div><div class='del'>-				"%.*s/%s/", (int)pmu_name_len, info.pmu_name, sb.buf) + 1;</div><div class='add'>+				"%.*s/%s/", (int)pmu_name_len, info.pmu_name, event-&gt;terms) + 1;</div><div class='add'>+		info.str = event-&gt;terms;</div><div class='ctx'> 		info.topic = event-&gt;topic;</div><div class='del'>-		info.str = sb.buf;</div><div class='del'>-		info.deprecated = event-&gt;deprecated;</div><div class='add'>+		info.deprecated = perf_pmu_alias__check_deprecated(pmu, event);</div><div class='ctx'> 		ret = cb(state, &amp;info);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='del'>-		strbuf_setlen(&amp;sb, /*len=*/ 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (pmu-&gt;selectable) {</div><div class='ctx'> 		info.name = buf;</div><div class='hunk'>@@ -2140,7 +2309,6 @@ int perf_pmu__for_each_event(struct perf_pmu *pmu, bool skip_duplicate_pmus,</div><div class='ctx'> 		ret = cb(state, &amp;info);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='del'>-	strbuf_release(&amp;sb);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2588,9 +2756,7 @@ const char *perf_pmu__name_from_config(struct perf_pmu *pmu, u64 config)</div><div class='ctx'> 	hashmap__for_each_entry(pmu-&gt;aliases, entry, bkt) {</div><div class='ctx'> 		struct perf_pmu_alias *event = entry-&gt;pvalue;</div><div class='ctx'> 		struct perf_event_attr attr = {.config = 0,};</div><div class='del'>-</div><div class='del'>-		int ret = perf_pmu__config(pmu, &amp;attr, &amp;event-&gt;terms, /*apply_hardcoded=*/true,</div><div class='del'>-					   /*err=*/NULL);</div><div class='add'>+		int ret = perf_pmu__parse_terms_to_attr(pmu, event-&gt;terms, &amp;attr);</div><div class='ctx'> </div><div class='ctx'> 		if (ret == 0 &amp;&amp; config == attr.config)</div><div class='ctx'> 			return event-&gt;name;</div><div class='head'>diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h<br/>index 1ebcf0242af8..8f11bfe8ed6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pmu.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/pmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/pmu.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/pmu.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@ enum {</div><div class='ctx'> 	PERF_PMU_FORMAT_VALUE_CONFIG1,</div><div class='ctx'> 	PERF_PMU_FORMAT_VALUE_CONFIG2,</div><div class='ctx'> 	PERF_PMU_FORMAT_VALUE_CONFIG3,</div><div class='add'>+	PERF_PMU_FORMAT_VALUE_CONFIG4,</div><div class='ctx'> 	PERF_PMU_FORMAT_VALUE_CONFIG_END,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -37,6 +38,19 @@ struct perf_pmu_caps {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum pmu_kind {</div><div class='add'>+	/* A perf event syscall PMU. */</div><div class='add'>+	PERF_PMU_KIND_PE,</div><div class='add'>+	/* A perf tool provided DRM PMU. */</div><div class='add'>+	PERF_PMU_KIND_DRM,</div><div class='add'>+	/* A perf tool provided HWMON PMU. */</div><div class='add'>+	PERF_PMU_KIND_HWMON,</div><div class='add'>+	/* Perf tool provided PMU for tool events like time. */</div><div class='add'>+	PERF_PMU_KIND_TOOL,</div><div class='add'>+	/* A testing PMU kind. */</div><div class='add'>+	PERF_PMU_KIND_FAKE</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	PERF_PMU_TYPE_PE_START    = 0,</div><div class='ctx'> 	PERF_PMU_TYPE_PE_END      = 0xFFFDFFFF,</div><div class='hunk'>@@ -306,4 +320,23 @@ void perf_pmu__delete(struct perf_pmu *pmu);</div><div class='ctx'> const char *perf_pmu__name_from_config(struct perf_pmu *pmu, u64 config);</div><div class='ctx'> bool perf_pmu__is_fake(const struct perf_pmu *pmu);</div><div class='ctx'> </div><div class='add'>+static inline enum pmu_kind perf_pmu__kind(const struct perf_pmu *pmu)</div><div class='add'>+{</div><div class='add'>+	__u32 type;</div><div class='add'>+</div><div class='add'>+	if (!pmu)</div><div class='add'>+		return PERF_PMU_KIND_PE;</div><div class='add'>+</div><div class='add'>+	type = pmu-&gt;type;</div><div class='add'>+	if (type &lt;= PERF_PMU_TYPE_PE_END)</div><div class='add'>+		return PERF_PMU_KIND_PE;</div><div class='add'>+	if (type &lt;= PERF_PMU_TYPE_DRM_END)</div><div class='add'>+		return PERF_PMU_KIND_DRM;</div><div class='add'>+	if (type &lt;= PERF_PMU_TYPE_HWMON_END)</div><div class='add'>+		return PERF_PMU_KIND_HWMON;</div><div class='add'>+	if (type == PERF_PMU_TYPE_TOOL)</div><div class='add'>+		return PERF_PMU_KIND_TOOL;</div><div class='add'>+	return PERF_PMU_KIND_FAKE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __PMU_H */</div><div class='head'>diff --git a/tools/perf/util/powerpc-vpadtl.c b/tools/perf/util/powerpc-vpadtl.c<br/>new file mode 100644<br/>index 000000000000..d1c3396f182f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/powerpc-vpadtl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/powerpc-vpadtl.c</a></div><div class='hunk'>@@ -0,0 +1,733 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * VPA DTL PMU support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='add'>+#include "color.h"</div><div class='add'>+#include "evlist.h"</div><div class='add'>+#include "session.h"</div><div class='add'>+#include "auxtrace.h"</div><div class='add'>+#include "data.h"</div><div class='add'>+#include "machine.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "powerpc-vpadtl.h"</div><div class='add'>+#include "sample.h"</div><div class='add'>+#include "tool.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Structure to save the auxtrace queue</div><div class='add'>+ */</div><div class='add'>+struct powerpc_vpadtl {</div><div class='add'>+	struct auxtrace			auxtrace;</div><div class='add'>+	struct auxtrace_queues		queues;</div><div class='add'>+	struct auxtrace_heap		heap;</div><div class='add'>+	u32				auxtrace_type;</div><div class='add'>+	struct perf_session		*session;</div><div class='add'>+	struct machine			*machine;</div><div class='add'>+	u32				pmu_type;</div><div class='add'>+	u64				sample_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct boottb_freq {</div><div class='add'>+	u64     boot_tb;</div><div class='add'>+	u64     tb_freq;</div><div class='add'>+	u64     timebase;</div><div class='add'>+	u64     padded[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct powerpc_vpadtl_queue {</div><div class='add'>+	struct powerpc_vpadtl	*vpa;</div><div class='add'>+	unsigned int		queue_nr;</div><div class='add'>+	struct auxtrace_buffer	*buffer;</div><div class='add'>+	struct thread		*thread;</div><div class='add'>+	bool			on_heap;</div><div class='add'>+	struct powerpc_vpadtl_entry	*dtl;</div><div class='add'>+	u64			timestamp;</div><div class='add'>+	unsigned long		pkt_len;</div><div class='add'>+	unsigned long		buf_len;</div><div class='add'>+	u64			boot_tb;</div><div class='add'>+	u64			tb_freq;</div><div class='add'>+	unsigned int		tb_buffer;</div><div class='add'>+	unsigned int		size;</div><div class='add'>+	bool			done;</div><div class='add'>+	pid_t			pid;</div><div class='add'>+	pid_t			tid;</div><div class='add'>+	int			cpu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *dispatch_reasons[11] = {</div><div class='add'>+	"external_interrupt",</div><div class='add'>+	"firmware_internal_event",</div><div class='add'>+	"H_PROD",</div><div class='add'>+	"decrementer_interrupt",</div><div class='add'>+	"system_reset",</div><div class='add'>+	"firmware_internal_event",</div><div class='add'>+	"conferred_cycles",</div><div class='add'>+	"time_slice",</div><div class='add'>+	"virtual_memory_page_fault",</div><div class='add'>+	"expropriated_adjunct",</div><div class='add'>+	"priv_doorbell"};</div><div class='add'>+</div><div class='add'>+const char *preempt_reasons[10] = {</div><div class='add'>+	"unused",</div><div class='add'>+	"firmware_internal_event",</div><div class='add'>+	"H_CEDE",</div><div class='add'>+	"H_CONFER",</div><div class='add'>+	"time_slice",</div><div class='add'>+	"migration_hibernation_page_fault",</div><div class='add'>+	"virtual_memory_page_fault",</div><div class='add'>+	"H_CONFER_ADJUNCT",</div><div class='add'>+	"hcall_adjunct",</div><div class='add'>+	"HDEC_adjunct"};</div><div class='add'>+</div><div class='add'>+#define	dtl_entry_size	sizeof(struct powerpc_vpadtl_entry)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function to dump the dispatch trace data when perf report</div><div class='add'>+ * is invoked with -D</div><div class='add'>+ */</div><div class='add'>+static void powerpc_vpadtl_dump(struct powerpc_vpadtl *vpa __maybe_unused,</div><div class='add'>+			 unsigned char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl_entry *dtl;</div><div class='add'>+	int pkt_len, pos = 0;</div><div class='add'>+	const char *color = PERF_COLOR_BLUE;</div><div class='add'>+</div><div class='add'>+	color_fprintf(stdout, color,</div><div class='add'>+			". ... VPA DTL PMU data: size %zu bytes, entries is %zu\n",</div><div class='add'>+			len, len/dtl_entry_size);</div><div class='add'>+</div><div class='add'>+	if (len % dtl_entry_size)</div><div class='add'>+		len = len - (len % dtl_entry_size);</div><div class='add'>+</div><div class='add'>+	while (len) {</div><div class='add'>+		pkt_len = dtl_entry_size;</div><div class='add'>+		printf(".");</div><div class='add'>+		color_fprintf(stdout, color, "  %08x: ", pos);</div><div class='add'>+		dtl = (struct powerpc_vpadtl_entry *)buf;</div><div class='add'>+		if (dtl-&gt;timebase != 0) {</div><div class='add'>+			printf("dispatch_reason:%s, preempt_reason:%s, "</div><div class='add'>+					"enqueue_to_dispatch_time:%d, ready_to_enqueue_time:%d, "</div><div class='add'>+					"waiting_to_ready_time:%d\n",</div><div class='add'>+					dispatch_reasons[dtl-&gt;dispatch_reason],</div><div class='add'>+					preempt_reasons[dtl-&gt;preempt_reason],</div><div class='add'>+					be32_to_cpu(dtl-&gt;enqueue_to_dispatch_time),</div><div class='add'>+					be32_to_cpu(dtl-&gt;ready_to_enqueue_time),</div><div class='add'>+					be32_to_cpu(dtl-&gt;waiting_to_ready_time));</div><div class='add'>+		} else {</div><div class='add'>+			struct boottb_freq *boot_tb = (struct boottb_freq *)buf;</div><div class='add'>+</div><div class='add'>+			printf("boot_tb: %" PRIu64 ", tb_freq: %" PRIu64 "\n",</div><div class='add'>+					boot_tb-&gt;boot_tb, boot_tb-&gt;tb_freq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pos += pkt_len;</div><div class='add'>+		buf += pkt_len;</div><div class='add'>+		len -= pkt_len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long long powerpc_vpadtl_timestamp(struct powerpc_vpadtl_queue *vpaq)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl_entry *record = vpaq-&gt;dtl;</div><div class='add'>+	unsigned long long timestamp = 0;</div><div class='add'>+	unsigned long long boot_tb;</div><div class='add'>+	unsigned long long diff;</div><div class='add'>+	double result, div;</div><div class='add'>+	double boot_freq;</div><div class='add'>+	/*</div><div class='add'>+	 * Formula used to get timestamp that can be co-related with</div><div class='add'>+	 * other perf events:</div><div class='add'>+	 * ((timbase from DTL entry - boot time) / frequency) * 1000000000</div><div class='add'>+	 */</div><div class='add'>+	if (record-&gt;timebase) {</div><div class='add'>+		boot_tb = vpaq-&gt;boot_tb;</div><div class='add'>+		boot_freq = vpaq-&gt;tb_freq;</div><div class='add'>+		diff = be64_to_cpu(record-&gt;timebase) - boot_tb;</div><div class='add'>+		div = diff / boot_freq;</div><div class='add'>+		result = div;</div><div class='add'>+		result = result * 1000000000;</div><div class='add'>+		timestamp = result;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return timestamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct powerpc_vpadtl *session_to_vpa(struct perf_session *session)</div><div class='add'>+{</div><div class='add'>+	return container_of(session-&gt;auxtrace, struct powerpc_vpadtl, auxtrace);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void powerpc_vpadtl_dump_event(struct powerpc_vpadtl *vpa, unsigned char *buf,</div><div class='add'>+			       size_t len)</div><div class='add'>+{</div><div class='add'>+	printf(".\n");</div><div class='add'>+	powerpc_vpadtl_dump(vpa, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Generate perf sample for each entry in the dispatch trace log.</div><div class='add'>+ *   - sample ip is picked from srr0 field of powerpc_vpadtl_entry</div><div class='add'>+ *   - sample cpu is logical cpu.</div><div class='add'>+ *   - cpumode is set to PERF_RECORD_MISC_KERNEL</div><div class='add'>+ *   - Additionally save the details in raw_data of sample. This</div><div class='add'>+ *   is to print the relevant fields in perf_sample__fprintf_synth()</div><div class='add'>+ *   when called from builtin-script</div><div class='add'>+ */</div><div class='add'>+static int powerpc_vpadtl_sample(struct powerpc_vpadtl_entry *record,</div><div class='add'>+		struct powerpc_vpadtl *vpa, u64 save, int cpu)</div><div class='add'>+{</div><div class='add'>+	struct perf_sample sample;</div><div class='add'>+	union perf_event event;</div><div class='add'>+</div><div class='add'>+	sample.ip = be64_to_cpu(record-&gt;srr0);</div><div class='add'>+	sample.period = 1;</div><div class='add'>+	sample.cpu = cpu;</div><div class='add'>+	sample.id = vpa-&gt;sample_id;</div><div class='add'>+	sample.callchain = NULL;</div><div class='add'>+	sample.branch_stack = NULL;</div><div class='add'>+	memset(&amp;event, 0, sizeof(event));</div><div class='add'>+	sample.cpumode = PERF_RECORD_MISC_KERNEL;</div><div class='add'>+	sample.time = save;</div><div class='add'>+	sample.raw_data = record;</div><div class='add'>+	sample.raw_size = sizeof(record);</div><div class='add'>+	event.sample.header.type = PERF_RECORD_SAMPLE;</div><div class='add'>+	event.sample.header.misc = sample.cpumode;</div><div class='add'>+	event.sample.header.size = sizeof(struct perf_event_header);</div><div class='add'>+</div><div class='add'>+	if (perf_session__deliver_synth_event(vpa-&gt;session, &amp;event, &amp;sample)) {</div><div class='add'>+		pr_debug("Failed to create sample for dtl entry\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl_get_buffer(struct powerpc_vpadtl_queue *vpaq)</div><div class='add'>+{</div><div class='add'>+	struct auxtrace_buffer *buffer = vpaq-&gt;buffer;</div><div class='add'>+	struct auxtrace_queues *queues = &amp;vpaq-&gt;vpa-&gt;queues;</div><div class='add'>+	struct auxtrace_queue *queue;</div><div class='add'>+</div><div class='add'>+	queue = &amp;queues-&gt;queue_array[vpaq-&gt;queue_nr];</div><div class='add'>+	buffer = auxtrace_buffer__next(queue, buffer);</div><div class='add'>+</div><div class='add'>+	if (!buffer)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vpaq-&gt;buffer = buffer;</div><div class='add'>+	vpaq-&gt;size = buffer-&gt;size;</div><div class='add'>+</div><div class='add'>+	/* If the aux_buffer doesn't have data associated, try to load it */</div><div class='add'>+	if (!buffer-&gt;data) {</div><div class='add'>+		/* get the file desc associated with the perf data file */</div><div class='add'>+		int fd = perf_data__fd(vpaq-&gt;vpa-&gt;session-&gt;data);</div><div class='add'>+</div><div class='add'>+		buffer-&gt;data = auxtrace_buffer__get_data(buffer, fd);</div><div class='add'>+		if (!buffer-&gt;data)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vpaq-&gt;buf_len = buffer-&gt;size;</div><div class='add'>+</div><div class='add'>+	if (buffer-&gt;size % dtl_entry_size)</div><div class='add'>+		vpaq-&gt;buf_len = buffer-&gt;size - (buffer-&gt;size % dtl_entry_size);</div><div class='add'>+</div><div class='add'>+	if (vpaq-&gt;tb_buffer != buffer-&gt;buffer_nr) {</div><div class='add'>+		vpaq-&gt;pkt_len = 0;</div><div class='add'>+		vpaq-&gt;tb_buffer = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The first entry in the queue for VPA DTL PMU has the boot timebase,</div><div class='add'>+ * frequency details which are needed to get timestamp which is required to</div><div class='add'>+ * correlate with other events. Save the boot_tb and tb_freq as part of</div><div class='add'>+ * powerpc_vpadtl_queue. The very next entry is the actual trace data to</div><div class='add'>+ * be returned.</div><div class='add'>+ */</div><div class='add'>+static int powerpc_vpadtl_decode(struct powerpc_vpadtl_queue *vpaq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	char *buf;</div><div class='add'>+	struct boottb_freq *boottb;</div><div class='add'>+</div><div class='add'>+	ret = powerpc_vpadtl_get_buffer(vpaq);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	boottb = (struct boottb_freq *)vpaq-&gt;buffer-&gt;data;</div><div class='add'>+	if (boottb-&gt;timebase == 0) {</div><div class='add'>+		vpaq-&gt;boot_tb = boottb-&gt;boot_tb;</div><div class='add'>+		vpaq-&gt;tb_freq = boottb-&gt;tb_freq;</div><div class='add'>+		vpaq-&gt;pkt_len += dtl_entry_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf = vpaq-&gt;buffer-&gt;data;</div><div class='add'>+	buf += vpaq-&gt;pkt_len;</div><div class='add'>+	vpaq-&gt;dtl = (struct powerpc_vpadtl_entry *)buf;</div><div class='add'>+</div><div class='add'>+	vpaq-&gt;tb_buffer = vpaq-&gt;buffer-&gt;buffer_nr;</div><div class='add'>+	vpaq-&gt;buffer = NULL;</div><div class='add'>+	vpaq-&gt;buf_len = 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl_decode_all(struct powerpc_vpadtl_queue *vpaq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned char *buf;</div><div class='add'>+</div><div class='add'>+	if (!vpaq-&gt;buf_len || vpaq-&gt;pkt_len == vpaq-&gt;size) {</div><div class='add'>+		ret = powerpc_vpadtl_get_buffer(vpaq);</div><div class='add'>+		if (ret &lt;= 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vpaq-&gt;buffer) {</div><div class='add'>+		buf = vpaq-&gt;buffer-&gt;data;</div><div class='add'>+		buf += vpaq-&gt;pkt_len;</div><div class='add'>+		vpaq-&gt;dtl = (struct powerpc_vpadtl_entry *)buf;</div><div class='add'>+		if ((long long)be64_to_cpu(vpaq-&gt;dtl-&gt;timebase) &lt;= 0) {</div><div class='add'>+			if (vpaq-&gt;pkt_len != dtl_entry_size &amp;&amp; vpaq-&gt;buf_len) {</div><div class='add'>+				vpaq-&gt;pkt_len += dtl_entry_size;</div><div class='add'>+				vpaq-&gt;buf_len -= dtl_entry_size;</div><div class='add'>+			}</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		vpaq-&gt;pkt_len += dtl_entry_size;</div><div class='add'>+		vpaq-&gt;buf_len -= dtl_entry_size;</div><div class='add'>+	} else {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl_run_decoder(struct powerpc_vpadtl_queue *vpaq, u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl *vpa = vpaq-&gt;vpa;</div><div class='add'>+	struct powerpc_vpadtl_entry *record;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long long vpaq_timestamp;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		ret = powerpc_vpadtl_decode_all(vpaq);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			pr_debug("All data in the queue has been processed.\n");</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Error is detected when decoding VPA PMU trace. Continue to</div><div class='add'>+		 * the next trace data and find out more dtl entries.</div><div class='add'>+		 */</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		record = vpaq-&gt;dtl;</div><div class='add'>+</div><div class='add'>+		vpaq_timestamp = powerpc_vpadtl_timestamp(vpaq);</div><div class='add'>+</div><div class='add'>+		/* Update timestamp for the last record */</div><div class='add'>+		if (vpaq_timestamp &gt; vpaq-&gt;timestamp)</div><div class='add'>+			vpaq-&gt;timestamp = vpaq_timestamp;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the timestamp of the queue is later than timestamp of the</div><div class='add'>+		 * coming perf event, bail out so can allow the perf event to</div><div class='add'>+		 * be processed ahead.</div><div class='add'>+		 */</div><div class='add'>+		if (vpaq-&gt;timestamp &gt;= *timestamp) {</div><div class='add'>+			*timestamp = vpaq-&gt;timestamp;</div><div class='add'>+			vpaq-&gt;pkt_len -= dtl_entry_size;</div><div class='add'>+			vpaq-&gt;buf_len += dtl_entry_size;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = powerpc_vpadtl_sample(record, vpa, vpaq_timestamp, vpaq-&gt;cpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			continue;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For each of the PERF_RECORD_XX record, compare the timestamp</div><div class='add'>+ * of perf record with timestamp of top element in the auxtrace heap.</div><div class='add'>+ * Process the auxtrace queue if the timestamp of element from heap is</div><div class='add'>+ * lower than timestamp from entry in perf record.</div><div class='add'>+ *</div><div class='add'>+ * Update the timestamp of the auxtrace heap with the timestamp</div><div class='add'>+ * of last processed entry from the auxtrace buffer.</div><div class='add'>+ */</div><div class='add'>+static int powerpc_vpadtl_process_queues(struct powerpc_vpadtl *vpa, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	unsigned int queue_nr;</div><div class='add'>+	u64 ts;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		struct auxtrace_queue *queue;</div><div class='add'>+		struct powerpc_vpadtl_queue *vpaq;</div><div class='add'>+</div><div class='add'>+		if (!vpa-&gt;heap.heap_cnt)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (vpa-&gt;heap.heap_array[0].ordinal &gt;= timestamp)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		queue_nr = vpa-&gt;heap.heap_array[0].queue_nr;</div><div class='add'>+		queue = &amp;vpa-&gt;queues.queue_array[queue_nr];</div><div class='add'>+		vpaq = queue-&gt;priv;</div><div class='add'>+</div><div class='add'>+		auxtrace_heap__pop(&amp;vpa-&gt;heap);</div><div class='add'>+</div><div class='add'>+		if (vpa-&gt;heap.heap_cnt) {</div><div class='add'>+			ts = vpa-&gt;heap.heap_array[0].ordinal + 1;</div><div class='add'>+			if (ts &gt; timestamp)</div><div class='add'>+				ts = timestamp;</div><div class='add'>+		} else {</div><div class='add'>+			ts = timestamp;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = powerpc_vpadtl_run_decoder(vpaq, &amp;ts);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			auxtrace_heap__add(&amp;vpa-&gt;heap, queue_nr, ts);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!ret) {</div><div class='add'>+			ret = auxtrace_heap__add(&amp;vpa-&gt;heap, queue_nr, ts);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		} else {</div><div class='add'>+			vpaq-&gt;on_heap = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct powerpc_vpadtl_queue *powerpc_vpadtl__alloc_queue(struct powerpc_vpadtl *vpa,</div><div class='add'>+						unsigned int queue_nr)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl_queue *vpaq;</div><div class='add'>+</div><div class='add'>+	vpaq = zalloc(sizeof(*vpaq));</div><div class='add'>+	if (!vpaq)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	vpaq-&gt;vpa = vpa;</div><div class='add'>+	vpaq-&gt;queue_nr = queue_nr;</div><div class='add'>+</div><div class='add'>+	return vpaq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * When the Dispatch Trace Log data is collected along with other events</div><div class='add'>+ * like sched tracepoint events, it needs to be correlated and present</div><div class='add'>+ * interleaved along with these events. Perf events can be collected</div><div class='add'>+ * parallely across the CPUs.</div><div class='add'>+ *</div><div class='add'>+ * An auxtrace_queue is created for each CPU. Data within each queue is in</div><div class='add'>+ * increasing order of timestamp. Allocate and setup auxtrace queues here.</div><div class='add'>+ * All auxtrace queues is maintained in auxtrace heap in the increasing order</div><div class='add'>+ * of timestamp. So always the lowest timestamp (entries to be processed first)</div><div class='add'>+ * is on top of the heap.</div><div class='add'>+ *</div><div class='add'>+ * To add to auxtrace heap, fetch the timestamp from first DTL entry</div><div class='add'>+ * for each of the queue.</div><div class='add'>+ */</div><div class='add'>+static int powerpc_vpadtl__setup_queue(struct powerpc_vpadtl *vpa,</div><div class='add'>+		struct auxtrace_queue *queue,</div><div class='add'>+		unsigned int queue_nr)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl_queue *vpaq = queue-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;queue-&gt;head) || vpaq)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vpaq = powerpc_vpadtl__alloc_queue(vpa, queue_nr);</div><div class='add'>+	if (!vpaq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	queue-&gt;priv = vpaq;</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;cpu != -1)</div><div class='add'>+		vpaq-&gt;cpu = queue-&gt;cpu;</div><div class='add'>+</div><div class='add'>+	if (!vpaq-&gt;on_heap) {</div><div class='add'>+		int ret;</div><div class='add'>+retry:</div><div class='add'>+		ret = powerpc_vpadtl_decode(vpaq);</div><div class='add'>+		if (!ret)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto retry;</div><div class='add'>+</div><div class='add'>+		vpaq-&gt;timestamp = powerpc_vpadtl_timestamp(vpaq);</div><div class='add'>+</div><div class='add'>+		ret = auxtrace_heap__add(&amp;vpa-&gt;heap, queue_nr, vpaq-&gt;timestamp);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		vpaq-&gt;on_heap = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl__setup_queues(struct powerpc_vpadtl *vpa)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vpa-&gt;queues.nr_queues; i++) {</div><div class='add'>+		ret = powerpc_vpadtl__setup_queue(vpa, &amp;vpa-&gt;queues.queue_array[i], i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl__update_queues(struct powerpc_vpadtl *vpa)</div><div class='add'>+{</div><div class='add'>+	if (vpa-&gt;queues.new_data) {</div><div class='add'>+		vpa-&gt;queues.new_data = false;</div><div class='add'>+		return powerpc_vpadtl__setup_queues(vpa);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl_process_event(struct perf_session *session,</div><div class='add'>+				 union perf_event *event __maybe_unused,</div><div class='add'>+				 struct perf_sample *sample,</div><div class='add'>+				 const struct perf_tool *tool)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl *vpa = session_to_vpa(session);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (dump_trace)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!tool-&gt;ordered_events) {</div><div class='add'>+		pr_err("VPA requires ordered events\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sample-&gt;time) {</div><div class='add'>+		err = powerpc_vpadtl__update_queues(vpa);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = powerpc_vpadtl_process_queues(vpa, sample-&gt;time);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Process PERF_RECORD_AUXTRACE records</div><div class='add'>+ */</div><div class='add'>+static int powerpc_vpadtl_process_auxtrace_event(struct perf_session *session,</div><div class='add'>+					  union perf_event *event,</div><div class='add'>+					  const struct perf_tool *tool __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl *vpa = session_to_vpa(session);</div><div class='add'>+	struct auxtrace_buffer *buffer;</div><div class='add'>+	int fd = perf_data__fd(session-&gt;data);</div><div class='add'>+	off_t data_offset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dump_trace)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (perf_data__is_pipe(session-&gt;data)) {</div><div class='add'>+		data_offset = 0;</div><div class='add'>+	} else {</div><div class='add'>+		data_offset = lseek(fd, 0, SEEK_CUR);</div><div class='add'>+		if (data_offset == -1)</div><div class='add'>+			return -errno;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = auxtrace_queues__add_event(&amp;vpa-&gt;queues, session, event,</div><div class='add'>+			data_offset, &amp;buffer);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Dump here now we have copied a piped trace out of the pipe */</div><div class='add'>+	if (auxtrace_buffer__get_data(buffer, fd)) {</div><div class='add'>+		powerpc_vpadtl_dump_event(vpa, buffer-&gt;data, buffer-&gt;size);</div><div class='add'>+		auxtrace_buffer__put_data(buffer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int powerpc_vpadtl_flush(struct perf_session *session __maybe_unused,</div><div class='add'>+			 const struct perf_tool *tool __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void powerpc_vpadtl_free_events(struct perf_session *session)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl *vpa = session_to_vpa(session);</div><div class='add'>+	struct auxtrace_queues *queues = &amp;vpa-&gt;queues;</div><div class='add'>+</div><div class='add'>+	for (unsigned int i = 0; i &lt; queues-&gt;nr_queues; i++)</div><div class='add'>+		zfree(&amp;queues-&gt;queue_array[i].priv);</div><div class='add'>+</div><div class='add'>+	auxtrace_queues__free(queues);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void powerpc_vpadtl_free(struct perf_session *session)</div><div class='add'>+{</div><div class='add'>+	struct powerpc_vpadtl *vpa = session_to_vpa(session);</div><div class='add'>+</div><div class='add'>+	auxtrace_heap__free(&amp;vpa-&gt;heap);</div><div class='add'>+	powerpc_vpadtl_free_events(session);</div><div class='add'>+	session-&gt;auxtrace = NULL;</div><div class='add'>+	free(vpa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const powerpc_vpadtl_info_fmts[] = {</div><div class='add'>+	[POWERPC_VPADTL_TYPE]		= "  PMU Type           %"PRId64"\n",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void powerpc_vpadtl_print_info(__u64 *arr)</div><div class='add'>+{</div><div class='add'>+	if (!dump_trace)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fprintf(stdout, powerpc_vpadtl_info_fmts[POWERPC_VPADTL_TYPE], arr[POWERPC_VPADTL_TYPE]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_event_name(struct evlist *evlist, u64 id,</div><div class='add'>+		const char *name)</div><div class='add'>+{</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		if (evsel-&gt;core.id &amp;&amp; evsel-&gt;core.id[0] == id) {</div><div class='add'>+			if (evsel-&gt;name)</div><div class='add'>+				zfree(&amp;evsel-&gt;name);</div><div class='add'>+			evsel-&gt;name = strdup(name);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+powerpc_vpadtl_synth_events(struct powerpc_vpadtl *vpa, struct perf_session *session)</div><div class='add'>+{</div><div class='add'>+	struct evlist *evlist = session-&gt;evlist;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+	struct perf_event_attr attr;</div><div class='add'>+	bool found = false;</div><div class='add'>+	u64 id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	evlist__for_each_entry(evlist, evsel) {</div><div class='add'>+		if (strstarts(evsel-&gt;name, "vpa_dtl")) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		pr_debug("No selected events with VPA trace data\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;attr, 0, sizeof(struct perf_event_attr));</div><div class='add'>+	attr.size = sizeof(struct perf_event_attr);</div><div class='add'>+	attr.sample_type = evsel-&gt;core.attr.sample_type;</div><div class='add'>+	attr.sample_id_all = evsel-&gt;core.attr.sample_id_all;</div><div class='add'>+	attr.type = PERF_TYPE_SYNTH;</div><div class='add'>+	attr.config = PERF_SYNTH_POWERPC_VPA_DTL;</div><div class='add'>+</div><div class='add'>+	/* create new id val to be a fixed offset from evsel id */</div><div class='add'>+	id = auxtrace_synth_id_range_start(evsel);</div><div class='add'>+</div><div class='add'>+	err = perf_session__deliver_synth_attr_event(session, &amp;attr, id);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	vpa-&gt;sample_id = id;</div><div class='add'>+	set_event_name(evlist, id, "vpa-dtl");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Process the PERF_RECORD_AUXTRACE_INFO records and setup</div><div class='add'>+ * the infrastructure to process auxtrace events. PERF_RECORD_AUXTRACE_INFO</div><div class='add'>+ * is processed first since it is of type perf_user_event_type.</div><div class='add'>+ * Initialise the aux buffer queues using auxtrace_queues__init().</div><div class='add'>+ * auxtrace_queue is created for each CPU.</div><div class='add'>+ */</div><div class='add'>+int powerpc_vpadtl_process_auxtrace_info(union perf_event *event,</div><div class='add'>+				  struct perf_session *session)</div><div class='add'>+{</div><div class='add'>+	struct perf_record_auxtrace_info *auxtrace_info = &amp;event-&gt;auxtrace_info;</div><div class='add'>+	size_t min_sz = sizeof(u64) * POWERPC_VPADTL_TYPE;</div><div class='add'>+	struct powerpc_vpadtl *vpa;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (auxtrace_info-&gt;header.size &lt; sizeof(struct perf_record_auxtrace_info) +</div><div class='add'>+					min_sz)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	vpa = zalloc(sizeof(struct powerpc_vpadtl));</div><div class='add'>+	if (!vpa)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = auxtrace_queues__init(&amp;vpa-&gt;queues);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	vpa-&gt;session = session;</div><div class='add'>+	vpa-&gt;machine = &amp;session-&gt;machines.host; /* No kvm support */</div><div class='add'>+	vpa-&gt;auxtrace_type = auxtrace_info-&gt;type;</div><div class='add'>+	vpa-&gt;pmu_type = auxtrace_info-&gt;priv[POWERPC_VPADTL_TYPE];</div><div class='add'>+</div><div class='add'>+	vpa-&gt;auxtrace.process_event = powerpc_vpadtl_process_event;</div><div class='add'>+	vpa-&gt;auxtrace.process_auxtrace_event = powerpc_vpadtl_process_auxtrace_event;</div><div class='add'>+	vpa-&gt;auxtrace.flush_events = powerpc_vpadtl_flush;</div><div class='add'>+	vpa-&gt;auxtrace.free_events = powerpc_vpadtl_free_events;</div><div class='add'>+	vpa-&gt;auxtrace.free = powerpc_vpadtl_free;</div><div class='add'>+	session-&gt;auxtrace = &amp;vpa-&gt;auxtrace;</div><div class='add'>+</div><div class='add'>+	powerpc_vpadtl_print_info(&amp;auxtrace_info-&gt;priv[0]);</div><div class='add'>+</div><div class='add'>+	if (dump_trace)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = powerpc_vpadtl_synth_events(vpa, session);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_queues;</div><div class='add'>+</div><div class='add'>+	err = auxtrace_queues__process_index(&amp;vpa-&gt;queues, session);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_queues;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_queues:</div><div class='add'>+	auxtrace_queues__free(&amp;vpa-&gt;queues);</div><div class='add'>+	session-&gt;auxtrace = NULL;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	free(vpa);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/powerpc-vpadtl.h b/tools/perf/util/powerpc-vpadtl.h<br/>new file mode 100644<br/>index 000000000000..ca809660b9bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/powerpc-vpadtl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/powerpc-vpadtl.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * VPA DTL PMU Support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef INCLUDE__PERF_POWERPC_VPADTL_H__</div><div class='add'>+#define INCLUDE__PERF_POWERPC_VPADTL_H__</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	POWERPC_VPADTL_TYPE,</div><div class='add'>+	VPADTL_AUXTRACE_PRIV_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define VPADTL_AUXTRACE_PRIV_SIZE (VPADTL_AUXTRACE_PRIV_MAX * sizeof(u64))</div><div class='add'>+</div><div class='add'>+union perf_event;</div><div class='add'>+struct perf_session;</div><div class='add'>+struct perf_pmu;</div><div class='add'>+</div><div class='add'>+int powerpc_vpadtl_process_auxtrace_info(union perf_event *event,</div><div class='add'>+				  struct perf_session *session);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/tools/perf/util/print-events.c b/tools/perf/util/print-events.c<br/>index 4153124a9948..8f3ed83853a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/print-events.c</a></div><div class='hunk'>@@ -186,113 +186,6 @@ bool is_event_supported(u8 type, u64 config)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int print_hwcache_events(const struct print_callbacks *print_cb, void *print_state)</div><div class='del'>-{</div><div class='del'>-	struct perf_pmu *pmu = NULL;</div><div class='del'>-	const char *event_type_descriptor = event_type_descriptors[PERF_TYPE_HW_CACHE];</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only print core PMUs, skipping uncore for performance and</div><div class='del'>-	 * PERF_TYPE_SOFTWARE that can succeed in opening legacy cache evenst.</div><div class='del'>-	 */</div><div class='del'>-	while ((pmu = perf_pmus__scan_core(pmu)) != NULL) {</div><div class='del'>-		if (pmu-&gt;is_uncore || pmu-&gt;type == PERF_TYPE_SOFTWARE)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		for (int type = 0; type &lt; PERF_COUNT_HW_CACHE_MAX; type++) {</div><div class='del'>-			for (int op = 0; op &lt; PERF_COUNT_HW_CACHE_OP_MAX; op++) {</div><div class='del'>-				/* skip invalid cache type */</div><div class='del'>-				if (!evsel__is_cache_op_valid(type, op))</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				for (int res = 0; res &lt; PERF_COUNT_HW_CACHE_RESULT_MAX; res++) {</div><div class='del'>-					char name[64];</div><div class='del'>-					char alias_name[128];</div><div class='del'>-					__u64 config;</div><div class='del'>-					int ret;</div><div class='del'>-</div><div class='del'>-					__evsel__hw_cache_type_op_res_name(type, op, res,</div><div class='del'>-									name, sizeof(name));</div><div class='del'>-</div><div class='del'>-					ret = parse_events__decode_legacy_cache(name, pmu-&gt;type,</div><div class='del'>-										&amp;config);</div><div class='del'>-					if (ret || !is_event_supported(PERF_TYPE_HW_CACHE, config))</div><div class='del'>-						continue;</div><div class='del'>-					snprintf(alias_name, sizeof(alias_name), "%s/%s/",</div><div class='del'>-						 pmu-&gt;name, name);</div><div class='del'>-					print_cb-&gt;print_event(print_state,</div><div class='del'>-							"cache",</div><div class='del'>-							pmu-&gt;name,</div><div class='del'>-							pmu-&gt;type,</div><div class='del'>-							name,</div><div class='del'>-							alias_name,</div><div class='del'>-							/*scale_unit=*/NULL,</div><div class='del'>-							/*deprecated=*/false,</div><div class='del'>-							event_type_descriptor,</div><div class='del'>-							/*desc=*/NULL,</div><div class='del'>-							/*long_desc=*/NULL,</div><div class='del'>-							/*encoding_desc=*/NULL);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void print_symbol_events(const struct print_callbacks *print_cb, void *print_state,</div><div class='del'>-			 unsigned int type, const struct event_symbol *syms,</div><div class='del'>-			 unsigned int max)</div><div class='del'>-{</div><div class='del'>-	struct strlist *evt_name_list = strlist__new(NULL, NULL);</div><div class='del'>-	struct str_node *nd;</div><div class='del'>-</div><div class='del'>-	if (!evt_name_list) {</div><div class='del'>-		pr_debug("Failed to allocate new strlist for symbol events\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	for (unsigned int i = 0; i &lt; max; i++) {</div><div class='del'>-		/*</div><div class='del'>-		 * New attr.config still not supported here, the latest</div><div class='del'>-		 * example was PERF_COUNT_SW_CGROUP_SWITCHES</div><div class='del'>-		 */</div><div class='del'>-		if (syms[i].symbol == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!is_event_supported(type, i))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (strlen(syms[i].alias)) {</div><div class='del'>-			char name[MAX_NAME_LEN];</div><div class='del'>-</div><div class='del'>-			snprintf(name, MAX_NAME_LEN, "%s OR %s", syms[i].symbol, syms[i].alias);</div><div class='del'>-			strlist__add(evt_name_list, name);</div><div class='del'>-		} else</div><div class='del'>-			strlist__add(evt_name_list, syms[i].symbol);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	strlist__for_each_entry(nd, evt_name_list) {</div><div class='del'>-		char *alias = strstr(nd-&gt;s, " OR ");</div><div class='del'>-</div><div class='del'>-		if (alias) {</div><div class='del'>-			*alias = '\0';</div><div class='del'>-			alias += 4;</div><div class='del'>-		}</div><div class='del'>-		print_cb-&gt;print_event(print_state,</div><div class='del'>-				/*topic=*/NULL,</div><div class='del'>-				/*pmu_name=*/NULL,</div><div class='del'>-				type,</div><div class='del'>-				nd-&gt;s,</div><div class='del'>-				alias,</div><div class='del'>-				/*scale_unit=*/NULL,</div><div class='del'>-				/*deprecated=*/false,</div><div class='del'>-				event_type_descriptors[type],</div><div class='del'>-				/*desc=*/NULL,</div><div class='del'>-				/*long_desc=*/NULL,</div><div class='del'>-				/*encoding_desc=*/NULL);</div><div class='del'>-	}</div><div class='del'>-	strlist__delete(evt_name_list);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /** struct mep - RB-tree node for building printing information. */</div><div class='ctx'> struct mep {</div><div class='ctx'> 	/** nd - RB-tree element. */</div><div class='hunk'>@@ -431,11 +324,6 @@ void metricgroup__print(const struct print_callbacks *print_cb, void *print_stat</div><div class='ctx'>  */</div><div class='ctx'> void print_events(const struct print_callbacks *print_cb, void *print_state)</div><div class='ctx'> {</div><div class='del'>-	print_symbol_events(print_cb, print_state, PERF_TYPE_HARDWARE,</div><div class='del'>-			event_symbols_hw, PERF_COUNT_HW_MAX);</div><div class='del'>-</div><div class='del'>-	print_hwcache_events(print_cb, print_state);</div><div class='del'>-</div><div class='ctx'> 	perf_pmus__print_pmu_events(print_cb, print_state);</div><div class='ctx'> </div><div class='ctx'> 	print_cb-&gt;print_event(print_state,</div><div class='head'>diff --git a/tools/perf/util/print-events.h b/tools/perf/util/print-events.h<br/>index d6ba384f0c66..eabba5d4a1fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print-events.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print-events.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print-events.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/print-events.h</a></div><div class='hunk'>@@ -32,11 +32,7 @@ struct print_callbacks {</div><div class='ctx'> </div><div class='ctx'> /** Print all events, the default when no options are specified. */</div><div class='ctx'> void print_events(const struct print_callbacks *print_cb, void *print_state);</div><div class='del'>-int print_hwcache_events(const struct print_callbacks *print_cb, void *print_state);</div><div class='ctx'> void print_sdt_events(const struct print_callbacks *print_cb, void *print_state);</div><div class='del'>-void print_symbol_events(const struct print_callbacks *print_cb, void *print_state,</div><div class='del'>-			 unsigned int type, const struct event_symbol *syms,</div><div class='del'>-			 unsigned int max);</div><div class='ctx'> void metricgroup__print(const struct print_callbacks *print_cb, void *print_state);</div><div class='ctx'> bool is_event_supported(u8 type, u64 config);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/print_insn.c b/tools/perf/util/print_insn.c<br/>index a33a7726422d..02e6fbb8ca04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print_insn.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/print_insn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/print_insn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/print_insn.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;inttypes.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='add'>+#include "capstone.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "sample.h"</div><div class='ctx'> #include "symbol.h"</div><div class='hunk'>@@ -29,84 +30,6 @@ size_t sample__fprintf_insn_raw(struct perf_sample *sample, FILE *fp)</div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBCAPSTONE_SUPPORT</div><div class='del'>-#include &lt;capstone/capstone.h&gt;</div><div class='del'>-</div><div class='del'>-int capstone_init(struct machine *machine, csh *cs_handle, bool is64, bool disassembler_style);</div><div class='del'>-</div><div class='del'>-int capstone_init(struct machine *machine, csh *cs_handle, bool is64, bool disassembler_style)</div><div class='del'>-{</div><div class='del'>-	cs_arch arch;</div><div class='del'>-	cs_mode mode;</div><div class='del'>-</div><div class='del'>-	if (machine__is(machine, "x86_64") &amp;&amp; is64) {</div><div class='del'>-		arch = CS_ARCH_X86;</div><div class='del'>-		mode = CS_MODE_64;</div><div class='del'>-	} else if (machine__normalized_is(machine, "x86")) {</div><div class='del'>-		arch = CS_ARCH_X86;</div><div class='del'>-		mode = CS_MODE_32;</div><div class='del'>-	} else if (machine__normalized_is(machine, "arm64")) {</div><div class='del'>-		arch = CS_ARCH_ARM64;</div><div class='del'>-		mode = CS_MODE_ARM;</div><div class='del'>-	} else if (machine__normalized_is(machine, "arm")) {</div><div class='del'>-		arch = CS_ARCH_ARM;</div><div class='del'>-		mode = CS_MODE_ARM + CS_MODE_V8;</div><div class='del'>-	} else if (machine__normalized_is(machine, "s390")) {</div><div class='del'>-		arch = CS_ARCH_SYSZ;</div><div class='del'>-		mode = CS_MODE_BIG_ENDIAN;</div><div class='del'>-	} else {</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cs_open(arch, mode, cs_handle) != CS_ERR_OK) {</div><div class='del'>-		pr_warning_once("cs_open failed\n");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (machine__normalized_is(machine, "x86")) {</div><div class='del'>-		/*</div><div class='del'>-		 * In case of using capstone_init while symbol__disassemble</div><div class='del'>-		 * setting CS_OPT_SYNTAX_ATT depends if disassembler_style opts</div><div class='del'>-		 * is set via annotation args</div><div class='del'>-		 */</div><div class='del'>-		if (disassembler_style)</div><div class='del'>-			cs_option(*cs_handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);</div><div class='del'>-		/*</div><div class='del'>-		 * Resolving address operands to symbols is implemented</div><div class='del'>-		 * on x86 by investigating instruction details.</div><div class='del'>-		 */</div><div class='del'>-		cs_option(*cs_handle, CS_OPT_DETAIL, CS_OPT_ON);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static size_t print_insn_x86(struct thread *thread, u8 cpumode, cs_insn *insn,</div><div class='del'>-			     int print_opts, FILE *fp)</div><div class='del'>-{</div><div class='del'>-	struct addr_location al;</div><div class='del'>-	size_t printed = 0;</div><div class='del'>-</div><div class='del'>-	if (insn-&gt;detail &amp;&amp; insn-&gt;detail-&gt;x86.op_count == 1) {</div><div class='del'>-		cs_x86_op *op = &amp;insn-&gt;detail-&gt;x86.operands[0];</div><div class='del'>-</div><div class='del'>-		addr_location__init(&amp;al);</div><div class='del'>-		if (op-&gt;type == X86_OP_IMM &amp;&amp;</div><div class='del'>-		    thread__find_symbol(thread, cpumode, op-&gt;imm, &amp;al)) {</div><div class='del'>-			printed += fprintf(fp, "%s ", insn[0].mnemonic);</div><div class='del'>-			printed += symbol__fprintf_symname_offs(al.sym, &amp;al, fp);</div><div class='del'>-			if (print_opts &amp; PRINT_INSN_IMM_HEX)</div><div class='del'>-				printed += fprintf(fp, " [%#" PRIx64 "]", op-&gt;imm);</div><div class='del'>-			addr_location__exit(&amp;al);</div><div class='del'>-			return printed;</div><div class='del'>-		}</div><div class='del'>-		addr_location__exit(&amp;al);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printed += fprintf(fp, "%s %s", insn[0].mnemonic, insn[0].op_str);</div><div class='del'>-	return printed;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool is64bitip(struct machine *machine, struct addr_location *al)</div><div class='ctx'> {</div><div class='ctx'> 	const struct dso *dso = al-&gt;map ? map__dso(al-&gt;map) : NULL;</div><div class='hunk'>@@ -123,32 +46,8 @@ ssize_t fprintf_insn_asm(struct machine *machine, struct thread *thread, u8 cpum</div><div class='ctx'> 			 bool is64bit, const uint8_t *code, size_t code_size,</div><div class='ctx'> 			 uint64_t ip, int *lenp, int print_opts, FILE *fp)</div><div class='ctx'> {</div><div class='del'>-	size_t printed;</div><div class='del'>-	cs_insn *insn;</div><div class='del'>-	csh cs_handle;</div><div class='del'>-	size_t count;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* TODO: Try to initiate capstone only once but need a proper place. */</div><div class='del'>-	ret = capstone_init(machine, &amp;cs_handle, is64bit, true);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	count = cs_disasm(cs_handle, code, code_size, ip, 1, &amp;insn);</div><div class='del'>-	if (count &gt; 0) {</div><div class='del'>-		if (machine__normalized_is(machine, "x86"))</div><div class='del'>-			printed = print_insn_x86(thread, cpumode, &amp;insn[0], print_opts, fp);</div><div class='del'>-		else</div><div class='del'>-			printed = fprintf(fp, "%s %s", insn[0].mnemonic, insn[0].op_str);</div><div class='del'>-		if (lenp)</div><div class='del'>-			*lenp = insn-&gt;size;</div><div class='del'>-		cs_free(insn, count);</div><div class='del'>-	} else {</div><div class='del'>-		printed = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cs_close(&amp;cs_handle);</div><div class='del'>-	return printed;</div><div class='add'>+	return capstone__fprintf_insn_asm(machine, thread, cpumode, is64bit, code, code_size,</div><div class='add'>+					  ip, lenp, print_opts, fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> size_t sample__fprintf_insn_asm(struct perf_sample *sample, struct thread *thread,</div><div class='hunk'>@@ -166,13 +65,3 @@ size_t sample__fprintf_insn_asm(struct perf_sample *sample, struct thread *threa</div><div class='ctx'> </div><div class='ctx'> 	return printed;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-size_t sample__fprintf_insn_asm(struct perf_sample *sample __maybe_unused,</div><div class='del'>-				struct thread *thread __maybe_unused,</div><div class='del'>-				struct machine *machine __maybe_unused,</div><div class='del'>-				FILE *fp __maybe_unused,</div><div class='del'>-				struct addr_location *al __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c<br/>index 6ab2eb551b6c..710e4620923e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/probe-event.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/probe-event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/probe-event.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/probe-event.c</a></div><div class='hunk'>@@ -2419,6 +2419,7 @@ void clear_perf_probe_event(struct perf_probe_event *pev)</div><div class='ctx'> 	}</div><div class='ctx'> 	pev-&gt;nargs = 0;</div><div class='ctx'> 	zfree(&amp;pev-&gt;args);</div><div class='add'>+	nsinfo__zput(pev-&gt;nsi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define strdup_or_goto(str, label)	\</div><div class='hunk'>@@ -3767,12 +3768,11 @@ void cleanup_perf_probe_events(struct perf_probe_event *pevs, int npevs)</div><div class='ctx'> 	/* Loop 3: cleanup and free trace events  */</div><div class='ctx'> 	for (i = 0; i &lt; npevs; i++) {</div><div class='ctx'> 		pev = &amp;pevs[i];</div><div class='del'>-		for (j = 0; j &lt; pevs[i].ntevs; j++)</div><div class='del'>-			clear_probe_trace_event(&amp;pevs[i].tevs[j]);</div><div class='del'>-		zfree(&amp;pevs[i].tevs);</div><div class='del'>-		pevs[i].ntevs = 0;</div><div class='del'>-		nsinfo__zput(pev-&gt;nsi);</div><div class='del'>-		clear_perf_probe_event(&amp;pevs[i]);</div><div class='add'>+		for (j = 0; j &lt; pev-&gt;ntevs; j++)</div><div class='add'>+			clear_probe_trace_event(&amp;pev-&gt;tevs[j]);</div><div class='add'>+		zfree(&amp;pev-&gt;tevs);</div><div class='add'>+		pev-&gt;ntevs = 0;</div><div class='add'>+		clear_perf_probe_event(pev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/python.c b/tools/perf/util/python.c<br/>index ea77bea0306f..cc1019d29a5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/python.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/python.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/python.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/python.c</a></div><div class='hunk'>@@ -14,10 +14,12 @@</div><div class='ctx'> #include "evlist.h"</div><div class='ctx'> #include "evsel.h"</div><div class='ctx'> #include "event.h"</div><div class='add'>+#include "expr.h"</div><div class='ctx'> #include "print_binary.h"</div><div class='ctx'> #include "record.h"</div><div class='ctx'> #include "strbuf.h"</div><div class='ctx'> #include "thread_map.h"</div><div class='add'>+#include "tp_pmu.h"</div><div class='ctx'> #include "trace-event.h"</div><div class='ctx'> #include "metricgroup.h"</div><div class='ctx'> #include "mmap.h"</div><div class='hunk'>@@ -485,13 +487,19 @@ static PyObject *pyrf_event__new(const union perf_event *event)</div><div class='ctx'> 	if ((event-&gt;header.type &lt; PERF_RECORD_MMAP ||</div><div class='ctx'> 	     event-&gt;header.type &gt; PERF_RECORD_SAMPLE) &amp;&amp;</div><div class='ctx'> 	    !(event-&gt;header.type == PERF_RECORD_SWITCH ||</div><div class='del'>-	      event-&gt;header.type == PERF_RECORD_SWITCH_CPU_WIDE))</div><div class='add'>+	      event-&gt;header.type == PERF_RECORD_SWITCH_CPU_WIDE)) {</div><div class='add'>+		PyErr_Format(PyExc_TypeError, "Unexpected header type %u",</div><div class='add'>+			     event-&gt;header.type);</div><div class='ctx'> 		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	// FIXME this better be dynamic or we need to parse everything</div><div class='ctx'> 	// before calling perf_mmap__consume(), including tracepoint fields.</div><div class='del'>-	if (sizeof(pevent-&gt;event) &lt; event-&gt;header.size)</div><div class='add'>+	if (sizeof(pevent-&gt;event) &lt; event-&gt;header.size) {</div><div class='add'>+		PyErr_Format(PyExc_TypeError, "Unexpected event size: %zd &lt; %u",</div><div class='add'>+			     sizeof(pevent-&gt;event), event-&gt;header.size);</div><div class='ctx'> 		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ptype = pyrf_event__type[event-&gt;header.type];</div><div class='ctx'> 	pevent = PyObject_New(struct pyrf_event, ptype);</div><div class='hunk'>@@ -642,6 +650,209 @@ static int pyrf_thread_map__setup_types(void)</div><div class='ctx'> 	return PyType_Ready(&amp;pyrf_thread_map__type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * A python wrapper for perf_pmus that are globally owned by the pmus.c code.</div><div class='add'>+ */</div><div class='add'>+struct pyrf_pmu {</div><div class='add'>+	PyObject_HEAD</div><div class='add'>+</div><div class='add'>+	struct perf_pmu *pmu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void pyrf_pmu__delete(struct pyrf_pmu *ppmu)</div><div class='add'>+{</div><div class='add'>+	Py_TYPE(ppmu)-&gt;tp_free((PyObject *)ppmu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu__name(PyObject *self)</div><div class='add'>+{</div><div class='add'>+	struct pyrf_pmu *ppmu = (void *)self;</div><div class='add'>+</div><div class='add'>+	return PyUnicode_FromString(ppmu-&gt;pmu-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool add_to_dict(PyObject *dict, const char *key, const char *value)</div><div class='add'>+{</div><div class='add'>+	PyObject *pkey, *pvalue;</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	if (value == NULL)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	pkey = PyUnicode_FromString(key);</div><div class='add'>+	pvalue = PyUnicode_FromString(value);</div><div class='add'>+</div><div class='add'>+	ret = pkey &amp;&amp; pvalue &amp;&amp; PyDict_SetItem(dict, pkey, pvalue) == 0;</div><div class='add'>+	Py_XDECREF(pkey);</div><div class='add'>+	Py_XDECREF(pvalue);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pyrf_pmu__events_cb(void *state, struct pmu_event_info *info)</div><div class='add'>+{</div><div class='add'>+	PyObject *py_list = state;</div><div class='add'>+	PyObject *dict = PyDict_New();</div><div class='add'>+</div><div class='add'>+	if (!dict)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!add_to_dict(dict, "name", info-&gt;name) ||</div><div class='add'>+	    !add_to_dict(dict, "alias", info-&gt;alias) ||</div><div class='add'>+	    !add_to_dict(dict, "scale_unit", info-&gt;scale_unit) ||</div><div class='add'>+	    !add_to_dict(dict, "desc", info-&gt;desc) ||</div><div class='add'>+	    !add_to_dict(dict, "long_desc", info-&gt;long_desc) ||</div><div class='add'>+	    !add_to_dict(dict, "encoding_desc", info-&gt;encoding_desc) ||</div><div class='add'>+	    !add_to_dict(dict, "topic", info-&gt;topic) ||</div><div class='add'>+	    !add_to_dict(dict, "event_type_desc", info-&gt;event_type_desc) ||</div><div class='add'>+	    !add_to_dict(dict, "str", info-&gt;str) ||</div><div class='add'>+	    !add_to_dict(dict, "deprecated", info-&gt;deprecated ? "deprecated" : NULL) ||</div><div class='add'>+	    PyList_Append(py_list, dict) != 0) {</div><div class='add'>+		Py_DECREF(dict);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	Py_DECREF(dict);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu__events(PyObject *self)</div><div class='add'>+{</div><div class='add'>+	struct pyrf_pmu *ppmu = (void *)self;</div><div class='add'>+	PyObject *py_list = PyList_New(0);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!py_list)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ret = perf_pmu__for_each_event(ppmu-&gt;pmu,</div><div class='add'>+				       /*skip_duplicate_pmus=*/false,</div><div class='add'>+				       py_list,</div><div class='add'>+				       pyrf_pmu__events_cb);</div><div class='add'>+	if (ret) {</div><div class='add'>+		Py_DECREF(py_list);</div><div class='add'>+		errno = -ret;</div><div class='add'>+		PyErr_SetFromErrno(PyExc_OSError);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return py_list;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu__repr(PyObject *self)</div><div class='add'>+{</div><div class='add'>+	struct pyrf_pmu *ppmu = (void *)self;</div><div class='add'>+</div><div class='add'>+	return PyUnicode_FromFormat("pmu(%s)", ppmu-&gt;pmu-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char pyrf_pmu__doc[] = PyDoc_STR("perf Performance Monitoring Unit (PMU) object.");</div><div class='add'>+</div><div class='add'>+static PyMethodDef pyrf_pmu__methods[] = {</div><div class='add'>+	{</div><div class='add'>+		.ml_name  = "events",</div><div class='add'>+		.ml_meth  = (PyCFunction)pyrf_pmu__events,</div><div class='add'>+		.ml_flags = METH_NOARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR("Returns a sequence of events encoded as a dictionaries.")</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.ml_name  = "name",</div><div class='add'>+		.ml_meth  = (PyCFunction)pyrf_pmu__name,</div><div class='add'>+		.ml_flags = METH_NOARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR("Name of the PMU including suffixes.")</div><div class='add'>+	},</div><div class='add'>+	{ .ml_name = NULL, }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/** The python type for a perf.pmu. */</div><div class='add'>+static PyTypeObject pyrf_pmu__type = {</div><div class='add'>+	PyVarObject_HEAD_INIT(NULL, 0)</div><div class='add'>+	.tp_name	= "perf.pmu",</div><div class='add'>+	.tp_basicsize	= sizeof(struct pyrf_pmu),</div><div class='add'>+	.tp_dealloc	= (destructor)pyrf_pmu__delete,</div><div class='add'>+	.tp_flags	= Py_TPFLAGS_DEFAULT|Py_TPFLAGS_BASETYPE,</div><div class='add'>+	.tp_doc		= pyrf_pmu__doc,</div><div class='add'>+	.tp_methods	= pyrf_pmu__methods,</div><div class='add'>+	.tp_str         = pyrf_pmu__name,</div><div class='add'>+	.tp_repr        = pyrf_pmu__repr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pyrf_pmu__setup_types(void)</div><div class='add'>+{</div><div class='add'>+	pyrf_pmu__type.tp_new = PyType_GenericNew;</div><div class='add'>+	return PyType_Ready(&amp;pyrf_pmu__type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/** A python iterator for pmus that has no equivalent in the C code. */</div><div class='add'>+struct pyrf_pmu_iterator {</div><div class='add'>+	PyObject_HEAD</div><div class='add'>+	struct perf_pmu *pmu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void pyrf_pmu_iterator__dealloc(struct pyrf_pmu_iterator *self)</div><div class='add'>+{</div><div class='add'>+	Py_TYPE(self)-&gt;tp_free((PyObject *) self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu_iterator__new(PyTypeObject *type, PyObject *args __maybe_unused,</div><div class='add'>+					PyObject *kwds __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	struct pyrf_pmu_iterator *itr = (void *)type-&gt;tp_alloc(type, 0);</div><div class='add'>+</div><div class='add'>+	if (itr != NULL)</div><div class='add'>+		itr-&gt;pmu = perf_pmus__scan(/*pmu=*/NULL);</div><div class='add'>+</div><div class='add'>+	return (PyObject *) itr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu_iterator__iter(PyObject *self)</div><div class='add'>+{</div><div class='add'>+	Py_INCREF(self);</div><div class='add'>+	return self;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_pmu_iterator__iternext(PyObject *self)</div><div class='add'>+{</div><div class='add'>+	struct pyrf_pmu_iterator *itr = (void *)self;</div><div class='add'>+	struct pyrf_pmu *ppmu;</div><div class='add'>+</div><div class='add'>+	if (itr-&gt;pmu == NULL) {</div><div class='add'>+		PyErr_SetNone(PyExc_StopIteration);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	// Create object to return.</div><div class='add'>+	ppmu = PyObject_New(struct pyrf_pmu, &amp;pyrf_pmu__type);</div><div class='add'>+	if (ppmu) {</div><div class='add'>+		ppmu-&gt;pmu = itr-&gt;pmu;</div><div class='add'>+		// Advance iterator.</div><div class='add'>+		itr-&gt;pmu = perf_pmus__scan(itr-&gt;pmu);</div><div class='add'>+	}</div><div class='add'>+	return (PyObject *)ppmu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** The python type for the PMU iterator. */</div><div class='add'>+static PyTypeObject pyrf_pmu_iterator__type = {</div><div class='add'>+	PyVarObject_HEAD_INIT(NULL, 0)</div><div class='add'>+	.tp_name = "pmus.iterator",</div><div class='add'>+	.tp_doc = "Iterator for the pmus string sequence.",</div><div class='add'>+	.tp_basicsize = sizeof(struct pyrf_pmu_iterator),</div><div class='add'>+	.tp_itemsize = 0,</div><div class='add'>+	.tp_flags = Py_TPFLAGS_DEFAULT,</div><div class='add'>+	.tp_new = pyrf_pmu_iterator__new,</div><div class='add'>+	.tp_dealloc = (destructor) pyrf_pmu_iterator__dealloc,</div><div class='add'>+	.tp_iter = pyrf_pmu_iterator__iter,</div><div class='add'>+	.tp_iternext = pyrf_pmu_iterator__iternext,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pyrf_pmu_iterator__setup_types(void)</div><div class='add'>+{</div><div class='add'>+	return PyType_Ready(&amp;pyrf_pmu_iterator__type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf__pmus(PyObject *self, PyObject *args)</div><div class='add'>+{</div><div class='add'>+	// Calling the class creates an instance of the iterator.</div><div class='add'>+	return PyObject_CallObject((PyObject *) &amp;pyrf_pmu_iterator__type, /*args=*/NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct pyrf_counts_values {</div><div class='ctx'> 	PyObject_HEAD</div><div class='ctx'> </div><div class='hunk'>@@ -1093,6 +1304,178 @@ static PyObject *pyrf_evlist__all_cpus(struct pyrf_evlist *pevlist)</div><div class='ctx'> 	return (PyObject *)pcpu_map;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static PyObject *pyrf_evlist__metrics(struct pyrf_evlist *pevlist)</div><div class='add'>+{</div><div class='add'>+	PyObject *list = PyList_New(/*len=*/0);</div><div class='add'>+	struct rb_node *node;</div><div class='add'>+</div><div class='add'>+	if (!list)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (node = rb_first_cached(&amp;pevlist-&gt;evlist.metric_events.entries); node;</div><div class='add'>+	     node = rb_next(node)) {</div><div class='add'>+		struct metric_event *me = container_of(node, struct metric_event, nd);</div><div class='add'>+		struct list_head *pos;</div><div class='add'>+</div><div class='add'>+		list_for_each(pos, &amp;me-&gt;head) {</div><div class='add'>+			struct metric_expr *expr = container_of(pos, struct metric_expr, nd);</div><div class='add'>+			PyObject *str = PyUnicode_FromString(expr-&gt;metric_name);</div><div class='add'>+</div><div class='add'>+			if (!str || PyList_Append(list, str) != 0) {</div><div class='add'>+				Py_DECREF(list);</div><div class='add'>+				return NULL;</div><div class='add'>+			}</div><div class='add'>+			Py_DECREF(str);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return list;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prepare_metric(const struct metric_expr *mexp,</div><div class='add'>+			  const struct evsel *evsel,</div><div class='add'>+			  struct expr_parse_ctx *pctx,</div><div class='add'>+			  int cpu_idx, int thread_idx)</div><div class='add'>+{</div><div class='add'>+	struct evsel * const *metric_events = mexp-&gt;metric_events;</div><div class='add'>+	struct metric_ref *metric_refs = mexp-&gt;metric_refs;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; metric_events[i]; i++) {</div><div class='add'>+		struct evsel *cur = metric_events[i];</div><div class='add'>+		double val, ena, run;</div><div class='add'>+		int ret, source_count = 0;</div><div class='add'>+		struct perf_counts_values *old_count, *new_count;</div><div class='add'>+		char *n = strdup(evsel__metric_id(cur));</div><div class='add'>+</div><div class='add'>+		if (!n)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If there are multiple uncore PMUs and we're not reading the</div><div class='add'>+		 * leader's stats, determine the stats for the appropriate</div><div class='add'>+		 * uncore PMU.</div><div class='add'>+		 */</div><div class='add'>+		if (evsel &amp;&amp; evsel-&gt;metric_leader &amp;&amp;</div><div class='add'>+		    evsel-&gt;pmu != evsel-&gt;metric_leader-&gt;pmu &amp;&amp;</div><div class='add'>+		    cur-&gt;pmu == evsel-&gt;metric_leader-&gt;pmu) {</div><div class='add'>+			struct evsel *pos;</div><div class='add'>+</div><div class='add'>+			evlist__for_each_entry(evsel-&gt;evlist, pos) {</div><div class='add'>+				if (pos-&gt;pmu != evsel-&gt;pmu)</div><div class='add'>+					continue;</div><div class='add'>+				if (pos-&gt;metric_leader != cur)</div><div class='add'>+					continue;</div><div class='add'>+				cur = pos;</div><div class='add'>+				source_count = 1;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (source_count == 0)</div><div class='add'>+			source_count = evsel__source_count(cur);</div><div class='add'>+</div><div class='add'>+		ret = evsel__ensure_counts(cur);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Set up pointers to the old and newly read counter values. */</div><div class='add'>+		old_count = perf_counts(cur-&gt;prev_raw_counts, cpu_idx, thread_idx);</div><div class='add'>+		new_count = perf_counts(cur-&gt;counts, cpu_idx, thread_idx);</div><div class='add'>+		/* Update the value in cur-&gt;counts. */</div><div class='add'>+		evsel__read_counter(cur, cpu_idx, thread_idx);</div><div class='add'>+</div><div class='add'>+		val = new_count-&gt;val - old_count-&gt;val;</div><div class='add'>+		ena = new_count-&gt;ena - old_count-&gt;ena;</div><div class='add'>+		run = new_count-&gt;run - old_count-&gt;run;</div><div class='add'>+</div><div class='add'>+		if (ena != run &amp;&amp; run != 0)</div><div class='add'>+			val = val * ena / run;</div><div class='add'>+		ret = expr__add_id_val_source_count(pctx, n, val, source_count);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; metric_refs &amp;&amp; metric_refs[i].metric_name; i++) {</div><div class='add'>+		int ret = expr__add_ref(pctx, &amp;metric_refs[i]);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf_evlist__compute_metric(struct pyrf_evlist *pevlist,</div><div class='add'>+					     PyObject *args, PyObject *kwargs)</div><div class='add'>+{</div><div class='add'>+	int ret, cpu = 0, cpu_idx = 0, thread = 0, thread_idx = 0;</div><div class='add'>+	const char *metric;</div><div class='add'>+	struct rb_node *node;</div><div class='add'>+	struct metric_expr *mexp = NULL;</div><div class='add'>+	struct expr_parse_ctx *pctx;</div><div class='add'>+	double result = 0;</div><div class='add'>+	struct evsel *metric_evsel = NULL;</div><div class='add'>+</div><div class='add'>+	if (!PyArg_ParseTuple(args, "sii", &amp;metric, &amp;cpu, &amp;thread))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (node = rb_first_cached(&amp;pevlist-&gt;evlist.metric_events.entries);</div><div class='add'>+	     mexp == NULL &amp;&amp; node;</div><div class='add'>+	     node = rb_next(node)) {</div><div class='add'>+		struct metric_event *me = container_of(node, struct metric_event, nd);</div><div class='add'>+		struct list_head *pos;</div><div class='add'>+</div><div class='add'>+		list_for_each(pos, &amp;me-&gt;head) {</div><div class='add'>+			struct metric_expr *e = container_of(pos, struct metric_expr, nd);</div><div class='add'>+			struct evsel *pos2;</div><div class='add'>+</div><div class='add'>+			if (strcmp(e-&gt;metric_name, metric))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (e-&gt;metric_events[0] == NULL)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			evlist__for_each_entry(&amp;pevlist-&gt;evlist, pos2) {</div><div class='add'>+				if (pos2-&gt;metric_leader != e-&gt;metric_events[0])</div><div class='add'>+					continue;</div><div class='add'>+				cpu_idx = perf_cpu_map__idx(pos2-&gt;core.cpus,</div><div class='add'>+							    (struct perf_cpu){.cpu = cpu});</div><div class='add'>+				if (cpu_idx &lt; 0)</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				thread_idx = perf_thread_map__idx(pos2-&gt;core.threads, thread);</div><div class='add'>+				if (thread_idx &lt; 0)</div><div class='add'>+					continue;</div><div class='add'>+				metric_evsel = pos2;</div><div class='add'>+				mexp = e;</div><div class='add'>+				goto done;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+done:</div><div class='add'>+	if (!mexp) {</div><div class='add'>+		PyErr_Format(PyExc_TypeError, "Unknown metric '%s' for CPU '%d' and thread '%d'",</div><div class='add'>+			     metric, cpu, thread);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pctx = expr__ctx_new();</div><div class='add'>+	if (!pctx)</div><div class='add'>+		return PyErr_NoMemory();</div><div class='add'>+</div><div class='add'>+	ret = prepare_metric(mexp, metric_evsel, pctx, cpu_idx, thread_idx);</div><div class='add'>+	if (ret) {</div><div class='add'>+		expr__ctx_free(pctx);</div><div class='add'>+		errno = -ret;</div><div class='add'>+		PyErr_SetFromErrno(PyExc_OSError);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	if (expr__parse(&amp;result, pctx, mexp-&gt;metric_expr))</div><div class='add'>+		result = 0.0;</div><div class='add'>+</div><div class='add'>+	expr__ctx_free(pctx);</div><div class='add'>+	return PyFloat_FromDouble(result);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static PyObject *pyrf_evlist__mmap(struct pyrf_evlist *pevlist,</div><div class='ctx'> 				   PyObject *args, PyObject *kwargs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1209,8 +1592,10 @@ static PyObject *pyrf_evlist__read_on_cpu(struct pyrf_evlist *pevlist,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	md = get_md(evlist, cpu);</div><div class='del'>-	if (!md)</div><div class='add'>+	if (!md) {</div><div class='add'>+		PyErr_Format(PyExc_TypeError, "Unknown CPU '%d'", cpu);</div><div class='ctx'> 		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (perf_mmap__read_init(&amp;md-&gt;core) &lt; 0)</div><div class='ctx'> 		goto end;</div><div class='hunk'>@@ -1320,6 +1705,18 @@ static PyMethodDef pyrf_evlist__methods[] = {</div><div class='ctx'> 		.ml_doc	  = PyDoc_STR("CPU map union of all evsel CPU maps.")</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.ml_name  = "metrics",</div><div class='add'>+		.ml_meth  = (PyCFunction)pyrf_evlist__metrics,</div><div class='add'>+		.ml_flags = METH_NOARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR("List of metric names within the evlist.")</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.ml_name  = "compute_metric",</div><div class='add'>+		.ml_meth  = (PyCFunction)pyrf_evlist__compute_metric,</div><div class='add'>+		.ml_flags = METH_VARARGS | METH_KEYWORDS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR("compute metric for given name, cpu and thread")</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.ml_name  = "mmap",</div><div class='ctx'> 		.ml_meth  = (PyCFunction)pyrf_evlist__mmap,</div><div class='ctx'> 		.ml_flags = METH_VARARGS | METH_KEYWORDS,</div><div class='hunk'>@@ -1546,10 +1943,6 @@ static const struct perf_constant perf__constants[] = {</div><div class='ctx'> static PyObject *pyrf__tracepoint(struct pyrf_evsel *pevsel,</div><div class='ctx'> 				  PyObject *args, PyObject *kwargs)</div><div class='ctx'> {</div><div class='del'>-#ifndef HAVE_LIBTRACEEVENT</div><div class='del'>-	return NULL;</div><div class='del'>-#else</div><div class='del'>-	struct tep_event *tp_format;</div><div class='ctx'> 	static char *kwlist[] = { "sys", "name", NULL };</div><div class='ctx'> 	char *sys  = NULL;</div><div class='ctx'> 	char *name = NULL;</div><div class='hunk'>@@ -1558,12 +1951,7 @@ static PyObject *pyrf__tracepoint(struct pyrf_evsel *pevsel,</div><div class='ctx'> 					 &amp;sys, &amp;name))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	tp_format = trace_event__tp_format(sys, name);</div><div class='del'>-	if (IS_ERR(tp_format))</div><div class='del'>-		return PyLong_FromLong(-1);</div><div class='del'>-</div><div class='del'>-	return PyLong_FromLong(tp_format-&gt;id);</div><div class='del'>-#endif // HAVE_LIBTRACEEVENT</div><div class='add'>+	return PyLong_FromLong(tp_pmu__id(sys, name));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static PyObject *pyrf_evsel__from_evsel(struct evsel *evsel)</div><div class='hunk'>@@ -1635,6 +2023,17 @@ static PyObject *pyrf_evlist__from_evlist(struct evlist *evlist)</div><div class='ctx'> 			else if (leader == NULL)</div><div class='ctx'> 				evsel__set_leader(pos, pos);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		leader = pos-&gt;metric_leader;</div><div class='add'>+</div><div class='add'>+		if (pos != leader) {</div><div class='add'>+			int idx = evlist__pos(evlist, leader);</div><div class='add'>+</div><div class='add'>+			if (idx &gt;= 0)</div><div class='add'>+				pos-&gt;metric_leader = evlist__at(&amp;pevlist-&gt;evlist, idx);</div><div class='add'>+			else if (leader == NULL)</div><div class='add'>+				pos-&gt;metric_leader = pos;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	metricgroup__copy_metric_events(&amp;pevlist-&gt;evlist, /*cgrp=*/NULL,</div><div class='ctx'> 					&amp;pevlist-&gt;evlist.metric_events,</div><div class='hunk'>@@ -1688,8 +2087,128 @@ static PyObject *pyrf__parse_events(PyObject *self, PyObject *args)</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static PyObject *pyrf__parse_metrics(PyObject *self, PyObject *args)</div><div class='add'>+{</div><div class='add'>+	const char *input, *pmu = NULL;</div><div class='add'>+	struct evlist evlist = {};</div><div class='add'>+	PyObject *result;</div><div class='add'>+	PyObject *pcpus = NULL, *pthreads = NULL;</div><div class='add'>+	struct perf_cpu_map *cpus;</div><div class='add'>+	struct perf_thread_map *threads;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!PyArg_ParseTuple(args, "s|sOO", &amp;input, &amp;pmu, &amp;pcpus, &amp;pthreads))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	threads = pthreads ? ((struct pyrf_thread_map *)pthreads)-&gt;threads : NULL;</div><div class='add'>+	cpus = pcpus ? ((struct pyrf_cpu_map *)pcpus)-&gt;cpus : NULL;</div><div class='add'>+</div><div class='add'>+	evlist__init(&amp;evlist, cpus, threads);</div><div class='add'>+	ret = metricgroup__parse_groups(&amp;evlist, pmu ?: "all", input,</div><div class='add'>+					/*metric_no_group=*/ false,</div><div class='add'>+					/*metric_no_merge=*/ false,</div><div class='add'>+					/*metric_no_threshold=*/ true,</div><div class='add'>+					/*user_requested_cpu_list=*/ NULL,</div><div class='add'>+					/*system_wide=*/true,</div><div class='add'>+					/*hardware_aware_grouping=*/ false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		errno = -ret;</div><div class='add'>+		PyErr_SetFromErrno(PyExc_OSError);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	result = pyrf_evlist__from_evlist(&amp;evlist);</div><div class='add'>+	evlist__exit(&amp;evlist);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf__metrics_groups(const struct pmu_metric *pm)</div><div class='add'>+{</div><div class='add'>+	PyObject *groups = PyList_New(/*len=*/0);</div><div class='add'>+	const char *mg = pm-&gt;metric_group;</div><div class='add'>+</div><div class='add'>+	if (!groups)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	while (mg) {</div><div class='add'>+		PyObject *val = NULL;</div><div class='add'>+		const char *sep = strchr(mg, ';');</div><div class='add'>+		size_t len = sep ? (size_t)(sep - mg) : strlen(mg);</div><div class='add'>+</div><div class='add'>+		if (len &gt; 0) {</div><div class='add'>+			val = PyUnicode_FromStringAndSize(mg, len);</div><div class='add'>+			if (val)</div><div class='add'>+				PyList_Append(groups, val);</div><div class='add'>+</div><div class='add'>+			Py_XDECREF(val);</div><div class='add'>+		}</div><div class='add'>+		mg = sep ? sep + 1 : NULL;</div><div class='add'>+	}</div><div class='add'>+	return groups;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pyrf__metrics_cb(const struct pmu_metric *pm,</div><div class='add'>+			    const struct pmu_metrics_table *table __maybe_unused,</div><div class='add'>+			    void *vdata)</div><div class='add'>+{</div><div class='add'>+	PyObject *py_list = vdata;</div><div class='add'>+	PyObject *dict = PyDict_New();</div><div class='add'>+	PyObject *key = dict ? PyUnicode_FromString("MetricGroup") : NULL;</div><div class='add'>+	PyObject *value = key ? pyrf__metrics_groups(pm) : NULL;</div><div class='add'>+</div><div class='add'>+	if (!value || PyDict_SetItem(dict, key, value) != 0) {</div><div class='add'>+		Py_XDECREF(key);</div><div class='add'>+		Py_XDECREF(value);</div><div class='add'>+		Py_XDECREF(dict);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!add_to_dict(dict, "MetricName", pm-&gt;metric_name) ||</div><div class='add'>+	    !add_to_dict(dict, "PMU", pm-&gt;pmu) ||</div><div class='add'>+	    !add_to_dict(dict, "MetricExpr", pm-&gt;metric_expr) ||</div><div class='add'>+	    !add_to_dict(dict, "MetricThreshold", pm-&gt;metric_threshold) ||</div><div class='add'>+	    !add_to_dict(dict, "ScaleUnit", pm-&gt;unit) ||</div><div class='add'>+	    !add_to_dict(dict, "Compat", pm-&gt;compat) ||</div><div class='add'>+	    !add_to_dict(dict, "BriefDescription", pm-&gt;desc) ||</div><div class='add'>+	    !add_to_dict(dict, "PublicDescription", pm-&gt;long_desc) ||</div><div class='add'>+	    PyList_Append(py_list, dict) != 0) {</div><div class='add'>+		Py_DECREF(dict);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	Py_DECREF(dict);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static PyObject *pyrf__metrics(PyObject *self, PyObject *args)</div><div class='add'>+{</div><div class='add'>+	const struct pmu_metrics_table *table = pmu_metrics_table__find();</div><div class='add'>+	PyObject *list = PyList_New(/*len=*/0);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!list)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ret = pmu_metrics_table__for_each_metric(table, pyrf__metrics_cb, list);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = pmu_for_each_sys_metric(pyrf__metrics_cb, list);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		Py_DECREF(list);</div><div class='add'>+		errno = -ret;</div><div class='add'>+		PyErr_SetFromErrno(PyExc_OSError);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return list;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static PyMethodDef perf__methods[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.ml_name  = "metrics",</div><div class='add'>+		.ml_meth  = (PyCFunction) pyrf__metrics,</div><div class='add'>+		.ml_flags = METH_NOARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR(</div><div class='add'>+			"Returns a list of metrics represented as string values in dictionaries.")</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.ml_name  = "tracepoint",</div><div class='ctx'> 		.ml_meth  = (PyCFunction) pyrf__tracepoint,</div><div class='ctx'> 		.ml_flags = METH_VARARGS | METH_KEYWORDS,</div><div class='hunk'>@@ -1701,6 +2220,19 @@ static PyMethodDef perf__methods[] = {</div><div class='ctx'> 		.ml_flags = METH_VARARGS,</div><div class='ctx'> 		.ml_doc	  = PyDoc_STR("Parse a string of events and return an evlist.")</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.ml_name  = "parse_metrics",</div><div class='add'>+		.ml_meth  = (PyCFunction) pyrf__parse_metrics,</div><div class='add'>+		.ml_flags = METH_VARARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR(</div><div class='add'>+			"Parse a string of metrics or metric groups and return an evlist.")</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.ml_name  = "pmus",</div><div class='add'>+		.ml_meth  = (PyCFunction) pyrf__pmus,</div><div class='add'>+		.ml_flags = METH_NOARGS,</div><div class='add'>+		.ml_doc	  = PyDoc_STR("Returns a sequence of pmus.")</div><div class='add'>+	},</div><div class='ctx'> 	{ .ml_name = NULL, }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1728,6 +2260,8 @@ PyMODINIT_FUNC PyInit_perf(void)</div><div class='ctx'> 	    pyrf_evsel__setup_types() &lt; 0 ||</div><div class='ctx'> 	    pyrf_thread_map__setup_types() &lt; 0 ||</div><div class='ctx'> 	    pyrf_cpu_map__setup_types() &lt; 0 ||</div><div class='add'>+	    pyrf_pmu_iterator__setup_types() &lt; 0 ||</div><div class='add'>+	    pyrf_pmu__setup_types() &lt; 0 ||</div><div class='ctx'> 	    pyrf_counts_values__setup_types() &lt; 0)</div><div class='ctx'> 		return module;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/s390-sample-raw.c b/tools/perf/util/s390-sample-raw.c<br/>index 335217bb532b..c6ae0ae8d86a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/s390-sample-raw.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/s390-sample-raw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/s390-sample-raw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/s390-sample-raw.c</a></div><div class='hunk'>@@ -19,12 +19,14 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "session.h"</div><div class='ctx'> #include "evlist.h"</div><div class='ctx'> #include "color.h"</div><div class='add'>+#include "hashmap.h"</div><div class='ctx'> #include "sample-raw.h"</div><div class='ctx'> #include "s390-cpumcf-kernel.h"</div><div class='ctx'> #include "util/pmu.h"</div><div class='hunk'>@@ -132,8 +134,8 @@ static int get_counterset_start(int setnr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct get_counter_name_data {</div><div class='del'>-	int wanted;</div><div class='del'>-	char *result;</div><div class='add'>+	long wanted;</div><div class='add'>+	const char *result;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int get_counter_name_callback(void *vdata, struct pmu_event_info *info)</div><div class='hunk'>@@ -151,12 +153,22 @@ static int get_counter_name_callback(void *vdata, struct pmu_event_info *info)</div><div class='ctx'> </div><div class='ctx'> 	rc = sscanf(event_str, "event=%x", &amp;event_nr);</div><div class='ctx'> 	if (rc == 1 &amp;&amp; event_nr == data-&gt;wanted) {</div><div class='del'>-		data-&gt;result = strdup(info-&gt;name);</div><div class='add'>+		data-&gt;result = info-&gt;name;</div><div class='ctx'> 		return 1; /* Terminate the search. */</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t get_counter_name_hash_fn(long key, void *ctx __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return key;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool get_counter_name_hashmap_equal_fn(long key1, long key2, void *ctx __maybe_unused)</div><div class='add'>+{</div><div class='add'>+	return key1 == key2;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Scan the PMU and extract the logical name of a counter from the event. Input</div><div class='ctx'>  * is the counter set and counter number with in the set. Construct the event</div><div class='ctx'>  * number and use this as key. If they match return the name of this counter.</div><div class='hunk'>@@ -164,17 +176,50 @@ static int get_counter_name_callback(void *vdata, struct pmu_event_info *info)</div><div class='ctx'>  */</div><div class='ctx'> static char *get_counter_name(int set, int nr, struct perf_pmu *pmu)</div><div class='ctx'> {</div><div class='add'>+	static struct hashmap *cache;</div><div class='add'>+	static struct perf_pmu *cache_pmu;</div><div class='add'>+	long cache_key = get_counterset_start(set) + nr;</div><div class='ctx'> 	struct get_counter_name_data data = {</div><div class='del'>-		.wanted = get_counterset_start(set) + nr,</div><div class='add'>+		.wanted = cache_key,</div><div class='ctx'> 		.result = NULL,</div><div class='ctx'> 	};</div><div class='add'>+	char *result = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!pmu)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	if (cache_pmu == pmu &amp;&amp; hashmap__find(cache, cache_key, &amp;result))</div><div class='add'>+		return strdup(result);</div><div class='add'>+</div><div class='ctx'> 	perf_pmu__for_each_event(pmu, /*skip_duplicate_pmus=*/ true,</div><div class='ctx'> 				 &amp;data, get_counter_name_callback);</div><div class='del'>-	return data.result;</div><div class='add'>+</div><div class='add'>+	result = strdup(data.result ?: "&lt;unknown&gt;");</div><div class='add'>+</div><div class='add'>+	if (cache_pmu == NULL) {</div><div class='add'>+		struct hashmap *tmp = hashmap__new(get_counter_name_hash_fn,</div><div class='add'>+						   get_counter_name_hashmap_equal_fn,</div><div class='add'>+						   /*ctx=*/NULL);</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR(tmp)) {</div><div class='add'>+			cache = tmp;</div><div class='add'>+			cache_pmu = pmu;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cache_pmu == pmu &amp;&amp; result) {</div><div class='add'>+		char *old_value = NULL, *new_value = strdup(result);</div><div class='add'>+</div><div class='add'>+		if (new_value) {</div><div class='add'>+			hashmap__set(cache, cache_key, new_value, /*old_key=*/NULL, &amp;old_value);</div><div class='add'>+			/*</div><div class='add'>+			 * Free in case of a race, but resizing would be broken</div><div class='add'>+			 * in that case.</div><div class='add'>+			 */</div><div class='add'>+			free(old_value);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void s390_cpumcfdg_dump(struct perf_pmu *pmu, struct perf_sample *sample)</div><div class='head'>diff --git a/tools/perf/util/sample.h b/tools/perf/util/sample.h<br/>index fae834144ef4..a8307b20a9ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/sample.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/sample.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/sample.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/sample.h</a></div><div class='hunk'>@@ -107,6 +107,8 @@ struct perf_sample {</div><div class='ctx'> 	/** @weight3: On x86 holds retire_lat, on powerpc holds p_stage_cyc. */</div><div class='ctx'> 	u16 weight3;</div><div class='ctx'> 	bool no_hw_idx;		/* No hw_idx collected in branch_stack */</div><div class='add'>+	bool deferred_callchain;	/* Has deferred user callchains */</div><div class='add'>+	u64 deferred_cookie;</div><div class='ctx'> 	char insn[MAX_INSN];</div><div class='ctx'> 	void *raw_data;</div><div class='ctx'> 	struct ip_callchain *callchain;</div><div class='head'>diff --git a/tools/perf/util/scripting-engines/Build b/tools/perf/util/scripting-engines/Build<br/>index 2282fe3772f3..24f087b0cd11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/scripting-engines/Build?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/scripting-engines/Build</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/scripting-engines/Build?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/scripting-engines/Build</a></div><div class='hunk'>@@ -3,7 +3,7 @@ ifeq ($(CONFIG_LIBTRACEEVENT),y)</div><div class='ctx'> endif</div><div class='ctx'> perf-util-$(CONFIG_LIBPYTHON) += trace-event-python.o</div><div class='ctx'> </div><div class='del'>-CFLAGS_trace-event-perl.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-nested-externs -Wno-undef -Wno-switch-default -Wno-bad-function-cast -Wno-declaration-after-statement -Wno-switch-enum</div><div class='add'>+CFLAGS_trace-event-perl.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-nested-externs -Wno-undef -Wno-switch-default -Wno-bad-function-cast -Wno-declaration-after-statement -Wno-switch-enum -Wno-thread-safety-analysis</div><div class='ctx'> </div><div class='ctx'> # -Wno-declaration-after-statement: The python headers have mixed code with declarations (decls after asserts, for instance)</div><div class='ctx'> CFLAGS_trace-event-python.o += $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-deprecated-declarations -Wno-switch-enum -Wno-declaration-after-statement</div><div class='head'>diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c<br/>index 26ae078278cd..4236503c8f6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/session.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/session.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/session.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/session.c</a></div><div class='hunk'>@@ -720,6 +720,7 @@ static perf_event__swap_op perf_event__swap_ops[] = {</div><div class='ctx'> 	[PERF_RECORD_CGROUP]		  = perf_event__cgroup_swap,</div><div class='ctx'> 	[PERF_RECORD_TEXT_POKE]		  = perf_event__text_poke_swap,</div><div class='ctx'> 	[PERF_RECORD_AUX_OUTPUT_HW_ID]	  = perf_event__all64_swap,</div><div class='add'>+	[PERF_RECORD_CALLCHAIN_DEFERRED]  = perf_event__all64_swap,</div><div class='ctx'> 	[PERF_RECORD_HEADER_ATTR]	  = perf_event__hdr_attr_swap,</div><div class='ctx'> 	[PERF_RECORD_HEADER_EVENT_TYPE]	  = perf_event__event_type_swap,</div><div class='ctx'> 	[PERF_RECORD_HEADER_TRACING_DATA] = perf_event__tracing_data_swap,</div><div class='hunk'>@@ -854,6 +855,9 @@ static void callchain__printf(struct evsel *evsel,</div><div class='ctx'> 	for (i = 0; i &lt; callchain-&gt;nr; i++)</div><div class='ctx'> 		printf("..... %2d: %016" PRIx64 "\n",</div><div class='ctx'> 		       i, callchain-&gt;ips[i]);</div><div class='add'>+</div><div class='add'>+	if (sample-&gt;deferred_callchain)</div><div class='add'>+		printf("...... (deferred)\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void branch_stack__printf(struct perf_sample *sample,</div><div class='hunk'>@@ -1123,6 +1127,19 @@ static void dump_sample(struct evsel *evsel, union perf_event *event,</div><div class='ctx'> 		sample_read__printf(sample, evsel-&gt;core.attr.read_format);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dump_deferred_callchain(struct evsel *evsel, union perf_event *event,</div><div class='add'>+				    struct perf_sample *sample)</div><div class='add'>+{</div><div class='add'>+	if (!dump_trace)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	printf("(IP, 0x%x): %d/%d: %#" PRIx64 "\n",</div><div class='add'>+	       event-&gt;header.misc, sample-&gt;pid, sample-&gt;tid, sample-&gt;deferred_cookie);</div><div class='add'>+</div><div class='add'>+	if (evsel__has_callchain(evsel))</div><div class='add'>+		callchain__printf(evsel, sample);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dump_read(struct evsel *evsel, union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_record_read *read_event = &amp;event-&gt;read;</div><div class='hunk'>@@ -1268,6 +1285,106 @@ static int evlist__deliver_sample(struct evlist *evlist, const struct perf_tool</div><div class='ctx'> 					    per_thread);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Samples with deferred callchains should wait for the next matching</div><div class='add'>+ * PERF_RECORD_CALLCHAIN_RECORD entries.  Keep the events in a list and</div><div class='add'>+ * deliver them once it finds the callchains.</div><div class='add'>+ */</div><div class='add'>+struct deferred_event {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	union perf_event *event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called when a deferred callchain record comes up.  Find all matching</div><div class='add'>+ * samples, merge the callchains and process them.</div><div class='add'>+ */</div><div class='add'>+static int evlist__deliver_deferred_callchain(struct evlist *evlist,</div><div class='add'>+					      const struct perf_tool *tool,</div><div class='add'>+					      union  perf_event *event,</div><div class='add'>+					      struct perf_sample *sample,</div><div class='add'>+					      struct machine *machine)</div><div class='add'>+{</div><div class='add'>+	struct deferred_event *de, *tmp;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!tool-&gt;merge_deferred_callchains) {</div><div class='add'>+		evsel = evlist__id2evsel(evlist, sample-&gt;id);</div><div class='add'>+		return tool-&gt;callchain_deferred(tool, event, sample,</div><div class='add'>+						evsel, machine);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(de, tmp, &amp;evlist-&gt;deferred_samples, list) {</div><div class='add'>+		struct perf_sample orig_sample;</div><div class='add'>+</div><div class='add'>+		ret = evlist__parse_sample(evlist, de-&gt;event, &amp;orig_sample);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("failed to parse original sample\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (sample-&gt;tid != orig_sample.tid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (event-&gt;callchain_deferred.cookie == orig_sample.deferred_cookie)</div><div class='add'>+			sample__merge_deferred_callchain(&amp;orig_sample, sample);</div><div class='add'>+		else</div><div class='add'>+			orig_sample.deferred_callchain = false;</div><div class='add'>+</div><div class='add'>+		evsel = evlist__id2evsel(evlist, orig_sample.id);</div><div class='add'>+		ret = evlist__deliver_sample(evlist, tool, de-&gt;event,</div><div class='add'>+					     &amp;orig_sample, evsel, machine);</div><div class='add'>+</div><div class='add'>+		if (orig_sample.deferred_callchain)</div><div class='add'>+			free(orig_sample.callchain);</div><div class='add'>+</div><div class='add'>+		list_del(&amp;de-&gt;list);</div><div class='add'>+		free(de-&gt;event);</div><div class='add'>+		free(de);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called at the end of the data processing for the session.  Flush the</div><div class='add'>+ * remaining samples as there's no hope for matching deferred callchains.</div><div class='add'>+ */</div><div class='add'>+static int session__flush_deferred_samples(struct perf_session *session,</div><div class='add'>+					   const struct perf_tool *tool)</div><div class='add'>+{</div><div class='add'>+	struct evlist *evlist = session-&gt;evlist;</div><div class='add'>+	struct machine *machine = &amp;session-&gt;machines.host;</div><div class='add'>+	struct deferred_event *de, *tmp;</div><div class='add'>+	struct evsel *evsel;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(de, tmp, &amp;evlist-&gt;deferred_samples, list) {</div><div class='add'>+		struct perf_sample sample;</div><div class='add'>+</div><div class='add'>+		ret = evlist__parse_sample(evlist, de-&gt;event, &amp;sample);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("failed to parse original sample\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		evsel = evlist__id2evsel(evlist, sample.id);</div><div class='add'>+		ret = evlist__deliver_sample(evlist, tool, de-&gt;event,</div><div class='add'>+					     &amp;sample, evsel, machine);</div><div class='add'>+</div><div class='add'>+		list_del(&amp;de-&gt;list);</div><div class='add'>+		free(de-&gt;event);</div><div class='add'>+		free(de);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int machines__deliver_event(struct machines *machines,</div><div class='ctx'> 				   struct evlist *evlist,</div><div class='ctx'> 				   union perf_event *event,</div><div class='hunk'>@@ -1296,6 +1413,22 @@ static int machines__deliver_event(struct machines *machines,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		dump_sample(evsel, event, sample, perf_env__arch(machine-&gt;env));</div><div class='add'>+		if (sample-&gt;deferred_callchain &amp;&amp; tool-&gt;merge_deferred_callchains) {</div><div class='add'>+			struct deferred_event *de = malloc(sizeof(*de));</div><div class='add'>+			size_t sz = event-&gt;header.size;</div><div class='add'>+</div><div class='add'>+			if (de == NULL)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+</div><div class='add'>+			de-&gt;event = malloc(sz);</div><div class='add'>+			if (de-&gt;event == NULL) {</div><div class='add'>+				free(de);</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			}</div><div class='add'>+			memcpy(de-&gt;event, event, sz);</div><div class='add'>+			list_add_tail(&amp;de-&gt;list, &amp;evlist-&gt;deferred_samples);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 		return evlist__deliver_sample(evlist, tool, event, sample, evsel, machine);</div><div class='ctx'> 	case PERF_RECORD_MMAP:</div><div class='ctx'> 		return tool-&gt;mmap(tool, event, sample, machine);</div><div class='hunk'>@@ -1353,6 +1486,10 @@ static int machines__deliver_event(struct machines *machines,</div><div class='ctx'> 		return tool-&gt;text_poke(tool, event, sample, machine);</div><div class='ctx'> 	case PERF_RECORD_AUX_OUTPUT_HW_ID:</div><div class='ctx'> 		return tool-&gt;aux_output_hw_id(tool, event, sample, machine);</div><div class='add'>+	case PERF_RECORD_CALLCHAIN_DEFERRED:</div><div class='add'>+		dump_deferred_callchain(evsel, event, sample);</div><div class='add'>+		return evlist__deliver_deferred_callchain(evlist, tool, event,</div><div class='add'>+							  sample, machine);</div><div class='ctx'> 	default:</div><div class='ctx'> 		++evlist-&gt;stats.nr_unknown_events;</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1402,7 +1539,7 @@ static s64 perf_session__process_user_event(struct perf_session *session,</div><div class='ctx'> 	const struct perf_tool *tool = session-&gt;tool;</div><div class='ctx'> 	struct perf_sample sample;</div><div class='ctx'> 	int fd = perf_data__fd(session-&gt;data);</div><div class='del'>-	int err;</div><div class='add'>+	s64 err;</div><div class='ctx'> </div><div class='ctx'> 	perf_sample__init(&amp;sample, /*all=*/true);</div><div class='ctx'> 	if ((event-&gt;header.type != PERF_RECORD_COMPRESSED &amp;&amp;</div><div class='hunk'>@@ -1437,19 +1574,19 @@ static s64 perf_session__process_user_event(struct perf_session *session,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!perf_data__is_pipe(session-&gt;data))</div><div class='ctx'> 			lseek(fd, file_offset, SEEK_SET);</div><div class='del'>-		err = tool-&gt;tracing_data(session, event);</div><div class='add'>+		err = tool-&gt;tracing_data(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_HEADER_BUILD_ID:</div><div class='del'>-		err = tool-&gt;build_id(session, event);</div><div class='add'>+		err = tool-&gt;build_id(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_FINISHED_ROUND:</div><div class='ctx'> 		err = tool-&gt;finished_round(tool, event, oe);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_ID_INDEX:</div><div class='del'>-		err = tool-&gt;id_index(session, event);</div><div class='add'>+		err = tool-&gt;id_index(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_AUXTRACE_INFO:</div><div class='del'>-		err = tool-&gt;auxtrace_info(session, event);</div><div class='add'>+		err = tool-&gt;auxtrace_info(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_AUXTRACE:</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1459,45 +1596,45 @@ static s64 perf_session__process_user_event(struct perf_session *session,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!perf_data__is_pipe(session-&gt;data))</div><div class='ctx'> 			lseek(fd, file_offset + event-&gt;header.size, SEEK_SET);</div><div class='del'>-		err = tool-&gt;auxtrace(session, event);</div><div class='add'>+		err = tool-&gt;auxtrace(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_AUXTRACE_ERROR:</div><div class='ctx'> 		perf_session__auxtrace_error_inc(session, event);</div><div class='del'>-		err = tool-&gt;auxtrace_error(session, event);</div><div class='add'>+		err = tool-&gt;auxtrace_error(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_THREAD_MAP:</div><div class='del'>-		err = tool-&gt;thread_map(session, event);</div><div class='add'>+		err = tool-&gt;thread_map(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_CPU_MAP:</div><div class='del'>-		err = tool-&gt;cpu_map(session, event);</div><div class='add'>+		err = tool-&gt;cpu_map(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_STAT_CONFIG:</div><div class='del'>-		err = tool-&gt;stat_config(session, event);</div><div class='add'>+		err = tool-&gt;stat_config(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_STAT:</div><div class='del'>-		err = tool-&gt;stat(session, event);</div><div class='add'>+		err = tool-&gt;stat(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_STAT_ROUND:</div><div class='del'>-		err = tool-&gt;stat_round(session, event);</div><div class='add'>+		err = tool-&gt;stat_round(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_TIME_CONV:</div><div class='ctx'> 		session-&gt;time_conv = event-&gt;time_conv;</div><div class='del'>-		err = tool-&gt;time_conv(session, event);</div><div class='add'>+		err = tool-&gt;time_conv(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_HEADER_FEATURE:</div><div class='del'>-		err = tool-&gt;feature(session, event);</div><div class='add'>+		err = tool-&gt;feature(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_COMPRESSED:</div><div class='ctx'> 	case PERF_RECORD_COMPRESSED2:</div><div class='del'>-		err = tool-&gt;compressed(session, event, file_offset, file_path);</div><div class='add'>+		err = tool-&gt;compressed(tool, session, event, file_offset, file_path);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			dump_event(session-&gt;evlist, event, file_offset, &amp;sample, file_path);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_FINISHED_INIT:</div><div class='del'>-		err = tool-&gt;finished_init(session, event);</div><div class='add'>+		err = tool-&gt;finished_init(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PERF_RECORD_BPF_METADATA:</div><div class='del'>-		err = tool-&gt;bpf_metadata(session, event);</div><div class='add'>+		err = tool-&gt;bpf_metadata(tool, session, event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EINVAL;</div><div class='hunk'>@@ -1943,6 +2080,9 @@ done:</div><div class='ctx'> 	err = ordered_events__flush(oe, OE_FLUSH__FINAL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_err;</div><div class='add'>+	err = session__flush_deferred_samples(session, tool);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='ctx'> 	err = auxtrace__flush_events(session, tool);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -2289,6 +2429,9 @@ static int __perf_session__process_events(struct perf_session *session)</div><div class='ctx'> 	err = auxtrace__flush_events(session, tool);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_err;</div><div class='add'>+	err = session__flush_deferred_samples(session, tool);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='ctx'> 	err = perf_session__flush_thread_stacks(session);</div><div class='ctx'> out_err:</div><div class='ctx'> 	ui_progress__finish();</div><div class='hunk'>@@ -2409,6 +2552,10 @@ static int __perf_session__process_dir_events(struct perf_session *session)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='add'>+	ret = session__flush_deferred_samples(session, tool);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='ctx'> 	ret = perf_session__flush_thread_stacks(session);</div><div class='ctx'> out_err:</div><div class='ctx'> 	ui_progress__finish();</div><div class='hunk'>@@ -2647,7 +2794,8 @@ static int perf_session__set_guest_cpu(struct perf_session *session, pid_t pid,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int perf_event__process_id_index(struct perf_session *session,</div><div class='add'>+int perf_event__process_id_index(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct evlist *evlist = session-&gt;evlist;</div><div class='head'>diff --git a/tools/perf/util/session.h b/tools/perf/util/session.h<br/>index cf88d65a25cb..22d3ff877e83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/session.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/session.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/session.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/session.h</a></div><div class='hunk'>@@ -202,7 +202,8 @@ int perf_session__deliver_synth_attr_event(struct perf_session *session,</div><div class='ctx'> </div><div class='ctx'> int perf_session__dsos_hit_all(struct perf_session *session);</div><div class='ctx'> </div><div class='del'>-int perf_event__process_id_index(struct perf_session *session,</div><div class='add'>+int perf_event__process_id_index(const struct perf_tool *tool,</div><div class='add'>+				 struct perf_session *session,</div><div class='ctx'> 				 union perf_event *event);</div><div class='ctx'> </div><div class='ctx'> int perf_event__process_finished_round(const struct perf_tool *tool,</div><div class='head'>diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py<br/>index dd289d15acfd..b65b1792ca05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/setup.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/setup.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/setup.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/setup.py</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> from os import getenv, path</div><div class='ctx'> from subprocess import Popen, PIPE</div><div class='ctx'> from re import sub</div><div class='add'>+import shlex</div><div class='ctx'> </div><div class='ctx'> cc = getenv("CC")</div><div class='ctx'> assert cc, "Environment variable CC not set"</div><div class='hunk'>@@ -22,8 +23,17 @@ assert srctree, "Environment variable srctree, for the Linux sources, not set"</div><div class='ctx'> src_feature_tests  = f'{srctree}/tools/build/feature'</div><div class='ctx'> </div><div class='ctx'> def clang_has_option(option):</div><div class='del'>-    cc_output = Popen([cc, cc_options + option, path.join(src_feature_tests, "test-hello.c") ], stderr=PIPE).stderr.readlines()</div><div class='del'>-    return [o for o in cc_output if ((b"unknown argument" in o) or (b"is not supported" in o) or (b"unknown warning option" in o))] == [ ]</div><div class='add'>+    error_substrings = (</div><div class='add'>+        b"unknown argument",</div><div class='add'>+        b"is not supported",</div><div class='add'>+        b"unknown warning option"</div><div class='add'>+    )</div><div class='add'>+    cmd = shlex.split(f"{cc} {cc_options} {option}") + [</div><div class='add'>+        "-o", "/dev/null",</div><div class='add'>+        path.join(src_feature_tests, "test-hello.c")</div><div class='add'>+    ]</div><div class='add'>+    cc_output = Popen(cmd, stderr=PIPE).stderr.readlines()</div><div class='add'>+    return not any(any(error in line for error in error_substrings) for line in cc_output)</div><div class='ctx'> </div><div class='ctx'> if cc_is_clang:</div><div class='ctx'>     from sysconfig import get_config_vars</div><div class='head'>diff --git a/tools/perf/util/srcline.c b/tools/perf/util/srcline.c<br/>index 3e3449e35dd4..27c0966611ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/srcline.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/srcline.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/srcline.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/srcline.c</a></div><div class='hunk'>@@ -1,32 +1,15 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#include &lt;inttypes.h&gt;</div><div class='del'>-#include &lt;signal.h&gt;</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-#include &lt;sys/types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/zalloc.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;api/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "util/dso.h"</div><div class='del'>-#include "util/debug.h"</div><div class='del'>-#include "util/callchain.h"</div><div class='del'>-#include "util/symbol_conf.h"</div><div class='del'>-#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='del'>-#include "util/llvm-c-helpers.h"</div><div class='del'>-#endif</div><div class='ctx'> #include "srcline.h"</div><div class='del'>-#include "string2.h"</div><div class='add'>+#include "addr2line.h"</div><div class='add'>+#include "dso.h"</div><div class='add'>+#include "callchain.h"</div><div class='add'>+#include "libbfd.h"</div><div class='add'>+#include "llvm.h"</div><div class='ctx'> #include "symbol.h"</div><div class='del'>-#include "subcmd/run-command.h"</div><div class='ctx'> </div><div class='del'>-/* If addr2line doesn't return data for 1 second then timeout. */</div><div class='del'>-int addr2line_timeout_ms = 1 * 1000;</div><div class='add'>+#include &lt;inttypes.h&gt;</div><div class='add'>+#include &lt;string.h&gt;</div><div class='add'>+</div><div class='ctx'> bool srcline_full_filename;</div><div class='ctx'> </div><div class='ctx'> char *srcline__unknown = (char *)"??:0";</div><div class='hunk'>@@ -49,8 +32,7 @@ static const char *srcline_dso_name(struct dso *dso)</div><div class='ctx'> 	return dso_name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int inline_list__append(struct symbol *symbol, char *srcline,</div><div class='del'>-			       struct inline_node *node)</div><div class='add'>+int inline_list__append(struct symbol *symbol, char *srcline, struct inline_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	struct inline_list *ilist;</div><div class='ctx'> </div><div class='hunk'>@@ -77,7 +59,7 @@ static const char *gnu_basename(const char *path)</div><div class='ctx'> 	return base ? base + 1 : path;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static char *srcline_from_fileline(const char *file, unsigned int line)</div><div class='add'>+char *srcline_from_fileline(const char *file, unsigned int line)</div><div class='ctx'> {</div><div class='ctx'> 	char *srcline;</div><div class='ctx'> </div><div class='hunk'>@@ -93,9 +75,9 @@ static char *srcline_from_fileline(const char *file, unsigned int line)</div><div class='ctx'> 	return srcline;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct symbol *new_inline_sym(struct dso *dso,</div><div class='del'>-				     struct symbol *base_sym,</div><div class='del'>-				     const char *funcname)</div><div class='add'>+struct symbol *new_inline_sym(struct dso *dso,</div><div class='add'>+			      struct symbol *base_sym,</div><div class='add'>+			      const char *funcname)</div><div class='ctx'> {</div><div class='ctx'> 	struct symbol *inline_sym;</div><div class='ctx'> 	char *demangled = NULL;</div><div class='hunk'>@@ -132,722 +114,23 @@ static struct symbol *new_inline_sym(struct dso *dso,</div><div class='ctx'> 	return inline_sym;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MAX_INLINE_NEST 1024</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_LIBLLVM_SUPPORT</div><div class='del'>-</div><div class='del'>-static void free_llvm_inline_frames(struct llvm_a2l_frame *inline_frames,</div><div class='del'>-				    int num_frames)</div><div class='del'>-{</div><div class='del'>-	if (inline_frames != NULL) {</div><div class='del'>-		for (int i = 0; i &lt; num_frames; ++i) {</div><div class='del'>-			zfree(&amp;inline_frames[i].filename);</div><div class='del'>-			zfree(&amp;inline_frames[i].funcname);</div><div class='del'>-		}</div><div class='del'>-		zfree(&amp;inline_frames);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int addr2line(const char *dso_name, u64 addr,</div><div class='del'>-		     char **file, unsigned int *line, struct dso *dso,</div><div class='del'>-		     bool unwind_inlines, struct inline_node *node,</div><div class='add'>+static int addr2line(const char *dso_name, u64 addr, char **file, unsigned int *line_nr,</div><div class='add'>+		     struct dso *dso, bool unwind_inlines, struct inline_node *node,</div><div class='ctx'> 		     struct symbol *sym)</div><div class='ctx'> {</div><div class='del'>-	struct llvm_a2l_frame *inline_frames = NULL;</div><div class='del'>-	int num_frames = llvm_addr2line(dso_name, addr, file, line,</div><div class='del'>-					node &amp;&amp; unwind_inlines, &amp;inline_frames);</div><div class='del'>-</div><div class='del'>-	if (num_frames == 0 || !inline_frames) {</div><div class='del'>-		/* Error, or we didn't want inlines. */</div><div class='del'>-		return num_frames;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; num_frames; ++i) {</div><div class='del'>-		struct symbol *inline_sym =</div><div class='del'>-			new_inline_sym(dso, sym, inline_frames[i].funcname);</div><div class='del'>-		char *srcline = NULL;</div><div class='del'>-</div><div class='del'>-		if (inline_frames[i].filename) {</div><div class='del'>-			srcline =</div><div class='del'>-				srcline_from_fileline(inline_frames[i].filename,</div><div class='del'>-						      inline_frames[i].line);</div><div class='del'>-		}</div><div class='del'>-		if (inline_list__append(inline_sym, srcline, node) != 0) {</div><div class='del'>-			free_llvm_inline_frames(inline_frames, num_frames);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	free_llvm_inline_frames(inline_frames, num_frames);</div><div class='del'>-</div><div class='del'>-	return num_frames;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dso__free_a2l(struct dso *dso __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	/* Nothing to free. */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#elif defined(HAVE_LIBBFD_SUPPORT)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Implement addr2line using libbfd.</div><div class='del'>- */</div><div class='del'>-#define PACKAGE "perf"</div><div class='del'>-#include &lt;bfd.h&gt;</div><div class='del'>-</div><div class='del'>-struct a2l_data {</div><div class='del'>-	const char 	*input;</div><div class='del'>-	u64	 	addr;</div><div class='del'>-</div><div class='del'>-	bool 		found;</div><div class='del'>-	const char 	*filename;</div><div class='del'>-	const char 	*funcname;</div><div class='del'>-	unsigned 	line;</div><div class='del'>-</div><div class='del'>-	bfd 		*abfd;</div><div class='del'>-	asymbol 	**syms;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int bfd_error(const char *string)</div><div class='del'>-{</div><div class='del'>-	const char *errmsg;</div><div class='del'>-</div><div class='del'>-	errmsg = bfd_errmsg(bfd_get_error());</div><div class='del'>-	fflush(stdout);</div><div class='del'>-</div><div class='del'>-	if (string)</div><div class='del'>-		pr_debug("%s: %s\n", string, errmsg);</div><div class='del'>-	else</div><div class='del'>-		pr_debug("%s\n", errmsg);</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int slurp_symtab(bfd *abfd, struct a2l_data *a2l)</div><div class='del'>-{</div><div class='del'>-	long storage;</div><div class='del'>-	long symcount;</div><div class='del'>-	asymbol **syms;</div><div class='del'>-	bfd_boolean dynamic = FALSE;</div><div class='del'>-</div><div class='del'>-	if ((bfd_get_file_flags(abfd) &amp; HAS_SYMS) == 0)</div><div class='del'>-		return bfd_error(bfd_get_filename(abfd));</div><div class='del'>-</div><div class='del'>-	storage = bfd_get_symtab_upper_bound(abfd);</div><div class='del'>-	if (storage == 0L) {</div><div class='del'>-		storage = bfd_get_dynamic_symtab_upper_bound(abfd);</div><div class='del'>-		dynamic = TRUE;</div><div class='del'>-	}</div><div class='del'>-	if (storage &lt; 0L)</div><div class='del'>-		return bfd_error(bfd_get_filename(abfd));</div><div class='del'>-</div><div class='del'>-	syms = malloc(storage);</div><div class='del'>-	if (dynamic)</div><div class='del'>-		symcount = bfd_canonicalize_dynamic_symtab(abfd, syms);</div><div class='del'>-	else</div><div class='del'>-		symcount = bfd_canonicalize_symtab(abfd, syms);</div><div class='del'>-</div><div class='del'>-	if (symcount &lt; 0) {</div><div class='del'>-		free(syms);</div><div class='del'>-		return bfd_error(bfd_get_filename(abfd));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	a2l-&gt;syms = syms;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void find_address_in_section(bfd *abfd, asection *section, void *data)</div><div class='del'>-{</div><div class='del'>-	bfd_vma pc, vma;</div><div class='del'>-	bfd_size_type size;</div><div class='del'>-	struct a2l_data *a2l = data;</div><div class='del'>-	flagword flags;</div><div class='del'>-</div><div class='del'>-	if (a2l-&gt;found)</div><div class='del'>-		return;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-#ifdef bfd_get_section_flags</div><div class='del'>-	flags = bfd_get_section_flags(abfd, section);</div><div class='del'>-#else</div><div class='del'>-	flags = bfd_section_flags(section);</div><div class='del'>-#endif</div><div class='del'>-	if ((flags &amp; SEC_ALLOC) == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pc = a2l-&gt;addr;</div><div class='del'>-#ifdef bfd_get_section_vma</div><div class='del'>-	vma = bfd_get_section_vma(abfd, section);</div><div class='del'>-#else</div><div class='del'>-	vma = bfd_section_vma(section);</div><div class='del'>-#endif</div><div class='del'>-#ifdef bfd_get_section_size</div><div class='del'>-	size = bfd_get_section_size(section);</div><div class='del'>-#else</div><div class='del'>-	size = bfd_section_size(section);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (pc &lt; vma || pc &gt;= vma + size)</div><div class='del'>-		return;</div><div class='add'>+	ret = llvm__addr2line(dso_name, addr, file, line_nr, dso, unwind_inlines, node, sym);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	a2l-&gt;found = bfd_find_nearest_line(abfd, section, a2l-&gt;syms, pc - vma,</div><div class='del'>-					   &amp;a2l-&gt;filename, &amp;a2l-&gt;funcname,</div><div class='del'>-					   &amp;a2l-&gt;line);</div><div class='del'>-</div><div class='del'>-	if (a2l-&gt;filename &amp;&amp; !strlen(a2l-&gt;filename))</div><div class='del'>-		a2l-&gt;filename = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct a2l_data *addr2line_init(const char *path)</div><div class='del'>-{</div><div class='del'>-	bfd *abfd;</div><div class='del'>-	struct a2l_data *a2l = NULL;</div><div class='del'>-</div><div class='del'>-	abfd = bfd_openr(path, NULL);</div><div class='del'>-	if (abfd == NULL)</div><div class='del'>-		return NULL;</div><div class='add'>+	ret = libbfd__addr2line(dso_name, addr, file, line_nr, dso, unwind_inlines, node, sym);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!bfd_check_format(abfd, bfd_object))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	a2l = zalloc(sizeof(*a2l));</div><div class='del'>-	if (a2l == NULL)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	a2l-&gt;abfd = abfd;</div><div class='del'>-	a2l-&gt;input = strdup(path);</div><div class='del'>-	if (a2l-&gt;input == NULL)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (slurp_symtab(abfd, a2l))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	return a2l;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	if (a2l) {</div><div class='del'>-		zfree((char **)&amp;a2l-&gt;input);</div><div class='del'>-		free(a2l);</div><div class='del'>-	}</div><div class='del'>-	bfd_close(abfd);</div><div class='del'>-	return NULL;</div><div class='add'>+	return cmd__addr2line(dso_name, addr, file, line_nr, dso, unwind_inlines, node, sym);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void addr2line_cleanup(struct a2l_data *a2l)</div><div class='del'>-{</div><div class='del'>-	if (a2l-&gt;abfd)</div><div class='del'>-		bfd_close(a2l-&gt;abfd);</div><div class='del'>-	zfree((char **)&amp;a2l-&gt;input);</div><div class='del'>-	zfree(&amp;a2l-&gt;syms);</div><div class='del'>-	free(a2l);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int inline_list__append_dso_a2l(struct dso *dso,</div><div class='del'>-				       struct inline_node *node,</div><div class='del'>-				       struct symbol *sym)</div><div class='del'>-{</div><div class='del'>-	struct a2l_data *a2l = dso__a2l(dso);</div><div class='del'>-	struct symbol *inline_sym = new_inline_sym(dso, sym, a2l-&gt;funcname);</div><div class='del'>-	char *srcline = NULL;</div><div class='del'>-</div><div class='del'>-	if (a2l-&gt;filename)</div><div class='del'>-		srcline = srcline_from_fileline(a2l-&gt;filename, a2l-&gt;line);</div><div class='del'>-</div><div class='del'>-	return inline_list__append(inline_sym, srcline, node);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int addr2line(const char *dso_name, u64 addr,</div><div class='del'>-		     char **file, unsigned int *line, struct dso *dso,</div><div class='del'>-		     bool unwind_inlines, struct inline_node *node,</div><div class='del'>-		     struct symbol *sym)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct a2l_data *a2l = dso__a2l(dso);</div><div class='del'>-</div><div class='del'>-	if (!a2l) {</div><div class='del'>-		a2l = addr2line_init(dso_name);</div><div class='del'>-		dso__set_a2l(dso, a2l);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (a2l == NULL) {</div><div class='del'>-		if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-			pr_warning("addr2line_init failed for %s\n", dso_name);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	a2l-&gt;addr = addr;</div><div class='del'>-	a2l-&gt;found = false;</div><div class='del'>-</div><div class='del'>-	bfd_map_over_sections(a2l-&gt;abfd, find_address_in_section, a2l);</div><div class='del'>-</div><div class='del'>-	if (!a2l-&gt;found)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (unwind_inlines) {</div><div class='del'>-		int cnt = 0;</div><div class='del'>-</div><div class='del'>-		if (node &amp;&amp; inline_list__append_dso_a2l(dso, node, sym))</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		while (bfd_find_inliner_info(a2l-&gt;abfd, &amp;a2l-&gt;filename,</div><div class='del'>-					     &amp;a2l-&gt;funcname, &amp;a2l-&gt;line) &amp;&amp;</div><div class='del'>-		       cnt++ &lt; MAX_INLINE_NEST) {</div><div class='del'>-</div><div class='del'>-			if (a2l-&gt;filename &amp;&amp; !strlen(a2l-&gt;filename))</div><div class='del'>-				a2l-&gt;filename = NULL;</div><div class='del'>-</div><div class='del'>-			if (node != NULL) {</div><div class='del'>-				if (inline_list__append_dso_a2l(dso, node, sym))</div><div class='del'>-					return 0;</div><div class='del'>-				// found at least one inline frame</div><div class='del'>-				ret = 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (file) {</div><div class='del'>-		*file = a2l-&gt;filename ? strdup(a2l-&gt;filename) : NULL;</div><div class='del'>-		ret = *file ? 1 : 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (line)</div><div class='del'>-		*line = a2l-&gt;line;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dso__free_a2l(struct dso *dso)</div><div class='del'>-{</div><div class='del'>-	struct a2l_data *a2l = dso__a2l(dso);</div><div class='del'>-</div><div class='del'>-	if (!a2l)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	addr2line_cleanup(a2l);</div><div class='del'>-</div><div class='del'>-	dso__set_a2l(dso, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else /* HAVE_LIBBFD_SUPPORT */</div><div class='del'>-</div><div class='del'>-static int filename_split(char *filename, unsigned int *line_nr)</div><div class='del'>-{</div><div class='del'>-	char *sep;</div><div class='del'>-</div><div class='del'>-	sep = strchr(filename, '\n');</div><div class='del'>-	if (sep)</div><div class='del'>-		*sep = '\0';</div><div class='del'>-</div><div class='del'>-	if (!strcmp(filename, "??:0"))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	sep = strchr(filename, ':');</div><div class='del'>-	if (sep) {</div><div class='del'>-		*sep++ = '\0';</div><div class='del'>-		*line_nr = strtoul(sep, NULL, 0);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	pr_debug("addr2line missing ':' in filename split\n");</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void addr2line_subprocess_cleanup(struct child_process *a2l)</div><div class='del'>-{</div><div class='del'>-	if (a2l-&gt;pid != -1) {</div><div class='del'>-		kill(a2l-&gt;pid, SIGKILL);</div><div class='del'>-		finish_command(a2l); /* ignore result, we don't care */</div><div class='del'>-		a2l-&gt;pid = -1;</div><div class='del'>-		close(a2l-&gt;in);</div><div class='del'>-		close(a2l-&gt;out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	free(a2l);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct child_process *addr2line_subprocess_init(const char *addr2line_path,</div><div class='del'>-							const char *binary_path)</div><div class='del'>-{</div><div class='del'>-	const char *argv[] = {</div><div class='del'>-		addr2line_path ?: "addr2line",</div><div class='del'>-		"-e", binary_path,</div><div class='del'>-		"-a", "-i", "-f", NULL</div><div class='del'>-	};</div><div class='del'>-	struct child_process *a2l = zalloc(sizeof(*a2l));</div><div class='del'>-	int start_command_status = 0;</div><div class='del'>-</div><div class='del'>-	if (a2l == NULL) {</div><div class='del'>-		pr_err("Failed to allocate memory for addr2line");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	a2l-&gt;pid = -1;</div><div class='del'>-	a2l-&gt;in = -1;</div><div class='del'>-	a2l-&gt;out = -1;</div><div class='del'>-	a2l-&gt;no_stderr = 1;</div><div class='del'>-</div><div class='del'>-	a2l-&gt;argv = argv;</div><div class='del'>-	start_command_status = start_command(a2l);</div><div class='del'>-	a2l-&gt;argv = NULL; /* it's not used after start_command; avoid dangling pointers */</div><div class='del'>-</div><div class='del'>-	if (start_command_status != 0) {</div><div class='del'>-		pr_warning("could not start addr2line (%s) for %s: start_command return code %d\n",</div><div class='del'>-			addr2line_path, binary_path, start_command_status);</div><div class='del'>-		addr2line_subprocess_cleanup(a2l);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return a2l;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-enum a2l_style {</div><div class='del'>-	BROKEN,</div><div class='del'>-	GNU_BINUTILS,</div><div class='del'>-	LLVM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static enum a2l_style addr2line_configure(struct child_process *a2l, const char *dso_name)</div><div class='del'>-{</div><div class='del'>-	static bool cached;</div><div class='del'>-	static enum a2l_style style;</div><div class='del'>-</div><div class='del'>-	if (!cached) {</div><div class='del'>-		char buf[128];</div><div class='del'>-		struct io io;</div><div class='del'>-		int ch;</div><div class='del'>-		int lines;</div><div class='del'>-</div><div class='del'>-		if (write(a2l-&gt;in, ",\n", 2) != 2)</div><div class='del'>-			return BROKEN;</div><div class='del'>-</div><div class='del'>-		io__init(&amp;io, a2l-&gt;out, buf, sizeof(buf));</div><div class='del'>-		ch = io__get_char(&amp;io);</div><div class='del'>-		if (ch == ',') {</div><div class='del'>-			style = LLVM;</div><div class='del'>-			cached = true;</div><div class='del'>-			lines = 1;</div><div class='del'>-			pr_debug3("Detected LLVM addr2line style\n");</div><div class='del'>-		} else if (ch == '0') {</div><div class='del'>-			style = GNU_BINUTILS;</div><div class='del'>-			cached = true;</div><div class='del'>-			lines = 3;</div><div class='del'>-			pr_debug3("Detected binutils addr2line style\n");</div><div class='del'>-		} else {</div><div class='del'>-			if (!symbol_conf.disable_add2line_warn) {</div><div class='del'>-				char *output = NULL;</div><div class='del'>-				size_t output_len;</div><div class='del'>-</div><div class='del'>-				io__getline(&amp;io, &amp;output, &amp;output_len);</div><div class='del'>-				pr_warning("%s %s: addr2line configuration failed\n",</div><div class='del'>-					   __func__, dso_name);</div><div class='del'>-				pr_warning("\t%c%s", ch, output);</div><div class='del'>-			}</div><div class='del'>-			pr_debug("Unknown/broken addr2line style\n");</div><div class='del'>-			return BROKEN;</div><div class='del'>-		}</div><div class='del'>-		while (lines) {</div><div class='del'>-			ch = io__get_char(&amp;io);</div><div class='del'>-			if (ch &lt;= 0)</div><div class='del'>-				break;</div><div class='del'>-			if (ch == '\n')</div><div class='del'>-				lines--;</div><div class='del'>-		}</div><div class='del'>-		/* Ignore SIGPIPE in the event addr2line exits. */</div><div class='del'>-		signal(SIGPIPE, SIG_IGN);</div><div class='del'>-	}</div><div class='del'>-	return style;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int read_addr2line_record(struct io *io,</div><div class='del'>-				 enum a2l_style style,</div><div class='del'>-				 const char *dso_name,</div><div class='del'>-				 u64 addr,</div><div class='del'>-				 bool first,</div><div class='del'>-				 char **function,</div><div class='del'>-				 char **filename,</div><div class='del'>-				 unsigned int *line_nr)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Returns:</div><div class='del'>-	 * -1 ==&gt; error</div><div class='del'>-	 * 0 ==&gt; sentinel (or other ill-formed) record read</div><div class='del'>-	 * 1 ==&gt; a genuine record read</div><div class='del'>-	 */</div><div class='del'>-	char *line = NULL;</div><div class='del'>-	size_t line_len = 0;</div><div class='del'>-	unsigned int dummy_line_nr = 0;</div><div class='del'>-	int ret = -1;</div><div class='del'>-</div><div class='del'>-	if (function != NULL)</div><div class='del'>-		zfree(function);</div><div class='del'>-</div><div class='del'>-	if (filename != NULL)</div><div class='del'>-		zfree(filename);</div><div class='del'>-</div><div class='del'>-	if (line_nr != NULL)</div><div class='del'>-		*line_nr = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Read the first line. Without an error this will be:</div><div class='del'>-	 * - for the first line an address like 0x1234,</div><div class='del'>-	 * - the binutils sentinel 0x0000000000000000,</div><div class='del'>-	 * - the llvm-addr2line the sentinel ',' character,</div><div class='del'>-	 * - the function name line for an inlined function.</div><div class='del'>-	 */</div><div class='del'>-	if (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	pr_debug3("%s %s: addr2line read address for sentinel: %s", __func__, dso_name, line);</div><div class='del'>-	if (style == LLVM &amp;&amp; line_len == 2 &amp;&amp; line[0] == ',') {</div><div class='del'>-		/* Found the llvm-addr2line sentinel character. */</div><div class='del'>-		zfree(&amp;line);</div><div class='del'>-		return 0;</div><div class='del'>-	} else if (style == GNU_BINUTILS &amp;&amp; (!first || addr != 0)) {</div><div class='del'>-		int zero_count = 0, non_zero_count = 0;</div><div class='del'>-		/*</div><div class='del'>-		 * Check for binutils sentinel ignoring it for the case the</div><div class='del'>-		 * requested address is 0.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* A given address should always start 0x. */</div><div class='del'>-		if (line_len &gt;= 2 || line[0] != '0' || line[1] != 'x') {</div><div class='del'>-			for (size_t i = 2; i &lt; line_len; i++) {</div><div class='del'>-				if (line[i] == '0')</div><div class='del'>-					zero_count++;</div><div class='del'>-				else if (line[i] != '\n')</div><div class='del'>-					non_zero_count++;</div><div class='del'>-			}</div><div class='del'>-			if (!non_zero_count) {</div><div class='del'>-				int ch;</div><div class='del'>-</div><div class='del'>-				if (first &amp;&amp; !zero_count) {</div><div class='del'>-					/* Line was erroneous just '0x'. */</div><div class='del'>-					goto error;</div><div class='del'>-				}</div><div class='del'>-				/*</div><div class='del'>-				 * Line was 0x0..0, the sentinel for binutils. Remove</div><div class='del'>-				 * the function and filename lines.</div><div class='del'>-				 */</div><div class='del'>-				zfree(&amp;line);</div><div class='del'>-				do {</div><div class='del'>-					ch = io__get_char(io);</div><div class='del'>-				} while (ch &gt; 0 &amp;&amp; ch != '\n');</div><div class='del'>-				do {</div><div class='del'>-					ch = io__get_char(io);</div><div class='del'>-				} while (ch &gt; 0 &amp;&amp; ch != '\n');</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* Read the second function name line (if inline data then this is the first line). */</div><div class='del'>-	if (first &amp;&amp; (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len))</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	pr_debug3("%s %s: addr2line read line: %s", __func__, dso_name, line);</div><div class='del'>-	if (function != NULL)</div><div class='del'>-		*function = strdup(strim(line));</div><div class='del'>-</div><div class='del'>-	zfree(&amp;line);</div><div class='del'>-	line_len = 0;</div><div class='del'>-</div><div class='del'>-	/* Read the third filename and line number line. */</div><div class='del'>-	if (io__getline(io, &amp;line, &amp;line_len) &lt; 0 || !line_len)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	pr_debug3("%s %s: addr2line filename:number : %s", __func__, dso_name, line);</div><div class='del'>-	if (filename_split(line, line_nr == NULL ? &amp;dummy_line_nr : line_nr) == 0 &amp;&amp;</div><div class='del'>-	    style == GNU_BINUTILS) {</div><div class='del'>-		ret = 0;</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (filename != NULL)</div><div class='del'>-		*filename = strdup(line);</div><div class='del'>-</div><div class='del'>-	zfree(&amp;line);</div><div class='del'>-	line_len = 0;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	free(line);</div><div class='del'>-	if (function != NULL)</div><div class='del'>-		zfree(function);</div><div class='del'>-	if (filename != NULL)</div><div class='del'>-		zfree(filename);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int inline_list__append_record(struct dso *dso,</div><div class='del'>-				      struct inline_node *node,</div><div class='del'>-				      struct symbol *sym,</div><div class='del'>-				      const char *function,</div><div class='del'>-				      const char *filename,</div><div class='del'>-				      unsigned int line_nr)</div><div class='del'>-{</div><div class='del'>-	struct symbol *inline_sym = new_inline_sym(dso, sym, function);</div><div class='del'>-</div><div class='del'>-	return inline_list__append(inline_sym, srcline_from_fileline(filename, line_nr), node);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int addr2line(const char *dso_name, u64 addr,</div><div class='del'>-		     char **file, unsigned int *line_nr,</div><div class='del'>-		     struct dso *dso,</div><div class='del'>-		     bool unwind_inlines,</div><div class='del'>-		     struct inline_node *node,</div><div class='del'>-		     struct symbol *sym __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	struct child_process *a2l = dso__a2l(dso);</div><div class='del'>-	char *record_function = NULL;</div><div class='del'>-	char *record_filename = NULL;</div><div class='del'>-	unsigned int record_line_nr = 0;</div><div class='del'>-	int record_status = -1;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	size_t inline_count = 0;</div><div class='del'>-	int len;</div><div class='del'>-	char buf[128];</div><div class='del'>-	ssize_t written;</div><div class='del'>-	struct io io = { .eof = false };</div><div class='del'>-	enum a2l_style a2l_style;</div><div class='del'>-</div><div class='del'>-	if (!a2l) {</div><div class='del'>-		if (!filename__has_section(dso_name, ".debug_line"))</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		dso__set_a2l(dso,</div><div class='del'>-			     addr2line_subprocess_init(symbol_conf.addr2line_path, dso_name));</div><div class='del'>-		a2l = dso__a2l(dso);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (a2l == NULL) {</div><div class='del'>-		if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-			pr_warning("%s %s: addr2line_subprocess_init failed\n", __func__, dso_name);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	a2l_style = addr2line_configure(a2l, dso_name);</div><div class='del'>-	if (a2l_style == BROKEN)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Send our request and then *deliberately* send something that can't be</div><div class='del'>-	 * interpreted as a valid address to ask addr2line about (namely,</div><div class='del'>-	 * ","). This causes addr2line to first write out the answer to our</div><div class='del'>-	 * request, in an unbounded/unknown number of records, and then to write</div><div class='del'>-	 * out the lines "0x0...0", "??" and "??:0", for GNU binutils, or ","</div><div class='del'>-	 * for llvm-addr2line, so that we can detect when it has finished giving</div><div class='del'>-	 * us anything useful.</div><div class='del'>-	 */</div><div class='del'>-	len = snprintf(buf, sizeof(buf), "%016"PRIx64"\n,\n", addr);</div><div class='del'>-	written = len &gt; 0 ? write(a2l-&gt;in, buf, len) : -1;</div><div class='del'>-	if (written != len) {</div><div class='del'>-		if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-			pr_warning("%s %s: could not send request\n", __func__, dso_name);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	io__init(&amp;io, a2l-&gt;out, buf, sizeof(buf));</div><div class='del'>-	io.timeout_ms = addr2line_timeout_ms;</div><div class='del'>-	switch (read_addr2line_record(&amp;io, a2l_style, dso_name, addr, /*first=*/true,</div><div class='del'>-				      &amp;record_function, &amp;record_filename, &amp;record_line_nr)) {</div><div class='del'>-	case -1:</div><div class='del'>-		if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-			pr_warning("%s %s: could not read first record\n", __func__, dso_name);</div><div class='del'>-		goto out;</div><div class='del'>-	case 0:</div><div class='del'>-		/*</div><div class='del'>-		 * The first record was invalid, so return failure, but first</div><div class='del'>-		 * read another record, since we sent a sentinel ',' for the</div><div class='del'>-		 * sake of detected the last inlined function. Treat this as the</div><div class='del'>-		 * first of a record as the ',' generates a new start with GNU</div><div class='del'>-		 * binutils, also force a non-zero address as we're no longer</div><div class='del'>-		 * reading that record.</div><div class='del'>-		 */</div><div class='del'>-		switch (read_addr2line_record(&amp;io, a2l_style, dso_name,</div><div class='del'>-					      /*addr=*/1, /*first=*/true,</div><div class='del'>-					      NULL, NULL, NULL)) {</div><div class='del'>-		case -1:</div><div class='del'>-			if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-				pr_warning("%s %s: could not read sentinel record\n",</div><div class='del'>-					   __func__, dso_name);</div><div class='del'>-			break;</div><div class='del'>-		case 0:</div><div class='del'>-			/* The sentinel as expected. */</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			if (!symbol_conf.disable_add2line_warn)</div><div class='del'>-				pr_warning("%s %s: unexpected record instead of sentinel",</div><div class='del'>-					   __func__, dso_name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		goto out;</div><div class='del'>-	default:</div><div class='del'>-		/* First record as expected. */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (file) {</div><div class='del'>-		*file = strdup(record_filename);</div><div class='del'>-		ret = 1;</div><div class='del'>-	}</div><div class='del'>-	if (line_nr)</div><div class='del'>-		*line_nr = record_line_nr;</div><div class='del'>-</div><div class='del'>-	if (unwind_inlines) {</div><div class='del'>-		if (node &amp;&amp; inline_list__append_record(dso, node, sym,</div><div class='del'>-						       record_function,</div><div class='del'>-						       record_filename,</div><div class='del'>-						       record_line_nr)) {</div><div class='del'>-			ret = 0;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We have to read the records even if we don't care about the inline</div><div class='del'>-	 * info. This isn't the first record and force the address to non-zero</div><div class='del'>-	 * as we're reading records beyond the first.</div><div class='del'>-	 */</div><div class='del'>-	while ((record_status = read_addr2line_record(&amp;io,</div><div class='del'>-						      a2l_style,</div><div class='del'>-						      dso_name,</div><div class='del'>-						      /*addr=*/1,</div><div class='del'>-						      /*first=*/false,</div><div class='del'>-						      &amp;record_function,</div><div class='del'>-						      &amp;record_filename,</div><div class='del'>-						      &amp;record_line_nr)) == 1) {</div><div class='del'>-		if (unwind_inlines &amp;&amp; node &amp;&amp; inline_count++ &lt; MAX_INLINE_NEST) {</div><div class='del'>-			if (inline_list__append_record(dso, node, sym,</div><div class='del'>-						       record_function,</div><div class='del'>-						       record_filename,</div><div class='del'>-						       record_line_nr)) {</div><div class='del'>-				ret = 0;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-			ret = 1; /* found at least one inline frame */</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	free(record_function);</div><div class='del'>-	free(record_filename);</div><div class='del'>-	if (io.eof) {</div><div class='del'>-		dso__set_a2l(dso, NULL);</div><div class='del'>-		addr2line_subprocess_cleanup(a2l);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dso__free_a2l(struct dso *dso)</div><div class='del'>-{</div><div class='del'>-	struct child_process *a2l = dso__a2l(dso);</div><div class='del'>-</div><div class='del'>-	if (!a2l)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	addr2line_subprocess_cleanup(a2l);</div><div class='del'>-</div><div class='del'>-	dso__set_a2l(dso, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* HAVE_LIBBFD_SUPPORT */</div><div class='del'>-</div><div class='ctx'> static struct inline_node *addr2inlines(const char *dso_name, u64 addr,</div><div class='ctx'> 					struct dso *dso, struct symbol *sym)</div><div class='ctx'> {</div><div class='hunk'>@@ -862,7 +145,9 @@ static struct inline_node *addr2inlines(const char *dso_name, u64 addr,</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;node-&gt;val);</div><div class='ctx'> 	node-&gt;addr = addr;</div><div class='ctx'> </div><div class='del'>-	addr2line(dso_name, addr, NULL, NULL, dso, true, node, sym);</div><div class='add'>+	addr2line(dso_name, addr, /*file=*/NULL, /*line_nr=*/NULL, dso,</div><div class='add'>+		  /*unwind_inlines=*/true, node, sym);</div><div class='add'>+</div><div class='ctx'> 	return node;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -889,7 +174,7 @@ char *__get_srcline(struct dso *dso, u64 addr, struct symbol *sym,</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='ctx'> 	if (!addr2line(dso_name, addr, &amp;file, &amp;line, dso,</div><div class='del'>-		       unwind_inlines, NULL, sym))</div><div class='add'>+		       unwind_inlines, /*node=*/NULL, sym))</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='ctx'> 	srcline = srcline_from_fileline(file, line);</div><div class='hunk'>@@ -935,7 +220,8 @@ char *get_srcline_split(struct dso *dso, u64 addr, unsigned *line)</div><div class='ctx'> 	if (dso_name == NULL)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='del'>-	if (!addr2line(dso_name, addr, &amp;file, line, dso, true, NULL, NULL))</div><div class='add'>+	if (!addr2line(dso_name, addr, &amp;file, line, dso, /*unwind_inlines=*/true,</div><div class='add'>+			/*node=*/NULL, /*sym=*/NULL))</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='ctx'> 	dso__set_a2l_fails(dso, 0);</div><div class='head'>diff --git a/tools/perf/util/srcline.h b/tools/perf/util/srcline.h<br/>index 75010d39ea28..c36f573cd339 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/srcline.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/srcline.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/srcline.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/srcline.h</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> struct dso;</div><div class='ctx'> struct symbol;</div><div class='ctx'> </div><div class='del'>-extern int addr2line_timeout_ms;</div><div class='ctx'> extern bool srcline_full_filename;</div><div class='ctx'> char *get_srcline(struct dso *dso, u64 addr, struct symbol *sym,</div><div class='ctx'> 		  bool show_sym, bool show_addr, u64 ip);</div><div class='hunk'>@@ -29,6 +28,8 @@ void srcline__tree_delete(struct rb_root_cached *tree);</div><div class='ctx'> extern char *srcline__unknown;</div><div class='ctx'> #define SRCLINE_UNKNOWN srcline__unknown</div><div class='ctx'> </div><div class='add'>+#define MAX_INLINE_NEST 1024</div><div class='add'>+</div><div class='ctx'> struct inline_list {</div><div class='ctx'> 	struct symbol		*symbol;</div><div class='ctx'> 	char			*srcline;</div><div class='hunk'>@@ -55,4 +56,10 @@ struct inline_node *inlines__tree_find(struct rb_root_cached *tree, u64 addr);</div><div class='ctx'> /* delete all nodes within the tree of inline_node s */</div><div class='ctx'> void inlines__tree_delete(struct rb_root_cached *tree);</div><div class='ctx'> </div><div class='add'>+int inline_list__append(struct symbol *symbol, char *srcline, struct inline_node *node);</div><div class='add'>+char *srcline_from_fileline(const char *file, unsigned int line);</div><div class='add'>+struct symbol *new_inline_sym(struct dso *dso,</div><div class='add'>+			      struct symbol *base_sym,</div><div class='add'>+			      const char *funcname);</div><div class='add'>+</div><div class='ctx'> #endif /* PERF_SRCLINE_H */</div><div class='head'>diff --git a/tools/perf/util/stat-display.c b/tools/perf/util/stat-display.c<br/>index a67b991f4e81..6d02f84c5691 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat-display.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat-display.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat-display.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/stat-display.c</a></div><div class='hunk'>@@ -439,9 +439,9 @@ static inline void __new_line_std_csv(struct perf_stat_config *config,</div><div class='ctx'> 	aggr_printout(config, os, os-&gt;evsel, os-&gt;id, os-&gt;aggr_nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __new_line_std(struct outstate *os)</div><div class='add'>+static inline void __new_line_std(struct perf_stat_config *config, struct outstate *os)</div><div class='ctx'> {</div><div class='del'>-	fprintf(os-&gt;fh, "                                                 ");</div><div class='add'>+	fprintf(os-&gt;fh, "%*s", COUNTS_LEN + EVNAME_LEN + config-&gt;unit_width + 2, "");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void do_new_line_std(struct perf_stat_config *config,</div><div class='hunk'>@@ -450,7 +450,7 @@ static void do_new_line_std(struct perf_stat_config *config,</div><div class='ctx'> 	__new_line_std_csv(config, os);</div><div class='ctx'> 	if (config-&gt;aggr_mode == AGGR_NONE)</div><div class='ctx'> 		fprintf(os-&gt;fh, "        ");</div><div class='del'>-	__new_line_std(os);</div><div class='add'>+	__new_line_std(config, os);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void print_metric_std(struct perf_stat_config *config,</div><div class='hunk'>@@ -583,36 +583,13 @@ static void print_metricgroup_header_std(struct perf_stat_config *config,</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='ctx'> 	if (!metricgroup_name) {</div><div class='del'>-		__new_line_std(os);</div><div class='add'>+		__new_line_std(config, os);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	n = fprintf(config-&gt;output, " %*s", EVNAME_LEN, metricgroup_name);</div><div class='ctx'> </div><div class='del'>-	fprintf(config-&gt;output, "%*s", MGROUP_LEN - n - 1, "");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Filter out some columns that don't work well in metrics only mode */</div><div class='del'>-</div><div class='del'>-static bool valid_only_metric(const char *unit)</div><div class='del'>-{</div><div class='del'>-	if (!unit)</div><div class='del'>-		return false;</div><div class='del'>-	if (strstr(unit, "/sec") ||</div><div class='del'>-	    strstr(unit, "CPUs utilized"))</div><div class='del'>-		return false;</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *fixunit(char *buf, struct evsel *evsel,</div><div class='del'>-			   const char *unit)</div><div class='del'>-{</div><div class='del'>-	if (!strncmp(unit, "of all", 6)) {</div><div class='del'>-		snprintf(buf, 1024, "%s %s", evsel__name(evsel),</div><div class='del'>-			 unit);</div><div class='del'>-		return buf;</div><div class='del'>-	}</div><div class='del'>-	return unit;</div><div class='add'>+	fprintf(config-&gt;output, "%*s", MGROUP_LEN + config-&gt;unit_width + 2 - n, "");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void print_metric_only(struct perf_stat_config *config,</div><div class='hunk'>@@ -621,13 +598,12 @@ static void print_metric_only(struct perf_stat_config *config,</div><div class='ctx'> {</div><div class='ctx'> 	struct outstate *os = ctx;</div><div class='ctx'> 	FILE *out = os-&gt;fh;</div><div class='del'>-	char buf[1024], str[1024];</div><div class='add'>+	char str[1024];</div><div class='ctx'> 	unsigned mlen = config-&gt;metric_only_len;</div><div class='ctx'> 	const char *color = metric_threshold_classify__color(thresh);</div><div class='ctx'> </div><div class='del'>-	if (!valid_only_metric(unit))</div><div class='del'>-		return;</div><div class='del'>-	unit = fixunit(buf, os-&gt;evsel, unit);</div><div class='add'>+	if (!unit)</div><div class='add'>+		unit = "";</div><div class='ctx'> 	if (mlen &lt; strlen(unit))</div><div class='ctx'> 		mlen = strlen(unit) + 1;</div><div class='ctx'> </div><div class='hunk'>@@ -643,16 +619,15 @@ static void print_metric_only_csv(struct perf_stat_config *config __maybe_unused</div><div class='ctx'> 				  void *ctx,</div><div class='ctx'> 				  enum metric_threshold_classify thresh __maybe_unused,</div><div class='ctx'> 				  const char *fmt,</div><div class='del'>-				  const char *unit, double val)</div><div class='add'>+				  const char *unit __maybe_unused, double val)</div><div class='ctx'> {</div><div class='ctx'> 	struct outstate *os = ctx;</div><div class='ctx'> 	FILE *out = os-&gt;fh;</div><div class='ctx'> 	char buf[64], *vals, *ends;</div><div class='del'>-	char tbuf[1024];</div><div class='ctx'> </div><div class='del'>-	if (!valid_only_metric(unit))</div><div class='add'>+	if (!unit)</div><div class='ctx'> 		return;</div><div class='del'>-	unit = fixunit(tbuf, os-&gt;evsel, unit);</div><div class='add'>+</div><div class='ctx'> 	snprintf(buf, sizeof(buf), fmt ?: "", val);</div><div class='ctx'> 	ends = vals = skip_spaces(buf);</div><div class='ctx'> 	while (isdigit(*ends) || *ends == '.')</div><div class='hunk'>@@ -670,13 +645,9 @@ static void print_metric_only_json(struct perf_stat_config *config __maybe_unuse</div><div class='ctx'> {</div><div class='ctx'> 	struct outstate *os = ctx;</div><div class='ctx'> 	char buf[64], *ends;</div><div class='del'>-	char tbuf[1024];</div><div class='ctx'> 	const char *vals;</div><div class='ctx'> </div><div class='del'>-	if (!valid_only_metric(unit))</div><div class='del'>-		return;</div><div class='del'>-	unit = fixunit(tbuf, os-&gt;evsel, unit);</div><div class='del'>-	if (!unit[0])</div><div class='add'>+	if (!unit || !unit[0])</div><div class='ctx'> 		return;</div><div class='ctx'> 	snprintf(buf, sizeof(buf), fmt ?: "", val);</div><div class='ctx'> 	vals = ends = skip_spaces(buf);</div><div class='hunk'>@@ -695,7 +666,6 @@ static void print_metric_header(struct perf_stat_config *config,</div><div class='ctx'> 				const char *unit, double val __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct outstate *os = ctx;</div><div class='del'>-	char tbuf[1024];</div><div class='ctx'> </div><div class='ctx'> 	/* In case of iostat, print metric header for first root port only */</div><div class='ctx'> 	if (config-&gt;iostat_run &amp;&amp;</div><div class='hunk'>@@ -705,9 +675,8 @@ static void print_metric_header(struct perf_stat_config *config,</div><div class='ctx'> 	if (os-&gt;evsel-&gt;cgrp != os-&gt;cgrp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!valid_only_metric(unit))</div><div class='add'>+	if (!unit)</div><div class='ctx'> 		return;</div><div class='del'>-	unit = fixunit(tbuf, os-&gt;evsel, unit);</div><div class='ctx'> </div><div class='ctx'> 	if (config-&gt;json_output)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -872,7 +841,7 @@ static void printout(struct perf_stat_config *config, struct outstate *os,</div><div class='ctx'> 	out.ctx = os;</div><div class='ctx'> 	out.force_header = false;</div><div class='ctx'> </div><div class='del'>-	if (!config-&gt;metric_only &amp;&amp; !counter-&gt;default_metricgroup) {</div><div class='add'>+	if (!config-&gt;metric_only &amp;&amp; (!counter-&gt;default_metricgroup || counter-&gt;default_show_events)) {</div><div class='ctx'> 		abs_printout(config, os, os-&gt;id, os-&gt;aggr_nr, counter, uval, ok);</div><div class='ctx'> </div><div class='ctx'> 		print_noise(config, os, counter, noise, /*before_metric=*/true);</div><div class='hunk'>@@ -880,7 +849,7 @@ static void printout(struct perf_stat_config *config, struct outstate *os,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ok) {</div><div class='del'>-		if (!config-&gt;metric_only &amp;&amp; counter-&gt;default_metricgroup) {</div><div class='add'>+		if (!config-&gt;metric_only &amp;&amp; counter-&gt;default_metricgroup &amp;&amp; !counter-&gt;default_show_events) {</div><div class='ctx'> 			void *from = NULL;</div><div class='ctx'> </div><div class='ctx'> 			aggr_printout(config, os, os-&gt;evsel, os-&gt;id, os-&gt;aggr_nr);</div><div class='hunk'>@@ -902,7 +871,7 @@ static void printout(struct perf_stat_config *config, struct outstate *os,</div><div class='ctx'> 										 &amp;num, from, &amp;out);</div><div class='ctx'> 			} while (from != NULL);</div><div class='ctx'> 		} else {</div><div class='del'>-			perf_stat__print_shadow_stats(config, counter, uval, aggr_idx, &amp;out);</div><div class='add'>+			perf_stat__print_shadow_stats(config, counter, aggr_idx, &amp;out);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pm(config, os, METRIC_THRESHOLD_UNKNOWN, /*format=*/NULL, /*unit=*/NULL, /*val=*/0);</div><div class='hunk'>@@ -944,6 +913,9 @@ static bool should_skip_zero_counter(struct perf_stat_config *config,</div><div class='ctx'> 	if (verbose == 0 &amp;&amp; counter-&gt;skippable &amp;&amp; !counter-&gt;supported)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	/* Metric only counts won't be displayed but the metric wants to be computed. */</div><div class='add'>+	if (config-&gt;metric_only)</div><div class='add'>+		return false;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Skip value 0 when enabling --per-thread globally,</div><div class='ctx'> 	 * otherwise it will have too many 0 output.</div><div class='hunk'>@@ -1274,7 +1246,7 @@ static void print_metric_headers(struct perf_stat_config *config,</div><div class='ctx'> </div><div class='ctx'> 		os.evsel = counter;</div><div class='ctx'> </div><div class='del'>-		perf_stat__print_shadow_stats(config, counter, 0, 0, &amp;out);</div><div class='add'>+		perf_stat__print_shadow_stats(config, counter, /*aggr_idx=*/0, &amp;out);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!config-&gt;json_output)</div><div class='head'>diff --git a/tools/perf/util/stat-shadow.c b/tools/perf/util/stat-shadow.c<br/>index abaf6b579bfc..9c83f7d96caa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat-shadow.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat-shadow.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat-shadow.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/stat-shadow.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;math.h&gt;</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include "evsel.h"</div><div class='hunk'>@@ -17,361 +18,32 @@</div><div class='ctx'> #include "util/hashmap.h"</div><div class='ctx'> #include "tool_pmu.h"</div><div class='ctx'> </div><div class='del'>-struct stats walltime_nsecs_stats;</div><div class='del'>-struct rusage_stats ru_stats;</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	CTX_BIT_USER	= 1 &lt;&lt; 0,</div><div class='del'>-	CTX_BIT_KERNEL	= 1 &lt;&lt; 1,</div><div class='del'>-	CTX_BIT_HV	= 1 &lt;&lt; 2,</div><div class='del'>-	CTX_BIT_HOST	= 1 &lt;&lt; 3,</div><div class='del'>-	CTX_BIT_IDLE	= 1 &lt;&lt; 4,</div><div class='del'>-	CTX_BIT_MAX	= 1 &lt;&lt; 5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum stat_type {</div><div class='del'>-	STAT_NONE = 0,</div><div class='del'>-	STAT_NSECS,</div><div class='del'>-	STAT_CYCLES,</div><div class='del'>-	STAT_INSTRUCTIONS,</div><div class='del'>-	STAT_STALLED_CYCLES_FRONT,</div><div class='del'>-	STAT_STALLED_CYCLES_BACK,</div><div class='del'>-	STAT_BRANCHES,</div><div class='del'>-	STAT_BRANCH_MISS,</div><div class='del'>-	STAT_CACHE_REFS,</div><div class='del'>-	STAT_CACHE_MISSES,</div><div class='del'>-	STAT_L1_DCACHE,</div><div class='del'>-	STAT_L1_ICACHE,</div><div class='del'>-	STAT_LL_CACHE,</div><div class='del'>-	STAT_ITLB_CACHE,</div><div class='del'>-	STAT_DTLB_CACHE,</div><div class='del'>-	STAT_L1D_MISS,</div><div class='del'>-	STAT_L1I_MISS,</div><div class='del'>-	STAT_LL_MISS,</div><div class='del'>-	STAT_DTLB_MISS,</div><div class='del'>-	STAT_ITLB_MISS,</div><div class='del'>-	STAT_MAX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int evsel_context(const struct evsel *evsel)</div><div class='add'>+static bool tool_pmu__is_time_event(const struct perf_stat_config *config,</div><div class='add'>+				   const struct evsel *evsel, int *tool_aggr_idx)</div><div class='ctx'> {</div><div class='del'>-	int ctx = 0;</div><div class='del'>-</div><div class='del'>-	if (evsel-&gt;core.attr.exclude_kernel)</div><div class='del'>-		ctx |= CTX_BIT_KERNEL;</div><div class='del'>-	if (evsel-&gt;core.attr.exclude_user)</div><div class='del'>-		ctx |= CTX_BIT_USER;</div><div class='del'>-	if (evsel-&gt;core.attr.exclude_hv)</div><div class='del'>-		ctx |= CTX_BIT_HV;</div><div class='del'>-	if (evsel-&gt;core.attr.exclude_host)</div><div class='del'>-		ctx |= CTX_BIT_HOST;</div><div class='del'>-	if (evsel-&gt;core.attr.exclude_idle)</div><div class='del'>-		ctx |= CTX_BIT_IDLE;</div><div class='del'>-</div><div class='del'>-	return ctx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void perf_stat__reset_shadow_stats(void)</div><div class='del'>-{</div><div class='del'>-	memset(&amp;walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));</div><div class='del'>-	memset(&amp;ru_stats, 0, sizeof(ru_stats));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum stat_type evsel__stat_type(struct evsel *evsel)</div><div class='del'>-{</div><div class='del'>-	/* Fake perf_hw_cache_op_id values for use with evsel__match. */</div><div class='del'>-	u64 PERF_COUNT_hw_cache_l1d_miss = PERF_COUNT_HW_CACHE_L1D |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_OP_READ) &lt;&lt; 8) |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_RESULT_MISS) &lt;&lt; 16);</div><div class='del'>-	u64 PERF_COUNT_hw_cache_l1i_miss = PERF_COUNT_HW_CACHE_L1I |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_OP_READ) &lt;&lt; 8) |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_RESULT_MISS) &lt;&lt; 16);</div><div class='del'>-	u64 PERF_COUNT_hw_cache_ll_miss = PERF_COUNT_HW_CACHE_LL |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_OP_READ) &lt;&lt; 8) |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_RESULT_MISS) &lt;&lt; 16);</div><div class='del'>-	u64 PERF_COUNT_hw_cache_dtlb_miss = PERF_COUNT_HW_CACHE_DTLB |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_OP_READ) &lt;&lt; 8) |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_RESULT_MISS) &lt;&lt; 16);</div><div class='del'>-	u64 PERF_COUNT_hw_cache_itlb_miss = PERF_COUNT_HW_CACHE_ITLB |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_OP_READ) &lt;&lt; 8) |</div><div class='del'>-		((PERF_COUNT_HW_CACHE_RESULT_MISS) &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	if (evsel__is_clock(evsel))</div><div class='del'>-		return STAT_NSECS;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_CPU_CYCLES))</div><div class='del'>-		return STAT_CYCLES;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS))</div><div class='del'>-		return STAT_INSTRUCTIONS;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND))</div><div class='del'>-		return STAT_STALLED_CYCLES_FRONT;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND))</div><div class='del'>-		return STAT_STALLED_CYCLES_BACK;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_BRANCH_INSTRUCTIONS))</div><div class='del'>-		return STAT_BRANCHES;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES))</div><div class='del'>-		return STAT_BRANCH_MISS;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_CACHE_REFERENCES))</div><div class='del'>-		return STAT_CACHE_REFS;</div><div class='del'>-	else if (evsel__match(evsel, HARDWARE, HW_CACHE_MISSES))</div><div class='del'>-		return STAT_CACHE_MISSES;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, HW_CACHE_L1D))</div><div class='del'>-		return STAT_L1_DCACHE;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, HW_CACHE_L1I))</div><div class='del'>-		return STAT_L1_ICACHE;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, HW_CACHE_LL))</div><div class='del'>-		return STAT_LL_CACHE;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, HW_CACHE_DTLB))</div><div class='del'>-		return STAT_DTLB_CACHE;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, HW_CACHE_ITLB))</div><div class='del'>-		return STAT_ITLB_CACHE;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, hw_cache_l1d_miss))</div><div class='del'>-		return STAT_L1D_MISS;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, hw_cache_l1i_miss))</div><div class='del'>-		return STAT_L1I_MISS;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, hw_cache_ll_miss))</div><div class='del'>-		return STAT_LL_MISS;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, hw_cache_dtlb_miss))</div><div class='del'>-		return STAT_DTLB_MISS;</div><div class='del'>-	else if (evsel__match(evsel, HW_CACHE, hw_cache_itlb_miss))</div><div class='del'>-		return STAT_ITLB_MISS;</div><div class='del'>-	return STAT_NONE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum metric_threshold_classify get_ratio_thresh(const double ratios[3], double val)</div><div class='del'>-{</div><div class='del'>-	assert(ratios[0] &gt; ratios[1]);</div><div class='del'>-	assert(ratios[1] &gt; ratios[2]);</div><div class='del'>-</div><div class='del'>-	return val &gt; ratios[1]</div><div class='del'>-		? (val &gt; ratios[0] ? METRIC_THRESHOLD_BAD : METRIC_THRESHOLD_NEARLY_BAD)</div><div class='del'>-		: (val &gt; ratios[2] ? METRIC_THRESHOLD_LESS_GOOD : METRIC_THRESHOLD_GOOD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static double find_stat(const struct evsel *evsel, int aggr_idx, enum stat_type type)</div><div class='del'>-{</div><div class='del'>-	struct evsel *cur;</div><div class='del'>-	int evsel_ctx = evsel_context(evsel);</div><div class='del'>-	struct perf_pmu *evsel_pmu = evsel__find_pmu(evsel);</div><div class='del'>-</div><div class='del'>-	evlist__for_each_entry(evsel-&gt;evlist, cur) {</div><div class='del'>-		struct perf_stat_aggr *aggr;</div><div class='del'>-</div><div class='del'>-		/* Ignore the evsel that is being searched from. */</div><div class='del'>-		if (evsel == cur)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Ignore evsels that are part of different groups. */</div><div class='del'>-		if (evsel-&gt;core.leader-&gt;nr_members &gt; 1 &amp;&amp;</div><div class='del'>-		    evsel-&gt;core.leader != cur-&gt;core.leader)</div><div class='del'>-			continue;</div><div class='del'>-		/* Ignore evsels with mismatched modifiers. */</div><div class='del'>-		if (evsel_ctx != evsel_context(cur))</div><div class='del'>-			continue;</div><div class='del'>-		/* Ignore if not the cgroup we're looking for. */</div><div class='del'>-		if (evsel-&gt;cgrp != cur-&gt;cgrp)</div><div class='del'>-			continue;</div><div class='del'>-		/* Ignore if not the stat we're looking for. */</div><div class='del'>-		if (type != evsel__stat_type(cur))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Except the SW CLOCK events,</div><div class='del'>-		 * ignore if not the PMU we're looking for.</div><div class='del'>-		 */</div><div class='del'>-		if ((type != STAT_NSECS) &amp;&amp; (evsel_pmu != evsel__find_pmu(cur)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		aggr = &amp;cur-&gt;stats-&gt;aggr[aggr_idx];</div><div class='del'>-		if (type == STAT_NSECS)</div><div class='del'>-			return aggr-&gt;counts.val;</div><div class='del'>-		return aggr-&gt;counts.val * cur-&gt;scale;</div><div class='del'>-	}</div><div class='del'>-	return 0.0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_ratio(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel, int aggr_idx,</div><div class='del'>-			double numerator, struct perf_stat_output_ctx *out,</div><div class='del'>-			enum stat_type denominator_type,</div><div class='del'>-			const double thresh_ratios[3], const char *_unit)</div><div class='del'>-{</div><div class='del'>-	double denominator = find_stat(evsel, aggr_idx, denominator_type);</div><div class='del'>-	double ratio = 0;</div><div class='del'>-	enum metric_threshold_classify thresh = METRIC_THRESHOLD_UNKNOWN;</div><div class='del'>-	const char *fmt = NULL;</div><div class='del'>-	const char *unit = NULL;</div><div class='del'>-</div><div class='del'>-	if (numerator &amp;&amp; denominator) {</div><div class='del'>-		ratio = numerator / denominator * 100.0;</div><div class='del'>-		thresh = get_ratio_thresh(thresh_ratios, ratio);</div><div class='del'>-		fmt = "%7.2f%%";</div><div class='del'>-		unit = _unit;</div><div class='del'>-	}</div><div class='del'>-	out-&gt;print_metric(config, out-&gt;ctx, thresh, fmt, unit, ratio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_stalled_cycles_front(struct perf_stat_config *config,</div><div class='del'>-				const struct evsel *evsel,</div><div class='del'>-				int aggr_idx, double stalled,</div><div class='del'>-				struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {50.0, 30.0, 10.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, stalled, out, STAT_CYCLES, thresh_ratios,</div><div class='del'>-		    "frontend cycles idle");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_stalled_cycles_back(struct perf_stat_config *config,</div><div class='del'>-				const struct evsel *evsel,</div><div class='del'>-				int aggr_idx, double stalled,</div><div class='del'>-				struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {75.0, 50.0, 20.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, stalled, out, STAT_CYCLES, thresh_ratios,</div><div class='del'>-		    "backend cycles idle");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_branch_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_BRANCHES, thresh_ratios,</div><div class='del'>-		    "of all branches");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_l1d_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_L1_DCACHE, thresh_ratios,</div><div class='del'>-		    "of all L1-dcache accesses");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_l1i_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_L1_ICACHE, thresh_ratios,</div><div class='del'>-		    "of all L1-icache accesses");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_ll_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_LL_CACHE, thresh_ratios,</div><div class='del'>-		    "of all LL-cache accesses");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_dtlb_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_DTLB_CACHE, thresh_ratios,</div><div class='del'>-		    "of all dTLB cache accesses");</div><div class='del'>-}</div><div class='add'>+	enum tool_pmu_event event = evsel__tool_event(evsel);</div><div class='add'>+	int aggr_idx;</div><div class='ctx'> </div><div class='del'>-static void print_itlb_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_ITLB_CACHE, thresh_ratios,</div><div class='del'>-		    "of all iTLB cache accesses");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_cache_miss(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double misses,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	const double thresh_ratios[3] = {20.0, 10.0, 5.0};</div><div class='del'>-</div><div class='del'>-	print_ratio(config, evsel, aggr_idx, misses, out, STAT_CACHE_REFS, thresh_ratios,</div><div class='del'>-		    "of all cache refs");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_instructions(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double instructions,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	print_metric_t print_metric = out-&gt;print_metric;</div><div class='del'>-	void *ctxp = out-&gt;ctx;</div><div class='del'>-	double cycles = find_stat(evsel, aggr_idx, STAT_CYCLES);</div><div class='del'>-	double max_stalled = max(find_stat(evsel, aggr_idx, STAT_STALLED_CYCLES_FRONT),</div><div class='del'>-				find_stat(evsel, aggr_idx, STAT_STALLED_CYCLES_BACK));</div><div class='del'>-</div><div class='del'>-	if (cycles) {</div><div class='del'>-		print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, "%7.2f ",</div><div class='del'>-			     "insn per cycle", instructions / cycles);</div><div class='del'>-	} else {</div><div class='del'>-		print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, /*fmt=*/NULL,</div><div class='del'>-			     "insn per cycle", 0);</div><div class='del'>-	}</div><div class='del'>-	if (max_stalled &amp;&amp; instructions) {</div><div class='del'>-		if (out-&gt;new_line)</div><div class='del'>-			out-&gt;new_line(config, ctxp);</div><div class='del'>-		print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, "%7.2f ",</div><div class='del'>-			     "stalled cycles per insn", max_stalled / instructions);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_cycles(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx, double cycles,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	double nsecs = find_stat(evsel, aggr_idx, STAT_NSECS);</div><div class='del'>-</div><div class='del'>-	if (cycles &amp;&amp; nsecs) {</div><div class='del'>-		double ratio = cycles / nsecs;</div><div class='del'>-</div><div class='del'>-		out-&gt;print_metric(config, out-&gt;ctx, METRIC_THRESHOLD_UNKNOWN, "%8.3f",</div><div class='del'>-				  "GHz", ratio);</div><div class='del'>-	} else {</div><div class='del'>-		out-&gt;print_metric(config, out-&gt;ctx, METRIC_THRESHOLD_UNKNOWN, /*fmt=*/NULL,</div><div class='del'>-				  "GHz", 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_nsecs(struct perf_stat_config *config,</div><div class='del'>-			const struct evsel *evsel,</div><div class='del'>-			int aggr_idx __maybe_unused, double nsecs,</div><div class='del'>-			struct perf_stat_output_ctx *out)</div><div class='del'>-{</div><div class='del'>-	print_metric_t print_metric = out-&gt;print_metric;</div><div class='del'>-	void *ctxp = out-&gt;ctx;</div><div class='del'>-	double wall_time = avg_stats(&amp;walltime_nsecs_stats);</div><div class='add'>+	if (event != TOOL_PMU__EVENT_DURATION_TIME &amp;&amp;</div><div class='add'>+	    event != TOOL_PMU__EVENT_USER_TIME &amp;&amp;</div><div class='add'>+	    event != TOOL_PMU__EVENT_SYSTEM_TIME)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	if (wall_time) {</div><div class='del'>-		print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, "%8.3f", "CPUs utilized",</div><div class='del'>-			nsecs / (wall_time * evsel-&gt;scale));</div><div class='del'>-	} else {</div><div class='del'>-		print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, /*fmt=*/NULL,</div><div class='del'>-			     "CPUs utilized", 0);</div><div class='add'>+	if (config) {</div><div class='add'>+		cpu_aggr_map__for_each_idx(aggr_idx, config-&gt;aggr_map) {</div><div class='add'>+			if (config-&gt;aggr_map-&gt;map[aggr_idx].cpu.cpu == 0) {</div><div class='add'>+				*tool_aggr_idx = aggr_idx;</div><div class='add'>+				return true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		pr_debug("Unexpected CPU0 missing in aggregation for tool event.\n");</div><div class='ctx'> 	}</div><div class='add'>+	*tool_aggr_idx = 0; /* Assume the first aggregation index works. */</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int prepare_metric(const struct metric_expr *mexp,</div><div class='add'>+static int prepare_metric(struct perf_stat_config *config,</div><div class='add'>+			  const struct metric_expr *mexp,</div><div class='ctx'> 			  const struct evsel *evsel,</div><div class='ctx'> 			  struct expr_parse_ctx *pctx,</div><div class='ctx'> 			  int aggr_idx)</div><div class='hunk'>@@ -381,91 +53,51 @@ static int prepare_metric(const struct metric_expr *mexp,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; metric_events[i]; i++) {</div><div class='add'>+		int source_count = 0, tool_aggr_idx;</div><div class='add'>+		bool is_tool_time =</div><div class='add'>+			tool_pmu__is_time_event(config, metric_events[i], &amp;tool_aggr_idx);</div><div class='add'>+		struct perf_stat_evsel *ps = metric_events[i]-&gt;stats;</div><div class='add'>+		struct perf_stat_aggr *aggr;</div><div class='ctx'> 		char *n;</div><div class='ctx'> 		double val;</div><div class='del'>-		int source_count = 0;</div><div class='del'>-</div><div class='del'>-		if (evsel__is_tool(metric_events[i])) {</div><div class='del'>-			struct stats *stats;</div><div class='del'>-			double scale;</div><div class='ctx'> </div><div class='del'>-			switch (evsel__tool_event(metric_events[i])) {</div><div class='del'>-			case TOOL_PMU__EVENT_DURATION_TIME:</div><div class='del'>-				stats = &amp;walltime_nsecs_stats;</div><div class='del'>-				scale = 1e-9;</div><div class='del'>-				break;</div><div class='del'>-			case TOOL_PMU__EVENT_USER_TIME:</div><div class='del'>-				stats = &amp;ru_stats.ru_utime_usec_stat;</div><div class='del'>-				scale = 1e-6;</div><div class='del'>-				break;</div><div class='del'>-			case TOOL_PMU__EVENT_SYSTEM_TIME:</div><div class='del'>-				stats = &amp;ru_stats.ru_stime_usec_stat;</div><div class='del'>-				scale = 1e-6;</div><div class='add'>+		/*</div><div class='add'>+		 * If there are multiple uncore PMUs and we're not reading the</div><div class='add'>+		 * leader's stats, determine the stats for the appropriate</div><div class='add'>+		 * uncore PMU.</div><div class='add'>+		 */</div><div class='add'>+		if (evsel &amp;&amp; evsel-&gt;metric_leader &amp;&amp;</div><div class='add'>+		    evsel-&gt;pmu != evsel-&gt;metric_leader-&gt;pmu &amp;&amp;</div><div class='add'>+		    mexp-&gt;metric_events[i]-&gt;pmu == evsel-&gt;metric_leader-&gt;pmu) {</div><div class='add'>+			struct evsel *pos;</div><div class='add'>+</div><div class='add'>+			evlist__for_each_entry(evsel-&gt;evlist, pos) {</div><div class='add'>+				if (pos-&gt;pmu != evsel-&gt;pmu)</div><div class='add'>+					continue;</div><div class='add'>+				if (pos-&gt;metric_leader != mexp-&gt;metric_events[i])</div><div class='add'>+					continue;</div><div class='add'>+				ps = pos-&gt;stats;</div><div class='add'>+				source_count = 1;</div><div class='ctx'> 				break;</div><div class='del'>-			case TOOL_PMU__EVENT_NONE:</div><div class='del'>-				pr_err("Invalid tool event 'none'");</div><div class='del'>-				abort();</div><div class='del'>-			case TOOL_PMU__EVENT_MAX:</div><div class='del'>-				pr_err("Invalid tool event 'max'");</div><div class='del'>-				abort();</div><div class='del'>-			case TOOL_PMU__EVENT_HAS_PMEM:</div><div class='del'>-			case TOOL_PMU__EVENT_NUM_CORES:</div><div class='del'>-			case TOOL_PMU__EVENT_NUM_CPUS:</div><div class='del'>-			case TOOL_PMU__EVENT_NUM_CPUS_ONLINE:</div><div class='del'>-			case TOOL_PMU__EVENT_NUM_DIES:</div><div class='del'>-			case TOOL_PMU__EVENT_NUM_PACKAGES:</div><div class='del'>-			case TOOL_PMU__EVENT_SLOTS:</div><div class='del'>-			case TOOL_PMU__EVENT_SMT_ON:</div><div class='del'>-			case TOOL_PMU__EVENT_SYSTEM_TSC_FREQ:</div><div class='del'>-			default:</div><div class='del'>-				pr_err("Unexpected tool event '%s'", evsel__name(metric_events[i]));</div><div class='del'>-				abort();</div><div class='ctx'> 			}</div><div class='del'>-			val = avg_stats(stats) * scale;</div><div class='del'>-			source_count = 1;</div><div class='del'>-		} else {</div><div class='del'>-			struct perf_stat_evsel *ps = metric_events[i]-&gt;stats;</div><div class='del'>-			struct perf_stat_aggr *aggr;</div><div class='del'>-</div><div class='add'>+		}</div><div class='add'>+		/* Time events are always on CPU0, the first aggregation index. */</div><div class='add'>+		aggr = &amp;ps-&gt;aggr[is_tool_time ? tool_aggr_idx : aggr_idx];</div><div class='add'>+		if (!aggr || !metric_events[i]-&gt;supported) {</div><div class='ctx'> 			/*</div><div class='del'>-			 * If there are multiple uncore PMUs and we're not</div><div class='del'>-			 * reading the leader's stats, determine the stats for</div><div class='del'>-			 * the appropriate uncore PMU.</div><div class='add'>+			 * Not supported events will have a count of 0, which</div><div class='add'>+			 * can be confusing in a metric. Explicitly set the</div><div class='add'>+			 * value to NAN. Not counted events (enable time of 0)</div><div class='add'>+			 * are read as 0.</div><div class='ctx'> 			 */</div><div class='del'>-			if (evsel &amp;&amp; evsel-&gt;metric_leader &amp;&amp;</div><div class='del'>-			    evsel-&gt;pmu != evsel-&gt;metric_leader-&gt;pmu &amp;&amp;</div><div class='del'>-			    mexp-&gt;metric_events[i]-&gt;pmu == evsel-&gt;metric_leader-&gt;pmu) {</div><div class='del'>-				struct evsel *pos;</div><div class='del'>-</div><div class='del'>-				evlist__for_each_entry(evsel-&gt;evlist, pos) {</div><div class='del'>-					if (pos-&gt;pmu != evsel-&gt;pmu)</div><div class='del'>-						continue;</div><div class='del'>-					if (pos-&gt;metric_leader != mexp-&gt;metric_events[i])</div><div class='del'>-						continue;</div><div class='del'>-					ps = pos-&gt;stats;</div><div class='del'>-					source_count = 1;</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			aggr = &amp;ps-&gt;aggr[aggr_idx];</div><div class='del'>-			if (!aggr)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			if (!metric_events[i]-&gt;supported) {</div><div class='del'>-				/*</div><div class='del'>-				 * Not supported events will have a count of 0,</div><div class='del'>-				 * which can be confusing in a</div><div class='del'>-				 * metric. Explicitly set the value to NAN. Not</div><div class='del'>-				 * counted events (enable time of 0) are read as</div><div class='del'>-				 * 0.</div><div class='del'>-				 */</div><div class='del'>-				val = NAN;</div><div class='del'>-				source_count = 0;</div><div class='del'>-			} else {</div><div class='del'>-				val = aggr-&gt;counts.val;</div><div class='del'>-				if (!source_count)</div><div class='del'>-					source_count = evsel__source_count(metric_events[i]);</div><div class='del'>-			}</div><div class='add'>+			val = NAN;</div><div class='add'>+			source_count = 0;</div><div class='add'>+		} else {</div><div class='add'>+			val = aggr-&gt;counts.val;</div><div class='add'>+			if (is_tool_time)</div><div class='add'>+				val *= 1e-9; /* Convert time event nanoseconds to seconds. */</div><div class='add'>+			if (!source_count)</div><div class='add'>+				source_count = evsel__source_count(metric_events[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 		n = strdup(evsel__metric_id(metric_events[i]));</div><div class='ctx'> 		if (!n)</div><div class='hunk'>@@ -511,7 +143,7 @@ static void generic_metric(struct perf_stat_config *config,</div><div class='ctx'> 		pctx-&gt;sctx.user_requested_cpu_list = strdup(config-&gt;user_requested_cpu_list);</div><div class='ctx'> 	pctx-&gt;sctx.runtime = runtime;</div><div class='ctx'> 	pctx-&gt;sctx.system_wide = config-&gt;system_wide;</div><div class='del'>-	i = prepare_metric(mexp, evsel, pctx, aggr_idx);</div><div class='add'>+	i = prepare_metric(config, mexp, evsel, pctx, aggr_idx);</div><div class='ctx'> 	if (i &lt; 0) {</div><div class='ctx'> 		expr__ctx_free(pctx);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -572,7 +204,7 @@ double test_generic_metric(struct metric_expr *mexp, int aggr_idx)</div><div class='ctx'> 	if (!pctx)</div><div class='ctx'> 		return NAN;</div><div class='ctx'> </div><div class='del'>-	if (prepare_metric(mexp, /*evsel=*/NULL, pctx, aggr_idx) &lt; 0)</div><div class='add'>+	if (prepare_metric(/*config=*/NULL, mexp, /*evsel=*/NULL, pctx, aggr_idx) &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (expr__parse(&amp;ratio, pctx, mexp-&gt;metric_expr))</div><div class='hunk'>@@ -601,11 +233,9 @@ static void perf_stat__print_metricgroup_header(struct perf_stat_config *config,</div><div class='ctx'> 	 * event. Only align with other metics from</div><div class='ctx'> 	 * different metric events.</div><div class='ctx'> 	 */</div><div class='del'>-	if (last_name &amp;&amp; !strcmp(last_name, name)) {</div><div class='del'>-		if (!need_full_name || last_pmu != evsel-&gt;pmu) {</div><div class='del'>-			out-&gt;print_metricgroup_header(config, ctxp, NULL);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	if (last_name &amp;&amp; !strcmp(last_name, name) &amp;&amp; last_pmu == evsel-&gt;pmu) {</div><div class='add'>+		out-&gt;print_metricgroup_header(config, ctxp, NULL);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (need_full_name &amp;&amp; evsel-&gt;pmu)</div><div class='hunk'>@@ -665,7 +295,7 @@ void *perf_stat__print_shadow_stats_metricgroup(struct perf_stat_config *config,</div><div class='ctx'> 			if (strcmp(name, mexp-&gt;default_metricgroup_name))</div><div class='ctx'> 				return (void *)mexp;</div><div class='ctx'> 			/* Only print the name of the metricgroup once */</div><div class='del'>-			if (!header_printed) {</div><div class='add'>+			if (!header_printed &amp;&amp; !evsel-&gt;default_show_events) {</div><div class='ctx'> 				header_printed = true;</div><div class='ctx'> 				perf_stat__print_metricgroup_header(config, evsel, ctxp,</div><div class='ctx'> 								    name, out);</div><div class='hunk'>@@ -682,56 +312,15 @@ void *perf_stat__print_shadow_stats_metricgroup(struct perf_stat_config *config,</div><div class='ctx'> </div><div class='ctx'> void perf_stat__print_shadow_stats(struct perf_stat_config *config,</div><div class='ctx'> 				   struct evsel *evsel,</div><div class='del'>-				   double avg, int aggr_idx,</div><div class='add'>+				   int aggr_idx,</div><div class='ctx'> 				   struct perf_stat_output_ctx *out)</div><div class='ctx'> {</div><div class='del'>-	typedef void (*stat_print_function_t)(struct perf_stat_config *config,</div><div class='del'>-					const struct evsel *evsel,</div><div class='del'>-					int aggr_idx, double misses,</div><div class='del'>-					struct perf_stat_output_ctx *out);</div><div class='del'>-	static const stat_print_function_t stat_print_function[STAT_MAX] = {</div><div class='del'>-		[STAT_INSTRUCTIONS] = print_instructions,</div><div class='del'>-		[STAT_BRANCH_MISS] = print_branch_miss,</div><div class='del'>-		[STAT_L1D_MISS] = print_l1d_miss,</div><div class='del'>-		[STAT_L1I_MISS] = print_l1i_miss,</div><div class='del'>-		[STAT_DTLB_MISS] = print_dtlb_miss,</div><div class='del'>-		[STAT_ITLB_MISS] = print_itlb_miss,</div><div class='del'>-		[STAT_LL_MISS] = print_ll_miss,</div><div class='del'>-		[STAT_CACHE_MISSES] = print_cache_miss,</div><div class='del'>-		[STAT_STALLED_CYCLES_FRONT] = print_stalled_cycles_front,</div><div class='del'>-		[STAT_STALLED_CYCLES_BACK] = print_stalled_cycles_back,</div><div class='del'>-		[STAT_CYCLES] = print_cycles,</div><div class='del'>-		[STAT_NSECS] = print_nsecs,</div><div class='del'>-	};</div><div class='ctx'> 	print_metric_t print_metric = out-&gt;print_metric;</div><div class='ctx'> 	void *ctxp = out-&gt;ctx;</div><div class='del'>-	int num = 1;</div><div class='add'>+	int num = 0;</div><div class='ctx'> </div><div class='del'>-	if (config-&gt;iostat_run) {</div><div class='add'>+	if (config-&gt;iostat_run)</div><div class='ctx'> 		iostat_print_metric(config, evsel, out);</div><div class='del'>-	} else {</div><div class='del'>-		stat_print_function_t fn = stat_print_function[evsel__stat_type(evsel)];</div><div class='del'>-</div><div class='del'>-		if (fn)</div><div class='del'>-			fn(config, evsel, aggr_idx, avg, out);</div><div class='del'>-		else {</div><div class='del'>-			double nsecs =	find_stat(evsel, aggr_idx, STAT_NSECS);</div><div class='del'>-</div><div class='del'>-			if (nsecs) {</div><div class='del'>-				char unit = ' ';</div><div class='del'>-				char unit_buf[10] = "/sec";</div><div class='del'>-				double ratio = convert_unit_double(1000000000.0 * avg / nsecs,</div><div class='del'>-								   &amp;unit);</div><div class='del'>-</div><div class='del'>-				if (unit != ' ')</div><div class='del'>-					snprintf(unit_buf, sizeof(unit_buf), "%c/sec", unit);</div><div class='del'>-				print_metric(config, ctxp, METRIC_THRESHOLD_UNKNOWN, "%8.3f",</div><div class='del'>-					     unit_buf, ratio);</div><div class='del'>-			} else {</div><div class='del'>-				num = 0;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	perf_stat__print_shadow_stats_metricgroup(config, evsel, aggr_idx,</div><div class='ctx'> 						  &amp;num, NULL, out);</div><div class='head'>diff --git a/tools/perf/util/stat.c b/tools/perf/util/stat.c<br/>index 50b1a92d16df..976a06e63252 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/stat.c</a></div><div class='hunk'>@@ -645,7 +645,8 @@ void perf_stat_process_percore(struct perf_stat_config *config, struct evlist *e</div><div class='ctx'> 		evsel__process_percore(evsel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int perf_event__process_stat_event(struct perf_session *session,</div><div class='add'>+int perf_event__process_stat_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				   struct perf_session *session,</div><div class='ctx'> 				   union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_counts_values count, *ptr;</div><div class='hunk'>@@ -716,59 +717,3 @@ size_t perf_event__fprintf_stat_config(union perf_event *event, FILE *fp)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int create_perf_stat_counter(struct evsel *evsel,</div><div class='del'>-			     struct perf_stat_config *config,</div><div class='del'>-			     struct target *target,</div><div class='del'>-			     int cpu_map_idx)</div><div class='del'>-{</div><div class='del'>-	struct perf_event_attr *attr = &amp;evsel-&gt;core.attr;</div><div class='del'>-	struct evsel *leader = evsel__leader(evsel);</div><div class='del'>-</div><div class='del'>-	attr-&gt;read_format = PERF_FORMAT_TOTAL_TIME_ENABLED |</div><div class='del'>-			    PERF_FORMAT_TOTAL_TIME_RUNNING;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The event is part of non trivial group, let's enable</div><div class='del'>-	 * the group read (for leader) and ID retrieval for all</div><div class='del'>-	 * members.</div><div class='del'>-	 */</div><div class='del'>-	if (leader-&gt;core.nr_members &gt; 1)</div><div class='del'>-		attr-&gt;read_format |= PERF_FORMAT_ID|PERF_FORMAT_GROUP;</div><div class='del'>-</div><div class='del'>-	attr-&gt;inherit = !config-&gt;no_inherit &amp;&amp; list_empty(&amp;evsel-&gt;bpf_counter_list);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Some events get initialized with sample_(period/type) set,</div><div class='del'>-	 * like tracepoints. Clear it up for counting.</div><div class='del'>-	 */</div><div class='del'>-	attr-&gt;sample_period = 0;</div><div class='del'>-</div><div class='del'>-	if (config-&gt;identifier)</div><div class='del'>-		attr-&gt;sample_type = PERF_SAMPLE_IDENTIFIER;</div><div class='del'>-</div><div class='del'>-	if (config-&gt;all_user) {</div><div class='del'>-		attr-&gt;exclude_kernel = 1;</div><div class='del'>-		attr-&gt;exclude_user   = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (config-&gt;all_kernel) {</div><div class='del'>-		attr-&gt;exclude_kernel = 0;</div><div class='del'>-		attr-&gt;exclude_user   = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disabling all counters initially, they will be enabled</div><div class='del'>-	 * either manually by us or by kernel via enable_on_exec</div><div class='del'>-	 * set later.</div><div class='del'>-	 */</div><div class='del'>-	if (evsel__is_group_leader(evsel)) {</div><div class='del'>-		attr-&gt;disabled = 1;</div><div class='del'>-</div><div class='del'>-		if (target__enable_on_exec(target))</div><div class='del'>-			attr-&gt;enable_on_exec = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return evsel__open_per_cpu_and_thread(evsel, evsel__cpus(evsel), cpu_map_idx,</div><div class='del'>-					      evsel-&gt;core.threads);</div><div class='del'>-}</div><div class='head'>diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h<br/>index 4b0f14ae4e5f..f986911c9296 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/stat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/stat.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/stat.h</a></div><div class='hunk'>@@ -56,11 +56,6 @@ enum aggr_mode {</div><div class='ctx'> 	AGGR_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct rusage_stats {</div><div class='del'>-	struct stats ru_utime_usec_stat;</div><div class='del'>-	struct stats ru_stime_usec_stat;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> typedef struct aggr_cpu_id (*aggr_get_id_t)(struct perf_stat_config *config, struct perf_cpu cpu);</div><div class='ctx'> </div><div class='ctx'> struct perf_stat_config {</div><div class='hunk'>@@ -102,7 +97,6 @@ struct perf_stat_config {</div><div class='ctx'> 	const char		*csv_sep;</div><div class='ctx'> 	struct stats		*walltime_nsecs_stats;</div><div class='ctx'> 	struct rusage		 ru_data;</div><div class='del'>-	struct rusage_stats		 *ru_stats;</div><div class='ctx'> 	struct cpu_aggr_map	*aggr_map;</div><div class='ctx'> 	aggr_get_id_t		 aggr_get_id;</div><div class='ctx'> 	struct cpu_aggr_map	*cpus_aggr_map;</div><div class='hunk'>@@ -132,26 +126,9 @@ static inline void init_stats(struct stats *stats)</div><div class='ctx'> 	stats-&gt;max  = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void init_rusage_stats(struct rusage_stats *ru_stats) {</div><div class='del'>-	init_stats(&amp;ru_stats-&gt;ru_utime_usec_stat);</div><div class='del'>-	init_stats(&amp;ru_stats-&gt;ru_stime_usec_stat);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void update_rusage_stats(struct rusage_stats *ru_stats, struct rusage* rusage) {</div><div class='del'>-	const u64 us_to_ns = 1000;</div><div class='del'>-	const u64 s_to_ns = 1000000000;</div><div class='del'>-	update_stats(&amp;ru_stats-&gt;ru_utime_usec_stat,</div><div class='del'>-	             (rusage-&gt;ru_utime.tv_usec * us_to_ns + rusage-&gt;ru_utime.tv_sec * s_to_ns));</div><div class='del'>-	update_stats(&amp;ru_stats-&gt;ru_stime_usec_stat,</div><div class='del'>-	             (rusage-&gt;ru_stime.tv_usec * us_to_ns + rusage-&gt;ru_stime.tv_sec * s_to_ns));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct evsel;</div><div class='ctx'> struct evlist;</div><div class='ctx'> </div><div class='del'>-extern struct stats walltime_nsecs_stats;</div><div class='del'>-extern struct rusage_stats ru_stats;</div><div class='del'>-</div><div class='ctx'> enum metric_threshold_classify {</div><div class='ctx'> 	METRIC_THRESHOLD_UNKNOWN,</div><div class='ctx'> 	METRIC_THRESHOLD_BAD,</div><div class='hunk'>@@ -184,7 +161,7 @@ struct perf_stat_output_ctx {</div><div class='ctx'> </div><div class='ctx'> void perf_stat__print_shadow_stats(struct perf_stat_config *config,</div><div class='ctx'> 				   struct evsel *evsel,</div><div class='del'>-				   double avg, int aggr_idx,</div><div class='add'>+				   int aggr_idx,</div><div class='ctx'> 				   struct perf_stat_output_ctx *out);</div><div class='ctx'> bool perf_stat__skip_metric_event(struct evsel *evsel, u64 ena, u64 run);</div><div class='ctx'> void *perf_stat__print_shadow_stats_metricgroup(struct perf_stat_config *config,</div><div class='hunk'>@@ -216,17 +193,14 @@ union perf_event;</div><div class='ctx'> struct perf_session;</div><div class='ctx'> struct target;</div><div class='ctx'> </div><div class='del'>-int perf_event__process_stat_event(struct perf_session *session,</div><div class='add'>+int perf_event__process_stat_event(const struct perf_tool *tool,</div><div class='add'>+				   struct perf_session *session,</div><div class='ctx'> 				   union perf_event *event);</div><div class='ctx'> </div><div class='ctx'> size_t perf_event__fprintf_stat(union perf_event *event, FILE *fp);</div><div class='ctx'> size_t perf_event__fprintf_stat_round(union perf_event *event, FILE *fp);</div><div class='ctx'> size_t perf_event__fprintf_stat_config(union perf_event *event, FILE *fp);</div><div class='ctx'> </div><div class='del'>-int create_perf_stat_counter(struct evsel *evsel,</div><div class='del'>-			     struct perf_stat_config *config,</div><div class='del'>-			     struct target *target,</div><div class='del'>-			     int cpu_map_idx);</div><div class='ctx'> void evlist__print_counters(struct evlist *evlist, struct perf_stat_config *config,</div><div class='ctx'> 			    struct target *_target, struct timespec *ts, int argc, const char **argv);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c<br/>index 6d2c280a1730..957143fbf8a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol-elf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol-elf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol-elf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/symbol-elf.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "compress.h"</div><div class='ctx'> #include "dso.h"</div><div class='add'>+#include "libbfd.h"</div><div class='ctx'> #include "map.h"</div><div class='ctx'> #include "maps.h"</div><div class='ctx'> #include "symbol.h"</div><div class='hunk'>@@ -24,18 +25,6 @@</div><div class='ctx'> #include &lt;symbol/kallsyms.h&gt;</div><div class='ctx'> #include &lt;internal/lib.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBBFD_SUPPORT</div><div class='del'>-#define PACKAGE 'perf'</div><div class='del'>-#include &lt;bfd.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(HAVE_LIBBFD_SUPPORT) || defined(HAVE_CPLUS_DEMANGLE_SUPPORT)</div><div class='del'>-#ifndef DMGL_PARAMS</div><div class='del'>-#define DMGL_PARAMS     (1 &lt;&lt; 0)  /* Include function args */</div><div class='del'>-#define DMGL_ANSI       (1 &lt;&lt; 1)  /* Include const, volatile, etc */</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifndef EM_AARCH64</div><div class='ctx'> #define EM_AARCH64	183  /* ARM 64 bit */</div><div class='ctx'> #endif</div><div class='hunk'>@@ -871,43 +860,16 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBBFD_BUILDID_SUPPORT</div><div class='del'>-</div><div class='ctx'> static int read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> {</div><div class='ctx'> 	size_t size = sizeof(bid-&gt;data);</div><div class='del'>-	int err = -1;</div><div class='del'>-	bfd *abfd;</div><div class='del'>-</div><div class='del'>-	abfd = bfd_openr(filename, NULL);</div><div class='del'>-	if (!abfd)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='del'>-		pr_debug2("%s: cannot read %s bfd file.\n", __func__, filename);</div><div class='del'>-		goto out_close;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!abfd-&gt;build_id || abfd-&gt;build_id-&gt;size &gt; size)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	memcpy(bid-&gt;data, abfd-&gt;build_id-&gt;data, abfd-&gt;build_id-&gt;size);</div><div class='del'>-	memset(bid-&gt;data + abfd-&gt;build_id-&gt;size, 0, size - abfd-&gt;build_id-&gt;size);</div><div class='del'>-	err = bid-&gt;size = abfd-&gt;build_id-&gt;size;</div><div class='del'>-</div><div class='del'>-out_close:</div><div class='del'>-	bfd_close(abfd);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else // HAVE_LIBBFD_BUILDID_SUPPORT</div><div class='del'>-</div><div class='del'>-static int read_build_id(const char *filename, struct build_id *bid)</div><div class='del'>-{</div><div class='del'>-	size_t size = sizeof(bid-&gt;data);</div><div class='del'>-	int fd, err = -1;</div><div class='add'>+	int fd, err;</div><div class='ctx'> 	Elf *elf;</div><div class='ctx'> </div><div class='add'>+	err = libbfd__read_build_id(filename, bid);</div><div class='add'>+	if (err &gt;= 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	if (size &lt; BUILD_ID_SIZE)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -932,8 +894,6 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif // HAVE_LIBBFD_BUILDID_SUPPORT</div><div class='del'>-</div><div class='ctx'> int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> {</div><div class='ctx'> 	struct kmod_path m = { .name = NULL, };</div><div class='hunk'>@@ -942,6 +902,8 @@ int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> </div><div class='ctx'> 	if (!filename)</div><div class='ctx'> 		return -EFAULT;</div><div class='add'>+	if (!is_regular_file(filename))</div><div class='add'>+		return -EWOULDBLOCK;</div><div class='ctx'> </div><div class='ctx'> 	err = kmod_path__parse(&amp;m, filename);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1017,44 +979,6 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBBFD_SUPPORT</div><div class='del'>-</div><div class='del'>-int filename__read_debuglink(const char *filename, char *debuglink,</div><div class='del'>-			     size_t size)</div><div class='del'>-{</div><div class='del'>-	int err = -1;</div><div class='del'>-	asection *section;</div><div class='del'>-	bfd *abfd;</div><div class='del'>-</div><div class='del'>-	abfd = bfd_openr(filename, NULL);</div><div class='del'>-	if (!abfd)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='del'>-		pr_debug2("%s: cannot read %s bfd file.\n", __func__, filename);</div><div class='del'>-		goto out_close;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	section = bfd_get_section_by_name(abfd, ".gnu_debuglink");</div><div class='del'>-	if (!section)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	if (section-&gt;size &gt; size)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	if (!bfd_get_section_contents(abfd, section, debuglink, 0,</div><div class='del'>-				      section-&gt;size))</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	err = 0;</div><div class='del'>-</div><div class='del'>-out_close:</div><div class='del'>-	bfd_close(abfd);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='ctx'> int filename__read_debuglink(const char *filename, char *debuglink,</div><div class='ctx'> 			     size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -1066,6 +990,10 @@ int filename__read_debuglink(const char *filename, char *debuglink,</div><div class='ctx'> 	Elf_Scn *sec;</div><div class='ctx'> 	Elf_Kind ek;</div><div class='ctx'> </div><div class='add'>+	err = libbfd_filename__read_debuglink(filename, debuglink, size);</div><div class='add'>+	if (err &gt;= 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	fd = open(filename, O_RDONLY);</div><div class='ctx'> 	if (fd &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1107,8 +1035,6 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> bool symsrc__possibly_runtime(struct symsrc *ss)</div><div class='ctx'> {</div><div class='ctx'> 	return ss-&gt;dynsym || ss-&gt;opdsec;</div><div class='hunk'>@@ -1521,8 +1447,11 @@ static int dso__process_kernel_symbol(struct dso *dso, struct map *map,</div><div class='ctx'> 			map__set_mapping_type(curr_map, MAPPING_TYPE__IDENTITY);</div><div class='ctx'> 		}</div><div class='ctx'> 		dso__set_symtab_type(curr_dso, dso__symtab_type(dso));</div><div class='del'>-		if (maps__insert(kmaps, curr_map))</div><div class='add'>+		if (maps__insert(kmaps, curr_map)) {</div><div class='add'>+			dso__put(curr_dso);</div><div class='add'>+			map__put(curr_map);</div><div class='ctx'> 			return -1;</div><div class='add'>+		}</div><div class='ctx'> 		dsos__add(&amp;maps__machine(kmaps)-&gt;dsos, curr_dso);</div><div class='ctx'> 		dso__set_loaded(curr_dso);</div><div class='ctx'> 		dso__put(*curr_dsop);</div><div class='head'>diff --git a/tools/perf/util/symbol-minimal.c b/tools/perf/util/symbol-minimal.c<br/>index 7201494c5c20..c6b17c14a2e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol-minimal.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol-minimal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol-minimal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/symbol-minimal.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;errno.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;stdlib.h&gt;</div><div class='hunk'>@@ -43,7 +42,7 @@ static int read_build_id(void *note_data, size_t note_len, struct build_id *bid,</div><div class='ctx'> 	void *ptr;</div><div class='ctx'> </div><div class='ctx'> 	ptr = note_data;</div><div class='del'>-	while (ptr &lt; (note_data + note_len)) {</div><div class='add'>+	while ((ptr + sizeof(*nhdr)) &lt; (note_data + note_len)) {</div><div class='ctx'> 		const char *name;</div><div class='ctx'> 		size_t namesz, descsz;</div><div class='ctx'> </div><div class='hunk'>@@ -88,11 +87,8 @@ int filename__read_debuglink(const char *filename __maybe_unused,</div><div class='ctx'>  */</div><div class='ctx'> int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> {</div><div class='del'>-	FILE *fp;</div><div class='del'>-	int ret = -1;</div><div class='add'>+	int fd, ret = -1;</div><div class='ctx'> 	bool need_swap = false, elf32;</div><div class='del'>-	u8 e_ident[EI_NIDENT];</div><div class='del'>-	int i;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			Elf32_Ehdr ehdr32;</div><div class='hunk'>@@ -103,28 +99,32 @@ int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> 			Elf64_Phdr *phdr64;</div><div class='ctx'> 		};</div><div class='ctx'> 	} hdrs;</div><div class='del'>-	void *phdr;</div><div class='del'>-	size_t phdr_size;</div><div class='del'>-	void *buf = NULL;</div><div class='del'>-	size_t buf_size = 0;</div><div class='add'>+	void *phdr, *buf = NULL;</div><div class='add'>+	ssize_t phdr_size, ehdr_size, buf_size = 0;</div><div class='add'>+</div><div class='add'>+	if (!filename)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	if (!is_regular_file(filename))</div><div class='add'>+		return -EWOULDBLOCK;</div><div class='ctx'> </div><div class='del'>-	fp = fopen(filename, "r");</div><div class='del'>-	if (fp == NULL)</div><div class='add'>+	fd = open(filename, O_RDONLY);</div><div class='add'>+	if (fd &lt; 0)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	if (fread(e_ident, sizeof(e_ident), 1, fp) != 1)</div><div class='add'>+	if (read(fd, hdrs.ehdr32.e_ident, EI_NIDENT) != EI_NIDENT)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (memcmp(e_ident, ELFMAG, SELFMAG) ||</div><div class='del'>-	    e_ident[EI_VERSION] != EV_CURRENT)</div><div class='add'>+	if (memcmp(hdrs.ehdr32.e_ident, ELFMAG, SELFMAG) ||</div><div class='add'>+	    hdrs.ehdr32.e_ident[EI_VERSION] != EV_CURRENT)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	need_swap = check_need_swap(e_ident[EI_DATA]);</div><div class='del'>-	elf32 = e_ident[EI_CLASS] == ELFCLASS32;</div><div class='add'>+	need_swap = check_need_swap(hdrs.ehdr32.e_ident[EI_DATA]);</div><div class='add'>+	elf32 = hdrs.ehdr32.e_ident[EI_CLASS] == ELFCLASS32;</div><div class='add'>+	ehdr_size = (elf32 ? sizeof(hdrs.ehdr32) : sizeof(hdrs.ehdr64)) - EI_NIDENT;</div><div class='ctx'> </div><div class='del'>-	if (fread(elf32 ? (void *)&amp;hdrs.ehdr32 : (void *)&amp;hdrs.ehdr64,</div><div class='del'>-		  elf32 ? sizeof(hdrs.ehdr32) : sizeof(hdrs.ehdr64),</div><div class='del'>-		  1, fp) != 1)</div><div class='add'>+	if (read(fd,</div><div class='add'>+		 (elf32 ? (void *)&amp;hdrs.ehdr32 : (void *)&amp;hdrs.ehdr64) + EI_NIDENT,</div><div class='add'>+		 ehdr_size) != ehdr_size)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (need_swap) {</div><div class='hunk'>@@ -138,14 +138,18 @@ int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> 			hdrs.ehdr64.e_phnum = bswap_16(hdrs.ehdr64.e_phnum);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	phdr_size = elf32 ? hdrs.ehdr32.e_phentsize * hdrs.ehdr32.e_phnum</div><div class='del'>-			  : hdrs.ehdr64.e_phentsize * hdrs.ehdr64.e_phnum;</div><div class='add'>+	if ((elf32 &amp;&amp; hdrs.ehdr32.e_phentsize != sizeof(Elf32_Phdr)) ||</div><div class='add'>+	    (!elf32 &amp;&amp; hdrs.ehdr64.e_phentsize != sizeof(Elf64_Phdr)))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	phdr_size = elf32 ? sizeof(Elf32_Phdr) * hdrs.ehdr32.e_phnum</div><div class='add'>+			  : sizeof(Elf64_Phdr) * hdrs.ehdr64.e_phnum;</div><div class='ctx'> 	phdr = malloc(phdr_size);</div><div class='ctx'> 	if (phdr == NULL)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	fseek(fp, elf32 ? hdrs.ehdr32.e_phoff : hdrs.ehdr64.e_phoff, SEEK_SET);</div><div class='del'>-	if (fread(phdr, phdr_size, 1, fp) != 1)</div><div class='add'>+	lseek(fd, elf32 ? hdrs.ehdr32.e_phoff : hdrs.ehdr64.e_phoff, SEEK_SET);</div><div class='add'>+	if (read(fd, phdr, phdr_size) != phdr_size)</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> </div><div class='ctx'> 	if (elf32)</div><div class='hunk'>@@ -153,8 +157,8 @@ int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> 	else</div><div class='ctx'> 		hdrs.phdr64 = phdr;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; elf32 ? hdrs.ehdr32.e_phnum : hdrs.ehdr64.e_phnum; i++) {</div><div class='del'>-		size_t p_filesz;</div><div class='add'>+	for (int i = 0; i &lt; (elf32 ? hdrs.ehdr32.e_phnum : hdrs.ehdr64.e_phnum); i++) {</div><div class='add'>+		ssize_t p_filesz;</div><div class='ctx'> </div><div class='ctx'> 		if (need_swap) {</div><div class='ctx'> 			if (elf32) {</div><div class='hunk'>@@ -180,8 +184,8 @@ int filename__read_build_id(const char *filename, struct build_id *bid)</div><div class='ctx'> 				goto out_free;</div><div class='ctx'> 			buf = tmp;</div><div class='ctx'> 		}</div><div class='del'>-		fseek(fp, elf32 ? hdrs.phdr32[i].p_offset : hdrs.phdr64[i].p_offset, SEEK_SET);</div><div class='del'>-		if (fread(buf, p_filesz, 1, fp) != 1)</div><div class='add'>+		lseek(fd, elf32 ? hdrs.phdr32[i].p_offset : hdrs.phdr64[i].p_offset, SEEK_SET);</div><div class='add'>+		if (read(fd, buf, p_filesz) != p_filesz)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> </div><div class='ctx'> 		ret = read_build_id(buf, p_filesz, bid, need_swap);</div><div class='hunk'>@@ -194,7 +198,7 @@ out_free:</div><div class='ctx'> 	free(buf);</div><div class='ctx'> 	free(phdr);</div><div class='ctx'> out:</div><div class='del'>-	fclose(fp);</div><div class='add'>+	close(fd);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c<br/>index e816e4220d33..814f960fa8f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/symbol.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/symbol.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/symbol.c</a></div><div class='hunk'>@@ -107,9 +107,18 @@ static enum dso_binary_type binary_type_symtab[] = {</div><div class='ctx'> static bool symbol_type__filter(char __symbol_type)</div><div class='ctx'> {</div><div class='ctx'> 	// Since 'U' == undefined and 'u' == unique global symbol, we can't use toupper there</div><div class='add'>+	// 'N' is for debugging symbols, 'n' is a non-data, non-code, non-debug read-only section.</div><div class='add'>+	// According to 'man nm'.</div><div class='add'>+	// 'N' first seen in:</div><div class='add'>+	// ffffffff9b35d130 N __pfx__RNCINvNtNtNtCsbDUBuN8AbD4_4core4iter8adapters3map12map_try_foldjNtCs6vVzKs5jPr6_12drm_panic_qr7VersionuINtNtNtBa_3ops12control_flow11ControlFlowB10_ENcB10_0NCINvNvNtNtNtB8_6traits8iterator8Iterator4find5checkB10_NCNvMB12_B10_13from_segments0E0E0B12_</div><div class='add'>+	// a seemingly Rust mangled name</div><div class='add'>+	// Ditto for '1':</div><div class='add'>+	// root@x1:~# grep ' 1 ' /proc/kallsyms</div><div class='add'>+	// ffffffffb098bc00 1 __pfx__RNCINvNtNtNtCsfwaGRd4cjqE_4core4iter8adapters3map12map_try_foldjNtCskFudTml27HW_12drm_panic_qr7VersionuINtNtNtBa_3ops12control_flow11ControlFlowB10_ENcB10_0NCINvNvNtNtNtB8_6traits8iterator8Iterator4find5checkB10_NCNvMB12_B10_13from_segments0E0E0B12_</div><div class='add'>+	// ffffffffb098bc10 1 _RNCINvNtNtNtCsfwaGRd4cjqE_4core4iter8adapters3map12map_try_foldjNtCskFudTml27HW_12drm_panic_qr7VersionuINtNtNtBa_3ops12control_flow11ControlFlowB10_ENcB10_0NCINvNvNtNtNtB8_6traits8iterator8Iterator4find5checkB10_NCNvMB12_B10_13from_segments0E0E0B12_</div><div class='ctx'> 	char symbol_type = toupper(__symbol_type);</div><div class='ctx'> 	return symbol_type == 'T' || symbol_type == 'W' || symbol_type == 'D' || symbol_type == 'B' ||</div><div class='del'>-	       __symbol_type == 'u' || __symbol_type == 'l';</div><div class='add'>+	       __symbol_type == 'u' || __symbol_type == 'l' || __symbol_type == 'N' || __symbol_type == '1';</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int prefix_underscores_count(const char *str)</div><div class='hunk'>@@ -946,7 +955,8 @@ static int maps__split_kallsyms(struct maps *kmaps, struct dso *dso, u64 delta,</div><div class='ctx'> 				pos-&gt;end -= delta;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (count == 0) {</div><div class='add'>+			if (map__start(initial_map) &lt;= (pos-&gt;start + delta) &amp;&amp;</div><div class='add'>+			    (pos-&gt;start + delta) &lt; map__end(initial_map)) {</div><div class='ctx'> 				map__zput(curr_map);</div><div class='ctx'> 				curr_map = map__get(initial_map);</div><div class='ctx'> 				goto add_symbol;</div><div class='hunk'>@@ -955,11 +965,11 @@ static int maps__split_kallsyms(struct maps *kmaps, struct dso *dso, u64 delta,</div><div class='ctx'> 			if (dso__kernel(dso) == DSO_SPACE__KERNEL_GUEST)</div><div class='ctx'> 				snprintf(dso_name, sizeof(dso_name),</div><div class='ctx'> 					"[guest.kernel].%d",</div><div class='del'>-					kernel_range++);</div><div class='add'>+					kernel_range);</div><div class='ctx'> 			else</div><div class='ctx'> 				snprintf(dso_name, sizeof(dso_name),</div><div class='ctx'> 					"[kernel].%d",</div><div class='del'>-					kernel_range++);</div><div class='add'>+					kernel_range);</div><div class='ctx'> </div><div class='ctx'> 			ndso = dso__new(dso_name);</div><div class='ctx'> 			map__zput(curr_map);</div><div class='hunk'>@@ -967,6 +977,7 @@ static int maps__split_kallsyms(struct maps *kmaps, struct dso *dso, u64 delta,</div><div class='ctx'> 				return -1;</div><div class='ctx'> </div><div class='ctx'> 			dso__set_kernel(ndso, dso__kernel(dso));</div><div class='add'>+			dso__set_loaded(ndso);</div><div class='ctx'> </div><div class='ctx'> 			curr_map = map__new2(pos-&gt;start, ndso);</div><div class='ctx'> 			if (curr_map == NULL) {</div><div class='hunk'>@@ -980,6 +991,7 @@ static int maps__split_kallsyms(struct maps *kmaps, struct dso *dso, u64 delta,</div><div class='ctx'> 				dso__put(ndso);</div><div class='ctx'> 				return -1;</div><div class='ctx'> 			}</div><div class='add'>+			dso__put(ndso);</div><div class='ctx'> 			++kernel_range;</div><div class='ctx'> 		} else if (delta) {</div><div class='ctx'> 			/* Kernel was relocated at boot time */</div><div class='hunk'>@@ -1584,137 +1596,6 @@ out_failure:</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_LIBBFD_SUPPORT</div><div class='del'>-#define PACKAGE 'perf'</div><div class='del'>-#include &lt;bfd.h&gt;</div><div class='del'>-</div><div class='del'>-static int bfd_symbols__cmpvalue(const void *a, const void *b)</div><div class='del'>-{</div><div class='del'>-	const asymbol *as = *(const asymbol **)a, *bs = *(const asymbol **)b;</div><div class='del'>-</div><div class='del'>-	if (bfd_asymbol_value(as) != bfd_asymbol_value(bs))</div><div class='del'>-		return bfd_asymbol_value(as) - bfd_asymbol_value(bs);</div><div class='del'>-</div><div class='del'>-	return bfd_asymbol_name(as)[0] - bfd_asymbol_name(bs)[0];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfd2elf_binding(asymbol *symbol)</div><div class='del'>-{</div><div class='del'>-	if (symbol-&gt;flags &amp; BSF_WEAK)</div><div class='del'>-		return STB_WEAK;</div><div class='del'>-	if (symbol-&gt;flags &amp; BSF_GLOBAL)</div><div class='del'>-		return STB_GLOBAL;</div><div class='del'>-	if (symbol-&gt;flags &amp; BSF_LOCAL)</div><div class='del'>-		return STB_LOCAL;</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int dso__load_bfd_symbols(struct dso *dso, const char *debugfile)</div><div class='del'>-{</div><div class='del'>-	int err = -1;</div><div class='del'>-	long symbols_size, symbols_count, i;</div><div class='del'>-	asection *section;</div><div class='del'>-	asymbol **symbols, *sym;</div><div class='del'>-	struct symbol *symbol;</div><div class='del'>-	bfd *abfd;</div><div class='del'>-	u64 start, len;</div><div class='del'>-</div><div class='del'>-	abfd = bfd_openr(debugfile, NULL);</div><div class='del'>-	if (!abfd)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if (!bfd_check_format(abfd, bfd_object)) {</div><div class='del'>-		pr_debug2("%s: cannot read %s bfd file.\n", __func__,</div><div class='del'>-			  dso__long_name(dso));</div><div class='del'>-		goto out_close;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bfd_get_flavour(abfd) == bfd_target_elf_flavour)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	symbols_size = bfd_get_symtab_upper_bound(abfd);</div><div class='del'>-	if (symbols_size == 0) {</div><div class='del'>-		bfd_close(abfd);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (symbols_size &lt; 0)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	symbols = malloc(symbols_size);</div><div class='del'>-	if (!symbols)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	symbols_count = bfd_canonicalize_symtab(abfd, symbols);</div><div class='del'>-	if (symbols_count &lt; 0)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	section = bfd_get_section_by_name(abfd, ".text");</div><div class='del'>-	if (section) {</div><div class='del'>-		for (i = 0; i &lt; symbols_count; ++i) {</div><div class='del'>-			if (!strcmp(bfd_asymbol_name(symbols[i]), "__ImageBase") ||</div><div class='del'>-			    !strcmp(bfd_asymbol_name(symbols[i]), "__image_base__"))</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if (i &lt; symbols_count) {</div><div class='del'>-			/* PE symbols can only have 4 bytes, so use .text high bits */</div><div class='del'>-			u64 text_offset = (section-&gt;vma - (u32)section-&gt;vma)</div><div class='del'>-				+ (u32)bfd_asymbol_value(symbols[i]);</div><div class='del'>-			dso__set_text_offset(dso, text_offset);</div><div class='del'>-			dso__set_text_end(dso, (section-&gt;vma - text_offset) + section-&gt;size);</div><div class='del'>-		} else {</div><div class='del'>-			dso__set_text_offset(dso, section-&gt;vma - section-&gt;filepos);</div><div class='del'>-			dso__set_text_end(dso, section-&gt;filepos + section-&gt;size);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	qsort(symbols, symbols_count, sizeof(asymbol *), bfd_symbols__cmpvalue);</div><div class='del'>-</div><div class='del'>-#ifdef bfd_get_section</div><div class='del'>-#define bfd_asymbol_section bfd_get_section</div><div class='del'>-#endif</div><div class='del'>-	for (i = 0; i &lt; symbols_count; ++i) {</div><div class='del'>-		sym = symbols[i];</div><div class='del'>-		section = bfd_asymbol_section(sym);</div><div class='del'>-		if (bfd2elf_binding(sym) &lt; 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		while (i + 1 &lt; symbols_count &amp;&amp;</div><div class='del'>-		       bfd_asymbol_section(symbols[i + 1]) == section &amp;&amp;</div><div class='del'>-		       bfd2elf_binding(symbols[i + 1]) &lt; 0)</div><div class='del'>-			i++;</div><div class='del'>-</div><div class='del'>-		if (i + 1 &lt; symbols_count &amp;&amp;</div><div class='del'>-		    bfd_asymbol_section(symbols[i + 1]) == section)</div><div class='del'>-			len = symbols[i + 1]-&gt;value - sym-&gt;value;</div><div class='del'>-		else</div><div class='del'>-			len = section-&gt;size - sym-&gt;value;</div><div class='del'>-</div><div class='del'>-		start = bfd_asymbol_value(sym) - dso__text_offset(dso);</div><div class='del'>-		symbol = symbol__new(start, len, bfd2elf_binding(sym), STT_FUNC,</div><div class='del'>-				     bfd_asymbol_name(sym));</div><div class='del'>-		if (!symbol)</div><div class='del'>-			goto out_free;</div><div class='del'>-</div><div class='del'>-		symbols__insert(dso__symbols(dso), symbol);</div><div class='del'>-	}</div><div class='del'>-#ifdef bfd_get_section</div><div class='del'>-#undef bfd_asymbol_section</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	symbols__fixup_end(dso__symbols(dso), false);</div><div class='del'>-	symbols__fixup_duplicate(dso__symbols(dso));</div><div class='del'>-	dso__set_adjust_symbols(dso, true);</div><div class='del'>-</div><div class='del'>-	err = 0;</div><div class='del'>-out_free:</div><div class='del'>-	free(symbols);</div><div class='del'>-out_close:</div><div class='del'>-	bfd_close(abfd);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static bool dso__is_compatible_symtab_type(struct dso *dso, bool kmod,</div><div class='ctx'> 					   enum dso_binary_type type)</div><div class='ctx'> {</div><div class='hunk'>@@ -1869,10 +1750,9 @@ int dso__load(struct dso *dso, struct map *map)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read the build id if possible. This is required for</div><div class='del'>-	 * DSO_BINARY_TYPE__BUILDID_DEBUGINFO to work</div><div class='add'>+	 * DSO_BINARY_TYPE__BUILDID_DEBUGINFO to work.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!dso__has_build_id(dso) &amp;&amp;</div><div class='del'>-	    is_regular_file(dso__long_name(dso))) {</div><div class='add'>+	if (!dso__has_build_id(dso)) {</div><div class='ctx'> 		struct build_id bid = { .size = 0, };</div><div class='ctx'> </div><div class='ctx'> 		__symbol__join_symfs(name, PATH_MAX, dso__long_name(dso));</div><div class='hunk'>@@ -2127,6 +2007,7 @@ static char *dso__find_kallsyms(struct dso *dso, struct map *map)</div><div class='ctx'> 	char sbuild_id[SBUILD_ID_SIZE];</div><div class='ctx'> 	bool is_host = false;</div><div class='ctx'> 	char path[PATH_MAX];</div><div class='add'>+	struct maps *kmaps = map__kmaps(map);</div><div class='ctx'> </div><div class='ctx'> 	if (!dso__has_build_id(dso)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -2163,8 +2044,13 @@ static char *dso__find_kallsyms(struct dso *dso, struct map *map)</div><div class='ctx'> 		return strdup(path);</div><div class='ctx'> </div><div class='ctx'> 	/* Use current /proc/kallsyms if possible */</div><div class='del'>-	if (is_host) {</div><div class='ctx'> proc_kallsyms:</div><div class='add'>+	if (kmaps) {</div><div class='add'>+		struct machine *machine = maps__machine(kmaps);</div><div class='add'>+</div><div class='add'>+		scnprintf(path, sizeof(path), "%s/proc/kallsyms", machine-&gt;root_dir);</div><div class='add'>+		return strdup(path);</div><div class='add'>+	} else if (is_host) {</div><div class='ctx'> 		return strdup("/proc/kallsyms");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/synthetic-events.c b/tools/perf/util/synthetic-events.c<br/>index cb2c1ace304a..2ba9fa25e00a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/synthetic-events.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/synthetic-events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/synthetic-events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/synthetic-events.c</a></div><div class='hunk'>@@ -389,7 +389,7 @@ static void perf_record_mmap2__read_build_id(struct perf_record_mmap2 *event,</div><div class='ctx'> 		dso_id.ino_generation = event-&gt;ino_generation;</div><div class='ctx'> 		dso_id.mmap2_valid = true;</div><div class='ctx'> 		dso_id.mmap2_ino_generation_valid = true;</div><div class='del'>-	};</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dso = dsos__findnew_id(&amp;machine-&gt;dsos, event-&gt;filename, &amp;dso_id);</div><div class='ctx'> 	if (dso &amp;&amp; dso__has_build_id(dso)) {</div><div class='head'>diff --git a/tools/perf/util/synthetic-events.h b/tools/perf/util/synthetic-events.h<br/>index ee29615d68e5..f8588b6cf11a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/synthetic-events.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/synthetic-events.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/synthetic-events.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/synthetic-events.h</a></div><div class='hunk'>@@ -107,24 +107,9 @@ int machine__synthesize_threads(struct machine *machine, struct target *target,</div><div class='ctx'> 				struct perf_thread_map *threads, bool needs_mmap, bool data_mmap,</div><div class='ctx'> 				unsigned int nr_threads_synthesize);</div><div class='ctx'> </div><div class='del'>-#ifdef HAVE_AUXTRACE_SUPPORT</div><div class='ctx'> int perf_event__synthesize_auxtrace_info(struct auxtrace_record *itr, const struct perf_tool *tool,</div><div class='ctx'> 					 struct perf_session *session, perf_event__handler_t process);</div><div class='ctx'> </div><div class='del'>-#else // HAVE_AUXTRACE_SUPPORT</div><div class='del'>-</div><div class='del'>-#include &lt;errno.h&gt;</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-perf_event__synthesize_auxtrace_info(struct auxtrace_record *itr __maybe_unused,</div><div class='del'>-				     const struct perf_tool *tool __maybe_unused,</div><div class='del'>-				     struct perf_session *session __maybe_unused,</div><div class='del'>-				     perf_event__handler_t process __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif // HAVE_AUXTRACE_SUPPORT</div><div class='del'>-</div><div class='ctx'> #ifdef HAVE_LIBBPF_SUPPORT</div><div class='ctx'> int perf_event__synthesize_bpf_events(struct perf_session *session, perf_event__handler_t process,</div><div class='ctx'> 				      struct machine *machine, struct record_opts *opts);</div><div class='head'>diff --git a/tools/perf/util/tool.c b/tools/perf/util/tool.c<br/>index e83c7ababc2a..27ba5849c74a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/tool.c</a></div><div class='hunk'>@@ -13,7 +13,8 @@</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef HAVE_ZSTD_SUPPORT</div><div class='del'>-static int perf_session__process_compressed_event(struct perf_session *session,</div><div class='add'>+static int perf_session__process_compressed_event(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+						  struct perf_session *session,</div><div class='ctx'> 						  union perf_event *event, u64 file_offset,</div><div class='ctx'> 						  const char *file_path)</div><div class='ctx'> {</div><div class='hunk'>@@ -79,10 +80,9 @@ static int perf_session__process_compressed_event(struct perf_session *session,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int process_event_synth_tracing_data_stub(struct perf_session *session</div><div class='del'>-						 __maybe_unused,</div><div class='del'>-						 union perf_event *event</div><div class='del'>-						 __maybe_unused)</div><div class='add'>+static int process_event_synth_tracing_data_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+						 struct perf_session *session __maybe_unused,</div><div class='add'>+						 union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	dump_printf(": unhandled!\n");</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -90,8 +90,7 @@ static int process_event_synth_tracing_data_stub(struct perf_session *session</div><div class='ctx'> </div><div class='ctx'> static int process_event_synth_attr_stub(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 					 union perf_event *event __maybe_unused,</div><div class='del'>-					 struct evlist **pevlist</div><div class='del'>-					 __maybe_unused)</div><div class='add'>+					 struct evlist **pevlist __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	dump_printf(": unhandled!\n");</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -99,8 +98,7 @@ static int process_event_synth_attr_stub(const struct perf_tool *tool __maybe_un</div><div class='ctx'> </div><div class='ctx'> static int process_event_synth_event_update_stub(const struct perf_tool *tool __maybe_unused,</div><div class='ctx'> 						 union perf_event *event __maybe_unused,</div><div class='del'>-						 struct evlist **pevlist</div><div class='del'>-						 __maybe_unused)</div><div class='add'>+						 struct evlist **pevlist __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='ctx'> 		perf_event__fprintf_event_update(event, stdout);</div><div class='hunk'>@@ -151,7 +149,8 @@ static int skipn(int fd, off_t n)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static s64 process_event_auxtrace_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+static s64 process_event_auxtrace_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				       struct perf_session *session __maybe_unused,</div><div class='ctx'> 				       union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	dump_printf(": unhandled!\n");</div><div class='hunk'>@@ -160,7 +159,8 @@ static s64 process_event_auxtrace_stub(struct perf_session *session __maybe_unus</div><div class='ctx'> 	return event-&gt;auxtrace.size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_event_op2_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+static int process_event_op2_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				  struct perf_session *session __maybe_unused,</div><div class='ctx'> 				  union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	dump_printf(": unhandled!\n");</div><div class='hunk'>@@ -169,7 +169,8 @@ static int process_event_op2_stub(struct perf_session *session __maybe_unused,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_event_thread_map_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+int process_event_thread_map_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				  struct perf_session *session __maybe_unused,</div><div class='ctx'> 				  union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -180,7 +181,8 @@ int process_event_thread_map_stub(struct perf_session *session __maybe_unused,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_event_cpu_map_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+int process_event_cpu_map_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+			       struct perf_session *session __maybe_unused,</div><div class='ctx'> 			       union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -191,7 +193,8 @@ int process_event_cpu_map_stub(struct perf_session *session __maybe_unused,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static</div><div class='del'>-int process_event_stat_config_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+int process_event_stat_config_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				   struct perf_session *session __maybe_unused,</div><div class='ctx'> 				   union perf_event *event __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -201,7 +204,8 @@ int process_event_stat_config_stub(struct perf_session *session __maybe_unused,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_stat_stub(struct perf_session *perf_session __maybe_unused,</div><div class='add'>+static int process_stat_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+			     struct perf_session *perf_session __maybe_unused,</div><div class='ctx'> 			     union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -211,7 +215,8 @@ static int process_stat_stub(struct perf_session *perf_session __maybe_unused,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_stat_round_stub(struct perf_session *perf_session __maybe_unused,</div><div class='add'>+static int process_stat_round_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+				   struct perf_session *perf_session __maybe_unused,</div><div class='ctx'> 				   union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -221,7 +226,8 @@ static int process_stat_round_stub(struct perf_session *perf_session __maybe_unu</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int process_event_time_conv_stub(struct perf_session *perf_session __maybe_unused,</div><div class='add'>+static int process_event_time_conv_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+					struct perf_session *perf_session __maybe_unused,</div><div class='ctx'> 					union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -231,7 +237,8 @@ static int process_event_time_conv_stub(struct perf_session *perf_session __mayb</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int perf_session__process_compressed_event_stub(struct perf_session *session __maybe_unused,</div><div class='add'>+static int perf_session__process_compressed_event_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+						       struct perf_session *session __maybe_unused,</div><div class='ctx'> 						       union perf_event *event __maybe_unused,</div><div class='ctx'> 						       u64 file_offset __maybe_unused,</div><div class='ctx'> 						       const char *file_path __maybe_unused)</div><div class='hunk'>@@ -240,7 +247,8 @@ static int perf_session__process_compressed_event_stub(struct perf_session *sess</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int perf_event__process_bpf_metadata_stub(struct perf_session *perf_session __maybe_unused,</div><div class='add'>+static int perf_event__process_bpf_metadata_stub(const struct perf_tool *tool __maybe_unused,</div><div class='add'>+						 struct perf_session *perf_session __maybe_unused,</div><div class='ctx'> 						 union perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (dump_trace)</div><div class='hunk'>@@ -258,6 +266,7 @@ void perf_tool__init(struct perf_tool *tool, bool ordered_events)</div><div class='ctx'> 	tool-&gt;cgroup_events = false;</div><div class='ctx'> 	tool-&gt;no_warn = false;</div><div class='ctx'> 	tool-&gt;show_feat_hdr = SHOW_FEAT_NO_HEADER;</div><div class='add'>+	tool-&gt;merge_deferred_callchains = true;</div><div class='ctx'> </div><div class='ctx'> 	tool-&gt;sample = process_event_sample_stub;</div><div class='ctx'> 	tool-&gt;mmap = process_event_stub;</div><div class='hunk'>@@ -279,6 +288,7 @@ void perf_tool__init(struct perf_tool *tool, bool ordered_events)</div><div class='ctx'> 	tool-&gt;read = process_event_sample_stub;</div><div class='ctx'> 	tool-&gt;throttle = process_event_stub;</div><div class='ctx'> 	tool-&gt;unthrottle = process_event_stub;</div><div class='add'>+	tool-&gt;callchain_deferred = process_event_sample_stub;</div><div class='ctx'> 	tool-&gt;attr = process_event_synth_attr_stub;</div><div class='ctx'> 	tool-&gt;event_update = process_event_synth_event_update_stub;</div><div class='ctx'> 	tool-&gt;tracing_data = process_event_synth_tracing_data_stub;</div><div class='hunk'>@@ -313,3 +323,177 @@ bool perf_tool__compressed_is_stub(const struct perf_tool *tool)</div><div class='ctx'> {</div><div class='ctx'> 	return tool-&gt;compressed == perf_session__process_compressed_event_stub;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_SAMPLE(name) \</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool, \</div><div class='add'>+				     union perf_event *event, \</div><div class='add'>+				     struct perf_sample *sample, \</div><div class='add'>+				     struct evsel *evsel, \</div><div class='add'>+				     struct machine *machine) \</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, event, sample, evsel, machine);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_SAMPLE(read);</div><div class='add'>+CREATE_DELEGATE_SAMPLE(sample);</div><div class='add'>+CREATE_DELEGATE_SAMPLE(callchain_deferred);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_ATTR(name)					\</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool,	\</div><div class='add'>+				union perf_event *event,		\</div><div class='add'>+				struct evlist **pevlist)		\</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, event, pevlist);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_ATTR(attr);</div><div class='add'>+CREATE_DELEGATE_ATTR(event_update);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_OE(name)				   \</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool, \</div><div class='add'>+				     union perf_event *event,	   \</div><div class='add'>+				     struct ordered_events *oe)	   \</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, event, oe);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_OE(finished_round);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_OP(name)				   \</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool, \</div><div class='add'>+				     union perf_event *event, \</div><div class='add'>+				     struct perf_sample *sample, \</div><div class='add'>+				     struct machine *machine) \</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, event, sample, machine); \</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_OP(aux);</div><div class='add'>+CREATE_DELEGATE_OP(aux_output_hw_id);</div><div class='add'>+CREATE_DELEGATE_OP(bpf);</div><div class='add'>+CREATE_DELEGATE_OP(cgroup);</div><div class='add'>+CREATE_DELEGATE_OP(comm);</div><div class='add'>+CREATE_DELEGATE_OP(context_switch);</div><div class='add'>+CREATE_DELEGATE_OP(exit);</div><div class='add'>+CREATE_DELEGATE_OP(fork);</div><div class='add'>+CREATE_DELEGATE_OP(itrace_start);</div><div class='add'>+CREATE_DELEGATE_OP(ksymbol);</div><div class='add'>+CREATE_DELEGATE_OP(lost);</div><div class='add'>+CREATE_DELEGATE_OP(lost_samples);</div><div class='add'>+CREATE_DELEGATE_OP(mmap);</div><div class='add'>+CREATE_DELEGATE_OP(mmap2);</div><div class='add'>+CREATE_DELEGATE_OP(namespaces);</div><div class='add'>+CREATE_DELEGATE_OP(text_poke);</div><div class='add'>+CREATE_DELEGATE_OP(throttle);</div><div class='add'>+CREATE_DELEGATE_OP(unthrottle);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_OP2(name)					\</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool,	\</div><div class='add'>+				     struct perf_session *session,	\</div><div class='add'>+				     union perf_event *event)		\</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, session, event);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_OP2(auxtrace_error);</div><div class='add'>+CREATE_DELEGATE_OP2(auxtrace_info);</div><div class='add'>+CREATE_DELEGATE_OP2(bpf_metadata);</div><div class='add'>+CREATE_DELEGATE_OP2(build_id);</div><div class='add'>+CREATE_DELEGATE_OP2(cpu_map);</div><div class='add'>+CREATE_DELEGATE_OP2(feature);</div><div class='add'>+CREATE_DELEGATE_OP2(finished_init);</div><div class='add'>+CREATE_DELEGATE_OP2(id_index);</div><div class='add'>+CREATE_DELEGATE_OP2(stat);</div><div class='add'>+CREATE_DELEGATE_OP2(stat_config);</div><div class='add'>+CREATE_DELEGATE_OP2(stat_round);</div><div class='add'>+CREATE_DELEGATE_OP2(thread_map);</div><div class='add'>+CREATE_DELEGATE_OP2(time_conv);</div><div class='add'>+CREATE_DELEGATE_OP2(tracing_data);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_OP3(name)					\</div><div class='add'>+	static s64 delegate_ ## name(const struct perf_tool *tool,	\</div><div class='add'>+				     struct perf_session *session,      \</div><div class='add'>+				     union perf_event *event)           \</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;	\</div><div class='add'>+		return delegate-&gt;name(delegate, session, event);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_OP3(auxtrace);</div><div class='add'>+</div><div class='add'>+#define CREATE_DELEGATE_OP4(name)					\</div><div class='add'>+	static int delegate_ ## name(const struct perf_tool *tool, \</div><div class='add'>+			struct perf_session *session, \</div><div class='add'>+			union perf_event *event, \</div><div class='add'>+			u64 data, \</div><div class='add'>+			const char *str) \</div><div class='add'>+	{								\</div><div class='add'>+		struct delegate_tool *del_tool = container_of(tool, struct delegate_tool, tool); \</div><div class='add'>+		struct perf_tool *delegate = del_tool-&gt;delegate;		\</div><div class='add'>+		return delegate-&gt;name(delegate, session, event, data, str);	\</div><div class='add'>+	}</div><div class='add'>+CREATE_DELEGATE_OP4(compressed);</div><div class='add'>+</div><div class='add'>+void delegate_tool__init(struct delegate_tool *tool, struct perf_tool *delegate)</div><div class='add'>+{</div><div class='add'>+	tool-&gt;delegate = delegate;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.ordered_events = delegate-&gt;ordered_events;</div><div class='add'>+	tool-&gt;tool.ordering_requires_timestamps = delegate-&gt;ordering_requires_timestamps;</div><div class='add'>+	tool-&gt;tool.namespace_events = delegate-&gt;namespace_events;</div><div class='add'>+	tool-&gt;tool.cgroup_events = delegate-&gt;cgroup_events;</div><div class='add'>+	tool-&gt;tool.no_warn = delegate-&gt;no_warn;</div><div class='add'>+	tool-&gt;tool.show_feat_hdr = delegate-&gt;show_feat_hdr;</div><div class='add'>+	tool-&gt;tool.merge_deferred_callchains = delegate-&gt;merge_deferred_callchains;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.sample = delegate_sample;</div><div class='add'>+	tool-&gt;tool.read = delegate_read;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.mmap = delegate_mmap;</div><div class='add'>+	tool-&gt;tool.mmap2 = delegate_mmap2;</div><div class='add'>+	tool-&gt;tool.comm = delegate_comm;</div><div class='add'>+	tool-&gt;tool.namespaces = delegate_namespaces;</div><div class='add'>+	tool-&gt;tool.cgroup = delegate_cgroup;</div><div class='add'>+	tool-&gt;tool.fork = delegate_fork;</div><div class='add'>+	tool-&gt;tool.exit = delegate_exit;</div><div class='add'>+	tool-&gt;tool.lost = delegate_lost;</div><div class='add'>+	tool-&gt;tool.lost_samples = delegate_lost_samples;</div><div class='add'>+	tool-&gt;tool.aux = delegate_aux;</div><div class='add'>+	tool-&gt;tool.itrace_start = delegate_itrace_start;</div><div class='add'>+	tool-&gt;tool.aux_output_hw_id = delegate_aux_output_hw_id;</div><div class='add'>+	tool-&gt;tool.context_switch = delegate_context_switch;</div><div class='add'>+	tool-&gt;tool.throttle = delegate_throttle;</div><div class='add'>+	tool-&gt;tool.unthrottle = delegate_unthrottle;</div><div class='add'>+	tool-&gt;tool.ksymbol = delegate_ksymbol;</div><div class='add'>+	tool-&gt;tool.bpf = delegate_bpf;</div><div class='add'>+	tool-&gt;tool.text_poke = delegate_text_poke;</div><div class='add'>+	tool-&gt;tool.callchain_deferred = delegate_callchain_deferred;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.attr = delegate_attr;</div><div class='add'>+	tool-&gt;tool.event_update = delegate_event_update;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.tracing_data = delegate_tracing_data;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.finished_round = delegate_finished_round;</div><div class='add'>+</div><div class='add'>+	tool-&gt;tool.build_id = delegate_build_id;</div><div class='add'>+	tool-&gt;tool.id_index = delegate_id_index;</div><div class='add'>+	tool-&gt;tool.auxtrace_info = delegate_auxtrace_info;</div><div class='add'>+	tool-&gt;tool.auxtrace_error = delegate_auxtrace_error;</div><div class='add'>+	tool-&gt;tool.time_conv = delegate_time_conv;</div><div class='add'>+	tool-&gt;tool.thread_map = delegate_thread_map;</div><div class='add'>+	tool-&gt;tool.cpu_map = delegate_cpu_map;</div><div class='add'>+	tool-&gt;tool.stat_config = delegate_stat_config;</div><div class='add'>+	tool-&gt;tool.stat = delegate_stat;</div><div class='add'>+	tool-&gt;tool.stat_round = delegate_stat_round;</div><div class='add'>+	tool-&gt;tool.feature = delegate_feature;</div><div class='add'>+	tool-&gt;tool.finished_init = delegate_finished_init;</div><div class='add'>+	tool-&gt;tool.bpf_metadata = delegate_bpf_metadata;</div><div class='add'>+	tool-&gt;tool.compressed = delegate_compressed;</div><div class='add'>+	tool-&gt;tool.auxtrace = delegate_auxtrace;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/perf/util/tool.h b/tools/perf/util/tool.h<br/>index 18b76ff0f26a..e96b69d25a5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/tool.h</a></div><div class='hunk'>@@ -26,10 +26,12 @@ typedef int (*event_attr_op)(const struct perf_tool *tool,</div><div class='ctx'> 			     union perf_event *event,</div><div class='ctx'> 			     struct evlist **pevlist);</div><div class='ctx'> </div><div class='del'>-typedef int (*event_op2)(struct perf_session *session, union perf_event *event);</div><div class='del'>-typedef s64 (*event_op3)(struct perf_session *session, union perf_event *event);</div><div class='del'>-typedef int (*event_op4)(struct perf_session *session, union perf_event *event, u64 data,</div><div class='del'>-			 const char *str);</div><div class='add'>+typedef int (*event_op2)(const struct perf_tool *tool, struct perf_session *session,</div><div class='add'>+			 union perf_event *event);</div><div class='add'>+typedef s64 (*event_op3)(const struct perf_tool *tool, struct perf_session *session,</div><div class='add'>+			 union perf_event *event);</div><div class='add'>+typedef int (*event_op4)(const struct perf_tool *tool, struct perf_session *session,</div><div class='add'>+			 union perf_event *event, u64 data, const char *str);</div><div class='ctx'> </div><div class='ctx'> typedef int (*event_oe)(const struct perf_tool *tool, union perf_event *event,</div><div class='ctx'> 			struct ordered_events *oe);</div><div class='hunk'>@@ -42,7 +44,8 @@ enum show_feature_header {</div><div class='ctx'> </div><div class='ctx'> struct perf_tool {</div><div class='ctx'> 	event_sample	sample,</div><div class='del'>-			read;</div><div class='add'>+			read,</div><div class='add'>+			callchain_deferred;</div><div class='ctx'> 	event_op	mmap,</div><div class='ctx'> 			mmap2,</div><div class='ctx'> 			comm,</div><div class='hunk'>@@ -87,6 +90,7 @@ struct perf_tool {</div><div class='ctx'> 	bool		cgroup_events;</div><div class='ctx'> 	bool		no_warn;</div><div class='ctx'> 	bool		dont_split_sample_group;</div><div class='add'>+	bool		merge_deferred_callchains;</div><div class='ctx'> 	enum show_feature_header show_feat_hdr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -100,4 +104,13 @@ int process_event_sample_stub(const struct perf_tool *tool,</div><div class='ctx'> 			      struct evsel *evsel,</div><div class='ctx'> 			      struct machine *machine);</div><div class='ctx'> </div><div class='add'>+struct delegate_tool {</div><div class='add'>+	/** @tool: The actual tool that calls the delegate. */</div><div class='add'>+	struct perf_tool tool;</div><div class='add'>+	/** @delegate: The tool that is delegated to. */</div><div class='add'>+	struct perf_tool *delegate;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void delegate_tool__init(struct delegate_tool *tool, struct perf_tool *delegate);</div><div class='add'>+</div><div class='ctx'> #endif /* __PERF_TOOL_H */</div><div class='head'>diff --git a/tools/perf/util/tool_pmu.c b/tools/perf/util/tool_pmu.c<br/>index d99e699e646d..37c4eae0bef1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool_pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool_pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool_pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/tool_pmu.c</a></div><div class='hunk'>@@ -2,16 +2,19 @@</div><div class='ctx'> #include "cgroup.h"</div><div class='ctx'> #include "counts.h"</div><div class='ctx'> #include "cputopo.h"</div><div class='add'>+#include "debug.h"</div><div class='ctx'> #include "evsel.h"</div><div class='ctx'> #include "pmu.h"</div><div class='ctx'> #include "print-events.h"</div><div class='ctx'> #include "smt.h"</div><div class='add'>+#include "stat.h"</div><div class='ctx'> #include "time-utils.h"</div><div class='ctx'> #include "tool_pmu.h"</div><div class='ctx'> #include "tsc.h"</div><div class='ctx'> #include &lt;api/fs/fs.h&gt;</div><div class='ctx'> #include &lt;api/io.h&gt;</div><div class='ctx'> #include &lt;internal/threadmap.h&gt;</div><div class='add'>+#include &lt;perf/cpumap.h&gt;</div><div class='ctx'> #include &lt;perf/threadmap.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='ctx'> #include &lt;strings.h&gt;</div><div class='hunk'>@@ -30,6 +33,8 @@ static const char *const tool_pmu__event_names[TOOL_PMU__EVENT_MAX] = {</div><div class='ctx'> 	"slots",</div><div class='ctx'> 	"smt_on",</div><div class='ctx'> 	"system_tsc_freq",</div><div class='add'>+	"core_wide",</div><div class='add'>+	"target_cpu",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool tool_pmu__skip_event(const char *name __maybe_unused)</div><div class='hunk'>@@ -106,6 +111,23 @@ const char *evsel__tool_pmu_event_name(const struct evsel *evsel)</div><div class='ctx'> 	return tool_pmu__event_to_str(evsel-&gt;core.attr.config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct perf_cpu_map *tool_pmu__cpus(struct perf_event_attr *attr)</div><div class='add'>+{</div><div class='add'>+	static struct perf_cpu_map *cpu0_map;</div><div class='add'>+	enum tool_pmu_event event = (enum tool_pmu_event)attr-&gt;config;</div><div class='add'>+</div><div class='add'>+	if (event &lt;= TOOL_PMU__EVENT_NONE || event &gt;= TOOL_PMU__EVENT_MAX) {</div><div class='add'>+		pr_err("Invalid tool PMU event config %llx\n", attr-&gt;config);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	if (event == TOOL_PMU__EVENT_USER_TIME || event == TOOL_PMU__EVENT_SYSTEM_TIME)</div><div class='add'>+		return cpu_map__online();</div><div class='add'>+</div><div class='add'>+	if (!cpu0_map)</div><div class='add'>+		cpu0_map = perf_cpu_map__new_int(0);</div><div class='add'>+	return perf_cpu_map__get(cpu0_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool read_until_char(struct io *io, char e)</div><div class='ctx'> {</div><div class='ctx'> 	int c;</div><div class='hunk'>@@ -239,9 +261,6 @@ int evsel__tool_pmu_open(struct evsel *evsel,</div><div class='ctx'> 	nthreads = perf_thread_map__nr(threads);</div><div class='ctx'> 	for (idx = start_cpu_map_idx; idx &lt; end_cpu_map_idx; idx++) {</div><div class='ctx'> 		for (thread = 0; thread &lt; nthreads; thread++) {</div><div class='del'>-			if (thread &gt;= nthreads)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='ctx'> 			if (!evsel-&gt;cgrp &amp;&amp; !evsel-&gt;core.system_wide)</div><div class='ctx'> 				pid = perf_thread_map__pid(threads, thread);</div><div class='ctx'> </div><div class='hunk'>@@ -332,7 +351,11 @@ static bool has_pmem(void)</div><div class='ctx'> 	return has_pmem;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool tool_pmu__read_event(enum tool_pmu_event ev, struct evsel *evsel, u64 *result)</div><div class='add'>+bool tool_pmu__read_event(enum tool_pmu_event ev,</div><div class='add'>+			  struct evsel *evsel,</div><div class='add'>+			  bool system_wide,</div><div class='add'>+			  const char *user_requested_cpu_list,</div><div class='add'>+			  u64 *result)</div><div class='ctx'> {</div><div class='ctx'> 	const struct cpu_topology *topology;</div><div class='ctx'> </div><div class='hunk'>@@ -424,6 +447,14 @@ bool tool_pmu__read_event(enum tool_pmu_event ev, struct evsel *evsel, u64 *resu</div><div class='ctx'> 		*result = arch_get_tsc_freq();</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	case TOOL_PMU__EVENT_CORE_WIDE:</div><div class='add'>+		*result = core_wide(system_wide, user_requested_cpu_list) ? 1 : 0;</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	case TOOL_PMU__EVENT_TARGET_CPU:</div><div class='add'>+		*result = system_wide || (user_requested_cpu_list != NULL) ? 1 : 0;</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	case TOOL_PMU__EVENT_NONE:</div><div class='ctx'> 	case TOOL_PMU__EVENT_DURATION_TIME:</div><div class='ctx'> 	case TOOL_PMU__EVENT_USER_TIME:</div><div class='hunk'>@@ -434,16 +465,39 @@ bool tool_pmu__read_event(enum tool_pmu_event ev, struct evsel *evsel, u64 *resu</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void perf_counts__update(struct perf_counts_values *count,</div><div class='add'>+				const struct perf_counts_values *old_count,</div><div class='add'>+				bool raw, u64 val)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The values of enabled and running must make a ratio of 100%. The</div><div class='add'>+	 * exact values don't matter as long as they are non-zero to avoid</div><div class='add'>+	 * issues with evsel__count_has_error.</div><div class='add'>+	 */</div><div class='add'>+	if (old_count) {</div><div class='add'>+		count-&gt;val = raw ? val : old_count-&gt;val + val;</div><div class='add'>+		count-&gt;run = old_count-&gt;run + 1;</div><div class='add'>+		count-&gt;ena = old_count-&gt;ena + 1;</div><div class='add'>+		count-&gt;lost = old_count-&gt;lost;</div><div class='add'>+	} else {</div><div class='add'>+		count-&gt;val = val;</div><div class='add'>+		count-&gt;run++;</div><div class='add'>+		count-&gt;ena++;</div><div class='add'>+		count-&gt;lost = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int evsel__tool_pmu_read(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> {</div><div class='ctx'> 	__u64 *start_time, cur_time, delta_start;</div><div class='del'>-	u64 val;</div><div class='del'>-	int fd, err = 0;</div><div class='add'>+	int err = 0;</div><div class='ctx'> 	struct perf_counts_values *count, *old_count = NULL;</div><div class='ctx'> 	bool adjust = false;</div><div class='ctx'> 	enum tool_pmu_event ev = evsel__tool_event(evsel);</div><div class='ctx'> </div><div class='ctx'> 	count = perf_counts(evsel-&gt;counts, cpu_map_idx, thread);</div><div class='add'>+	if (evsel-&gt;prev_raw_counts)</div><div class='add'>+		old_count = perf_counts(evsel-&gt;prev_raw_counts, cpu_map_idx, thread);</div><div class='ctx'> </div><div class='ctx'> 	switch (ev) {</div><div class='ctx'> 	case TOOL_PMU__EVENT_HAS_PMEM:</div><div class='hunk'>@@ -454,26 +508,23 @@ int evsel__tool_pmu_read(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> 	case TOOL_PMU__EVENT_NUM_PACKAGES:</div><div class='ctx'> 	case TOOL_PMU__EVENT_SLOTS:</div><div class='ctx'> 	case TOOL_PMU__EVENT_SMT_ON:</div><div class='del'>-	case TOOL_PMU__EVENT_SYSTEM_TSC_FREQ:</div><div class='del'>-		if (evsel-&gt;prev_raw_counts)</div><div class='del'>-			old_count = perf_counts(evsel-&gt;prev_raw_counts, cpu_map_idx, thread);</div><div class='del'>-		val = 0;</div><div class='add'>+	case TOOL_PMU__EVENT_CORE_WIDE:</div><div class='add'>+	case TOOL_PMU__EVENT_TARGET_CPU:</div><div class='add'>+	case TOOL_PMU__EVENT_SYSTEM_TSC_FREQ: {</div><div class='add'>+		u64 val = 0;</div><div class='add'>+</div><div class='ctx'> 		if (cpu_map_idx == 0 &amp;&amp; thread == 0) {</div><div class='del'>-			if (!tool_pmu__read_event(ev, evsel, &amp;val)) {</div><div class='add'>+			if (!tool_pmu__read_event(ev, evsel,</div><div class='add'>+						  stat_config.system_wide,</div><div class='add'>+						  stat_config.user_requested_cpu_list,</div><div class='add'>+						  &amp;val)) {</div><div class='ctx'> 				count-&gt;lost++;</div><div class='ctx'> 				val = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		if (old_count) {</div><div class='del'>-			count-&gt;val = old_count-&gt;val + val;</div><div class='del'>-			count-&gt;run = old_count-&gt;run + 1;</div><div class='del'>-			count-&gt;ena = old_count-&gt;ena + 1;</div><div class='del'>-		} else {</div><div class='del'>-			count-&gt;val = val;</div><div class='del'>-			count-&gt;run++;</div><div class='del'>-			count-&gt;ena++;</div><div class='del'>-		}</div><div class='add'>+		perf_counts__update(count, old_count, /*raw=*/false, val);</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	case TOOL_PMU__EVENT_DURATION_TIME:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Pretend duration_time is only on the first CPU and thread, or</div><div class='hunk'>@@ -489,9 +540,9 @@ int evsel__tool_pmu_read(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> 	case TOOL_PMU__EVENT_USER_TIME:</div><div class='ctx'> 	case TOOL_PMU__EVENT_SYSTEM_TIME: {</div><div class='ctx'> 		bool system = evsel__tool_event(evsel) == TOOL_PMU__EVENT_SYSTEM_TIME;</div><div class='add'>+		int fd = FD(evsel, cpu_map_idx, thread);</div><div class='ctx'> </div><div class='ctx'> 		start_time = xyarray__entry(evsel-&gt;start_times, cpu_map_idx, thread);</div><div class='del'>-		fd = FD(evsel, cpu_map_idx, thread);</div><div class='ctx'> 		lseek(fd, SEEK_SET, 0);</div><div class='ctx'> 		if (evsel-&gt;pid_stat) {</div><div class='ctx'> 			/* The event exists solely on 1 CPU. */</div><div class='hunk'>@@ -525,17 +576,9 @@ int evsel__tool_pmu_read(struct evsel *evsel, int cpu_map_idx, int thread)</div><div class='ctx'> 	if (adjust) {</div><div class='ctx'> 		__u64 ticks_per_sec = sysconf(_SC_CLK_TCK);</div><div class='ctx'> </div><div class='del'>-		delta_start *= 1000000000 / ticks_per_sec;</div><div class='add'>+		delta_start *= 1e9 / ticks_per_sec;</div><div class='ctx'> 	}</div><div class='del'>-	count-&gt;val    = delta_start;</div><div class='del'>-	count-&gt;lost   = 0;</div><div class='del'>-	/*</div><div class='del'>-	 * The values of enabled and running must make a ratio of 100%. The</div><div class='del'>-	 * exact values don't matter as long as they are non-zero to avoid</div><div class='del'>-	 * issues with evsel__count_has_error.</div><div class='del'>-	 */</div><div class='del'>-	count-&gt;ena++;</div><div class='del'>-	count-&gt;run++;</div><div class='add'>+	perf_counts__update(count, old_count, /*raw=*/true, delta_start);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/perf/util/tool_pmu.h b/tools/perf/util/tool_pmu.h<br/>index d642e7d73910..ea343d1983d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool_pmu.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tool_pmu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tool_pmu.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/tool_pmu.h</a></div><div class='hunk'>@@ -22,6 +22,8 @@ enum tool_pmu_event {</div><div class='ctx'> 	TOOL_PMU__EVENT_SLOTS,</div><div class='ctx'> 	TOOL_PMU__EVENT_SMT_ON,</div><div class='ctx'> 	TOOL_PMU__EVENT_SYSTEM_TSC_FREQ,</div><div class='add'>+	TOOL_PMU__EVENT_CORE_WIDE,</div><div class='add'>+	TOOL_PMU__EVENT_TARGET_CPU,</div><div class='ctx'> </div><div class='ctx'> 	TOOL_PMU__EVENT_MAX,</div><div class='ctx'> };</div><div class='hunk'>@@ -34,11 +36,17 @@ enum tool_pmu_event tool_pmu__str_to_event(const char *str);</div><div class='ctx'> bool tool_pmu__skip_event(const char *name);</div><div class='ctx'> int tool_pmu__num_skip_events(void);</div><div class='ctx'> </div><div class='del'>-bool tool_pmu__read_event(enum tool_pmu_event ev, struct evsel *evsel, u64 *result);</div><div class='add'>+bool tool_pmu__read_event(enum tool_pmu_event ev,</div><div class='add'>+			  struct evsel *evsel,</div><div class='add'>+			  bool system_wide,</div><div class='add'>+			  const char *user_requested_cpu_list,</div><div class='add'>+			  u64 *result);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> u64 tool_pmu__cpu_slots_per_cycle(void);</div><div class='ctx'> </div><div class='ctx'> bool perf_pmu__is_tool(const struct perf_pmu *pmu);</div><div class='add'>+struct perf_cpu_map *tool_pmu__cpus(struct perf_event_attr *attr);</div><div class='ctx'> </div><div class='ctx'> bool evsel__is_tool(const struct evsel *evsel);</div><div class='ctx'> enum tool_pmu_event evsel__tool_event(const struct evsel *evsel);</div><div class='head'>diff --git a/tools/perf/util/tp_pmu.c b/tools/perf/util/tp_pmu.c<br/>index e7534a973247..eddb9807131a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tp_pmu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/tp_pmu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/tp_pmu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/tp_pmu.c</a></div><div class='hunk'>@@ -88,8 +88,6 @@ int tp_pmu__for_each_tp_sys(void *state, tp_sys_callback cb)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		ret = cb(state, events_ent-&gt;d_name);</div><div class='del'>-		if (ret)</div><div class='del'>-			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	close(events_dir.dirfd);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/tools/perf/util/trace.h b/tools/perf/util/trace.h<br/>index fa8d480527a2..fbbcfe6f44fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/trace.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/trace.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@ enum trace_summary_mode {</div><div class='ctx'> int trace_prepare_bpf_summary(enum trace_summary_mode mode);</div><div class='ctx'> void trace_start_bpf_summary(void);</div><div class='ctx'> void trace_end_bpf_summary(void);</div><div class='del'>-int trace_print_bpf_summary(FILE *fp);</div><div class='add'>+int trace_print_bpf_summary(FILE *fp, int max_summary);</div><div class='ctx'> void trace_cleanup_bpf_summary(void);</div><div class='ctx'> </div><div class='ctx'> #else /* !HAVE_BPF_SKEL */</div><div class='hunk'>@@ -27,7 +27,7 @@ static inline int trace_prepare_bpf_summary(enum trace_summary_mode mode __maybe</div><div class='ctx'> }</div><div class='ctx'> static inline void trace_start_bpf_summary(void) {}</div><div class='ctx'> static inline void trace_end_bpf_summary(void) {}</div><div class='del'>-static inline int trace_print_bpf_summary(FILE *fp __maybe_unused)</div><div class='add'>+static inline int trace_print_bpf_summary(FILE *fp __maybe_unused, int max_summary __maybe_unused)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/perf/util/zlib.c b/tools/perf/util/zlib.c<br/>index 78d2297c1b67..1f7c06523059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/perf/util/zlib.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/perf/util/zlib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/perf/util/zlib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/perf/util/zlib.c</a></div><div class='hunk'>@@ -88,7 +88,7 @@ bool gzip_is_compressed(const char *input)</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> </div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-		return -1;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	rc = read(fd, buf, sizeof(buf));</div><div class='ctx'> 	close(fd);</div><div class='head'>diff --git a/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c b/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c<br/>index 9741e7503591..de93067a5da3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/os_specific/service_layers/oslinuxtbl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/acpi/os_specific/service_layers/oslinuxtbl.c</a></div><div class='hunk'>@@ -995,7 +995,7 @@ static acpi_status osl_list_customized_tables(char *directory)</div><div class='ctx'> {</div><div class='ctx'> 	void *table_dir;</div><div class='ctx'> 	u32 instance;</div><div class='del'>-	char temp_name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char temp_name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	char *filename;</div><div class='ctx'> 	acpi_status status = AE_OK;</div><div class='ctx'> </div><div class='hunk'>@@ -1312,7 +1312,7 @@ osl_get_customized_table(char *pathname,</div><div class='ctx'> {</div><div class='ctx'> 	void *table_dir;</div><div class='ctx'> 	u32 current_instance = 0;</div><div class='del'>-	char temp_name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char temp_name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	char table_filename[PATH_MAX];</div><div class='ctx'> 	char *filename;</div><div class='ctx'> 	acpi_status status;</div><div class='head'>diff --git a/tools/power/acpi/tools/acpidump/apdump.c b/tools/power/acpi/tools/acpidump/apdump.c<br/>index bf30143efbdc..7a6223aa703c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/acpidump/apdump.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/acpidump/apdump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/acpidump/apdump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/acpi/tools/acpidump/apdump.c</a></div><div class='hunk'>@@ -86,9 +86,10 @@ u8 ap_is_valid_checksum(struct acpi_table_header *table)</div><div class='ctx'> 	if (ACPI_FAILURE(status)) {</div><div class='ctx'> 		fprintf(stderr, "%4.4s: Warning: wrong checksum in table\n",</div><div class='ctx'> 			table-&gt;signature);</div><div class='add'>+		return (FALSE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return (AE_OK);</div><div class='add'>+	return (TRUE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='head'>diff --git a/tools/power/acpi/tools/acpidump/apfiles.c b/tools/power/acpi/tools/acpidump/apfiles.c<br/>index 75db0091e275..d6b8a201480b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/acpidump/apfiles.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/acpidump/apfiles.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/acpidump/apfiles.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/acpi/tools/acpidump/apfiles.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ int ap_open_output_file(char *pathname)</div><div class='ctx'> </div><div class='ctx'> int ap_write_to_binary_file(struct acpi_table_header *table, u32 instance)</div><div class='ctx'> {</div><div class='del'>-	char filename[ACPI_NAMESEG_SIZE + 16] ACPI_NONSTRING;</div><div class='add'>+	char filename[ACPI_NAMESEG_SIZE + 16];</div><div class='ctx'> 	char instance_str[16];</div><div class='ctx'> 	ACPI_FILE file;</div><div class='ctx'> 	acpi_size actual;</div><div class='head'>diff --git a/tools/power/acpi/tools/pfrut/pfrut.c b/tools/power/acpi/tools/pfrut/pfrut.c<br/>index 44a9ecbd91e8..4d9b0177c312 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/pfrut/pfrut.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/acpi/tools/pfrut/pfrut.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/acpi/tools/pfrut/pfrut.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/acpi/tools/pfrut/pfrut.c</a></div><div class='hunk'>@@ -222,6 +222,7 @@ int main(int argc, char *argv[])</div><div class='ctx'> 	fd_update_log = open("/dev/acpi_pfr_telemetry0", O_RDWR);</div><div class='ctx'> 	if (fd_update_log &lt; 0) {</div><div class='ctx'> 		printf("PFRT device not supported - Quit...\n");</div><div class='add'>+		close(fd_update);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -265,7 +266,8 @@ int main(int argc, char *argv[])</div><div class='ctx'> 		printf("chunk2_size:%d\n", data_info.chunk2_size);</div><div class='ctx'> 		printf("rollover_cnt:%d\n", data_info.rollover_cnt);</div><div class='ctx'> 		printf("reset_cnt:%d\n", data_info.reset_cnt);</div><div class='del'>-</div><div class='add'>+		close(fd_update);</div><div class='add'>+		close(fd_update_log);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -358,6 +360,7 @@ int main(int argc, char *argv[])</div><div class='ctx'> </div><div class='ctx'> 		if (ret == -1) {</div><div class='ctx'> 			perror("Failed to load capsule file");</div><div class='add'>+			munmap(addr_map_capsule, st.st_size);</div><div class='ctx'> 			close(fd_capsule);</div><div class='ctx'> 			close(fd_update);</div><div class='ctx'> 			close(fd_update_log);</div><div class='hunk'>@@ -420,7 +423,7 @@ int main(int argc, char *argv[])</div><div class='ctx'> 		if (p_mmap == MAP_FAILED) {</div><div class='ctx'> 			perror("mmap error.");</div><div class='ctx'> 			close(fd_update_log);</div><div class='del'>-</div><div class='add'>+			free(log_buf);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/power/cpupower/.gitignore b/tools/power/cpupower/.gitignore<br/>index 5113d5a7aee0..7677329c42a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/.gitignore?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/.gitignore</a></div><div class='hunk'>@@ -27,6 +27,3 @@ debug/i386/intel_gsic</div><div class='ctx'> debug/i386/powernow-k8-decode</div><div class='ctx'> debug/x86_64/centrino-decode</div><div class='ctx'> debug/x86_64/powernow-k8-decode</div><div class='del'>-</div><div class='del'>-# Clang's compilation database file</div><div class='del'>-compile_commands.json</div><div class='head'>diff --git a/tools/power/cpupower/Makefile b/tools/power/cpupower/Makefile<br/>index c43db1c41205..a1df9196dc45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/Makefile</a></div><div class='hunk'>@@ -37,9 +37,7 @@ NLS ?=		true</div><div class='ctx'> # cpufreq-bench benchmarking tool</div><div class='ctx'> CPUFREQ_BENCH ?= true</div><div class='ctx'> </div><div class='del'>-# Do not build libraries, but build the code in statically</div><div class='del'>-# Libraries are still built, otherwise the Makefile code would</div><div class='del'>-# be rather ugly.</div><div class='add'>+# Build the code, including libraries, statically.</div><div class='ctx'> export STATIC ?= false</div><div class='ctx'> </div><div class='ctx'> # Prefix to the directories we're installing to</div><div class='hunk'>@@ -207,14 +205,25 @@ $(OUTPUT)lib/%.o: $(LIB_SRC) $(LIB_HEADERS)</div><div class='ctx'> 	$(ECHO) "  CC      " $@</div><div class='ctx'> 	$(QUIET) $(CC) $(CFLAGS) -fPIC -o $@ -c lib/$*.c</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)libcpupower.so.$(LIB_VER): $(LIB_OBJS)</div><div class='add'>+ifeq ($(strip $(STATIC)),true)</div><div class='add'>+LIBCPUPOWER := libcpupower.a</div><div class='add'>+else</div><div class='add'>+LIBCPUPOWER := libcpupower.so.$(LIB_VER)</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+$(OUTPUT)$(LIBCPUPOWER): $(LIB_OBJS)</div><div class='add'>+ifeq ($(strip $(STATIC)),true)</div><div class='add'>+	$(ECHO) "  AR      " $@</div><div class='add'>+	$(QUIET) $(AR) rcs $@ $(LIB_OBJS)</div><div class='add'>+else</div><div class='ctx'> 	$(ECHO) "  LD      " $@</div><div class='ctx'> 	$(QUIET) $(CC) -shared $(CFLAGS) $(LDFLAGS) -o $@ \</div><div class='ctx'> 		-Wl,-soname,libcpupower.so.$(LIB_MAJ) $(LIB_OBJS)</div><div class='ctx'> 	@ln -sf $(@F) $(OUTPUT)libcpupower.so</div><div class='ctx'> 	@ln -sf $(@F) $(OUTPUT)libcpupower.so.$(LIB_MAJ)</div><div class='add'>+endif</div><div class='ctx'> </div><div class='del'>-libcpupower: $(OUTPUT)libcpupower.so.$(LIB_VER)</div><div class='add'>+libcpupower: $(OUTPUT)$(LIBCPUPOWER)</div><div class='ctx'> </div><div class='ctx'> # Let all .o files depend on its .c file and all headers</div><div class='ctx'> # Might be worth to put this into utils/Makefile at some point of time</div><div class='hunk'>@@ -224,7 +233,7 @@ $(OUTPUT)%.o: %.c</div><div class='ctx'> 	$(ECHO) "  CC      " $@</div><div class='ctx'> 	$(QUIET) $(CC) $(CFLAGS) -I./lib -I ./utils -o $@ -c $*.c</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)libcpupower.so.$(LIB_VER)</div><div class='add'>+$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)$(LIBCPUPOWER)</div><div class='ctx'> 	$(ECHO) "  CC      " $@</div><div class='ctx'> ifeq ($(strip $(STATIC)),true)</div><div class='ctx'> 	$(QUIET) $(CC) $(CFLAGS) $(LDFLAGS) $(UTIL_OBJS) -lrt -lpci -L$(OUTPUT) -o $@</div><div class='hunk'>@@ -269,7 +278,7 @@ update-po: $(OUTPUT)po/$(PACKAGE).pot</div><div class='ctx'> 	done;</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-compile-bench: $(OUTPUT)libcpupower.so.$(LIB_VER)</div><div class='add'>+compile-bench: $(OUTPUT)$(LIBCPUPOWER)</div><div class='ctx'> 	@V=$(V) confdir=$(confdir) $(MAKE) -C bench O=$(OUTPUT)</div><div class='ctx'> </div><div class='ctx'> # we compile into subdirectories. if the target directory is not the</div><div class='hunk'>@@ -287,6 +296,7 @@ clean:</div><div class='ctx'> 	-find $(OUTPUT) \( -not -type d \) -and \( -name '*~' -o -name '*.[oas]' \) -type f -print \</div><div class='ctx'> 	 | xargs rm -f</div><div class='ctx'> 	-rm -f $(OUTPUT)cpupower</div><div class='add'>+	-rm -f $(OUTPUT)libcpupower.a</div><div class='ctx'> 	-rm -f $(OUTPUT)libcpupower.so*</div><div class='ctx'> 	-rm -rf $(OUTPUT)po/*.gmo</div><div class='ctx'> 	-rm -rf $(OUTPUT)po/*.pot</div><div class='hunk'>@@ -295,7 +305,11 @@ clean:</div><div class='ctx'> </div><div class='ctx'> install-lib: libcpupower</div><div class='ctx'> 	$(INSTALL) -d $(DESTDIR)${libdir}</div><div class='add'>+ifeq ($(strip $(STATIC)),true)</div><div class='add'>+	$(CP) $(OUTPUT)libcpupower.a $(DESTDIR)${libdir}/</div><div class='add'>+else</div><div class='ctx'> 	$(CP) $(OUTPUT)libcpupower.so* $(DESTDIR)${libdir}/</div><div class='add'>+endif</div><div class='ctx'> 	$(INSTALL) -d $(DESTDIR)${includedir}</div><div class='ctx'> 	$(INSTALL_DATA) lib/cpufreq.h $(DESTDIR)${includedir}/cpufreq.h</div><div class='ctx'> 	$(INSTALL_DATA) lib/cpuidle.h $(DESTDIR)${includedir}/cpuidle.h</div><div class='hunk'>@@ -336,11 +350,7 @@ install-bench: compile-bench</div><div class='ctx'> 	@#DESTDIR must be set from outside to survive</div><div class='ctx'> 	@sbindir=$(sbindir) bindir=$(bindir) docdir=$(docdir) confdir=$(confdir) $(MAKE) -C bench O=$(OUTPUT) install</div><div class='ctx'> </div><div class='del'>-ifeq ($(strip $(STATIC)),true)</div><div class='del'>-install: all install-tools install-man $(INSTALL_NLS) $(INSTALL_BENCH)</div><div class='del'>-else</div><div class='ctx'> install: all install-lib install-tools install-man $(INSTALL_NLS) $(INSTALL_BENCH)</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> uninstall:</div><div class='ctx'> 	- rm -f $(DESTDIR)${libdir}/libcpupower.*</div><div class='head'>diff --git a/tools/power/cpupower/lib/cpuidle.c b/tools/power/cpupower/lib/cpuidle.c<br/>index 0ecac009273c..f2c1139adf71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/lib/cpuidle.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/lib/cpuidle.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/lib/cpuidle.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/lib/cpuidle.c</a></div><div class='hunk'>@@ -233,6 +233,7 @@ int cpuidle_state_disable(unsigned int cpu,</div><div class='ctx'> {</div><div class='ctx'> 	char value[SYSFS_PATH_MAX];</div><div class='ctx'> 	int bytes_written;</div><div class='add'>+	int len;</div><div class='ctx'> </div><div class='ctx'> 	if (cpuidle_state_count(cpu) &lt;= idlestate)</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -241,10 +242,10 @@ int cpuidle_state_disable(unsigned int cpu,</div><div class='ctx'> 				 idlestate_value_files[IDLESTATE_DISABLE]))</div><div class='ctx'> 		return -2;</div><div class='ctx'> </div><div class='del'>-	snprintf(value, SYSFS_PATH_MAX, "%u", disable);</div><div class='add'>+	len = snprintf(value, SYSFS_PATH_MAX, "%u", disable);</div><div class='ctx'> </div><div class='ctx'> 	bytes_written = cpuidle_state_write_file(cpu, idlestate, "disable",</div><div class='del'>-						   value, sizeof(disable));</div><div class='add'>+						   value, len);</div><div class='ctx'> 	if (bytes_written)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return -3;</div><div class='head'>diff --git a/tools/power/cpupower/lib/cpupower.c b/tools/power/cpupower/lib/cpupower.c<br/>index ce8dfb8e46ab..d7f7ec6f151c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/lib/cpupower.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/lib/cpupower.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/lib/cpupower.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/lib/cpupower.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ unsigned int cpupower_write_sysfs(const char *path, char *buf, size_t buflen)</div><div class='ctx'> 	if (numwritten &lt; 1) {</div><div class='ctx'> 		perror(path);</div><div class='ctx'> 		close(fd);</div><div class='del'>-		return -1;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	close(fd);</div><div class='head'>diff --git a/tools/power/cpupower/man/cpupower-set.1 b/tools/power/cpupower/man/cpupower-set.1<br/>index 500653ef98c7..8ac82b6f9189 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/man/cpupower-set.1?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/man/cpupower-set.1</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/man/cpupower-set.1?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/man/cpupower-set.1</a></div><div class='hunk'>@@ -81,10 +81,11 @@ Refer to the AMD P-State kernel documentation for further information.</div><div class='ctx'> .RE</div><div class='ctx'> </div><div class='ctx'> .PP</div><div class='del'>-\-\-turbo\-boost, \-t</div><div class='add'>+\-\-turbo\-boost, \-\-boost, \-t</div><div class='ctx'> .RS 4</div><div class='del'>-This option is used to enable or disable the turbo boost feature on</div><div class='del'>-supported Intel and AMD processors.</div><div class='add'>+This option is used to enable or disable the boost feature on</div><div class='add'>+supported Intel and AMD processors, and other boost supported systems.</div><div class='add'>+(The --boost option is an alias for the --turbo-boost option)</div><div class='ctx'> </div><div class='ctx'> This option takes as parameter either \fB1\fP to enable, or \fB0\fP to disable the feature.</div><div class='ctx'> </div><div class='head'>diff --git a/tools/power/cpupower/utils/cpufreq-info.c b/tools/power/cpupower/utils/cpufreq-info.c<br/>index fc750e127404..7d3732f5f2f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/cpufreq-info.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/cpufreq-info.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/cpufreq-info.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/utils/cpufreq-info.c</a></div><div class='hunk'>@@ -128,7 +128,7 @@ static int get_boost_mode_x86(unsigned int cpu)</div><div class='ctx'> 	/* ToDo: Make this more global */</div><div class='ctx'> 	unsigned long pstates[MAX_HW_PSTATES] = {0,};</div><div class='ctx'> </div><div class='del'>-	ret = cpufreq_has_boost_support(cpu, &amp;support, &amp;active, &amp;b_states);</div><div class='add'>+	ret = cpufreq_has_x86_boost_support(cpu, &amp;support, &amp;active, &amp;b_states);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		printf(_("Error while evaluating Boost Capabilities"</div><div class='ctx'> 				" on CPU %d -- are you root?\n"), cpu);</div><div class='hunk'>@@ -204,6 +204,18 @@ static int get_boost_mode_x86(unsigned int cpu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int get_boost_mode_generic(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	bool active;</div><div class='add'>+</div><div class='add'>+	if (!cpufreq_has_generic_boost_support(&amp;active)) {</div><div class='add'>+		printf(_("  boost state support:\n"));</div><div class='add'>+		printf(_("    Active: %s\n"), active ? _("yes") : _("no"));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* --boost / -b */</div><div class='ctx'> </div><div class='ctx'> static int get_boost_mode(unsigned int cpu)</div><div class='hunk'>@@ -214,6 +226,8 @@ static int get_boost_mode(unsigned int cpu)</div><div class='ctx'> 	    cpupower_cpu_info.vendor == X86_VENDOR_HYGON ||</div><div class='ctx'> 	    cpupower_cpu_info.vendor == X86_VENDOR_INTEL)</div><div class='ctx'> 		return get_boost_mode_x86(cpu);</div><div class='add'>+	else</div><div class='add'>+		get_boost_mode_generic(cpu);</div><div class='ctx'> </div><div class='ctx'> 	freqs = cpufreq_get_boost_frequencies(cpu);</div><div class='ctx'> 	if (freqs) {</div><div class='head'>diff --git a/tools/power/cpupower/utils/cpupower-set.c b/tools/power/cpupower/utils/cpupower-set.c<br/>index 0677b58374ab..c2117e5650dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/cpupower-set.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/cpupower-set.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/cpupower-set.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/utils/cpupower-set.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@ static struct option set_opts[] = {</div><div class='ctx'> 	{"epp", required_argument, NULL, 'e'},</div><div class='ctx'> 	{"amd-pstate-mode", required_argument, NULL, 'm'},</div><div class='ctx'> 	{"turbo-boost", required_argument, NULL, 't'},</div><div class='add'>+	{"boost", required_argument, NULL, 't'},</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -62,8 +63,8 @@ int cmd_set(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	params.params = 0;</div><div class='ctx'> 	/* parameter parsing */</div><div class='del'>-	while ((ret = getopt_long(argc, argv, "b:e:m:",</div><div class='del'>-						set_opts, NULL)) != -1) {</div><div class='add'>+	while ((ret = getopt_long(argc, argv, "b:e:m:t:",</div><div class='add'>+				  set_opts, NULL)) != -1) {</div><div class='ctx'> 		switch (ret) {</div><div class='ctx'> 		case 'b':</div><div class='ctx'> 			if (params.perf_bias)</div><div class='head'>diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h<br/>index 95749b8ee475..82ea62bdf5a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/helpers/helpers.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/helpers/helpers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/helpers/helpers.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/utils/helpers/helpers.h</a></div><div class='hunk'>@@ -103,6 +103,9 @@ extern struct cpupower_cpu_info cpupower_cpu_info;</div><div class='ctx'> </div><div class='ctx'> /* cpuid and cpuinfo helpers  **************************/</div><div class='ctx'> </div><div class='add'>+int cpufreq_has_generic_boost_support(bool *active);</div><div class='add'>+int cpupower_set_turbo_boost(int turbo_boost);</div><div class='add'>+</div><div class='ctx'> /* X86 ONLY ****************************************/</div><div class='ctx'> #if defined(__i386__) || defined(__x86_64__)</div><div class='ctx'> </div><div class='hunk'>@@ -118,7 +121,6 @@ extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu);</div><div class='ctx'> </div><div class='ctx'> extern int cpupower_set_epp(unsigned int cpu, char *epp);</div><div class='ctx'> extern int cpupower_set_amd_pstate_mode(char *mode);</div><div class='del'>-extern int cpupower_set_turbo_boost(int turbo_boost);</div><div class='ctx'> </div><div class='ctx'> /* Read/Write msr ****************************/</div><div class='ctx'> </div><div class='hunk'>@@ -139,8 +141,8 @@ extern int decode_pstates(unsigned int cpu, int boost_states,</div><div class='ctx'> </div><div class='ctx'> /* AMD HW pstate decoding **************************/</div><div class='ctx'> </div><div class='del'>-extern int cpufreq_has_boost_support(unsigned int cpu, int *support,</div><div class='del'>-				     int *active, int * states);</div><div class='add'>+int cpufreq_has_x86_boost_support(unsigned int cpu, int *support,</div><div class='add'>+				  int *active, int *states);</div><div class='ctx'> </div><div class='ctx'> /* AMD P-State stuff **************************/</div><div class='ctx'> bool cpupower_amd_pstate_enabled(void);</div><div class='hunk'>@@ -181,13 +183,11 @@ static inline int cpupower_set_epp(unsigned int cpu, char *epp)</div><div class='ctx'> { return -1; };</div><div class='ctx'> static inline int cpupower_set_amd_pstate_mode(char *mode)</div><div class='ctx'> { return -1; };</div><div class='del'>-static inline int cpupower_set_turbo_boost(int turbo_boost)</div><div class='del'>-{ return -1; };</div><div class='ctx'> </div><div class='ctx'> /* Read/Write msr ****************************/</div><div class='ctx'> </div><div class='del'>-static inline int cpufreq_has_boost_support(unsigned int cpu, int *support,</div><div class='del'>-					    int *active, int * states)</div><div class='add'>+static inline int cpufreq_has_x86_boost_support(unsigned int cpu, int *support,</div><div class='add'>+						int *active, int *states)</div><div class='ctx'> { return -1; }</div><div class='ctx'> </div><div class='ctx'> static inline bool cpupower_amd_pstate_enabled(void)</div><div class='head'>diff --git a/tools/power/cpupower/utils/helpers/misc.c b/tools/power/cpupower/utils/helpers/misc.c<br/>index 76e461ff4f74..166dc1e470ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/helpers/misc.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/cpupower/utils/helpers/misc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/cpupower/utils/helpers/misc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/cpupower/utils/helpers/misc.c</a></div><div class='hunk'>@@ -8,15 +8,14 @@</div><div class='ctx'> #include "helpers/helpers.h"</div><div class='ctx'> #include "helpers/sysfs.h"</div><div class='ctx'> #include "cpufreq.h"</div><div class='add'>+#include "cpupower_intern.h"</div><div class='ctx'> </div><div class='ctx'> #if defined(__i386__) || defined(__x86_64__)</div><div class='ctx'> </div><div class='del'>-#include "cpupower_intern.h"</div><div class='del'>-</div><div class='ctx'> #define MSR_AMD_HWCR	0xc0010015</div><div class='ctx'> </div><div class='del'>-int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active,</div><div class='del'>-			int *states)</div><div class='add'>+int cpufreq_has_x86_boost_support(unsigned int cpu, int *support, int *active,</div><div class='add'>+				  int *states)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned long long val;</div><div class='hunk'>@@ -124,24 +123,6 @@ int cpupower_set_amd_pstate_mode(char *mode)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int cpupower_set_turbo_boost(int turbo_boost)</div><div class='del'>-{</div><div class='del'>-	char path[SYSFS_PATH_MAX];</div><div class='del'>-	char linebuf[2] = {};</div><div class='del'>-</div><div class='del'>-	snprintf(path, sizeof(path), PATH_TO_CPU "cpufreq/boost");</div><div class='del'>-</div><div class='del'>-	if (!is_valid_path(path))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	snprintf(linebuf, sizeof(linebuf), "%d", turbo_boost);</div><div class='del'>-</div><div class='del'>-	if (cpupower_write_sysfs(path, linebuf, 2) &lt;= 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> bool cpupower_amd_pstate_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	char *driver = cpufreq_get_driver(0);</div><div class='hunk'>@@ -160,6 +141,39 @@ bool cpupower_amd_pstate_enabled(void)</div><div class='ctx'> </div><div class='ctx'> #endif /* #if defined(__i386__) || defined(__x86_64__) */</div><div class='ctx'> </div><div class='add'>+int cpufreq_has_generic_boost_support(bool *active)</div><div class='add'>+{</div><div class='add'>+	char path[SYSFS_PATH_MAX];</div><div class='add'>+	char linebuf[2] = {};</div><div class='add'>+	unsigned long val;</div><div class='add'>+	char *endp;</div><div class='add'>+</div><div class='add'>+	snprintf(path, sizeof(path), PATH_TO_CPU "cpufreq/boost");</div><div class='add'>+</div><div class='add'>+	if (!is_valid_path(path))</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	if (cpupower_read_sysfs(path, linebuf, 2) &lt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = strtoul(linebuf, &amp;endp, 0);</div><div class='add'>+	if (endp == linebuf || errno == ERANGE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case 0:</div><div class='add'>+		*active = false;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		*active = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* get_cpustate</div><div class='ctx'>  *</div><div class='ctx'>  * Gather the information of all online CPUs into bitmask struct</div><div class='hunk'>@@ -259,3 +273,21 @@ void print_speed(unsigned long speed, int no_rounding)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int cpupower_set_turbo_boost(int turbo_boost)</div><div class='add'>+{</div><div class='add'>+	char path[SYSFS_PATH_MAX];</div><div class='add'>+	char linebuf[2] = {};</div><div class='add'>+</div><div class='add'>+	snprintf(path, sizeof(path), PATH_TO_CPU "cpufreq/boost");</div><div class='add'>+</div><div class='add'>+	if (!is_valid_path(path))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	snprintf(linebuf, sizeof(linebuf), "%d", turbo_boost);</div><div class='add'>+</div><div class='add'>+	if (cpupower_write_sysfs(path, linebuf, 2) &lt;= 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py b/tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py<br/>index feb9f9421c7b..875b086550d1 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py</a></div><div class='hunk'>@@ -11,7 +11,7 @@ Prerequisites:</div><div class='ctx'>     gnuplot 5.0 or higher</div><div class='ctx'>     gnuplot-py 1.8 or higher</div><div class='ctx'>     (Most of the distributions have these required packages. They may be called</div><div class='del'>-     gnuplot-py, phython-gnuplot or phython3-gnuplot, gnuplot-nox, ... )</div><div class='add'>+     gnuplot-py, python-gnuplot or python3-gnuplot, gnuplot-nox, ... )</div><div class='ctx'> </div><div class='ctx'>     Kernel config for Linux trace is enabled</div><div class='ctx'> </div><div class='head'>diff --git a/tools/power/x86/intel-speed-select/isst-config.c b/tools/power/x86/intel-speed-select/isst-config.c<br/>index 0ce251b8d466..558138eea75e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/intel-speed-select/isst-config.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/intel-speed-select/isst-config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/intel-speed-select/isst-config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/intel-speed-select/isst-config.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@ struct process_cmd_struct {</div><div class='ctx'> 	int arg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *version_str = "v1.23";</div><div class='add'>+static const char *version_str = "v1.24";</div><div class='ctx'> </div><div class='ctx'> static const int supported_api_ver = 3;</div><div class='ctx'> static struct isst_if_platform_info isst_platform_info;</div><div class='head'>diff --git a/tools/power/x86/intel-speed-select/isst-core-tpmi.c b/tools/power/x86/intel-speed-select/isst-core-tpmi.c<br/>index 4f389e1c0525..ebaad0dc8ca6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/intel-speed-select/isst-core-tpmi.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/intel-speed-select/isst-core-tpmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/intel-speed-select/isst-core-tpmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/intel-speed-select/isst-core-tpmi.c</a></div><div class='hunk'>@@ -452,13 +452,16 @@ static int tpmi_get_pbf_info(struct isst_id *id, int level,</div><div class='ctx'> 	return _pbf_get_coremask_info(id, level, pbf_info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define FEATURE_ENABLE_WAIT_US	1000</div><div class='add'>+#define FEATURE_ENABLE_RETRIES	5</div><div class='add'>+</div><div class='ctx'> static int tpmi_set_pbf_fact_status(struct isst_id *id, int pbf, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct isst_pkg_ctdp pkg_dev;</div><div class='ctx'> 	struct isst_pkg_ctdp_level_info ctdp_level;</div><div class='ctx'> 	int current_level;</div><div class='ctx'> 	struct isst_perf_feature_control info;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	ret = isst_get_ctdp_levels(id, &amp;pkg_dev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -503,6 +506,30 @@ static int tpmi_set_pbf_fact_status(struct isst_id *id, int pbf, int enable)</div><div class='ctx'> 	if (ret == -1)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; FEATURE_ENABLE_RETRIES; ++i) {</div><div class='add'>+</div><div class='add'>+		usleep(FEATURE_ENABLE_WAIT_US);</div><div class='add'>+</div><div class='add'>+		/* Check status */</div><div class='add'>+		ret = isst_get_ctdp_control(id, current_level, &amp;ctdp_level);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		debug_printf("pbf_enabled:%d fact_enabled:%d\n",</div><div class='add'>+			     ctdp_level.pbf_enabled, ctdp_level.fact_enabled);</div><div class='add'>+</div><div class='add'>+		if (pbf) {</div><div class='add'>+			if (ctdp_level.pbf_enabled == enable)</div><div class='add'>+				break;</div><div class='add'>+		} else {</div><div class='add'>+			if (ctdp_level.fact_enabled == enable)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == FEATURE_ENABLE_RETRIES)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -513,6 +540,7 @@ static int tpmi_get_fact_info(struct isst_id *id, int level, int fact_bucket,</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	memset(&amp;info, 0, sizeof(info));</div><div class='ctx'> 	info.socket_id = id-&gt;pkg;</div><div class='ctx'> 	info.power_domain_id = id-&gt;punit;</div><div class='ctx'> 	info.level = level;</div><div class='hunk'>@@ -659,7 +687,8 @@ static int tpmi_pm_qos_config(struct isst_id *id, int enable_clos,</div><div class='ctx'> 			      int priority_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct isst_core_power info;</div><div class='del'>-	int i, ret, saved_punit;</div><div class='add'>+	int cp_state = 0, cp_cap = 0;</div><div class='add'>+	int i, j, ret, saved_punit;</div><div class='ctx'> </div><div class='ctx'> 	info.get_set = 1;</div><div class='ctx'> 	info.socket_id = id-&gt;pkg;</div><div class='hunk'>@@ -679,6 +708,19 @@ static int tpmi_pm_qos_config(struct isst_id *id, int enable_clos,</div><div class='ctx'> 				id-&gt;punit = saved_punit;</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='add'>+			/* Get status */</div><div class='add'>+			for (j = 0; j &lt; FEATURE_ENABLE_RETRIES; ++j) {</div><div class='add'>+				usleep(FEATURE_ENABLE_WAIT_US);</div><div class='add'>+				ret = tpmi_read_pm_config(id, &amp;cp_state, &amp;cp_cap);</div><div class='add'>+				debug_printf("ret:%d cp_state:%d enable_clos:%d\n", ret,</div><div class='add'>+					     cp_state, enable_clos);</div><div class='add'>+				if (ret || cp_state == enable_clos)</div><div class='add'>+					break;</div><div class='add'>+			}</div><div class='add'>+			if (j == FEATURE_ENABLE_RETRIES) {</div><div class='add'>+				id-&gt;punit = saved_punit;</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8<br/>index 3340def58d01..1551fcdbfd8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/turbostat/turbostat.8?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/turbostat/turbostat.8</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/turbostat/turbostat.8?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/turbostat/turbostat.8</a></div><div class='hunk'>@@ -101,7 +101,7 @@ The column name "all" can be used to enable all disabled-by-default built-in cou</div><div class='ctx'> .PP</div><div class='ctx'> \fB--show column\fP show only the specified built-in columns.  May be invoked multiple times, or with a comma-separated list of column names.</div><div class='ctx'> .PP</div><div class='del'>-\fB--show CATEGORY --hide CATEGORY\fP  Show and hide also accept a single CATEGORY of columns: "all", "topology", "idle", "frequency", "power", "cpuidle", "hwidle", "swidle", "other".  "idle" (enabled by default), includes "hwidle" and "pct_idle".  "cpuidle" (default disabled) includes cpuidle software invocation counters.  "swidle" includes "cpuidle" plus "pct_idle".  "hwidle" includes only hardware based idle residency counters.  Older versions of turbostat used the term "sysfs" for what is now "swidle".</div><div class='add'>+\fB--show CATEGORY --hide CATEGORY\fP  Show and hide also accept a comma-separated-list of CATEGORIES of columns: "all", "topology", "idle", "frequency", "power", "cpuidle", "hwidle", "swidle", "cache", "llc", "other".  "idle" (enabled by default), includes "hwidle" and "pct_idle".  "cpuidle" (default disabled) includes cpuidle software invocation counters.  "swidle" includes "cpuidle" plus "pct_idle".  "hwidle" includes only hardware based idle residency counters.  Older versions of turbostat used the term "sysfs" for what is now "swidle".</div><div class='ctx'> .PP</div><div class='ctx'> \fB--Dump\fP displays the raw counter values.</div><div class='ctx'> .PP</div><div class='hunk'>@@ -159,6 +159,10 @@ The system configuration dump (if --quiet is not used) is followed by statistics</div><div class='ctx'> .PP</div><div class='ctx'> \fBSMI\fP The number of System Management Interrupts  serviced CPU during the measurement interval.  While this counter is actually per-CPU, SMI are triggered on all processors, so the number should be the same for all CPUs.</div><div class='ctx'> .PP</div><div class='add'>+\fBLLCkRPS\fP Last Level Cache Thousands of References Per Second.  For CPUs with an L3 LLC, this is the number of references that CPU made to the L3 (and the number of misses that CPU made to it's L2).  For CPUs with an L2 LLC, this is the number of references to the L2 (and the number of misses to the CPU's L1).  The system summary row shows the sum for all CPUs.  In both cases, the value displayed is the actual value divided by 1000 in the interest of usually fitting into 8 columns.</div><div class='add'>+.PP</div><div class='add'>+\fBLLC%hit\fP Last Level Cache Hit Rate %.  Hit Rate Percent = 100.0 * (References - Misses)/References.  The system summary row shows the weighted average for all CPUs (100.0 * (Sum_References - Sum_Misses)/Sum_References).</div><div class='add'>+.PP</div><div class='ctx'> \fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measurement interval.  The system summary line shows the sum for all CPUs.  These are C-state names as exported in /sys/devices/system/cpu/cpu*/cpuidle/state*/name.  While their names are generic, their attributes are processor specific. They the system description section of output shows what MWAIT sub-states they are mapped to on each system.  These counters are in the "cpuidle" group, which is disabled, by default.</div><div class='ctx'> .PP</div><div class='ctx'> \fBC1+, C2+, C3+...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a deeper idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/below file.  These counters are in the "cpuidle" group, which is disabled, by default.</div><div class='hunk'>@@ -410,25 +414,24 @@ CPU     pCPU%c1 CPU%c1</div><div class='ctx'> .fi</div><div class='ctx'> </div><div class='ctx'> .SH ADD PERF COUNTER EXAMPLE #2 (using virtual cpu device)</div><div class='del'>-Here we run on hybrid, Raptor Lake platform.</div><div class='del'>-We limit turbostat to show output for just cpu0 (pcore) and cpu12 (ecore).</div><div class='add'>+Here we run on hybrid, Meteor Lake platform.</div><div class='add'>+We limit turbostat to show output for just cpu0 (pcore) and cpu4 (ecore).</div><div class='ctx'> We add a counter showing number of L3 cache misses, using virtual "cpu" device,</div><div class='ctx'> labeling it with the column header, "VCMISS".</div><div class='ctx'> We add a counter showing number of L3 cache misses, using virtual "cpu_core" device,</div><div class='del'>-labeling it with the column header, "PCMISS". This will fail on ecore cpu12.</div><div class='add'>+labeling it with the column header, "PCMISS". This will fail on ecore cpu4.</div><div class='ctx'> We add a counter showing number of L3 cache misses, using virtual "cpu_atom" device,</div><div class='ctx'> labeling it with the column header, "ECMISS". This will fail on pcore cpu0.</div><div class='ctx'> We display it only once, after the conclusion of 0.1 second sleep.</div><div class='ctx'> .nf</div><div class='del'>-sudo ./turbostat --quiet --cpu 0,12 --show CPU --add perf/cpu/cache-misses,cpu,delta,raw,VCMISS --add perf/cpu_core/cache-misses,cpu,delta,raw,PCMISS --add perf/cpu_atom/cache-misses,cpu,delta,raw,ECMISS sleep .1</div><div class='add'>+sudo ./turbostat --quiet --cpu 0,4 --show CPU --add perf/cpu/cache-misses,cpu,delta,VCMISS --add perf/cpu_core/cache-misses,cpu,delta,PCMISS --add perf/cpu_atom/cache-misses,cpu,delta,ECMISS sleep 5</div><div class='ctx'> turbostat: added_perf_counters_init_: perf/cpu_atom/cache-misses: failed to open counter on cpu0</div><div class='del'>-turbostat: added_perf_counters_init_: perf/cpu_core/cache-misses: failed to open counter on cpu12</div><div class='del'>-0.104630 sec</div><div class='del'>-CPU                 ECMISS                  PCMISS                  VCMISS</div><div class='del'>--       0x0000000000000000      0x0000000000000000      0x0000000000000000</div><div class='del'>-0       0x0000000000000000      0x0000000000007951      0x0000000000007796</div><div class='del'>-12      0x000000000001137a      0x0000000000000000      0x0000000000011392</div><div class='del'>-</div><div class='add'>+turbostat: added_perf_counters_init_: perf/cpu_core/cache-misses: failed to open counter on cpu4</div><div class='add'>+5.001207 sec</div><div class='add'>+CPU	ECMISS		PCMISS		VCMISS</div><div class='add'>+-	41586506	46291219	87877749</div><div class='add'>+4	83173012	0		83173040</div><div class='add'>+0	0		92582439	92582458</div><div class='ctx'> .fi</div><div class='ctx'> </div><div class='ctx'> .SH ADD PMT COUNTER EXAMPLE</div><div class='head'>diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c<br/>index 72a280e7a9d5..5ad45c2ac5bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/turbostat/turbostat.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/turbostat/turbostat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/turbostat/turbostat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/turbostat/turbostat.c</a></div><div class='hunk'>@@ -142,6 +142,7 @@ struct msr_counter {</div><div class='ctx'> #define	FLAGS_SHOW	(1 &lt;&lt; 1)</div><div class='ctx'> #define	SYSFS_PERCPU	(1 &lt;&lt; 1)</div><div class='ctx'> };</div><div class='add'>+static int use_android_msr_path;</div><div class='ctx'> </div><div class='ctx'> struct msr_counter bic[] = {</div><div class='ctx'> 	{ 0x0, "usec", NULL, 0, 0, 0, NULL, 0 },</div><div class='hunk'>@@ -209,6 +210,8 @@ struct msr_counter bic[] = {</div><div class='ctx'> 	{ 0x0, "NMI", NULL, 0, 0, 0, NULL, 0 },</div><div class='ctx'> 	{ 0x0, "CPU%c1e", NULL, 0, 0, 0, NULL, 0 },</div><div class='ctx'> 	{ 0x0, "pct_idle", NULL, 0, 0, 0, NULL, 0 },</div><div class='add'>+	{ 0x0, "LLCkRPS", NULL, 0, 0, 0, NULL, 0 },</div><div class='add'>+	{ 0x0, "LLC%hit", NULL, 0, 0, 0, NULL, 0 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* n.b. bic_names must match the order in bic[], above */</div><div class='hunk'>@@ -278,6 +281,8 @@ enum bic_names {</div><div class='ctx'> 	BIC_NMI,</div><div class='ctx'> 	BIC_CPU_c1e,</div><div class='ctx'> 	BIC_pct_idle,</div><div class='add'>+	BIC_LLC_RPS,</div><div class='add'>+	BIC_LLC_HIT,</div><div class='ctx'> 	MAX_BIC</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -305,6 +310,7 @@ static cpu_set_t bic_group_frequency;</div><div class='ctx'> static cpu_set_t bic_group_hw_idle;</div><div class='ctx'> static cpu_set_t bic_group_sw_idle;</div><div class='ctx'> static cpu_set_t bic_group_idle;</div><div class='add'>+static cpu_set_t bic_group_cache;</div><div class='ctx'> static cpu_set_t bic_group_other;</div><div class='ctx'> static cpu_set_t bic_group_disabled_by_default;</div><div class='ctx'> static cpu_set_t bic_enabled;</div><div class='hunk'>@@ -413,9 +419,14 @@ static void bic_groups_init(void)</div><div class='ctx'> 	SET_BIC(BIC_pct_idle, &amp;bic_group_sw_idle);</div><div class='ctx'> </div><div class='ctx'> 	BIC_INIT(&amp;bic_group_idle);</div><div class='add'>+</div><div class='ctx'> 	CPU_OR(&amp;bic_group_idle, &amp;bic_group_idle, &amp;bic_group_hw_idle);</div><div class='ctx'> 	SET_BIC(BIC_pct_idle, &amp;bic_group_idle);</div><div class='ctx'> </div><div class='add'>+	BIC_INIT(&amp;bic_group_cache);</div><div class='add'>+	SET_BIC(BIC_LLC_RPS, &amp;bic_group_cache);</div><div class='add'>+	SET_BIC(BIC_LLC_HIT, &amp;bic_group_cache);</div><div class='add'>+</div><div class='ctx'> 	BIC_INIT(&amp;bic_group_other);</div><div class='ctx'> 	SET_BIC(BIC_IRQ, &amp;bic_group_other);</div><div class='ctx'> 	SET_BIC(BIC_NMI, &amp;bic_group_other);</div><div class='hunk'>@@ -466,12 +477,11 @@ static void bic_groups_init(void)</div><div class='ctx'> #define PCL_10 14		/* PC10 */</div><div class='ctx'> #define PCLUNL 15		/* Unlimited */</div><div class='ctx'> </div><div class='del'>-struct amperf_group_fd;</div><div class='del'>-</div><div class='ctx'> char *proc_stat = "/proc/stat";</div><div class='ctx'> FILE *outf;</div><div class='ctx'> int *fd_percpu;</div><div class='ctx'> int *fd_instr_count_percpu;</div><div class='add'>+int *fd_llc_percpu;</div><div class='ctx'> struct timeval interval_tv = { 5, 0 };</div><div class='ctx'> struct timespec interval_ts = { 5, 0 };</div><div class='ctx'> </div><div class='hunk'>@@ -482,11 +492,12 @@ unsigned int quiet;</div><div class='ctx'> unsigned int shown;</div><div class='ctx'> unsigned int sums_need_wide_columns;</div><div class='ctx'> unsigned int rapl_joules;</div><div class='add'>+unsigned int valid_rapl_msrs;</div><div class='ctx'> unsigned int summary_only;</div><div class='ctx'> unsigned int list_header_only;</div><div class='ctx'> unsigned int dump_only;</div><div class='ctx'> unsigned int force_load;</div><div class='del'>-unsigned int has_aperf;</div><div class='add'>+unsigned int cpuid_has_aperf_mperf;</div><div class='ctx'> unsigned int has_aperf_access;</div><div class='ctx'> unsigned int has_epb;</div><div class='ctx'> unsigned int has_turbo;</div><div class='hunk'>@@ -552,8 +563,7 @@ static struct gfx_sysfs_info gfx_info[GFX_MAX];</div><div class='ctx'> </div><div class='ctx'> int get_msr(int cpu, off_t offset, unsigned long long *msr);</div><div class='ctx'> int add_counter(unsigned int msr_num, char *path, char *name,</div><div class='del'>-		unsigned int width, enum counter_scope scope,</div><div class='del'>-		enum counter_type type, enum counter_format format, int flags, int package_num);</div><div class='add'>+		unsigned int width, enum counter_scope scope, enum counter_type type, enum counter_format format, int flags, int package_num);</div><div class='ctx'> </div><div class='ctx'> /* Model specific support Start */</div><div class='ctx'> </div><div class='hunk'>@@ -578,7 +588,7 @@ struct platform_features {</div><div class='ctx'> 	bool has_cst_prewake_bit;	/* Cstate prewake bit in MSR_IA32_POWER_CTL */</div><div class='ctx'> 	int trl_msrs;		/* MSR_TURBO_RATIO_LIMIT/LIMIT1/LIMIT2/SECONDARY, Atom TRL MSRs */</div><div class='ctx'> 	int plr_msrs;		/* MSR_CORE/GFX/RING_PERF_LIMIT_REASONS */</div><div class='del'>-	int rapl_msrs;		/* RAPL PKG/DRAM/CORE/GFX MSRs, AMD RAPL MSRs */</div><div class='add'>+	int plat_rapl_msrs;	/* RAPL PKG/DRAM/CORE/GFX MSRs, AMD RAPL MSRs */</div><div class='ctx'> 	bool has_per_core_rapl;	/* Indicates cores energy collection is per-core, not per-package. AMD specific for now */</div><div class='ctx'> 	bool has_rapl_divisor;	/* Divisor for Energy unit raw value from MSR_RAPL_POWER_UNIT */</div><div class='ctx'> 	bool has_fixed_rapl_unit;	/* Fixed Energy Unit used for DRAM RAPL Domain */</div><div class='hunk'>@@ -733,7 +743,7 @@ static const struct platform_features snb_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_SNB,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features snx_features = {</div><div class='hunk'>@@ -745,7 +755,7 @@ static const struct platform_features snx_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_SNB,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features ivb_features = {</div><div class='hunk'>@@ -758,7 +768,7 @@ static const struct platform_features ivb_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_SNB,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features ivx_features = {</div><div class='hunk'>@@ -770,7 +780,7 @@ static const struct platform_features ivx_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_SNB,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_LIMIT1,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features hsw_features = {</div><div class='hunk'>@@ -784,7 +794,7 @@ static const struct platform_features hsw_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='ctx'> 	.plr_msrs = PLR_CORE | PLR_GFX | PLR_RING,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features hsx_features = {</div><div class='hunk'>@@ -798,7 +808,7 @@ static const struct platform_features hsx_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_LIMIT1 | TRL_LIMIT2,</div><div class='ctx'> 	.plr_msrs = PLR_CORE | PLR_RING,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> 	.has_fixed_rapl_unit = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -813,7 +823,7 @@ static const struct platform_features hswl_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='ctx'> 	.plr_msrs = PLR_CORE | PLR_GFX | PLR_RING,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features hswg_features = {</div><div class='hunk'>@@ -827,7 +837,7 @@ static const struct platform_features hswg_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='ctx'> 	.plr_msrs = PLR_CORE | PLR_GFX | PLR_RING,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features bdw_features = {</div><div class='hunk'>@@ -840,7 +850,7 @@ static const struct platform_features bdw_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_HSW,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features bdwg_features = {</div><div class='hunk'>@@ -853,7 +863,7 @@ static const struct platform_features bdwg_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_HSW,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE_ALL | RAPL_GFX | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features bdx_features = {</div><div class='hunk'>@@ -867,7 +877,7 @@ static const struct platform_features bdx_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_cst_auto_convension = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> 	.has_fixed_rapl_unit = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -884,7 +894,7 @@ static const struct platform_features skl_features = {</div><div class='ctx'> 	.has_ext_cst_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='ctx'> 	.tcc_offset_bits = 6,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX | RAPL_PSYS,</div><div class='ctx'> 	.enable_tsc_tweak = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -901,7 +911,7 @@ static const struct platform_features cnl_features = {</div><div class='ctx'> 	.has_ext_cst_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='ctx'> 	.tcc_offset_bits = 6,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX | RAPL_PSYS,</div><div class='ctx'> 	.enable_tsc_tweak = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -919,7 +929,7 @@ static const struct platform_features adl_features = {</div><div class='ctx'> 	.has_ext_cst_msrs		= cnl_features.has_ext_cst_msrs,</div><div class='ctx'> 	.trl_msrs			= cnl_features.trl_msrs,</div><div class='ctx'> 	.tcc_offset_bits		= cnl_features.tcc_offset_bits,</div><div class='del'>-	.rapl_msrs			= cnl_features.rapl_msrs,</div><div class='add'>+	.plat_rapl_msrs			= cnl_features.plat_rapl_msrs,</div><div class='ctx'> 	.enable_tsc_tweak		= cnl_features.enable_tsc_tweak,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -937,7 +947,7 @@ static const struct platform_features lnl_features = {</div><div class='ctx'> 	.has_ext_cst_msrs		= adl_features.has_ext_cst_msrs,</div><div class='ctx'> 	.trl_msrs			= adl_features.trl_msrs,</div><div class='ctx'> 	.tcc_offset_bits		= adl_features.tcc_offset_bits,</div><div class='del'>-	.rapl_msrs			= adl_features.rapl_msrs,</div><div class='add'>+	.plat_rapl_msrs			= adl_features.plat_rapl_msrs,</div><div class='ctx'> 	.enable_tsc_tweak		= adl_features.enable_tsc_tweak,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -952,7 +962,7 @@ static const struct platform_features skx_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_cst_auto_convension = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> 	.has_fixed_rapl_unit = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -968,7 +978,7 @@ static const struct platform_features icx_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_cst_prewake_bit = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='ctx'> 	.has_fixed_rapl_unit = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -985,7 +995,7 @@ static const struct platform_features spr_features = {</div><div class='ctx'> 	.has_cst_prewake_bit = 1,</div><div class='ctx'> 	.has_fixed_rapl_psys_unit = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features dmr_features = {</div><div class='hunk'>@@ -1000,7 +1010,7 @@ static const struct platform_features dmr_features = {</div><div class='ctx'> 	.has_fixed_rapl_psys_unit	= spr_features.has_fixed_rapl_psys_unit,</div><div class='ctx'> 	.trl_msrs			= spr_features.trl_msrs,</div><div class='ctx'> 	.has_msr_module_c6_res_ms	= 1,	/* DMR has Dual-Core-Module and MC6 MSR */</div><div class='del'>-	.rapl_msrs			= 0,	/* DMR does not have RAPL MSRs */</div><div class='add'>+	.plat_rapl_msrs			= 0,	/* DMR does not have RAPL MSRs */</div><div class='ctx'> 	.plr_msrs			= 0,	/* DMR does not have PLR  MSRs */</div><div class='ctx'> 	.has_irtl_msrs			= 0,	/* DMR does not have IRTL MSRs */</div><div class='ctx'> 	.has_config_tdp			= 0,	/* DMR does not have CTDP MSRs */</div><div class='hunk'>@@ -1019,7 +1029,7 @@ static const struct platform_features srf_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_cst_prewake_bit = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features grr_features = {</div><div class='hunk'>@@ -1035,7 +1045,7 @@ static const struct platform_features grr_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_cst_prewake_bit = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features slv_features = {</div><div class='hunk'>@@ -1048,7 +1058,7 @@ static const struct platform_features slv_features = {</div><div class='ctx'> 	.has_msr_c6_demotion_policy_config = 1,</div><div class='ctx'> 	.has_msr_atom_pkg_c6_residency = 1,</div><div class='ctx'> 	.trl_msrs = TRL_ATOM,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE,</div><div class='ctx'> 	.has_rapl_divisor = 1,</div><div class='ctx'> 	.rapl_quirk_tdp = 30,</div><div class='ctx'> };</div><div class='hunk'>@@ -1061,7 +1071,7 @@ static const struct platform_features slvd_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_SLV,</div><div class='ctx'> 	.has_msr_atom_pkg_c6_residency = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_CORE,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_CORE,</div><div class='ctx'> 	.rapl_quirk_tdp = 30,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1082,7 +1092,7 @@ static const struct platform_features gmt_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_GMT,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features gmtd_features = {</div><div class='hunk'>@@ -1095,7 +1105,7 @@ static const struct platform_features gmtd_features = {</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.has_msr_core_c1_res = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_CORE_ENERGY_STATUS,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_CORE_ENERGY_STATUS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features gmtp_features = {</div><div class='hunk'>@@ -1107,7 +1117,7 @@ static const struct platform_features gmtp_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_GMT,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG | RAPL_PKG_POWER_INFO,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG | RAPL_PKG_POWER_INFO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features tmt_features = {</div><div class='hunk'>@@ -1118,7 +1128,7 @@ static const struct platform_features tmt_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_GMT,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX,</div><div class='ctx'> 	.enable_tsc_tweak = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1130,7 +1140,7 @@ static const struct platform_features tmtd_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_GMT,</div><div class='ctx'> 	.has_irtl_msrs = 1,</div><div class='ctx'> 	.trl_msrs = TRL_BASE | TRL_CORECOUNT,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features knl_features = {</div><div class='hunk'>@@ -1142,7 +1152,7 @@ static const struct platform_features knl_features = {</div><div class='ctx'> 	.cst_limit = CST_LIMIT_KNL,</div><div class='ctx'> 	.has_msr_knl_core_c6_residency = 1,</div><div class='ctx'> 	.trl_msrs = TRL_KNL,</div><div class='del'>-	.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='add'>+	.plat_rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,</div><div class='ctx'> 	.has_fixed_rapl_unit = 1,</div><div class='ctx'> 	.need_perf_multiplier = 1,</div><div class='ctx'> };</div><div class='hunk'>@@ -1151,7 +1161,7 @@ static const struct platform_features default_features = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_features amd_features_with_rapl = {</div><div class='del'>-	.rapl_msrs = RAPL_AMD_F17H,</div><div class='add'>+	.plat_rapl_msrs = RAPL_AMD_F17H,</div><div class='ctx'> 	.has_per_core_rapl = 1,</div><div class='ctx'> 	.rapl_quirk_tdp = 280,	/* This is the max stock TDP of HEDT/Server Fam17h+ chips */</div><div class='ctx'> };</div><div class='hunk'>@@ -1195,7 +1205,7 @@ static const struct platform_data turbostat_pdata[] = {</div><div class='ctx'> 	{ INTEL_EMERALDRAPIDS_X, &amp;spr_features },</div><div class='ctx'> 	{ INTEL_GRANITERAPIDS_X, &amp;spr_features },</div><div class='ctx'> 	{ INTEL_GRANITERAPIDS_D, &amp;spr_features },</div><div class='del'>-	{ INTEL_PANTHERCOVE_X, &amp;dmr_features },</div><div class='add'>+	{ INTEL_DIAMONDRAPIDS_X, &amp;dmr_features },</div><div class='ctx'> 	{ INTEL_LAKEFIELD, &amp;cnl_features },</div><div class='ctx'> 	{ INTEL_ALDERLAKE, &amp;adl_features },</div><div class='ctx'> 	{ INTEL_ALDERLAKE_L, &amp;adl_features },</div><div class='hunk'>@@ -1210,6 +1220,9 @@ static const struct platform_data turbostat_pdata[] = {</div><div class='ctx'> 	{ INTEL_ARROWLAKE, &amp;adl_features },</div><div class='ctx'> 	{ INTEL_LUNARLAKE_M, &amp;lnl_features },</div><div class='ctx'> 	{ INTEL_PANTHERLAKE_L, &amp;lnl_features },</div><div class='add'>+	{ INTEL_NOVALAKE, &amp;lnl_features },</div><div class='add'>+	{ INTEL_NOVALAKE_L, &amp;lnl_features },</div><div class='add'>+	{ INTEL_WILDCATLAKE_L, &amp;lnl_features },</div><div class='ctx'> 	{ INTEL_ATOM_SILVERMONT, &amp;slv_features },</div><div class='ctx'> 	{ INTEL_ATOM_SILVERMONT_D, &amp;slvd_features },</div><div class='ctx'> 	{ INTEL_ATOM_AIRMONT, &amp;amt_features },</div><div class='hunk'>@@ -1294,8 +1307,7 @@ char *progname;</div><div class='ctx'> </div><div class='ctx'> #define CPU_SUBSET_MAXCPUS	8192	/* need to use before probe... */</div><div class='ctx'> cpu_set_t *cpu_present_set, *cpu_possible_set, *cpu_effective_set, *cpu_allowed_set, *cpu_affinity_set, *cpu_subset;</div><div class='del'>-size_t cpu_present_setsize, cpu_possible_setsize, cpu_effective_setsize, cpu_allowed_setsize, cpu_affinity_setsize,</div><div class='del'>-    cpu_subset_size;</div><div class='add'>+size_t cpu_present_setsize, cpu_possible_setsize, cpu_effective_setsize, cpu_allowed_setsize, cpu_affinity_setsize, cpu_subset_size;</div><div class='ctx'> #define MAX_ADDED_THREAD_COUNTERS 24</div><div class='ctx'> #define MAX_ADDED_CORE_COUNTERS 8</div><div class='ctx'> #define MAX_ADDED_PACKAGE_COUNTERS 16</div><div class='hunk'>@@ -1890,7 +1902,7 @@ int pmt_telemdir_sort(const struct dirent **a, const struct dirent **b)</div><div class='ctx'> 	sscanf((*a)-&gt;d_name, "telem%u", &amp;aidx);</div><div class='ctx'> 	sscanf((*b)-&gt;d_name, "telem%u", &amp;bidx);</div><div class='ctx'> </div><div class='del'>-	return aidx &gt;= bidx;</div><div class='add'>+	return (aidx &gt; bidx) ? 1 : (aidx &lt; bidx) ? -1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct dirent *pmt_diriter_next(struct pmt_diriter_t *iter)</div><div class='hunk'>@@ -1991,6 +2003,10 @@ void pmt_counter_resize(struct pmt_counter *pcounter, unsigned int new_size)</div><div class='ctx'> 	pmt_counter_resize_(pcounter, new_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct llc_stats {</div><div class='add'>+	unsigned long long references;</div><div class='add'>+	unsigned long long misses;</div><div class='add'>+};</div><div class='ctx'> struct thread_data {</div><div class='ctx'> 	struct timeval tv_begin;</div><div class='ctx'> 	struct timeval tv_end;</div><div class='hunk'>@@ -2003,6 +2019,7 @@ struct thread_data {</div><div class='ctx'> 	unsigned long long irq_count;</div><div class='ctx'> 	unsigned long long nmi_count;</div><div class='ctx'> 	unsigned int smi_count;</div><div class='add'>+	struct llc_stats llc;</div><div class='ctx'> 	unsigned int cpu_id;</div><div class='ctx'> 	unsigned int apic_id;</div><div class='ctx'> 	unsigned int x2apic_id;</div><div class='hunk'>@@ -2118,7 +2135,7 @@ off_t idx_to_offset(int idx)</div><div class='ctx'> </div><div class='ctx'> 	switch (idx) {</div><div class='ctx'> 	case IDX_PKG_ENERGY:</div><div class='del'>-		if (platform-&gt;rapl_msrs &amp; RAPL_AMD_F17H)</div><div class='add'>+		if (valid_rapl_msrs &amp; RAPL_AMD_F17H)</div><div class='ctx'> 			offset = MSR_PKG_ENERGY_STAT;</div><div class='ctx'> 		else</div><div class='ctx'> 			offset = MSR_PKG_ENERGY_STATUS;</div><div class='hunk'>@@ -2184,19 +2201,19 @@ int idx_valid(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	switch (idx) {</div><div class='ctx'> 	case IDX_PKG_ENERGY:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; (RAPL_PKG | RAPL_AMD_F17H);</div><div class='add'>+		return valid_rapl_msrs &amp; (RAPL_PKG | RAPL_AMD_F17H);</div><div class='ctx'> 	case IDX_DRAM_ENERGY:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_DRAM;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_DRAM;</div><div class='ctx'> 	case IDX_PP0_ENERGY:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_CORE_ENERGY_STATUS;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_CORE_ENERGY_STATUS;</div><div class='ctx'> 	case IDX_PP1_ENERGY:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_GFX;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_GFX;</div><div class='ctx'> 	case IDX_PKG_PERF:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_PKG_PERF_STATUS;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_PKG_PERF_STATUS;</div><div class='ctx'> 	case IDX_DRAM_PERF:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_DRAM_PERF_STATUS;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_DRAM_PERF_STATUS;</div><div class='ctx'> 	case IDX_PSYS_ENERGY:</div><div class='del'>-		return platform-&gt;rapl_msrs &amp; RAPL_PSYS;</div><div class='add'>+		return valid_rapl_msrs &amp; RAPL_PSYS;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2362,23 +2379,19 @@ int for_all_cpus(int (func) (struct thread_data *, struct core_data *, struct pk</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int is_cpu_first_thread_in_core(PER_THREAD_PARAMS)</div><div class='add'>+int is_cpu_first_thread_in_core(struct thread_data *t, struct core_data *c)</div><div class='ctx'> {</div><div class='del'>-	UNUSED(p);</div><div class='del'>-</div><div class='ctx'> 	return ((int)t-&gt;cpu_id == c-&gt;base_cpu || c-&gt;base_cpu &lt; 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int is_cpu_first_core_in_package(PER_THREAD_PARAMS)</div><div class='add'>+int is_cpu_first_core_in_package(struct thread_data *t, struct pkg_data *p)</div><div class='ctx'> {</div><div class='del'>-	UNUSED(c);</div><div class='del'>-</div><div class='ctx'> 	return ((int)t-&gt;cpu_id == p-&gt;base_cpu || p-&gt;base_cpu &lt; 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int is_cpu_first_thread_in_package(PER_THREAD_PARAMS)</div><div class='add'>+int is_cpu_first_thread_in_package(struct thread_data *t, struct core_data *c, struct pkg_data *p)</div><div class='ctx'> {</div><div class='del'>-	return is_cpu_first_thread_in_core(t, c, p) &amp;&amp; is_cpu_first_core_in_package(t, c, p);</div><div class='add'>+	return is_cpu_first_thread_in_core(t, c) &amp;&amp; is_cpu_first_core_in_package(t, p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int cpu_migrate(int cpu)</div><div class='hunk'>@@ -2400,20 +2413,11 @@ int get_msr_fd(int cpu)</div><div class='ctx'> </div><div class='ctx'> 	if (fd)</div><div class='ctx'> 		return fd;</div><div class='del'>-#if defined(ANDROID)</div><div class='del'>-	sprintf(pathname, "/dev/msr%d", cpu);</div><div class='del'>-#else</div><div class='del'>-	sprintf(pathname, "/dev/cpu/%d/msr", cpu);</div><div class='del'>-#endif</div><div class='add'>+	sprintf(pathname, use_android_msr_path ? "/dev/msr%d" : "/dev/cpu/%d/msr", cpu);</div><div class='ctx'> 	fd = open(pathname, O_RDONLY);</div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-#if defined(ANDROID)</div><div class='del'>-		err(-1, "%s open failed, try chown or chmod +r /dev/msr*, "</div><div class='del'>-		    "or run with --no-msr, or run as root", pathname);</div><div class='del'>-#else</div><div class='del'>-		err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, "</div><div class='del'>-		    "or run with --no-msr, or run as root", pathname);</div><div class='del'>-#endif</div><div class='add'>+		err(-1, "%s open failed, try chown or chmod +r %s, "</div><div class='add'>+		    "or run with --no-msr, or run as root", pathname, use_android_msr_path ? "/dev/msr*" : "/dev/cpu/*/msr");</div><div class='ctx'> 	fd_percpu[cpu] = fd;</div><div class='ctx'> </div><div class='ctx'> 	return fd;</div><div class='hunk'>@@ -2432,6 +2436,13 @@ static void bic_disable_msr_access(void)</div><div class='ctx'> 	free_sys_msr_counters();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bic_disable_perf_access(void)</div><div class='add'>+{</div><div class='add'>+	CLR_BIC(BIC_IPC, &amp;bic_enabled);</div><div class='add'>+	CLR_BIC(BIC_LLC_RPS, &amp;bic_enabled);</div><div class='add'>+	CLR_BIC(BIC_LLC_HIT, &amp;bic_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid, int cpu, int group_fd, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	assert(!no_perf);</div><div class='hunk'>@@ -2512,7 +2523,7 @@ int add_rapl_msr_counter(int cpu, const struct rapl_counter_arch_info *cai)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!(platform-&gt;rapl_msrs &amp; cai-&gt;feature_mask))</div><div class='add'>+	if (!(valid_rapl_msrs &amp; cai-&gt;feature_mask))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	ret = add_msr_counter(cpu, cai-&gt;msr);</div><div class='hunk'>@@ -2656,6 +2667,12 @@ void bic_lookup(cpu_set_t *ret_set, char *name_list, enum show_hide_mode mode)</div><div class='ctx'> 			} else if (!strcmp(name_list, "idle")) {</div><div class='ctx'> 				CPU_OR(ret_set, ret_set, &amp;bic_group_idle);</div><div class='ctx'> 				break;</div><div class='add'>+			} else if (!strcmp(name_list, "cache")) {</div><div class='add'>+				CPU_OR(ret_set, ret_set, &amp;bic_group_cache);</div><div class='add'>+				break;</div><div class='add'>+			} else if (!strcmp(name_list, "llc")) {</div><div class='add'>+				CPU_OR(ret_set, ret_set, &amp;bic_group_cache);</div><div class='add'>+				break;</div><div class='ctx'> 			} else if (!strcmp(name_list, "swidle")) {</div><div class='ctx'> 				CPU_OR(ret_set, ret_set, &amp;bic_group_sw_idle);</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -2677,8 +2694,7 @@ void bic_lookup(cpu_set_t *ret_set, char *name_list, enum show_hide_mode mode)</div><div class='ctx'> 			if (mode == SHOW_LIST) {</div><div class='ctx'> 				deferred_add_names[deferred_add_index++] = name_list;</div><div class='ctx'> 				if (deferred_add_index &gt;= MAX_DEFERRED) {</div><div class='del'>-					fprintf(stderr, "More than max %d un-recognized --add options '%s'\n",</div><div class='del'>-						MAX_DEFERRED, name_list);</div><div class='add'>+					fprintf(stderr, "More than max %d un-recognized --add options '%s'\n", MAX_DEFERRED, name_list);</div><div class='ctx'> 					help();</div><div class='ctx'> 					exit(1);</div><div class='ctx'> 				}</div><div class='hunk'>@@ -2687,8 +2703,7 @@ void bic_lookup(cpu_set_t *ret_set, char *name_list, enum show_hide_mode mode)</div><div class='ctx'> 				if (debug)</div><div class='ctx'> 					fprintf(stderr, "deferred \"%s\"\n", name_list);</div><div class='ctx'> 				if (deferred_skip_index &gt;= MAX_DEFERRED) {</div><div class='del'>-					fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",</div><div class='del'>-						MAX_DEFERRED, name_list);</div><div class='add'>+					fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n", MAX_DEFERRED, name_list);</div><div class='ctx'> 					help();</div><div class='ctx'> 					exit(1);</div><div class='ctx'> 				}</div><div class='hunk'>@@ -2702,6 +2717,47 @@ void bic_lookup(cpu_set_t *ret_set, char *name_list, enum show_hide_mode mode)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * print_name()</div><div class='add'>+ * Print column header name for raw 64-bit counter in 16 columns (at least 8-char plus a tab)</div><div class='add'>+ * Otherwise, allow the name + tab to fit within 8-coumn tab-stop.</div><div class='add'>+ * In both cases, left justififed, just like other turbostat columns,</div><div class='add'>+ * to allow the column values to consume the tab.</div><div class='add'>+ *</div><div class='add'>+ * Yes, 32-bit counters can overflow 8-columns, and</div><div class='add'>+ * 64-bit counters can overflow 16-columns, but that is uncommon.</div><div class='add'>+ */</div><div class='add'>+static inline int print_name(int width, int *printed, char *delim, char *name, enum counter_type type, enum counter_format format)</div><div class='add'>+{</div><div class='add'>+	UNUSED(type);</div><div class='add'>+</div><div class='add'>+	if (format == FORMAT_RAW &amp;&amp; width &gt;= 64)</div><div class='add'>+		return (sprintf(outp, "%s%-8s", (*printed++ ? delim : ""), name));</div><div class='add'>+	else</div><div class='add'>+		return (sprintf(outp, "%s%s", (*printed++ ? delim : ""), name));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int print_hex_value(int width, int *printed, char *delim, unsigned long long value)</div><div class='add'>+{</div><div class='add'>+	if (width &lt;= 32)</div><div class='add'>+		return (sprintf(outp, "%s%08x", (*printed++ ? delim : ""), (unsigned int)value));</div><div class='add'>+	else</div><div class='add'>+		return (sprintf(outp, "%s%016llx", (*printed++ ? delim : ""), value));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int print_decimal_value(int width, int *printed, char *delim, unsigned long long value)</div><div class='add'>+{</div><div class='add'>+	if (width &lt;= 32)</div><div class='add'>+		return (sprintf(outp, "%s%d", (*printed++ ? delim : ""), (unsigned int)value));</div><div class='add'>+	else</div><div class='add'>+		return (sprintf(outp, "%s%-8lld", (*printed++ ? delim : ""), value));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int print_float_value(int *printed, char *delim, double value)</div><div class='add'>+{</div><div class='add'>+	return (sprintf(outp, "%s%0.2f", (*printed++ ? delim : ""), value));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void print_header(char *delim)</div><div class='ctx'> {</div><div class='ctx'> 	struct msr_counter *mp;</div><div class='hunk'>@@ -2757,50 +2813,28 @@ void print_header(char *delim)</div><div class='ctx'> 	if (DO_BIC(BIC_SMI))</div><div class='ctx'> 		outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='del'>-	for (mp = sys.tp; mp; mp = mp-&gt;next) {</div><div class='add'>+	if (DO_BIC(BIC_LLC_RPS))</div><div class='add'>+		outp += sprintf(outp, "%sLLCkRPS", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (DO_BIC(BIC_LLC_HIT))</div><div class='add'>+		outp += sprintf(outp, "%sLLC%%hit", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='del'>-	for (pp = sys.perf_tp; pp; pp = pp-&gt;next) {</div><div class='add'>+	for (mp = sys.tp; mp; mp = mp-&gt;next)</div><div class='add'>+		outp += print_name(mp-&gt;width, &amp;printed, delim, mp-&gt;name, mp-&gt;type, mp-&gt;format);</div><div class='ctx'> </div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (pp = sys.perf_tp; pp; pp = pp-&gt;next)</div><div class='add'>+		outp += print_name(pp-&gt;width, &amp;printed, delim, pp-&gt;name, pp-&gt;type, pp-&gt;format);</div><div class='ctx'> </div><div class='ctx'> 	ppmt = sys.pmt_tp;</div><div class='ctx'> 	while (ppmt) {</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='del'>-</div><div class='add'>+			outp += print_name(pmt_counter_get_width(ppmt), &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='add'>+			outp += print_name(32, &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2825,63 +2859,36 @@ void print_header(char *delim)</div><div class='ctx'> 	if (DO_BIC(BIC_CORE_THROT_CNT))</div><div class='ctx'> 		outp += sprintf(outp, "%sCoreThr", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='del'>-	if (platform-&gt;rapl_msrs &amp;&amp; !rapl_joules) {</div><div class='add'>+	if (valid_rapl_msrs &amp;&amp; !rapl_joules) {</div><div class='ctx'> 		if (DO_BIC(BIC_CorWatt) &amp;&amp; platform-&gt;has_per_core_rapl)</div><div class='ctx'> 			outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));</div><div class='del'>-	} else if (platform-&gt;rapl_msrs &amp;&amp; rapl_joules) {</div><div class='add'>+	} else if (valid_rapl_msrs &amp;&amp; rapl_joules) {</div><div class='ctx'> 		if (DO_BIC(BIC_Cor_J) &amp;&amp; platform-&gt;has_per_core_rapl)</div><div class='ctx'> 			outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (mp = sys.cp; mp; mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", delim, mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", delim, mp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", delim, mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%s", delim, mp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (mp = sys.cp; mp; mp = mp-&gt;next)</div><div class='add'>+		outp += print_name(mp-&gt;width, &amp;printed, delim, mp-&gt;name, mp-&gt;type, mp-&gt;format);</div><div class='ctx'> </div><div class='del'>-	for (pp = sys.perf_cp; pp; pp = pp-&gt;next) {</div><div class='del'>-</div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (pp = sys.perf_cp; pp; pp = pp-&gt;next)</div><div class='add'>+		outp += print_name(pp-&gt;width, &amp;printed, delim, pp-&gt;name, pp-&gt;type, pp-&gt;format);</div><div class='ctx'> </div><div class='ctx'> 	ppmt = sys.pmt_cp;</div><div class='ctx'> 	while (ppmt) {</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='add'>+			outp += print_name(pmt_counter_get_width(ppmt), &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> </div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='add'>+			outp += print_name(32, &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ppmt = ppmt-&gt;next;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	if (DO_BIC(BIC_PkgTmp))</div><div class='ctx'> 		outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='hunk'>@@ -2963,51 +2970,22 @@ void print_header(char *delim)</div><div class='ctx'> 	if (DO_BIC(BIC_UNCORE_MHZ))</div><div class='ctx'> 		outp += sprintf(outp, "%sUncMHz", (printed++ ? delim : ""));</div><div class='ctx'> </div><div class='del'>-	for (mp = sys.pp; mp; mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", delim, mp-&gt;name);</div><div class='del'>-			else if (mp-&gt;width == 32)</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", delim, mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%7.7s", delim, mp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", delim, mp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%7.7s", delim, mp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (pp = sys.perf_pp; pp; pp = pp-&gt;next) {</div><div class='add'>+	for (mp = sys.pp; mp; mp = mp-&gt;next)</div><div class='add'>+		outp += print_name(mp-&gt;width, &amp;printed, delim, mp-&gt;name, mp-&gt;type, mp-&gt;format);</div><div class='ctx'> </div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 64)</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), pp-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (pp = sys.perf_pp; pp; pp = pp-&gt;next)</div><div class='add'>+		outp += print_name(pp-&gt;width, &amp;printed, delim, pp-&gt;name, pp-&gt;type, pp-&gt;format);</div><div class='ctx'> </div><div class='ctx'> 	ppmt = sys.pmt_pp;</div><div class='ctx'> 	while (ppmt) {</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='del'>-</div><div class='add'>+			outp += print_name(pmt_counter_get_width(ppmt), &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), ppmt-&gt;name);</div><div class='add'>+			outp += print_name(32, &amp;printed, delim, ppmt-&gt;name, COUNTER_ITEMS, ppmt-&gt;format);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3022,6 +3000,25 @@ void print_header(char *delim)</div><div class='ctx'> 	outp += sprintf(outp, "\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * pct()</div><div class='add'>+ *</div><div class='add'>+ * If absolute value is &lt; 1.1, return percentage</div><div class='add'>+ * otherwise, return nan</div><div class='add'>+ *</div><div class='add'>+ * return value is appropriate for printing percentages with %f</div><div class='add'>+ * while flagging some obvious erroneous values.</div><div class='add'>+ */</div><div class='add'>+double pct(double d)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	double abs = fabs(d);</div><div class='add'>+</div><div class='add'>+	if (abs &lt; 1.10)</div><div class='add'>+		return (100.0 * d);</div><div class='add'>+	return nan("");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int dump_counters(PER_THREAD_PARAMS)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -3047,14 +3044,16 @@ int dump_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		if (DO_BIC(BIC_SMI))</div><div class='ctx'> 			outp += sprintf(outp, "SMI: %d\n", t-&gt;smi_count);</div><div class='ctx'> </div><div class='add'>+		outp += sprintf(outp, "LLC refs: %lld", t-&gt;llc.references);</div><div class='add'>+		outp += sprintf(outp, "LLC miss: %lld", t-&gt;llc.misses);</div><div class='add'>+		outp += sprintf(outp, "LLC Hit%%: %.2f", pct((t-&gt;llc.references - t-&gt;llc.misses) / t-&gt;llc.references));</div><div class='add'>+</div><div class='ctx'> 		for (i = 0, mp = sys.tp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "tADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num,</div><div class='del'>-				    t-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='add'>+			outp += sprintf(outp, "tADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num, t-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (c &amp;&amp; is_cpu_first_thread_in_core(t, c, p)) {</div><div class='add'>+	if (c &amp;&amp; is_cpu_first_thread_in_core(t, c)) {</div><div class='ctx'> 		outp += sprintf(outp, "core: %d\n", c-&gt;core_id);</div><div class='ctx'> 		outp += sprintf(outp, "c3: %016llX\n", c-&gt;c3);</div><div class='ctx'> 		outp += sprintf(outp, "c6: %016llX\n", c-&gt;c6);</div><div class='hunk'>@@ -3069,14 +3068,12 @@ int dump_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 			outp += sprintf(outp, "Joules: %0llX (scale: %lf)\n", energy_value, energy_scale);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0, mp = sys.cp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "cADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num,</div><div class='del'>-				    c-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='add'>+			outp += sprintf(outp, "cADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num, c-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='ctx'> 		}</div><div class='ctx'> 		outp += sprintf(outp, "mc6_us: %016llX\n", c-&gt;mc6_us);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (p &amp;&amp; is_cpu_first_core_in_package(t, c, p)) {</div><div class='add'>+	if (p &amp;&amp; is_cpu_first_core_in_package(t, p)) {</div><div class='ctx'> 		outp += sprintf(outp, "package: %d\n", p-&gt;package_id);</div><div class='ctx'> </div><div class='ctx'> 		outp += sprintf(outp, "Weighted cores: %016llX\n", p-&gt;pkg_wtd_core_c0);</div><div class='hunk'>@@ -3106,9 +3103,7 @@ int dump_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		outp += sprintf(outp, "PTM: %dC\n", p-&gt;pkg_temp_c);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0, mp = sys.pp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "pADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num,</div><div class='del'>-				    p-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='add'>+			outp += sprintf(outp, "pADDED [%d] %8s msr0x%x: %08llX %s\n", i, mp-&gt;name, mp-&gt;msr_num, p-&gt;counter[i], mp-&gt;sp-&gt;path);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3134,6 +3129,26 @@ double rapl_counter_get_value(const struct rapl_counter *c, enum rapl_unit desir</div><div class='ctx'> 	return scaled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void get_perf_llc_stats(int cpu, struct llc_stats *llc)</div><div class='add'>+{</div><div class='add'>+	struct read_format {</div><div class='add'>+		unsigned long long num_read;</div><div class='add'>+		struct llc_stats llc;</div><div class='add'>+	} r;</div><div class='add'>+	const ssize_t expected_read_size = sizeof(r);</div><div class='add'>+	ssize_t actual_read_size;</div><div class='add'>+</div><div class='add'>+	actual_read_size = read(fd_llc_percpu[cpu], &amp;r, expected_read_size);</div><div class='add'>+</div><div class='add'>+	if (actual_read_size == -1)</div><div class='add'>+		err(-1, "%s(cpu%d,) %d,,%ld\n", __func__, cpu, fd_llc_percpu[cpu], expected_read_size);</div><div class='add'>+</div><div class='add'>+	llc-&gt;references = r.llc.references;</div><div class='add'>+	llc-&gt;misses = r.llc.misses;</div><div class='add'>+	if (actual_read_size != expected_read_size)</div><div class='add'>+		warn("%s: failed to read perf_data (req %zu act %zu)", __func__, expected_read_size, actual_read_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * column formatting convention &amp; formats</div><div class='ctx'>  */</div><div class='hunk'>@@ -3143,7 +3158,8 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 	struct platform_counters *pplat_cnt = NULL;</div><div class='ctx'> 	double interval_float, tsc;</div><div class='del'>-	char *fmt8;</div><div class='add'>+	char *fmt8 = "%s%.2f";</div><div class='add'>+</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct msr_counter *mp;</div><div class='ctx'> 	struct perf_counter_info *pp;</div><div class='hunk'>@@ -3157,11 +3173,11 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if showing only 1st thread in core and this isn't one, bail out */</div><div class='del'>-	if (show_core_only &amp;&amp; !is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (show_core_only &amp;&amp; !is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* if showing only 1st thread in pkg and this isn't one, bail out */</div><div class='del'>-	if (show_pkg_only &amp;&amp; !is_cpu_first_core_in_package(t, c, p))</div><div class='add'>+	if (show_pkg_only &amp;&amp; !is_cpu_first_core_in_package(t, p))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*if not summary line and --cpu is used */</div><div class='hunk'>@@ -3223,8 +3239,7 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (DO_BIC(BIC_Node)) {</div><div class='ctx'> 			if (t)</div><div class='del'>-				outp += sprintf(outp, "%s%d",</div><div class='del'>-						(printed++ ? delim : ""), cpus[t-&gt;cpu_id].physical_node_id);</div><div class='add'>+				outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t-&gt;cpu_id].physical_node_id);</div><div class='ctx'> 			else</div><div class='ctx'> 				outp += sprintf(outp, "%s-", (printed++ ? delim : ""));</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3246,15 +3261,13 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 / units * t-&gt;aperf / interval_float);</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Busy))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t-&gt;mperf / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(t-&gt;mperf / tsc));</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Bzy_MHz)) {</div><div class='ctx'> 		if (has_base_hz)</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t-&gt;aperf / t-&gt;mperf);</div><div class='add'>+			outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t-&gt;aperf / t-&gt;mperf);</div><div class='ctx'> 		else</div><div class='del'>-			outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),</div><div class='del'>-					tsc / units * t-&gt;aperf / t-&gt;mperf / interval_float);</div><div class='add'>+			outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), tsc / units * t-&gt;aperf / t-&gt;mperf / interval_float);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_TSC_MHz))</div><div class='hunk'>@@ -3283,96 +3296,81 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	if (DO_BIC(BIC_SMI))</div><div class='ctx'> 		outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t-&gt;smi_count);</div><div class='ctx'> </div><div class='del'>-	/* Added counters */</div><div class='add'>+	/* LLC Stats */</div><div class='add'>+	if (DO_BIC(BIC_LLC_RPS) || DO_BIC(BIC_LLC_HIT)) {</div><div class='add'>+		if (DO_BIC(BIC_LLC_RPS))</div><div class='add'>+			outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), t-&gt;llc.references / interval_float / 1000);</div><div class='add'>+</div><div class='add'>+		if (DO_BIC(BIC_LLC_HIT))</div><div class='add'>+			outp += sprintf(outp, fmt8, (printed++ ? delim : ""), pct((t-&gt;llc.references - t-&gt;llc.misses) / t-&gt;llc.references));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Added Thread Counters */</div><div class='ctx'> 	for (i = 0, mp = sys.tp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int)t-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_PERCENT) {</div><div class='add'>+		if (mp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(mp-&gt;width, &amp;printed, delim, t-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(mp-&gt;width, &amp;printed, delim, t-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_PERCENT) {</div><div class='ctx'> 			if (mp-&gt;type == COUNTER_USEC)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-					    t-&gt;counter[i] / interval_float / 10000);</div><div class='add'>+				outp += print_float_value(&amp;printed, delim, t-&gt;counter[i] / interval_float / 10000);</div><div class='ctx'> 			else</div><div class='del'>-				outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t-&gt;counter[i] / tsc);</div><div class='add'>+				outp += print_float_value(&amp;printed, delim, pct(t-&gt;counter[i] / tsc));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Added perf counters */</div><div class='add'>+	/* Added perf Thread Counters */</div><div class='ctx'> 	for (i = 0, pp = sys.perf_tp; pp; ++i, pp = pp-&gt;next) {</div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-					    (unsigned int)t-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_PERCENT) {</div><div class='add'>+		if (pp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(pp-&gt;width, &amp;printed, delim, t-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(pp-&gt;width, &amp;printed, delim, t-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_PERCENT) {</div><div class='ctx'> 			if (pp-&gt;type == COUNTER_USEC)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-					    t-&gt;perf_counter[i] / interval_float / 10000);</div><div class='add'>+				outp += print_float_value(&amp;printed, delim, t-&gt;perf_counter[i] / interval_float / 10000);</div><div class='ctx'> 			else</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t-&gt;perf_counter[i] / tsc);</div><div class='add'>+				outp += print_float_value(&amp;printed, delim, pct(t-&gt;perf_counter[i] / tsc));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Added PMT Thread Counters */</div><div class='ctx'> 	for (i = 0, ppmt = sys.pmt_tp; ppmt; i++, ppmt = ppmt-&gt;next) {</div><div class='ctx'> 		const unsigned long value_raw = t-&gt;pmt_counter[i];</div><div class='ctx'> 		double value_converted;</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-						(unsigned int)t-&gt;pmt_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t-&gt;pmt_counter[i]);</div><div class='del'>-</div><div class='add'>+			outp += print_hex_value(pmt_counter_get_width(ppmt), &amp;printed, delim, t-&gt;pmt_counter[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='del'>-			value_converted = 100.0 * value_raw / crystal_hz / interval_float;</div><div class='add'>+			value_converted = pct(value_raw / crystal_hz / interval_float);</div><div class='ctx'> 			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			value_converted = 100.0 * value_raw / tcore_clock_freq_hz / interval_float;</div><div class='add'>+			value_converted = pct(value_raw / tcore_clock_freq_hz / interval_float);</div><div class='ctx'> 			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* C1 */</div><div class='ctx'> 	if (DO_BIC(BIC_CPU_c1))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t-&gt;c1 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(t-&gt;c1 / tsc));</div><div class='ctx'> </div><div class='ctx'> 	/* print per-core data only for 1st thread in core */</div><div class='del'>-	if (!is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (!is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_CPU_c3))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;c3 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(c-&gt;c3 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_CPU_c6))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;c6 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(c-&gt;c6 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_CPU_c7))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;c7 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(c-&gt;c7 / tsc));</div><div class='ctx'> </div><div class='ctx'> 	/* Mod%c6 */</div><div class='ctx'> 	if (DO_BIC(BIC_Mod_c6))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;mc6_us / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(c-&gt;mc6_us / tsc));</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_CoreTmp))</div><div class='ctx'> 		outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c-&gt;core_temp_c);</div><div class='hunk'>@@ -3381,77 +3379,53 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	if (DO_BIC(BIC_CORE_THROT_CNT))</div><div class='ctx'> 		outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c-&gt;core_throt_cnt);</div><div class='ctx'> </div><div class='add'>+	/* Added Core Counters */</div><div class='ctx'> 	for (i = 0, mp = sys.cp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int)c-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_PERCENT) {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;counter[i] / tsc);</div><div class='del'>-		}</div><div class='add'>+		if (mp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(mp-&gt;width, &amp;printed, delim, c-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(mp-&gt;width, &amp;printed, delim, c-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_PERCENT)</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, pct(c-&gt;counter[i] / tsc));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Added perf Core counters */</div><div class='ctx'> 	for (i = 0, pp = sys.perf_cp; pp; i++, pp = pp-&gt;next) {</div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-					    (unsigned int)c-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_PERCENT) {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c-&gt;perf_counter[i] / tsc);</div><div class='del'>-		}</div><div class='add'>+		if (pp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(pp-&gt;width, &amp;printed, delim, c-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(pp-&gt;width, &amp;printed, delim, c-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_PERCENT)</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, pct(c-&gt;perf_counter[i] / tsc));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Added PMT Core counters */</div><div class='ctx'> 	for (i = 0, ppmt = sys.pmt_cp; ppmt; i++, ppmt = ppmt-&gt;next) {</div><div class='ctx'> 		const unsigned long value_raw = c-&gt;pmt_counter[i];</div><div class='ctx'> 		double value_converted;</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-						(unsigned int)c-&gt;pmt_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c-&gt;pmt_counter[i]);</div><div class='del'>-</div><div class='add'>+			outp += print_hex_value(pmt_counter_get_width(ppmt), &amp;printed, delim, c-&gt;pmt_counter[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='del'>-			value_converted = 100.0 * value_raw / crystal_hz / interval_float;</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='add'>+			value_converted = pct(value_raw / crystal_hz / interval_float);</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, value_converted);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			value_converted = 100.0 * value_raw / tcore_clock_freq_hz / interval_float;</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='add'>+			value_converted = pct(value_raw / tcore_clock_freq_hz / interval_float);</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, value_converted);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fmt8 = "%s%.2f";</div><div class='del'>-</div><div class='ctx'> 	if (DO_BIC(BIC_CorWatt) &amp;&amp; platform-&gt;has_per_core_rapl)</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;c-&gt;core_energy, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;c-&gt;core_energy, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_Cor_J) &amp;&amp; platform-&gt;has_per_core_rapl)</div><div class='del'>-		outp += sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-				rapl_counter_get_value(&amp;c-&gt;core_energy, RAPL_UNIT_JOULES, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;c-&gt;core_energy, RAPL_UNIT_JOULES, interval_float));</div><div class='ctx'> </div><div class='ctx'> 	/* print per-package data only for 1st core in package */</div><div class='del'>-	if (!is_cpu_first_core_in_package(t, c, p))</div><div class='add'>+	if (!is_cpu_first_core_in_package(t, p))</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	/* PkgTmp */</div><div class='hunk'>@@ -3463,8 +3437,7 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		if (p-&gt;gfx_rc6_ms == -1) {	/* detect GFX counter reset */</div><div class='ctx'> 			outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));</div><div class='ctx'> 		} else {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-					p-&gt;gfx_rc6_ms / 10.0 / interval_float);</div><div class='add'>+			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), p-&gt;gfx_rc6_ms / 10.0 / interval_float);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3481,8 +3454,7 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		if (p-&gt;sam_mc6_ms == -1) {	/* detect GFX counter reset */</div><div class='ctx'> 			outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));</div><div class='ctx'> 		} else {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-					p-&gt;sam_mc6_ms / 10.0 / interval_float);</div><div class='add'>+			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), p-&gt;sam_mc6_ms / 10.0 / interval_float);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3496,150 +3468,112 @@ int format_counters(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 	/* Totl%C0, Any%C0 GFX%C0 CPUGFX% */</div><div class='ctx'> 	if (DO_BIC(BIC_Totl_c0))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pkg_wtd_core_c0 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100 * p-&gt;pkg_wtd_core_c0 / tsc);	/* can exceed 100% */</div><div class='ctx'> 	if (DO_BIC(BIC_Any_c0))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pkg_any_core_c0 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pkg_any_core_c0 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_GFX_c0))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pkg_any_gfxe_c0 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pkg_any_gfxe_c0 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_CPUGFX))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pkg_both_core_gfxe_c0 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pkg_both_core_gfxe_c0 / tsc));</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc2))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc2 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc2 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc3))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc3 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc3 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc6))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc6 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc6 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc7))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc7 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc7 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc8))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc8 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc8 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc9))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc9 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc9 / tsc));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkgpc10))</div><div class='del'>-		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;pc10 / tsc);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;pc10 / tsc));</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Diec6))</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;die_c6 / crystal_hz / interval_float);</div><div class='add'>+		outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;die_c6 / crystal_hz / interval_float));</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_CPU_LPI)) {</div><div class='ctx'> 		if (p-&gt;cpu_lpi &gt;= 0)</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-				    100.0 * p-&gt;cpu_lpi / 1000000.0 / interval_float);</div><div class='add'>+			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;cpu_lpi / 1000000.0 / interval_float));</div><div class='ctx'> 		else</div><div class='ctx'> 			outp += sprintf(outp, "%s(neg)", (printed++ ? delim : ""));</div><div class='ctx'> 	}</div><div class='ctx'> 	if (DO_BIC(BIC_SYS_LPI)) {</div><div class='ctx'> 		if (p-&gt;sys_lpi &gt;= 0)</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "%s%.2f", (printed++ ? delim : ""),</div><div class='del'>-				    100.0 * p-&gt;sys_lpi / 1000000.0 / interval_float);</div><div class='add'>+			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), pct(p-&gt;sys_lpi / 1000000.0 / interval_float));</div><div class='ctx'> 		else</div><div class='ctx'> 			outp += sprintf(outp, "%s(neg)", (printed++ ? delim : ""));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_PkgWatt))</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;energy_pkg, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_pkg, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_CorWatt) &amp;&amp; !platform-&gt;has_per_core_rapl)</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;energy_cores, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_cores, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_GFXWatt))</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;energy_gfx, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_gfx, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_RAMWatt))</div><div class='del'>-		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;energy_dram, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_dram, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_Pkg_J))</div><div class='del'>-		outp += sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-				rapl_counter_get_value(&amp;p-&gt;energy_pkg, RAPL_UNIT_JOULES, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_pkg, RAPL_UNIT_JOULES, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_Cor_J) &amp;&amp; !platform-&gt;has_per_core_rapl)</div><div class='del'>-		outp += sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-				rapl_counter_get_value(&amp;p-&gt;energy_cores, RAPL_UNIT_JOULES, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_cores, RAPL_UNIT_JOULES, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_GFX_J))</div><div class='del'>-		outp += sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-				rapl_counter_get_value(&amp;p-&gt;energy_gfx, RAPL_UNIT_JOULES, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_gfx, RAPL_UNIT_JOULES, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_RAM_J))</div><div class='del'>-		outp += sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-				rapl_counter_get_value(&amp;p-&gt;energy_dram, RAPL_UNIT_JOULES, interval_float));</div><div class='add'>+		outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;energy_dram, RAPL_UNIT_JOULES, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_PKG__))</div><div class='ctx'> 		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;rapl_pkg_perf_status, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		    sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;rapl_pkg_perf_status, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	if (DO_BIC(BIC_RAM__))</div><div class='ctx'> 		outp +=</div><div class='del'>-		    sprintf(outp, fmt8, (printed++ ? delim : ""),</div><div class='del'>-			    rapl_counter_get_value(&amp;p-&gt;rapl_dram_perf_status, RAPL_UNIT_WATTS, interval_float));</div><div class='add'>+		    sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&amp;p-&gt;rapl_dram_perf_status, RAPL_UNIT_WATTS, interval_float));</div><div class='ctx'> 	/* UncMHz */</div><div class='ctx'> 	if (DO_BIC(BIC_UNCORE_MHZ))</div><div class='ctx'> 		outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p-&gt;uncore_mhz);</div><div class='ctx'> </div><div class='add'>+	/* Added Package Counters */</div><div class='ctx'> 	for (i = 0, mp = sys.pp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE) {</div><div class='del'>-			if (mp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int)p-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((mp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p-&gt;counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p-&gt;counter[i]);</div><div class='del'>-		} else if (mp-&gt;format == FORMAT_PERCENT) {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;counter[i] / tsc);</div><div class='del'>-		} else if (mp-&gt;type == COUNTER_K2M)</div><div class='add'>+		if (mp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(mp-&gt;width, &amp;printed, delim, p-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;type == COUNTER_K2M)</div><div class='ctx'> 			outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), (unsigned int)p-&gt;counter[i] / 1000);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(mp-&gt;width, &amp;printed, delim, p-&gt;counter[i]);</div><div class='add'>+		else if (mp-&gt;format == FORMAT_PERCENT)</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, pct(p-&gt;counter[i] / tsc));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Added perf Package Counters */</div><div class='ctx'> 	for (i = 0, pp = sys.perf_pp; pp; i++, pp = pp-&gt;next) {</div><div class='del'>-		if (pp-&gt;format == FORMAT_RAW) {</div><div class='del'>-			if (pp-&gt;width == 32)</div><div class='del'>-				outp +=</div><div class='del'>-				    sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-					    (unsigned int)p-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_DELTA) {</div><div class='del'>-			if ((pp-&gt;type == COUNTER_ITEMS) &amp;&amp; sums_need_wide_columns)</div><div class='del'>-				outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p-&gt;perf_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p-&gt;perf_counter[i]);</div><div class='del'>-		} else if (pp-&gt;format == FORMAT_PERCENT) {</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p-&gt;perf_counter[i] / tsc);</div><div class='del'>-		} else if (pp-&gt;type == COUNTER_K2M) {</div><div class='del'>-			outp +=</div><div class='del'>-			    sprintf(outp, "%s%d", (printed++ ? delim : ""), (unsigned int)p-&gt;perf_counter[i] / 1000);</div><div class='del'>-		}</div><div class='add'>+		if (pp-&gt;format == FORMAT_RAW)</div><div class='add'>+			outp += print_hex_value(pp-&gt;width, &amp;printed, delim, p-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;type == COUNTER_K2M)</div><div class='add'>+			outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), (unsigned int)p-&gt;perf_counter[i] / 1000);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_DELTA || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+			outp += print_decimal_value(pp-&gt;width, &amp;printed, delim, p-&gt;perf_counter[i]);</div><div class='add'>+		else if (pp-&gt;format == FORMAT_PERCENT)</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, pct(p-&gt;perf_counter[i] / tsc));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Added PMT Package Counters */</div><div class='ctx'> 	for (i = 0, ppmt = sys.pmt_pp; ppmt; i++, ppmt = ppmt-&gt;next) {</div><div class='ctx'> 		const unsigned long value_raw = p-&gt;pmt_counter[i];</div><div class='ctx'> 		double value_converted;</div><div class='ctx'> 		switch (ppmt-&gt;type) {</div><div class='ctx'> 		case PMT_TYPE_RAW:</div><div class='del'>-			if (pmt_counter_get_width(ppmt) &lt;= 32)</div><div class='del'>-				outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""),</div><div class='del'>-						(unsigned int)p-&gt;pmt_counter[i]);</div><div class='del'>-			else</div><div class='del'>-				outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p-&gt;pmt_counter[i]);</div><div class='del'>-</div><div class='add'>+			outp += print_hex_value(pmt_counter_get_width(ppmt), &amp;printed, delim, p-&gt;pmt_counter[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_XTAL_TIME:</div><div class='del'>-			value_converted = 100.0 * value_raw / crystal_hz / interval_float;</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='add'>+			value_converted = pct(value_raw / crystal_hz / interval_float);</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, value_converted);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PMT_TYPE_TCORE_CLOCK:</div><div class='del'>-			value_converted = 100.0 * value_raw / tcore_clock_freq_hz / interval_float;</div><div class='del'>-			outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted);</div><div class='add'>+			value_converted = pct(value_raw / tcore_clock_freq_hz / interval_float);</div><div class='add'>+			outp += print_float_value(&amp;printed, delim, value_converted);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3754,11 +3688,10 @@ int delta_package(struct pkg_data *new, struct pkg_data *old)</div><div class='ctx'> 	old-&gt;energy_gfx.raw_value = new-&gt;energy_gfx.raw_value - old-&gt;energy_gfx.raw_value;</div><div class='ctx'> 	old-&gt;energy_dram.raw_value = new-&gt;energy_dram.raw_value - old-&gt;energy_dram.raw_value;</div><div class='ctx'> 	old-&gt;rapl_pkg_perf_status.raw_value = new-&gt;rapl_pkg_perf_status.raw_value - old-&gt;rapl_pkg_perf_status.raw_value;</div><div class='del'>-	old-&gt;rapl_dram_perf_status.raw_value =</div><div class='del'>-	    new-&gt;rapl_dram_perf_status.raw_value - old-&gt;rapl_dram_perf_status.raw_value;</div><div class='add'>+	old-&gt;rapl_dram_perf_status.raw_value = new-&gt;rapl_dram_perf_status.raw_value - old-&gt;rapl_dram_perf_status.raw_value;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, mp = sys.pp; mp; i++, mp = mp-&gt;next) {</div><div class='del'>-		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE)</div><div class='add'>+		if (mp-&gt;format == FORMAT_RAW)</div><div class='ctx'> 			old-&gt;counter[i] = new-&gt;counter[i];</div><div class='ctx'> 		else if (mp-&gt;format == FORMAT_AVERAGE)</div><div class='ctx'> 			old-&gt;counter[i] = new-&gt;counter[i];</div><div class='hunk'>@@ -3862,8 +3795,7 @@ int delta_thread(struct thread_data *new, struct thread_data *old, struct core_d</div><div class='ctx'> 	/* check for TSC &lt; 1 Mcycles over interval */</div><div class='ctx'> 	if (old-&gt;tsc &lt; (1000 * 1000))</div><div class='ctx'> 		errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"</div><div class='del'>-		     "You can disable all c-states by booting with \"idle=poll\"\n"</div><div class='del'>-		     "or just the deep ones with \"processor.max_cstate=1\"");</div><div class='add'>+		     "You can disable all c-states by booting with \"idle=poll\"\n" "or just the deep ones with \"processor.max_cstate=1\"");</div><div class='ctx'> </div><div class='ctx'> 	old-&gt;c1 = new-&gt;c1 - old-&gt;c1;</div><div class='ctx'> </div><div class='hunk'>@@ -3892,8 +3824,7 @@ int delta_thread(struct thread_data *new, struct thread_data *old, struct core_d</div><div class='ctx'> 			old-&gt;c1 = 0;</div><div class='ctx'> 		else {</div><div class='ctx'> 			/* normal case, derive c1 */</div><div class='del'>-			old-&gt;c1 = (old-&gt;tsc * tsc_tweak) - old-&gt;mperf - core_delta-&gt;c3</div><div class='del'>-			    - core_delta-&gt;c6 - core_delta-&gt;c7;</div><div class='add'>+			old-&gt;c1 = (old-&gt;tsc * tsc_tweak) - old-&gt;mperf - core_delta-&gt;c3 - core_delta-&gt;c6 - core_delta-&gt;c7;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3915,6 +3846,12 @@ int delta_thread(struct thread_data *new, struct thread_data *old, struct core_d</div><div class='ctx'> 	if (DO_BIC(BIC_SMI))</div><div class='ctx'> 		old-&gt;smi_count = new-&gt;smi_count - old-&gt;smi_count;</div><div class='ctx'> </div><div class='add'>+	if (DO_BIC(BIC_LLC_RPS))</div><div class='add'>+		old-&gt;llc.references = new-&gt;llc.references - old-&gt;llc.references;</div><div class='add'>+</div><div class='add'>+	if (DO_BIC(BIC_LLC_HIT))</div><div class='add'>+		old-&gt;llc.misses = new-&gt;llc.misses - old-&gt;llc.misses;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0, mp = sys.tp; mp; i++, mp = mp-&gt;next) {</div><div class='ctx'> 		if (mp-&gt;format == FORMAT_RAW || mp-&gt;format == FORMAT_AVERAGE)</div><div class='ctx'> 			old-&gt;counter[i] = new-&gt;counter[i];</div><div class='hunk'>@@ -3939,20 +3876,19 @@ int delta_thread(struct thread_data *new, struct thread_data *old, struct core_d</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int delta_cpu(struct thread_data *t, struct core_data *c,</div><div class='del'>-	      struct pkg_data *p, struct thread_data *t2, struct core_data *c2, struct pkg_data *p2)</div><div class='add'>+int delta_cpu(struct thread_data *t, struct core_data *c, struct pkg_data *p, struct thread_data *t2, struct core_data *c2, struct pkg_data *p2)</div><div class='ctx'> {</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* calculate core delta only for 1st thread in core */</div><div class='del'>-	if (is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		delta_core(c, c2);</div><div class='ctx'> </div><div class='ctx'> 	/* always calculate thread delta */</div><div class='ctx'> 	retval = delta_thread(t, t2, c2);	/* c2 is core delta */</div><div class='ctx'> </div><div class='ctx'> 	/* calculate package delta only for 1st core in package */</div><div class='del'>-	if (is_cpu_first_core_in_package(t, c, p))</div><div class='add'>+	if (is_cpu_first_core_in_package(t, p))</div><div class='ctx'> 		retval |= delta_package(p, p2);</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -3993,6 +3929,9 @@ void clear_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	t-&gt;nmi_count = 0;</div><div class='ctx'> 	t-&gt;smi_count = 0;</div><div class='ctx'> </div><div class='add'>+	t-&gt;llc.references = 0;</div><div class='add'>+	t-&gt;llc.misses = 0;</div><div class='add'>+</div><div class='ctx'> 	c-&gt;c3 = 0;</div><div class='ctx'> 	c-&gt;c6 = 0;</div><div class='ctx'> 	c-&gt;c7 = 0;</div><div class='hunk'>@@ -4001,6 +3940,9 @@ void clear_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	rapl_counter_clear(&amp;c-&gt;core_energy);</div><div class='ctx'> 	c-&gt;core_throt_cnt = 0;</div><div class='ctx'> </div><div class='add'>+	t-&gt;llc.references = 0;</div><div class='add'>+	t-&gt;llc.misses = 0;</div><div class='add'>+</div><div class='ctx'> 	p-&gt;pkg_wtd_core_c0 = 0;</div><div class='ctx'> 	p-&gt;pkg_any_core_c0 = 0;</div><div class='ctx'> 	p-&gt;pkg_any_gfxe_c0 = 0;</div><div class='hunk'>@@ -4098,6 +4040,9 @@ int sum_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	average.threads.nmi_count += t-&gt;nmi_count;</div><div class='ctx'> 	average.threads.smi_count += t-&gt;smi_count;</div><div class='ctx'> </div><div class='add'>+	average.threads.llc.references += t-&gt;llc.references;</div><div class='add'>+	average.threads.llc.misses += t-&gt;llc.misses;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0, mp = sys.tp; mp; i++, mp = mp-&gt;next) {</div><div class='ctx'> 		if (mp-&gt;format == FORMAT_RAW)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -4115,7 +4060,7 @@ int sum_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* sum per-core values only for 1st thread in core */</div><div class='del'>-	if (!is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (!is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	average.cores.c3 += c-&gt;c3;</div><div class='hunk'>@@ -4145,7 +4090,7 @@ int sum_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* sum per-pkg values only for 1st core in pkg */</div><div class='del'>-	if (!is_cpu_first_core_in_package(t, c, p))</div><div class='add'>+	if (!is_cpu_first_core_in_package(t, p))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Totl_c0))</div><div class='hunk'>@@ -4411,8 +4356,7 @@ unsigned long long get_legacy_uncore_mhz(int package)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (die = 0; die &lt;= topo.max_die_id; ++die) {</div><div class='ctx'> </div><div class='del'>-		sprintf(path, "/sys/devices/system/cpu/intel_uncore_frequency/package_%02d_die_%02d/current_freq_khz",</div><div class='del'>-			package, die);</div><div class='add'>+		sprintf(path, "/sys/devices/system/cpu/intel_uncore_frequency/package_%02d_die_%02d/current_freq_khz", package, die);</div><div class='ctx'> </div><div class='ctx'> 		if (access(path, R_OK) == 0)</div><div class='ctx'> 			return (snapshot_sysfs_counter(path) / 1000);</div><div class='hunk'>@@ -4523,11 +4467,6 @@ int get_core_throt_cnt(int cpu, unsigned long long *cnt)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct amperf_group_fd {</div><div class='del'>-	int aperf;		/* Also the group descriptor */</div><div class='del'>-	int mperf;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int read_perf_counter_info(const char *const path, const char *const parse_format, void *value_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	int fdmt;</div><div class='hunk'>@@ -4727,8 +4666,7 @@ int get_rapl_counters(int cpu, unsigned int domain, struct core_data *c, struct</div><div class='ctx'> 		const ssize_t actual_read_size = read(rci-&gt;fd_perf, &amp;perf_data[0], sizeof(perf_data));</div><div class='ctx'> </div><div class='ctx'> 		if (actual_read_size != expected_read_size)</div><div class='del'>-			err(-1, "%s: failed to read perf_data (%zu %zu)", __func__, expected_read_size,</div><div class='del'>-			    actual_read_size);</div><div class='add'>+			err(-1, "%s: failed to read perf_data (%zu %zu)", __func__, expected_read_size, actual_read_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int i = 0, pi = 1; i &lt; NUM_RAPL_COUNTERS; ++i) {</div><div class='hunk'>@@ -4966,8 +4904,7 @@ int get_smi_aperf_mperf(unsigned int cpu, struct thread_data *t)</div><div class='ctx'> 		const ssize_t actual_read_size = read(mci-&gt;fd_perf, &amp;perf_data[0], sizeof(perf_data));</div><div class='ctx'> </div><div class='ctx'> 		if (actual_read_size != expected_read_size)</div><div class='del'>-			err(-1, "%s: failed to read perf_data (%zu %zu)", __func__, expected_read_size,</div><div class='del'>-			    actual_read_size);</div><div class='add'>+			err(-1, "%s: failed to read perf_data (%zu %zu)", __func__, expected_read_size, actual_read_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int i = 0, pi = 1; i &lt; NUM_MSR_COUNTERS; ++i) {</div><div class='hunk'>@@ -5121,6 +5058,9 @@ int get_counters(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 	get_smi_aperf_mperf(cpu, t);</div><div class='ctx'> </div><div class='add'>+	if (DO_BIC(BIC_LLC_RPS) || DO_BIC(BIC_LLC_HIT))</div><div class='add'>+		get_perf_llc_stats(cpu, &amp;t-&gt;llc);</div><div class='add'>+</div><div class='ctx'> 	if (DO_BIC(BIC_IPC))</div><div class='ctx'> 		if (read(get_instr_count_fd(cpu), &amp;t-&gt;instr_count, sizeof(long long)) != sizeof(long long))</div><div class='ctx'> 			return -4;</div><div class='hunk'>@@ -5144,7 +5084,7 @@ int get_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		t-&gt;pmt_counter[i] = pmt_read_counter(pp, t-&gt;cpu_id);</div><div class='ctx'> </div><div class='ctx'> 	/* collect core counters only for 1st thread in core */</div><div class='del'>-	if (!is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (!is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;has_per_core_rapl) {</div><div class='hunk'>@@ -5188,7 +5128,7 @@ int get_counters(PER_THREAD_PARAMS)</div><div class='ctx'> 		c-&gt;pmt_counter[i] = pmt_read_counter(pp, c-&gt;core_id);</div><div class='ctx'> </div><div class='ctx'> 	/* collect package counters only for 1st core in package */</div><div class='del'>-	if (!is_cpu_first_core_in_package(t, c, p))</div><div class='add'>+	if (!is_cpu_first_core_in_package(t, p))</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	if (DO_BIC(BIC_Totl_c0)) {</div><div class='hunk'>@@ -5277,48 +5217,39 @@ char *pkg_cstate_limit_strings[] = { "unknown", "reserved", "pc0", "pc1", "pc2",</div><div class='ctx'> 	"pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int nhm_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int nhm_pkg_cstate_limits[16] = { PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int snb_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int snb_pkg_cstate_limits[16] = { PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int hsw_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int hsw_pkg_cstate_limits[16] = { PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int slv_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int slv_pkg_cstate_limits[16] = { PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCL__6, PCL__7</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int amt_pkg_cstate_limits[16] =</div><div class='del'>-    { PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int amt_pkg_cstate_limits[16] = { PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int phi_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int phi_pkg_cstate_limits[16] = { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int glm_pkg_cstate_limits[16] =</div><div class='del'>-    { PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int glm_pkg_cstate_limits[16] = { PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int skx_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int skx_pkg_cstate_limits[16] = { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int icx_pkg_cstate_limits[16] =</div><div class='del'>-    { PCL__0, PCL__2, PCL__6, PCL__6, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='add'>+int icx_pkg_cstate_limits[16] = { PCL__0, PCL__2, PCL__6, PCL__6, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV,</div><div class='ctx'> 	PCLRSV, PCLRSV</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -5393,8 +5324,7 @@ static void dump_power_ctl(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	get_msr(base_cpu, MSR_IA32_POWER_CTL, &amp;msr);</div><div class='del'>-	fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",</div><div class='del'>-		base_cpu, msr, msr &amp; 0x2 ? "EN" : "DIS");</div><div class='add'>+	fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n", base_cpu, msr, msr &amp; 0x2 ? "EN" : "DIS");</div><div class='ctx'> </div><div class='ctx'> 	/* C-state Pre-wake Disable (CSTATE_PREWAKE_DISABLE) */</div><div class='ctx'> 	if (platform-&gt;has_cst_prewake_bit)</div><div class='hunk'>@@ -5487,8 +5417,7 @@ static void dump_turbo_ratio_limits(int trl_msr_offset)</div><div class='ctx'> 		ratio = (msr &gt;&gt; shift) &amp; 0xFF;</div><div class='ctx'> 		group_size = (core_counts &gt;&gt; shift) &amp; 0xFF;</div><div class='ctx'> 		if (ratio)</div><div class='del'>-			fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",</div><div class='del'>-				ratio, bclk, ratio * bclk, group_size);</div><div class='add'>+			fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", ratio, bclk, ratio * bclk, group_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -5586,9 +5515,7 @@ static void dump_knl_turbo_ratio_limits(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = buckets_no - 1; i &gt;= 0; i--)</div><div class='ctx'> 		if (i &gt; 0 ? ratio[i] != ratio[i - 1] : 1)</div><div class='del'>-			fprintf(outf,</div><div class='del'>-				"%d * %.1f = %.1f MHz max turbo %d active cores\n",</div><div class='del'>-				ratio[i], bclk, ratio[i] * bclk, cores[i]);</div><div class='add'>+			fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", ratio[i], bclk, ratio[i] * bclk, cores[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dump_cst_cfg(void)</div><div class='hunk'>@@ -5673,43 +5600,37 @@ void print_irtl(void)</div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC3) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC3_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC6) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC6_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC7) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC7_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC8) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC8_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC9) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC9_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (platform-&gt;supported_cstates &amp; PC10) {</div><div class='ctx'> 		get_msr(base_cpu, MSR_PKGC10_IRTL, &amp;msr);</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);</div><div class='del'>-		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT",</div><div class='del'>-			(msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='add'>+		fprintf(outf, "%svalid, %lld ns)\n", msr &amp; (1 &lt;&lt; 15) ? "" : "NOT", (msr &amp; 0x3FF) * irtl_time_units[(msr &gt;&gt; 10) &amp; 0x3]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5743,6 +5664,20 @@ void free_fd_instr_count_percpu(void)</div><div class='ctx'> 	fd_instr_count_percpu = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void free_fd_llc_percpu(void)</div><div class='add'>+{</div><div class='add'>+	if (!fd_llc_percpu)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; topo.max_cpu_num + 1; ++i) {</div><div class='add'>+		if (fd_llc_percpu[i] != 0)</div><div class='add'>+			close(fd_llc_percpu[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free(fd_llc_percpu);</div><div class='add'>+	fd_llc_percpu = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void free_fd_cstate(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ccstate_counter_info)</div><div class='hunk'>@@ -5867,6 +5802,7 @@ void free_all_buffers(void)</div><div class='ctx'> </div><div class='ctx'> 	free_fd_percpu();</div><div class='ctx'> 	free_fd_instr_count_percpu();</div><div class='add'>+	free_fd_llc_percpu();</div><div class='ctx'> 	free_fd_msr();</div><div class='ctx'> 	free_fd_rapl_percpu();</div><div class='ctx'> 	free_fd_cstate();</div><div class='hunk'>@@ -6213,6 +6149,7 @@ void linux_perf_init(void);</div><div class='ctx'> void msr_perf_init(void);</div><div class='ctx'> void rapl_perf_init(void);</div><div class='ctx'> void cstate_perf_init(void);</div><div class='add'>+void perf_llc_init(void);</div><div class='ctx'> void added_perf_counters_init(void);</div><div class='ctx'> void pmt_init(void);</div><div class='ctx'> </div><div class='hunk'>@@ -6224,10 +6161,10 @@ void re_initialize(void)</div><div class='ctx'> 	msr_perf_init();</div><div class='ctx'> 	rapl_perf_init();</div><div class='ctx'> 	cstate_perf_init();</div><div class='add'>+	perf_llc_init();</div><div class='ctx'> 	added_perf_counters_init();</div><div class='ctx'> 	pmt_init();</div><div class='del'>-	fprintf(outf, "turbostat: re-initialized with num_cpus %d, allowed_cpus %d\n", topo.num_cpus,</div><div class='del'>-		topo.allowed_cpus);</div><div class='add'>+	fprintf(outf, "turbostat: re-initialized with num_cpus %d, allowed_cpus %d\n", topo.num_cpus, topo.allowed_cpus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void set_max_cpu_num(void)</div><div class='hunk'>@@ -6673,6 +6610,7 @@ release_timer:</div><div class='ctx'> 	timer_delete(timerid);</div><div class='ctx'> release_msr:</div><div class='ctx'> 	free(per_cpu_msr_sum);</div><div class='add'>+	per_cpu_msr_sum = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -6797,21 +6735,43 @@ restart:</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void check_dev_msr()</div><div class='add'>+int probe_dev_msr(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct stat sb;</div><div class='ctx'> 	char pathname[32];</div><div class='ctx'> </div><div class='del'>-	if (no_msr)</div><div class='del'>-		return;</div><div class='del'>-#if defined(ANDROID)</div><div class='ctx'> 	sprintf(pathname, "/dev/msr%d", base_cpu);</div><div class='del'>-#else</div><div class='add'>+	return !stat(pathname, &amp;sb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int probe_dev_cpu_msr(void)</div><div class='add'>+{</div><div class='add'>+	struct stat sb;</div><div class='add'>+	char pathname[32];</div><div class='add'>+</div><div class='ctx'> 	sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);</div><div class='del'>-#endif</div><div class='del'>-	if (stat(pathname, &amp;sb))</div><div class='del'>-		if (system("/sbin/modprobe msr &gt; /dev/null 2&gt;&amp;1"))</div><div class='del'>-			no_msr = 1;</div><div class='add'>+	return !stat(pathname, &amp;sb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int probe_msr_driver(void)</div><div class='add'>+{</div><div class='add'>+	if (probe_dev_msr()) {</div><div class='add'>+		use_android_msr_path = 1;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return probe_dev_cpu_msr();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void check_msr_driver(void)</div><div class='add'>+{</div><div class='add'>+	if (probe_msr_driver())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (system("/sbin/modprobe msr &gt; /dev/null 2&gt;&amp;1"))</div><div class='add'>+		no_msr = 1;</div><div class='add'>+</div><div class='add'>+	if (!probe_msr_driver())</div><div class='add'>+		no_msr = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -6866,11 +6826,7 @@ void check_msr_permission(void)</div><div class='ctx'> 	failed += check_for_cap_sys_rawio();</div><div class='ctx'> </div><div class='ctx'> 	/* test file permissions */</div><div class='del'>-#if defined(ANDROID)</div><div class='del'>-	sprintf(pathname, "/dev/msr%d", base_cpu);</div><div class='del'>-#else</div><div class='del'>-	sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);</div><div class='del'>-#endif</div><div class='add'>+	sprintf(pathname, use_android_msr_path ? "/dev/msr%d" : "/dev/cpu/%d/msr", base_cpu);</div><div class='ctx'> 	if (euidaccess(pathname, R_OK)) {</div><div class='ctx'> 		failed++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6999,8 +6955,7 @@ static void probe_intel_uncore_frequency_legacy(void)</div><div class='ctx'> 			int k, l;</div><div class='ctx'> 			char path_base[128];</div><div class='ctx'> </div><div class='del'>-			sprintf(path_base, "/sys/devices/system/cpu/intel_uncore_frequency/package_%02d_die_%02d", i,</div><div class='del'>-				j);</div><div class='add'>+			sprintf(path_base, "/sys/devices/system/cpu/intel_uncore_frequency/package_%02d_die_%02d", i, j);</div><div class='ctx'> </div><div class='ctx'> 			sprintf(path, "%s/current_freq_khz", path_base);</div><div class='ctx'> 			if (access(path, R_OK))</div><div class='hunk'>@@ -7083,8 +7038,7 @@ static void probe_intel_uncore_frequency_cluster(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if BIC_IS_ENABLED</div><div class='ctx'> 			(BIC_UNCORE_MHZ)</div><div class='del'>-			    add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0,</div><div class='del'>-					package_id);</div><div class='add'>+			    add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0, package_id);</div><div class='ctx'> </div><div class='ctx'> 		if (quiet)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -7093,8 +7047,7 @@ static void probe_intel_uncore_frequency_cluster(void)</div><div class='ctx'> 		k = read_sysfs_int(path);</div><div class='ctx'> 		sprintf(path, "%s/max_freq_khz", path_base);</div><div class='ctx'> 		l = read_sysfs_int(path);</div><div class='del'>-		fprintf(outf, "Uncore Frequency package%d domain%d cluster%d: %d - %d MHz ", package_id, domain_id,</div><div class='del'>-			cluster_id, k / 1000, l / 1000);</div><div class='add'>+		fprintf(outf, "Uncore Frequency package%d domain%d cluster%d: %d - %d MHz ", package_id, domain_id, cluster_id, k / 1000, l / 1000);</div><div class='ctx'> </div><div class='ctx'> 		sprintf(path, "%s/initial_min_freq_khz", path_base);</div><div class='ctx'> 		k = read_sysfs_int(path);</div><div class='hunk'>@@ -7156,21 +7109,17 @@ static void probe_graphics(void)</div><div class='ctx'> 		else</div><div class='ctx'> 			goto next;</div><div class='ctx'> </div><div class='del'>-		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms",</div><div class='del'>-				gt0_is_gt ? GFX_rc6 : SAM_mc6);</div><div class='add'>+		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/gtidle/idle_residency_ms", gt0_is_gt ? GFX_rc6 : SAM_mc6);</div><div class='ctx'> </div><div class='ctx'> 		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/cur_freq", gt0_is_gt ? GFX_MHz : SAM_MHz);</div><div class='ctx'> </div><div class='del'>-		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq",</div><div class='del'>-				gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz);</div><div class='add'>+		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt0/freq0/act_freq", gt0_is_gt ? GFX_ACTMHz : SAM_ACTMHz);</div><div class='ctx'> </div><div class='del'>-		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms",</div><div class='del'>-				gt0_is_gt ? SAM_mc6 : GFX_rc6);</div><div class='add'>+		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/gtidle/idle_residency_ms", gt0_is_gt ? SAM_mc6 : GFX_rc6);</div><div class='ctx'> </div><div class='ctx'> 		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/cur_freq", gt0_is_gt ? SAM_MHz : GFX_MHz);</div><div class='ctx'> </div><div class='del'>-		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq",</div><div class='del'>-				gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz);</div><div class='add'>+		set_graphics_fp("/sys/class/drm/card0/device/tile0/gt1/freq0/act_freq", gt0_is_gt ? SAM_ACTMHz : GFX_ACTMHz);</div><div class='ctx'> </div><div class='ctx'> 		goto end;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7425,8 +7374,7 @@ int print_hwp(PER_THREAD_PARAMS)</div><div class='ctx'> 		"(high %d guar %d eff %d low %d)\n",</div><div class='ctx'> 		cpu, msr,</div><div class='ctx'> 		(unsigned int)HWP_HIGHEST_PERF(msr),</div><div class='del'>-		(unsigned int)HWP_GUARANTEED_PERF(msr),</div><div class='del'>-		(unsigned int)HWP_MOSTEFFICIENT_PERF(msr), (unsigned int)HWP_LOWEST_PERF(msr));</div><div class='add'>+		(unsigned int)HWP_GUARANTEED_PERF(msr), (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), (unsigned int)HWP_LOWEST_PERF(msr));</div><div class='ctx'> </div><div class='ctx'> 	if (get_msr(cpu, MSR_HWP_REQUEST, &amp;msr))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -7437,8 +7385,7 @@ int print_hwp(PER_THREAD_PARAMS)</div><div class='ctx'> 		(unsigned int)(((msr) &gt;&gt; 0) &amp; 0xff),</div><div class='ctx'> 		(unsigned int)(((msr) &gt;&gt; 8) &amp; 0xff),</div><div class='ctx'> 		(unsigned int)(((msr) &gt;&gt; 16) &amp; 0xff),</div><div class='del'>-		(unsigned int)(((msr) &gt;&gt; 24) &amp; 0xff),</div><div class='del'>-		(unsigned int)(((msr) &gt;&gt; 32) &amp; 0xff3), (unsigned int)(((msr) &gt;&gt; 42) &amp; 0x1));</div><div class='add'>+		(unsigned int)(((msr) &gt;&gt; 24) &amp; 0xff), (unsigned int)(((msr) &gt;&gt; 32) &amp; 0xff3), (unsigned int)(((msr) &gt;&gt; 42) &amp; 0x1));</div><div class='ctx'> </div><div class='ctx'> 	if (has_hwp_pkg) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &amp;msr))</div><div class='hunk'>@@ -7449,23 +7396,20 @@ int print_hwp(PER_THREAD_PARAMS)</div><div class='ctx'> 			cpu, msr,</div><div class='ctx'> 			(unsigned int)(((msr) &gt;&gt; 0) &amp; 0xff),</div><div class='ctx'> 			(unsigned int)(((msr) &gt;&gt; 8) &amp; 0xff),</div><div class='del'>-			(unsigned int)(((msr) &gt;&gt; 16) &amp; 0xff),</div><div class='del'>-			(unsigned int)(((msr) &gt;&gt; 24) &amp; 0xff), (unsigned int)(((msr) &gt;&gt; 32) &amp; 0xff3));</div><div class='add'>+			(unsigned int)(((msr) &gt;&gt; 16) &amp; 0xff), (unsigned int)(((msr) &gt;&gt; 24) &amp; 0xff), (unsigned int)(((msr) &gt;&gt; 32) &amp; 0xff3));</div><div class='ctx'> 	}</div><div class='ctx'> 	if (has_hwp_notify) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_HWP_INTERRUPT, &amp;msr))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "</div><div class='del'>-			"(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",</div><div class='del'>-			cpu, msr, ((msr) &amp; 0x1) ? "EN" : "Dis", ((msr) &amp; 0x2) ? "EN" : "Dis");</div><div class='add'>+			"(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n", cpu, msr, ((msr) &amp; 0x1) ? "EN" : "Dis", ((msr) &amp; 0x2) ? "EN" : "Dis");</div><div class='ctx'> 	}</div><div class='ctx'> 	if (get_msr(cpu, MSR_HWP_STATUS, &amp;msr))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "</div><div class='del'>-		"(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",</div><div class='del'>-		cpu, msr, ((msr) &amp; 0x1) ? "" : "No-", ((msr) &amp; 0x4) ? "" : "No-");</div><div class='add'>+		"(%sGuaranteed_Perf_Change, %sExcursion_Min)\n", cpu, msr, ((msr) &amp; 0x1) ? "" : "No-", ((msr) &amp; 0x4) ? "" : "No-");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -7510,8 +7454,7 @@ int print_perf_limit(PER_THREAD_PARAMS)</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 6) ? "VR-Therm, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 5) ? "Auto-HWP, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 4) ? "Graphics, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 2) ? "bit2, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 1) ? "ThermStatus, " : "", (msr &amp; 1 &lt;&lt; 0) ? "PROCHOT, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 2) ? "bit2, " : "", (msr &amp; 1 &lt;&lt; 1) ? "ThermStatus, " : "", (msr &amp; 1 &lt;&lt; 0) ? "PROCHOT, " : "");</div><div class='ctx'> 		fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 31) ? "bit31, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 30) ? "bit30, " : "",</div><div class='hunk'>@@ -7524,8 +7467,7 @@ int print_perf_limit(PER_THREAD_PARAMS)</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 22) ? "VR-Therm, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 21) ? "Auto-HWP, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 20) ? "Graphics, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 18) ? "bit18, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 17) ? "ThermStatus, " : "", (msr &amp; 1 &lt;&lt; 16) ? "PROCHOT, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 18) ? "bit18, " : "", (msr &amp; 1 &lt;&lt; 17) ? "ThermStatus, " : "", (msr &amp; 1 &lt;&lt; 16) ? "PROCHOT, " : "");</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> 	if (platform-&gt;plr_msrs &amp; PLR_GFX) {</div><div class='hunk'>@@ -7537,16 +7479,14 @@ int print_perf_limit(PER_THREAD_PARAMS)</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 4) ? "Graphics, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 6) ? "VR-Therm, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 8) ? "Amps, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 9) ? "GFXPwr, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 10) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 11) ? "PkgPwrL2, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 9) ? "GFXPwr, " : "", (msr &amp; 1 &lt;&lt; 10) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 11) ? "PkgPwrL2, " : "");</div><div class='ctx'> 		fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 16) ? "PROCHOT, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 17) ? "ThermStatus, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 20) ? "Graphics, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 22) ? "VR-Therm, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 24) ? "Amps, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 25) ? "GFXPwr, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 26) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 27) ? "PkgPwrL2, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 25) ? "GFXPwr, " : "", (msr &amp; 1 &lt;&lt; 26) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 27) ? "PkgPwrL2, " : "");</div><div class='ctx'> 	}</div><div class='ctx'> 	if (platform-&gt;plr_msrs &amp; PLR_RING) {</div><div class='ctx'> 		get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &amp;msr);</div><div class='hunk'>@@ -7555,14 +7495,12 @@ int print_perf_limit(PER_THREAD_PARAMS)</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 0) ? "PROCHOT, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 1) ? "ThermStatus, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 6) ? "VR-Therm, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 8) ? "Amps, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 10) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 11) ? "PkgPwrL2, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 8) ? "Amps, " : "", (msr &amp; 1 &lt;&lt; 10) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 11) ? "PkgPwrL2, " : "");</div><div class='ctx'> 		fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 16) ? "PROCHOT, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 17) ? "ThermStatus, " : "",</div><div class='ctx'> 			(msr &amp; 1 &lt;&lt; 22) ? "VR-Therm, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 24) ? "Amps, " : "",</div><div class='del'>-			(msr &amp; 1 &lt;&lt; 26) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 27) ? "PkgPwrL2, " : "");</div><div class='add'>+			(msr &amp; 1 &lt;&lt; 24) ? "Amps, " : "", (msr &amp; 1 &lt;&lt; 26) ? "PkgPwrL1, " : "", (msr &amp; 1 &lt;&lt; 27) ? "PkgPwrL2, " : "");</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -7582,7 +7520,7 @@ double get_tdp_intel(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long msr;</div><div class='ctx'> </div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_PKG_POWER_INFO)</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_PKG_POWER_INFO)</div><div class='ctx'> 		if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &amp;msr))</div><div class='ctx'> 			return ((msr &gt;&gt; 0) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units;</div><div class='ctx'> 	return get_quirk_tdp();</div><div class='hunk'>@@ -7613,12 +7551,12 @@ void rapl_probe_intel(void)</div><div class='ctx'> 		CLR_BIC(BIC_GFX_J, &amp;bic_enabled);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!platform-&gt;rapl_msrs || no_msr)</div><div class='add'>+	if (!valid_rapl_msrs || no_msr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!(platform-&gt;rapl_msrs &amp; RAPL_PKG_PERF_STATUS))</div><div class='add'>+	if (!(valid_rapl_msrs &amp; RAPL_PKG_PERF_STATUS))</div><div class='ctx'> 		CLR_BIC(BIC_PKG__, &amp;bic_enabled);</div><div class='del'>-	if (!(platform-&gt;rapl_msrs &amp; RAPL_DRAM_PERF_STATUS))</div><div class='add'>+	if (!(valid_rapl_msrs &amp; RAPL_DRAM_PERF_STATUS))</div><div class='ctx'> 		CLR_BIC(BIC_RAM__, &amp;bic_enabled);</div><div class='ctx'> </div><div class='ctx'> 	/* units on package 0, verify later other packages match */</div><div class='hunk'>@@ -7667,7 +7605,7 @@ void rapl_probe_amd(void)</div><div class='ctx'> 		CLR_BIC(BIC_Cor_J, &amp;bic_enabled);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!platform-&gt;rapl_msrs || no_msr)</div><div class='add'>+	if (!valid_rapl_msrs || no_msr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &amp;msr))</div><div class='hunk'>@@ -7690,8 +7628,7 @@ void print_power_limit_msr(int cpu, unsigned long long msr, char *label)</div><div class='ctx'> 		cpu, label,</div><div class='ctx'> 		((msr &gt;&gt; 15) &amp; 1) ? "EN" : "DIS",</div><div class='ctx'> 		((msr &gt;&gt; 0) &amp; 0x7FFF) * rapl_power_units,</div><div class='del'>-		(1.0 + (((msr &gt;&gt; 22) &amp; 0x3) / 4.0)) * (1 &lt;&lt; ((msr &gt;&gt; 17) &amp; 0x1F)) * rapl_time_units,</div><div class='del'>-		(((msr &gt;&gt; 16) &amp; 1) ? "EN" : "DIS"));</div><div class='add'>+		(1.0 + (((msr &gt;&gt; 22) &amp; 0x3) / 4.0)) * (1 &lt;&lt; ((msr &gt;&gt; 17) &amp; 0x1F)) * rapl_time_units, (((msr &gt;&gt; 16) &amp; 1) ? "EN" : "DIS"));</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -7857,7 +7794,7 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 	UNUSED(c);</div><div class='ctx'> 	UNUSED(p);</div><div class='ctx'> </div><div class='del'>-	if (!platform-&gt;rapl_msrs)</div><div class='add'>+	if (!valid_rapl_msrs)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* RAPL counters are per package, so print only for 1st thread/package */</div><div class='hunk'>@@ -7870,7 +7807,7 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_AMD_F17H) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_AMD_F17H) {</div><div class='ctx'> 		msr_name = "MSR_RAPL_PWR_UNIT";</div><div class='ctx'> 		if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &amp;msr))</div><div class='ctx'> 			return -1;</div><div class='hunk'>@@ -7883,7 +7820,7 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 	fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,</div><div class='ctx'> 		rapl_power_units, rapl_energy_units, rapl_time_units);</div><div class='ctx'> </div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_PKG_POWER_INFO) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_PKG_POWER_INFO) {</div><div class='ctx'> </div><div class='ctx'> 		if (get_msr(cpu, MSR_PKG_POWER_INFO, &amp;msr))</div><div class='ctx'> 			return -5;</div><div class='hunk'>@@ -7892,25 +7829,22 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 			cpu, msr,</div><div class='ctx'> 			((msr &gt;&gt; 0) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='ctx'> 			((msr &gt;&gt; 16) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='del'>-			((msr &gt;&gt; 32) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='del'>-			((msr &gt;&gt; 48) &amp; RAPL_TIME_GRANULARITY) * rapl_time_units);</div><div class='add'>+			((msr &gt;&gt; 32) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units, ((msr &gt;&gt; 48) &amp; RAPL_TIME_GRANULARITY) * rapl_time_units);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_PKG) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_PKG) {</div><div class='ctx'> </div><div class='ctx'> 		if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &amp;msr))</div><div class='ctx'> 			return -9;</div><div class='ctx'> </div><div class='del'>-		fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",</div><div class='del'>-			cpu, msr, (msr &gt;&gt; 63) &amp; 1 ? "" : "UN");</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr &gt;&gt; 63) &amp; 1 ? "" : "UN");</div><div class='ctx'> </div><div class='ctx'> 		print_power_limit_msr(cpu, msr, "PKG Limit #1");</div><div class='ctx'> 		fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%0.3f Watts, %f* sec, clamp %sabled)\n",</div><div class='ctx'> 			cpu,</div><div class='ctx'> 			((msr &gt;&gt; 47) &amp; 1) ? "EN" : "DIS",</div><div class='ctx'> 			((msr &gt;&gt; 32) &amp; 0x7FFF) * rapl_power_units,</div><div class='del'>-			(1.0 + (((msr &gt;&gt; 54) &amp; 0x3) / 4.0)) * (1 &lt;&lt; ((msr &gt;&gt; 49) &amp; 0x1F)) * rapl_time_units,</div><div class='del'>-			((msr &gt;&gt; 48) &amp; 1) ? "EN" : "DIS");</div><div class='add'>+			(1.0 + (((msr &gt;&gt; 54) &amp; 0x3) / 4.0)) * (1 &lt;&lt; ((msr &gt;&gt; 49) &amp; 0x1F)) * rapl_time_units, ((msr &gt;&gt; 48) &amp; 1) ? "EN" : "DIS");</div><div class='ctx'> </div><div class='ctx'> 		if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &amp;msr))</div><div class='ctx'> 			return -9;</div><div class='hunk'>@@ -7920,7 +7854,7 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 			cpu, ((msr &gt;&gt; 0) &amp; 0x1FFF) * rapl_power_units, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_DRAM_POWER_INFO) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_DRAM_POWER_INFO) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_DRAM_POWER_INFO, &amp;msr))</div><div class='ctx'> 			return -6;</div><div class='ctx'> </div><div class='hunk'>@@ -7928,31 +7862,28 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> 			cpu, msr,</div><div class='ctx'> 			((msr &gt;&gt; 0) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='ctx'> 			((msr &gt;&gt; 16) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='del'>-			((msr &gt;&gt; 32) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units,</div><div class='del'>-			((msr &gt;&gt; 48) &amp; RAPL_TIME_GRANULARITY) * rapl_time_units);</div><div class='add'>+			((msr &gt;&gt; 32) &amp; RAPL_POWER_GRANULARITY) * rapl_power_units, ((msr &gt;&gt; 48) &amp; RAPL_TIME_GRANULARITY) * rapl_time_units);</div><div class='ctx'> 	}</div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_DRAM) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_DRAM) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &amp;msr))</div><div class='ctx'> 			return -9;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",</div><div class='del'>-			cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='ctx'> </div><div class='ctx'> 		print_power_limit_msr(cpu, msr, "DRAM Limit");</div><div class='ctx'> 	}</div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_CORE_POLICY) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_CORE_POLICY) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_PP0_POLICY, &amp;msr))</div><div class='ctx'> 			return -7;</div><div class='ctx'> </div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr &amp; 0xF);</div><div class='ctx'> 	}</div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_CORE_POWER_LIMIT) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_CORE_POWER_LIMIT) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &amp;msr))</div><div class='ctx'> 			return -9;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",</div><div class='del'>-			cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='ctx'> 		print_power_limit_msr(cpu, msr, "Cores Limit");</div><div class='ctx'> 	}</div><div class='del'>-	if (platform-&gt;rapl_msrs &amp; RAPL_GFX) {</div><div class='add'>+	if (valid_rapl_msrs &amp; RAPL_GFX) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_PP1_POLICY, &amp;msr))</div><div class='ctx'> 			return -8;</div><div class='ctx'> </div><div class='hunk'>@@ -7960,20 +7891,58 @@ int print_rapl(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 		if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &amp;msr))</div><div class='ctx'> 			return -9;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",</div><div class='del'>-			cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr &gt;&gt; 31) &amp; 1 ? "" : "UN");</div><div class='ctx'> 		print_power_limit_msr(cpu, msr, "GFX Limit");</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * probe_rapl_msrs</div><div class='add'>+ *</div><div class='add'>+ * initialize global valid_rapl_msrs to platform-&gt;plat_rapl_msrs</div><div class='add'>+ * only if PKG_ENERGY counter is enumerated and reads non-zero</div><div class='add'>+ */</div><div class='add'>+void probe_rapl_msrs(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	off_t offset;</div><div class='add'>+	unsigned long long msr_value;</div><div class='add'>+</div><div class='add'>+	if (no_msr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if ((platform-&gt;plat_rapl_msrs &amp; (RAPL_PKG | RAPL_AMD_F17H)) == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = idx_to_offset(IDX_PKG_ENERGY);</div><div class='add'>+	if (offset &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = get_msr(base_cpu, offset, &amp;msr_value);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (debug)</div><div class='add'>+			fprintf(outf, "Can not read RAPL_PKG_ENERGY MSR(0x%llx)\n", (unsigned long long)offset);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (msr_value == 0) {</div><div class='add'>+		if (debug)</div><div class='add'>+			fprintf(outf, "RAPL_PKG_ENERGY MSR(0x%llx) == ZERO: disabling all RAPL MSRs\n", (unsigned long long)offset);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	valid_rapl_msrs = platform-&gt;plat_rapl_msrs;	/* success */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * probe_rapl()</div><div class='ctx'>  *</div><div class='ctx'>  * sets rapl_power_units, rapl_energy_units, rapl_time_units</div><div class='ctx'>  */</div><div class='ctx'> void probe_rapl(void)</div><div class='ctx'> {</div><div class='add'>+	probe_rapl_msrs();</div><div class='add'>+</div><div class='ctx'> 	if (genuine_intel)</div><div class='ctx'> 		rapl_probe_intel();</div><div class='ctx'> 	if (authentic_amd || hygon_genuine)</div><div class='hunk'>@@ -7984,7 +7953,7 @@ void probe_rapl(void)</div><div class='ctx'> </div><div class='ctx'> 	print_rapl_sysfs();</div><div class='ctx'> </div><div class='del'>-	if (!platform-&gt;rapl_msrs || no_msr)</div><div class='add'>+	if (!valid_rapl_msrs || no_msr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for_all_cpus(print_rapl, ODD_COUNTERS);</div><div class='hunk'>@@ -8088,7 +8057,7 @@ int print_thermal(PER_THREAD_PARAMS)</div><div class='ctx'> 	cpu = t-&gt;cpu_id;</div><div class='ctx'> </div><div class='ctx'> 	/* DTS is per-core, no need to print for each thread */</div><div class='del'>-	if (!is_cpu_first_thread_in_core(t, c, p))</div><div class='add'>+	if (!is_cpu_first_thread_in_core(t, c))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_migrate(cpu)) {</div><div class='hunk'>@@ -8096,7 +8065,7 @@ int print_thermal(PER_THREAD_PARAMS)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (do_ptm &amp;&amp; is_cpu_first_core_in_package(t, c, p)) {</div><div class='add'>+	if (do_ptm &amp;&amp; is_cpu_first_core_in_package(t, p)) {</div><div class='ctx'> 		if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &amp;msr))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -8108,8 +8077,7 @@ int print_thermal(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 		dts = (msr &gt;&gt; 16) &amp; 0x7F;</div><div class='ctx'> 		dts2 = (msr &gt;&gt; 8) &amp; 0x7F;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",</div><div class='del'>-			cpu, msr, tj_max - dts, tj_max - dts2);</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (do_dts &amp;&amp; debug) {</div><div class='hunk'>@@ -8120,16 +8088,14 @@ int print_thermal(PER_THREAD_PARAMS)</div><div class='ctx'> </div><div class='ctx'> 		dts = (msr &gt;&gt; 16) &amp; 0x7F;</div><div class='ctx'> 		resolution = (msr &gt;&gt; 27) &amp; 0xF;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",</div><div class='del'>-			cpu, msr, tj_max - dts, resolution);</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n", cpu, msr, tj_max - dts, resolution);</div><div class='ctx'> </div><div class='ctx'> 		if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &amp;msr))</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		dts = (msr &gt;&gt; 16) &amp; 0x7F;</div><div class='ctx'> 		dts2 = (msr &gt;&gt; 8) &amp; 0x7F;</div><div class='del'>-		fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",</div><div class='del'>-			cpu, msr, tj_max - dts, tj_max - dts2);</div><div class='add'>+		fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -8203,8 +8169,7 @@ void decode_misc_enable_msr(void)</div><div class='ctx'> 			msr &amp; MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",</div><div class='ctx'> 			msr &amp; MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",</div><div class='ctx'> 			msr &amp; MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",</div><div class='del'>-			msr &amp; MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",</div><div class='del'>-			msr &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");</div><div class='add'>+			msr &amp; MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void decode_misc_feature_control(void)</div><div class='hunk'>@@ -8243,8 +8208,7 @@ void decode_misc_pwr_mgmt_msr(void)</div><div class='ctx'> </div><div class='ctx'> 	if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &amp;msr))</div><div class='ctx'> 		fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",</div><div class='del'>-			base_cpu, msr,</div><div class='del'>-			msr &amp; (1 &lt;&lt; 0) ? "DIS" : "EN", msr &amp; (1 &lt;&lt; 1) ? "EN" : "DIS", msr &amp; (1 &lt;&lt; 8) ? "EN" : "DIS");</div><div class='add'>+			base_cpu, msr, msr &amp; (1 &lt;&lt; 0) ? "DIS" : "EN", msr &amp; (1 &lt;&lt; 1) ? "EN" : "DIS", msr &amp; (1 &lt;&lt; 8) ? "EN" : "DIS");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -8297,30 +8261,26 @@ void print_dev_latency(void)</div><div class='ctx'> 	close(fd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int has_instr_count_access(void)</div><div class='add'>+static int has_perf_instr_count_access(void)</div><div class='ctx'> {</div><div class='ctx'> 	int fd;</div><div class='del'>-	int has_access;</div><div class='ctx'> </div><div class='ctx'> 	if (no_perf)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fd = open_perf_counter(base_cpu, PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS, -1, 0);</div><div class='del'>-	has_access = fd != -1;</div><div class='del'>-</div><div class='ctx'> 	if (fd != -1)</div><div class='ctx'> 		close(fd);</div><div class='ctx'> </div><div class='del'>-	if (!has_access)</div><div class='add'>+	if (fd == -1)</div><div class='ctx'> 		warnx("Failed to access %s. Some of the counters may not be available\n"</div><div class='del'>-		      "\tRun as root to enable them or use %s to disable the access explicitly",</div><div class='del'>-		      "instructions retired perf counter", "--no-perf");</div><div class='add'>+		      "\tRun as root to enable them or use %s to disable the access explicitly", "perf instructions retired counter",</div><div class='add'>+		      "'--hide IPC' or '--no-perf'");</div><div class='ctx'> </div><div class='del'>-	return has_access;</div><div class='add'>+	return (fd != -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai,</div><div class='del'>-			  double *scale_, enum rapl_unit *unit_)</div><div class='add'>+int add_rapl_perf_counter(int cpu, struct rapl_counter_info_t *rci, const struct rapl_counter_arch_info *cai, double *scale_, enum rapl_unit *unit_)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -8370,11 +8330,16 @@ void linux_perf_init(void)</div><div class='ctx'> 	if (access("/proc/sys/kernel/perf_event_paranoid", F_OK))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (BIC_IS_ENABLED(BIC_IPC) &amp;&amp; has_aperf) {</div><div class='add'>+	if (BIC_IS_ENABLED(BIC_IPC) &amp;&amp; cpuid_has_aperf_mperf) {</div><div class='ctx'> 		fd_instr_count_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));</div><div class='ctx'> 		if (fd_instr_count_percpu == NULL)</div><div class='ctx'> 			err(-1, "calloc fd_instr_count_percpu");</div><div class='ctx'> 	}</div><div class='add'>+	if (BIC_IS_ENABLED(BIC_LLC_RPS)) {</div><div class='add'>+		fd_llc_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));</div><div class='add'>+		if (fd_llc_percpu == NULL)</div><div class='add'>+			err(-1, "calloc fd_llc_percpu");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void rapl_perf_init(void)</div><div class='hunk'>@@ -8485,7 +8450,7 @@ void rapl_perf_init(void)</div><div class='ctx'> /* Assumes msr_counter_info is populated */</div><div class='ctx'> static int has_amperf_access(void)</div><div class='ctx'> {</div><div class='del'>-	return msr_counter_arch_infos[MSR_ARCH_INFO_APERF_INDEX].present &amp;&amp;</div><div class='add'>+	return cpuid_has_aperf_mperf &amp;&amp; msr_counter_arch_infos[MSR_ARCH_INFO_APERF_INDEX].present &amp;&amp;</div><div class='ctx'> 	    msr_counter_arch_infos[MSR_ARCH_INFO_MPERF_INDEX].present;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -8708,8 +8673,7 @@ void cstate_perf_init_(bool soft_c1)</div><div class='ctx'> 					cci-&gt;source[cai-&gt;rci_index] = COUNTER_SOURCE_PERF;</div><div class='ctx'> </div><div class='ctx'> 					/* User MSR for this counter */</div><div class='del'>-				} else if (pkg_cstate_limit &gt;= cai-&gt;pkg_cstate_limit</div><div class='del'>-					   &amp;&amp; add_msr_counter(cpu, cai-&gt;msr) &gt;= 0) {</div><div class='add'>+				} else if (pkg_cstate_limit &gt;= cai-&gt;pkg_cstate_limit &amp;&amp; add_msr_counter(cpu, cai-&gt;msr) &gt;= 0) {</div><div class='ctx'> 					cci-&gt;source[cai-&gt;rci_index] = COUNTER_SOURCE_MSR;</div><div class='ctx'> 					cci-&gt;msr[cai-&gt;rci_index] = cai-&gt;msr;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -8827,8 +8791,7 @@ void process_cpuid()</div><div class='ctx'> 		hygon_genuine = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!quiet)</div><div class='del'>-		fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n",</div><div class='del'>-			(char *)&amp;ebx, (char *)&amp;edx, (char *)&amp;ecx, max_level);</div><div class='add'>+		fprintf(outf, "CPUID(0): %.4s%.4s%.4s 0x%x CPUID levels\n", (char *)&amp;ebx, (char *)&amp;edx, (char *)&amp;ecx, max_level);</div><div class='ctx'> </div><div class='ctx'> 	__cpuid(1, fms, ebx, ecx, edx);</div><div class='ctx'> 	family = (fms &gt;&gt; 8) &amp; 0xf;</div><div class='hunk'>@@ -8857,8 +8820,7 @@ void process_cpuid()</div><div class='ctx'> 	__cpuid(0x80000000, max_extended_level, ebx, ecx, edx);</div><div class='ctx'> </div><div class='ctx'> 	if (!quiet) {</div><div class='del'>-		fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d)",</div><div class='del'>-			family, model, stepping, family, model, stepping);</div><div class='add'>+		fprintf(outf, "CPUID(1): family:model:stepping 0x%x:%x:%x (%d:%d:%d)", family, model, stepping, family, model, stepping);</div><div class='ctx'> 		if (ucode_patch_valid)</div><div class='ctx'> 			fprintf(outf, " microcode 0x%x", (unsigned int)((ucode_patch &gt;&gt; 32) &amp; 0xFFFFFFFF));</div><div class='ctx'> 		fputc('\n', outf);</div><div class='hunk'>@@ -8872,8 +8834,7 @@ void process_cpuid()</div><div class='ctx'> 			ecx_flags &amp; (1 &lt;&lt; 8) ? "TM2" : "-",</div><div class='ctx'> 			edx_flags &amp; (1 &lt;&lt; 4) ? "TSC" : "-",</div><div class='ctx'> 			edx_flags &amp; (1 &lt;&lt; 5) ? "MSR" : "-",</div><div class='del'>-			edx_flags &amp; (1 &lt;&lt; 22) ? "ACPI-TM" : "-",</div><div class='del'>-			edx_flags &amp; (1 &lt;&lt; 28) ? "HT" : "-", edx_flags &amp; (1 &lt;&lt; 29) ? "TM" : "-");</div><div class='add'>+			edx_flags &amp; (1 &lt;&lt; 22) ? "ACPI-TM" : "-", edx_flags &amp; (1 &lt;&lt; 28) ? "HT" : "-", edx_flags &amp; (1 &lt;&lt; 29) ? "TM" : "-");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	probe_platform_features(family, model);</div><div class='hunk'>@@ -8897,7 +8858,7 @@ void process_cpuid()</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	__cpuid(0x6, eax, ebx, ecx, edx);</div><div class='del'>-	has_aperf = ecx &amp; (1 &lt;&lt; 0);</div><div class='add'>+	cpuid_has_aperf_mperf = ecx &amp; (1 &lt;&lt; 0);</div><div class='ctx'> 	do_dts = eax &amp; (1 &lt;&lt; 0);</div><div class='ctx'> 	if (do_dts)</div><div class='ctx'> 		BIC_PRESENT(BIC_CoreTmp);</div><div class='hunk'>@@ -8915,14 +8876,13 @@ void process_cpuid()</div><div class='ctx'> 	if (!quiet)</div><div class='ctx'> 		fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "</div><div class='ctx'> 			"%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",</div><div class='del'>-			has_aperf ? "" : "No-",</div><div class='add'>+			cpuid_has_aperf_mperf ? "" : "No-",</div><div class='ctx'> 			has_turbo ? "" : "No-",</div><div class='ctx'> 			do_dts ? "" : "No-",</div><div class='ctx'> 			do_ptm ? "" : "No-",</div><div class='ctx'> 			has_hwp ? "" : "No-",</div><div class='ctx'> 			has_hwp_notify ? "" : "No-",</div><div class='del'>-			has_hwp_activity_window ? "" : "No-",</div><div class='del'>-			has_hwp_epp ? "" : "No-", has_hwp_pkg ? "" : "No-", has_epb ? "" : "No-");</div><div class='add'>+			has_hwp_activity_window ? "" : "No-", has_hwp_epp ? "" : "No-", has_hwp_pkg ? "" : "No-", has_epb ? "" : "No-");</div><div class='ctx'> </div><div class='ctx'> 	if (!quiet)</div><div class='ctx'> 		decode_misc_enable_msr();</div><div class='hunk'>@@ -8956,8 +8916,7 @@ void process_cpuid()</div><div class='ctx'> </div><div class='ctx'> 		if (ebx_tsc != 0) {</div><div class='ctx'> 			if (!quiet &amp;&amp; (ebx != 0))</div><div class='del'>-				fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",</div><div class='del'>-					eax_crystal, ebx_tsc, crystal_hz);</div><div class='add'>+				fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", eax_crystal, ebx_tsc, crystal_hz);</div><div class='ctx'> </div><div class='ctx'> 			if (crystal_hz == 0)</div><div class='ctx'> 				crystal_hz = platform-&gt;crystal_freq;</div><div class='hunk'>@@ -8989,11 +8948,10 @@ void process_cpuid()</div><div class='ctx'> 			tsc_tweak = base_hz / tsc_hz;</div><div class='ctx'> </div><div class='ctx'> 		if (!quiet)</div><div class='del'>-			fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",</div><div class='del'>-				base_mhz, max_mhz, bus_mhz);</div><div class='add'>+			fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n", base_mhz, max_mhz, bus_mhz);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (has_aperf)</div><div class='add'>+	if (cpuid_has_aperf_mperf)</div><div class='ctx'> 		aperf_mperf_multiplier = platform-&gt;need_perf_multiplier ? 1024 : 1;</div><div class='ctx'> </div><div class='ctx'> 	BIC_PRESENT(BIC_IRQ);</div><div class='hunk'>@@ -9045,6 +9003,62 @@ void probe_pm_features(void)</div><div class='ctx'> 		decode_misc_feature_control();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* perf_llc_probe</div><div class='add'>+ *</div><div class='add'>+ * return 1 on success, else 0</div><div class='add'>+ */</div><div class='add'>+int has_perf_llc_access(void)</div><div class='add'>+{</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	if (no_perf)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	fd = open_perf_counter(base_cpu, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_REFERENCES, -1, PERF_FORMAT_GROUP);</div><div class='add'>+	if (fd != -1)</div><div class='add'>+		close(fd);</div><div class='add'>+</div><div class='add'>+	if (fd == -1)</div><div class='add'>+		warnx("Failed to access %s. Some of the counters may not be available\n"</div><div class='add'>+		      "\tRun as root to enable them or use %s to disable the access explicitly", "perf LLC counters", "'--hide LLC' or '--no-perf'");</div><div class='add'>+</div><div class='add'>+	return (fd != -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void perf_llc_init(void)</div><div class='add'>+{</div><div class='add'>+	int cpu;</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	if (no_perf)</div><div class='add'>+		return;</div><div class='add'>+	if (!(BIC_IS_ENABLED(BIC_LLC_RPS) &amp;&amp; BIC_IS_ENABLED(BIC_LLC_HIT)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (cpu = 0; cpu &lt;= topo.max_cpu_num; ++cpu) {</div><div class='add'>+</div><div class='add'>+		if (cpu_is_not_allowed(cpu))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		assert(fd_llc_percpu != 0);</div><div class='add'>+		fd_llc_percpu[cpu] = open_perf_counter(cpu, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_REFERENCES, -1, PERF_FORMAT_GROUP);</div><div class='add'>+		if (fd_llc_percpu[cpu] == -1) {</div><div class='add'>+			warnx("%s: perf REFS: failed to open counter on cpu%d", __func__, cpu);</div><div class='add'>+			free_fd_llc_percpu();</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		assert(fd_llc_percpu != 0);</div><div class='add'>+		retval = open_perf_counter(cpu, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_MISSES, fd_llc_percpu[cpu], PERF_FORMAT_GROUP);</div><div class='add'>+		if (retval == -1) {</div><div class='add'>+			warnx("%s: perf MISS: failed to open counter on cpu%d", __func__, cpu);</div><div class='add'>+			free_fd_llc_percpu();</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	BIC_PRESENT(BIC_LLC_RPS);</div><div class='add'>+	BIC_PRESENT(BIC_LLC_HIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * in /dev/cpu/ return success for names that are numbers</div><div class='ctx'>  * ie. filter out ".", "..", "microcode".</div><div class='hunk'>@@ -9351,6 +9365,7 @@ void init_counter(struct thread_data *thread_base, struct core_data *core_base,</div><div class='ctx'> </div><div class='ctx'> 	t-&gt;cpu_id = cpu_id;</div><div class='ctx'> 	if (!cpu_is_not_allowed(cpu_id)) {</div><div class='add'>+</div><div class='ctx'> 		if (c-&gt;base_cpu &lt; 0)</div><div class='ctx'> 			c-&gt;base_cpu = t-&gt;cpu_id;</div><div class='ctx'> 		if (pkg_base[pkg_id].base_cpu &lt; 0)</div><div class='hunk'>@@ -9456,7 +9471,7 @@ bool has_added_counters(void)</div><div class='ctx'> </div><div class='ctx'> void check_msr_access(void)</div><div class='ctx'> {</div><div class='del'>-	check_dev_msr();</div><div class='add'>+	check_msr_driver();</div><div class='ctx'> 	check_msr_permission();</div><div class='ctx'> </div><div class='ctx'> 	if (no_msr)</div><div class='hunk'>@@ -9465,8 +9480,16 @@ void check_msr_access(void)</div><div class='ctx'> </div><div class='ctx'> void check_perf_access(void)</div><div class='ctx'> {</div><div class='del'>-	if (no_perf || !BIC_IS_ENABLED(BIC_IPC) || !has_instr_count_access())</div><div class='del'>-		CLR_BIC(BIC_IPC, &amp;bic_enabled);</div><div class='add'>+	if (BIC_IS_ENABLED(BIC_IPC))</div><div class='add'>+		if (!has_perf_instr_count_access())</div><div class='add'>+			no_perf = 1;</div><div class='add'>+</div><div class='add'>+	if (BIC_IS_ENABLED(BIC_LLC_RPS) || BIC_IS_ENABLED(BIC_LLC_HIT))</div><div class='add'>+		if (!has_perf_llc_access())</div><div class='add'>+			no_perf = 1;</div><div class='add'>+</div><div class='add'>+	if (no_perf)</div><div class='add'>+		bic_disable_perf_access();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool perf_has_hybrid_devices(void)</div><div class='hunk'>@@ -9589,8 +9612,7 @@ int added_perf_counters_init_(struct perf_counter_info *pinfo)</div><div class='ctx'> </div><div class='ctx'> 			perf_config = read_perf_config(perf_device, pinfo-&gt;event);</div><div class='ctx'> 			if (perf_config == (unsigned int)-1) {</div><div class='del'>-				warnx("%s: perf/%s/%s: failed to read %s",</div><div class='del'>-				      __func__, perf_device, pinfo-&gt;event, "config");</div><div class='add'>+				warnx("%s: perf/%s/%s: failed to read %s", __func__, perf_device, pinfo-&gt;event, "config");</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -9601,8 +9623,7 @@ int added_perf_counters_init_(struct perf_counter_info *pinfo)</div><div class='ctx'> </div><div class='ctx'> 			fd_perf = open_perf_counter(cpu, perf_type, perf_config, -1, 0);</div><div class='ctx'> 			if (fd_perf == -1) {</div><div class='del'>-				warnx("%s: perf/%s/%s: failed to open counter on cpu%d",</div><div class='del'>-				      __func__, perf_device, pinfo-&gt;event, cpu);</div><div class='add'>+				warnx("%s: perf/%s/%s: failed to open counter on cpu%d", __func__, perf_device, pinfo-&gt;event, cpu);</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -9611,8 +9632,7 @@ int added_perf_counters_init_(struct perf_counter_info *pinfo)</div><div class='ctx'> 			pinfo-&gt;scale = perf_scale;</div><div class='ctx'> </div><div class='ctx'> 			if (debug)</div><div class='del'>-				fprintf(stderr, "Add perf/%s/%s cpu%d: %d\n",</div><div class='del'>-					perf_device, pinfo-&gt;event, cpu, pinfo-&gt;fd_perf_per_domain[next_domain]);</div><div class='add'>+				fprintf(stderr, "Add perf/%s/%s cpu%d: %d\n", perf_device, pinfo-&gt;event, cpu, pinfo-&gt;fd_perf_per_domain[next_domain]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pinfo = pinfo-&gt;next;</div><div class='hunk'>@@ -9926,8 +9946,7 @@ int pmt_add_counter(unsigned int guid, unsigned int seq, const char *name, enum</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (conflict) {</div><div class='del'>-		fprintf(stderr, "%s: conflicting parameters for the PMT counter with the same name %s\n",</div><div class='del'>-			__func__, name);</div><div class='add'>+		fprintf(stderr, "%s: conflicting parameters for the PMT counter with the same name %s\n", __func__, name);</div><div class='ctx'> 		exit(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9970,8 +9989,7 @@ void pmt_init(void)</div><div class='ctx'> 			 * CWF with newer firmware might require a PMT_TYPE_XTAL_TIME intead of PMT_TYPE_TCORE_CLOCK.</div><div class='ctx'> 			 */</div><div class='ctx'> 			pmt_add_counter(PMT_CWF_MC1E_GUID, seq, "CPU%c1e", PMT_TYPE_TCORE_CLOCK,</div><div class='del'>-					PMT_COUNTER_CWF_MC1E_LSB, PMT_COUNTER_CWF_MC1E_MSB, offset, SCOPE_CPU,</div><div class='del'>-					FORMAT_DELTA, cpu_num, PMT_OPEN_TRY);</div><div class='add'>+					PMT_COUNTER_CWF_MC1E_LSB, PMT_COUNTER_CWF_MC1E_MSB, offset, SCOPE_CPU, FORMAT_DELTA, cpu_num, PMT_OPEN_TRY);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Rather complex logic for each time we go to the next loop iteration,</div><div class='hunk'>@@ -10021,6 +10039,7 @@ void turbostat_init()</div><div class='ctx'> 	linux_perf_init();</div><div class='ctx'> 	rapl_perf_init();</div><div class='ctx'> 	cstate_perf_init();</div><div class='add'>+	perf_llc_init();</div><div class='ctx'> 	added_perf_counters_init();</div><div class='ctx'> 	pmt_init();</div><div class='ctx'> </div><div class='hunk'>@@ -10126,7 +10145,7 @@ int get_and_dump_counters(void)</div><div class='ctx'> </div><div class='ctx'> void print_version()</div><div class='ctx'> {</div><div class='del'>-	fprintf(outf, "turbostat version 2025.09.09 - Len Brown &lt;lenb@kernel.org&gt;\n");</div><div class='add'>+	fprintf(outf, "turbostat version 2025.12.02 - Len Brown &lt;lenb@kernel.org&gt;\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define COMMAND_LINE_SIZE 2048</div><div class='hunk'>@@ -10166,8 +10185,7 @@ struct msr_counter *find_msrp_by_name(struct msr_counter *head, char *name)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int add_counter(unsigned int msr_num, char *path, char *name,</div><div class='del'>-		unsigned int width, enum counter_scope scope,</div><div class='del'>-		enum counter_type type, enum counter_format format, int flags, int id)</div><div class='add'>+		unsigned int width, enum counter_scope scope, enum counter_type type, enum counter_format format, int flags, int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct msr_counter *msrp;</div><div class='ctx'> </div><div class='hunk'>@@ -10276,9 +10294,7 @@ int add_counter(unsigned int msr_num, char *path, char *name,</div><div class='ctx'> struct perf_counter_info *make_perf_counter_info(const char *perf_device,</div><div class='ctx'> 						 const char *perf_event,</div><div class='ctx'> 						 const char *name,</div><div class='del'>-						 unsigned int width,</div><div class='del'>-						 enum counter_scope scope,</div><div class='del'>-						 enum counter_type type, enum counter_format format)</div><div class='add'>+						 unsigned int width, enum counter_scope scope, enum counter_type type, enum counter_format format)</div><div class='ctx'> {</div><div class='ctx'> 	struct perf_counter_info *pinfo;</div><div class='ctx'> </div><div class='hunk'>@@ -10353,8 +10369,7 @@ int add_perf_counter(const char *perf_device, const char *perf_event, const char</div><div class='ctx'> </div><div class='ctx'> 	// FIXME: we might not have debug here yet</div><div class='ctx'> 	if (debug)</div><div class='del'>-		fprintf(stderr, "%s: %s/%s, name: %s, scope%d\n",</div><div class='del'>-			__func__, pinfo-&gt;device, pinfo-&gt;event, pinfo-&gt;name, pinfo-&gt;scope);</div><div class='add'>+		fprintf(stderr, "%s: %s/%s, name: %s, scope%d\n", __func__, pinfo-&gt;device, pinfo-&gt;event, pinfo-&gt;name, pinfo-&gt;scope);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -10523,8 +10538,7 @@ int pmt_parse_from_path(const char *target_path, unsigned int *out_guid, unsigne</div><div class='ctx'> </div><div class='ctx'> 	pmt_diriter_init(&amp;pmt_iter);</div><div class='ctx'> </div><div class='del'>-	for (dirname = pmt_diriter_begin(&amp;pmt_iter, SYSFS_TELEM_PATH); dirname != NULL;</div><div class='del'>-	     dirname = pmt_diriter_next(&amp;pmt_iter)) {</div><div class='add'>+	for (dirname = pmt_diriter_begin(&amp;pmt_iter, SYSFS_TELEM_PATH); dirname != NULL; dirname = pmt_diriter_next(&amp;pmt_iter)) {</div><div class='ctx'> </div><div class='ctx'> 		fd_telem_dir = openat(dirfd(pmt_iter.dir), dirname-&gt;d_name, O_RDONLY | O_DIRECTORY);</div><div class='ctx'> 		if (fd_telem_dir == -1)</div><div class='hunk'>@@ -10536,8 +10550,7 @@ int pmt_parse_from_path(const char *target_path, unsigned int *out_guid, unsigne</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (fstat(fd_telem_dir, &amp;stat) == -1) {</div><div class='del'>-			fprintf(stderr, "%s: Failed to stat %s directory: %s", __func__,</div><div class='del'>-				dirname-&gt;d_name, strerror(errno));</div><div class='add'>+			fprintf(stderr, "%s: Failed to stat %s directory: %s", __func__, dirname-&gt;d_name, strerror(errno));</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -10633,8 +10646,7 @@ void parse_add_command_pmt(char *add_command)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (!has_scope) {</div><div class='del'>-				printf("%s: invalid value for scope. Expected cpu%%u, core%%u or package%%u.\n",</div><div class='del'>-				       __func__);</div><div class='add'>+				printf("%s: invalid value for scope. Expected cpu%%u, core%%u or package%%u.\n", __func__);</div><div class='ctx'> 				exit(1);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -10710,8 +10722,7 @@ next:</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!has_format) {</div><div class='del'>-			fprintf(stderr, "%s: Invalid format %s. Expected raw, average or delta\n",</div><div class='del'>-				__func__, format_name);</div><div class='add'>+			fprintf(stderr, "%s: Invalid format %s. Expected raw, average or delta\n", __func__, format_name);</div><div class='ctx'> 			exit(1);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -10878,7 +10889,7 @@ void probe_cpuidle_residency(void)</div><div class='ctx'> 		if (is_deferred_skip(name_buf))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC, FORMAT_PERCENT, SYSFS_PERCPU, 0);</div><div class='add'>+		add_counter(0, path, name_buf, 32, SCOPE_CPU, COUNTER_USEC, FORMAT_PERCENT, SYSFS_PERCPU, 0);</div><div class='ctx'> </div><div class='ctx'> 		if (state &gt; max_state)</div><div class='ctx'> 			max_state = state;</div><div class='head'>diff --git a/tools/power/x86/x86_energy_perf_policy/Makefile b/tools/power/x86/x86_energy_perf_policy/Makefile<br/>index 666b325a62a2..d18284667400 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/x86_energy_perf_policy/Makefile</a></div><div class='hunk'>@@ -1,8 +1,12 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> CC		= $(CROSS_COMPILE)gcc</div><div class='del'>-BUILD_OUTPUT    := $(CURDIR)</div><div class='add'>+BUILD_OUTPUT	:= $(CURDIR)</div><div class='ctx'> PREFIX		:= /usr</div><div class='ctx'> DESTDIR		:=</div><div class='add'>+DAY		:= $(shell date +%Y.%m.%d)</div><div class='add'>+SNAPSHOT	= x86_energy_perf_policy-$(DAY)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> ifeq ("$(origin O)", "command line")</div><div class='ctx'> 	BUILD_OUTPUT := $(O)</div><div class='hunk'>@@ -27,3 +31,26 @@ install : x86_energy_perf_policy</div><div class='ctx'> 	install -d  $(DESTDIR)$(PREFIX)/share/man/man8</div><div class='ctx'> 	install -m 644 x86_energy_perf_policy.8 $(DESTDIR)$(PREFIX)/share/man/man8</div><div class='ctx'> </div><div class='add'>+snapshot: x86_energy_perf_policy</div><div class='add'>+	@rm -rf $(SNAPSHOT)</div><div class='add'>+	@mkdir $(SNAPSHOT)</div><div class='add'>+	@cp x86_energy_perf_policy Makefile x86_energy_perf_policy.c x86_energy_perf_policy.8 $(SNAPSHOT)</div><div class='add'>+</div><div class='add'>+	@sed -e 's/^#include &lt;linux\/bits.h&gt;/#include "bits.h"/' -e 's/u64/unsigned long long/' ../../../../arch/x86/include/asm/msr-index.h &gt; $(SNAPSHOT)/msr-index.h</div><div class='add'>+	@echo '#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))' &gt;&gt; $(SNAPSHOT)/msr-index.h</div><div class='add'>+	@echo "#define BIT(x) (1 &lt;&lt; (x))" &gt; $(SNAPSHOT)/bits.h</div><div class='add'>+	@echo "#define BIT_ULL(nr) (1ULL &lt;&lt; (nr))" &gt;&gt; $(SNAPSHOT)/bits.h</div><div class='add'>+	@echo "#define GENMASK(h, l) (((~0UL) &lt;&lt; (l)) &amp; (~0UL &gt;&gt; (sizeof(long) * 8 - 1 - (h))))" &gt;&gt; $(SNAPSHOT)/bits.h</div><div class='add'>+	@echo "#define GENMASK_ULL(h, l) (((~0ULL) &lt;&lt; (l)) &amp; (~0ULL &gt;&gt; (sizeof(long long) * 8 - 1 - (h))))" &gt;&gt; $(SNAPSHOT)/bits.h</div><div class='add'>+</div><div class='add'>+	@echo '#define BUILD_BUG_ON(cond) do { enum { compile_time_check ## __COUNTER__ = 1/(!(cond)) }; } while (0)' &gt; $(SNAPSHOT)/build_bug.h</div><div class='add'>+	@echo '#define __must_be_array(arr) 0' &gt;&gt; $(SNAPSHOT)/build_bug.h</div><div class='add'>+</div><div class='add'>+	@echo PWD=. &gt; $(SNAPSHOT)/Makefile</div><div class='add'>+	@echo "CFLAGS +=	-DMSRHEADER='\"msr-index.h\"'" &gt;&gt; $(SNAPSHOT)/Makefile</div><div class='add'>+	@echo "CFLAGS +=	-DBUILD_BUG_HEADER='\"build_bug.h\"'" &gt;&gt; $(SNAPSHOT)/Makefile</div><div class='add'>+	@sed -e's/.*MSRHEADER.*//' Makefile &gt;&gt; $(SNAPSHOT)/Makefile</div><div class='add'>+</div><div class='add'>+	@rm -f $(SNAPSHOT).tar.gz</div><div class='add'>+	tar cvzf $(SNAPSHOT).tar.gz $(SNAPSHOT)</div><div class='add'>+</div><div class='head'>diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8 b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8<br/>index 78c6361898b1..0aa981c18e56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.8</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> .\"  Distributed under the GPL, Copyleft 1994.</div><div class='ctx'> .TH X86_ENERGY_PERF_POLICY 8</div><div class='ctx'> .SH NAME</div><div class='del'>-x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers</div><div class='add'>+x86_energy_perf_policy \- Manage Energy vs. Performance Policy</div><div class='ctx'> .SH SYNOPSIS</div><div class='ctx'> .B x86_energy_perf_policy</div><div class='ctx'> .RB "[ options ] [ scope ] [field \ value]"</div><div class='hunk'>@@ -19,9 +19,14 @@ x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Spe</div><div class='ctx'> .SH DESCRIPTION</div><div class='ctx'> \fBx86_energy_perf_policy\fP</div><div class='ctx'> displays and updates energy-performance policy settings specific to</div><div class='del'>-Intel Architecture Processors.  Settings are accessed via Model Specific Register (MSR)</div><div class='del'>-updates, no matter if the Linux cpufreq sub-system is enabled or not.</div><div class='add'>+Intel Architecture Processors.  It summarizes settings available</div><div class='add'>+in standard Linux interfaces (eg. cpufreq),</div><div class='add'>+and also decodes underlying Model Specific Register (MSRs).</div><div class='add'>+While \fBx86_energy_perf_policy\fP can manage energy-performance policy</div><div class='add'>+using only MSR access, it prefers standard</div><div class='add'>+Linux kernel interfaces, when they are available.</div><div class='ctx'> </div><div class='add'>+.SH BACKGROUND</div><div class='ctx'> Policy in MSR_IA32_ENERGY_PERF_BIAS (EPB)</div><div class='ctx'> may affect a wide range of hardware decisions,</div><div class='ctx'> such as how aggressively the hardware enters and exits CPU idle states (C-states)</div><div class='hunk'>@@ -200,7 +205,9 @@ runs only as root.</div><div class='ctx'> .SH FILES</div><div class='ctx'> .ta</div><div class='ctx'> .nf</div><div class='del'>-/dev/cpu/*/msr</div><div class='add'>+EPB: /sys/devices/system/cpu/cpu*/power/energy_perf_bias</div><div class='add'>+EPP: /sys/devices/system/cpu/cpu*/cpufreq/energy_performance_preference</div><div class='add'>+MSR: /dev/cpu/*/msr</div><div class='ctx'> .fi</div><div class='ctx'> .SH "SEE ALSO"</div><div class='ctx'> .nf</div><div class='head'>diff --git a/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c b/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c<br/>index ebda9c366b2b..ac37132207a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * policy preference bias on recent X86 processors.</div><div class='ctx'>  */</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2010 - 2017 Intel Corporation.</div><div class='add'>+ * Copyright (c) 2010 - 2025 Intel Corporation.</div><div class='ctx'>  * Len Brown &lt;len.brown@intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -62,6 +62,7 @@ unsigned char turbo_update_value;</div><div class='ctx'> unsigned char update_hwp_epp;</div><div class='ctx'> unsigned char update_hwp_min;</div><div class='ctx'> unsigned char update_hwp_max;</div><div class='add'>+unsigned char hwp_limits_done_via_sysfs;</div><div class='ctx'> unsigned char update_hwp_desired;</div><div class='ctx'> unsigned char update_hwp_window;</div><div class='ctx'> unsigned char update_hwp_use_pkg;</div><div class='hunk'>@@ -94,6 +95,8 @@ unsigned int bdx_highest_ratio;</div><div class='ctx'> #define PATH_TO_CPU "/sys/devices/system/cpu/"</div><div class='ctx'> #define SYSFS_PATH_MAX 255</div><div class='ctx'> </div><div class='add'>+static int use_android_msr_path;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * maintain compatibility with original implementation, but don't document it:</div><div class='ctx'>  */</div><div class='hunk'>@@ -369,7 +372,7 @@ void validate_cpu_selected_set(void)</div><div class='ctx'> 	for (cpu = 0; cpu &lt;= max_cpu_num; ++cpu) {</div><div class='ctx'> 		if (CPU_ISSET_S(cpu, cpu_setsize, cpu_selected_set))</div><div class='ctx'> 			if (!CPU_ISSET_S(cpu, cpu_setsize, cpu_present_set))</div><div class='del'>-				errx(1, "Requested cpu% is not present", cpu);</div><div class='add'>+				errx(1, "Requested cpu%d is not present", cpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -517,7 +520,7 @@ void for_packages(unsigned long long pkg_set, int (func)(int))</div><div class='ctx'> </div><div class='ctx'> void print_version(void)</div><div class='ctx'> {</div><div class='del'>-	printf("x86_energy_perf_policy 17.05.11 (C) Len Brown &lt;len.brown@intel.com&gt;\n");</div><div class='add'>+	printf("x86_energy_perf_policy 2025.11.22 Len Brown &lt;lenb@kernel.org&gt;\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cmdline(int argc, char **argv)</div><div class='hunk'>@@ -630,7 +633,7 @@ void cmdline(int argc, char **argv)</div><div class='ctx'>  */</div><div class='ctx'> FILE *fopen_or_die(const char *path, const char *mode)</div><div class='ctx'> {</div><div class='del'>-	FILE *filep = fopen(path, "r");</div><div class='add'>+	FILE *filep = fopen(path, mode);</div><div class='ctx'> </div><div class='ctx'> 	if (!filep)</div><div class='ctx'> 		err(1, "%s: open failed", path);</div><div class='hunk'>@@ -644,7 +647,7 @@ void err_on_hypervisor(void)</div><div class='ctx'> 	char *buffer;</div><div class='ctx'> </div><div class='ctx'> 	/* On VMs /proc/cpuinfo contains a "flags" entry for hypervisor */</div><div class='del'>-	cpuinfo = fopen_or_die("/proc/cpuinfo", "ro");</div><div class='add'>+	cpuinfo = fopen_or_die("/proc/cpuinfo", "r");</div><div class='ctx'> </div><div class='ctx'> 	buffer = malloc(4096);</div><div class='ctx'> 	if (!buffer) {</div><div class='hunk'>@@ -659,6 +662,11 @@ void err_on_hypervisor(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	flags = strstr(buffer, "flags");</div><div class='add'>+	if (!flags) {</div><div class='add'>+		fclose(cpuinfo);</div><div class='add'>+		free(buffer);</div><div class='add'>+		err(1, "Failed to find 'flags' in /proc/cpuinfo");</div><div class='add'>+	}</div><div class='ctx'> 	rewind(cpuinfo);</div><div class='ctx'> 	fseek(cpuinfo, flags - buffer, SEEK_SET);</div><div class='ctx'> 	if (!fgets(buffer, 4096, cpuinfo)) {</div><div class='hunk'>@@ -683,10 +691,12 @@ int get_msr(int cpu, int offset, unsigned long long *msr)</div><div class='ctx'> 	char pathname[32];</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='del'>-	sprintf(pathname, "/dev/cpu/%d/msr", cpu);</div><div class='add'>+	sprintf(pathname, use_android_msr_path ? "/dev/msr%d" : "/dev/cpu/%d/msr", cpu);</div><div class='ctx'> 	fd = open(pathname, O_RDONLY);</div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-		err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);</div><div class='add'>+		err(-1, "%s open failed, try chown or chmod +r %s, or run as root",</div><div class='add'>+		   pathname, use_android_msr_path ? "/dev/msr*" : "/dev/cpu/*/msr");</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	retval = pread(fd, msr, sizeof(*msr), offset);</div><div class='ctx'> 	if (retval != sizeof(*msr)) {</div><div class='hunk'>@@ -707,10 +717,11 @@ int put_msr(int cpu, int offset, unsigned long long new_msr)</div><div class='ctx'> 	int retval;</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='del'>-	sprintf(pathname, "/dev/cpu/%d/msr", cpu);</div><div class='add'>+	sprintf(pathname, use_android_msr_path ? "/dev/msr%d" : "/dev/cpu/%d/msr", cpu);</div><div class='ctx'> 	fd = open(pathname, O_RDWR);</div><div class='ctx'> 	if (fd &lt; 0)</div><div class='del'>-		err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);</div><div class='add'>+		err(-1, "%s open failed, try chown or chmod +r %s, or run as root",</div><div class='add'>+		   pathname, use_android_msr_path ? "/dev/msr*" : "/dev/cpu/*/msr");</div><div class='ctx'> </div><div class='ctx'> 	retval = pwrite(fd, &amp;new_msr, sizeof(new_msr), offset);</div><div class='ctx'> 	if (retval != sizeof(new_msr))</div><div class='hunk'>@@ -809,7 +820,7 @@ void print_hwp_request_pkg(int pkg, struct msr_hwp_request *h, char *str)</div><div class='ctx'> 		h-&gt;hwp_min, h-&gt;hwp_max, h-&gt;hwp_desired, h-&gt;hwp_epp,</div><div class='ctx'> 		h-&gt;hwp_window, h-&gt;hwp_window &amp; 0x7F, (h-&gt;hwp_window &gt;&gt; 7) &amp; 0x7);</div><div class='ctx'> }</div><div class='del'>-void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)</div><div class='add'>+void read_hwp_request_msr(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long msr;</div><div class='ctx'> </div><div class='hunk'>@@ -823,7 +834,7 @@ void read_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr</div><div class='ctx'> 	hwp_req-&gt;hwp_use_pkg = (((msr) &gt;&gt; 42) &amp; 0x1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)</div><div class='add'>+void write_hwp_request_msr(int cpu, struct msr_hwp_request *hwp_req, unsigned int msr_offset)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long msr = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -843,7 +854,7 @@ void write_hwp_request(int cpu, struct msr_hwp_request *hwp_req, unsigned int ms</div><div class='ctx'> 	put_msr(cpu, msr_offset, msr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_epb(int cpu)</div><div class='add'>+static int get_epb_sysfs(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	char path[SYSFS_PATH_MAX];</div><div class='ctx'> 	char linebuf[3];</div><div class='hunk'>@@ -865,7 +876,7 @@ static int get_epb(int cpu)</div><div class='ctx'> 	return (int)val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_epb(int cpu, int val)</div><div class='add'>+static int set_epb_sysfs(int cpu, int val)</div><div class='ctx'> {</div><div class='ctx'> 	char path[SYSFS_PATH_MAX];</div><div class='ctx'> 	char linebuf[3];</div><div class='hunk'>@@ -895,14 +906,14 @@ int print_cpu_msrs(int cpu)</div><div class='ctx'> 	struct msr_hwp_cap cap;</div><div class='ctx'> 	int epb;</div><div class='ctx'> </div><div class='del'>-	epb = get_epb(cpu);</div><div class='add'>+	epb = get_epb_sysfs(cpu);</div><div class='ctx'> 	if (epb &gt;= 0)</div><div class='ctx'> 		printf("cpu%d: EPB %u\n", cpu, (unsigned int) epb);</div><div class='ctx'> </div><div class='ctx'> 	if (!has_hwp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	read_hwp_request(cpu, &amp;req, MSR_HWP_REQUEST);</div><div class='add'>+	read_hwp_request_msr(cpu, &amp;req, MSR_HWP_REQUEST);</div><div class='ctx'> 	print_hwp_request(cpu, &amp;req, "");</div><div class='ctx'> </div><div class='ctx'> 	read_hwp_cap(cpu, &amp;cap, MSR_HWP_CAPABILITIES);</div><div class='hunk'>@@ -919,7 +930,7 @@ int print_pkg_msrs(int pkg)</div><div class='ctx'> 	if (!has_hwp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	read_hwp_request(first_cpu_in_pkg[pkg], &amp;req, MSR_HWP_REQUEST_PKG);</div><div class='add'>+	read_hwp_request_msr(first_cpu_in_pkg[pkg], &amp;req, MSR_HWP_REQUEST_PKG);</div><div class='ctx'> 	print_hwp_request_pkg(pkg, &amp;req, "");</div><div class='ctx'> </div><div class='ctx'> 	if (has_hwp_notify) {</div><div class='hunk'>@@ -951,8 +962,10 @@ int ratio_2_sysfs_khz(int ratio)</div><div class='ctx'> }</div><div class='ctx'> /*</div><div class='ctx'>  * If HWP is enabled and cpufreq sysfs attribtes are present,</div><div class='del'>- * then update sysfs, so that it will not become</div><div class='del'>- * stale when we write to MSRs.</div><div class='add'>+ * then update via sysfs. The intel_pstate driver may modify (clip)</div><div class='add'>+ * this request, say, when HWP_CAP is outside of PLATFORM_INFO limits,</div><div class='add'>+ * and the driver-chosen value takes precidence.</div><div class='add'>+ *</div><div class='ctx'>  * (intel_pstate's max_perf_pct and min_perf_pct will follow cpufreq,</div><div class='ctx'>  *  so we don't have to touch that.)</div><div class='ctx'>  */</div><div class='hunk'>@@ -1007,6 +1020,8 @@ int update_sysfs(int cpu)</div><div class='ctx'> 	if (update_hwp_max)</div><div class='ctx'> 		update_cpufreq_scaling_freq(1, cpu, req_update.hwp_max);</div><div class='ctx'> </div><div class='add'>+	hwp_limits_done_via_sysfs = 1;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1074,21 +1089,21 @@ int check_hwp_request_v_hwp_capabilities(int cpu, struct msr_hwp_request *req, s</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int update_hwp_request(int cpu)</div><div class='add'>+int update_hwp_request_msr(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct msr_hwp_request req;</div><div class='ctx'> 	struct msr_hwp_cap cap;</div><div class='ctx'> </div><div class='ctx'> 	int msr_offset = MSR_HWP_REQUEST;</div><div class='ctx'> </div><div class='del'>-	read_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+	read_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> 	if (debug)</div><div class='ctx'> 		print_hwp_request(cpu, &amp;req, "old: ");</div><div class='ctx'> </div><div class='del'>-	if (update_hwp_min)</div><div class='add'>+	if (update_hwp_min &amp;&amp; !hwp_limits_done_via_sysfs)</div><div class='ctx'> 		req.hwp_min = req_update.hwp_min;</div><div class='ctx'> </div><div class='del'>-	if (update_hwp_max)</div><div class='add'>+	if (update_hwp_max &amp;&amp; !hwp_limits_done_via_sysfs)</div><div class='ctx'> 		req.hwp_max = req_update.hwp_max;</div><div class='ctx'> </div><div class='ctx'> 	if (update_hwp_desired)</div><div class='hunk'>@@ -1111,15 +1126,15 @@ int update_hwp_request(int cpu)</div><div class='ctx'> </div><div class='ctx'> 	verify_hwp_req_self_consistency(cpu, &amp;req);</div><div class='ctx'> </div><div class='del'>-	write_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+	write_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> </div><div class='ctx'> 	if (debug) {</div><div class='del'>-		read_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+		read_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> 		print_hwp_request(cpu, &amp;req, "new: ");</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-int update_hwp_request_pkg(int pkg)</div><div class='add'>+int update_hwp_request_pkg_msr(int pkg)</div><div class='ctx'> {</div><div class='ctx'> 	struct msr_hwp_request req;</div><div class='ctx'> 	struct msr_hwp_cap cap;</div><div class='hunk'>@@ -1127,7 +1142,7 @@ int update_hwp_request_pkg(int pkg)</div><div class='ctx'> </div><div class='ctx'> 	int msr_offset = MSR_HWP_REQUEST_PKG;</div><div class='ctx'> </div><div class='del'>-	read_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+	read_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> 	if (debug)</div><div class='ctx'> 		print_hwp_request_pkg(pkg, &amp;req, "old: ");</div><div class='ctx'> </div><div class='hunk'>@@ -1155,10 +1170,10 @@ int update_hwp_request_pkg(int pkg)</div><div class='ctx'> </div><div class='ctx'> 	verify_hwp_req_self_consistency(cpu, &amp;req);</div><div class='ctx'> </div><div class='del'>-	write_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+	write_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> </div><div class='ctx'> 	if (debug) {</div><div class='del'>-		read_hwp_request(cpu, &amp;req, msr_offset);</div><div class='add'>+		read_hwp_request_msr(cpu, &amp;req, msr_offset);</div><div class='ctx'> 		print_hwp_request_pkg(pkg, &amp;req, "new: ");</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1166,30 +1181,39 @@ int update_hwp_request_pkg(int pkg)</div><div class='ctx'> </div><div class='ctx'> int enable_hwp_on_cpu(int cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long msr;</div><div class='add'>+	unsigned long long old_msr, new_msr;</div><div class='add'>+</div><div class='add'>+	get_msr(cpu, MSR_PM_ENABLE, &amp;old_msr);</div><div class='add'>+</div><div class='add'>+	if (old_msr &amp; 1)</div><div class='add'>+		return 0;	/* already enabled */</div><div class='ctx'> </div><div class='del'>-	get_msr(cpu, MSR_PM_ENABLE, &amp;msr);</div><div class='del'>-	put_msr(cpu, MSR_PM_ENABLE, 1);</div><div class='add'>+	new_msr = old_msr | 1;</div><div class='add'>+	put_msr(cpu, MSR_PM_ENABLE, new_msr);</div><div class='ctx'> </div><div class='ctx'> 	if (verbose)</div><div class='del'>-		printf("cpu%d: MSR_PM_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1);</div><div class='add'>+		printf("cpu%d: MSR_PM_ENABLE old: %llX new: %llX\n", cpu, old_msr, new_msr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int update_cpu_msrs(int cpu)</div><div class='add'>+int update_cpu_epb_sysfs(int cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long msr;</div><div class='ctx'> 	int epb;</div><div class='ctx'> </div><div class='del'>-	if (update_epb) {</div><div class='del'>-		epb = get_epb(cpu);</div><div class='del'>-		set_epb(cpu, new_epb);</div><div class='add'>+	epb = get_epb_sysfs(cpu);</div><div class='add'>+	set_epb_sysfs(cpu, new_epb);</div><div class='ctx'> </div><div class='del'>-		if (verbose)</div><div class='del'>-			printf("cpu%d: ENERGY_PERF_BIAS old: %d new: %d\n",</div><div class='del'>-				cpu, epb, (unsigned int) new_epb);</div><div class='del'>-	}</div><div class='add'>+	if (verbose)</div><div class='add'>+		printf("cpu%d: ENERGY_PERF_BIAS old: %d new: %d\n",</div><div class='add'>+			cpu, epb, (unsigned int) new_epb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int update_cpu_msrs(int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long long msr;</div><div class='ctx'> </div><div class='ctx'> 	if (update_turbo) {</div><div class='ctx'> 		int turbo_is_present_and_disabled;</div><div class='hunk'>@@ -1224,7 +1248,7 @@ int update_cpu_msrs(int cpu)</div><div class='ctx'> 	if (!hwp_update_enabled())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	update_hwp_request(cpu);</div><div class='add'>+	update_hwp_request_msr(cpu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1312,6 +1336,17 @@ void for_all_cpus_in_set(size_t set_size, cpu_set_t *cpu_set, int (func)(int))</div><div class='ctx'> 		if (CPU_ISSET_S(cpu_num, set_size, cpu_set))</div><div class='ctx'> 			func(cpu_num);</div><div class='ctx'> }</div><div class='add'>+int for_all_cpus_in_set_and(size_t set_size, cpu_set_t *cpu_set, int (func)(int))</div><div class='add'>+{</div><div class='add'>+	int cpu_num;</div><div class='add'>+	int retval = 1;</div><div class='add'>+</div><div class='add'>+	for (cpu_num = 0; cpu_num &lt;= max_cpu_num; ++cpu_num)</div><div class='add'>+		if (CPU_ISSET_S(cpu_num, set_size, cpu_set))</div><div class='add'>+			retval &amp;= func(cpu_num);</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void init_data_structures(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1326,21 +1361,38 @@ void init_data_structures(void)</div><div class='ctx'> 	for_all_proc_cpus(mark_cpu_present);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* clear has_hwp if it is not enable (or being enabled) */</div><div class='add'>+int is_hwp_enabled_on_cpu(int cpu_num)</div><div class='add'>+{</div><div class='add'>+	unsigned long long msr;</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */</div><div class='add'>+	get_msr(cpu_num, MSR_PM_ENABLE, &amp;msr);</div><div class='add'>+	retval = (msr &amp; 1);</div><div class='add'>+</div><div class='add'>+	if (verbose)</div><div class='add'>+		fprintf(stderr, "cpu%d: %sHWP\n", cpu_num, retval ? "" : "No-");</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * verify_hwp_is_enabled()</div><div class='add'>+ *</div><div class='add'>+ * Set (has_hwp=0) if no HWP feature or any of selected CPU set does not have HWP enabled</div><div class='add'>+ */</div><div class='ctx'> void verify_hwp_is_enabled(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long msr;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='ctx'> 	if (!has_hwp)	/* set in early_cpuid() */</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */</div><div class='del'>-	get_msr(base_cpu, MSR_PM_ENABLE, &amp;msr);</div><div class='del'>-	if ((msr &amp; 1) == 0) {</div><div class='add'>+	retval = for_all_cpus_in_set_and(cpu_setsize, cpu_selected_set, is_hwp_enabled_on_cpu);</div><div class='add'>+</div><div class='add'>+	if (retval == 0) {</div><div class='ctx'> 		fprintf(stderr, "HWP can be enabled using '--hwp-enable'\n");</div><div class='ctx'> 		has_hwp = 0;</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1379,16 +1431,32 @@ void set_base_cpu(void)</div><div class='ctx'> 		err(-ENODEV, "No valid cpus found");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void probe_android_msr_path(void)</div><div class='add'>+{</div><div class='add'>+	struct stat sb;</div><div class='add'>+	char test_path[32];</div><div class='add'>+</div><div class='add'>+	sprintf(test_path, "/dev/msr%d", base_cpu);</div><div class='add'>+	if (stat(test_path, &amp;sb) == 0)</div><div class='add'>+		use_android_msr_path = 1;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void probe_dev_msr(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct stat sb;</div><div class='ctx'> 	char pathname[32];</div><div class='ctx'> </div><div class='del'>-	sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);</div><div class='del'>-	if (stat(pathname, &amp;sb))</div><div class='del'>-		if (system("/sbin/modprobe msr &gt; /dev/null 2&gt;&amp;1"))</div><div class='del'>-			err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");</div><div class='add'>+	probe_android_msr_path();</div><div class='add'>+</div><div class='add'>+	sprintf(pathname, use_android_msr_path ? "/dev/msr%d" : "/dev/cpu/%d/msr", base_cpu);</div><div class='add'>+	if (stat(pathname, &amp;sb)) {</div><div class='add'>+		if (system("/sbin/modprobe msr &gt; /dev/null 2&gt;&amp;1")) {</div><div class='add'>+			if (use_android_msr_path)</div><div class='add'>+				err(-5, "no /dev/msr0, Try \"# modprobe msr\" ");</div><div class='add'>+			else</div><div class='add'>+				err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void get_cpuid_or_exit(unsigned int leaf,</div><div class='hunk'>@@ -1505,6 +1573,7 @@ void parse_cpuid(void)</div><div class='ctx'> int main(int argc, char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	set_base_cpu();</div><div class='add'>+</div><div class='ctx'> 	probe_dev_msr();</div><div class='ctx'> 	init_data_structures();</div><div class='ctx'> </div><div class='hunk'>@@ -1551,10 +1620,13 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	/* update CPU set */</div><div class='ctx'> 	if (cpu_selected_set) {</div><div class='add'>+		if (update_epb)</div><div class='add'>+			for_all_cpus_in_set(cpu_setsize, cpu_selected_set, update_cpu_epb_sysfs);</div><div class='ctx'> 		for_all_cpus_in_set(cpu_setsize, cpu_selected_set, update_sysfs);</div><div class='ctx'> 		for_all_cpus_in_set(cpu_setsize, cpu_selected_set, update_cpu_msrs);</div><div class='add'>+</div><div class='ctx'> 	} else if (pkg_selected_set)</div><div class='del'>-		for_packages(pkg_selected_set, update_hwp_request_pkg);</div><div class='add'>+		for_packages(pkg_selected_set, update_hwp_request_pkg_msr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/sched_ext/Makefile b/tools/sched_ext/Makefile<br/>index d68780e2e03d..e4bda2474060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/Makefile</a></div><div class='hunk'>@@ -133,6 +133,7 @@ $(MAKE_DIRS):</div><div class='ctx'> 	$(call msg,MKDIR,,$@)</div><div class='ctx'> 	$(Q)mkdir -p $@</div><div class='ctx'> </div><div class='add'>+ifneq ($(CROSS_COMPILE),)</div><div class='ctx'> $(BPFOBJ): $(wildcard $(BPFDIR)/*.[ch] $(BPFDIR)/Makefile)			\</div><div class='ctx'> 	   $(APIDIR)/linux/bpf.h						\</div><div class='ctx'> 	   | $(OBJ_DIR)/libbpf</div><div class='hunk'>@@ -141,6 +142,7 @@ $(BPFOBJ): $(wildcard $(BPFDIR)/*.[ch] $(BPFDIR)/Makefile)			\</div><div class='ctx'> 		    EXTRA_CFLAGS='-g -O0 -fPIC'					\</div><div class='ctx'> 		    LDFLAGS="$(LDFLAGS)"					\</div><div class='ctx'> 		    DESTDIR=$(OUTPUT_DIR) prefix= all install_headers</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> $(HOST_BPFOBJ): $(wildcard $(BPFDIR)/*.[ch] $(BPFDIR)/Makefile)		\</div><div class='ctx'> 	   $(APIDIR)/linux/bpf.h						\</div><div class='hunk'>@@ -187,7 +189,7 @@ $(INCLUDE_DIR)/%.bpf.skel.h: $(SCXOBJ_DIR)/%.bpf.o $(INCLUDE_DIR)/vmlinux.h $(BP</div><div class='ctx'> </div><div class='ctx'> SCX_COMMON_DEPS := include/scx/common.h include/scx/user_exit_info.h | $(BINDIR)</div><div class='ctx'> </div><div class='del'>-c-sched-targets = scx_simple scx_qmap scx_central scx_flatcg</div><div class='add'>+c-sched-targets = scx_simple scx_cpu0 scx_qmap scx_central scx_flatcg</div><div class='ctx'> </div><div class='ctx'> $(addprefix $(BINDIR)/,$(c-sched-targets)): \</div><div class='ctx'> 	$(BINDIR)/%: \</div><div class='head'>diff --git a/tools/sched_ext/include/scx/bpf_arena_common.bpf.h b/tools/sched_ext/include/scx/bpf_arena_common.bpf.h<br/>new file mode 100644<br/>index 000000000000..4366fb3c91ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/bpf_arena_common.bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/bpf_arena_common.bpf.h</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/* Copyright (c) 2024 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+#pragma once</div><div class='add'>+</div><div class='add'>+#ifndef PAGE_SIZE</div><div class='add'>+#define PAGE_SIZE __PAGE_SIZE</div><div class='add'>+/*</div><div class='add'>+ * for older kernels try sizeof(struct genradix_node)</div><div class='add'>+ * or flexible:</div><div class='add'>+ * static inline long __bpf_page_size(void) {</div><div class='add'>+ *   return bpf_core_enum_value(enum page_size_enum___l, __PAGE_SIZE___l) ?: sizeof(struct genradix_node);</div><div class='add'>+ * }</div><div class='add'>+ * but generated code is not great.</div><div class='add'>+ */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(__BPF_FEATURE_ADDR_SPACE_CAST) &amp;&amp; !defined(BPF_ARENA_FORCE_ASM)</div><div class='add'>+#define __arena __attribute__((address_space(1)))</div><div class='add'>+#define __arena_global __attribute__((address_space(1)))</div><div class='add'>+#define cast_kern(ptr) /* nop for bpf prog. emitted by LLVM */</div><div class='add'>+#define cast_user(ptr) /* nop for bpf prog. emitted by LLVM */</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+/* emit instruction:</div><div class='add'>+ * rX = rX .off = BPF_ADDR_SPACE_CAST .imm32 = (dst_as &lt;&lt; 16) | src_as</div><div class='add'>+ *</div><div class='add'>+ * This is a workaround for LLVM compiler versions without</div><div class='add'>+ * __BPF_FEATURE_ADDR_SPACE_CAST that do not automatically cast between arena</div><div class='add'>+ * pointers and native kernel/userspace ones. In this case we explicitly do so</div><div class='add'>+ * with cast_kern() and cast_user(). E.g., in the Linux kernel tree,</div><div class='add'>+ * tools/testing/selftests/bpf includes tests that use these macros to implement</div><div class='add'>+ * linked lists and hashtables backed by arena memory. In sched_ext, we use</div><div class='add'>+ * cast_kern() and cast_user() for compatibility with older LLVM toolchains.</div><div class='add'>+ */</div><div class='add'>+#ifndef bpf_addr_space_cast</div><div class='add'>+#define bpf_addr_space_cast(var, dst_as, src_as)\</div><div class='add'>+	asm volatile(".byte 0xBF;		\</div><div class='add'>+		     .ifc %[reg], r0;		\</div><div class='add'>+		     .byte 0x00;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r1;		\</div><div class='add'>+		     .byte 0x11;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r2;		\</div><div class='add'>+		     .byte 0x22;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r3;		\</div><div class='add'>+		     .byte 0x33;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r4;		\</div><div class='add'>+		     .byte 0x44;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r5;		\</div><div class='add'>+		     .byte 0x55;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r6;		\</div><div class='add'>+		     .byte 0x66;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r7;		\</div><div class='add'>+		     .byte 0x77;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r8;		\</div><div class='add'>+		     .byte 0x88;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .ifc %[reg], r9;		\</div><div class='add'>+		     .byte 0x99;		\</div><div class='add'>+		     .endif;			\</div><div class='add'>+		     .short %[off];		\</div><div class='add'>+		     .long %[as]"		\</div><div class='add'>+		     : [reg]"+r"(var)		\</div><div class='add'>+		     : [off]"i"(BPF_ADDR_SPACE_CAST) \</div><div class='add'>+		     , [as]"i"((dst_as &lt;&lt; 16) | src_as));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define __arena</div><div class='add'>+#define __arena_global SEC(".addr_space.1")</div><div class='add'>+#define cast_kern(ptr) bpf_addr_space_cast(ptr, 0, 1)</div><div class='add'>+#define cast_user(ptr) bpf_addr_space_cast(ptr, 1, 0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void __arena* bpf_arena_alloc_pages(void *map, void __arena *addr, __u32 page_cnt,</div><div class='add'>+				    int node_id, __u64 flags) __ksym __weak;</div><div class='add'>+void bpf_arena_free_pages(void *map, void __arena *ptr, __u32 page_cnt) __ksym __weak;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Note that cond_break can only be portably used in the body of a breakable</div><div class='add'>+ * construct, whereas can_loop can be used anywhere.</div><div class='add'>+ */</div><div class='add'>+#ifdef TEST</div><div class='add'>+#define can_loop true</div><div class='add'>+#define __cond_break(expr) expr</div><div class='add'>+#else</div><div class='add'>+#ifdef __BPF_FEATURE_MAY_GOTO</div><div class='add'>+#define can_loop					\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	bool ret = true;				\</div><div class='add'>+	asm volatile goto("may_goto %l[l_break]"	\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: ret = false;				\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	ret;						\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define __cond_break(expr)				\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	asm volatile goto("may_goto %l[l_break]"	\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: expr;					\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	})</div><div class='add'>+#else</div><div class='add'>+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__</div><div class='add'>+#define can_loop					\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	bool ret = true;				\</div><div class='add'>+	asm volatile goto("1:.byte 0xe5;		\</div><div class='add'>+		      .byte 0;				\</div><div class='add'>+		      .long ((%l[l_break] - 1b - 8) / 8) &amp; 0xffff;	\</div><div class='add'>+		      .short 0"				\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: ret = false;				\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	ret;						\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define __cond_break(expr)				\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	asm volatile goto("1:.byte 0xe5;		\</div><div class='add'>+		      .byte 0;				\</div><div class='add'>+		      .long ((%l[l_break] - 1b - 8) / 8) &amp; 0xffff;	\</div><div class='add'>+		      .short 0"				\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: expr;					\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	})</div><div class='add'>+#else</div><div class='add'>+#define can_loop					\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	bool ret = true;				\</div><div class='add'>+	asm volatile goto("1:.byte 0xe5;		\</div><div class='add'>+		      .byte 0;				\</div><div class='add'>+		      .long (((%l[l_break] - 1b - 8) / 8) &amp; 0xffff) &lt;&lt; 16;	\</div><div class='add'>+		      .short 0"				\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: ret = false;				\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	ret;						\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define __cond_break(expr)				\</div><div class='add'>+	({ __label__ l_break, l_continue;		\</div><div class='add'>+	asm volatile goto("1:.byte 0xe5;		\</div><div class='add'>+		      .byte 0;				\</div><div class='add'>+		      .long (((%l[l_break] - 1b - 8) / 8) &amp; 0xffff) &lt;&lt; 16;	\</div><div class='add'>+		      .short 0"				\</div><div class='add'>+		      :::: l_break);			\</div><div class='add'>+	goto l_continue;				\</div><div class='add'>+	l_break: expr;					\</div><div class='add'>+	l_continue:;					\</div><div class='add'>+	})</div><div class='add'>+#endif /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */</div><div class='add'>+#endif /* __BPF_FEATURE_MAY_GOTO */</div><div class='add'>+#endif /* TEST */</div><div class='add'>+</div><div class='add'>+#define cond_break __cond_break(break)</div><div class='add'>+#define cond_break_label(label) __cond_break(goto label)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void bpf_preempt_disable(void) __weak __ksym;</div><div class='add'>+void bpf_preempt_enable(void) __weak __ksym;</div><div class='head'>diff --git a/tools/sched_ext/include/scx/bpf_arena_common.h b/tools/sched_ext/include/scx/bpf_arena_common.h<br/>new file mode 100644<br/>index 000000000000..10141db0b59d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/bpf_arena_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/bpf_arena_common.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/* Copyright (c) 2024 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+#pragma once</div><div class='add'>+</div><div class='add'>+#ifndef arena_container_of</div><div class='add'>+#define arena_container_of(ptr, type, member)			\</div><div class='add'>+	({							\</div><div class='add'>+		void __arena *__mptr = (void __arena *)(ptr);	\</div><div class='add'>+		((type *)(__mptr - offsetof(type, member)));	\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Provide the definition of PAGE_SIZE. */</div><div class='add'>+#include &lt;sys/user.h&gt;</div><div class='add'>+</div><div class='add'>+#define __arena</div><div class='add'>+#define __arg_arena</div><div class='add'>+#define cast_kern(ptr) /* nop for user space */</div><div class='add'>+#define cast_user(ptr) /* nop for user space */</div><div class='add'>+char __attribute__((weak)) arena[1];</div><div class='add'>+</div><div class='add'>+#ifndef offsetof</div><div class='add'>+#define offsetof(type, member)  ((unsigned long)&amp;((type *)0)-&gt;member)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline void __arena* bpf_arena_alloc_pages(void *map, void *addr, __u32 page_cnt,</div><div class='add'>+						  int node_id, __u64 flags)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+static inline void bpf_arena_free_pages(void *map, void __arena *ptr, __u32 page_cnt)</div><div class='add'>+{</div><div class='add'>+}</div><div class='head'>diff --git a/tools/sched_ext/include/scx/common.bpf.h b/tools/sched_ext/include/scx/common.bpf.h<br/>index d4e21558e982..821d5791bd42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/common.bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/common.bpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/common.bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/common.bpf.h</a></div><div class='hunk'>@@ -24,14 +24,26 @@</div><div class='ctx'> #include &lt;bpf/bpf_helpers.h&gt;</div><div class='ctx'> #include &lt;bpf/bpf_tracing.h&gt;</div><div class='ctx'> #include &lt;asm-generic/errno.h&gt;</div><div class='del'>-#include "user_exit_info.h"</div><div class='add'>+#include "user_exit_info.bpf.h"</div><div class='ctx'> #include "enum_defs.autogen.h"</div><div class='ctx'> </div><div class='add'>+#define PF_IDLE				0x00000002	/* I am an IDLE thread */</div><div class='add'>+#define PF_IO_WORKER			0x00000010	/* Task is an IO worker */</div><div class='ctx'> #define PF_WQ_WORKER			0x00000020	/* I'm a workqueue worker */</div><div class='add'>+#define PF_KCOMPACTD			0x00010000      /* I am kcompactd */</div><div class='add'>+#define PF_KSWAPD			0x00020000      /* I am kswapd */</div><div class='ctx'> #define PF_KTHREAD			0x00200000	/* I am a kernel thread */</div><div class='ctx'> #define PF_EXITING			0x00000004</div><div class='ctx'> #define CLOCK_MONOTONIC			1</div><div class='ctx'> </div><div class='add'>+#ifndef NR_CPUS</div><div class='add'>+#define NR_CPUS 1024</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef NUMA_NO_NODE</div><div class='add'>+#define	NUMA_NO_NODE	(-1)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern int LINUX_KERNEL_VERSION __kconfig;</div><div class='ctx'> extern const char CONFIG_CC_VERSION_TEXT[64] __kconfig __weak;</div><div class='ctx'> extern const char CONFIG_LOCALVERSION[64] __kconfig __weak;</div><div class='hunk'>@@ -48,21 +60,15 @@ static inline void ___vmlinux_h_sanity_check___(void)</div><div class='ctx'> </div><div class='ctx'> s32 scx_bpf_create_dsq(u64 dsq_id, s32 node) __ksym;</div><div class='ctx'> s32 scx_bpf_select_cpu_dfl(struct task_struct *p, s32 prev_cpu, u64 wake_flags, bool *is_idle) __ksym;</div><div class='del'>-s32 scx_bpf_select_cpu_and(struct task_struct *p, s32 prev_cpu, u64 wake_flags,</div><div class='del'>-			   const struct cpumask *cpus_allowed, u64 flags) __ksym __weak;</div><div class='del'>-void scx_bpf_dsq_insert(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;</div><div class='del'>-void scx_bpf_dsq_insert_vtime(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;</div><div class='add'>+s32 __scx_bpf_select_cpu_and(struct task_struct *p, const struct cpumask *cpus_allowed,</div><div class='add'>+			     struct scx_bpf_select_cpu_and_args *args) __ksym __weak;</div><div class='add'>+bool __scx_bpf_dsq_insert_vtime(struct task_struct *p, struct scx_bpf_dsq_insert_vtime_args *args) __ksym __weak;</div><div class='ctx'> u32 scx_bpf_dispatch_nr_slots(void) __ksym;</div><div class='ctx'> void scx_bpf_dispatch_cancel(void) __ksym;</div><div class='del'>-bool scx_bpf_dsq_move_to_local(u64 dsq_id) __ksym __weak;</div><div class='del'>-void scx_bpf_dsq_move_set_slice(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;</div><div class='del'>-void scx_bpf_dsq_move_set_vtime(struct bpf_iter_scx_dsq *it__iter, u64 vtime) __ksym __weak;</div><div class='del'>-bool scx_bpf_dsq_move(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='del'>-bool scx_bpf_dsq_move_vtime(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='del'>-u32 scx_bpf_reenqueue_local(void) __ksym;</div><div class='ctx'> void scx_bpf_kick_cpu(s32 cpu, u64 flags) __ksym;</div><div class='ctx'> s32 scx_bpf_dsq_nr_queued(u64 dsq_id) __ksym;</div><div class='ctx'> void scx_bpf_destroy_dsq(u64 dsq_id) __ksym;</div><div class='add'>+struct task_struct *scx_bpf_dsq_peek(u64 dsq_id) __ksym __weak;</div><div class='ctx'> int bpf_iter_scx_dsq_new(struct bpf_iter_scx_dsq *it, u64 dsq_id, u64 flags) __ksym __weak;</div><div class='ctx'> struct task_struct *bpf_iter_scx_dsq_next(struct bpf_iter_scx_dsq *it) __ksym __weak;</div><div class='ctx'> void bpf_iter_scx_dsq_destroy(struct bpf_iter_scx_dsq *it) __ksym __weak;</div><div class='hunk'>@@ -91,7 +97,8 @@ s32 scx_bpf_pick_any_cpu(const cpumask_t *cpus_allowed, u64 flags) __ksym;</div><div class='ctx'> bool scx_bpf_task_running(const struct task_struct *p) __ksym;</div><div class='ctx'> s32 scx_bpf_task_cpu(const struct task_struct *p) __ksym;</div><div class='ctx'> struct rq *scx_bpf_cpu_rq(s32 cpu) __ksym;</div><div class='del'>-struct cgroup *scx_bpf_task_cgroup(struct task_struct *p) __ksym __weak;</div><div class='add'>+struct rq *scx_bpf_locked_rq(void) __ksym;</div><div class='add'>+struct task_struct *scx_bpf_cpu_curr(s32 cpu) __ksym __weak;</div><div class='ctx'> u64 scx_bpf_now(void) __ksym __weak;</div><div class='ctx'> void scx_bpf_events(struct scx_event_stats *events, size_t events__sz) __ksym __weak;</div><div class='ctx'> </div><div class='hunk'>@@ -107,6 +114,9 @@ void scx_bpf_events(struct scx_event_stats *events, size_t events__sz) __ksym __</div><div class='ctx'> static inline __attribute__((format(printf, 1, 2)))</div><div class='ctx'> void ___scx_bpf_bstr_format_checker(const char *fmt, ...) {}</div><div class='ctx'> </div><div class='add'>+#define SCX_STRINGIFY(x) #x</div><div class='add'>+#define SCX_TOSTRING(x) SCX_STRINGIFY(x)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Helper macro for initializing the fmt and variadic argument inputs to both</div><div class='ctx'>  * bstr exit kfuncs. Callers to this function should use ___fmt and ___param to</div><div class='hunk'>@@ -141,13 +151,15 @@ void ___scx_bpf_bstr_format_checker(const char *fmt, ...) {}</div><div class='ctx'>  * scx_bpf_error() wraps the scx_bpf_error_bstr() kfunc with variadic arguments</div><div class='ctx'>  * instead of an array of u64. Invoking this macro will cause the scheduler to</div><div class='ctx'>  * exit in an erroneous state, with diagnostic information being passed to the</div><div class='del'>- * user.</div><div class='add'>+ * user. It appends the file and line number to aid debugging.</div><div class='ctx'>  */</div><div class='ctx'> #define scx_bpf_error(fmt, args...)						\</div><div class='ctx'> ({										\</div><div class='del'>-	scx_bpf_bstr_preamble(fmt, args)					\</div><div class='add'>+	scx_bpf_bstr_preamble(							\</div><div class='add'>+		__FILE__ ":" SCX_TOSTRING(__LINE__) ": " fmt, ##args)		\</div><div class='ctx'> 	scx_bpf_error_bstr(___fmt, ___param, sizeof(___param));			\</div><div class='del'>-	___scx_bpf_bstr_format_checker(fmt, ##args);				\</div><div class='add'>+	___scx_bpf_bstr_format_checker(						\</div><div class='add'>+		__FILE__ ":" SCX_TOSTRING(__LINE__) ": " fmt, ##args);		\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -229,6 +241,7 @@ BPF_PROG(name, ##args)</div><div class='ctx'>  * be a pointer to the area. Use `MEMBER_VPTR(*ptr, .member)` instead of</div><div class='ctx'>  * `MEMBER_VPTR(ptr, -&gt;member)`.</div><div class='ctx'>  */</div><div class='add'>+#ifndef MEMBER_VPTR</div><div class='ctx'> #define MEMBER_VPTR(base, member) (typeof((base) member) *)			\</div><div class='ctx'> ({										\</div><div class='ctx'> 	u64 __base = (u64)&amp;(base);						\</div><div class='hunk'>@@ -245,6 +258,7 @@ BPF_PROG(name, ##args)</div><div class='ctx'> 		  [max]"i"(sizeof(base) - sizeof((base) member)));		\</div><div class='ctx'> 	__addr;									\</div><div class='ctx'> })</div><div class='add'>+#endif /* MEMBER_VPTR */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ARRAY_ELEM_PTR - Obtain the verified pointer to an array element</div><div class='hunk'>@@ -260,6 +274,7 @@ BPF_PROG(name, ##args)</div><div class='ctx'>  * size of the array to compute the max, which will result in rejection by</div><div class='ctx'>  * the verifier.</div><div class='ctx'>  */</div><div class='add'>+#ifndef ARRAY_ELEM_PTR</div><div class='ctx'> #define ARRAY_ELEM_PTR(arr, i, n) (typeof(arr[i]) *)				\</div><div class='ctx'> ({										\</div><div class='ctx'> 	u64 __base = (u64)arr;							\</div><div class='hunk'>@@ -274,7 +289,7 @@ BPF_PROG(name, ##args)</div><div class='ctx'> 		  [max]"r"(sizeof(arr[0]) * ((n) - 1)));			\</div><div class='ctx'> 	__addr;									\</div><div class='ctx'> })</div><div class='del'>-</div><div class='add'>+#endif /* ARRAY_ELEM_PTR */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * BPF declarations and helpers</div><div class='hunk'>@@ -438,8 +453,27 @@ static __always_inline const struct cpumask *cast_mask(struct bpf_cpumask *mask)</div><div class='ctx'>  */</div><div class='ctx'> static inline bool is_migration_disabled(const struct task_struct *p)</div><div class='ctx'> {</div><div class='del'>-	if (bpf_core_field_exists(p-&gt;migration_disabled))</div><div class='del'>-		return p-&gt;migration_disabled;</div><div class='add'>+	/*</div><div class='add'>+	 * Testing p-&gt;migration_disabled in a BPF code is tricky because the</div><div class='add'>+	 * migration is _always_ disabled while running the BPF code.</div><div class='add'>+	 * The prolog (__bpf_prog_enter) and epilog (__bpf_prog_exit) for BPF</div><div class='add'>+	 * code execution disable and re-enable the migration of the current</div><div class='add'>+	 * task, respectively. So, the _current_ task of the sched_ext ops is</div><div class='add'>+	 * always migration-disabled. Moreover, p-&gt;migration_disabled could be</div><div class='add'>+	 * two or greater when a sched_ext ops BPF code (e.g., ops.tick) is</div><div class='add'>+	 * executed in the middle of the other BPF code execution.</div><div class='add'>+	 *</div><div class='add'>+	 * Therefore, we should decide that the _current_ task is</div><div class='add'>+	 * migration-disabled only when its migration_disabled count is greater</div><div class='add'>+	 * than one. In other words, when  p-&gt;migration_disabled == 1, there is</div><div class='add'>+	 * an ambiguity, so we should check if @p is the current task or not.</div><div class='add'>+	 */</div><div class='add'>+	if (bpf_core_field_exists(p-&gt;migration_disabled)) {</div><div class='add'>+		if (p-&gt;migration_disabled == 1)</div><div class='add'>+			return bpf_get_current_task_btf() != p;</div><div class='add'>+		else</div><div class='add'>+			return p-&gt;migration_disabled;</div><div class='add'>+	}</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -476,7 +510,7 @@ static inline s64 time_delta(u64 after, u64 before)</div><div class='ctx'>  */</div><div class='ctx'> static inline bool time_after(u64 a, u64 b)</div><div class='ctx'> {</div><div class='del'>-	 return (s64)(b - a) &lt; 0;</div><div class='add'>+	return (s64)(b - a) &lt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -500,7 +534,7 @@ static inline bool time_before(u64 a, u64 b)</div><div class='ctx'>  */</div><div class='ctx'> static inline bool time_after_eq(u64 a, u64 b)</div><div class='ctx'> {</div><div class='del'>-	 return (s64)(a - b) &gt;= 0;</div><div class='add'>+	return (s64)(a - b) &gt;= 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -547,9 +581,15 @@ static inline bool time_in_range_open(u64 a, u64 b, u64 c)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* useful compiler attributes */</div><div class='add'>+#ifndef likely</div><div class='ctx'> #define likely(x) __builtin_expect(!!(x), 1)</div><div class='add'>+#endif</div><div class='add'>+#ifndef unlikely</div><div class='ctx'> #define unlikely(x) __builtin_expect(!!(x), 0)</div><div class='add'>+#endif</div><div class='add'>+#ifndef __maybe_unused</div><div class='ctx'> #define __maybe_unused __attribute__((__unused__))</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * READ/WRITE_ONCE() are from kernel (include/asm-generic/rwonce.h). They</div><div class='hunk'>@@ -633,6 +673,26 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * __calc_avg - Calculate exponential weighted moving average (EWMA) with</div><div class='add'>+ * @old and @new values. @decay represents how large the @old value remains.</div><div class='add'>+ * With a larger @decay value, the moving average changes slowly, exhibiting</div><div class='add'>+ * fewer fluctuations.</div><div class='add'>+ */</div><div class='add'>+#define __calc_avg(old, new, decay) ({						\</div><div class='add'>+	typeof(decay) thr = 1 &lt;&lt; (decay);					\</div><div class='add'>+	typeof(old) ret;							\</div><div class='add'>+	if (((old) &lt; thr) || ((new) &lt; thr)) {					\</div><div class='add'>+		if (((old) == 1) &amp;&amp; ((new) == 0))				\</div><div class='add'>+			ret = 0;						\</div><div class='add'>+		else								\</div><div class='add'>+			ret = ((old) - ((old) &gt;&gt; 1)) + ((new) &gt;&gt; 1);		\</div><div class='add'>+	} else {								\</div><div class='add'>+		ret = ((old) - ((old) &gt;&gt; (decay))) + ((new) &gt;&gt; (decay));	\</div><div class='add'>+	}									\</div><div class='add'>+	ret;									\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * log2_u32 - Compute the base 2 logarithm of a 32-bit exponential value.</div><div class='ctx'>  * @v: The value for which we're computing the base 2 logarithm.</div><div class='ctx'>  */</div><div class='hunk'>@@ -663,6 +723,25 @@ static inline u32 log2_u64(u64 v)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * sqrt_u64 - Calculate the square root of value @x using Newton's method.</div><div class='add'>+ */</div><div class='add'>+static inline u64 __sqrt_u64(u64 x)</div><div class='add'>+{</div><div class='add'>+	if (x == 0 || x == 1)</div><div class='add'>+		return x;</div><div class='add'>+</div><div class='add'>+	u64 r = ((1ULL &lt;&lt; 32) &gt; x) ? x : (1ULL &lt;&lt; 32);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; 8; ++i) {</div><div class='add'>+		u64 q = x / r;</div><div class='add'>+		if (r &lt;= q)</div><div class='add'>+			break;</div><div class='add'>+		r = (r + q) &gt;&gt; 1;</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Return a value proportionally scaled to the task's weight.</div><div class='ctx'>  */</div><div class='ctx'> static inline u64 scale_by_task_weight(const struct task_struct *p, u64 value)</div><div class='head'>diff --git a/tools/sched_ext/include/scx/common.h b/tools/sched_ext/include/scx/common.h<br/>index 1dc76bd84296..b3c6372bcf81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/common.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/common.h</a></div><div class='hunk'>@@ -75,8 +75,9 @@ typedef int64_t s64;</div><div class='ctx'> #include "enums.h"</div><div class='ctx'> </div><div class='ctx'> /* not available when building kernel tools/sched_ext */</div><div class='del'>-#if __has_include(&lt;lib/sdt_task.h&gt;)</div><div class='del'>-#include &lt;lib/sdt_task.h&gt;</div><div class='add'>+#if __has_include(&lt;lib/sdt_task_defs.h&gt;)</div><div class='add'>+#include "bpf_arena_common.h"</div><div class='add'>+#include &lt;lib/sdt_task_defs.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif	/* __SCHED_EXT_COMMON_H */</div><div class='head'>diff --git a/tools/sched_ext/include/scx/compat.bpf.h b/tools/sched_ext/include/scx/compat.bpf.h<br/>index 9252e1a00556..f2969c3061a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/compat.bpf.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/compat.bpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/compat.bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/compat.bpf.h</a></div><div class='hunk'>@@ -16,114 +16,92 @@</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /* v6.12: 819513666966 ("sched_ext: Add cgroup support") */</div><div class='del'>-#define __COMPAT_scx_bpf_task_cgroup(p)						\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_task_cgroup) ?					\</div><div class='del'>-	 scx_bpf_task_cgroup((p)) : NULL)</div><div class='add'>+struct cgroup *scx_bpf_task_cgroup___new(struct task_struct *p) __ksym __weak;</div><div class='add'>+</div><div class='add'>+#define scx_bpf_task_cgroup(p)							\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_task_cgroup___new) ?				\</div><div class='add'>+	 scx_bpf_task_cgroup___new((p)) : NULL)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * v6.13: The verb `dispatch` was too overloaded and confusing. kfuncs are</div><div class='ctx'>  * renamed to unload the verb.</div><div class='ctx'>  *</div><div class='del'>- * Build error is triggered if old names are used. New binaries work with both</div><div class='del'>- * new and old names. The compat macros will be removed on v6.15 release.</div><div class='del'>- *</div><div class='ctx'>  * scx_bpf_dispatch_from_dsq() and friends were added during v6.12 by</div><div class='ctx'>  * 4c30f5ce4f7a ("sched_ext: Implement scx_bpf_dispatch[_vtime]_from_dsq()").</div><div class='del'>- * Preserve __COMPAT macros until v6.15.</div><div class='ctx'>  */</div><div class='del'>-void scx_bpf_dispatch___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;</div><div class='del'>-void scx_bpf_dispatch_vtime___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;</div><div class='del'>-bool scx_bpf_consume___compat(u64 dsq_id) __ksym __weak;</div><div class='del'>-void scx_bpf_dispatch_from_dsq_set_slice___compat(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;</div><div class='del'>-void scx_bpf_dispatch_from_dsq_set_vtime___compat(struct bpf_iter_scx_dsq *it__iter, u64 vtime) __ksym __weak;</div><div class='del'>-bool scx_bpf_dispatch_from_dsq___compat(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='del'>-bool scx_bpf_dispatch_vtime_from_dsq___compat(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dsq_insert(p, dsq_id, slice, enq_flags)				\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_insert) ?					\</div><div class='del'>-	 scx_bpf_dsq_insert((p), (dsq_id), (slice), (enq_flags)) :		\</div><div class='del'>-	 scx_bpf_dispatch___compat((p), (dsq_id), (slice), (enq_flags)))</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dsq_insert_vtime(p, dsq_id, slice, vtime, enq_flags)		\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_insert_vtime) ?				\</div><div class='del'>-	 scx_bpf_dsq_insert_vtime((p), (dsq_id), (slice), (vtime), (enq_flags)) : \</div><div class='del'>-	 scx_bpf_dispatch_vtime___compat((p), (dsq_id), (slice), (vtime), (enq_flags)))</div><div class='add'>+bool scx_bpf_dsq_move_to_local___new(u64 dsq_id) __ksym __weak;</div><div class='add'>+void scx_bpf_dsq_move_set_slice___new(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;</div><div class='add'>+void scx_bpf_dsq_move_set_vtime___new(struct bpf_iter_scx_dsq *it__iter, u64 vtime) __ksym __weak;</div><div class='add'>+bool scx_bpf_dsq_move___new(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='add'>+bool scx_bpf_dsq_move_vtime___new(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='add'>+</div><div class='add'>+bool scx_bpf_consume___old(u64 dsq_id) __ksym __weak;</div><div class='add'>+void scx_bpf_dispatch_from_dsq_set_slice___old(struct bpf_iter_scx_dsq *it__iter, u64 slice) __ksym __weak;</div><div class='add'>+void scx_bpf_dispatch_from_dsq_set_vtime___old(struct bpf_iter_scx_dsq *it__iter, u64 vtime) __ksym __weak;</div><div class='add'>+bool scx_bpf_dispatch_from_dsq___old(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='add'>+bool scx_bpf_dispatch_vtime_from_dsq___old(struct bpf_iter_scx_dsq *it__iter, struct task_struct *p, u64 dsq_id, u64 enq_flags) __ksym __weak;</div><div class='ctx'> </div><div class='ctx'> #define scx_bpf_dsq_move_to_local(dsq_id)					\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_move_to_local) ?				\</div><div class='del'>-	 scx_bpf_dsq_move_to_local((dsq_id)) :					\</div><div class='del'>-	 scx_bpf_consume___compat((dsq_id)))</div><div class='del'>-</div><div class='del'>-#define __COMPAT_scx_bpf_dsq_move_set_slice(it__iter, slice)			\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_move_set_slice) ?				\</div><div class='del'>-	 scx_bpf_dsq_move_set_slice((it__iter), (slice)) :			\</div><div class='del'>-	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq_set_slice___compat) ?	\</div><div class='del'>-	  scx_bpf_dispatch_from_dsq_set_slice___compat((it__iter), (slice)) :	\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_dsq_move_to_local___new) ?			\</div><div class='add'>+	 scx_bpf_dsq_move_to_local___new((dsq_id)) :				\</div><div class='add'>+	 scx_bpf_consume___old((dsq_id)))</div><div class='add'>+</div><div class='add'>+#define scx_bpf_dsq_move_set_slice(it__iter, slice)				\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_dsq_move_set_slice___new) ?			\</div><div class='add'>+	 scx_bpf_dsq_move_set_slice___new((it__iter), (slice)) :		\</div><div class='add'>+	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq_set_slice___old) ?		\</div><div class='add'>+	  scx_bpf_dispatch_from_dsq_set_slice___old((it__iter), (slice)) :	\</div><div class='ctx'> 	  (void)0))</div><div class='ctx'> </div><div class='del'>-#define __COMPAT_scx_bpf_dsq_move_set_vtime(it__iter, vtime)			\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_move_set_vtime) ?				\</div><div class='del'>-	 scx_bpf_dsq_move_set_vtime((it__iter), (vtime)) :			\</div><div class='del'>-	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq_set_vtime___compat) ?	\</div><div class='del'>-	  scx_bpf_dispatch_from_dsq_set_vtime___compat((it__iter), (vtime)) :	\</div><div class='del'>-	  (void) 0))</div><div class='del'>-</div><div class='del'>-#define __COMPAT_scx_bpf_dsq_move(it__iter, p, dsq_id, enq_flags)		\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_move) ?					\</div><div class='del'>-	 scx_bpf_dsq_move((it__iter), (p), (dsq_id), (enq_flags)) :		\</div><div class='del'>-	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq___compat) ?			\</div><div class='del'>-	  scx_bpf_dispatch_from_dsq___compat((it__iter), (p), (dsq_id), (enq_flags)) : \</div><div class='del'>-	  false))</div><div class='add'>+#define scx_bpf_dsq_move_set_vtime(it__iter, vtime)				\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_dsq_move_set_vtime___new) ?			\</div><div class='add'>+	 scx_bpf_dsq_move_set_vtime___new((it__iter), (vtime)) :		\</div><div class='add'>+	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq_set_vtime___old) ?		\</div><div class='add'>+	  scx_bpf_dispatch_from_dsq_set_vtime___old((it__iter), (vtime)) :	\</div><div class='add'>+	  (void)0))</div><div class='ctx'> </div><div class='del'>-#define __COMPAT_scx_bpf_dsq_move_vtime(it__iter, p, dsq_id, enq_flags)		\</div><div class='del'>-	(bpf_ksym_exists(scx_bpf_dsq_move_vtime) ?				\</div><div class='del'>-	 scx_bpf_dsq_move_vtime((it__iter), (p), (dsq_id), (enq_flags)) :	\</div><div class='del'>-	 (bpf_ksym_exists(scx_bpf_dispatch_vtime_from_dsq___compat) ?		\</div><div class='del'>-	  scx_bpf_dispatch_vtime_from_dsq___compat((it__iter), (p), (dsq_id), (enq_flags)) : \</div><div class='add'>+#define scx_bpf_dsq_move(it__iter, p, dsq_id, enq_flags)			\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_dsq_move___new) ?				\</div><div class='add'>+	 scx_bpf_dsq_move___new((it__iter), (p), (dsq_id), (enq_flags)) :	\</div><div class='add'>+	 (bpf_ksym_exists(scx_bpf_dispatch_from_dsq___old) ?			\</div><div class='add'>+	  scx_bpf_dispatch_from_dsq___old((it__iter), (p), (dsq_id), (enq_flags)) : \</div><div class='ctx'> 	  false))</div><div class='ctx'> </div><div class='del'>-#define scx_bpf_dispatch(p, dsq_id, slice, enq_flags)				\</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch() renamed to scx_bpf_dsq_insert()")</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dispatch_vtime(p, dsq_id, slice, vtime, enq_flags)		\</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch_vtime() renamed to scx_bpf_dsq_insert_vtime()")</div><div class='del'>-</div><div class='del'>-#define scx_bpf_consume(dsq_id) ({						\</div><div class='del'>-	_Static_assert(false, "scx_bpf_consume() renamed to scx_bpf_dsq_move_to_local()"); \</div><div class='del'>-	false;									\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dispatch_from_dsq_set_slice(it__iter, slice)		\</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch_from_dsq_set_slice() renamed to scx_bpf_dsq_move_set_slice()")</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dispatch_from_dsq_set_vtime(it__iter, vtime)		\</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch_from_dsq_set_vtime() renamed to scx_bpf_dsq_move_set_vtime()")</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dispatch_from_dsq(it__iter, p, dsq_id, enq_flags) ({	\</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch_from_dsq() renamed to scx_bpf_dsq_move()"); \</div><div class='del'>-	false;									\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define scx_bpf_dispatch_vtime_from_dsq(it__iter, p, dsq_id, enq_flags) ({  \</div><div class='del'>-	_Static_assert(false, "scx_bpf_dispatch_vtime_from_dsq() renamed to scx_bpf_dsq_move_vtime()"); \</div><div class='del'>-	false;									\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define __COMPAT_scx_bpf_dispatch_from_dsq_set_slice(it__iter, slice)		\</div><div class='del'>-	_Static_assert(false, "__COMPAT_scx_bpf_dispatch_from_dsq_set_slice() renamed to __COMPAT_scx_bpf_dsq_move_set_slice()")</div><div class='add'>+#define scx_bpf_dsq_move_vtime(it__iter, p, dsq_id, enq_flags)			\</div><div class='add'>+	(bpf_ksym_exists(scx_bpf_dsq_move_vtime___new) ?			\</div><div class='add'>+	 scx_bpf_dsq_move_vtime___new((it__iter), (p), (dsq_id), (enq_flags)) : \</div><div class='add'>+	 (bpf_ksym_exists(scx_bpf_dispatch_vtime_from_dsq___old) ?		\</div><div class='add'>+	  scx_bpf_dispatch_vtime_from_dsq___old((it__iter), (p), (dsq_id), (enq_flags)) : \</div><div class='add'>+	  false))</div><div class='ctx'> </div><div class='del'>-#define __COMPAT_scx_bpf_dispatch_from_dsq_set_vtime(it__iter, vtime)		\</div><div class='del'>-	_Static_assert(false, "__COMPAT_scx_bpf_dispatch_from_dsq_set_vtime() renamed to __COMPAT_scx_bpf_dsq_move_set_vtime()")</div><div class='add'>+/*</div><div class='add'>+ * v6.15: 950ad93df2fc ("bpf: add kfunc for populating cpumask bits")</div><div class='add'>+ *</div><div class='add'>+ * Compat macro will be dropped on v6.19 release.</div><div class='add'>+ */</div><div class='add'>+int bpf_cpumask_populate(struct cpumask *dst, void *src, size_t src__sz) __ksym __weak;</div><div class='ctx'> </div><div class='del'>-#define __COMPAT_scx_bpf_dispatch_from_dsq(it__iter, p, dsq_id, enq_flags) ({	\</div><div class='del'>-	_Static_assert(false, "__COMPAT_scx_bpf_dispatch_from_dsq() renamed to __COMPAT_scx_bpf_dsq_move()"); \</div><div class='del'>-	false;									\</div><div class='del'>-})</div><div class='add'>+#define __COMPAT_bpf_cpumask_populate(cpumask, src, size__sz)		\</div><div class='add'>+	(bpf_ksym_exists(bpf_cpumask_populate) ?			\</div><div class='add'>+	 (bpf_cpumask_populate(cpumask, src, size__sz)) : -EOPNOTSUPP)</div><div class='ctx'> </div><div class='del'>-#define __COMPAT_scx_bpf_dispatch_vtime_from_dsq(it__iter, p, dsq_id, enq_flags) ({  \</div><div class='del'>-	_Static_assert(false, "__COMPAT_scx_bpf_dispatch_vtime_from_dsq() renamed to __COMPAT_scx_bpf_dsq_move_vtime()"); \</div><div class='del'>-	false;									\</div><div class='del'>-})</div><div class='add'>+/*</div><div class='add'>+ * v6.19: Introduce lockless peek API for user DSQs.</div><div class='add'>+ *</div><div class='add'>+ * Preserve the following macro until v6.21.</div><div class='add'>+ */</div><div class='add'>+static inline struct task_struct *__COMPAT_scx_bpf_dsq_peek(u64 dsq_id)</div><div class='add'>+{</div><div class='add'>+	struct task_struct *p = NULL;</div><div class='add'>+	struct bpf_iter_scx_dsq it;</div><div class='add'>+</div><div class='add'>+	if (bpf_ksym_exists(scx_bpf_dsq_peek))</div><div class='add'>+		return scx_bpf_dsq_peek(dsq_id);</div><div class='add'>+	if (!bpf_iter_scx_dsq_new(&amp;it, dsq_id, 0))</div><div class='add'>+		p = bpf_iter_scx_dsq_next(&amp;it);</div><div class='add'>+	bpf_iter_scx_dsq_destroy(&amp;it);</div><div class='add'>+	return p;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __COMPAT_is_enq_cpu_selected - Test if SCX_ENQ_CPU_SELECTED is on</div><div class='hunk'>@@ -226,6 +204,178 @@ static inline bool __COMPAT_is_enq_cpu_selected(u64 enq_flags)</div><div class='ctx'> 	 scx_bpf_pick_any_cpu(cpus_allowed, flags))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * v6.18: Add a helper to retrieve the current task running on a CPU.</div><div class='add'>+ *</div><div class='add'>+ * Keep this helper available until v6.20 for compatibility.</div><div class='add'>+ */</div><div class='add'>+static inline struct task_struct *__COMPAT_scx_bpf_cpu_curr(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct rq *rq;</div><div class='add'>+</div><div class='add'>+	if (bpf_ksym_exists(scx_bpf_cpu_curr))</div><div class='add'>+		return scx_bpf_cpu_curr(cpu);</div><div class='add'>+</div><div class='add'>+	rq = scx_bpf_cpu_rq(cpu);</div><div class='add'>+</div><div class='add'>+	return rq ? rq-&gt;curr : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * v6.19: To work around BPF maximum parameter limit, the following kfuncs are</div><div class='add'>+ * replaced with variants that pack scalar arguments in a struct. Wrappers are</div><div class='add'>+ * provided to maintain source compatibility.</div><div class='add'>+ *</div><div class='add'>+ * v6.13: scx_bpf_dsq_insert_vtime() renaming is also handled here. See the</div><div class='add'>+ * block on dispatch renaming above for more details.</div><div class='add'>+ *</div><div class='add'>+ * The kernel will carry the compat variants until v6.23 to maintain binary</div><div class='add'>+ * compatibility. After v6.23 release, remove the compat handling and move the</div><div class='add'>+ * wrappers to common.bpf.h.</div><div class='add'>+ */</div><div class='add'>+s32 scx_bpf_select_cpu_and___compat(struct task_struct *p, s32 prev_cpu, u64 wake_flags,</div><div class='add'>+				    const struct cpumask *cpus_allowed, u64 flags) __ksym __weak;</div><div class='add'>+void scx_bpf_dispatch_vtime___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;</div><div class='add'>+void scx_bpf_dsq_insert_vtime___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime, u64 enq_flags) __ksym __weak;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * scx_bpf_select_cpu_and - Pick an idle CPU usable by task @p</div><div class='add'>+ * @p: task_struct to select a CPU for</div><div class='add'>+ * @prev_cpu: CPU @p was on previously</div><div class='add'>+ * @wake_flags: %SCX_WAKE_* flags</div><div class='add'>+ * @cpus_allowed: cpumask of allowed CPUs</div><div class='add'>+ * @flags: %SCX_PICK_IDLE* flags</div><div class='add'>+ *</div><div class='add'>+ * Inline wrapper that packs scalar arguments into a struct and calls</div><div class='add'>+ * __scx_bpf_select_cpu_and(). See __scx_bpf_select_cpu_and() for details.</div><div class='add'>+ */</div><div class='add'>+static inline s32</div><div class='add'>+scx_bpf_select_cpu_and(struct task_struct *p, s32 prev_cpu, u64 wake_flags,</div><div class='add'>+		       const struct cpumask *cpus_allowed, u64 flags)</div><div class='add'>+{</div><div class='add'>+	if (bpf_core_type_exists(struct scx_bpf_select_cpu_and_args)) {</div><div class='add'>+		struct scx_bpf_select_cpu_and_args args = {</div><div class='add'>+			.prev_cpu = prev_cpu,</div><div class='add'>+			.wake_flags = wake_flags,</div><div class='add'>+			.flags = flags,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		return __scx_bpf_select_cpu_and(p, cpus_allowed, &amp;args);</div><div class='add'>+	} else {</div><div class='add'>+		return scx_bpf_select_cpu_and___compat(p, prev_cpu, wake_flags,</div><div class='add'>+						       cpus_allowed, flags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * scx_bpf_dsq_insert_vtime - Insert a task into the vtime priority queue of a DSQ</div><div class='add'>+ * @p: task_struct to insert</div><div class='add'>+ * @dsq_id: DSQ to insert into</div><div class='add'>+ * @slice: duration @p can run for in nsecs, 0 to keep the current value</div><div class='add'>+ * @vtime: @p's ordering inside the vtime-sorted queue of the target DSQ</div><div class='add'>+ * @enq_flags: SCX_ENQ_*</div><div class='add'>+ *</div><div class='add'>+ * Inline wrapper that packs scalar arguments into a struct and calls</div><div class='add'>+ * __scx_bpf_dsq_insert_vtime(). See __scx_bpf_dsq_insert_vtime() for details.</div><div class='add'>+ */</div><div class='add'>+static inline bool</div><div class='add'>+scx_bpf_dsq_insert_vtime(struct task_struct *p, u64 dsq_id, u64 slice, u64 vtime,</div><div class='add'>+			 u64 enq_flags)</div><div class='add'>+{</div><div class='add'>+	if (bpf_core_type_exists(struct scx_bpf_dsq_insert_vtime_args)) {</div><div class='add'>+		struct scx_bpf_dsq_insert_vtime_args args = {</div><div class='add'>+			.dsq_id = dsq_id,</div><div class='add'>+			.slice = slice,</div><div class='add'>+			.vtime = vtime,</div><div class='add'>+			.enq_flags = enq_flags,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		return __scx_bpf_dsq_insert_vtime(p, &amp;args);</div><div class='add'>+	} else if (bpf_ksym_exists(scx_bpf_dsq_insert_vtime___compat)) {</div><div class='add'>+		scx_bpf_dsq_insert_vtime___compat(p, dsq_id, slice, vtime,</div><div class='add'>+						  enq_flags);</div><div class='add'>+		return true;</div><div class='add'>+	} else {</div><div class='add'>+		scx_bpf_dispatch_vtime___compat(p, dsq_id, slice, vtime,</div><div class='add'>+						enq_flags);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * v6.19: scx_bpf_dsq_insert() now returns bool instead of void. Move</div><div class='add'>+ * scx_bpf_dsq_insert() decl to common.bpf.h and drop compat helper after v6.22.</div><div class='add'>+ * The extra ___compat suffix is to work around libbpf not ignoring __SUFFIX on</div><div class='add'>+ * kernel side. The entire suffix can be dropped later.</div><div class='add'>+ *</div><div class='add'>+ * v6.13: scx_bpf_dsq_insert() renaming is also handled here. See the block on</div><div class='add'>+ * dispatch renaming above for more details.</div><div class='add'>+ */</div><div class='add'>+bool scx_bpf_dsq_insert___v2___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;</div><div class='add'>+void scx_bpf_dsq_insert___v1(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;</div><div class='add'>+void scx_bpf_dispatch___compat(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags) __ksym __weak;</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+scx_bpf_dsq_insert(struct task_struct *p, u64 dsq_id, u64 slice, u64 enq_flags)</div><div class='add'>+{</div><div class='add'>+	if (bpf_ksym_exists(scx_bpf_dsq_insert___v2___compat)) {</div><div class='add'>+		return scx_bpf_dsq_insert___v2___compat(p, dsq_id, slice, enq_flags);</div><div class='add'>+	} else if (bpf_ksym_exists(scx_bpf_dsq_insert___v1)) {</div><div class='add'>+		scx_bpf_dsq_insert___v1(p, dsq_id, slice, enq_flags);</div><div class='add'>+		return true;</div><div class='add'>+	} else {</div><div class='add'>+		scx_bpf_dispatch___compat(p, dsq_id, slice, enq_flags);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * v6.19: scx_bpf_task_set_slice() and scx_bpf_task_set_dsq_vtime() added to for</div><div class='add'>+ * sub-sched authority checks. Drop the wrappers and move the decls to</div><div class='add'>+ * common.bpf.h after v6.22.</div><div class='add'>+ */</div><div class='add'>+bool scx_bpf_task_set_slice___new(struct task_struct *p, u64 slice) __ksym __weak;</div><div class='add'>+bool scx_bpf_task_set_dsq_vtime___new(struct task_struct *p, u64 vtime) __ksym __weak;</div><div class='add'>+</div><div class='add'>+static inline void scx_bpf_task_set_slice(struct task_struct *p, u64 slice)</div><div class='add'>+{</div><div class='add'>+	if (bpf_ksym_exists(scx_bpf_task_set_slice___new))</div><div class='add'>+		scx_bpf_task_set_slice___new(p, slice);</div><div class='add'>+	else</div><div class='add'>+		p-&gt;scx.slice = slice;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void scx_bpf_task_set_dsq_vtime(struct task_struct *p, u64 vtime)</div><div class='add'>+{</div><div class='add'>+	if (bpf_ksym_exists(scx_bpf_task_set_dsq_vtime___new))</div><div class='add'>+		scx_bpf_task_set_dsq_vtime___new(p, vtime);</div><div class='add'>+	else</div><div class='add'>+		p-&gt;scx.dsq_vtime = vtime;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * v6.19: The new void variant can be called from anywhere while the older v1</div><div class='add'>+ * variant can only be called from ops.cpu_release(). The double ___ prefixes on</div><div class='add'>+ * the v2 variant need to be removed once libbpf is updated to ignore ___ prefix</div><div class='add'>+ * on kernel side. Drop the wrapper and move the decl to common.bpf.h after</div><div class='add'>+ * v6.22.</div><div class='add'>+ */</div><div class='add'>+u32 scx_bpf_reenqueue_local___v1(void) __ksym __weak;</div><div class='add'>+void scx_bpf_reenqueue_local___v2___compat(void) __ksym __weak;</div><div class='add'>+</div><div class='add'>+static inline bool __COMPAT_scx_bpf_reenqueue_local_from_anywhere(void)</div><div class='add'>+{</div><div class='add'>+	return bpf_ksym_exists(scx_bpf_reenqueue_local___v2___compat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void scx_bpf_reenqueue_local(void)</div><div class='add'>+{</div><div class='add'>+	if (__COMPAT_scx_bpf_reenqueue_local_from_anywhere())</div><div class='add'>+		scx_bpf_reenqueue_local___v2___compat();</div><div class='add'>+	else</div><div class='add'>+		scx_bpf_reenqueue_local___v1();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Define sched_ext_ops. This may be expanded to define multiple variants for</div><div class='ctx'>  * backward compatibility. See compat.h::SCX_OPS_LOAD/ATTACH().</div><div class='ctx'>  */</div><div class='head'>diff --git a/tools/sched_ext/include/scx/compat.h b/tools/sched_ext/include/scx/compat.h<br/>index 35c67c5174ac..8b4897fc8b99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/compat.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/compat.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/compat.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/compat.h</a></div><div class='hunk'>@@ -151,6 +151,10 @@ static inline long scx_hotplug_seq(void)</div><div class='ctx'>  *</div><div class='ctx'>  * ec7e3b0463e1 ("implement-ops") in https://github.com/sched-ext/sched_ext is</div><div class='ctx'>  * the current minimum required kernel version.</div><div class='add'>+ *</div><div class='add'>+ * COMPAT:</div><div class='add'>+ * - v6.17: ops.cgroup_set_bandwidth()</div><div class='add'>+ * - v6.19: ops.cgroup_set_idle()</div><div class='ctx'>  */</div><div class='ctx'> #define SCX_OPS_OPEN(__ops_name, __scx_name) ({					\</div><div class='ctx'> 	struct __scx_name *__skel;						\</div><div class='hunk'>@@ -162,6 +166,16 @@ static inline long scx_hotplug_seq(void)</div><div class='ctx'> 	SCX_BUG_ON(!__skel, "Could not open " #__scx_name);			\</div><div class='ctx'> 	__skel-&gt;struct_ops.__ops_name-&gt;hotplug_seq = scx_hotplug_seq();		\</div><div class='ctx'> 	SCX_ENUM_INIT(__skel);							\</div><div class='add'>+	if (__skel-&gt;struct_ops.__ops_name-&gt;cgroup_set_bandwidth &amp;&amp;		\</div><div class='add'>+	    !__COMPAT_struct_has_field("sched_ext_ops", "cgroup_set_bandwidth")) { \</div><div class='add'>+		fprintf(stderr, "WARNING: kernel doesn't support ops.cgroup_set_bandwidth()\n"); \</div><div class='add'>+		__skel-&gt;struct_ops.__ops_name-&gt;cgroup_set_bandwidth = NULL;	\</div><div class='add'>+	}									\</div><div class='add'>+	if (__skel-&gt;struct_ops.__ops_name-&gt;cgroup_set_idle &amp;&amp;			\</div><div class='add'>+	    !__COMPAT_struct_has_field("sched_ext_ops", "cgroup_set_idle")) { \</div><div class='add'>+		fprintf(stderr, "WARNING: kernel doesn't support ops.cgroup_set_idle()\n"); \</div><div class='add'>+		__skel-&gt;struct_ops.__ops_name-&gt;cgroup_set_idle = NULL;	\</div><div class='add'>+	}									\</div><div class='ctx'> 	__skel; 								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='head'>diff --git a/tools/sched_ext/include/scx/user_exit_info.bpf.h b/tools/sched_ext/include/scx/user_exit_info.bpf.h<br/>new file mode 100644<br/>index 000000000000..e7ac6611a990<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/user_exit_info.bpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/user_exit_info.bpf.h</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Define struct user_exit_info which is shared between BPF and userspace parts</div><div class='add'>+ * to communicate exit status and other information.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022 Meta Platforms, Inc. and affiliates.</div><div class='add'>+ * Copyright (c) 2022 Tejun Heo &lt;tj@kernel.org&gt;</div><div class='add'>+ * Copyright (c) 2022 David Vernet &lt;dvernet@meta.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __USER_EXIT_INFO_BPF_H</div><div class='add'>+#define __USER_EXIT_INFO_BPF_H</div><div class='add'>+</div><div class='add'>+#ifndef LSP</div><div class='add'>+#include "vmlinux.h"</div><div class='add'>+#endif</div><div class='add'>+#include &lt;bpf/bpf_core_read.h&gt;</div><div class='add'>+</div><div class='add'>+#include "user_exit_info_common.h"</div><div class='add'>+</div><div class='add'>+#define UEI_DEFINE(__name)							\</div><div class='add'>+	char RESIZABLE_ARRAY(data, __name##_dump);				\</div><div class='add'>+	const volatile u32 __name##_dump_len;					\</div><div class='add'>+	struct user_exit_info __name SEC(".data")</div><div class='add'>+</div><div class='add'>+#define UEI_RECORD(__uei_name, __ei) ({						\</div><div class='add'>+	bpf_probe_read_kernel_str(__uei_name.reason,				\</div><div class='add'>+				  sizeof(__uei_name.reason), (__ei)-&gt;reason);	\</div><div class='add'>+	bpf_probe_read_kernel_str(__uei_name.msg,				\</div><div class='add'>+				  sizeof(__uei_name.msg), (__ei)-&gt;msg);		\</div><div class='add'>+	bpf_probe_read_kernel_str(__uei_name##_dump,				\</div><div class='add'>+				  __uei_name##_dump_len, (__ei)-&gt;dump);		\</div><div class='add'>+	if (bpf_core_field_exists((__ei)-&gt;exit_code))				\</div><div class='add'>+		__uei_name.exit_code = (__ei)-&gt;exit_code;			\</div><div class='add'>+	/* use __sync to force memory barrier */				\</div><div class='add'>+	__sync_val_compare_and_swap(&amp;__uei_name.kind, __uei_name.kind,		\</div><div class='add'>+				    (__ei)-&gt;kind);				\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#endif /* __USER_EXIT_INFO_BPF_H */</div><div class='head'>diff --git a/tools/sched_ext/include/scx/user_exit_info.h b/tools/sched_ext/include/scx/user_exit_info.h<br/>index 66f856640ee7..399697fa372f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/user_exit_info.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/include/scx/user_exit_info.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/user_exit_info.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/user_exit_info.h</a></div><div class='hunk'>@@ -10,55 +10,11 @@</div><div class='ctx'> #ifndef __USER_EXIT_INFO_H</div><div class='ctx'> #define __USER_EXIT_INFO_H</div><div class='ctx'> </div><div class='del'>-#ifdef LSP</div><div class='del'>-#define __bpf__</div><div class='del'>-#include "../vmlinux.h"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum uei_sizes {</div><div class='del'>-	UEI_REASON_LEN		= 128,</div><div class='del'>-	UEI_MSG_LEN		= 1024,</div><div class='del'>-	UEI_DUMP_DFL_LEN	= 32768,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct user_exit_info {</div><div class='del'>-	int		kind;</div><div class='del'>-	s64		exit_code;</div><div class='del'>-	char		reason[UEI_REASON_LEN];</div><div class='del'>-	char		msg[UEI_MSG_LEN];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef __bpf__</div><div class='del'>-</div><div class='del'>-#ifndef LSP</div><div class='del'>-#include "vmlinux.h"</div><div class='del'>-#endif</div><div class='del'>-#include &lt;bpf/bpf_core_read.h&gt;</div><div class='del'>-</div><div class='del'>-#define UEI_DEFINE(__name)							\</div><div class='del'>-	char RESIZABLE_ARRAY(data, __name##_dump);				\</div><div class='del'>-	const volatile u32 __name##_dump_len;					\</div><div class='del'>-	struct user_exit_info __name SEC(".data")</div><div class='del'>-</div><div class='del'>-#define UEI_RECORD(__uei_name, __ei) ({						\</div><div class='del'>-	bpf_probe_read_kernel_str(__uei_name.reason,				\</div><div class='del'>-				  sizeof(__uei_name.reason), (__ei)-&gt;reason);	\</div><div class='del'>-	bpf_probe_read_kernel_str(__uei_name.msg,				\</div><div class='del'>-				  sizeof(__uei_name.msg), (__ei)-&gt;msg);		\</div><div class='del'>-	bpf_probe_read_kernel_str(__uei_name##_dump,				\</div><div class='del'>-				  __uei_name##_dump_len, (__ei)-&gt;dump);		\</div><div class='del'>-	if (bpf_core_field_exists((__ei)-&gt;exit_code))				\</div><div class='del'>-		__uei_name.exit_code = (__ei)-&gt;exit_code;			\</div><div class='del'>-	/* use __sync to force memory barrier */				\</div><div class='del'>-	__sync_val_compare_and_swap(&amp;__uei_name.kind, __uei_name.kind,		\</div><div class='del'>-				    (__ei)-&gt;kind);				\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#else	/* !__bpf__ */</div><div class='del'>-</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "user_exit_info_common.h"</div><div class='add'>+</div><div class='ctx'> /* no need to call the following explicitly if SCX_OPS_LOAD() is used */</div><div class='ctx'> #define UEI_SET_SIZE(__skel, __ops_name, __uei_name) ({					\</div><div class='ctx'> 	u32 __len = (__skel)-&gt;struct_ops.__ops_name-&gt;exit_dump_len ?: UEI_DUMP_DFL_LEN;	\</div><div class='hunk'>@@ -114,5 +70,4 @@ enum uei_ecode_mask {</div><div class='ctx'> </div><div class='ctx'> #define UEI_ECODE_RESTART(__ecode)	(UEI_ECODE_SYS_ACT((__ecode)) == SCX_ECODE_ACT_RESTART)</div><div class='ctx'> </div><div class='del'>-#endif	/* __bpf__ */</div><div class='ctx'> #endif	/* __USER_EXIT_INFO_H */</div><div class='head'>diff --git a/tools/sched_ext/include/scx/user_exit_info_common.h b/tools/sched_ext/include/scx/user_exit_info_common.h<br/>new file mode 100644<br/>index 000000000000..2d0981aedd89<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/include/scx/user_exit_info_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/include/scx/user_exit_info_common.h</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Define struct user_exit_info which is shared between BPF and userspace parts</div><div class='add'>+ * to communicate exit status and other information.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022 Meta Platforms, Inc. and affiliates.</div><div class='add'>+ * Copyright (c) 2022 Tejun Heo &lt;tj@kernel.org&gt;</div><div class='add'>+ * Copyright (c) 2022 David Vernet &lt;dvernet@meta.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef __USER_EXIT_INFO_COMMON_H</div><div class='add'>+#define __USER_EXIT_INFO_COMMON_H</div><div class='add'>+</div><div class='add'>+#ifdef LSP</div><div class='add'>+#include "../vmlinux.h"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+enum uei_sizes {</div><div class='add'>+	UEI_REASON_LEN		= 128,</div><div class='add'>+	UEI_MSG_LEN		= 1024,</div><div class='add'>+	UEI_DUMP_DFL_LEN	= 32768,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct user_exit_info {</div><div class='add'>+	int		kind;</div><div class='add'>+	s64		exit_code;</div><div class='add'>+	char		reason[UEI_REASON_LEN];</div><div class='add'>+	char		msg[UEI_MSG_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __USER_EXIT_INFO_COMMON_H */</div><div class='head'>diff --git a/tools/sched_ext/scx_central.bpf.c b/tools/sched_ext/scx_central.bpf.c<br/>index 50bc1737c167..55df8b798865 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_central.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_central.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_central.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_central.bpf.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /*</div><div class='del'>- * A central FIFO sched_ext scheduler which demonstrates the followings:</div><div class='add'>+ * A central FIFO sched_ext scheduler which demonstrates the following:</div><div class='ctx'>  *</div><div class='ctx'>  * a. Making all scheduling decisions from one CPU:</div><div class='ctx'>  *</div><div class='head'>diff --git a/tools/sched_ext/scx_central.c b/tools/sched_ext/scx_central.c<br/>index 6ba6e610eeaa..55931a4cd71c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_central.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_central.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_central.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_central.c</a></div><div class='hunk'>@@ -61,6 +61,7 @@ restart:</div><div class='ctx'> 	skel-&gt;rodata-&gt;nr_cpu_ids = libbpf_num_possible_cpus();</div><div class='ctx'> 	skel-&gt;rodata-&gt;slice_ns = __COMPAT_ENUM_OR_ZERO("scx_public_consts", "SCX_SLICE_DFL");</div><div class='ctx'> </div><div class='add'>+	assert(skel-&gt;rodata-&gt;nr_cpu_ids &gt; 0);</div><div class='ctx'> 	assert(skel-&gt;rodata-&gt;nr_cpu_ids &lt;= INT32_MAX);</div><div class='ctx'> </div><div class='ctx'> 	while ((opt = getopt(argc, argv, "s:c:pvh")) != -1) {</div><div class='head'>diff --git a/tools/sched_ext/scx_cpu0.bpf.c b/tools/sched_ext/scx_cpu0.bpf.c<br/>new file mode 100644<br/>index 000000000000..6326ce598c8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_cpu0.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_cpu0.bpf.c</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * A CPU0 scheduler.</div><div class='add'>+ *</div><div class='add'>+ * This scheduler queues all tasks to a shared DSQ and only dispatches them on</div><div class='add'>+ * CPU0 in FIFO order. This is useful for testing bypass behavior when many</div><div class='add'>+ * tasks are concentrated on a single CPU. If the load balancer doesn't work,</div><div class='add'>+ * bypass mode can trigger task hangs or RCU stalls as the queue is long and</div><div class='add'>+ * there's only one CPU working on it.</div><div class='add'>+ *</div><div class='add'>+ * - Statistics tracking how many tasks are queued to local and CPU0 DSQs.</div><div class='add'>+ * - Termination notification for userspace.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Meta Platforms, Inc. and affiliates.</div><div class='add'>+ * Copyright (c) 2025 Tejun Heo &lt;tj@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;scx/common.bpf.h&gt;</div><div class='add'>+</div><div class='add'>+char _license[] SEC("license") = "GPL";</div><div class='add'>+</div><div class='add'>+const volatile u32 nr_cpus = 32;	/* !0 for veristat, set during init */</div><div class='add'>+</div><div class='add'>+UEI_DEFINE(uei);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * We create a custom DSQ with ID 0 that we dispatch to and consume from on</div><div class='add'>+ * CPU0.</div><div class='add'>+ */</div><div class='add'>+#define DSQ_CPU0 0</div><div class='add'>+</div><div class='add'>+struct {</div><div class='add'>+	__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);</div><div class='add'>+	__uint(key_size, sizeof(u32));</div><div class='add'>+	__uint(value_size, sizeof(u64));</div><div class='add'>+	__uint(max_entries, 2);			/* [local, cpu0] */</div><div class='add'>+} stats SEC(".maps");</div><div class='add'>+</div><div class='add'>+static void stat_inc(u32 idx)</div><div class='add'>+{</div><div class='add'>+	u64 *cnt_p = bpf_map_lookup_elem(&amp;stats, &amp;idx);</div><div class='add'>+	if (cnt_p)</div><div class='add'>+		(*cnt_p)++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+s32 BPF_STRUCT_OPS(cpu0_select_cpu, struct task_struct *p, s32 prev_cpu, u64 wake_flags)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void BPF_STRUCT_OPS(cpu0_enqueue, struct task_struct *p, u64 enq_flags)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * select_cpu() always picks CPU0. If @p is not on CPU0, it can't run on</div><div class='add'>+	 * CPU 0. Queue on whichever CPU it's currently only.</div><div class='add'>+	 */</div><div class='add'>+	if (scx_bpf_task_cpu(p) != 0) {</div><div class='add'>+		stat_inc(0);	/* count local queueing */</div><div class='add'>+		scx_bpf_dsq_insert(p, SCX_DSQ_LOCAL, SCX_SLICE_DFL, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stat_inc(1);	/* count cpu0 queueing */</div><div class='add'>+	scx_bpf_dsq_insert(p, DSQ_CPU0, SCX_SLICE_DFL, enq_flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void BPF_STRUCT_OPS(cpu0_dispatch, s32 cpu, struct task_struct *prev)</div><div class='add'>+{</div><div class='add'>+	if (cpu == 0)</div><div class='add'>+		scx_bpf_dsq_move_to_local(DSQ_CPU0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+s32 BPF_STRUCT_OPS_SLEEPABLE(cpu0_init)</div><div class='add'>+{</div><div class='add'>+	return scx_bpf_create_dsq(DSQ_CPU0, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void BPF_STRUCT_OPS(cpu0_exit, struct scx_exit_info *ei)</div><div class='add'>+{</div><div class='add'>+	UEI_RECORD(uei, ei);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SCX_OPS_DEFINE(cpu0_ops,</div><div class='add'>+	       .select_cpu		= (void *)cpu0_select_cpu,</div><div class='add'>+	       .enqueue			= (void *)cpu0_enqueue,</div><div class='add'>+	       .dispatch		= (void *)cpu0_dispatch,</div><div class='add'>+	       .init			= (void *)cpu0_init,</div><div class='add'>+	       .exit			= (void *)cpu0_exit,</div><div class='add'>+	       .name			= "cpu0");</div><div class='head'>diff --git a/tools/sched_ext/scx_cpu0.c b/tools/sched_ext/scx_cpu0.c<br/>new file mode 100644<br/>index 000000000000..1e4fa4ab8da9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_cpu0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_cpu0.c</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 Meta Platforms, Inc. and affiliates.</div><div class='add'>+ * Copyright (c) 2025 Tejun Heo &lt;tj@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;stdio.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='add'>+#include &lt;assert.h&gt;</div><div class='add'>+#include &lt;libgen.h&gt;</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='add'>+#include &lt;scx/common.h&gt;</div><div class='add'>+#include "scx_cpu0.bpf.skel.h"</div><div class='add'>+</div><div class='add'>+const char help_fmt[] =</div><div class='add'>+"A cpu0 sched_ext scheduler.\n"</div><div class='add'>+"\n"</div><div class='add'>+"See the top-level comment in .bpf.c for more details.\n"</div><div class='add'>+"\n"</div><div class='add'>+"Usage: %s [-v]\n"</div><div class='add'>+"\n"</div><div class='add'>+"  -v            Print libbpf debug messages\n"</div><div class='add'>+"  -h            Display this help and exit\n";</div><div class='add'>+</div><div class='add'>+static bool verbose;</div><div class='add'>+static volatile int exit_req;</div><div class='add'>+</div><div class='add'>+static int libbpf_print_fn(enum libbpf_print_level level, const char *format, va_list args)</div><div class='add'>+{</div><div class='add'>+	if (level == LIBBPF_DEBUG &amp;&amp; !verbose)</div><div class='add'>+		return 0;</div><div class='add'>+	return vfprintf(stderr, format, args);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sigint_handler(int sig)</div><div class='add'>+{</div><div class='add'>+	exit_req = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void read_stats(struct scx_cpu0 *skel, __u64 *stats)</div><div class='add'>+{</div><div class='add'>+	int nr_cpus = libbpf_num_possible_cpus();</div><div class='add'>+	assert(nr_cpus &gt; 0);</div><div class='add'>+	__u64 cnts[2][nr_cpus];</div><div class='add'>+	__u32 idx;</div><div class='add'>+</div><div class='add'>+	memset(stats, 0, sizeof(stats[0]) * 2);</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; 2; idx++) {</div><div class='add'>+		int ret, cpu;</div><div class='add'>+</div><div class='add'>+		ret = bpf_map_lookup_elem(bpf_map__fd(skel-&gt;maps.stats),</div><div class='add'>+					  &amp;idx, cnts[idx]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+		for (cpu = 0; cpu &lt; nr_cpus; cpu++)</div><div class='add'>+			stats[idx] += cnts[idx][cpu];</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int main(int argc, char **argv)</div><div class='add'>+{</div><div class='add'>+	struct scx_cpu0 *skel;</div><div class='add'>+	struct bpf_link *link;</div><div class='add'>+	__u32 opt;</div><div class='add'>+	__u64 ecode;</div><div class='add'>+</div><div class='add'>+	libbpf_set_print(libbpf_print_fn);</div><div class='add'>+	signal(SIGINT, sigint_handler);</div><div class='add'>+	signal(SIGTERM, sigint_handler);</div><div class='add'>+restart:</div><div class='add'>+	skel = SCX_OPS_OPEN(cpu0_ops, scx_cpu0);</div><div class='add'>+</div><div class='add'>+	skel-&gt;rodata-&gt;nr_cpus = libbpf_num_possible_cpus();</div><div class='add'>+</div><div class='add'>+	while ((opt = getopt(argc, argv, "vh")) != -1) {</div><div class='add'>+		switch (opt) {</div><div class='add'>+		case 'v':</div><div class='add'>+			verbose = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			fprintf(stderr, help_fmt, basename(argv[0]));</div><div class='add'>+			return opt != 'h';</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SCX_OPS_LOAD(skel, cpu0_ops, scx_cpu0, uei);</div><div class='add'>+	link = SCX_OPS_ATTACH(skel, cpu0_ops, scx_cpu0);</div><div class='add'>+</div><div class='add'>+	while (!exit_req &amp;&amp; !UEI_EXITED(skel, uei)) {</div><div class='add'>+		__u64 stats[2];</div><div class='add'>+</div><div class='add'>+		read_stats(skel, stats);</div><div class='add'>+		printf("local=%llu cpu0=%llu\n", stats[0], stats[1]);</div><div class='add'>+		fflush(stdout);</div><div class='add'>+		sleep(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bpf_link__destroy(link);</div><div class='add'>+	ecode = UEI_REPORT(skel, uei);</div><div class='add'>+	scx_cpu0__destroy(skel);</div><div class='add'>+</div><div class='add'>+	if (UEI_ECODE_RESTART(ecode))</div><div class='add'>+		goto restart;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/sched_ext/scx_flatcg.bpf.c b/tools/sched_ext/scx_flatcg.bpf.c<br/>index fdc7170639e6..43126858b8e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_flatcg.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_flatcg.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_flatcg.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_flatcg.bpf.c</a></div><div class='hunk'>@@ -382,7 +382,7 @@ void BPF_STRUCT_OPS(fcg_enqueue, struct task_struct *p, u64 enq_flags)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cgrp = __COMPAT_scx_bpf_task_cgroup(p);</div><div class='add'>+	cgrp = scx_bpf_task_cgroup(p);</div><div class='ctx'> 	cgc = find_cgrp_ctx(cgrp);</div><div class='ctx'> 	if (!cgc)</div><div class='ctx'> 		goto out_release;</div><div class='hunk'>@@ -508,7 +508,7 @@ void BPF_STRUCT_OPS(fcg_runnable, struct task_struct *p, u64 enq_flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct cgroup *cgrp;</div><div class='ctx'> </div><div class='del'>-	cgrp = __COMPAT_scx_bpf_task_cgroup(p);</div><div class='add'>+	cgrp = scx_bpf_task_cgroup(p);</div><div class='ctx'> 	update_active_weight_sums(cgrp, true);</div><div class='ctx'> 	bpf_cgroup_release(cgrp);</div><div class='ctx'> }</div><div class='hunk'>@@ -521,7 +521,7 @@ void BPF_STRUCT_OPS(fcg_running, struct task_struct *p)</div><div class='ctx'> 	if (fifo_sched)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cgrp = __COMPAT_scx_bpf_task_cgroup(p);</div><div class='add'>+	cgrp = scx_bpf_task_cgroup(p);</div><div class='ctx'> 	cgc = find_cgrp_ctx(cgrp);</div><div class='ctx'> 	if (cgc) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -564,7 +564,7 @@ void BPF_STRUCT_OPS(fcg_stopping, struct task_struct *p, bool runnable)</div><div class='ctx'> 	if (!taskc-&gt;bypassed_at)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cgrp = __COMPAT_scx_bpf_task_cgroup(p);</div><div class='add'>+	cgrp = scx_bpf_task_cgroup(p);</div><div class='ctx'> 	cgc = find_cgrp_ctx(cgrp);</div><div class='ctx'> 	if (cgc) {</div><div class='ctx'> 		__sync_fetch_and_add(&amp;cgc-&gt;cvtime_delta,</div><div class='hunk'>@@ -578,7 +578,7 @@ void BPF_STRUCT_OPS(fcg_quiescent, struct task_struct *p, u64 deq_flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct cgroup *cgrp;</div><div class='ctx'> </div><div class='del'>-	cgrp = __COMPAT_scx_bpf_task_cgroup(p);</div><div class='add'>+	cgrp = scx_bpf_task_cgroup(p);</div><div class='ctx'> 	update_active_weight_sums(cgrp, false);</div><div class='ctx'> 	bpf_cgroup_release(cgrp);</div><div class='ctx'> }</div><div class='hunk'>@@ -950,5 +950,5 @@ SCX_OPS_DEFINE(flatcg_ops,</div><div class='ctx'> 	       .cgroup_move		= (void *)fcg_cgroup_move,</div><div class='ctx'> 	       .init			= (void *)fcg_init,</div><div class='ctx'> 	       .exit			= (void *)fcg_exit,</div><div class='del'>-	       .flags			= SCX_OPS_ENQ_EXITING,</div><div class='add'>+	       .flags			= SCX_OPS_HAS_CGROUP_WEIGHT | SCX_OPS_ENQ_EXITING,</div><div class='ctx'> 	       .name			= "flatcg");</div><div class='head'>diff --git a/tools/sched_ext/scx_flatcg.c b/tools/sched_ext/scx_flatcg.c<br/>index 6dd423eeb4ff..cd85eb401179 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_flatcg.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_flatcg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_flatcg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_flatcg.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;signal.h&gt;</div><div class='add'>+#include &lt;assert.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;libgen.h&gt;</div><div class='ctx'> #include &lt;limits.h&gt;</div><div class='hunk'>@@ -137,6 +138,7 @@ restart:</div><div class='ctx'> 	skel = SCX_OPS_OPEN(flatcg_ops, scx_flatcg);</div><div class='ctx'> </div><div class='ctx'> 	skel-&gt;rodata-&gt;nr_cpus = libbpf_num_possible_cpus();</div><div class='add'>+	assert(skel-&gt;rodata-&gt;nr_cpus &gt; 0);</div><div class='ctx'> 	skel-&gt;rodata-&gt;cgrp_slice_ns = __COMPAT_ENUM_OR_ZERO("scx_public_consts", "SCX_SLICE_DFL");</div><div class='ctx'> </div><div class='ctx'> 	while ((opt = getopt(argc, argv, "s:i:dfvh")) != -1) {</div><div class='head'>diff --git a/tools/sched_ext/scx_qmap.bpf.c b/tools/sched_ext/scx_qmap.bpf.c<br/>index 69d877501cb7..df21fad0c438 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_qmap.bpf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_qmap.bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_qmap.bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_qmap.bpf.c</a></div><div class='hunk'>@@ -39,7 +39,8 @@ const volatile u32 stall_kernel_nth;</div><div class='ctx'> const volatile u32 dsp_inf_loop_after;</div><div class='ctx'> const volatile u32 dsp_batch;</div><div class='ctx'> const volatile bool highpri_boosting;</div><div class='del'>-const volatile bool print_shared_dsq;</div><div class='add'>+const volatile bool print_dsqs_and_events;</div><div class='add'>+const volatile bool print_msgs;</div><div class='ctx'> const volatile s32 disallow_tgid;</div><div class='ctx'> const volatile bool suppress_dump;</div><div class='ctx'> </div><div class='hunk'>@@ -56,7 +57,8 @@ struct qmap {</div><div class='ctx'>   queue1 SEC(".maps"),</div><div class='ctx'>   queue2 SEC(".maps"),</div><div class='ctx'>   queue3 SEC(".maps"),</div><div class='del'>-  queue4 SEC(".maps");</div><div class='add'>+  queue4 SEC(".maps"),</div><div class='add'>+  dump_store SEC(".maps");</div><div class='ctx'> </div><div class='ctx'> struct {</div><div class='ctx'> 	__uint(type, BPF_MAP_TYPE_ARRAY_OF_MAPS);</div><div class='hunk'>@@ -200,6 +202,9 @@ void BPF_STRUCT_OPS(qmap_enqueue, struct task_struct *p, u64 enq_flags)</div><div class='ctx'> 	void *ring;</div><div class='ctx'> 	s32 cpu;</div><div class='ctx'> </div><div class='add'>+	if (enq_flags &amp; SCX_ENQ_REENQ)</div><div class='add'>+		__sync_fetch_and_add(&amp;nr_reenqueued, 1);</div><div class='add'>+</div><div class='ctx'> 	if (p-&gt;flags &amp; PF_KTHREAD) {</div><div class='ctx'> 		if (stall_kernel_nth &amp;&amp; !(++kernel_cnt % stall_kernel_nth))</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -318,12 +323,9 @@ static bool dispatch_highpri(bool from_timer)</div><div class='ctx'> </div><div class='ctx'> 		if (tctx-&gt;highpri) {</div><div class='ctx'> 			/* exercise the set_*() and vtime interface too */</div><div class='del'>-			__COMPAT_scx_bpf_dsq_move_set_slice(</div><div class='del'>-				BPF_FOR_EACH_ITER, slice_ns * 2);</div><div class='del'>-			__COMPAT_scx_bpf_dsq_move_set_vtime(</div><div class='del'>-				BPF_FOR_EACH_ITER, highpri_seq++);</div><div class='del'>-			__COMPAT_scx_bpf_dsq_move_vtime(</div><div class='del'>-				BPF_FOR_EACH_ITER, p, HIGHPRI_DSQ, 0);</div><div class='add'>+			scx_bpf_dsq_move_set_slice(BPF_FOR_EACH_ITER, slice_ns * 2);</div><div class='add'>+			scx_bpf_dsq_move_set_vtime(BPF_FOR_EACH_ITER, highpri_seq++);</div><div class='add'>+			scx_bpf_dsq_move_vtime(BPF_FOR_EACH_ITER, p, HIGHPRI_DSQ, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -340,9 +342,8 @@ static bool dispatch_highpri(bool from_timer)</div><div class='ctx'> 		else</div><div class='ctx'> 			cpu = scx_bpf_pick_any_cpu(p-&gt;cpus_ptr, 0);</div><div class='ctx'> </div><div class='del'>-		if (__COMPAT_scx_bpf_dsq_move(BPF_FOR_EACH_ITER, p,</div><div class='del'>-					      SCX_DSQ_LOCAL_ON | cpu,</div><div class='del'>-					      SCX_ENQ_PREEMPT)) {</div><div class='add'>+		if (scx_bpf_dsq_move(BPF_FOR_EACH_ITER, p, SCX_DSQ_LOCAL_ON | cpu,</div><div class='add'>+				     SCX_ENQ_PREEMPT)) {</div><div class='ctx'> 			if (cpu == this_cpu) {</div><div class='ctx'> 				dispatched = true;</div><div class='ctx'> 				__sync_fetch_and_add(&amp;nr_expedited_local, 1);</div><div class='hunk'>@@ -531,20 +532,35 @@ bool BPF_STRUCT_OPS(qmap_core_sched_before,</div><div class='ctx'> 	return task_qdist(a) &gt; task_qdist(b);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void BPF_STRUCT_OPS(qmap_cpu_release, s32 cpu, struct scx_cpu_release_args *args)</div><div class='add'>+SEC("tp_btf/sched_switch")</div><div class='add'>+int BPF_PROG(qmap_sched_switch, bool preempt, struct task_struct *prev,</div><div class='add'>+	     struct task_struct *next, unsigned long prev_state)</div><div class='ctx'> {</div><div class='del'>-	u32 cnt;</div><div class='add'>+	if (!__COMPAT_scx_bpf_reenqueue_local_from_anywhere())</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Called when @cpu is taken by a higher priority scheduling class. This</div><div class='del'>-	 * makes @cpu no longer available for executing sched_ext tasks. As we</div><div class='del'>-	 * don't want the tasks in @cpu's local dsq to sit there until @cpu</div><div class='del'>-	 * becomes available again, re-enqueue them into the global dsq. See</div><div class='del'>-	 * %SCX_ENQ_REENQ handling in qmap_enqueue().</div><div class='add'>+	 * If @cpu is taken by a higher priority scheduling class, it is no</div><div class='add'>+	 * longer available for executing sched_ext tasks. As we don't want the</div><div class='add'>+	 * tasks in @cpu's local dsq to sit there until @cpu becomes available</div><div class='add'>+	 * again, re-enqueue them into the global dsq. See %SCX_ENQ_REENQ</div><div class='add'>+	 * handling in qmap_enqueue().</div><div class='ctx'> 	 */</div><div class='del'>-	cnt = scx_bpf_reenqueue_local();</div><div class='del'>-	if (cnt)</div><div class='del'>-		__sync_fetch_and_add(&amp;nr_reenqueued, cnt);</div><div class='add'>+	switch (next-&gt;policy) {</div><div class='add'>+	case 1: /* SCHED_FIFO */</div><div class='add'>+	case 2: /* SCHED_RR */</div><div class='add'>+	case 6: /* SCHED_DEADLINE */</div><div class='add'>+		scx_bpf_reenqueue_local();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void BPF_STRUCT_OPS(qmap_cpu_release, s32 cpu, struct scx_cpu_release_args *args)</div><div class='add'>+{</div><div class='add'>+	/* see qmap_sched_switch() to learn how to do this on newer kernels */</div><div class='add'>+	if (!__COMPAT_scx_bpf_reenqueue_local_from_anywhere())</div><div class='add'>+		scx_bpf_reenqueue_local();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> s32 BPF_STRUCT_OPS(qmap_init_task, struct task_struct *p,</div><div class='hunk'>@@ -578,11 +594,26 @@ void BPF_STRUCT_OPS(qmap_dump, struct scx_dump_ctx *dctx)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		scx_bpf_dump("QMAP FIFO[%d]:", i);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Dump can be invoked anytime and there is no way to iterate in</div><div class='add'>+		 * a non-destructive way. Pop and store in dump_store and then</div><div class='add'>+		 * restore afterwards. If racing against new enqueues, ordering</div><div class='add'>+		 * can get mixed up.</div><div class='add'>+		 */</div><div class='ctx'> 		bpf_repeat(4096) {</div><div class='ctx'> 			if (bpf_map_pop_elem(fifo, &amp;pid))</div><div class='ctx'> 				break;</div><div class='add'>+			bpf_map_push_elem(&amp;dump_store, &amp;pid, 0);</div><div class='ctx'> 			scx_bpf_dump(" %d", pid);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		bpf_repeat(4096) {</div><div class='add'>+			if (bpf_map_pop_elem(&amp;dump_store, &amp;pid))</div><div class='add'>+				break;</div><div class='add'>+			bpf_map_push_elem(fifo, &amp;pid, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		scx_bpf_dump("\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -617,22 +648,25 @@ void BPF_STRUCT_OPS(qmap_dump_task, struct scx_dump_ctx *dctx, struct task_struc</div><div class='ctx'> </div><div class='ctx'> s32 BPF_STRUCT_OPS(qmap_cgroup_init, struct cgroup *cgrp, struct scx_cgroup_init_args *args)</div><div class='ctx'> {</div><div class='del'>-	bpf_printk("CGRP INIT %llu weight=%u period=%lu quota=%ld burst=%lu",</div><div class='del'>-		   cgrp-&gt;kn-&gt;id, args-&gt;weight, args-&gt;bw_period_us,</div><div class='del'>-		   args-&gt;bw_quota_us, args-&gt;bw_burst_us);</div><div class='add'>+	if (print_msgs)</div><div class='add'>+		bpf_printk("CGRP INIT %llu weight=%u period=%lu quota=%ld burst=%lu",</div><div class='add'>+			   cgrp-&gt;kn-&gt;id, args-&gt;weight, args-&gt;bw_period_us,</div><div class='add'>+			   args-&gt;bw_quota_us, args-&gt;bw_burst_us);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void BPF_STRUCT_OPS(qmap_cgroup_set_weight, struct cgroup *cgrp, u32 weight)</div><div class='ctx'> {</div><div class='del'>-	bpf_printk("CGRP SET %llu weight=%u", cgrp-&gt;kn-&gt;id, weight);</div><div class='add'>+	if (print_msgs)</div><div class='add'>+		bpf_printk("CGRP SET %llu weight=%u", cgrp-&gt;kn-&gt;id, weight);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void BPF_STRUCT_OPS(qmap_cgroup_set_bandwidth, struct cgroup *cgrp,</div><div class='ctx'> 		    u64 period_us, u64 quota_us, u64 burst_us)</div><div class='ctx'> {</div><div class='del'>-	bpf_printk("CGRP SET %llu period=%lu quota=%ld burst=%lu", cgrp-&gt;kn-&gt;id,</div><div class='del'>-		   period_us, quota_us, burst_us);</div><div class='add'>+	if (print_msgs)</div><div class='add'>+		bpf_printk("CGRP SET %llu period=%lu quota=%ld burst=%lu",</div><div class='add'>+			   cgrp-&gt;kn-&gt;id, period_us, quota_us, burst_us);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -676,16 +710,20 @@ static void print_cpus(void)</div><div class='ctx'> </div><div class='ctx'> void BPF_STRUCT_OPS(qmap_cpu_online, s32 cpu)</div><div class='ctx'> {</div><div class='del'>-	bpf_printk("CPU %d coming online", cpu);</div><div class='del'>-	/* @cpu is already online at this point */</div><div class='del'>-	print_cpus();</div><div class='add'>+	if (print_msgs) {</div><div class='add'>+		bpf_printk("CPU %d coming online", cpu);</div><div class='add'>+		/* @cpu is already online at this point */</div><div class='add'>+		print_cpus();</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void BPF_STRUCT_OPS(qmap_cpu_offline, s32 cpu)</div><div class='ctx'> {</div><div class='del'>-	bpf_printk("CPU %d going offline", cpu);</div><div class='del'>-	/* @cpu is still online at this point */</div><div class='del'>-	print_cpus();</div><div class='add'>+	if (print_msgs) {</div><div class='add'>+		bpf_printk("CPU %d going offline", cpu);</div><div class='add'>+		/* @cpu is still online at this point */</div><div class='add'>+		print_cpus();</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct monitor_timer {</div><div class='hunk'>@@ -783,35 +821,36 @@ static void dump_shared_dsq(void)</div><div class='ctx'> </div><div class='ctx'> static int monitor_timerfn(void *map, int *key, struct bpf_timer *timer)</div><div class='ctx'> {</div><div class='del'>-	struct scx_event_stats events;</div><div class='del'>-</div><div class='ctx'> 	bpf_rcu_read_lock();</div><div class='ctx'> 	dispatch_highpri(true);</div><div class='ctx'> 	bpf_rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	monitor_cpuperf();</div><div class='ctx'> </div><div class='del'>-	if (print_shared_dsq)</div><div class='add'>+	if (print_dsqs_and_events) {</div><div class='add'>+		struct scx_event_stats events;</div><div class='add'>+</div><div class='ctx'> 		dump_shared_dsq();</div><div class='ctx'> </div><div class='del'>-	__COMPAT_scx_bpf_events(&amp;events, sizeof(events));</div><div class='del'>-</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_SELECT_CPU_FALLBACK",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_SELECT_CPU_FALLBACK));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_DISPATCH_LOCAL_DSQ_OFFLINE",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_DISPATCH_LOCAL_DSQ_OFFLINE));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_DISPATCH_KEEP_LAST",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_DISPATCH_KEEP_LAST));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_ENQ_SKIP_EXITING",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_ENQ_SKIP_EXITING));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_REFILL_SLICE_DFL",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_REFILL_SLICE_DFL));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_BYPASS_DURATION",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_BYPASS_DURATION));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_BYPASS_DISPATCH",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_BYPASS_DISPATCH));</div><div class='del'>-	bpf_printk("%35s: %lld", "SCX_EV_BYPASS_ACTIVATE",</div><div class='del'>-		   scx_read_event(&amp;events, SCX_EV_BYPASS_ACTIVATE));</div><div class='add'>+		__COMPAT_scx_bpf_events(&amp;events, sizeof(events));</div><div class='add'>+</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_SELECT_CPU_FALLBACK",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_SELECT_CPU_FALLBACK));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_DISPATCH_LOCAL_DSQ_OFFLINE",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_DISPATCH_LOCAL_DSQ_OFFLINE));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_DISPATCH_KEEP_LAST",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_DISPATCH_KEEP_LAST));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_ENQ_SKIP_EXITING",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_ENQ_SKIP_EXITING));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_REFILL_SLICE_DFL",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_REFILL_SLICE_DFL));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_BYPASS_DURATION",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_BYPASS_DURATION));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_BYPASS_DISPATCH",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_BYPASS_DISPATCH));</div><div class='add'>+		bpf_printk("%35s: %lld", "SCX_EV_BYPASS_ACTIVATE",</div><div class='add'>+			   scx_read_event(&amp;events, SCX_EV_BYPASS_ACTIVATE));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bpf_timer_start(timer, ONE_SEC_IN_NS, 0);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -823,7 +862,8 @@ s32 BPF_STRUCT_OPS_SLEEPABLE(qmap_init)</div><div class='ctx'> 	struct bpf_timer *timer;</div><div class='ctx'> 	s32 ret;</div><div class='ctx'> </div><div class='del'>-	print_cpus();</div><div class='add'>+	if (print_msgs)</div><div class='add'>+		print_cpus();</div><div class='ctx'> </div><div class='ctx'> 	ret = scx_bpf_create_dsq(SHARED_DSQ, -1);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/tools/sched_ext/scx_qmap.c b/tools/sched_ext/scx_qmap.c<br/>index c4912ab2e76f..ef701d45ba43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_qmap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_qmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_qmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_qmap.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@ const char help_fmt[] =</div><div class='ctx'> "See the top-level comment in .bpf.c for more details.\n"</div><div class='ctx'> "\n"</div><div class='ctx'> "Usage: %s [-s SLICE_US] [-e COUNT] [-t COUNT] [-T COUNT] [-l COUNT] [-b COUNT]\n"</div><div class='del'>-"       [-P] [-d PID] [-D LEN] [-p] [-v]\n"</div><div class='add'>+"       [-P] [-M] [-d PID] [-D LEN] [-p] [-v]\n"</div><div class='ctx'> "\n"</div><div class='ctx'> "  -s SLICE_US   Override slice duration\n"</div><div class='ctx'> "  -e COUNT      Trigger scx_bpf_error() after COUNT enqueues\n"</div><div class='hunk'>@@ -28,7 +28,8 @@ const char help_fmt[] =</div><div class='ctx'> "  -T COUNT      Stall every COUNT'th kernel thread\n"</div><div class='ctx'> "  -l COUNT      Trigger dispatch infinite looping after COUNT dispatches\n"</div><div class='ctx'> "  -b COUNT      Dispatch upto COUNT tasks together\n"</div><div class='del'>-"  -P            Print out DSQ content to trace_pipe every second, use with -b\n"</div><div class='add'>+"  -P            Print out DSQ content and event counters to trace_pipe every second\n"</div><div class='add'>+"  -M            Print out debug messages to trace_pipe\n"</div><div class='ctx'> "  -H            Boost nice -20 tasks in SHARED_DSQ, use with -b\n"</div><div class='ctx'> "  -d PID        Disallow a process from switching into SCHED_EXT (-1 for self)\n"</div><div class='ctx'> "  -D LEN        Set scx_exit_info.dump buffer length\n"</div><div class='hunk'>@@ -66,7 +67,7 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	skel-&gt;rodata-&gt;slice_ns = __COMPAT_ENUM_OR_ZERO("scx_public_consts", "SCX_SLICE_DFL");</div><div class='ctx'> </div><div class='del'>-	while ((opt = getopt(argc, argv, "s:e:t:T:l:b:PHd:D:Spvh")) != -1) {</div><div class='add'>+	while ((opt = getopt(argc, argv, "s:e:t:T:l:b:PMHd:D:Spvh")) != -1) {</div><div class='ctx'> 		switch (opt) {</div><div class='ctx'> 		case 's':</div><div class='ctx'> 			skel-&gt;rodata-&gt;slice_ns = strtoull(optarg, NULL, 0) * 1000;</div><div class='hunk'>@@ -87,7 +88,10 @@ int main(int argc, char **argv)</div><div class='ctx'> 			skel-&gt;rodata-&gt;dsp_batch = strtoul(optarg, NULL, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 'P':</div><div class='del'>-			skel-&gt;rodata-&gt;print_shared_dsq = true;</div><div class='add'>+			skel-&gt;rodata-&gt;print_dsqs_and_events = true;</div><div class='add'>+			break;</div><div class='add'>+		case 'M':</div><div class='add'>+			skel-&gt;rodata-&gt;print_msgs = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 'H':</div><div class='ctx'> 			skel-&gt;rodata-&gt;highpri_boosting = true;</div><div class='head'>diff --git a/tools/sched_ext/scx_simple.c b/tools/sched_ext/scx_simple.c<br/>index 76d83199545c..06d4b13bf76b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_simple.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/sched_ext/scx_simple.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/sched_ext/scx_simple.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/sched_ext/scx_simple.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;stdio.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;signal.h&gt;</div><div class='add'>+#include &lt;assert.h&gt;</div><div class='ctx'> #include &lt;libgen.h&gt;</div><div class='ctx'> #include &lt;bpf/bpf.h&gt;</div><div class='ctx'> #include &lt;scx/common.h&gt;</div><div class='hunk'>@@ -41,6 +42,7 @@ static void sigint_handler(int simple)</div><div class='ctx'> static void read_stats(struct scx_simple *skel, __u64 *stats)</div><div class='ctx'> {</div><div class='ctx'> 	int nr_cpus = libbpf_num_possible_cpus();</div><div class='add'>+	assert(nr_cpus &gt; 0);</div><div class='ctx'> 	__u64 cnts[2][nr_cpus];</div><div class='ctx'> 	__u32 idx;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/scripts/syscall.tbl b/tools/scripts/syscall.tbl<br/>index 580b4e246aec..d1ae5e92c615 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/scripts/syscall.tbl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/scripts/syscall.tbl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/scripts/syscall.tbl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/scripts/syscall.tbl</a></div><div class='hunk'>@@ -408,3 +408,5 @@</div><div class='ctx'> 465	common	listxattrat			sys_listxattrat</div><div class='ctx'> 466	common	removexattrat			sys_removexattrat</div><div class='ctx'> 467	common	open_tree_attr			sys_open_tree_attr</div><div class='add'>+468	common	file_getattr			sys_file_getattr</div><div class='add'>+469	common	file_setattr			sys_file_setattr</div><div class='head'>diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild<br/>index d07f14cb7aa4..0e151d0572d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/Kbuild?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/Kbuild?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/Kbuild</a></div><div class='hunk'>@@ -4,23 +4,19 @@ ldflags-y += --wrap=is_acpi_device_node</div><div class='ctx'> ldflags-y += --wrap=acpi_evaluate_integer</div><div class='ctx'> ldflags-y += --wrap=acpi_pci_find_root</div><div class='ctx'> ldflags-y += --wrap=nvdimm_bus_register</div><div class='del'>-ldflags-y += --wrap=devm_cxl_port_enumerate_dports</div><div class='del'>-ldflags-y += --wrap=devm_cxl_setup_hdm</div><div class='del'>-ldflags-y += --wrap=devm_cxl_add_passthrough_decoder</div><div class='del'>-ldflags-y += --wrap=devm_cxl_enumerate_decoders</div><div class='ctx'> ldflags-y += --wrap=cxl_await_media_ready</div><div class='del'>-ldflags-y += --wrap=cxl_hdm_decode_init</div><div class='del'>-ldflags-y += --wrap=cxl_dvsec_rr_decode</div><div class='ctx'> ldflags-y += --wrap=devm_cxl_add_rch_dport</div><div class='del'>-ldflags-y += --wrap=cxl_rcd_component_reg_phys</div><div class='ctx'> ldflags-y += --wrap=cxl_endpoint_parse_cdat</div><div class='ctx'> ldflags-y += --wrap=cxl_dport_init_ras_reporting</div><div class='add'>+ldflags-y += --wrap=devm_cxl_endpoint_decoders_setup</div><div class='add'>+ldflags-y += --wrap=hmat_get_extended_linear_cache_size</div><div class='ctx'> </div><div class='ctx'> DRIVERS := ../../../drivers</div><div class='ctx'> CXL_SRC := $(DRIVERS)/cxl</div><div class='ctx'> CXL_CORE_SRC := $(DRIVERS)/cxl/core</div><div class='ctx'> ccflags-y := -I$(srctree)/drivers/cxl/</div><div class='ctx'> ccflags-y += -D__mock=__weak</div><div class='add'>+ccflags-y += -DCXL_TEST_ENABLE=1</div><div class='ctx'> ccflags-y += -DTRACE_INCLUDE_PATH=$(CXL_CORE_SRC) -I$(srctree)/drivers/cxl/core/</div><div class='ctx'> </div><div class='ctx'> obj-m += cxl_acpi.o</div><div class='head'>diff --git a/tools/testing/cxl/cxl_core_exports.c b/tools/testing/cxl/cxl_core_exports.c<br/>index f088792a8925..6754de35598d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/cxl_core_exports.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/cxl_core_exports.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/cxl_core_exports.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/cxl_core_exports.c</a></div><div class='hunk'>@@ -2,6 +2,28 @@</div><div class='ctx'> /* Copyright(c) 2022 Intel Corporation. All rights reserved. */</div><div class='ctx'> </div><div class='ctx'> #include "cxl.h"</div><div class='add'>+#include "exports.h"</div><div class='ctx'> </div><div class='ctx'> /* Exporting of cxl_core symbols that are only used by cxl_test */</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(cxl_num_decoders_committed, "CXL");</div><div class='add'>+</div><div class='add'>+cxl_add_dport_by_dev_fn _devm_cxl_add_dport_by_dev =</div><div class='add'>+	__devm_cxl_add_dport_by_dev;</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(_devm_cxl_add_dport_by_dev, "CXL");</div><div class='add'>+</div><div class='add'>+struct cxl_dport *devm_cxl_add_dport_by_dev(struct cxl_port *port,</div><div class='add'>+					    struct device *dport_dev)</div><div class='add'>+{</div><div class='add'>+	return _devm_cxl_add_dport_by_dev(port, dport_dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(devm_cxl_add_dport_by_dev, "CXL");</div><div class='add'>+</div><div class='add'>+cxl_switch_decoders_setup_fn _devm_cxl_switch_port_decoders_setup =</div><div class='add'>+	__devm_cxl_switch_port_decoders_setup;</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(_devm_cxl_switch_port_decoders_setup, "CXL");</div><div class='add'>+</div><div class='add'>+int devm_cxl_switch_port_decoders_setup(struct cxl_port *port)</div><div class='add'>+{</div><div class='add'>+	return _devm_cxl_switch_port_decoders_setup(port);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(devm_cxl_switch_port_decoders_setup, "CXL");</div><div class='head'>diff --git a/tools/testing/cxl/exports.h b/tools/testing/cxl/exports.h<br/>new file mode 100644<br/>index 000000000000..7ebee7c0bd67<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/exports.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/exports.h</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef __MOCK_CXL_EXPORTS_H_</div><div class='add'>+#define __MOCK_CXL_EXPORTS_H_</div><div class='add'>+</div><div class='add'>+typedef struct cxl_dport *(*cxl_add_dport_by_dev_fn)(struct cxl_port *port,</div><div class='add'>+							  struct device *dport_dev);</div><div class='add'>+extern cxl_add_dport_by_dev_fn _devm_cxl_add_dport_by_dev;</div><div class='add'>+</div><div class='add'>+typedef int(*cxl_switch_decoders_setup_fn)(struct cxl_port *port);</div><div class='add'>+extern cxl_switch_decoders_setup_fn _devm_cxl_switch_port_decoders_setup;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/tools/testing/cxl/test/Kbuild b/tools/testing/cxl/test/Kbuild<br/>index 6b1927897856..af50972c8b6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/Kbuild?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/Kbuild</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/Kbuild?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/Kbuild</a></div><div class='hunk'>@@ -4,6 +4,7 @@ ccflags-y := -I$(srctree)/drivers/cxl/ -I$(srctree)/drivers/cxl/core</div><div class='ctx'> obj-m += cxl_test.o</div><div class='ctx'> obj-m += cxl_mock.o</div><div class='ctx'> obj-m += cxl_mock_mem.o</div><div class='add'>+obj-m += cxl_translate.o</div><div class='ctx'> </div><div class='ctx'> cxl_test-y := cxl.o</div><div class='ctx'> cxl_mock-y := mock.o</div><div class='head'>diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c<br/>index 6a25cca5636f..81e2aef3627a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/cxl.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/cxl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/cxl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/cxl.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include "mock.h"</div><div class='ctx'> </div><div class='ctx'> static int interleave_arithmetic;</div><div class='add'>+static bool extended_linear_cache;</div><div class='ctx'> </div><div class='ctx'> #define FAKE_QTG_ID	42</div><div class='ctx'> </div><div class='hunk'>@@ -26,6 +27,9 @@ static int interleave_arithmetic;</div><div class='ctx'> #define NR_CXL_PORT_DECODERS 8</div><div class='ctx'> #define NR_BRIDGES (NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST + NR_CXL_RCH)</div><div class='ctx'> </div><div class='add'>+#define MOCK_AUTO_REGION_SIZE_DEFAULT SZ_512M</div><div class='add'>+static int mock_auto_region_size = MOCK_AUTO_REGION_SIZE_DEFAULT;</div><div class='add'>+</div><div class='ctx'> static struct platform_device *cxl_acpi;</div><div class='ctx'> static struct platform_device *cxl_host_bridge[NR_CXL_HOST_BRIDGES];</div><div class='ctx'> #define NR_MULTI_ROOT (NR_CXL_HOST_BRIDGES * NR_CXL_ROOT_PORTS)</div><div class='hunk'>@@ -210,7 +214,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 0,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 4UL,</div><div class='hunk'>@@ -225,7 +229,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 1,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 8UL,</div><div class='hunk'>@@ -240,7 +244,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 0,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 4UL,</div><div class='hunk'>@@ -255,7 +259,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 1,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 8UL,</div><div class='hunk'>@@ -270,7 +274,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 0,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 4UL,</div><div class='hunk'>@@ -285,7 +289,7 @@ static struct {</div><div class='ctx'> 			},</div><div class='ctx'> 			.interleave_ways = 0,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M,</div><div class='hunk'>@@ -302,7 +306,7 @@ static struct {</div><div class='ctx'> 			.interleave_arithmetic = ACPI_CEDT_CFMWS_ARITHMETIC_XOR,</div><div class='ctx'> 			.interleave_ways = 0,</div><div class='ctx'> 			.granularity = 4,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 8UL,</div><div class='hunk'>@@ -318,7 +322,7 @@ static struct {</div><div class='ctx'> 			.interleave_arithmetic = ACPI_CEDT_CFMWS_ARITHMETIC_XOR,</div><div class='ctx'> 			.interleave_ways = 1,</div><div class='ctx'> 			.granularity = 0,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_256M * 8UL,</div><div class='hunk'>@@ -334,7 +338,7 @@ static struct {</div><div class='ctx'> 			.interleave_arithmetic = ACPI_CEDT_CFMWS_ARITHMETIC_XOR,</div><div class='ctx'> 			.interleave_ways = 8,</div><div class='ctx'> 			.granularity = 1,</div><div class='del'>-			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |</div><div class='add'>+			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_HOSTONLYMEM |</div><div class='ctx'> 					ACPI_CEDT_CFMWS_RESTRICT_PMEM,</div><div class='ctx'> 			.qtg_id = FAKE_QTG_ID,</div><div class='ctx'> 			.window_size = SZ_512M * 6UL,</div><div class='hunk'>@@ -426,6 +430,22 @@ static struct cxl_mock_res *alloc_mock_res(resource_size_t size, int align)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Only update CFMWS0 as this is used by the auto region. */</div><div class='add'>+static void cfmws_elc_update(struct acpi_cedt_cfmws *window, int index)</div><div class='add'>+{</div><div class='add'>+	if (!extended_linear_cache)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index != 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The window size should be 2x of the CXL region size where half is</div><div class='add'>+	 * DRAM and half is CXL</div><div class='add'>+	 */</div><div class='add'>+	window-&gt;window_size = mock_auto_region_size * 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int populate_cedt(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cxl_mock_res *res;</div><div class='hunk'>@@ -450,6 +470,7 @@ static int populate_cedt(void)</div><div class='ctx'> 	for (i = cfmws_start; i &lt;= cfmws_end; i++) {</div><div class='ctx'> 		struct acpi_cedt_cfmws *window = mock_cfmws[i];</div><div class='ctx'> </div><div class='add'>+		cfmws_elc_update(window, i);</div><div class='ctx'> 		res = alloc_mock_res(window-&gt;window_size, SZ_256M);</div><div class='ctx'> 		if (!res)</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -591,6 +612,25 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname,</div><div class='ctx'> 	return AE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+mock_hmat_get_extended_linear_cache_size(struct resource *backing_res,</div><div class='add'>+					 int nid, resource_size_t *cache_size)</div><div class='add'>+{</div><div class='add'>+	struct acpi_cedt_cfmws *window = mock_cfmws[0];</div><div class='add'>+	struct resource cfmws0_res =</div><div class='add'>+		DEFINE_RES_MEM(window-&gt;base_hpa, window-&gt;window_size);</div><div class='add'>+</div><div class='add'>+	if (!extended_linear_cache ||</div><div class='add'>+	    !resource_contains(&amp;cfmws0_res, backing_res)) {</div><div class='add'>+		return hmat_get_extended_linear_cache_size(backing_res,</div><div class='add'>+							   nid, cache_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*cache_size = mock_auto_region_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct pci_bus mock_pci_bus[NR_BRIDGES];</div><div class='ctx'> static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = {</div><div class='ctx'> 	[0] = {</div><div class='hunk'>@@ -643,15 +683,8 @@ static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port,</div><div class='ctx'> 	return cxlhdm;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mock_cxl_add_passthrough_decoder(struct cxl_port *port)</div><div class='del'>-{</div><div class='del'>-	dev_err(&amp;port-&gt;dev, "unexpected passthrough decoder for cxl_test\n");</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> struct target_map_ctx {</div><div class='del'>-	int *target_map;</div><div class='add'>+	u32 *target_map;</div><div class='ctx'> 	int index;</div><div class='ctx'> 	int target_count;</div><div class='ctx'> };</div><div class='hunk'>@@ -745,7 +778,6 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)</div><div class='ctx'> 	struct cxl_endpoint_decoder *cxled;</div><div class='ctx'> 	struct cxl_switch_decoder *cxlsd;</div><div class='ctx'> 	struct cxl_port *port, *iter;</div><div class='del'>-	const int size = SZ_512M;</div><div class='ctx'> 	struct cxl_memdev *cxlmd;</div><div class='ctx'> 	struct cxl_dport *dport;</div><div class='ctx'> 	struct device *dev;</div><div class='hunk'>@@ -788,9 +820,11 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	base = window-&gt;base_hpa;</div><div class='add'>+	if (extended_linear_cache)</div><div class='add'>+		base += mock_auto_region_size;</div><div class='ctx'> 	cxld-&gt;hpa_range = (struct range) {</div><div class='ctx'> 		.start = base,</div><div class='del'>-		.end = base + size - 1,</div><div class='add'>+		.end = base + mock_auto_region_size - 1,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cxld-&gt;interleave_ways = 2;</div><div class='hunk'>@@ -799,7 +833,8 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)</div><div class='ctx'> 	cxld-&gt;flags = CXL_DECODER_F_ENABLE;</div><div class='ctx'> 	cxled-&gt;state = CXL_DECODER_STATE_AUTO;</div><div class='ctx'> 	port-&gt;commit_end = cxld-&gt;id;</div><div class='del'>-	devm_cxl_dpa_reserve(cxled, 0, size / cxld-&gt;interleave_ways, 0);</div><div class='add'>+	devm_cxl_dpa_reserve(cxled, 0,</div><div class='add'>+			     mock_auto_region_size / cxld-&gt;interleave_ways, 0);</div><div class='ctx'> 	cxld-&gt;commit = mock_decoder_commit;</div><div class='ctx'> 	cxld-&gt;reset = mock_decoder_reset;</div><div class='ctx'> </div><div class='hunk'>@@ -818,15 +853,21 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (WARN_ON(!dev))</div><div class='ctx'> 			continue;</div><div class='add'>+</div><div class='ctx'> 		cxlsd = to_cxl_switch_decoder(dev);</div><div class='ctx'> 		if (i == 0) {</div><div class='ctx'> 			/* put cxl_mem.4 second in the decode order */</div><div class='del'>-			if (pdev-&gt;id == 4)</div><div class='add'>+			if (pdev-&gt;id == 4) {</div><div class='ctx'> 				cxlsd-&gt;target[1] = dport;</div><div class='del'>-			else</div><div class='add'>+				cxld-&gt;target_map[1] = dport-&gt;port_id;</div><div class='add'>+			} else {</div><div class='ctx'> 				cxlsd-&gt;target[0] = dport;</div><div class='del'>-		} else</div><div class='add'>+				cxld-&gt;target_map[0] = dport-&gt;port_id;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='ctx'> 			cxlsd-&gt;target[0] = dport;</div><div class='add'>+			cxld-&gt;target_map[0] = dport-&gt;port_id;</div><div class='add'>+		}</div><div class='ctx'> 		cxld = &amp;cxlsd-&gt;cxld;</div><div class='ctx'> 		cxld-&gt;target_type = CXL_DECODER_HOSTONLYMEM;</div><div class='ctx'> 		cxld-&gt;flags = CXL_DECODER_F_ENABLE;</div><div class='hunk'>@@ -842,7 +883,7 @@ static void mock_init_hdm_decoder(struct cxl_decoder *cxld)</div><div class='ctx'> 		cxld-&gt;interleave_granularity = 4096;</div><div class='ctx'> 		cxld-&gt;hpa_range = (struct range) {</div><div class='ctx'> 			.start = base,</div><div class='del'>-			.end = base + size - 1,</div><div class='add'>+			.end = base + mock_auto_region_size - 1,</div><div class='ctx'> 		};</div><div class='ctx'> 		put_device(dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -863,9 +904,7 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,</div><div class='ctx'> 		target_count = NR_CXL_SWITCH_PORTS;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NR_CXL_PORT_DECODERS; i++) {</div><div class='del'>-		int target_map[CXL_DECODER_MAX_INTERLEAVE] = { 0 };</div><div class='ctx'> 		struct target_map_ctx ctx = {</div><div class='del'>-			.target_map = target_map,</div><div class='ctx'> 			.target_count = target_count,</div><div class='ctx'> 		};</div><div class='ctx'> 		struct cxl_decoder *cxld;</div><div class='hunk'>@@ -894,6 +933,8 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,</div><div class='ctx'> 			cxld = &amp;cxled-&gt;cxld;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		ctx.target_map = cxld-&gt;target_map;</div><div class='add'>+</div><div class='ctx'> 		mock_init_hdm_decoder(cxld);</div><div class='ctx'> </div><div class='ctx'> 		if (target_count) {</div><div class='hunk'>@@ -905,7 +946,7 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		rc = cxl_decoder_add_locked(cxld, target_map);</div><div class='add'>+		rc = cxl_decoder_add_locked(cxld);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			put_device(&amp;cxld-&gt;dev);</div><div class='ctx'> 			dev_err(&amp;port-&gt;dev, "Failed to add decoder\n");</div><div class='hunk'>@@ -921,10 +962,42 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mock_cxl_port_enumerate_dports(struct cxl_port *port)</div><div class='add'>+static int __mock_cxl_decoders_setup(struct cxl_port *port)</div><div class='add'>+{</div><div class='add'>+	struct cxl_hdm *cxlhdm;</div><div class='add'>+</div><div class='add'>+	cxlhdm = mock_cxl_setup_hdm(port, NULL);</div><div class='add'>+	if (IS_ERR(cxlhdm)) {</div><div class='add'>+		if (PTR_ERR(cxlhdm) != -ENODEV)</div><div class='add'>+			dev_err(&amp;port-&gt;dev, "Failed to map HDM decoder capability\n");</div><div class='add'>+		return PTR_ERR(cxlhdm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mock_cxl_enumerate_decoders(cxlhdm, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mock_cxl_switch_port_decoders_setup(struct cxl_port *port)</div><div class='add'>+{</div><div class='add'>+	if (is_cxl_root(port) || is_cxl_endpoint(port))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return __mock_cxl_decoders_setup(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mock_cxl_endpoint_decoders_setup(struct cxl_port *port)</div><div class='add'>+{</div><div class='add'>+	if (!is_cxl_endpoint(port))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return __mock_cxl_decoders_setup(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_port_array(struct cxl_port *port,</div><div class='add'>+			  struct platform_device ***port_array,</div><div class='add'>+			  int *port_array_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device **array;</div><div class='del'>-	int i, array_size;</div><div class='add'>+	int array_size;</div><div class='ctx'> </div><div class='ctx'> 	if (port-&gt;depth == 1) {</div><div class='ctx'> 		if (is_multi_bridge(port-&gt;uport_dev)) {</div><div class='hunk'>@@ -958,9 +1031,24 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*port_array = array;</div><div class='add'>+	*port_array_size = array_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cxl_dport *mock_cxl_add_dport_by_dev(struct cxl_port *port,</div><div class='add'>+						   struct device *dport_dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device **array;</div><div class='add'>+	int rc, i, array_size;</div><div class='add'>+</div><div class='add'>+	rc = get_port_array(port, &amp;array, &amp;array_size);</div><div class='add'>+	if (rc)</div><div class='add'>+		return ERR_PTR(rc);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; array_size; i++) {</div><div class='ctx'> 		struct platform_device *pdev = array[i];</div><div class='del'>-		struct cxl_dport *dport;</div><div class='ctx'> </div><div class='ctx'> 		if (pdev-&gt;dev.parent != port-&gt;uport_dev) {</div><div class='ctx'> 			dev_dbg(&amp;port-&gt;dev, "%s: mismatch parent %s\n",</div><div class='hunk'>@@ -969,14 +1057,14 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dport = devm_cxl_add_dport(port, &amp;pdev-&gt;dev, pdev-&gt;id,</div><div class='del'>-					   CXL_RESOURCE_NONE);</div><div class='add'>+		if (&amp;pdev-&gt;dev != dport_dev)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(dport))</div><div class='del'>-			return PTR_ERR(dport);</div><div class='add'>+		return devm_cxl_add_dport(port, &amp;pdev-&gt;dev, pdev-&gt;id,</div><div class='add'>+					  CXL_RESOURCE_NONE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ERR_PTR(-ENODEV);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1035,11 +1123,12 @@ static struct cxl_mock_ops cxl_mock_ops = {</div><div class='ctx'> 	.acpi_table_parse_cedt = mock_acpi_table_parse_cedt,</div><div class='ctx'> 	.acpi_evaluate_integer = mock_acpi_evaluate_integer,</div><div class='ctx'> 	.acpi_pci_find_root = mock_acpi_pci_find_root,</div><div class='del'>-	.devm_cxl_port_enumerate_dports = mock_cxl_port_enumerate_dports,</div><div class='del'>-	.devm_cxl_setup_hdm = mock_cxl_setup_hdm,</div><div class='del'>-	.devm_cxl_add_passthrough_decoder = mock_cxl_add_passthrough_decoder,</div><div class='del'>-	.devm_cxl_enumerate_decoders = mock_cxl_enumerate_decoders,</div><div class='add'>+	.devm_cxl_switch_port_decoders_setup = mock_cxl_switch_port_decoders_setup,</div><div class='add'>+	.devm_cxl_endpoint_decoders_setup = mock_cxl_endpoint_decoders_setup,</div><div class='ctx'> 	.cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat,</div><div class='add'>+	.devm_cxl_add_dport_by_dev = mock_cxl_add_dport_by_dev,</div><div class='add'>+	.hmat_get_extended_linear_cache_size =</div><div class='add'>+		mock_hmat_get_extended_linear_cache_size,</div><div class='ctx'> 	.list = LIST_HEAD_INIT(cxl_mock_ops.list),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1529,6 +1618,8 @@ static __exit void cxl_test_exit(void)</div><div class='ctx'> </div><div class='ctx'> module_param(interleave_arithmetic, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(interleave_arithmetic, "Modulo:0, XOR:1");</div><div class='add'>+module_param(extended_linear_cache, bool, 0444);</div><div class='add'>+MODULE_PARM_DESC(extended_linear_cache, "Enable extended linear cache support");</div><div class='ctx'> module_init(cxl_test_init);</div><div class='ctx'> module_exit(cxl_test_exit);</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/tools/testing/cxl/test/cxl_translate.c b/tools/testing/cxl/test/cxl_translate.c<br/>new file mode 100644<br/>index 000000000000..2200ae21795c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/cxl_translate.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/cxl_translate.c</a></div><div class='hunk'>@@ -0,0 +1,445 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright(c) 2025 Intel Corporation. All rights reserved.</div><div class='add'>+</div><div class='add'>+/* Preface all log entries with "cxl_translate" */</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;cxlmem.h&gt;</div><div class='add'>+#include &lt;cxl.h&gt;</div><div class='add'>+</div><div class='add'>+/* Maximum number of test vectors and entry length */</div><div class='add'>+#define MAX_TABLE_ENTRIES 128</div><div class='add'>+#define MAX_ENTRY_LEN 128</div><div class='add'>+</div><div class='add'>+/* Expected number of parameters in each test vector */</div><div class='add'>+#define EXPECTED_PARAMS 7</div><div class='add'>+</div><div class='add'>+/* Module parameters for test vectors */</div><div class='add'>+static char *table[MAX_TABLE_ENTRIES];</div><div class='add'>+static int table_num;</div><div class='add'>+</div><div class='add'>+/* Interleave Arithmetic */</div><div class='add'>+#define MODULO_MATH 0</div><div class='add'>+#define XOR_MATH 1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * XOR mapping configuration</div><div class='add'>+ * The test data sets all use the same set of xormaps. When additional</div><div class='add'>+ * data sets arrive for validation, this static setup will need to</div><div class='add'>+ * be changed to accept xormaps as additional parameters.</div><div class='add'>+ */</div><div class='add'>+struct cxl_cxims_data *cximsd;</div><div class='add'>+static u64 xormaps[] = {</div><div class='add'>+	0x2020900,</div><div class='add'>+	0x4041200,</div><div class='add'>+	0x1010400,</div><div class='add'>+	0x800,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int nr_maps = ARRAY_SIZE(xormaps);</div><div class='add'>+</div><div class='add'>+#define HBIW_TO_NR_MAPS_SIZE (CXL_DECODER_MAX_INTERLEAVE + 1)</div><div class='add'>+static const int hbiw_to_nr_maps[HBIW_TO_NR_MAPS_SIZE] = {</div><div class='add'>+	[1] = 0, [2] = 1, [3] = 0, [4] = 2, [6] = 1, [8] = 3, [12] = 2, [16] = 4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * to_hpa - calculate an HPA offset from a DPA offset and position</div><div class='add'>+ *</div><div class='add'>+ * dpa_offset: device physical address offset</div><div class='add'>+ * pos: devices position in interleave</div><div class='add'>+ * r_eiw: region encoded interleave ways</div><div class='add'>+ * r_eig: region encoded interleave granularity</div><div class='add'>+ * hb_ways: host bridge interleave ways</div><div class='add'>+ * math: interleave arithmetic (MODULO_MATH or XOR_MATH)</div><div class='add'>+ *</div><div class='add'>+ * Returns: host physical address offset</div><div class='add'>+ */</div><div class='add'>+static u64 to_hpa(u64 dpa_offset, int pos, u8 r_eiw, u16 r_eig, u8 hb_ways,</div><div class='add'>+		  u8 math)</div><div class='add'>+{</div><div class='add'>+	u64 hpa_offset;</div><div class='add'>+</div><div class='add'>+	/* Calculate base HPA offset from DPA and position */</div><div class='add'>+	hpa_offset = cxl_calculate_hpa_offset(dpa_offset, pos, r_eiw, r_eig);</div><div class='add'>+</div><div class='add'>+	if (math == XOR_MATH) {</div><div class='add'>+		cximsd-&gt;nr_maps = hbiw_to_nr_maps[hb_ways];</div><div class='add'>+		if (cximsd-&gt;nr_maps)</div><div class='add'>+			return cxl_do_xormap_calc(cximsd, hpa_offset, hb_ways);</div><div class='add'>+	}</div><div class='add'>+	return hpa_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * to_dpa - translate an HPA offset to DPA offset</div><div class='add'>+ *</div><div class='add'>+ * hpa_offset: host physical address offset</div><div class='add'>+ * r_eiw: region encoded interleave ways</div><div class='add'>+ * r_eig: region encoded interleave granularity</div><div class='add'>+ * hb_ways: host bridge interleave ways</div><div class='add'>+ * math: interleave arithmetic (MODULO_MATH or XOR_MATH)</div><div class='add'>+ *</div><div class='add'>+ * Returns: device physical address offset</div><div class='add'>+ */</div><div class='add'>+static u64 to_dpa(u64 hpa_offset, u8 r_eiw, u16 r_eig, u8 hb_ways, u8 math)</div><div class='add'>+{</div><div class='add'>+	u64 offset = hpa_offset;</div><div class='add'>+</div><div class='add'>+	if (math == XOR_MATH) {</div><div class='add'>+		cximsd-&gt;nr_maps = hbiw_to_nr_maps[hb_ways];</div><div class='add'>+		if (cximsd-&gt;nr_maps)</div><div class='add'>+			offset =</div><div class='add'>+				cxl_do_xormap_calc(cximsd, hpa_offset, hb_ways);</div><div class='add'>+	}</div><div class='add'>+	return cxl_calculate_dpa_offset(offset, r_eiw, r_eig);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * to_pos - extract an interleave position from an HPA offset</div><div class='add'>+ *</div><div class='add'>+ * hpa_offset: host physical address offset</div><div class='add'>+ * r_eiw: region encoded interleave ways</div><div class='add'>+ * r_eig: region encoded interleave granularity</div><div class='add'>+ * hb_ways: host bridge interleave ways</div><div class='add'>+ * math: interleave arithmetic (MODULO_MATH or XOR_MATH)</div><div class='add'>+ *</div><div class='add'>+ * Returns: devices position in region interleave</div><div class='add'>+ */</div><div class='add'>+static u64 to_pos(u64 hpa_offset, u8 r_eiw, u16 r_eig, u8 hb_ways, u8 math)</div><div class='add'>+{</div><div class='add'>+	u64 offset = hpa_offset;</div><div class='add'>+</div><div class='add'>+	/* Reverse XOR mapping if specified */</div><div class='add'>+	if (math == XOR_MATH)</div><div class='add'>+		offset = cxl_do_xormap_calc(cximsd, hpa_offset, hb_ways);</div><div class='add'>+</div><div class='add'>+	return cxl_calculate_position(offset, r_eiw, r_eig);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * run_translation_test - execute forward and reverse translations</div><div class='add'>+ *</div><div class='add'>+ * @dpa: device physical address</div><div class='add'>+ * @pos: expected position in region interleave</div><div class='add'>+ * @r_eiw: region encoded interleave ways</div><div class='add'>+ * @r_eig: region encoded interleave granularity</div><div class='add'>+ * @hb_ways: host bridge interleave ways</div><div class='add'>+ * @math: interleave arithmetic (MODULO_MATH or XOR_MATH)</div><div class='add'>+ * @expect_spa: expected system physical address</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, -1 on failure</div><div class='add'>+ */</div><div class='add'>+static int run_translation_test(u64 dpa, int pos, u8 r_eiw, u16 r_eig,</div><div class='add'>+				u8 hb_ways, int math, u64 expect_hpa)</div><div class='add'>+{</div><div class='add'>+	u64 translated_spa, reverse_dpa;</div><div class='add'>+	int reverse_pos;</div><div class='add'>+</div><div class='add'>+	/* Test Device to Host translation: DPA + POS -&gt; SPA */</div><div class='add'>+	translated_spa = to_hpa(dpa, pos, r_eiw, r_eig, hb_ways, math);</div><div class='add'>+	if (translated_spa != expect_hpa) {</div><div class='add'>+		pr_err("Device to host failed: expected HPA %llu, got %llu\n",</div><div class='add'>+		       expect_hpa, translated_spa);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Test Host to Device DPA translation: SPA -&gt; DPA */</div><div class='add'>+	reverse_dpa = to_dpa(translated_spa, r_eiw, r_eig, hb_ways, math);</div><div class='add'>+	if (reverse_dpa != dpa) {</div><div class='add'>+		pr_err("Host to Device DPA failed: expected %llu, got %llu\n",</div><div class='add'>+		       dpa, reverse_dpa);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Test Host to Device Position translation: SPA -&gt; POS */</div><div class='add'>+	reverse_pos = to_pos(translated_spa, r_eiw, r_eig, hb_ways, math);</div><div class='add'>+	if (reverse_pos != pos) {</div><div class='add'>+		pr_err("Position lookup failed: expected %d, got %d\n", pos,</div><div class='add'>+		       reverse_pos);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * parse_test_vector - parse a single test vector string</div><div class='add'>+ *</div><div class='add'>+ * entry: test vector string to parse</div><div class='add'>+ * dpa: device physical address</div><div class='add'>+ * pos: expected position in region interleave</div><div class='add'>+ * r_eiw: region encoded interleave ways</div><div class='add'>+ * r_eig: region encoded interleave granularity</div><div class='add'>+ * hb_ways: host bridge interleave ways</div><div class='add'>+ * math: interleave arithmetic (MODULO_MATH or XOR_MATH)</div><div class='add'>+ * expect_spa: expected system physical address</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int parse_test_vector(const char *entry, u64 *dpa, int *pos, u8 *r_eiw,</div><div class='add'>+			     u16 *r_eig, u8 *hb_ways, int *math,</div><div class='add'>+			     u64 *expect_hpa)</div><div class='add'>+{</div><div class='add'>+	unsigned int tmp_r_eiw, tmp_r_eig, tmp_hb_ways;</div><div class='add'>+	int parsed;</div><div class='add'>+</div><div class='add'>+	parsed = sscanf(entry, "%llu %d %u %u %u %d %llu", dpa, pos, &amp;tmp_r_eiw,</div><div class='add'>+			&amp;tmp_r_eig, &amp;tmp_hb_ways, math, expect_hpa);</div><div class='add'>+</div><div class='add'>+	if (parsed != EXPECTED_PARAMS) {</div><div class='add'>+		pr_err("Parse error: expected %d parameters, got %d in '%s'\n",</div><div class='add'>+		       EXPECTED_PARAMS, parsed, entry);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (tmp_r_eiw &gt; U8_MAX || tmp_r_eig &gt; U16_MAX || tmp_hb_ways &gt; U8_MAX) {</div><div class='add'>+		pr_err("Parameter overflow in entry: '%s'\n", entry);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+	if (*math != MODULO_MATH &amp;&amp; *math != XOR_MATH) {</div><div class='add'>+		pr_err("Invalid math type %d in entry: '%s'\n", *math, entry);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	*r_eiw = tmp_r_eiw;</div><div class='add'>+	*r_eig = tmp_r_eig;</div><div class='add'>+	*hb_ways = tmp_hb_ways;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * setup_xor_mapping - Initialize XOR mapping data structure</div><div class='add'>+ *</div><div class='add'>+ * The test data sets all use the same HBIG so we can use one set</div><div class='add'>+ * of xormaps, and set the number to apply based on HBIW before</div><div class='add'>+ * calling cxl_do_xormap_calc().</div><div class='add'>+ *</div><div class='add'>+ * When additional data sets arrive for validation with different</div><div class='add'>+ * HBIG's this static setup will need to be updated.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int setup_xor_mapping(void)</div><div class='add'>+{</div><div class='add'>+	if (nr_maps &lt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cximsd = kzalloc(struct_size(cximsd, xormaps, nr_maps), GFP_KERNEL);</div><div class='add'>+	if (!cximsd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(cximsd-&gt;xormaps, xormaps, nr_maps * sizeof(*cximsd-&gt;xormaps));</div><div class='add'>+	cximsd-&gt;nr_maps = nr_maps;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test_random_params(void)</div><div class='add'>+{</div><div class='add'>+	u8 valid_eiws[] = { 0, 1, 2, 3, 4, 8, 9, 10 };</div><div class='add'>+	u16 valid_eigs[] = { 0, 1, 2, 3, 4, 5, 6 };</div><div class='add'>+	int i, ways, pos, reverse_pos;</div><div class='add'>+	u64 dpa, hpa, reverse_dpa;</div><div class='add'>+	int iterations = 10000;</div><div class='add'>+	int failures = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; iterations; i++) {</div><div class='add'>+		/* Generate valid random parameters for eiw, eig, pos, dpa */</div><div class='add'>+		u8 eiw = valid_eiws[get_random_u32() % ARRAY_SIZE(valid_eiws)];</div><div class='add'>+		u16 eig = valid_eigs[get_random_u32() % ARRAY_SIZE(valid_eigs)];</div><div class='add'>+</div><div class='add'>+		eiw_to_ways(eiw, &amp;ways);</div><div class='add'>+		pos = get_random_u32() % ways;</div><div class='add'>+		dpa = get_random_u64() &gt;&gt; 12;</div><div class='add'>+</div><div class='add'>+		hpa = cxl_calculate_hpa_offset(dpa, pos, eiw, eig);</div><div class='add'>+		reverse_dpa = cxl_calculate_dpa_offset(hpa, eiw, eig);</div><div class='add'>+		reverse_pos = cxl_calculate_position(hpa, eiw, eig);</div><div class='add'>+</div><div class='add'>+		if (reverse_dpa != dpa || reverse_pos != pos) {</div><div class='add'>+			pr_err("test random iter %d FAIL hpa=%llu, dpa=%llu reverse_dpa=%llu, pos=%d reverse_pos=%d eiw=%u eig=%u\n",</div><div class='add'>+			       i, hpa, dpa, reverse_dpa, pos, reverse_pos, eiw,</div><div class='add'>+			       eig);</div><div class='add'>+</div><div class='add'>+			if (failures++ &gt; 10) {</div><div class='add'>+				pr_err("test random too many failures, stop\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	pr_info("..... test random: PASS %d FAIL %d\n", i - failures, failures);</div><div class='add'>+</div><div class='add'>+	if (failures)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct param_test {</div><div class='add'>+	u8 eiw;</div><div class='add'>+	u16 eig;</div><div class='add'>+	int pos;</div><div class='add'>+	bool expect; /* true: expect pass, false: expect fail */</div><div class='add'>+	const char *desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct param_test param_tests[] = {</div><div class='add'>+	{ 0x0, 0, 0, true, "1-way, min eig=0, pos=0" },</div><div class='add'>+	{ 0x0, 3, 0, true, "1-way, mid eig=3, pos=0" },</div><div class='add'>+	{ 0x0, 6, 0, true, "1-way, max eig=6, pos=0" },</div><div class='add'>+	{ 0x1, 0, 0, true, "2-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x1, 3, 1, true, "2-way, eig=3, max pos=1" },</div><div class='add'>+	{ 0x1, 6, 1, true, "2-way, eig=6, max pos=1" },</div><div class='add'>+	{ 0x2, 0, 0, true, "4-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x2, 3, 3, true, "4-way, eig=3, max pos=3" },</div><div class='add'>+	{ 0x2, 6, 3, true, "4-way, eig=6, max pos=3" },</div><div class='add'>+	{ 0x3, 0, 0, true, "8-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x3, 3, 7, true, "8-way, eig=3, max pos=7" },</div><div class='add'>+	{ 0x3, 6, 7, true, "8-way, eig=6, max pos=7" },</div><div class='add'>+	{ 0x4, 0, 0, true, "16-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x4, 3, 15, true, "16-way, eig=3, max pos=15" },</div><div class='add'>+	{ 0x4, 6, 15, true, "16-way, eig=6, max pos=15" },</div><div class='add'>+	{ 0x8, 0, 0, true, "3-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x8, 3, 2, true, "3-way, eig=3, max pos=2" },</div><div class='add'>+	{ 0x8, 6, 2, true, "3-way, eig=6, max pos=2" },</div><div class='add'>+	{ 0x9, 0, 0, true, "6-way, eig=0, pos=0" },</div><div class='add'>+	{ 0x9, 3, 5, true, "6-way, eig=3, max pos=5" },</div><div class='add'>+	{ 0x9, 6, 5, true, "6-way, eig=6, max pos=5" },</div><div class='add'>+	{ 0xA, 0, 0, true, "12-way, eig=0, pos=0" },</div><div class='add'>+	{ 0xA, 3, 11, true, "12-way, eig=3, max pos=11" },</div><div class='add'>+	{ 0xA, 6, 11, true, "12-way, eig=6, max pos=11" },</div><div class='add'>+	{ 0x5, 0, 0, false, "invalid eiw=5" },</div><div class='add'>+	{ 0x7, 0, 0, false, "invalid eiw=7" },</div><div class='add'>+	{ 0xB, 0, 0, false, "invalid eiw=0xB" },</div><div class='add'>+	{ 0xFF, 0, 0, false, "invalid eiw=0xFF" },</div><div class='add'>+	{ 0x1, 7, 0, false, "invalid eig=7 (out of range)" },</div><div class='add'>+	{ 0x2, 0x10, 0, false, "invalid eig=0x10" },</div><div class='add'>+	{ 0x3, 0xFFFF, 0, false, "invalid eig=0xFFFF" },</div><div class='add'>+	{ 0x1, 0, -1, false, "pos &lt; 0" },</div><div class='add'>+	{ 0x1, 0, 2, false, "2-way, pos=2 (&gt;= ways)" },</div><div class='add'>+	{ 0x2, 0, 4, false, "4-way, pos=4 (&gt;= ways)" },</div><div class='add'>+	{ 0x3, 0, 8, false, "8-way, pos=8 (&gt;= ways)" },</div><div class='add'>+	{ 0x4, 0, 16, false, "16-way, pos=16 (&gt;= ways)" },</div><div class='add'>+	{ 0x8, 0, 3, false, "3-way, pos=3 (&gt;= ways)" },</div><div class='add'>+	{ 0x9, 0, 6, false, "6-way, pos=6 (&gt;= ways)" },</div><div class='add'>+	{ 0xA, 0, 12, false, "12-way, pos=12 (&gt;= ways)" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int test_cxl_validate_translation_params(void)</div><div class='add'>+{</div><div class='add'>+	int i, rc, failures = 0;</div><div class='add'>+	bool valid;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(param_tests); i++) {</div><div class='add'>+		struct param_test *t = &amp;param_tests[i];</div><div class='add'>+</div><div class='add'>+		rc = cxl_validate_translation_params(t-&gt;eiw, t-&gt;eig, t-&gt;pos);</div><div class='add'>+		valid = (rc == 0);</div><div class='add'>+</div><div class='add'>+		if (valid != t-&gt;expect) {</div><div class='add'>+			pr_err("test params failed: %s\n", t-&gt;desc);</div><div class='add'>+			failures++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	pr_info("..... test params: PASS %d FAIL %d\n", i - failures, failures);</div><div class='add'>+</div><div class='add'>+	if (failures)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cxl_translate_init</div><div class='add'>+ *</div><div class='add'>+ * Run the internal validation tests when no params are passed.</div><div class='add'>+ * Otherwise, parse the parameters (test vectors), and kick off</div><div class='add'>+ * the translation test.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int __init cxl_translate_init(void)</div><div class='add'>+{</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	/* If no tables are passed, validate module params only */</div><div class='add'>+	if (table_num == 0) {</div><div class='add'>+		pr_info("Internal validation test start...\n");</div><div class='add'>+		rc = test_cxl_validate_translation_params();</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		rc = test_random_params();</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		pr_info("Internal validation test completed successfully\n");</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("CXL translate test module loaded with %d test vectors\n",</div><div class='add'>+		table_num);</div><div class='add'>+</div><div class='add'>+	rc = setup_xor_mapping();</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Process each test vector */</div><div class='add'>+	for (i = 0; i &lt; table_num; i++) {</div><div class='add'>+		u64 dpa, expect_spa;</div><div class='add'>+		int pos, math;</div><div class='add'>+		u8 r_eiw, hb_ways;</div><div class='add'>+		u16 r_eig;</div><div class='add'>+</div><div class='add'>+		pr_debug("Processing test vector %d: '%s'\n", i, table[i]);</div><div class='add'>+</div><div class='add'>+		/* Parse the test vector */</div><div class='add'>+		rc = parse_test_vector(table[i], &amp;dpa, &amp;pos, &amp;r_eiw, &amp;r_eig,</div><div class='add'>+				       &amp;hb_ways, &amp;math, &amp;expect_spa);</div><div class='add'>+		if (rc) {</div><div class='add'>+			pr_err("CXL Translate Test %d: FAIL\n"</div><div class='add'>+			       "    Failed to parse test vector '%s'\n",</div><div class='add'>+			       i, table[i]);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/* Run the translation test */</div><div class='add'>+		rc = run_translation_test(dpa, pos, r_eiw, r_eig, hb_ways, math,</div><div class='add'>+					  expect_spa);</div><div class='add'>+		if (rc) {</div><div class='add'>+			pr_err("CXL Translate Test %d: FAIL\n"</div><div class='add'>+			       "    dpa=%llu pos=%d r_eiw=%u r_eig=%u hb_ways=%u math=%s expect_spa=%llu\n",</div><div class='add'>+			       i, dpa, pos, r_eiw, r_eig, hb_ways,</div><div class='add'>+			       (math == XOR_MATH) ? "XOR" : "MODULO",</div><div class='add'>+			       expect_spa);</div><div class='add'>+		} else {</div><div class='add'>+			pr_info("CXL Translate Test %d: PASS\n", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(cximsd);</div><div class='add'>+	pr_info("CXL translate test completed\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit cxl_translate_exit(void)</div><div class='add'>+{</div><div class='add'>+	pr_info("CXL translate test module unloaded\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_param_array(table, charp, &amp;table_num, 0444);</div><div class='add'>+MODULE_PARM_DESC(table, "Test vectors as space-separated decimal strings");</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("cxl_test: cxl address translation test module");</div><div class='add'>+MODULE_IMPORT_NS("CXL");</div><div class='add'>+</div><div class='add'>+module_init(cxl_translate_init);</div><div class='add'>+module_exit(cxl_translate_exit);</div><div class='head'>diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c<br/>index d533481672b7..176dcde570cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mem.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/mem.c</a></div><div class='hunk'>@@ -250,22 +250,21 @@ static void mes_add_event(struct mock_event_store *mes,</div><div class='ctx'>  * Vary the number of events returned to simulate events occuring while the</div><div class='ctx'>  * logs are being read.</div><div class='ctx'>  */</div><div class='del'>-static int ret_limit = 0;</div><div class='add'>+static atomic_t event_counter = ATOMIC_INIT(0);</div><div class='ctx'> </div><div class='ctx'> static int mock_get_event(struct device *dev, struct cxl_mbox_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct cxl_get_event_payload *pl;</div><div class='ctx'> 	struct mock_event_log *log;</div><div class='del'>-	u16 nr_overflow;</div><div class='add'>+	int ret_limit;</div><div class='ctx'> 	u8 log_type;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;size_in != sizeof(log_type))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret_limit = (ret_limit + 1) % CXL_TEST_EVENT_RET_MAX;</div><div class='del'>-	if (!ret_limit)</div><div class='del'>-		ret_limit = 1;</div><div class='add'>+	/* Vary return limit from 1 to CXL_TEST_EVENT_RET_MAX */</div><div class='add'>+	ret_limit = (atomic_inc_return(&amp;event_counter) % CXL_TEST_EVENT_RET_MAX) + 1;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;size_out &lt; struct_size(pl, records, ret_limit))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -299,7 +298,7 @@ static int mock_get_event(struct device *dev, struct cxl_mbox_cmd *cmd)</div><div class='ctx'> 		u64 ns;</div><div class='ctx'> </div><div class='ctx'> 		pl-&gt;flags |= CXL_GET_EVENT_FLAG_OVERFLOW;</div><div class='del'>-		pl-&gt;overflow_err_count = cpu_to_le16(nr_overflow);</div><div class='add'>+		pl-&gt;overflow_err_count = cpu_to_le16(log-&gt;nr_overflow);</div><div class='ctx'> 		ns = ktime_get_real_ns();</div><div class='ctx'> 		ns -= 5000000000; /* 5s ago */</div><div class='ctx'> 		pl-&gt;first_overflow_timestamp = cpu_to_le64(ns);</div><div class='head'>diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c<br/>index 1989ae020df3..44bce80ef3ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/mock.c</a></div><div class='hunk'>@@ -10,12 +10,21 @@</div><div class='ctx'> #include &lt;cxlmem.h&gt;</div><div class='ctx'> #include &lt;cxlpci.h&gt;</div><div class='ctx'> #include "mock.h"</div><div class='add'>+#include "../exports.h"</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(mock);</div><div class='ctx'> </div><div class='add'>+static struct cxl_dport *</div><div class='add'>+redirect_devm_cxl_add_dport_by_dev(struct cxl_port *port,</div><div class='add'>+				   struct device *dport_dev);</div><div class='add'>+static int redirect_devm_cxl_switch_port_decoders_setup(struct cxl_port *port);</div><div class='add'>+</div><div class='ctx'> void register_cxl_mock_ops(struct cxl_mock_ops *ops)</div><div class='ctx'> {</div><div class='ctx'> 	list_add_rcu(&amp;ops-&gt;list, &amp;mock);</div><div class='add'>+	_devm_cxl_add_dport_by_dev = redirect_devm_cxl_add_dport_by_dev;</div><div class='add'>+	_devm_cxl_switch_port_decoders_setup =</div><div class='add'>+		redirect_devm_cxl_switch_port_decoders_setup;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(register_cxl_mock_ops);</div><div class='ctx'> </div><div class='hunk'>@@ -23,6 +32,9 @@ DEFINE_STATIC_SRCU(cxl_mock_srcu);</div><div class='ctx'> </div><div class='ctx'> void unregister_cxl_mock_ops(struct cxl_mock_ops *ops)</div><div class='ctx'> {</div><div class='add'>+	_devm_cxl_switch_port_decoders_setup =</div><div class='add'>+		__devm_cxl_switch_port_decoders_setup;</div><div class='add'>+	_devm_cxl_add_dport_by_dev = __devm_cxl_add_dport_by_dev;</div><div class='ctx'> 	list_del_rcu(&amp;ops-&gt;list);</div><div class='ctx'> 	synchronize_srcu(&amp;cxl_mock_srcu);</div><div class='ctx'> }</div><div class='hunk'>@@ -99,6 +111,26 @@ acpi_status __wrap_acpi_evaluate_integer(acpi_handle handle,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__wrap_acpi_evaluate_integer);</div><div class='ctx'> </div><div class='add'>+int __wrap_hmat_get_extended_linear_cache_size(struct resource *backing_res,</div><div class='add'>+					       int nid,</div><div class='add'>+					       resource_size_t *cache_size)</div><div class='add'>+{</div><div class='add'>+	int index, rc;</div><div class='add'>+	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='add'>+</div><div class='add'>+	if (ops)</div><div class='add'>+		rc = ops-&gt;hmat_get_extended_linear_cache_size(backing_res, nid,</div><div class='add'>+							      cache_size);</div><div class='add'>+	else</div><div class='add'>+		rc = hmat_get_extended_linear_cache_size(backing_res, nid,</div><div class='add'>+							 cache_size);</div><div class='add'>+</div><div class='add'>+	put_cxl_mock_ops(index);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__wrap_hmat_get_extended_linear_cache_size);</div><div class='add'>+</div><div class='ctx'> struct acpi_pci_root *__wrap_acpi_pci_find_root(acpi_handle handle)</div><div class='ctx'> {</div><div class='ctx'> 	int index;</div><div class='hunk'>@@ -131,70 +163,34 @@ __wrap_nvdimm_bus_register(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__wrap_nvdimm_bus_register);</div><div class='ctx'> </div><div class='del'>-struct cxl_hdm *__wrap_devm_cxl_setup_hdm(struct cxl_port *port,</div><div class='del'>-					  struct cxl_endpoint_dvsec_info *info)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-	struct cxl_hdm *cxlhdm;</div><div class='del'>-	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='del'>-</div><div class='del'>-	if (ops &amp;&amp; ops-&gt;is_mock_port(port-&gt;uport_dev))</div><div class='del'>-		cxlhdm = ops-&gt;devm_cxl_setup_hdm(port, info);</div><div class='del'>-	else</div><div class='del'>-		cxlhdm = devm_cxl_setup_hdm(port, info);</div><div class='del'>-	put_cxl_mock_ops(index);</div><div class='del'>-</div><div class='del'>-	return cxlhdm;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_setup_hdm, "CXL");</div><div class='del'>-</div><div class='del'>-int __wrap_devm_cxl_add_passthrough_decoder(struct cxl_port *port)</div><div class='add'>+int redirect_devm_cxl_switch_port_decoders_setup(struct cxl_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	int rc, index;</div><div class='ctx'> 	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='ctx'> </div><div class='ctx'> 	if (ops &amp;&amp; ops-&gt;is_mock_port(port-&gt;uport_dev))</div><div class='del'>-		rc = ops-&gt;devm_cxl_add_passthrough_decoder(port);</div><div class='add'>+		rc = ops-&gt;devm_cxl_switch_port_decoders_setup(port);</div><div class='ctx'> 	else</div><div class='del'>-		rc = devm_cxl_add_passthrough_decoder(port);</div><div class='add'>+		rc = __devm_cxl_switch_port_decoders_setup(port);</div><div class='ctx'> 	put_cxl_mock_ops(index);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_add_passthrough_decoder, "CXL");</div><div class='ctx'> </div><div class='del'>-int __wrap_devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,</div><div class='del'>-				       struct cxl_endpoint_dvsec_info *info)</div><div class='add'>+int __wrap_devm_cxl_endpoint_decoders_setup(struct cxl_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	int rc, index;</div><div class='del'>-	struct cxl_port *port = cxlhdm-&gt;port;</div><div class='ctx'> 	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='ctx'> </div><div class='ctx'> 	if (ops &amp;&amp; ops-&gt;is_mock_port(port-&gt;uport_dev))</div><div class='del'>-		rc = ops-&gt;devm_cxl_enumerate_decoders(cxlhdm, info);</div><div class='add'>+		rc = ops-&gt;devm_cxl_endpoint_decoders_setup(port);</div><div class='ctx'> 	else</div><div class='del'>-		rc = devm_cxl_enumerate_decoders(cxlhdm, info);</div><div class='add'>+		rc = devm_cxl_endpoint_decoders_setup(port);</div><div class='ctx'> 	put_cxl_mock_ops(index);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_enumerate_decoders, "CXL");</div><div class='del'>-</div><div class='del'>-int __wrap_devm_cxl_port_enumerate_dports(struct cxl_port *port)</div><div class='del'>-{</div><div class='del'>-	int rc, index;</div><div class='del'>-	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='del'>-</div><div class='del'>-	if (ops &amp;&amp; ops-&gt;is_mock_port(port-&gt;uport_dev))</div><div class='del'>-		rc = ops-&gt;devm_cxl_port_enumerate_dports(port);</div><div class='del'>-	else</div><div class='del'>-		rc = devm_cxl_port_enumerate_dports(port);</div><div class='del'>-	put_cxl_mock_ops(index);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_port_enumerate_dports, "CXL");</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_endpoint_decoders_setup, "CXL");</div><div class='ctx'> </div><div class='ctx'> int __wrap_cxl_await_media_ready(struct cxl_dev_state *cxlds)</div><div class='ctx'> {</div><div class='hunk'>@@ -211,39 +207,6 @@ int __wrap_cxl_await_media_ready(struct cxl_dev_state *cxlds)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(__wrap_cxl_await_media_ready, "CXL");</div><div class='ctx'> </div><div class='del'>-int __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds,</div><div class='del'>-			       struct cxl_hdm *cxlhdm,</div><div class='del'>-			       struct cxl_endpoint_dvsec_info *info)</div><div class='del'>-{</div><div class='del'>-	int rc = 0, index;</div><div class='del'>-	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='del'>-</div><div class='del'>-	if (ops &amp;&amp; ops-&gt;is_mock_dev(cxlds-&gt;dev))</div><div class='del'>-		rc = 0;</div><div class='del'>-	else</div><div class='del'>-		rc = cxl_hdm_decode_init(cxlds, cxlhdm, info);</div><div class='del'>-	put_cxl_mock_ops(index);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_cxl_hdm_decode_init, "CXL");</div><div class='del'>-</div><div class='del'>-int __wrap_cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,</div><div class='del'>-			       struct cxl_endpoint_dvsec_info *info)</div><div class='del'>-{</div><div class='del'>-	int rc = 0, index;</div><div class='del'>-	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='del'>-</div><div class='del'>-	if (ops &amp;&amp; ops-&gt;is_mock_dev(cxlds-&gt;dev))</div><div class='del'>-		rc = 0;</div><div class='del'>-	else</div><div class='del'>-		rc = cxl_dvsec_rr_decode(cxlds, info);</div><div class='del'>-	put_cxl_mock_ops(index);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_cxl_dvsec_rr_decode, "CXL");</div><div class='del'>-</div><div class='ctx'> struct cxl_dport *__wrap_devm_cxl_add_rch_dport(struct cxl_port *port,</div><div class='ctx'> 						struct device *dport_dev,</div><div class='ctx'> 						int port_id,</div><div class='hunk'>@@ -268,23 +231,6 @@ struct cxl_dport *__wrap_devm_cxl_add_rch_dport(struct cxl_port *port,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_add_rch_dport, "CXL");</div><div class='ctx'> </div><div class='del'>-resource_size_t __wrap_cxl_rcd_component_reg_phys(struct device *dev,</div><div class='del'>-						  struct cxl_dport *dport)</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-	resource_size_t component_reg_phys;</div><div class='del'>-	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='del'>-</div><div class='del'>-	if (ops &amp;&amp; ops-&gt;is_mock_port(dev))</div><div class='del'>-		component_reg_phys = CXL_RESOURCE_NONE;</div><div class='del'>-	else</div><div class='del'>-		component_reg_phys = cxl_rcd_component_reg_phys(dev, dport);</div><div class='del'>-	put_cxl_mock_ops(index);</div><div class='del'>-</div><div class='del'>-	return component_reg_phys;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(__wrap_cxl_rcd_component_reg_phys, "CXL");</div><div class='del'>-</div><div class='ctx'> void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	int index;</div><div class='hunk'>@@ -311,6 +257,22 @@ void __wrap_cxl_dport_init_ras_reporting(struct cxl_dport *dport, struct device</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(__wrap_cxl_dport_init_ras_reporting, "CXL");</div><div class='ctx'> </div><div class='add'>+struct cxl_dport *redirect_devm_cxl_add_dport_by_dev(struct cxl_port *port,</div><div class='add'>+						     struct device *dport_dev)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	struct cxl_mock_ops *ops = get_cxl_mock_ops(&amp;index);</div><div class='add'>+	struct cxl_dport *dport;</div><div class='add'>+</div><div class='add'>+	if (ops &amp;&amp; ops-&gt;is_mock_port(port-&gt;uport_dev))</div><div class='add'>+		dport = ops-&gt;devm_cxl_add_dport_by_dev(port, dport_dev);</div><div class='add'>+	else</div><div class='add'>+		dport = __devm_cxl_add_dport_by_dev(port, dport_dev);</div><div class='add'>+	put_cxl_mock_ops(index);</div><div class='add'>+</div><div class='add'>+	return dport;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_DESCRIPTION("cxl_test: emulation module");</div><div class='ctx'> MODULE_IMPORT_NS("ACPI");</div><div class='head'>diff --git a/tools/testing/cxl/test/mock.h b/tools/testing/cxl/test/mock.h<br/>index d1b0271d2822..2684b89c8aa2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mock.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/cxl/test/mock.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/cxl/test/mock.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/cxl/test/mock.h</a></div><div class='hunk'>@@ -19,13 +19,14 @@ struct cxl_mock_ops {</div><div class='ctx'> 	bool (*is_mock_bus)(struct pci_bus *bus);</div><div class='ctx'> 	bool (*is_mock_port)(struct device *dev);</div><div class='ctx'> 	bool (*is_mock_dev)(struct device *dev);</div><div class='del'>-	int (*devm_cxl_port_enumerate_dports)(struct cxl_port *port);</div><div class='del'>-	struct cxl_hdm *(*devm_cxl_setup_hdm)(</div><div class='del'>-		struct cxl_port *port, struct cxl_endpoint_dvsec_info *info);</div><div class='del'>-	int (*devm_cxl_add_passthrough_decoder)(struct cxl_port *port);</div><div class='del'>-	int (*devm_cxl_enumerate_decoders)(</div><div class='del'>-		struct cxl_hdm *hdm, struct cxl_endpoint_dvsec_info *info);</div><div class='add'>+	int (*devm_cxl_switch_port_decoders_setup)(struct cxl_port *port);</div><div class='add'>+	int (*devm_cxl_endpoint_decoders_setup)(struct cxl_port *port);</div><div class='ctx'> 	void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);</div><div class='add'>+	struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,</div><div class='add'>+						       struct device *dport_dev);</div><div class='add'>+	int (*hmat_get_extended_linear_cache_size)(struct resource *backing_res,</div><div class='add'>+						   int nid,</div><div class='add'>+						   resource_size_t *cache_size);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void register_cxl_mock_ops(struct cxl_mock_ops *ops);</div><div class='head'>diff --git a/tools/testing/ktest/config-bisect.pl b/tools/testing/ktest/config-bisect.pl<br/>index 6fd864935319..bee7cb34a289 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/ktest/config-bisect.pl?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/ktest/config-bisect.pl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/ktest/config-bisect.pl?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/ktest/config-bisect.pl</a></div><div class='hunk'>@@ -741,9 +741,9 @@ if ($start) {</div><div class='ctx'> 	die "Can not find file $bad\n";</div><div class='ctx'>     }</div><div class='ctx'>     if ($val eq "good") {</div><div class='del'>-	run_command "cp $output_config $good" or die "failed to copy $config to $good\n";</div><div class='add'>+	run_command "cp $output_config $good" or die "failed to copy $output_config to $good\n";</div><div class='ctx'>     } elsif ($val eq "bad") {</div><div class='del'>-	run_command "cp $output_config $bad" or die "failed to copy $config to $bad\n";</div><div class='add'>+	run_command "cp $output_config $bad" or die "failed to copy $output_config to $bad\n";</div><div class='ctx'>     }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/kunit/configs/arch_uml.config b/tools/testing/kunit/configs/arch_uml.config<br/>index 54ad8972681a..28edf816aa70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/configs/arch_uml.config?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/configs/arch_uml.config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/configs/arch_uml.config?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/configs/arch_uml.config</a></div><div class='hunk'>@@ -1,8 +1,7 @@</div><div class='ctx'> # Config options which are added to UML builds by default</div><div class='ctx'> </div><div class='del'>-# Enable virtio/pci, as a lot of tests require it.</div><div class='del'>-CONFIG_VIRTIO_UML=y</div><div class='del'>-CONFIG_UML_PCI_OVER_VIRTIO=y</div><div class='add'>+# Enable pci, as a lot of tests require it.</div><div class='add'>+CONFIG_KUNIT_UML_PCI=y</div><div class='ctx'> </div><div class='ctx'> # Enable FORTIFY_SOURCE for wider checking.</div><div class='ctx'> CONFIG_FORTIFY_SOURCE=y</div><div class='head'>diff --git a/tools/testing/kunit/kunit.py b/tools/testing/kunit/kunit.py<br/>index 7f9ae55fd6d5..cd99c1956331 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/kunit.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/kunit.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/kunit.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/kunit.py</a></div><div class='hunk'>@@ -228,7 +228,7 @@ def parse_tests(request: KunitParseRequest, metadata: kunit_json.Metadata, input</div><div class='ctx'> 		fake_test.counts.passed = 1</div><div class='ctx'> </div><div class='ctx'> 		output: Iterable[str] = input_data</div><div class='del'>-		if request.raw_output == 'all':</div><div class='add'>+		if request.raw_output == 'all' or request.raw_output == 'full':</div><div class='ctx'> 			pass</div><div class='ctx'> 		elif request.raw_output == 'kunit':</div><div class='ctx'> 			output = kunit_parser.extract_tap_lines(output)</div><div class='hunk'>@@ -425,7 +425,7 @@ def add_parse_opts(parser: argparse.ArgumentParser) -&gt; None:</div><div class='ctx'> 	parser.add_argument('--raw_output', help='If set don\'t parse output from kernel. '</div><div class='ctx'> 			    'By default, filters to just KUnit output. Use '</div><div class='ctx'> 			    '--raw_output=all to show everything',</div><div class='del'>-			     type=str, nargs='?', const='all', default=None, choices=['all', 'kunit'])</div><div class='add'>+			     type=str, nargs='?', const='all', default=None, choices=['all', 'full', 'kunit'])</div><div class='ctx'> 	parser.add_argument('--json',</div><div class='ctx'> 			    nargs='?',</div><div class='ctx'> 			    help='Prints parsed test results as JSON to stdout or a file if '</div><div class='head'>diff --git a/tools/testing/kunit/kunit_parser.py b/tools/testing/kunit/kunit_parser.py<br/>index c176487356e6..333cd3a4a56b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/kunit_parser.py?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/kunit_parser.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/kunit_parser.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/kunit_parser.py</a></div><div class='hunk'>@@ -352,9 +352,9 @@ def parse_test_plan(lines: LineStream, test: Test) -&gt; bool:</div><div class='ctx'> 	lines.pop()</div><div class='ctx'> 	return True</div><div class='ctx'> </div><div class='del'>-TEST_RESULT = re.compile(r'^\s*(ok|not ok) ([0-9]+) (- )?([^#]*)( # .*)?$')</div><div class='add'>+TEST_RESULT = re.compile(r'^\s*(ok|not ok) ([0-9]+) ?(- )?([^#]*)( # .*)?$')</div><div class='ctx'> </div><div class='del'>-TEST_RESULT_SKIP = re.compile(r'^\s*(ok|not ok) ([0-9]+) (- )?(.*) # SKIP(.*)$')</div><div class='add'>+TEST_RESULT_SKIP = re.compile(r'^\s*(ok|not ok) ([0-9]+) ?(- )?(.*) # SKIP ?(.*)$')</div><div class='ctx'> </div><div class='ctx'> def peek_test_name_match(lines: LineStream, test: Test) -&gt; bool:</div><div class='ctx'> 	"""</div><div class='hunk'>@@ -379,6 +379,8 @@ def peek_test_name_match(lines: LineStream, test: Test) -&gt; bool:</div><div class='ctx'> 	if not match:</div><div class='ctx'> 		return False</div><div class='ctx'> 	name = match.group(4)</div><div class='add'>+	if not name:</div><div class='add'>+		return False</div><div class='ctx'> 	return name == test.name</div><div class='ctx'> </div><div class='ctx'> def parse_test_result(lines: LineStream, test: Test,</div><div class='hunk'>@@ -416,7 +418,7 @@ def parse_test_result(lines: LineStream, test: Test,</div><div class='ctx'> </div><div class='ctx'> 	# Set name of test object</div><div class='ctx'> 	if skip_match:</div><div class='del'>-		test.name = skip_match.group(4)</div><div class='add'>+		test.name = skip_match.group(4) or skip_match.group(5)</div><div class='ctx'> 	else:</div><div class='ctx'> 		test.name = match.group(4)</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/kunit/qemu_configs/mips.py b/tools/testing/kunit/qemu_configs/mips.py<br/>new file mode 100644<br/>index 000000000000..8899ac157b30<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/qemu_configs/mips.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/qemu_configs/mips.py</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+from ..qemu_config import QemuArchParams</div><div class='add'>+</div><div class='add'>+QEMU_ARCH = QemuArchParams(linux_arch='mips',</div><div class='add'>+                           kconfig='''</div><div class='add'>+CONFIG_32BIT=y</div><div class='add'>+CONFIG_CPU_BIG_ENDIAN=y</div><div class='add'>+CONFIG_MIPS_MALTA=y</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_POWER_RESET=y</div><div class='add'>+CONFIG_POWER_RESET_SYSCON=y</div><div class='add'>+''',</div><div class='add'>+                           qemu_arch='mips',</div><div class='add'>+                           kernel_path='vmlinuz',</div><div class='add'>+                           kernel_command_line='console=ttyS0',</div><div class='add'>+                           extra_qemu_params=['-M', 'malta'])</div><div class='head'>diff --git a/tools/testing/kunit/qemu_configs/mips64.py b/tools/testing/kunit/qemu_configs/mips64.py<br/>new file mode 100644<br/>index 000000000000..1478aed05b94<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/qemu_configs/mips64.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/qemu_configs/mips64.py</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+from ..qemu_config import QemuArchParams</div><div class='add'>+</div><div class='add'>+QEMU_ARCH = QemuArchParams(linux_arch='mips',</div><div class='add'>+                           kconfig='''</div><div class='add'>+CONFIG_CPU_MIPS64_R2=y</div><div class='add'>+CONFIG_64BIT=y</div><div class='add'>+CONFIG_CPU_BIG_ENDIAN=y</div><div class='add'>+CONFIG_MIPS_MALTA=y</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_POWER_RESET=y</div><div class='add'>+CONFIG_POWER_RESET_SYSCON=y</div><div class='add'>+''',</div><div class='add'>+                           qemu_arch='mips64',</div><div class='add'>+                           kernel_path='vmlinuz',</div><div class='add'>+                           kernel_command_line='console=ttyS0',</div><div class='add'>+                           extra_qemu_params=['-M', 'malta', '-cpu', '5KEc'])</div><div class='head'>diff --git a/tools/testing/kunit/qemu_configs/mips64el.py b/tools/testing/kunit/qemu_configs/mips64el.py<br/>new file mode 100644<br/>index 000000000000..300c711d7a82<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/qemu_configs/mips64el.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/qemu_configs/mips64el.py</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+from ..qemu_config import QemuArchParams</div><div class='add'>+</div><div class='add'>+QEMU_ARCH = QemuArchParams(linux_arch='mips',</div><div class='add'>+                           kconfig='''</div><div class='add'>+CONFIG_CPU_MIPS64_R2=y</div><div class='add'>+CONFIG_64BIT=y</div><div class='add'>+CONFIG_CPU_LITTLE_ENDIAN=y</div><div class='add'>+CONFIG_MIPS_MALTA=y</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_POWER_RESET=y</div><div class='add'>+CONFIG_POWER_RESET_SYSCON=y</div><div class='add'>+''',</div><div class='add'>+                           qemu_arch='mips64el',</div><div class='add'>+                           kernel_path='vmlinuz',</div><div class='add'>+                           kernel_command_line='console=ttyS0',</div><div class='add'>+                           extra_qemu_params=['-M', 'malta', '-cpu', '5KEc'])</div><div class='head'>diff --git a/tools/testing/kunit/qemu_configs/mipsel.py b/tools/testing/kunit/qemu_configs/mipsel.py<br/>new file mode 100644<br/>index 000000000000..3d3543315b45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/qemu_configs/mipsel.py?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/qemu_configs/mipsel.py</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+from ..qemu_config import QemuArchParams</div><div class='add'>+</div><div class='add'>+QEMU_ARCH = QemuArchParams(linux_arch='mips',</div><div class='add'>+                           kconfig='''</div><div class='add'>+CONFIG_32BIT=y</div><div class='add'>+CONFIG_CPU_LITTLE_ENDIAN=y</div><div class='add'>+CONFIG_MIPS_MALTA=y</div><div class='add'>+CONFIG_SERIAL_8250=y</div><div class='add'>+CONFIG_SERIAL_8250_CONSOLE=y</div><div class='add'>+CONFIG_POWER_RESET=y</div><div class='add'>+CONFIG_POWER_RESET_SYSCON=y</div><div class='add'>+''',</div><div class='add'>+                           qemu_arch='mipsel',</div><div class='add'>+                           kernel_path='vmlinuz',</div><div class='add'>+                           kernel_command_line='console=ttyS0',</div><div class='add'>+                           extra_qemu_params=['-M', 'malta'])</div><div class='head'>diff --git a/tools/testing/kunit/test_data/test_is_test_passed-kselftest.log b/tools/testing/kunit/test_data/test_is_test_passed-kselftest.log<br/>index 65d3f27feaf2..30d9ef18bcec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/test_data/test_is_test_passed-kselftest.log?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/kunit/test_data/test_is_test_passed-kselftest.log</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/kunit/test_data/test_is_test_passed-kselftest.log?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/kunit/test_data/test_is_test_passed-kselftest.log</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> TAP version 13</div><div class='del'>-1..2</div><div class='add'>+1..3</div><div class='ctx'> # selftests: membarrier: membarrier_test_single_thread</div><div class='ctx'> # TAP version 13</div><div class='ctx'> # 1..2</div><div class='hunk'>@@ -12,3 +12,4 @@ ok 1 selftests: membarrier: membarrier_test_single_thread</div><div class='ctx'> # ok 1 sys_membarrier available</div><div class='ctx'> # ok 2 sys membarrier invalid command test: command = -1, flags = 0, errno = 22. Failed as expected</div><div class='ctx'> ok 2 selftests: membarrier: membarrier_test_multi_thread</div><div class='add'>+ok 3 # SKIP selftests: membarrier: membarrier_test_multi_thread</div><div class='head'>diff --git a/tools/testing/nvdimm/test/ndtest.c b/tools/testing/nvdimm/test/ndtest.c<br/>index 68a064ce598c..8e3b6be53839 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/nvdimm/test/ndtest.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/nvdimm/test/ndtest.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/nvdimm/test/ndtest.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/nvdimm/test/ndtest.c</a></div><div class='hunk'>@@ -850,11 +850,22 @@ static int ndtest_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;dcr_dma = devm_kcalloc(&amp;p-&gt;pdev.dev, NUM_DCR,</div><div class='ctx'> 				 sizeof(dma_addr_t), GFP_KERNEL);</div><div class='add'>+	if (!p-&gt;dcr_dma) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> 	p-&gt;label_dma = devm_kcalloc(&amp;p-&gt;pdev.dev, NUM_DCR,</div><div class='ctx'> 				   sizeof(dma_addr_t), GFP_KERNEL);</div><div class='add'>+	if (!p-&gt;label_dma) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> 	p-&gt;dimm_dma = devm_kcalloc(&amp;p-&gt;pdev.dev, NUM_DCR,</div><div class='ctx'> 				  sizeof(dma_addr_t), GFP_KERNEL);</div><div class='del'>-</div><div class='add'>+	if (!p-&gt;dimm_dma) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> 	rc = ndtest_nvdimm_init(p);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err;</div><div class='head'>diff --git a/tools/testing/nvdimm/test/nfit.c b/tools/testing/nvdimm/test/nfit.c<br/>index cfd4378e2129..f87e9f251d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/nvdimm/test/nfit.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/nvdimm/test/nfit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/nvdimm/test/nfit.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/nvdimm/test/nfit.c</a></div><div class='hunk'>@@ -670,6 +670,7 @@ static int nfit_test_search_spa(struct nvdimm_bus *bus,</div><div class='ctx'> 		.addr = spa-&gt;spa,</div><div class='ctx'> 		.region = NULL,</div><div class='ctx'> 	};</div><div class='add'>+	struct nfit_mem *nfit_mem;</div><div class='ctx'> 	u64 dpa;</div><div class='ctx'> </div><div class='ctx'> 	ret = device_for_each_child(&amp;bus-&gt;dev, &amp;ctx,</div><div class='hunk'>@@ -687,8 +688,12 @@ static int nfit_test_search_spa(struct nvdimm_bus *bus,</div><div class='ctx'> 	 */</div><div class='ctx'> 	nd_mapping = &amp;nd_region-&gt;mapping[nd_region-&gt;ndr_mappings - 1];</div><div class='ctx'> 	nvdimm = nd_mapping-&gt;nvdimm;</div><div class='add'>+	nfit_mem = nvdimm_provider_data(nvdimm);</div><div class='add'>+	if (!nfit_mem)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	spa-&gt;devices[0].nfit_device_handle = handle[nvdimm-&gt;id];</div><div class='add'>+	spa-&gt;devices[0].nfit_device_handle =</div><div class='add'>+		__to_nfit_memdev(nfit_mem)-&gt;device_handle;</div><div class='ctx'> 	spa-&gt;num_nvdimms = 1;</div><div class='ctx'> 	spa-&gt;devices[0].dpa = dpa;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/radix-tree/idr-test.c b/tools/testing/radix-tree/idr-test.c<br/>index 84b8c3c92c79..2f830ff8396c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/radix-tree/idr-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/radix-tree/idr-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/radix-tree/idr-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/radix-tree/idr-test.c</a></div><div class='hunk'>@@ -499,19 +499,17 @@ void ida_check_random(void)</div><div class='ctx'> 		goto repeat;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ida_simple_get_remove_test(void)</div><div class='add'>+void ida_alloc_free_test(void)</div><div class='ctx'> {</div><div class='ctx'> 	DEFINE_IDA(ida);</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 10000; i++) {</div><div class='del'>-		assert(ida_simple_get(&amp;ida, 0, 20000, GFP_KERNEL) == i);</div><div class='del'>-	}</div><div class='del'>-	assert(ida_simple_get(&amp;ida, 5, 30, GFP_KERNEL) &lt; 0);</div><div class='add'>+	for (i = 0; i &lt; 10000; i++)</div><div class='add'>+		assert(ida_alloc_max(&amp;ida, 20000, GFP_KERNEL) == i);</div><div class='add'>+	assert(ida_alloc_range(&amp;ida, 5, 30, GFP_KERNEL) &lt; 0);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 10000; i++) {</div><div class='del'>-		ida_simple_remove(&amp;ida, i);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; 10000; i++)</div><div class='add'>+		ida_free(&amp;ida, i);</div><div class='ctx'> 	assert(ida_is_empty(&amp;ida));</div><div class='ctx'> </div><div class='ctx'> 	ida_destroy(&amp;ida);</div><div class='hunk'>@@ -524,7 +522,7 @@ void user_ida_checks(void)</div><div class='ctx'> 	ida_check_nomem();</div><div class='ctx'> 	ida_check_conv_user();</div><div class='ctx'> 	ida_check_random();</div><div class='del'>-	ida_simple_get_remove_test();</div><div class='add'>+	ida_alloc_free_test();</div><div class='ctx'> </div><div class='ctx'> 	radix_tree_cpu_dead(1);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/radix-tree/maple.c b/tools/testing/radix-tree/maple.c<br/>index 172700fb7784..5c1b18e3ed21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/radix-tree/maple.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/radix-tree/maple.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/radix-tree/maple.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/radix-tree/maple.c</a></div><div class='hunk'>@@ -8,14 +8,6 @@</div><div class='ctx'>  * difficult to handle in kernel tests.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define CONFIG_DEBUG_MAPLE_TREE</div><div class='del'>-#define CONFIG_MAPLE_SEARCH</div><div class='del'>-#define MAPLE_32BIT (MAPLE_NODE_SLOTS &gt; 31)</div><div class='del'>-#include "test.h"</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-#include &lt;time.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='ctx'> #define module_init(x)</div><div class='ctx'> #define module_exit(x)</div><div class='ctx'> #define MODULE_AUTHOR(x)</div><div class='hunk'>@@ -23,7 +15,9 @@</div><div class='ctx'> #define MODULE_LICENSE(x)</div><div class='ctx'> #define dump_stack()	assert(0)</div><div class='ctx'> </div><div class='del'>-#include "../../../lib/maple_tree.c"</div><div class='add'>+#include "test.h"</div><div class='add'>+</div><div class='add'>+#include "../shared/maple-shim.c"</div><div class='ctx'> #include "../../../lib/test_maple_tree.c"</div><div class='ctx'> </div><div class='ctx'> #define RCU_RANGE_COUNT 1000</div><div class='hunk'>@@ -63,430 +57,6 @@ struct rcu_reader_struct {</div><div class='ctx'> 	struct rcu_test_struct2 *test;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int get_alloc_node_count(struct ma_state *mas)</div><div class='del'>-{</div><div class='del'>-	int count = 1;</div><div class='del'>-	struct maple_alloc *node = mas-&gt;alloc;</div><div class='del'>-</div><div class='del'>-	if (!node || ((unsigned long)node &amp; 0x1))</div><div class='del'>-		return 0;</div><div class='del'>-	while (node-&gt;node_count) {</div><div class='del'>-		count += node-&gt;node_count;</div><div class='del'>-		node = node-&gt;slot[0];</div><div class='del'>-	}</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void check_mas_alloc_node_count(struct ma_state *mas)</div><div class='del'>-{</div><div class='del'>-	mas_node_count_gfp(mas, MAPLE_ALLOC_SLOTS + 1, GFP_KERNEL);</div><div class='del'>-	mas_node_count_gfp(mas, MAPLE_ALLOC_SLOTS + 3, GFP_KERNEL);</div><div class='del'>-	MT_BUG_ON(mas-&gt;tree, get_alloc_node_count(mas) != mas-&gt;alloc-&gt;total);</div><div class='del'>-	mas_destroy(mas);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * check_new_node() - Check the creation of new nodes and error path</div><div class='del'>- * verification.</div><div class='del'>- */</div><div class='del'>-static noinline void __init check_new_node(struct maple_tree *mt)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	struct maple_node *mn, *mn2, *mn3;</div><div class='del'>-	struct maple_alloc *smn;</div><div class='del'>-	struct maple_node *nodes[100];</div><div class='del'>-	int i, j, total;</div><div class='del'>-</div><div class='del'>-	MA_STATE(mas, mt, 0, 0);</div><div class='del'>-</div><div class='del'>-	check_mas_alloc_node_count(&amp;mas);</div><div class='del'>-</div><div class='del'>-	/* Try allocating 3 nodes */</div><div class='del'>-	mtree_lock(mt);</div><div class='del'>-	mt_set_non_kernel(0);</div><div class='del'>-	/* request 3 nodes to be allocated. */</div><div class='del'>-	mas_node_count(&amp;mas, 3);</div><div class='del'>-	/* Allocation request of 3. */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 3);</div><div class='del'>-	/* Allocate failed. */</div><div class='del'>-	MT_BUG_ON(mt, mas.node != MA_ERROR(-ENOMEM));</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 3);</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;slot[0] == NULL);</div><div class='del'>-	mas_push_node(&amp;mas, mn);</div><div class='del'>-	mas_reset(&amp;mas);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-	mtree_unlock(mt);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Try allocating 1 node, then 2 more */</div><div class='del'>-	mtree_lock(mt);</div><div class='del'>-	/* Set allocation request to 1. */</div><div class='del'>-	mas_set_alloc_req(&amp;mas, 1);</div><div class='del'>-	/* Check Allocation request of 1. */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 1);</div><div class='del'>-	mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-	/* Validate allocation request. */</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	/* Eat the requested node. */</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mn-&gt;slot[0] != NULL);</div><div class='del'>-	MT_BUG_ON(mt, mn-&gt;slot[1] != NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-</div><div class='del'>-	mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-	ma_free_rcu(mn);</div><div class='del'>-	mas.status = ma_start;</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-	/* Allocate 3 nodes, will fail. */</div><div class='del'>-	mas_node_count(&amp;mas, 3);</div><div class='del'>-	/* Drop the lock and allocate 3 nodes. */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL);</div><div class='del'>-	/* Ensure 3 are allocated. */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 3);</div><div class='del'>-	/* Allocation request of 0. */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 0);</div><div class='del'>-</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;slot[0] == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;slot[1] == NULL);</div><div class='del'>-	/* Ensure we counted 3. */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 3);</div><div class='del'>-	/* Free. */</div><div class='del'>-	mas_reset(&amp;mas);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	/* Set allocation request to 1. */</div><div class='del'>-	mas_set_alloc_req(&amp;mas, 1);</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 1);</div><div class='del'>-	mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-	/* Validate allocation request. */</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 1);</div><div class='del'>-	/* Check the node is only one node. */</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-	MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mn-&gt;slot[0] != NULL);</div><div class='del'>-	MT_BUG_ON(mt, mn-&gt;slot[1] != NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-	mas_push_node(&amp;mas, mn);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 1);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count);</div><div class='del'>-</div><div class='del'>-	mas_set_alloc_req(&amp;mas, 2); /* request 2 more. */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 2);</div><div class='del'>-	mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 3);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;slot[0] == NULL);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;slot[1] == NULL);</div><div class='del'>-	for (i = 2; i &gt;= 0; i--) {</div><div class='del'>-		mn = mas_pop_node(&amp;mas);</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != i);</div><div class='del'>-		MT_BUG_ON(mt, !mn);</div><div class='del'>-		MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	total = 64;</div><div class='del'>-	mas_set_alloc_req(&amp;mas, total); /* request 2 more. */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != total);</div><div class='del'>-	mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	for (i = total; i &gt; 0; i--) {</div><div class='del'>-		unsigned int e = 0; /* expected node_count */</div><div class='del'>-</div><div class='del'>-		if (!MAPLE_32BIT) {</div><div class='del'>-			if (i &gt;= 35)</div><div class='del'>-				e = i - 34;</div><div class='del'>-			else if (i &gt;= 5)</div><div class='del'>-				e = i - 4;</div><div class='del'>-			else if (i &gt;= 2)</div><div class='del'>-				e = i - 1;</div><div class='del'>-		} else {</div><div class='del'>-			if (i &gt;= 4)</div><div class='del'>-				e = i - 3;</div><div class='del'>-			else if (i &gt;= 1)</div><div class='del'>-				e = i - 1;</div><div class='del'>-			else</div><div class='del'>-				e = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		MT_BUG_ON(mt, mas.alloc-&gt;node_count != e);</div><div class='del'>-		mn = mas_pop_node(&amp;mas);</div><div class='del'>-		MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - 1);</div><div class='del'>-		MT_BUG_ON(mt, !mn);</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	total = 100;</div><div class='del'>-	for (i = 1; i &lt; total; i++) {</div><div class='del'>-		mas_set_alloc_req(&amp;mas, i);</div><div class='del'>-		mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-		MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-		for (j = i; j &gt; 0; j--) {</div><div class='del'>-			mn = mas_pop_node(&amp;mas);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != j - 1);</div><div class='del'>-			MT_BUG_ON(mt, !mn);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			mas_push_node(&amp;mas, mn);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != j);</div><div class='del'>-			mn = mas_pop_node(&amp;mas);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != j - 1);</div><div class='del'>-			mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-			ma_free_rcu(mn);</div><div class='del'>-		}</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-</div><div class='del'>-		mas_set_alloc_req(&amp;mas, i);</div><div class='del'>-		mas_set_err(&amp;mas, -ENOMEM);</div><div class='del'>-		MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-		for (j = 0; j &lt;= i/2; j++) {</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - j);</div><div class='del'>-			nodes[j] = mas_pop_node(&amp;mas);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - j - 1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		while (j) {</div><div class='del'>-			j--;</div><div class='del'>-			mas_push_node(&amp;mas, nodes[j]);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - j);</div><div class='del'>-		}</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != i);</div><div class='del'>-		for (j = 0; j &lt;= i/2; j++) {</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - j);</div><div class='del'>-			mn = mas_pop_node(&amp;mas);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-			ma_free_rcu(mn);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas) != i - j - 1);</div><div class='del'>-		}</div><div class='del'>-		mas_reset(&amp;mas);</div><div class='del'>-		MT_BUG_ON(mt, mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set allocation request. */</div><div class='del'>-	total = 500;</div><div class='del'>-	mas_node_count(&amp;mas, total);</div><div class='del'>-	/* Drop the lock and allocate the nodes. */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL);</div><div class='del'>-	MT_BUG_ON(mt, !mas.alloc);</div><div class='del'>-	i = 1;</div><div class='del'>-	smn = mas.alloc;</div><div class='del'>-	while (i &lt; total) {</div><div class='del'>-		for (j = 0; j &lt; MAPLE_ALLOC_SLOTS; j++) {</div><div class='del'>-			i++;</div><div class='del'>-			MT_BUG_ON(mt, !smn-&gt;slot[j]);</div><div class='del'>-			if (i == total)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		smn = smn-&gt;slot[0]; /* next. */</div><div class='del'>-	}</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != total);</div><div class='del'>-	mas_reset(&amp;mas);</div><div class='del'>-	mas_destroy(&amp;mas); /* Free. */</div><div class='del'>-</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-	for (i = 1; i &lt; 128; i++) {</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != i); /* check request filled */</div><div class='del'>-		for (j = i; j &gt; 0; j--) { /*Free the requests */</div><div class='del'>-			mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-			MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-			ma_free_rcu(mn);</div><div class='del'>-		}</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 1; i &lt; MAPLE_NODE_MASK + 1; i++) {</div><div class='del'>-		MA_STATE(mas2, mt, 0, 0);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != i); /* check request filled */</div><div class='del'>-		for (j = 1; j &lt;= i; j++) { /* Move the allocations to mas2 */</div><div class='del'>-			mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-			MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			mas_push_node(&amp;mas2, mn);</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas2) != j);</div><div class='del'>-		}</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas2) != i);</div><div class='del'>-</div><div class='del'>-		for (j = i; j &gt; 0; j--) { /*Free the requests */</div><div class='del'>-			MT_BUG_ON(mt, mas_allocated(&amp;mas2) != j);</div><div class='del'>-			mn = mas_pop_node(&amp;mas2); /* get the next node. */</div><div class='del'>-			MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-			MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-			mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-			ma_free_rcu(mn);</div><div class='del'>-		}</div><div class='del'>-		MT_BUG_ON(mt, mas_allocated(&amp;mas2) != 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS + 1); /* Request */</div><div class='del'>-	MT_BUG_ON(mt, mas.node != MA_ERROR(-ENOMEM));</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 1);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count != MAPLE_ALLOC_SLOTS);</div><div class='del'>-</div><div class='del'>-	mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-	MT_BUG_ON(mt, mn == NULL);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count != MAPLE_ALLOC_SLOTS - 1);</div><div class='del'>-</div><div class='del'>-	mas_push_node(&amp;mas, mn);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 1);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count != MAPLE_ALLOC_SLOTS);</div><div class='del'>-</div><div class='del'>-	/* Check the limit of pop/push/pop */</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS + 2); /* Request */</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas) != 1);</div><div class='del'>-	MT_BUG_ON(mt, mas.node != MA_ERROR(-ENOMEM));</div><div class='del'>-	MT_BUG_ON(mt, !mas_nomem(&amp;mas, GFP_KERNEL));</div><div class='del'>-	MT_BUG_ON(mt, mas_alloc_req(&amp;mas));</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count != 1);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 2);</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 1);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count  != MAPLE_ALLOC_SLOTS);</div><div class='del'>-	mas_push_node(&amp;mas, mn);</div><div class='del'>-	MT_BUG_ON(mt, mas.alloc-&gt;node_count != 1);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 2);</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-	mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-	ma_free_rcu(mn);</div><div class='del'>-	for (i = 1; i &lt;= MAPLE_ALLOC_SLOTS + 1; i++) {</div><div class='del'>-		mn = mas_pop_node(&amp;mas);</div><div class='del'>-		MT_BUG_ON(mt, not_empty(mn));</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-	}</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	for (i = 3; i &lt; MAPLE_NODE_MASK * 3; i++) {</div><div class='del'>-		mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mas_push_node(&amp;mas, mn); /* put it back */</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-		mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn2 = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mas_push_node(&amp;mas, mn); /* put them back */</div><div class='del'>-		mas_push_node(&amp;mas, mn2);</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-		mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn2 = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn3 = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mas_push_node(&amp;mas, mn); /* put them back */</div><div class='del'>-		mas_push_node(&amp;mas, mn2);</div><div class='del'>-		mas_push_node(&amp;mas, mn3);</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-		mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-		mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-		mas_node_count(&amp;mas, i); /* Request */</div><div class='del'>-		mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-		mn = mas_pop_node(&amp;mas); /* get the next node. */</div><div class='del'>-		mn-&gt;parent = ma_parent_ptr(mn);</div><div class='del'>-		ma_free_rcu(mn);</div><div class='del'>-		mas_destroy(&amp;mas);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, 5); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 5);</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, 10); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	mas.status = ma_start;</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 10);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS - 1); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS - 1);</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, 10 + MAPLE_ALLOC_SLOTS - 1); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	mas.status = ma_start;</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 10 + MAPLE_ALLOC_SLOTS - 1);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS + 1); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS + 1);</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS * 2 + 2); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	mas.status = ma_start;</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS * 2 + 2);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS * 2 + 1); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS * 2 + 1);</div><div class='del'>-	mas.node = MA_ERROR(-ENOMEM);</div><div class='del'>-	mas_node_count(&amp;mas, MAPLE_ALLOC_SLOTS * 3 + 2); /* Request */</div><div class='del'>-	mas_nomem(&amp;mas, GFP_KERNEL); /* Fill request */</div><div class='del'>-	mas.status = ma_start;</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != MAPLE_ALLOC_SLOTS * 3 + 2);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-</div><div class='del'>-	mtree_unlock(mt);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Check erasing including RCU.</div><div class='ctx'>  */</div><div class='hunk'>@@ -35455,17 +35025,6 @@ static void check_dfs_preorder(struct maple_tree *mt)</div><div class='ctx'> 	MT_BUG_ON(mt, count != e);</div><div class='ctx'> 	mtree_destroy(mt);</div><div class='ctx'> </div><div class='del'>-	mt_init_flags(mt, MT_FLAGS_ALLOC_RANGE);</div><div class='del'>-	mas_reset(&amp;mas);</div><div class='del'>-	mt_zero_nr_tallocated();</div><div class='del'>-	mt_set_non_kernel(200);</div><div class='del'>-	mas_expected_entries(&amp;mas, max);</div><div class='del'>-	for (count = 0; count &lt;= max; count++) {</div><div class='del'>-		mas.index = mas.last = count;</div><div class='del'>-		mas_store(&amp;mas, xa_mk_value(count));</div><div class='del'>-		MT_BUG_ON(mt, mas_is_err(&amp;mas));</div><div class='del'>-	}</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='ctx'> 	rcu_barrier();</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * pr_info(" -&gt;seq test of 0-%lu %luK in %d active (%d total)\n",</div><div class='hunk'>@@ -35524,6 +35083,18 @@ static unsigned char get_vacant_height(struct ma_wr_state *wr_mas, void *entry)</div><div class='ctx'> 	return vacant_height;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mas_allocated(struct ma_state *mas)</div><div class='add'>+{</div><div class='add'>+	int total = 0;</div><div class='add'>+</div><div class='add'>+	if (mas-&gt;alloc)</div><div class='add'>+		total++;</div><div class='add'>+</div><div class='add'>+	if (mas-&gt;sheaf)</div><div class='add'>+		total += kmem_cache_sheaf_size(mas-&gt;sheaf);</div><div class='add'>+</div><div class='add'>+	return total;</div><div class='add'>+}</div><div class='ctx'> /* Preallocation testing */</div><div class='ctx'> static noinline void __init check_prealloc(struct maple_tree *mt)</div><div class='ctx'> {</div><div class='hunk'>@@ -35542,7 +35113,10 @@ static noinline void __init check_prealloc(struct maple_tree *mt)</div><div class='ctx'> </div><div class='ctx'> 	/* Spanning store */</div><div class='ctx'> 	mas_set_range(&amp;mas, 470, 500);</div><div class='del'>-	MT_BUG_ON(mt, mas_preallocate(&amp;mas, ptr, GFP_KERNEL) != 0);</div><div class='add'>+</div><div class='add'>+	mas_wr_preallocate(&amp;wr_mas, ptr);</div><div class='add'>+	MT_BUG_ON(mt, mas.store_type != wr_spanning_store);</div><div class='add'>+	MT_BUG_ON(mt, mas_is_err(&amp;mas));</div><div class='ctx'> 	allocated = mas_allocated(&amp;mas);</div><div class='ctx'> 	height = mas_mt_height(&amp;mas);</div><div class='ctx'> 	vacant_height = get_vacant_height(&amp;wr_mas, ptr);</div><div class='hunk'>@@ -35552,6 +35126,7 @@ static noinline void __init check_prealloc(struct maple_tree *mt)</div><div class='ctx'> 	allocated = mas_allocated(&amp;mas);</div><div class='ctx'> 	MT_BUG_ON(mt, allocated != 0);</div><div class='ctx'> </div><div class='add'>+	mas_wr_preallocate(&amp;wr_mas, ptr);</div><div class='ctx'> 	MT_BUG_ON(mt, mas_preallocate(&amp;mas, ptr, GFP_KERNEL) != 0);</div><div class='ctx'> 	allocated = mas_allocated(&amp;mas);</div><div class='ctx'> 	height = mas_mt_height(&amp;mas);</div><div class='hunk'>@@ -35597,20 +35172,6 @@ static noinline void __init check_prealloc(struct maple_tree *mt)</div><div class='ctx'> 	height = mas_mt_height(&amp;mas);</div><div class='ctx'> 	vacant_height = get_vacant_height(&amp;wr_mas, ptr);</div><div class='ctx'> 	MT_BUG_ON(mt, allocated != 1 + (height - vacant_height) * 3);</div><div class='del'>-	mn = mas_pop_node(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != allocated - 1);</div><div class='del'>-	mas_push_node(&amp;mas, mn);</div><div class='del'>-	MT_BUG_ON(mt, mas_allocated(&amp;mas) != allocated);</div><div class='del'>-	MT_BUG_ON(mt, mas_preallocate(&amp;mas, ptr, GFP_KERNEL) != 0);</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-	allocated = mas_allocated(&amp;mas);</div><div class='del'>-	MT_BUG_ON(mt, allocated != 0);</div><div class='del'>-</div><div class='del'>-	MT_BUG_ON(mt, mas_preallocate(&amp;mas, ptr, GFP_KERNEL) != 0);</div><div class='del'>-	allocated = mas_allocated(&amp;mas);</div><div class='del'>-	height = mas_mt_height(&amp;mas);</div><div class='del'>-	vacant_height = get_vacant_height(&amp;wr_mas, ptr);</div><div class='del'>-	MT_BUG_ON(mt, allocated != 1 + (height - vacant_height) * 3);</div><div class='ctx'> 	mas_store_prealloc(&amp;mas, ptr);</div><div class='ctx'> 	MT_BUG_ON(mt, mas_allocated(&amp;mas) != 0);</div><div class='ctx'> </div><div class='hunk'>@@ -36327,13 +35888,18 @@ extern void test_kmem_cache_bulk(void);</div><div class='ctx'> static inline void check_spanning_store_height(struct maple_tree *mt)</div><div class='ctx'> {</div><div class='ctx'> 	int index = 0;</div><div class='add'>+	int last = 140;</div><div class='ctx'> 	MA_STATE(mas, mt, 0, 0);</div><div class='ctx'> 	mas_lock(&amp;mas);</div><div class='ctx'> 	while (mt_height(mt) != 3) {</div><div class='ctx'> 		mas_store_gfp(&amp;mas, xa_mk_value(index), GFP_KERNEL);</div><div class='ctx'> 		mas_set(&amp;mas, ++index);</div><div class='ctx'> 	}</div><div class='del'>-	mas_set_range(&amp;mas, 90, 140);</div><div class='add'>+</div><div class='add'>+	if (MAPLE_32BIT)</div><div class='add'>+		last = 155; /* 32 bit higher branching factor. */</div><div class='add'>+</div><div class='add'>+	mas_set_range(&amp;mas, 90, last);</div><div class='ctx'> 	mas_store_gfp(&amp;mas, xa_mk_value(index), GFP_KERNEL);</div><div class='ctx'> 	MT_BUG_ON(mt, mas_mt_height(&amp;mas) != 2);</div><div class='ctx'> 	mas_unlock(&amp;mas);</div><div class='hunk'>@@ -36406,11 +35972,17 @@ static void check_nomem_writer_race(struct maple_tree *mt)</div><div class='ctx'> 	check_load(mt, 6, xa_mk_value(0xC));</div><div class='ctx'> 	mtree_unlock(mt);</div><div class='ctx'> </div><div class='add'>+	mt_set_non_kernel(0);</div><div class='ctx'> 	/* test for the same race but with mas_store_gfp() */</div><div class='ctx'> 	mtree_store_range(mt, 0, 5, xa_mk_value(0xA), GFP_KERNEL);</div><div class='ctx'> 	mtree_store_range(mt, 6, 10, NULL, GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 	mas_set_range(&amp;mas, 0, 5);</div><div class='add'>+</div><div class='add'>+	/* setup writer 2 that will trigger the race condition */</div><div class='add'>+	mt_set_private(mt);</div><div class='add'>+	mt_set_callback(writer2);</div><div class='add'>+</div><div class='ctx'> 	mtree_lock(mt);</div><div class='ctx'> 	mas_store_gfp(&amp;mas, NULL, GFP_KERNEL);</div><div class='ctx'> </div><div class='hunk'>@@ -36428,6 +36000,7 @@ static void check_nomem_writer_race(struct maple_tree *mt)</div><div class='ctx'>   */</div><div class='ctx'> static inline int check_vma_modification(struct maple_tree *mt)</div><div class='ctx'> {</div><div class='add'>+#if defined(CONFIG_64BIT)</div><div class='ctx'> 	MA_STATE(mas, mt, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	mtree_lock(mt);</div><div class='hunk'>@@ -36451,30 +36024,11 @@ static inline int check_vma_modification(struct maple_tree *mt)</div><div class='ctx'> </div><div class='ctx'> 	mas_destroy(&amp;mas);</div><div class='ctx'> 	mtree_unlock(mt);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * test to check that bulk stores do not use wr_rebalance as the store</div><div class='del'>- * type.</div><div class='del'>- */</div><div class='del'>-static inline void check_bulk_rebalance(struct maple_tree *mt)</div><div class='del'>-{</div><div class='del'>-	MA_STATE(mas, mt, ULONG_MAX, ULONG_MAX);</div><div class='del'>-	int max = 10;</div><div class='del'>-</div><div class='del'>-	build_full_tree(mt, 0, 2);</div><div class='del'>-</div><div class='del'>-	/* erase every entry in the tree */</div><div class='del'>-	do {</div><div class='del'>-		/* set up bulk store mode */</div><div class='del'>-		mas_expected_entries(&amp;mas, max);</div><div class='del'>-		mas_erase(&amp;mas);</div><div class='del'>-		MT_BUG_ON(mt, mas.store_type == wr_rebalance);</div><div class='del'>-	} while (mas_prev(&amp;mas, 0) != NULL);</div><div class='del'>-</div><div class='del'>-	mas_destroy(&amp;mas);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> void farmer_tests(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -36487,10 +36041,6 @@ void farmer_tests(void)</div><div class='ctx'> 	check_vma_modification(&amp;tree);</div><div class='ctx'> 	mtree_destroy(&amp;tree);</div><div class='ctx'> </div><div class='del'>-	mt_init(&amp;tree);</div><div class='del'>-	check_bulk_rebalance(&amp;tree);</div><div class='del'>-	mtree_destroy(&amp;tree);</div><div class='del'>-</div><div class='ctx'> 	tree.ma_root = xa_mk_value(0);</div><div class='ctx'> 	mt_dump(&amp;tree, mt_dump_dec);</div><div class='ctx'> </div><div class='hunk'>@@ -36550,10 +36100,6 @@ void farmer_tests(void)</div><div class='ctx'> 	check_erase_testset(&amp;tree);</div><div class='ctx'> 	mtree_destroy(&amp;tree);</div><div class='ctx'> </div><div class='del'>-	mt_init_flags(&amp;tree, 0);</div><div class='del'>-	check_new_node(&amp;tree);</div><div class='del'>-	mtree_destroy(&amp;tree);</div><div class='del'>-</div><div class='ctx'> 	if (!MAPLE_32BIT) {</div><div class='ctx'> 		mt_init_flags(&amp;tree, MT_FLAGS_ALLOC_RANGE);</div><div class='ctx'> 		check_rcu_simulated(&amp;tree);</div><div class='head'>diff --git a/tools/testing/scatterlist/linux/mm.h b/tools/testing/scatterlist/linux/mm.h<br/>index 5bd9e6e80625..121ae78d6e88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/scatterlist/linux/mm.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/scatterlist/linux/mm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/scatterlist/linux/mm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/scatterlist/linux/mm.h</a></div><div class='hunk'>@@ -51,7 +51,6 @@ static inline unsigned long page_to_phys(struct page *page)</div><div class='ctx'> </div><div class='ctx'> #define page_to_pfn(page) ((unsigned long)(page) / PAGE_SIZE)</div><div class='ctx'> #define pfn_to_page(pfn) (void *)((pfn) * PAGE_SIZE)</div><div class='del'>-#define nth_page(page,n) pfn_to_page(page_to_pfn((page)) + (n))</div><div class='ctx'> </div><div class='ctx'> #define __min(t1, t2, min1, min2, x, y) ({              \</div><div class='ctx'> 	t1 min1 = (x);                                  \</div><div class='head'>diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile<br/>index 030da61dbff3..56e44a98d6a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/Makefile</a></div><div class='hunk'>@@ -36,6 +36,7 @@ TARGETS += filesystems/fat</div><div class='ctx'> TARGETS += filesystems/overlayfs</div><div class='ctx'> TARGETS += filesystems/statmount</div><div class='ctx'> TARGETS += filesystems/mount-notify</div><div class='add'>+TARGETS += filesystems/fuse</div><div class='ctx'> TARGETS += firmware</div><div class='ctx'> TARGETS += fpu</div><div class='ctx'> TARGETS += ftrace</div><div class='hunk'>@@ -53,6 +54,7 @@ TARGETS += kvm</div><div class='ctx'> TARGETS += landlock</div><div class='ctx'> TARGETS += lib</div><div class='ctx'> TARGETS += livepatch</div><div class='add'>+TARGETS += liveupdate</div><div class='ctx'> TARGETS += lkdtm</div><div class='ctx'> TARGETS += lsm</div><div class='ctx'> TARGETS += membarrier</div><div class='hunk'>@@ -124,6 +126,7 @@ TARGETS += uevent</div><div class='ctx'> TARGETS += user_events</div><div class='ctx'> TARGETS += vDSO</div><div class='ctx'> TARGETS += mm</div><div class='add'>+TARGETS += vfio</div><div class='ctx'> TARGETS += x86</div><div class='ctx'> TARGETS += x86/bugs</div><div class='ctx'> TARGETS += zram</div><div class='hunk'>@@ -314,7 +317,7 @@ gen_tar: install</div><div class='ctx'> 	@echo "Created ${TAR_PATH}"</div><div class='ctx'> </div><div class='ctx'> clean:</div><div class='del'>-	@for TARGET in $(TARGETS); do \</div><div class='add'>+	@for TARGET in $(TARGETS) $(INSTALL_DEP_TARGETS); do \</div><div class='ctx'> 		BUILD_TARGET=$$BUILD/$$TARGET;	\</div><div class='ctx'> 		$(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET clean;\</div><div class='ctx'> 	done;</div><div class='head'>diff --git a/tools/testing/selftests/acct/acct_syscall.c b/tools/testing/selftests/acct/acct_syscall.c<br/>index 87c044fb9293..421adbdc299d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/acct/acct_syscall.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/acct/acct_syscall.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/acct/acct_syscall.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/acct/acct_syscall.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;sys/wait.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> int main(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/testing/selftests/alsa/conf.c b/tools/testing/selftests/alsa/conf.c<br/>index e2b3a5810f47..317212078e36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/conf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/conf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/conf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/alsa/conf.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;regex.h&gt;</div><div class='ctx'> #include &lt;sys/stat.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> #include "alsa-local.h"</div><div class='ctx'> </div><div class='ctx'> #define SYSFS_ROOT "/sys"</div><div class='hunk'>@@ -448,7 +448,7 @@ int conf_get_bool(snd_config_t *root, const char *key1, const char *key2, int de</div><div class='ctx'> 		ksft_exit_fail_msg("key '%s'.'%s' search error: %s\n", key1, key2, snd_strerror(ret));</div><div class='ctx'> 	ret = snd_config_get_bool(cfg);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		ksft_exit_fail_msg("key '%s'.'%s' is not an bool\n", key1, key2);</div><div class='add'>+		ksft_exit_fail_msg("key '%s'.'%s' is not a bool\n", key1, key2);</div><div class='ctx'> 	return !!ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/alsa/mixer-test.c b/tools/testing/selftests/alsa/mixer-test.c<br/>index 2a4b2662035e..d4f845c32804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/mixer-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/mixer-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/mixer-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/alsa/mixer-test.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include &lt;poll.h&gt;</div><div class='ctx'> #include &lt;stdint.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> #include "alsa-local.h"</div><div class='ctx'> </div><div class='ctx'> #define TESTS_PER_CONTROL 7</div><div class='hunk'>@@ -53,10 +53,10 @@ struct ctl_data {</div><div class='ctx'> 	struct ctl_data *next;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int num_cards = 0;</div><div class='del'>-int num_controls = 0;</div><div class='del'>-struct card_data *card_list = NULL;</div><div class='del'>-struct ctl_data *ctl_list = NULL;</div><div class='add'>+int num_cards;</div><div class='add'>+int num_controls;</div><div class='add'>+struct card_data *card_list;</div><div class='add'>+struct ctl_data *ctl_list;</div><div class='ctx'> </div><div class='ctx'> static void find_controls(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/testing/selftests/alsa/pcm-test.c b/tools/testing/selftests/alsa/pcm-test.c<br/>index dbd7c222ce93..ee04ccef7d7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/pcm-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/pcm-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/pcm-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/alsa/pcm-test.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;assert.h&gt;</div><div class='ctx'> #include &lt;pthread.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> #include "alsa-local.h"</div><div class='ctx'> </div><div class='ctx'> typedef struct timespec timestamp_t;</div><div class='hunk'>@@ -30,7 +30,7 @@ struct card_data {</div><div class='ctx'> 	struct card_data *next;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct card_data *card_list = NULL;</div><div class='add'>+struct card_data *card_list;</div><div class='ctx'> </div><div class='ctx'> struct pcm_data {</div><div class='ctx'> 	snd_pcm_t *handle;</div><div class='hunk'>@@ -43,10 +43,10 @@ struct pcm_data {</div><div class='ctx'> 	struct pcm_data *next;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pcm_data *pcm_list = NULL;</div><div class='add'>+struct pcm_data *pcm_list;</div><div class='ctx'> </div><div class='del'>-int num_missing = 0;</div><div class='del'>-struct pcm_data *pcm_missing = NULL;</div><div class='add'>+int num_missing;</div><div class='add'>+struct pcm_data *pcm_missing;</div><div class='ctx'> </div><div class='ctx'> snd_config_t *default_pcm_config;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/alsa/test-pcmtest-driver.c b/tools/testing/selftests/alsa/test-pcmtest-driver.c<br/>index ca81afa4ee90..95065ef3b441 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/test-pcmtest-driver.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/test-pcmtest-driver.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/test-pcmtest-driver.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/alsa/test-pcmtest-driver.c</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;alsa/asoundlib.h&gt;</div><div class='del'>-#include "../kselftest_harness.h"</div><div class='add'>+#include "kselftest_harness.h"</div><div class='ctx'> </div><div class='ctx'> #define CH_NUM 4</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/alsa/utimer-test.c b/tools/testing/selftests/alsa/utimer-test.c<br/>index 37964f311a33..c45cb226bd8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/utimer-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/alsa/utimer-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/alsa/utimer-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/alsa/utimer-test.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Author: Ivan Orlov &lt;ivan.orlov0322@gmail.com&gt;</div><div class='ctx'>  */</div><div class='del'>-#include "../kselftest_harness.h"</div><div class='add'>+#include "kselftest_harness.h"</div><div class='ctx'> #include &lt;sound/asound.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='head'>diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c<br/>index 002ec38a8bbb..c41640f18e4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/hwcap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/hwcap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/hwcap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/abi/hwcap.c</a></div><div class='hunk'>@@ -17,7 +17,9 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include &lt;linux/auxvec.h&gt;</div><div class='add'>+</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #define TESTS_PER_HWCAP 3</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +57,6 @@ static void cmpbr_sigill(void)</div><div class='ctx'> 	/* Not implemented, too complicated and unreliable anyway */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void crc32_sigill(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* CRC32W W0, W0, W1 */</div><div class='hunk'>@@ -169,6 +170,18 @@ static void lse128_sigill(void)</div><div class='ctx'> 		     : "cc", "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lsfe_sigill(void)</div><div class='add'>+{</div><div class='add'>+	float __attribute__ ((aligned (16))) mem;</div><div class='add'>+	register float *memp asm ("x0") = &amp;mem;</div><div class='add'>+</div><div class='add'>+	/* STFADD H0, [X0] */</div><div class='add'>+	asm volatile(".inst 0x7c20801f"</div><div class='add'>+		     : "+r" (memp)</div><div class='add'>+		     :</div><div class='add'>+		     : "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void lut_sigill(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* LUTI2 V0.16B, { V0.16B }, V[0] */</div><div class='hunk'>@@ -763,6 +776,13 @@ static const struct hwcap_data {</div><div class='ctx'> 		.sigill_fn = lse128_sigill,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.name = "LSFE",</div><div class='add'>+		.at_hwcap = AT_HWCAP3,</div><div class='add'>+		.hwcap_bit = HWCAP3_LSFE,</div><div class='add'>+		.cpuinfo = "lsfe",</div><div class='add'>+		.sigill_fn = lsfe_sigill,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.name = "LUT",</div><div class='ctx'> 		.at_hwcap = AT_HWCAP2,</div><div class='ctx'> 		.hwcap_bit = HWCAP2_LUT,</div><div class='head'>diff --git a/tools/testing/selftests/arm64/abi/ptrace.c b/tools/testing/selftests/arm64/abi/ptrace.c<br/>index b51d21f78cf9..0e46ac21c81d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/ptrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/ptrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/abi/ptrace.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #define EXPECTED_TESTS 11</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/arm64/abi/syscall-abi.c b/tools/testing/selftests/arm64/abi/syscall-abi.c<br/>index 5ec9a18ec802..b67e3e26fa6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/syscall-abi.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/syscall-abi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/syscall-abi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/abi/syscall-abi.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #include "syscall-abi.h"</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/arm64/abi/tpidr2.c b/tools/testing/selftests/arm64/abi/tpidr2.c<br/>index f58a9f89b952..1703543fb7c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/tpidr2.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/abi/tpidr2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/abi/tpidr2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/abi/tpidr2.c</a></div><div class='hunk'>@@ -182,16 +182,16 @@ static int write_clone_read(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (;;) {</div><div class='del'>-		waiting = wait4(ret, &amp;status, __WCLONE, NULL);</div><div class='add'>+		waiting = waitpid(ret, &amp;status, __WCLONE);</div><div class='ctx'> </div><div class='ctx'> 		if (waiting &lt; 0) {</div><div class='ctx'> 			if (errno == EINTR)</div><div class='ctx'> 				continue;</div><div class='del'>-			ksft_print_msg("wait4() failed: %d\n", errno);</div><div class='add'>+			ksft_print_msg("waitpid() failed: %d\n", errno);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (waiting != ret) {</div><div class='del'>-			ksft_print_msg("wait4() returned wrong PID %d\n",</div><div class='add'>+			ksft_print_msg("waitpid() returned wrong PID %d\n",</div><div class='ctx'> 				       waiting);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -227,10 +227,10 @@ int main(int argc, char **argv)</div><div class='ctx'> 	ret = open("/proc/sys/abi/sme_default_vector_length", O_RDONLY, 0);</div><div class='ctx'> 	if (ret &gt;= 0) {</div><div class='ctx'> 		ksft_test_result(default_value(), "default_value\n");</div><div class='del'>-		ksft_test_result(write_read, "write_read\n");</div><div class='del'>-		ksft_test_result(write_sleep_read, "write_sleep_read\n");</div><div class='del'>-		ksft_test_result(write_fork_read, "write_fork_read\n");</div><div class='del'>-		ksft_test_result(write_clone_read, "write_clone_read\n");</div><div class='add'>+		ksft_test_result(write_read(), "write_read\n");</div><div class='add'>+		ksft_test_result(write_sleep_read(), "write_sleep_read\n");</div><div class='add'>+		ksft_test_result(write_fork_read(), "write_fork_read\n");</div><div class='add'>+		ksft_test_result(write_clone_read(), "write_clone_read\n");</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		ksft_print_msg("SME support not present\n");</div><div class='head'>diff --git a/tools/testing/selftests/arm64/bti/assembler.h b/tools/testing/selftests/arm64/bti/assembler.h<br/>index 04e7b72880ef..141cdcbf0b8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/bti/assembler.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/bti/assembler.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/bti/assembler.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/bti/assembler.h</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #define GNU_PROPERTY_AARCH64_FEATURE_1_BTI	(1U &lt;&lt; 0)</div><div class='ctx'> #define GNU_PROPERTY_AARCH64_FEATURE_1_PAC	(1U &lt;&lt; 1)</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> .macro startfn name:req</div><div class='ctx'> 	.globl \name</div><div class='ctx'> \name:</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c<br/>index 124bc883365e..22c584b78be5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/fp-ptrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/fp-ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/fp-ptrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/fp-ptrace.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> #include &lt;asm/sve_context.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #include "fp-ptrace.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1071,7 +1071,7 @@ static bool sve_write_supported(struct test_config *config)</div><div class='ctx'> </div><div class='ctx'> static bool sve_write_fpsimd_supported(struct test_config *config)</div><div class='ctx'> {</div><div class='del'>-	if (!sve_supported())</div><div class='add'>+	if (!sve_supported() &amp;&amp; !sme_supported())</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if ((config-&gt;svcr_in &amp; SVCR_ZA) != (config-&gt;svcr_expected &amp; SVCR_ZA))</div><div class='hunk'>@@ -1187,7 +1187,7 @@ static void sve_write_sve(pid_t child, struct test_config *config)</div><div class='ctx'> 	if (!vl)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	iov.iov_len = SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, SVE_PT_REGS_SVE);</div><div class='add'>+	iov.iov_len = SVE_PT_SIZE(vq, SVE_PT_REGS_SVE);</div><div class='ctx'> 	iov.iov_base = malloc(iov.iov_len);</div><div class='ctx'> 	if (!iov.iov_base) {</div><div class='ctx'> 		ksft_print_msg("Failed allocating %lu byte SVE write buffer\n",</div><div class='hunk'>@@ -1231,11 +1231,7 @@ static void sve_write_fpsimd(pid_t child, struct test_config *config)</div><div class='ctx'> 	vl = vl_expected(config);</div><div class='ctx'> 	vq = __sve_vq_from_vl(vl);</div><div class='ctx'> </div><div class='del'>-	if (!vl)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	iov.iov_len = SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq,</div><div class='del'>-							  SVE_PT_REGS_FPSIMD);</div><div class='add'>+	iov.iov_len = SVE_PT_SIZE(vq, SVE_PT_REGS_FPSIMD);</div><div class='ctx'> 	iov.iov_base = malloc(iov.iov_len);</div><div class='ctx'> 	if (!iov.iov_base) {</div><div class='ctx'> 		ksft_print_msg("Failed allocating %lu byte SVE write buffer\n",</div><div class='hunk'>@@ -1569,7 +1565,6 @@ static void run_sve_tests(void)</div><div class='ctx'> 					  &amp;test_config);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void run_sme_tests(void)</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/fp-stress.c b/tools/testing/selftests/arm64/fp/fp-stress.c<br/>index 74e23208b94c..65e01aba96ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/fp-stress.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/fp-stress.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/fp-stress.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/fp-stress.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;sys/wait.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_VLS 16</div><div class='ctx'> </div><div class='hunk'>@@ -105,8 +105,8 @@ static void child_start(struct child_data *child, const char *program)</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Read from the startup pipe, there should be no data</div><div class='del'>-		 * and we should block until it is closed.  We just</div><div class='del'>-		 * carry on on error since this isn't super critical.</div><div class='add'>+		 * and we should block until it is closed. We just</div><div class='add'>+		 * carry-on on error since this isn't super critical.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ret = read(3, &amp;i, sizeof(i));</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='hunk'>@@ -549,7 +549,7 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	evs = calloc(tests, sizeof(*evs));</div><div class='ctx'> 	if (!evs)</div><div class='del'>-		ksft_exit_fail_msg("Failed to allocated %d epoll events\n",</div><div class='add'>+		ksft_exit_fail_msg("Failed to allocate %d epoll events\n",</div><div class='ctx'> 				   tests);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cpus; i++) {</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/kernel-test.c b/tools/testing/selftests/arm64/fp/kernel-test.c<br/>index e3cec3723ffa..0c40007d1282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/kernel-test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/kernel-test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/kernel-test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/kernel-test.c</a></div><div class='hunk'>@@ -188,13 +188,13 @@ static bool create_socket(void)</div><div class='ctx'> </div><div class='ctx'> 	ref = malloc(digest_len);</div><div class='ctx'> 	if (!ref) {</div><div class='del'>-		printf("Failed to allocated %d byte reference\n", digest_len);</div><div class='add'>+		printf("Failed to allocate %d byte reference\n", digest_len);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	digest = malloc(digest_len);</div><div class='ctx'> 	if (!digest) {</div><div class='del'>-		printf("Failed to allocated %d byte digest\n", digest_len);</div><div class='add'>+		printf("Failed to allocate %d byte digest\n", digest_len);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/sve-probe-vls.c b/tools/testing/selftests/arm64/fp/sve-probe-vls.c<br/>index a24eca7a4ecb..df0c1b6eb114 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/sve-probe-vls.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/sve-probe-vls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/sve-probe-vls.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/sve-probe-vls.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #include &lt;sys/prctl.h&gt;</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> #include "rdvl.h"</div><div class='ctx'> </div><div class='ctx'> int main(int argc, char **argv)</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/sve-ptrace.c b/tools/testing/selftests/arm64/fp/sve-ptrace.c<br/>index b22303778fb0..28f6b996c5e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/sve-ptrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/sve-ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/sve-ptrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/sve-ptrace.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> /* &lt;linux/elf.h&gt; and &lt;sys/auxv.h&gt; don't like each other, so: */</div><div class='ctx'> #ifndef NT_ARM_SVE</div><div class='hunk'>@@ -66,7 +66,7 @@ static const struct vec_type vec_types[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define VL_TESTS (((TEST_VQ_MAX - SVE_VQ_MIN) + 1) * 4)</div><div class='del'>-#define FLAG_TESTS 2</div><div class='add'>+#define FLAG_TESTS 4</div><div class='ctx'> #define FPSIMD_TESTS 2</div><div class='ctx'> </div><div class='ctx'> #define EXPECTED_TESTS ((VL_TESTS + FLAG_TESTS + FPSIMD_TESTS) * ARRAY_SIZE(vec_types))</div><div class='hunk'>@@ -95,19 +95,27 @@ static int do_child(void)</div><div class='ctx'> static int get_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)</div><div class='ctx'> {</div><div class='ctx'> 	struct iovec iov;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	iov.iov_base = fpsimd;</div><div class='ctx'> 	iov.iov_len = sizeof(*fpsimd);</div><div class='del'>-	return ptrace(PTRACE_GETREGSET, pid, NT_PRFPREG, &amp;iov);</div><div class='add'>+	ret = ptrace(PTRACE_GETREGSET, pid, NT_PRFPREG, &amp;iov);</div><div class='add'>+	if (ret == -1)</div><div class='add'>+		ksft_perror("ptrace(PTRACE_GETREGSET)");</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)</div><div class='ctx'> {</div><div class='ctx'> 	struct iovec iov;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	iov.iov_base = fpsimd;</div><div class='ctx'> 	iov.iov_len = sizeof(*fpsimd);</div><div class='del'>-	return ptrace(PTRACE_SETREGSET, pid, NT_PRFPREG, &amp;iov);</div><div class='add'>+	ret = ptrace(PTRACE_SETREGSET, pid, NT_PRFPREG, &amp;iov);</div><div class='add'>+	if (ret == -1)</div><div class='add'>+		ksft_perror("ptrace(PTRACE_SETREGSET)");</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,</div><div class='hunk'>@@ -115,8 +123,9 @@ static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,</div><div class='ctx'> {</div><div class='ctx'> 	struct user_sve_header *sve;</div><div class='ctx'> 	void *p;</div><div class='del'>-	size_t sz = sizeof *sve;</div><div class='add'>+	size_t sz = sizeof(*sve);</div><div class='ctx'> 	struct iovec iov;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		if (*size &lt; sz) {</div><div class='hunk'>@@ -132,8 +141,11 @@ static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,</div><div class='ctx'> </div><div class='ctx'> 		iov.iov_base = *buf;</div><div class='ctx'> 		iov.iov_len = sz;</div><div class='del'>-		if (ptrace(PTRACE_GETREGSET, pid, type-&gt;regset, &amp;iov))</div><div class='add'>+		ret = ptrace(PTRACE_GETREGSET, pid, type-&gt;regset, &amp;iov);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ksft_perror("ptrace(PTRACE_GETREGSET)");</div><div class='ctx'> 			goto error;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		sve = *buf;</div><div class='ctx'> 		if (sve-&gt;size &lt;= sz)</div><div class='hunk'>@@ -152,10 +164,46 @@ static int set_sve(pid_t pid, const struct vec_type *type,</div><div class='ctx'> 		   const struct user_sve_header *sve)</div><div class='ctx'> {</div><div class='ctx'> 	struct iovec iov;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	iov.iov_base = (void *)sve;</div><div class='ctx'> 	iov.iov_len = sve-&gt;size;</div><div class='del'>-	return ptrace(PTRACE_SETREGSET, pid, type-&gt;regset, &amp;iov);</div><div class='add'>+	ret = ptrace(PTRACE_SETREGSET, pid, type-&gt;regset, &amp;iov);</div><div class='add'>+	if (ret == -1)</div><div class='add'>+		ksft_perror("ptrace(PTRACE_SETREGSET)");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* A read operation fails */</div><div class='add'>+static void read_fails(pid_t child, const struct vec_type *type)</div><div class='add'>+{</div><div class='add'>+	struct user_sve_header *new_sve = NULL;</div><div class='add'>+	size_t new_sve_size = 0;</div><div class='add'>+	void *ret;</div><div class='add'>+</div><div class='add'>+	ret = get_sve(child, type, (void **)&amp;new_sve, &amp;new_sve_size);</div><div class='add'>+</div><div class='add'>+	ksft_test_result(ret == NULL, "%s unsupported read fails\n",</div><div class='add'>+			 type-&gt;name);</div><div class='add'>+</div><div class='add'>+	free(new_sve);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* A write operation fails */</div><div class='add'>+static void write_fails(pid_t child, const struct vec_type *type)</div><div class='add'>+{</div><div class='add'>+	struct user_sve_header sve;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Just the header, no data */</div><div class='add'>+	memset(&amp;sve, 0, sizeof(sve));</div><div class='add'>+	sve.size = sizeof(sve);</div><div class='add'>+	sve.flags = SVE_PT_REGS_SVE;</div><div class='add'>+	sve.vl = SVE_VL_MIN;</div><div class='add'>+	ret = set_sve(child, type, &amp;sve);</div><div class='add'>+</div><div class='add'>+	ksft_test_result(ret != 0, "%s unsupported write fails\n",</div><div class='add'>+			 type-&gt;name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Validate setting and getting the inherit flag */</div><div class='hunk'>@@ -270,6 +318,25 @@ static void check_u32(unsigned int vl, const char *reg,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Set out of range VLs */</div><div class='add'>+static void ptrace_set_vl_ranges(pid_t child, const struct vec_type *type)</div><div class='add'>+{</div><div class='add'>+	struct user_sve_header sve;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sve, 0, sizeof(sve));</div><div class='add'>+	sve.flags = SVE_PT_REGS_SVE;</div><div class='add'>+	sve.size = sizeof(sve);</div><div class='add'>+</div><div class='add'>+	ret = set_sve(child, type, &amp;sve);</div><div class='add'>+	ksft_test_result(ret != 0, "%s Set invalid VL 0\n", type-&gt;name);</div><div class='add'>+</div><div class='add'>+	sve.vl = SVE_VL_MAX + SVE_VQ_BYTES;</div><div class='add'>+	ret = set_sve(child, type, &amp;sve);</div><div class='add'>+	ksft_test_result(ret != 0, "%s Set invalid VL %d\n", type-&gt;name,</div><div class='add'>+			 SVE_VL_MAX + SVE_VQ_BYTES);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Access the FPSIMD registers via the SVE regset */</div><div class='ctx'> static void ptrace_sve_fpsimd(pid_t child, const struct vec_type *type)</div><div class='ctx'> {</div><div class='hunk'>@@ -327,6 +394,58 @@ out:</div><div class='ctx'> 	free(svebuf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Write the FPSIMD registers via the SVE regset when SVE is not supported */</div><div class='add'>+static void ptrace_sve_fpsimd_no_sve(pid_t child)</div><div class='add'>+{</div><div class='add'>+	void *svebuf;</div><div class='add'>+	struct user_sve_header *sve;</div><div class='add'>+	struct user_fpsimd_state *fpsimd, new_fpsimd;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	unsigned char *p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	svebuf = malloc(SVE_PT_SIZE(0, SVE_PT_REGS_FPSIMD));</div><div class='add'>+	if (!svebuf) {</div><div class='add'>+		ksft_test_result_fail("Failed to allocate FPSIMD buffer\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* On a system without SVE the VL should be set to 0 */</div><div class='add'>+	memset(svebuf, 0, SVE_PT_SIZE(0, SVE_PT_REGS_FPSIMD));</div><div class='add'>+	sve = svebuf;</div><div class='add'>+	sve-&gt;flags = SVE_PT_REGS_FPSIMD;</div><div class='add'>+	sve-&gt;size = SVE_PT_SIZE(0, SVE_PT_REGS_FPSIMD);</div><div class='add'>+	sve-&gt;vl = 0;</div><div class='add'>+</div><div class='add'>+	/* Try to set a known FPSIMD state via PT_REGS_SVE */</div><div class='add'>+	fpsimd = (struct user_fpsimd_state *)((char *)sve +</div><div class='add'>+					      SVE_PT_FPSIMD_OFFSET);</div><div class='add'>+	for (i = 0; i &lt; 32; ++i) {</div><div class='add'>+		p = (unsigned char *)&amp;fpsimd-&gt;vregs[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; sizeof(fpsimd-&gt;vregs[i]); ++j)</div><div class='add'>+			p[j] = j;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = set_sve(child, &amp;vec_types[0], sve);</div><div class='add'>+	ksft_test_result(ret == 0, "FPSIMD write via SVE\n");</div><div class='add'>+	if (ret) {</div><div class='add'>+		ksft_test_result_skip("Verify FPSIMD write via SVE\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Verify via the FPSIMD regset */</div><div class='add'>+	if (get_fpsimd(child, &amp;new_fpsimd)) {</div><div class='add'>+		ksft_test_result_skip("Verify FPSIMD write via SVE\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	ksft_test_result(memcmp(fpsimd, &amp;new_fpsimd, sizeof(*fpsimd)) == 0,</div><div class='add'>+			 "Verify FPSIMD write via SVE\n");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	free(svebuf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Validate attempting to set SVE data and read SVE data */</div><div class='ctx'> static void ptrace_set_sve_get_sve_data(pid_t child,</div><div class='ctx'> 					const struct vec_type *type,</div><div class='hunk'>@@ -683,6 +802,20 @@ static int do_parent(pid_t child)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(vec_types); i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the vector type isn't supported reads and writes</div><div class='add'>+		 * should fail.</div><div class='add'>+		 */</div><div class='add'>+		if (!(getauxval(vec_types[i].hwcap_type) &amp; vec_types[i].hwcap)) {</div><div class='add'>+			read_fails(child, &amp;vec_types[i]);</div><div class='add'>+			write_fails(child, &amp;vec_types[i]);</div><div class='add'>+		} else {</div><div class='add'>+			ksft_test_result_skip("%s unsupported read fails\n",</div><div class='add'>+					      vec_types[i].name);</div><div class='add'>+			ksft_test_result_skip("%s unsupported write fails\n",</div><div class='add'>+					      vec_types[i].name);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* FPSIMD via SVE regset */</div><div class='ctx'> 		if (getauxval(vec_types[i].hwcap_type) &amp; vec_types[i].hwcap) {</div><div class='ctx'> 			ptrace_sve_fpsimd(child, &amp;vec_types[i]);</div><div class='hunk'>@@ -703,6 +836,17 @@ static int do_parent(pid_t child)</div><div class='ctx'> 					      vec_types[i].name);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* Setting out of bounds VLs should fail */</div><div class='add'>+		if (getauxval(vec_types[i].hwcap_type) &amp; vec_types[i].hwcap) {</div><div class='add'>+			ptrace_set_vl_ranges(child, &amp;vec_types[i]);</div><div class='add'>+		} else {</div><div class='add'>+			ksft_test_result_skip("%s Set invalid VL 0\n",</div><div class='add'>+					      vec_types[i].name);</div><div class='add'>+			ksft_test_result_skip("%s Set invalid VL %d\n",</div><div class='add'>+					      vec_types[i].name,</div><div class='add'>+					      SVE_VL_MAX + SVE_VQ_BYTES);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Step through every possible VQ */</div><div class='ctx'> 		for (vq = SVE_VQ_MIN; vq &lt;= TEST_VQ_MAX; vq++) {</div><div class='ctx'> 			vl = sve_vl_from_vq(vq);</div><div class='hunk'>@@ -734,6 +878,15 @@ static int do_parent(pid_t child)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* We support SVE writes of FPSMID format on SME only systems */</div><div class='add'>+	if (!(getauxval(AT_HWCAP) &amp; HWCAP_SVE) &amp;&amp;</div><div class='add'>+	    (getauxval(AT_HWCAP2) &amp; HWCAP2_SME)) {</div><div class='add'>+		ptrace_sve_fpsimd_no_sve(child);</div><div class='add'>+	} else {</div><div class='add'>+		ksft_test_result_skip("FPSIMD write via SVE\n");</div><div class='add'>+		ksft_test_result_skip("Verify FPSIMD write via SVE\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = EXIT_SUCCESS;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/vec-syscfg.c b/tools/testing/selftests/arm64/fp/vec-syscfg.c<br/>index ea9c7d47790f..8dd932fdcdc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/vec-syscfg.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/vec-syscfg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/vec-syscfg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/vec-syscfg.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> #include "rdvl.h"</div><div class='ctx'> </div><div class='ctx'> #define ARCH_MIN_VL SVE_VL_MIN</div><div class='hunk'>@@ -690,7 +690,6 @@ static inline void smstop(void)</div><div class='ctx'> 	asm volatile("msr S0_3_C4_C6_3, xzr");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Verify we can change the SVE vector length while SME is active and</div><div class='ctx'>  * continue to use SME afterwards.</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/za-ptrace.c b/tools/testing/selftests/arm64/fp/za-ptrace.c<br/>index 08c777f87ea2..787eed22d059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/za-ptrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/za-ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/za-ptrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/za-ptrace.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> /* &lt;linux/elf.h&gt; and &lt;sys/auxv.h&gt; don't like each other, so: */</div><div class='ctx'> #ifndef NT_ARM_ZA</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/zt-ptrace.c b/tools/testing/selftests/arm64/fp/zt-ptrace.c<br/>index 584b8d59b7ea..f3fa49fd0fbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/zt-ptrace.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/zt-ptrace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/zt-ptrace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/zt-ptrace.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> /* &lt;linux/elf.h&gt; and &lt;sys/auxv.h&gt; don't like each other, so: */</div><div class='ctx'> #ifndef NT_ARM_ZA</div><div class='hunk'>@@ -108,7 +108,6 @@ static int get_zt(pid_t pid, char zt[ZT_SIG_REG_BYTES])</div><div class='ctx'> 	return ptrace(PTRACE_GETREGSET, pid, NT_ARM_ZT, &amp;iov);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int set_zt(pid_t pid, const char zt[ZT_SIG_REG_BYTES])</div><div class='ctx'> {</div><div class='ctx'> 	struct iovec iov;</div><div class='head'>diff --git a/tools/testing/selftests/arm64/fp/zt-test.S b/tools/testing/selftests/arm64/fp/zt-test.S<br/>index 38080f3c3280..a8df05771670 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/zt-test.S?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/fp/zt-test.S</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/fp/zt-test.S?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/fp/zt-test.S</a></div><div class='hunk'>@@ -276,7 +276,7 @@ function barf</div><div class='ctx'> 	bl	putdec</div><div class='ctx'> 	puts	", iteration="</div><div class='ctx'> 	mov	x0, x22</div><div class='del'>-	bl	putdec</div><div class='add'>+	bl	putdecn</div><div class='ctx'> 	puts	"\tExpected ["</div><div class='ctx'> 	mov	x0, x10</div><div class='ctx'> 	mov	x1, x12</div><div class='head'>diff --git a/tools/testing/selftests/arm64/gcs/Makefile b/tools/testing/selftests/arm64/gcs/Makefile<br/>index d2f3497a9103..1fbbf0ca1f02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/gcs/Makefile</a></div><div class='hunk'>@@ -14,11 +14,11 @@ LDLIBS+=-lpthread</div><div class='ctx'> include ../../lib.mk</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)/basic-gcs: basic-gcs.c</div><div class='del'>-	$(CC) -g -fno-asynchronous-unwind-tables -fno-ident -s -Os -nostdlib \</div><div class='del'>-		-static -include ../../../../include/nolibc/nolibc.h \</div><div class='add'>+	$(CC) $(CFLAGS) -fno-asynchronous-unwind-tables -fno-ident -s -nostdlib -nostdinc \</div><div class='add'>+		-static -I../../../../include/nolibc -include ../../../../include/nolibc/nolibc.h \</div><div class='ctx'> 		-I../../../../../usr/include \</div><div class='ctx'> 		-std=gnu99 -I../.. -g \</div><div class='del'>-		-ffreestanding -Wall $^ -o $@ -lgcc</div><div class='add'>+		-ffreestanding $^ -o $@ -lgcc</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)/gcs-stress-thread: gcs-stress-thread.S</div><div class='ctx'> 	$(CC) -nostdlib $^ -o $@</div><div class='head'>diff --git a/tools/testing/selftests/arm64/gcs/basic-gcs.c b/tools/testing/selftests/arm64/gcs/basic-gcs.c<br/>index 54f9c888249d..250977abc398 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/basic-gcs.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/basic-gcs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/basic-gcs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/gcs/basic-gcs.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;sys/mman.h&gt;</div><div class='ctx'> #include &lt;asm/mman.h&gt;</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "kselftest.h"</div><div class='hunk'>@@ -386,14 +387,13 @@ int main(void)</div><div class='ctx'> </div><div class='ctx'> 	ksft_print_header();</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We don't have getauxval() with nolibc so treat a failure to</div><div class='del'>-	 * read GCS state as a lack of support and skip.</div><div class='del'>-	 */</div><div class='add'>+	if (!(getauxval(AT_HWCAP) &amp; HWCAP_GCS))</div><div class='add'>+		ksft_exit_skip("SKIP GCS not supported\n");</div><div class='add'>+</div><div class='ctx'> 	ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS,</div><div class='ctx'> 			  &amp;gcs_mode, 0, 0, 0);</div><div class='ctx'> 	if (ret != 0)</div><div class='del'>-		ksft_exit_skip("Failed to read GCS state: %d\n", ret);</div><div class='add'>+		ksft_exit_fail_msg("Failed to read GCS state: %d\n", ret);</div><div class='ctx'> </div><div class='ctx'> 	if (!(gcs_mode &amp; PR_SHADOW_STACK_ENABLE)) {</div><div class='ctx'> 		gcs_mode = PR_SHADOW_STACK_ENABLE;</div><div class='hunk'>@@ -410,7 +410,7 @@ int main(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* One last test: disable GCS, we can do this one time */</div><div class='del'>-	my_syscall5(__NR_prctl, PR_SET_SHADOW_STACK_STATUS, 0, 0, 0, 0);</div><div class='add'>+	ret = my_syscall5(__NR_prctl, PR_SET_SHADOW_STACK_STATUS, 0, 0, 0, 0);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		ksft_print_msg("Failed to disable GCS: %d\n", ret);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/arm64/gcs/gcs-locking.c b/tools/testing/selftests/arm64/gcs/gcs-locking.c<br/>index 989f75a491b7..1e6abb136ffd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/gcs-locking.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/gcs-locking.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/gcs-locking.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/gcs/gcs-locking.c</a></div><div class='hunk'>@@ -165,7 +165,6 @@ TEST_F(valid_modes, lock_enable_disable_others)</div><div class='ctx'> 	ASSERT_EQ(ret, 0);</div><div class='ctx'> 	ASSERT_EQ(mode, PR_SHADOW_STACK_ALL_MODES);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	ret = my_syscall2(__NR_prctl, PR_SET_SHADOW_STACK_STATUS,</div><div class='ctx'> 			  variant-&gt;mode);</div><div class='ctx'> 	ASSERT_EQ(ret, 0);</div><div class='head'>diff --git a/tools/testing/selftests/arm64/gcs/gcs-stress.c b/tools/testing/selftests/arm64/gcs/gcs-stress.c<br/>index bbc7f4950c13..86d8cd42aee7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/gcs-stress.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/gcs/gcs-stress.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/gcs/gcs-stress.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/gcs/gcs-stress.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;sys/wait.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> struct child_data {</div><div class='ctx'> 	char *name, *output;</div><div class='hunk'>@@ -433,7 +433,7 @@ int main(int argc, char **argv)</div><div class='ctx'> </div><div class='ctx'> 	evs = calloc(tests, sizeof(*evs));</div><div class='ctx'> 	if (!evs)</div><div class='del'>-		ksft_exit_fail_msg("Failed to allocated %d epoll events\n",</div><div class='add'>+		ksft_exit_fail_msg("Failed to allocate %d epoll events\n",</div><div class='ctx'> 				   tests);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; gcs_threads; i++)</div><div class='head'>diff --git a/tools/testing/selftests/arm64/pauth/exec_target.c b/tools/testing/selftests/arm64/pauth/exec_target.c<br/>index 4435600ca400..e597861b26d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/pauth/exec_target.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/pauth/exec_target.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/pauth/exec_target.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/pauth/exec_target.c</a></div><div class='hunk'>@@ -13,7 +13,12 @@ int main(void)</div><div class='ctx'> 	unsigned long hwcaps;</div><div class='ctx'> 	size_t val;</div><div class='ctx'> </div><div class='del'>-	fread(&amp;val, sizeof(size_t), 1, stdin);</div><div class='add'>+	size_t size = fread(&amp;val, sizeof(size_t), 1, stdin);</div><div class='add'>+</div><div class='add'>+	if (size != 1) {</div><div class='add'>+		fprintf(stderr, "Could not read input from stdin\n");</div><div class='add'>+		return EXIT_FAILURE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* don't try to execute illegal (unimplemented) instructions) caller</div><div class='ctx'> 	 * should have checked this and keep worker simple</div><div class='head'>diff --git a/tools/testing/selftests/arm64/pauth/pac.c b/tools/testing/selftests/arm64/pauth/pac.c<br/>index 6d21b2fc758d..67d138057707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/pauth/pac.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/pauth/pac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/pauth/pac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/pauth/pac.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;setjmp.h&gt;</div><div class='ctx'> #include &lt;sched.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../../kselftest_harness.h"</div><div class='add'>+#include "kselftest_harness.h"</div><div class='ctx'> #include "helper.h"</div><div class='ctx'> </div><div class='ctx'> #define PAC_COLLISION_ATTEMPTS 1000</div><div class='head'>diff --git a/tools/testing/selftests/arm64/tags/tags_test.c b/tools/testing/selftests/arm64/tags/tags_test.c<br/>index 8ae26e496c89..375ab47f0edb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/tags/tags_test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/arm64/tags/tags_test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/arm64/tags/tags_test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/arm64/tags/tags_test.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #include &lt;stdint.h&gt;</div><div class='ctx'> #include &lt;sys/prctl.h&gt;</div><div class='ctx'> #include &lt;sys/utsname.h&gt;</div><div class='del'>-#include "../../kselftest.h"</div><div class='add'>+#include "kselftest.h"</div><div class='ctx'> </div><div class='ctx'> #define SHIFT_TAG(tag)		((uint64_t)(tag) &lt;&lt; 56)</div><div class='ctx'> #define SET_TAG(ptr, tag)	(((uint64_t)(ptr) &amp; ~SHIFT_TAG(0xff)) | \</div><div class='head'>diff --git a/tools/testing/selftests/bpf/.gitignore b/tools/testing/selftests/bpf/.gitignore<br/>index 3d8378972d26..19c1638e312a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/.gitignore?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/.gitignore?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/.gitignore</a></div><div class='hunk'>@@ -23,6 +23,7 @@ test_tcpnotify_user</div><div class='ctx'> test_libbpf</div><div class='ctx'> xdping</div><div class='ctx'> test_cpp</div><div class='add'>+test_progs_verification_cert</div><div class='ctx'> *.d</div><div class='ctx'> *.subskel.h</div><div class='ctx'> *.skel.h</div><div class='hunk'>@@ -32,7 +33,6 @@ test_cpp</div><div class='ctx'> /cpuv4</div><div class='ctx'> /host-tools</div><div class='ctx'> /tools</div><div class='del'>-/runqslower</div><div class='ctx'> /bench</div><div class='ctx'> /veristat</div><div class='ctx'> /sign-file</div><div class='hunk'>@@ -44,3 +44,4 @@ xdp_redirect_multi</div><div class='ctx'> xdp_synproxy</div><div class='ctx'> xdp_hw_metadata</div><div class='ctx'> xdp_features</div><div class='add'>+verification_cert.h</div><div class='head'>diff --git a/tools/testing/selftests/bpf/DENYLIST.s390x b/tools/testing/selftests/bpf/DENYLIST.s390x<br/>index 3ebd77206f98..a17baf8c6fd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/DENYLIST.s390x?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/DENYLIST.s390x</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/DENYLIST.s390x?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/DENYLIST.s390x</a></div><div class='hunk'>@@ -2,4 +2,3 @@</div><div class='ctx'> # Alphabetical order</div><div class='ctx'> get_stack_raw_tp                         # user_stack corrupted user stack                                             (no backchain userspace)</div><div class='ctx'> stacktrace_build_id                      # compare_map_keys stackid_hmap vs. stackmap err -2 errno 2                   (?)</div><div class='del'>-verifier_iterating_callbacks</div><div class='head'>diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile<br/>index 4863106034df..b7030a6e2e76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/Makefile?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/Makefile</a></div><div class='hunk'>@@ -46,6 +46,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> CFLAGS += -g $(OPT_FLAGS) -rdynamic -std=gnu11				\</div><div class='ctx'> 	  -Wall -Werror -fno-omit-frame-pointer				\</div><div class='add'>+	  -Wno-unused-but-set-variable					\</div><div class='ctx'> 	  $(GENFLAGS) $(SAN_CFLAGS) $(LIBELF_CFLAGS)			\</div><div class='ctx'> 	  -I$(CURDIR) -I$(INCLUDE_DIR) -I$(GENDIR) -I$(LIBDIR)		\</div><div class='ctx'> 	  -I$(TOOLSINCDIR) -I$(TOOLSARCHINCDIR) -I$(APIDIR) -I$(OUTPUT)</div><div class='hunk'>@@ -98,14 +99,11 @@ TEST_GEN_PROGS += test_progs-cpuv4</div><div class='ctx'> TEST_INST_SUBDIRS += cpuv4</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-TEST_GEN_FILES = test_tc_edt.bpf.o</div><div class='ctx'> TEST_FILES = xsk_prereqs.sh $(wildcard progs/btf_dump_test_case_*.c)</div><div class='ctx'> </div><div class='ctx'> # Order correspond to 'make run_tests' order</div><div class='ctx'> TEST_PROGS := test_kmod.sh \</div><div class='ctx'> 	test_lirc_mode2.sh \</div><div class='del'>-	test_tc_tunnel.sh \</div><div class='del'>-	test_tc_edt.sh \</div><div class='ctx'> 	test_xdping.sh \</div><div class='ctx'> 	test_bpftool_build.sh \</div><div class='ctx'> 	test_bpftool.sh \</div><div class='hunk'>@@ -120,14 +118,13 @@ TEST_PROGS_EXTENDED := \</div><div class='ctx'> 	test_bpftool.py</div><div class='ctx'> </div><div class='ctx'> TEST_KMODS := bpf_testmod.ko bpf_test_no_cfi.ko bpf_test_modorder_x.ko \</div><div class='del'>-	bpf_test_modorder_y.ko</div><div class='add'>+	bpf_test_modorder_y.ko bpf_test_rqspinlock.ko</div><div class='ctx'> TEST_KMOD_TARGETS = $(addprefix $(OUTPUT)/,$(TEST_KMODS))</div><div class='ctx'> </div><div class='ctx'> # Compile but not part of 'make run_tests'</div><div class='ctx'> TEST_GEN_PROGS_EXTENDED = \</div><div class='ctx'> 	bench \</div><div class='ctx'> 	flow_dissector_load \</div><div class='del'>-	runqslower \</div><div class='ctx'> 	test_cpp \</div><div class='ctx'> 	test_lirc_mode2_user \</div><div class='ctx'> 	veristat \</div><div class='hunk'>@@ -137,7 +134,7 @@ TEST_GEN_PROGS_EXTENDED = \</div><div class='ctx'> 	xdping \</div><div class='ctx'> 	xskxceiver</div><div class='ctx'> </div><div class='del'>-TEST_GEN_FILES += liburandom_read.so urandom_read sign-file uprobe_multi</div><div class='add'>+TEST_GEN_FILES += $(TEST_KMODS) liburandom_read.so urandom_read sign-file uprobe_multi</div><div class='ctx'> </div><div class='ctx'> ifneq ($(V),1)</div><div class='ctx'> submake_extras := feature_display=0</div><div class='hunk'>@@ -209,8 +206,6 @@ HOST_INCLUDE_DIR	:= $(INCLUDE_DIR)</div><div class='ctx'> endif</div><div class='ctx'> HOST_BPFOBJ := $(HOST_BUILD_DIR)/libbpf/libbpf.a</div><div class='ctx'> RESOLVE_BTFIDS := $(HOST_BUILD_DIR)/resolve_btfids/resolve_btfids</div><div class='del'>-RUNQSLOWER_OUTPUT := $(BUILD_DIR)/runqslower/</div><div class='del'>-</div><div class='ctx'> VMLINUX_BTF_PATHS ?= $(if $(O),$(O)/vmlinux)				\</div><div class='ctx'> 		     $(if $(KBUILD_OUTPUT),$(KBUILD_OUTPUT)/vmlinux)	\</div><div class='ctx'> 		     ../../../../vmlinux				\</div><div class='hunk'>@@ -232,7 +227,7 @@ $(notdir $(TEST_GEN_PROGS) $(TEST_KMODS)				\</div><div class='ctx'> MAKE_DIRS := $(sort $(BUILD_DIR)/libbpf $(HOST_BUILD_DIR)/libbpf	\</div><div class='ctx'> 	       $(BUILD_DIR)/bpftool $(HOST_BUILD_DIR)/bpftool		\</div><div class='ctx'> 	       $(HOST_BUILD_DIR)/resolve_btfids				\</div><div class='del'>-	       $(RUNQSLOWER_OUTPUT) $(INCLUDE_DIR))</div><div class='add'>+	       $(INCLUDE_DIR))</div><div class='ctx'> $(MAKE_DIRS):</div><div class='ctx'> 	$(call msg,MKDIR,,$@)</div><div class='ctx'> 	$(Q)mkdir -p $@</div><div class='hunk'>@@ -304,17 +299,6 @@ TRUNNER_BPFTOOL := $(DEFAULT_BPFTOOL)</div><div class='ctx'> USE_BOOTSTRAP := "bootstrap/"</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-$(OUTPUT)/runqslower: $(BPFOBJ) | $(DEFAULT_BPFTOOL) $(RUNQSLOWER_OUTPUT)</div><div class='del'>-	$(Q)$(MAKE) $(submake_extras) -C $(TOOLSDIR)/bpf/runqslower	       \</div><div class='del'>-		    OUTPUT=$(RUNQSLOWER_OUTPUT) VMLINUX_BTF=$(VMLINUX_BTF)     \</div><div class='del'>-		    BPFTOOL_OUTPUT=$(HOST_BUILD_DIR)/bpftool/		       \</div><div class='del'>-		    BPFOBJ_OUTPUT=$(BUILD_DIR)/libbpf/			       \</div><div class='del'>-		    BPFOBJ=$(BPFOBJ) BPF_INCLUDE=$(INCLUDE_DIR)		       \</div><div class='del'>-		    BPF_TARGET_ENDIAN=$(BPF_TARGET_ENDIAN)		       \</div><div class='del'>-		    EXTRA_CFLAGS='-g $(OPT_FLAGS) $(SAN_CFLAGS) $(EXTRA_CFLAGS)' \</div><div class='del'>-		    EXTRA_LDFLAGS='$(SAN_LDFLAGS) $(EXTRA_LDFLAGS)' &amp;&amp;	       \</div><div class='del'>-		    cp $(RUNQSLOWER_OUTPUT)runqslower $@</div><div class='del'>-</div><div class='ctx'> TEST_GEN_PROGS_EXTENDED += $(TRUNNER_BPFTOOL)</div><div class='ctx'> </div><div class='ctx'> $(TEST_GEN_PROGS) $(TEST_GEN_PROGS_EXTENDED): $(BPFOBJ)</div><div class='hunk'>@@ -398,7 +382,7 @@ $(HOST_BPFOBJ): $(wildcard $(BPFDIR)/*.[ch] $(BPFDIR)/Makefile)		       \</div><div class='ctx'> 		    DESTDIR=$(HOST_SCRATCH_DIR)/ prefix= all install_headers</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-# vmlinux.h is first dumped to a temprorary file and then compared to</div><div class='add'>+# vmlinux.h is first dumped to a temporary file and then compared to</div><div class='ctx'> # the previous version. This helps to avoid unnecessary re-builds of</div><div class='ctx'> # $(TRUNNER_BPF_OBJS)</div><div class='ctx'> $(INCLUDE_DIR)/vmlinux.h: $(VMLINUX_BTF) $(BPFTOOL) | $(INCLUDE_DIR)</div><div class='hunk'>@@ -453,7 +437,9 @@ BPF_CFLAGS = -g -Wall -Werror -D__TARGET_ARCH_$(SRCARCH) $(MENDIAN)	\</div><div class='ctx'> 	     -I$(abspath $(OUTPUT)/../usr/include)			\</div><div class='ctx'> 	     -std=gnu11		 					\</div><div class='ctx'> 	     -fno-strict-aliasing 					\</div><div class='del'>-	     -Wno-compare-distinct-pointer-types</div><div class='add'>+	     -Wno-compare-distinct-pointer-types			\</div><div class='add'>+	     -Wno-initializer-overrides					\</div><div class='add'>+	     #</div><div class='ctx'> # TODO: enable me -Wsign-compare</div><div class='ctx'> </div><div class='ctx'> CLANG_CFLAGS = $(CLANG_SYS_INCLUDES)</div><div class='hunk'>@@ -496,15 +482,17 @@ LINKED_SKELS := test_static_linked.skel.h linked_funcs.skel.h		\</div><div class='ctx'> 		test_subskeleton.skel.h test_subskeleton_lib.skel.h	\</div><div class='ctx'> 		test_usdt.skel.h</div><div class='ctx'> </div><div class='del'>-LSKELS := fentry_test.c fexit_test.c fexit_sleep.c atomics.c 		\</div><div class='del'>-	trace_printk.c trace_vprintk.c map_ptr_kern.c 			\</div><div class='add'>+LSKELS := fexit_sleep.c trace_printk.c trace_vprintk.c map_ptr_kern.c 	\</div><div class='ctx'> 	core_kern.c core_kern_overflow.c test_ringbuf.c			\</div><div class='del'>-	test_ringbuf_n.c test_ringbuf_map_key.c test_ringbuf_write.c</div><div class='add'>+	test_ringbuf_n.c test_ringbuf_map_key.c test_ringbuf_write.c    \</div><div class='add'>+	test_ringbuf_overwrite.c</div><div class='add'>+</div><div class='add'>+LSKELS_SIGNED := fentry_test.c fexit_test.c atomics.c</div><div class='ctx'> </div><div class='ctx'> # Generate both light skeleton and libbpf skeleton for these</div><div class='ctx'> LSKELS_EXTRA := test_ksyms_module.c test_ksyms_weak.c kfunc_call_test.c \</div><div class='ctx'> 	kfunc_call_test_subprog.c</div><div class='del'>-SKEL_BLACKLIST += $$(LSKELS)</div><div class='add'>+SKEL_BLACKLIST += $$(LSKELS) $$(LSKELS_SIGNED)</div><div class='ctx'> </div><div class='ctx'> test_static_linked.skel.h-deps := test_static_linked1.bpf.o test_static_linked2.bpf.o</div><div class='ctx'> linked_funcs.skel.h-deps := linked_funcs1.bpf.o linked_funcs2.bpf.o</div><div class='hunk'>@@ -535,12 +523,15 @@ HEADERS_FOR_BPF_OBJS := $(wildcard $(BPFDIR)/*.bpf.h)		\</div><div class='ctx'> # $2 - test runner extra "flavor" (e.g., no_alu32, cpuv4, bpf_gcc, etc)</div><div class='ctx'> define DEFINE_TEST_RUNNER</div><div class='ctx'> </div><div class='add'>+LSKEL_SIGN := -S -k $(PRIVATE_KEY) -i $(VERIFICATION_CERT)</div><div class='ctx'> TRUNNER_OUTPUT := $(OUTPUT)$(if $2,/)$2</div><div class='ctx'> TRUNNER_BINARY := $1$(if $2,-)$2</div><div class='ctx'> TRUNNER_TEST_OBJS := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.test.o,	\</div><div class='ctx'> 				 $$(notdir $$(wildcard $(TRUNNER_TESTS_DIR)/*.c)))</div><div class='ctx'> TRUNNER_EXTRA_OBJS := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.o,		\</div><div class='ctx'> 				 $$(filter %.c,$(TRUNNER_EXTRA_SOURCES)))</div><div class='add'>+TRUNNER_LIB_OBJS := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.o,		\</div><div class='add'>+				 $$(filter %.c,$(TRUNNER_LIB_SOURCES)))</div><div class='ctx'> TRUNNER_EXTRA_HDRS := $$(filter %.h,$(TRUNNER_EXTRA_SOURCES))</div><div class='ctx'> TRUNNER_TESTS_HDR := $(TRUNNER_TESTS_DIR)/tests.h</div><div class='ctx'> TRUNNER_BPF_SRCS := $$(notdir $$(wildcard $(TRUNNER_BPF_PROGS_DIR)/*.c))</div><div class='hunk'>@@ -550,6 +541,7 @@ TRUNNER_BPF_SKELS := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.skel.h,	\</div><div class='ctx'> 					       $$(TRUNNER_BPF_SRCS)))</div><div class='ctx'> TRUNNER_BPF_LSKELS := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.lskel.h, $$(LSKELS) $$(LSKELS_EXTRA))</div><div class='ctx'> TRUNNER_BPF_SKELS_LINKED := $$(addprefix $$(TRUNNER_OUTPUT)/,$(LINKED_SKELS))</div><div class='add'>+TRUNNER_BPF_LSKELS_SIGNED := $$(patsubst %.c,$$(TRUNNER_OUTPUT)/%.lskel.h, $$(LSKELS_SIGNED))</div><div class='ctx'> TEST_GEN_FILES += $$(TRUNNER_BPF_OBJS)</div><div class='ctx'> </div><div class='ctx'> # Evaluate rules now with extra TRUNNER_XXX variables above already defined</div><div class='hunk'>@@ -604,6 +596,15 @@ $(TRUNNER_BPF_LSKELS): %.lskel.h: %.bpf.o $(BPFTOOL) | $(TRUNNER_OUTPUT)</div><div class='ctx'> 	$(Q)$$(BPFTOOL) gen skeleton -L $$(&lt;:.o=.llinked3.o) name $$(notdir $$(&lt;:.bpf.o=_lskel)) &gt; $$@</div><div class='ctx'> 	$(Q)rm -f $$(&lt;:.o=.llinked1.o) $$(&lt;:.o=.llinked2.o) $$(&lt;:.o=.llinked3.o)</div><div class='ctx'> </div><div class='add'>+$(TRUNNER_BPF_LSKELS_SIGNED): %.lskel.h: %.bpf.o $(BPFTOOL) | $(TRUNNER_OUTPUT)</div><div class='add'>+	$$(call msg,GEN-SKEL,$(TRUNNER_BINARY) (signed),$$@)</div><div class='add'>+	$(Q)$$(BPFTOOL) gen object $$(&lt;:.o=.llinked1.o) $$&lt;</div><div class='add'>+	$(Q)$$(BPFTOOL) gen object $$(&lt;:.o=.llinked2.o) $$(&lt;:.o=.llinked1.o)</div><div class='add'>+	$(Q)$$(BPFTOOL) gen object $$(&lt;:.o=.llinked3.o) $$(&lt;:.o=.llinked2.o)</div><div class='add'>+	$(Q)diff $$(&lt;:.o=.llinked2.o) $$(&lt;:.o=.llinked3.o)</div><div class='add'>+	$(Q)$$(BPFTOOL) gen skeleton $(LSKEL_SIGN) $$(&lt;:.o=.llinked3.o) name $$(notdir $$(&lt;:.bpf.o=_lskel)) &gt; $$@</div><div class='add'>+	$(Q)rm -f $$(&lt;:.o=.llinked1.o) $$(&lt;:.o=.llinked2.o) $$(&lt;:.o=.llinked3.o)</div><div class='add'>+</div><div class='ctx'> $(LINKED_BPF_OBJS): %: $(TRUNNER_OUTPUT)/%</div><div class='ctx'> </div><div class='ctx'> # .SECONDEXPANSION here allows to correctly expand %-deps variables as prerequisites</div><div class='hunk'>@@ -653,6 +654,7 @@ $(TRUNNER_TEST_OBJS:.o=.d): $(TRUNNER_OUTPUT)/%.test.d:			\</div><div class='ctx'> 			    $(TRUNNER_EXTRA_HDRS)			\</div><div class='ctx'> 			    $(TRUNNER_BPF_SKELS)			\</div><div class='ctx'> 			    $(TRUNNER_BPF_LSKELS)			\</div><div class='add'>+			    $(TRUNNER_BPF_LSKELS_SIGNED)		\</div><div class='ctx'> 			    $(TRUNNER_BPF_SKELS_LINKED)			\</div><div class='ctx'> 			    $$(BPFOBJ) | $(TRUNNER_OUTPUT)</div><div class='ctx'> </div><div class='hunk'>@@ -667,11 +669,16 @@ $(foreach N,$(patsubst $(TRUNNER_OUTPUT)/%.o,%,$(TRUNNER_EXTRA_OBJS)),	\</div><div class='ctx'> $(TRUNNER_EXTRA_OBJS): $(TRUNNER_OUTPUT)/%.o:				\</div><div class='ctx'> 		       %.c						\</div><div class='ctx'> 		       $(TRUNNER_EXTRA_HDRS)				\</div><div class='add'>+		       $(VERIFY_SIG_HDR)				\</div><div class='ctx'> 		       $(TRUNNER_TESTS_HDR)				\</div><div class='ctx'> 		       $$(BPFOBJ) | $(TRUNNER_OUTPUT)</div><div class='ctx'> 	$$(call msg,EXT-OBJ,$(TRUNNER_BINARY),$$@)</div><div class='ctx'> 	$(Q)$$(CC) $$(CFLAGS) -c $$&lt; $$(LDLIBS) -o $$@</div><div class='ctx'> </div><div class='add'>+$(TRUNNER_LIB_OBJS): $(TRUNNER_OUTPUT)/%.o:$(TOOLSDIR)/lib/%.c</div><div class='add'>+	$$(call msg,LIB-OBJ,$(TRUNNER_BINARY),$$@)</div><div class='add'>+	$(Q)$$(CC) $$(CFLAGS) -c $$&lt; $$(LDLIBS) -o $$@</div><div class='add'>+</div><div class='ctx'> # non-flavored in-srctree builds receive special treatment, in particular, we</div><div class='ctx'> # do not need to copy extra resources (see e.g. test_btf_dump_case())</div><div class='ctx'> $(TRUNNER_BINARY)-extras: $(TRUNNER_EXTRA_FILES) | $(TRUNNER_OUTPUT)</div><div class='hunk'>@@ -685,6 +692,7 @@ $(OUTPUT)/$(TRUNNER_BINARY): | $(TRUNNER_BPF_OBJS)</div><div class='ctx'> </div><div class='ctx'> $(OUTPUT)/$(TRUNNER_BINARY): $(TRUNNER_TEST_OBJS)			\</div><div class='ctx'> 			     $(TRUNNER_EXTRA_OBJS) $$(BPFOBJ)		\</div><div class='add'>+			     $(TRUNNER_LIB_OBJS)			\</div><div class='ctx'> 			     $(RESOLVE_BTFIDS)				\</div><div class='ctx'> 			     $(TRUNNER_BPFTOOL)				\</div><div class='ctx'> 			     $(OUTPUT)/veristat				\</div><div class='hunk'>@@ -697,6 +705,19 @@ $(OUTPUT)/$(TRUNNER_BINARY): $(TRUNNER_TEST_OBJS)			\</div><div class='ctx'> </div><div class='ctx'> endef</div><div class='ctx'> </div><div class='add'>+VERIFY_SIG_SETUP := $(CURDIR)/verify_sig_setup.sh</div><div class='add'>+VERIFY_SIG_HDR := verification_cert.h</div><div class='add'>+VERIFICATION_CERT   := $(BUILD_DIR)/signing_key.der</div><div class='add'>+PRIVATE_KEY := $(BUILD_DIR)/signing_key.pem</div><div class='add'>+</div><div class='add'>+$(VERIFICATION_CERT) $(PRIVATE_KEY): $(VERIFY_SIG_SETUP)</div><div class='add'>+	$(Q)mkdir -p $(BUILD_DIR)</div><div class='add'>+	$(Q)$(VERIFY_SIG_SETUP) genkey $(BUILD_DIR)</div><div class='add'>+</div><div class='add'>+$(VERIFY_SIG_HDR): $(VERIFICATION_CERT)</div><div class='add'>+	$(Q)ln -fs $&lt; test_progs_verification_cert &amp;&amp; \</div><div class='add'>+	xxd -i test_progs_verification_cert &gt; $@</div><div class='add'>+</div><div class='ctx'> # Define test_progs test runner.</div><div class='ctx'> TRUNNER_TESTS_DIR := prog_tests</div><div class='ctx'> TRUNNER_BPF_PROGS_DIR := progs</div><div class='hunk'>@@ -716,8 +737,10 @@ TRUNNER_EXTRA_SOURCES := test_progs.c		\</div><div class='ctx'> 			 disasm.c		\</div><div class='ctx'> 			 disasm_helpers.c	\</div><div class='ctx'> 			 json_writer.c 		\</div><div class='add'>+			 $(VERIFY_SIG_HDR)		\</div><div class='ctx'> 			 flow_dissector_load.h	\</div><div class='ctx'> 			 ip_check_defrag_frags.h</div><div class='add'>+TRUNNER_LIB_SOURCES := find_bit.c</div><div class='ctx'> TRUNNER_EXTRA_FILES := $(OUTPUT)/urandom_read				\</div><div class='ctx'> 		       $(OUTPUT)/liburandom_read.so			\</div><div class='ctx'> 		       $(OUTPUT)/xdp_synproxy				\</div><div class='hunk'>@@ -725,7 +748,7 @@ TRUNNER_EXTRA_FILES := $(OUTPUT)/urandom_read				\</div><div class='ctx'> 		       $(OUTPUT)/uprobe_multi				\</div><div class='ctx'> 		       $(TEST_KMOD_TARGETS)				\</div><div class='ctx'> 		       ima_setup.sh 					\</div><div class='del'>-		       verify_sig_setup.sh				\</div><div class='add'>+		       $(VERIFY_SIG_SETUP)				\</div><div class='ctx'> 		       $(wildcard progs/btf_dump_test_case_*.c)		\</div><div class='ctx'> 		       $(wildcard progs/*.bpf.o)</div><div class='ctx'> TRUNNER_BPF_BUILD_RULE := CLANG_BPF_BUILD_RULE</div><div class='hunk'>@@ -755,6 +778,7 @@ endif</div><div class='ctx'> TRUNNER_TESTS_DIR := map_tests</div><div class='ctx'> TRUNNER_BPF_PROGS_DIR := progs</div><div class='ctx'> TRUNNER_EXTRA_SOURCES := test_maps.c</div><div class='add'>+TRUNNER_LIB_SOURCES :=</div><div class='ctx'> TRUNNER_EXTRA_FILES :=</div><div class='ctx'> TRUNNER_BPF_BUILD_RULE := $$(error no BPF objects should be built)</div><div class='ctx'> TRUNNER_BPF_CFLAGS :=</div><div class='hunk'>@@ -776,7 +800,7 @@ $(OUTPUT)/test_verifier: test_verifier.c verifier/tests.h $(BPFOBJ) | $(OUTPUT)</div><div class='ctx'> 	$(Q)$(CC) $(CFLAGS) $(filter %.a %.o %.c,$^) $(LDLIBS) -o $@</div><div class='ctx'> </div><div class='ctx'> # Include find_bit.c to compile xskxceiver.</div><div class='del'>-EXTRA_SRC := $(TOOLSDIR)/lib/find_bit.c</div><div class='add'>+EXTRA_SRC := $(TOOLSDIR)/lib/find_bit.c prog_tests/test_xsk.c prog_tests/test_xsk.h</div><div class='ctx'> $(OUTPUT)/xskxceiver: $(EXTRA_SRC) xskxceiver.c xskxceiver.h $(OUTPUT)/network_helpers.o $(OUTPUT)/xsk.o $(OUTPUT)/xsk_xdp_progs.skel.h $(BPFOBJ) | $(OUTPUT)</div><div class='ctx'> 	$(call msg,BINARY,,$@)</div><div class='ctx'> 	$(Q)$(CC) $(CFLAGS) $(filter %.a %.o %.c,$^) $(LDLIBS) -o $@</div><div class='hunk'>@@ -816,6 +840,7 @@ $(OUTPUT)/bench_bpf_hashmap_lookup.o: $(OUTPUT)/bpf_hashmap_lookup.skel.h</div><div class='ctx'> $(OUTPUT)/bench_htab_mem.o: $(OUTPUT)/htab_mem_bench.skel.h</div><div class='ctx'> $(OUTPUT)/bench_bpf_crypto.o: $(OUTPUT)/crypto_bench.skel.h</div><div class='ctx'> $(OUTPUT)/bench_sockmap.o: $(OUTPUT)/bench_sockmap_prog.skel.h</div><div class='add'>+$(OUTPUT)/bench_lpm_trie_map.o: $(OUTPUT)/lpm_trie_bench.skel.h $(OUTPUT)/lpm_trie_map.skel.h</div><div class='ctx'> $(OUTPUT)/bench.o: bench.h testing_helpers.h $(BPFOBJ)</div><div class='ctx'> $(OUTPUT)/bench: LDLIBS += -lm</div><div class='ctx'> $(OUTPUT)/bench: $(OUTPUT)/bench.o \</div><div class='hunk'>@@ -837,6 +862,7 @@ $(OUTPUT)/bench: $(OUTPUT)/bench.o \</div><div class='ctx'> 		 $(OUTPUT)/bench_htab_mem.o \</div><div class='ctx'> 		 $(OUTPUT)/bench_bpf_crypto.o \</div><div class='ctx'> 		 $(OUTPUT)/bench_sockmap.o \</div><div class='add'>+		 $(OUTPUT)/bench_lpm_trie_map.o \</div><div class='ctx'> 		 #</div><div class='ctx'> 	$(call msg,BINARY,,$@)</div><div class='ctx'> 	$(Q)$(CC) $(CFLAGS) $(LDFLAGS) $(filter %.a %.o,$^) $(LDLIBS) -o $@</div><div class='hunk'>@@ -864,7 +890,8 @@ EXTRA_CLEAN := $(SCRATCH_DIR) $(HOST_SCRATCH_DIR)			\</div><div class='ctx'> 	$(addprefix $(OUTPUT)/,*.o *.d *.skel.h *.lskel.h *.subskel.h	\</div><div class='ctx'> 			       no_alu32 cpuv4 bpf_gcc			\</div><div class='ctx'> 			       liburandom_read.so)			\</div><div class='del'>-	$(OUTPUT)/FEATURE-DUMP.selftests</div><div class='add'>+	$(OUTPUT)/FEATURE-DUMP.selftests				\</div><div class='add'>+	test_progs_verification_cert</div><div class='ctx'> </div><div class='ctx'> .PHONY: docs docs-clean</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/bench.c b/tools/testing/selftests/bpf/bench.c<br/>index ddd73d06a1eb..bd29bb2e6cb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bench.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bench.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bench.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bench.c</a></div><div class='hunk'>@@ -284,6 +284,7 @@ extern struct argp bench_htab_mem_argp;</div><div class='ctx'> extern struct argp bench_trigger_batch_argp;</div><div class='ctx'> extern struct argp bench_crypto_argp;</div><div class='ctx'> extern struct argp bench_sockmap_argp;</div><div class='add'>+extern struct argp bench_lpm_trie_map_argp;</div><div class='ctx'> </div><div class='ctx'> static const struct argp_child bench_parsers[] = {</div><div class='ctx'> 	{ &amp;bench_ringbufs_argp, 0, "Ring buffers benchmark", 0 },</div><div class='hunk'>@@ -299,6 +300,7 @@ static const struct argp_child bench_parsers[] = {</div><div class='ctx'> 	{ &amp;bench_trigger_batch_argp, 0, "BPF triggering benchmark", 0 },</div><div class='ctx'> 	{ &amp;bench_crypto_argp, 0, "bpf crypto benchmark", 0 },</div><div class='ctx'> 	{ &amp;bench_sockmap_argp, 0, "bpf sockmap benchmark", 0 },</div><div class='add'>+	{ &amp;bench_lpm_trie_map_argp, 0, "LPM trie map benchmark", 0 },</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -499,7 +501,7 @@ extern const struct bench bench_rename_rawtp;</div><div class='ctx'> extern const struct bench bench_rename_fentry;</div><div class='ctx'> extern const struct bench bench_rename_fexit;</div><div class='ctx'> </div><div class='del'>-/* pure counting benchmarks to establish theoretical lmits */</div><div class='add'>+/* pure counting benchmarks to establish theoretical limits */</div><div class='ctx'> extern const struct bench bench_trig_usermode_count;</div><div class='ctx'> extern const struct bench bench_trig_syscall_count;</div><div class='ctx'> extern const struct bench bench_trig_kernel_count;</div><div class='hunk'>@@ -510,6 +512,8 @@ extern const struct bench bench_trig_kretprobe;</div><div class='ctx'> extern const struct bench bench_trig_kprobe_multi;</div><div class='ctx'> extern const struct bench bench_trig_kretprobe_multi;</div><div class='ctx'> extern const struct bench bench_trig_fentry;</div><div class='add'>+extern const struct bench bench_trig_kprobe_multi_all;</div><div class='add'>+extern const struct bench bench_trig_kretprobe_multi_all;</div><div class='ctx'> extern const struct bench bench_trig_fexit;</div><div class='ctx'> extern const struct bench bench_trig_fmodret;</div><div class='ctx'> extern const struct bench bench_trig_tp;</div><div class='hunk'>@@ -558,6 +562,13 @@ extern const struct bench bench_htab_mem;</div><div class='ctx'> extern const struct bench bench_crypto_encrypt;</div><div class='ctx'> extern const struct bench bench_crypto_decrypt;</div><div class='ctx'> extern const struct bench bench_sockmap;</div><div class='add'>+extern const struct bench bench_lpm_trie_noop;</div><div class='add'>+extern const struct bench bench_lpm_trie_baseline;</div><div class='add'>+extern const struct bench bench_lpm_trie_lookup;</div><div class='add'>+extern const struct bench bench_lpm_trie_insert;</div><div class='add'>+extern const struct bench bench_lpm_trie_update;</div><div class='add'>+extern const struct bench bench_lpm_trie_delete;</div><div class='add'>+extern const struct bench bench_lpm_trie_free;</div><div class='ctx'> </div><div class='ctx'> static const struct bench *benchs[] = {</div><div class='ctx'> 	&amp;bench_count_global,</div><div class='hunk'>@@ -578,6 +589,8 @@ static const struct bench *benchs[] = {</div><div class='ctx'> 	&amp;bench_trig_kprobe_multi,</div><div class='ctx'> 	&amp;bench_trig_kretprobe_multi,</div><div class='ctx'> 	&amp;bench_trig_fentry,</div><div class='add'>+	&amp;bench_trig_kprobe_multi_all,</div><div class='add'>+	&amp;bench_trig_kretprobe_multi_all,</div><div class='ctx'> 	&amp;bench_trig_fexit,</div><div class='ctx'> 	&amp;bench_trig_fmodret,</div><div class='ctx'> 	&amp;bench_trig_tp,</div><div class='hunk'>@@ -625,6 +638,13 @@ static const struct bench *benchs[] = {</div><div class='ctx'> 	&amp;bench_crypto_encrypt,</div><div class='ctx'> 	&amp;bench_crypto_decrypt,</div><div class='ctx'> 	&amp;bench_sockmap,</div><div class='add'>+	&amp;bench_lpm_trie_noop,</div><div class='add'>+	&amp;bench_lpm_trie_baseline,</div><div class='add'>+	&amp;bench_lpm_trie_lookup,</div><div class='add'>+	&amp;bench_lpm_trie_insert,</div><div class='add'>+	&amp;bench_lpm_trie_update,</div><div class='add'>+	&amp;bench_lpm_trie_delete,</div><div class='add'>+	&amp;bench_lpm_trie_free,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void find_benchmark(void)</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bench.h b/tools/testing/selftests/bpf/bench.h<br/>index 005c401b3e22..bea323820ffb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bench.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bench.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bench.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bench.h</a></div><div class='hunk'>@@ -46,6 +46,7 @@ struct bench_res {</div><div class='ctx'> 	unsigned long gp_ns;</div><div class='ctx'> 	unsigned long gp_ct;</div><div class='ctx'> 	unsigned int stime;</div><div class='add'>+	unsigned long duration_ns;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bench {</div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/bench_lpm_trie_map.c b/tools/testing/selftests/bpf/benchs/bench_lpm_trie_map.c<br/>new file mode 100644<br/>index 000000000000..246f6cb3387d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_lpm_trie_map.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/bench_lpm_trie_map.c</a></div><div class='hunk'>@@ -0,0 +1,555 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025 Cloudflare */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All of these benchmarks operate on tries with keys in the range</div><div class='add'>+ * [0, args.nr_entries), i.e. there are no gaps or partially filled</div><div class='add'>+ * branches of the trie for any key &lt; args.nr_entries.</div><div class='add'>+ *</div><div class='add'>+ * This gives an idea of worst-case behaviour.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;argp.h&gt;</div><div class='add'>+#include &lt;linux/time64.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include "lpm_trie_bench.skel.h"</div><div class='add'>+#include "lpm_trie_map.skel.h"</div><div class='add'>+#include "bench.h"</div><div class='add'>+#include "testing_helpers.h"</div><div class='add'>+#include "progs/lpm_trie.h"</div><div class='add'>+</div><div class='add'>+static struct ctx {</div><div class='add'>+	struct lpm_trie_bench *bench;</div><div class='add'>+} ctx;</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	__u32 nr_entries;</div><div class='add'>+	__u32 prefixlen;</div><div class='add'>+	bool random;</div><div class='add'>+} args = {</div><div class='add'>+	.nr_entries = 0,</div><div class='add'>+	.prefixlen = 32,</div><div class='add'>+	.random = false,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	ARG_NR_ENTRIES = 9000,</div><div class='add'>+	ARG_PREFIX_LEN,</div><div class='add'>+	ARG_RANDOM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct argp_option opts[] = {</div><div class='add'>+	{ "nr_entries", ARG_NR_ENTRIES, "NR_ENTRIES", 0,</div><div class='add'>+	  "Number of unique entries in the LPM trie" },</div><div class='add'>+	{ "prefix_len", ARG_PREFIX_LEN, "PREFIX_LEN", 0,</div><div class='add'>+	  "Number of prefix bits to use in the LPM trie" },</div><div class='add'>+	{ "random", ARG_RANDOM, NULL, 0, "Access random keys during op" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static error_t lpm_parse_arg(int key, char *arg, struct argp_state *state)</div><div class='add'>+{</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	switch (key) {</div><div class='add'>+	case ARG_NR_ENTRIES:</div><div class='add'>+		ret = strtol(arg, NULL, 10);</div><div class='add'>+		if (ret &lt; 1 || ret &gt; UINT_MAX) {</div><div class='add'>+			fprintf(stderr, "Invalid nr_entries count.");</div><div class='add'>+			argp_usage(state);</div><div class='add'>+		}</div><div class='add'>+		args.nr_entries = ret;</div><div class='add'>+		break;</div><div class='add'>+	case ARG_PREFIX_LEN:</div><div class='add'>+		ret = strtol(arg, NULL, 10);</div><div class='add'>+		if (ret &lt; 1 || ret &gt; UINT_MAX) {</div><div class='add'>+			fprintf(stderr, "Invalid prefix_len value.");</div><div class='add'>+			argp_usage(state);</div><div class='add'>+		}</div><div class='add'>+		args.prefixlen = ret;</div><div class='add'>+		break;</div><div class='add'>+	case ARG_RANDOM:</div><div class='add'>+		args.random = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return ARGP_ERR_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct argp bench_lpm_trie_map_argp = {</div><div class='add'>+	.options = opts,</div><div class='add'>+	.parser = lpm_parse_arg,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void validate_common(void)</div><div class='add'>+{</div><div class='add'>+	if (env.consumer_cnt != 0) {</div><div class='add'>+		fprintf(stderr, "benchmark doesn't support consumer\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.nr_entries == 0) {</div><div class='add'>+		fprintf(stderr, "Missing --nr_entries parameter\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((1UL &lt;&lt; args.prefixlen) &lt; args.nr_entries) {</div><div class='add'>+		fprintf(stderr, "prefix_len value too small for nr_entries\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_insert_validate(void)</div><div class='add'>+{</div><div class='add'>+	validate_common();</div><div class='add'>+</div><div class='add'>+	if (env.producer_cnt != 1) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-insert requires a single producer\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.random) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-insert does not support --random\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_delete_validate(void)</div><div class='add'>+{</div><div class='add'>+	validate_common();</div><div class='add'>+</div><div class='add'>+	if (env.producer_cnt != 1) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-delete requires a single producer\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.random) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-delete does not support --random\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_free_validate(void)</div><div class='add'>+{</div><div class='add'>+	validate_common();</div><div class='add'>+</div><div class='add'>+	if (env.producer_cnt != 1) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-free requires a single producer\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.random) {</div><div class='add'>+		fprintf(stderr, "lpm-trie-free does not support --random\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct trie_key *keys;</div><div class='add'>+static __u32 *vals;</div><div class='add'>+</div><div class='add'>+static void fill_map(int map_fd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_map_batch_opts, opts,</div><div class='add'>+		.elem_flags = 0,</div><div class='add'>+		.flags = 0,</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	err = bpf_map_update_batch(map_fd, keys, vals, &amp;args.nr_entries, &amp;opts);</div><div class='add'>+	if (err) {</div><div class='add'>+		fprintf(stderr, "failed to batch update keys to map: %d\n",</div><div class='add'>+			-err);</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void empty_map(int map_fd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_map_batch_opts, opts,</div><div class='add'>+		.elem_flags = 0,</div><div class='add'>+		.flags = 0,</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	err = bpf_map_delete_batch(map_fd, keys, &amp;args.nr_entries, &amp;opts);</div><div class='add'>+	if (err) {</div><div class='add'>+		fprintf(stderr, "failed to batch delete keys for map: %d\n",</div><div class='add'>+			-err);</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void attach_prog(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ctx.bench = lpm_trie_bench__open_and_load();</div><div class='add'>+	if (!ctx.bench) {</div><div class='add'>+		fprintf(stderr, "failed to open skeleton\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx.bench-&gt;bss-&gt;nr_entries = args.nr_entries;</div><div class='add'>+	ctx.bench-&gt;bss-&gt;prefixlen = args.prefixlen;</div><div class='add'>+	ctx.bench-&gt;bss-&gt;random = args.random;</div><div class='add'>+</div><div class='add'>+	if (lpm_trie_bench__attach(ctx.bench)) {</div><div class='add'>+		fprintf(stderr, "failed to attach skeleton\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	keys = calloc(args.nr_entries, sizeof(*keys));</div><div class='add'>+	vals = calloc(args.nr_entries, sizeof(*vals));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; args.nr_entries; i++) {</div><div class='add'>+		struct trie_key *k = &amp;keys[i];</div><div class='add'>+		__u32 *v = &amp;vals[i];</div><div class='add'>+</div><div class='add'>+		k-&gt;prefixlen = args.prefixlen;</div><div class='add'>+		k-&gt;data = i;</div><div class='add'>+		*v = 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void attach_prog_and_fill_map(void)</div><div class='add'>+{</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	attach_prog();</div><div class='add'>+</div><div class='add'>+	fd = bpf_map__fd(ctx.bench-&gt;maps.trie_map);</div><div class='add'>+	fill_map(fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_noop_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_NOOP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_baseline_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_BASELINE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_lookup_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog_and_fill_map();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_LOOKUP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_insert_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_INSERT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_update_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog_and_fill_map();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_UPDATE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_delete_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog_and_fill_map();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_DELETE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_free_setup(void)</div><div class='add'>+{</div><div class='add'>+	attach_prog();</div><div class='add'>+	ctx.bench-&gt;bss-&gt;op = LPM_OP_FREE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lpm_measure(struct bench_res *res)</div><div class='add'>+{</div><div class='add'>+	res-&gt;hits = atomic_swap(&amp;ctx.bench-&gt;bss-&gt;hits, 0);</div><div class='add'>+	res-&gt;duration_ns = atomic_swap(&amp;ctx.bench-&gt;bss-&gt;duration_ns, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bench_reinit_map(void)</div><div class='add'>+{</div><div class='add'>+	int fd = bpf_map__fd(ctx.bench-&gt;maps.trie_map);</div><div class='add'>+</div><div class='add'>+	switch (ctx.bench-&gt;bss-&gt;op) {</div><div class='add'>+	case LPM_OP_INSERT:</div><div class='add'>+		/* trie_map needs to be emptied */</div><div class='add'>+		empty_map(fd);</div><div class='add'>+		break;</div><div class='add'>+	case LPM_OP_DELETE:</div><div class='add'>+		/* trie_map needs to be refilled */</div><div class='add'>+		fill_map(fd);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fprintf(stderr, "Unexpected REINIT return code for op %d\n",</div><div class='add'>+				ctx.bench-&gt;bss-&gt;op);</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* For NOOP, BASELINE, LOOKUP, INSERT, UPDATE, and DELETE */</div><div class='add'>+static void *lpm_producer(void *unused __always_unused)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	char in[ETH_HLEN]; /* unused */</div><div class='add'>+</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, opts, .data_in = in,</div><div class='add'>+		    .data_size_in = sizeof(in), .repeat = 1, );</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		int fd = bpf_program__fd(ctx.bench-&gt;progs.run_bench);</div><div class='add'>+		err = bpf_prog_test_run_opts(fd, &amp;opts);</div><div class='add'>+		if (err) {</div><div class='add'>+			fprintf(stderr, "failed to run BPF prog: %d\n", err);</div><div class='add'>+			exit(1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check for kernel error code */</div><div class='add'>+		if ((int)opts.retval &lt; 0) {</div><div class='add'>+			fprintf(stderr, "BPF prog returned error: %d\n",</div><div class='add'>+				opts.retval);</div><div class='add'>+			exit(1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (opts.retval) {</div><div class='add'>+		case LPM_BENCH_SUCCESS:</div><div class='add'>+			break;</div><div class='add'>+		case LPM_BENCH_REINIT_MAP:</div><div class='add'>+			bench_reinit_map();</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			fprintf(stderr, "Unexpected BPF prog return code %d for op %d\n",</div><div class='add'>+					opts.retval, ctx.bench-&gt;bss-&gt;op);</div><div class='add'>+			exit(1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *lpm_free_producer(void *unused __always_unused)</div><div class='add'>+{</div><div class='add'>+	while (true) {</div><div class='add'>+		struct lpm_trie_map *skel;</div><div class='add'>+</div><div class='add'>+		skel = lpm_trie_map__open_and_load();</div><div class='add'>+		if (!skel) {</div><div class='add'>+			fprintf(stderr, "failed to open skeleton\n");</div><div class='add'>+			exit(1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fill_map(bpf_map__fd(skel-&gt;maps.trie_free_map));</div><div class='add'>+		lpm_trie_map__destroy(skel);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The standard bench op_report_*() functions assume measurements are</div><div class='add'>+ * taken over a 1-second interval but operations that modify the map</div><div class='add'>+ * (INSERT, DELETE, and FREE) cannot run indefinitely without</div><div class='add'>+ * "resetting" the map to the initial state. Depending on the size of</div><div class='add'>+ * the map, this likely needs to happen before the 1-second timer fires.</div><div class='add'>+ *</div><div class='add'>+ * Calculate the fraction of a second over which the op measurement was</div><div class='add'>+ * taken (to ignore any time spent doing the reset) and report the</div><div class='add'>+ * throughput results per second.</div><div class='add'>+ */</div><div class='add'>+static void frac_second_report_progress(int iter, struct bench_res *res,</div><div class='add'>+					long delta_ns, double rate_divisor,</div><div class='add'>+					char rate)</div><div class='add'>+{</div><div class='add'>+	double hits_per_sec, hits_per_prod;</div><div class='add'>+</div><div class='add'>+	hits_per_sec = res-&gt;hits / rate_divisor /</div><div class='add'>+		(res-&gt;duration_ns / (double)NSEC_PER_SEC);</div><div class='add'>+	hits_per_prod = hits_per_sec / env.producer_cnt;</div><div class='add'>+</div><div class='add'>+	printf("Iter %3d (%7.3lfus): ", iter,</div><div class='add'>+	       (delta_ns - NSEC_PER_SEC) / 1000.0);</div><div class='add'>+	printf("hits %8.3lf%c/s (%7.3lf%c/prod)\n", hits_per_sec, rate,</div><div class='add'>+	       hits_per_prod, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void frac_second_report_final(struct bench_res res[], int res_cnt,</div><div class='add'>+				     double lat_divisor, double rate_divisor,</div><div class='add'>+				     char rate, const char *unit)</div><div class='add'>+{</div><div class='add'>+	double hits_mean = 0.0, hits_stddev = 0.0;</div><div class='add'>+	double latency = 0.0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; res_cnt; i++) {</div><div class='add'>+		double val = res[i].hits / rate_divisor /</div><div class='add'>+			     (res[i].duration_ns / (double)NSEC_PER_SEC);</div><div class='add'>+		hits_mean += val / (0.0 + res_cnt);</div><div class='add'>+		latency += res[i].duration_ns / res[i].hits / (0.0 + res_cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (res_cnt &gt; 1) {</div><div class='add'>+		for (i = 0; i &lt; res_cnt; i++) {</div><div class='add'>+			double val =</div><div class='add'>+				res[i].hits / rate_divisor /</div><div class='add'>+				(res[i].duration_ns / (double)NSEC_PER_SEC);</div><div class='add'>+			hits_stddev += (hits_mean - val) * (hits_mean - val) /</div><div class='add'>+				       (res_cnt - 1.0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hits_stddev = sqrt(hits_stddev);</div><div class='add'>+	}</div><div class='add'>+	printf("Summary: throughput %8.3lf \u00B1 %5.3lf %c ops/s (%7.3lf%c ops/prod), ",</div><div class='add'>+	       hits_mean, hits_stddev, rate, hits_mean / env.producer_cnt,</div><div class='add'>+	       rate);</div><div class='add'>+	printf("latency %8.3lf %s/op\n",</div><div class='add'>+	       latency / lat_divisor / env.producer_cnt, unit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void insert_ops_report_progress(int iter, struct bench_res *res,</div><div class='add'>+				       long delta_ns)</div><div class='add'>+{</div><div class='add'>+	double rate_divisor = 1000000.0;</div><div class='add'>+	char rate = 'M';</div><div class='add'>+</div><div class='add'>+	frac_second_report_progress(iter, res, delta_ns, rate_divisor, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void delete_ops_report_progress(int iter, struct bench_res *res,</div><div class='add'>+				       long delta_ns)</div><div class='add'>+{</div><div class='add'>+	double rate_divisor = 1000000.0;</div><div class='add'>+	char rate = 'M';</div><div class='add'>+</div><div class='add'>+	frac_second_report_progress(iter, res, delta_ns, rate_divisor, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_ops_report_progress(int iter, struct bench_res *res,</div><div class='add'>+				     long delta_ns)</div><div class='add'>+{</div><div class='add'>+	double rate_divisor = 1000.0;</div><div class='add'>+	char rate = 'K';</div><div class='add'>+</div><div class='add'>+	frac_second_report_progress(iter, res, delta_ns, rate_divisor, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void insert_ops_report_final(struct bench_res res[], int res_cnt)</div><div class='add'>+{</div><div class='add'>+	double lat_divisor = 1.0;</div><div class='add'>+	double rate_divisor = 1000000.0;</div><div class='add'>+	const char *unit = "ns";</div><div class='add'>+	char rate = 'M';</div><div class='add'>+</div><div class='add'>+	frac_second_report_final(res, res_cnt, lat_divisor, rate_divisor, rate,</div><div class='add'>+				 unit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void delete_ops_report_final(struct bench_res res[], int res_cnt)</div><div class='add'>+{</div><div class='add'>+	double lat_divisor = 1.0;</div><div class='add'>+	double rate_divisor = 1000000.0;</div><div class='add'>+	const char *unit = "ns";</div><div class='add'>+	char rate = 'M';</div><div class='add'>+</div><div class='add'>+	frac_second_report_final(res, res_cnt, lat_divisor, rate_divisor, rate,</div><div class='add'>+				 unit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_ops_report_final(struct bench_res res[], int res_cnt)</div><div class='add'>+{</div><div class='add'>+	double lat_divisor = 1000000.0;</div><div class='add'>+	double rate_divisor = 1000.0;</div><div class='add'>+	const char *unit = "ms";</div><div class='add'>+	char rate = 'K';</div><div class='add'>+</div><div class='add'>+	frac_second_report_final(res, res_cnt, lat_divisor, rate_divisor, rate,</div><div class='add'>+				 unit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* noop bench measures harness-overhead */</div><div class='add'>+const struct bench bench_lpm_trie_noop = {</div><div class='add'>+	.name = "lpm-trie-noop",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = validate_common,</div><div class='add'>+	.setup = lpm_noop_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = ops_report_progress,</div><div class='add'>+	.report_final = ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* baseline overhead for lookup and update */</div><div class='add'>+const struct bench bench_lpm_trie_baseline = {</div><div class='add'>+	.name = "lpm-trie-baseline",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = validate_common,</div><div class='add'>+	.setup = lpm_baseline_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = ops_report_progress,</div><div class='add'>+	.report_final = ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* measure cost of doing a lookup on existing entries in a full trie */</div><div class='add'>+const struct bench bench_lpm_trie_lookup = {</div><div class='add'>+	.name = "lpm-trie-lookup",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = validate_common,</div><div class='add'>+	.setup = lpm_lookup_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = ops_report_progress,</div><div class='add'>+	.report_final = ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* measure cost of inserting new entries into an empty trie */</div><div class='add'>+const struct bench bench_lpm_trie_insert = {</div><div class='add'>+	.name = "lpm-trie-insert",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = lpm_insert_validate,</div><div class='add'>+	.setup = lpm_insert_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = insert_ops_report_progress,</div><div class='add'>+	.report_final = insert_ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* measure cost of updating existing entries in a full trie */</div><div class='add'>+const struct bench bench_lpm_trie_update = {</div><div class='add'>+	.name = "lpm-trie-update",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = validate_common,</div><div class='add'>+	.setup = lpm_update_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = ops_report_progress,</div><div class='add'>+	.report_final = ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* measure cost of deleting existing entries from a full trie */</div><div class='add'>+const struct bench bench_lpm_trie_delete = {</div><div class='add'>+	.name = "lpm-trie-delete",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = lpm_delete_validate,</div><div class='add'>+	.setup = lpm_delete_setup,</div><div class='add'>+	.producer_thread = lpm_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = delete_ops_report_progress,</div><div class='add'>+	.report_final = delete_ops_report_final,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* measure cost of freeing a full trie */</div><div class='add'>+const struct bench bench_lpm_trie_free = {</div><div class='add'>+	.name = "lpm-trie-free",</div><div class='add'>+	.argp = &amp;bench_lpm_trie_map_argp,</div><div class='add'>+	.validate = lpm_free_validate,</div><div class='add'>+	.setup = lpm_free_setup,</div><div class='add'>+	.producer_thread = lpm_free_producer,</div><div class='add'>+	.measure = lpm_measure,</div><div class='add'>+	.report_progress = free_ops_report_progress,</div><div class='add'>+	.report_final = free_ops_report_final,</div><div class='add'>+};</div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/bench_ringbufs.c b/tools/testing/selftests/bpf/benchs/bench_ringbufs.c<br/>index e1ee979e6acc..01bdce692799 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_ringbufs.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/bench_ringbufs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_ringbufs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/bench_ringbufs.c</a></div><div class='hunk'>@@ -19,6 +19,8 @@ static struct {</div><div class='ctx'> 	int ringbuf_sz; /* per-ringbuf, in bytes */</div><div class='ctx'> 	bool ringbuf_use_output; /* use slower output API */</div><div class='ctx'> 	int perfbuf_sz; /* per-CPU size, in pages */</div><div class='add'>+	bool overwrite;</div><div class='add'>+	bool bench_producer;</div><div class='ctx'> } args = {</div><div class='ctx'> 	.back2back = false,</div><div class='ctx'> 	.batch_cnt = 500,</div><div class='hunk'>@@ -27,6 +29,8 @@ static struct {</div><div class='ctx'> 	.ringbuf_sz = 512 * 1024,</div><div class='ctx'> 	.ringbuf_use_output = false,</div><div class='ctx'> 	.perfbuf_sz = 128,</div><div class='add'>+	.overwrite = false,</div><div class='add'>+	.bench_producer = false,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -35,6 +39,8 @@ enum {</div><div class='ctx'> 	ARG_RB_BATCH_CNT = 2002,</div><div class='ctx'> 	ARG_RB_SAMPLED = 2003,</div><div class='ctx'> 	ARG_RB_SAMPLE_RATE = 2004,</div><div class='add'>+	ARG_RB_OVERWRITE = 2005,</div><div class='add'>+	ARG_RB_BENCH_PRODUCER = 2006,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct argp_option opts[] = {</div><div class='hunk'>@@ -43,6 +49,8 @@ static const struct argp_option opts[] = {</div><div class='ctx'> 	{ "rb-batch-cnt", ARG_RB_BATCH_CNT, "CNT", 0, "Set BPF-side record batch count"},</div><div class='ctx'> 	{ "rb-sampled", ARG_RB_SAMPLED, NULL, 0, "Notification sampling"},</div><div class='ctx'> 	{ "rb-sample-rate", ARG_RB_SAMPLE_RATE, "RATE", 0, "Notification sample rate"},</div><div class='add'>+	{ "rb-overwrite", ARG_RB_OVERWRITE, NULL, 0, "Overwrite mode"},</div><div class='add'>+	{ "rb-bench-producer", ARG_RB_BENCH_PRODUCER, NULL, 0, "Benchmark producer"},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -72,6 +80,12 @@ static error_t parse_arg(int key, char *arg, struct argp_state *state)</div><div class='ctx'> 			argp_usage(state);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case ARG_RB_OVERWRITE:</div><div class='add'>+		args.overwrite = true;</div><div class='add'>+		break;</div><div class='add'>+	case ARG_RB_BENCH_PRODUCER:</div><div class='add'>+		args.bench_producer = true;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return ARGP_ERR_UNKNOWN;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -95,8 +109,33 @@ static inline void bufs_trigger_batch(void)</div><div class='ctx'> </div><div class='ctx'> static void bufs_validate(void)</div><div class='ctx'> {</div><div class='del'>-	if (env.consumer_cnt != 1) {</div><div class='del'>-		fprintf(stderr, "rb-libbpf benchmark needs one consumer!\n");</div><div class='add'>+	if (args.bench_producer &amp;&amp; strcmp(env.bench_name, "rb-libbpf")) {</div><div class='add'>+		fprintf(stderr, "--rb-bench-producer only works with rb-libbpf!\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.overwrite &amp;&amp; !args.bench_producer) {</div><div class='add'>+		fprintf(stderr, "overwrite mode only works with --rb-bench-producer for now!\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.bench_producer &amp;&amp; env.consumer_cnt != 0) {</div><div class='add'>+		fprintf(stderr, "no consumer is needed for --rb-bench-producer!\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.bench_producer &amp;&amp; args.back2back) {</div><div class='add'>+		fprintf(stderr, "back-to-back mode makes no sense for --rb-bench-producer!\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (args.bench_producer &amp;&amp; args.sampled) {</div><div class='add'>+		fprintf(stderr, "sampling mode makes no sense for --rb-bench-producer!\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!args.bench_producer &amp;&amp; env.consumer_cnt != 1) {</div><div class='add'>+		fprintf(stderr, "benchmarks without --rb-bench-producer require exactly one consumer!\n");</div><div class='ctx'> 		exit(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -128,12 +167,17 @@ static void ringbuf_libbpf_measure(struct bench_res *res)</div><div class='ctx'> {</div><div class='ctx'> 	struct ringbuf_libbpf_ctx *ctx = &amp;ringbuf_libbpf_ctx;</div><div class='ctx'> </div><div class='del'>-	res-&gt;hits = atomic_swap(&amp;buf_hits.value, 0);</div><div class='add'>+	if (args.bench_producer)</div><div class='add'>+		res-&gt;hits = atomic_swap(&amp;ctx-&gt;skel-&gt;bss-&gt;hits, 0);</div><div class='add'>+	else</div><div class='add'>+		res-&gt;hits = atomic_swap(&amp;buf_hits.value, 0);</div><div class='ctx'> 	res-&gt;drops = atomic_swap(&amp;ctx-&gt;skel-&gt;bss-&gt;dropped, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct ringbuf_bench *ringbuf_setup_skeleton(void)</div><div class='ctx'> {</div><div class='add'>+	__u32 flags;</div><div class='add'>+	struct bpf_map *ringbuf;</div><div class='ctx'> 	struct ringbuf_bench *skel;</div><div class='ctx'> </div><div class='ctx'> 	setup_libbpf();</div><div class='hunk'>@@ -146,12 +190,19 @@ static struct ringbuf_bench *ringbuf_setup_skeleton(void)</div><div class='ctx'> </div><div class='ctx'> 	skel-&gt;rodata-&gt;batch_cnt = args.batch_cnt;</div><div class='ctx'> 	skel-&gt;rodata-&gt;use_output = args.ringbuf_use_output ? 1 : 0;</div><div class='add'>+	skel-&gt;rodata-&gt;bench_producer = args.bench_producer;</div><div class='ctx'> </div><div class='ctx'> 	if (args.sampled)</div><div class='ctx'> 		/* record data + header take 16 bytes */</div><div class='ctx'> 		skel-&gt;rodata-&gt;wakeup_data_size = args.sample_rate * 16;</div><div class='ctx'> </div><div class='del'>-	bpf_map__set_max_entries(skel-&gt;maps.ringbuf, args.ringbuf_sz);</div><div class='add'>+	ringbuf = skel-&gt;maps.ringbuf;</div><div class='add'>+	if (args.overwrite) {</div><div class='add'>+		flags = bpf_map__map_flags(ringbuf) | BPF_F_RB_OVERWRITE;</div><div class='add'>+		bpf_map__set_map_flags(ringbuf, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bpf_map__set_max_entries(ringbuf, args.ringbuf_sz);</div><div class='ctx'> </div><div class='ctx'> 	if (ringbuf_bench__load(skel)) {</div><div class='ctx'> 		fprintf(stderr, "failed to load skeleton\n");</div><div class='hunk'>@@ -171,10 +222,12 @@ static void ringbuf_libbpf_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct ringbuf_libbpf_ctx *ctx = &amp;ringbuf_libbpf_ctx;</div><div class='ctx'> 	struct bpf_link *link;</div><div class='add'>+	int map_fd;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;skel = ringbuf_setup_skeleton();</div><div class='del'>-	ctx-&gt;ringbuf = ring_buffer__new(bpf_map__fd(ctx-&gt;skel-&gt;maps.ringbuf),</div><div class='del'>-					buf_process_sample, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	map_fd = bpf_map__fd(ctx-&gt;skel-&gt;maps.ringbuf);</div><div class='add'>+	ctx-&gt;ringbuf = ring_buffer__new(map_fd, buf_process_sample, NULL, NULL);</div><div class='ctx'> 	if (!ctx-&gt;ringbuf) {</div><div class='ctx'> 		fprintf(stderr, "failed to create ringbuf\n");</div><div class='ctx'> 		exit(1);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/bench_sockmap.c b/tools/testing/selftests/bpf/benchs/bench_sockmap.c<br/>index 8ebf563a67a2..cfc072aa7fff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_sockmap.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/bench_sockmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_sockmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/bench_sockmap.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;argp.h&gt;</div><div class='ctx'> #include "bench.h"</div><div class='ctx'> #include "bench_sockmap_prog.skel.h"</div><div class='add'>+#include "bpf_util.h"</div><div class='ctx'> </div><div class='ctx'> #define FILE_SIZE (128 * 1024)</div><div class='ctx'> #define DATA_REPEAT_SIZE 10</div><div class='hunk'>@@ -124,8 +125,8 @@ static void bench_sockmap_prog_destroy(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; sizeof(ctx.fds); i++) {</div><div class='del'>-		if (ctx.fds[0] &gt; 0)</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ctx.fds); i++) {</div><div class='add'>+		if (ctx.fds[i] &gt; 0)</div><div class='ctx'> 			close(ctx.fds[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/bench_trigger.c b/tools/testing/selftests/bpf/benchs/bench_trigger.c<br/>index 82327657846e..34018fc3927f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_trigger.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/bench_trigger.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/bench_trigger.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/bench_trigger.c</a></div><div class='hunk'>@@ -180,10 +180,10 @@ static void trigger_kernel_count_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	setup_ctx();</div><div class='ctx'> 	bpf_program__set_autoload(ctx.skel-&gt;progs.trigger_driver, false);</div><div class='del'>-	bpf_program__set_autoload(ctx.skel-&gt;progs.trigger_count, true);</div><div class='add'>+	bpf_program__set_autoload(ctx.skel-&gt;progs.trigger_kernel_count, true);</div><div class='ctx'> 	load_ctx();</div><div class='ctx'> 	/* override driver program */</div><div class='del'>-	ctx.driver_prog_fd = bpf_program__fd(ctx.skel-&gt;progs.trigger_count);</div><div class='add'>+	ctx.driver_prog_fd = bpf_program__fd(ctx.skel-&gt;progs.trigger_kernel_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void trigger_kprobe_setup(void)</div><div class='hunk'>@@ -226,6 +226,65 @@ static void trigger_fentry_setup(void)</div><div class='ctx'> 	attach_bpf(ctx.skel-&gt;progs.bench_trigger_fentry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void attach_ksyms_all(struct bpf_program *empty, bool kretprobe)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_kprobe_multi_opts, opts);</div><div class='add'>+	char **syms = NULL;</div><div class='add'>+	size_t cnt = 0;</div><div class='add'>+</div><div class='add'>+	/* Some recursive functions will be skipped in</div><div class='add'>+	 * bpf_get_ksyms -&gt; skip_entry, as they can introduce sufficient</div><div class='add'>+	 * overhead. However, it's difficut to skip all the recursive</div><div class='add'>+	 * functions for a debug kernel.</div><div class='add'>+	 *</div><div class='add'>+	 * So, don't run the kprobe-multi-all and kretprobe-multi-all on</div><div class='add'>+	 * a debug kernel.</div><div class='add'>+	 */</div><div class='add'>+	if (bpf_get_ksyms(&amp;syms, &amp;cnt, true)) {</div><div class='add'>+		fprintf(stderr, "failed to get ksyms\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opts.syms = (const char **) syms;</div><div class='add'>+	opts.cnt = cnt;</div><div class='add'>+	opts.retprobe = kretprobe;</div><div class='add'>+	/* attach empty to all the kernel functions except bpf_get_numa_node_id. */</div><div class='add'>+	if (!bpf_program__attach_kprobe_multi_opts(empty, NULL, &amp;opts)) {</div><div class='add'>+		fprintf(stderr, "failed to attach bpf_program__attach_kprobe_multi_opts to all\n");</div><div class='add'>+		exit(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void trigger_kprobe_multi_all_setup(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_program *prog, *empty;</div><div class='add'>+</div><div class='add'>+	setup_ctx();</div><div class='add'>+	empty = ctx.skel-&gt;progs.bench_kprobe_multi_empty;</div><div class='add'>+	prog = ctx.skel-&gt;progs.bench_trigger_kprobe_multi;</div><div class='add'>+	bpf_program__set_autoload(empty, true);</div><div class='add'>+	bpf_program__set_autoload(prog, true);</div><div class='add'>+	load_ctx();</div><div class='add'>+</div><div class='add'>+	attach_ksyms_all(empty, false);</div><div class='add'>+	attach_bpf(prog);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void trigger_kretprobe_multi_all_setup(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_program *prog, *empty;</div><div class='add'>+</div><div class='add'>+	setup_ctx();</div><div class='add'>+	empty = ctx.skel-&gt;progs.bench_kretprobe_multi_empty;</div><div class='add'>+	prog = ctx.skel-&gt;progs.bench_trigger_kretprobe_multi;</div><div class='add'>+	bpf_program__set_autoload(empty, true);</div><div class='add'>+	bpf_program__set_autoload(prog, true);</div><div class='add'>+	load_ctx();</div><div class='add'>+</div><div class='add'>+	attach_ksyms_all(empty, true);</div><div class='add'>+	attach_bpf(prog);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void trigger_fexit_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	setup_ctx();</div><div class='hunk'>@@ -512,6 +571,8 @@ BENCH_TRIG_KERNEL(kretprobe, "kretprobe");</div><div class='ctx'> BENCH_TRIG_KERNEL(kprobe_multi, "kprobe-multi");</div><div class='ctx'> BENCH_TRIG_KERNEL(kretprobe_multi, "kretprobe-multi");</div><div class='ctx'> BENCH_TRIG_KERNEL(fentry, "fentry");</div><div class='add'>+BENCH_TRIG_KERNEL(kprobe_multi_all, "kprobe-multi-all");</div><div class='add'>+BENCH_TRIG_KERNEL(kretprobe_multi_all, "kretprobe-multi-all");</div><div class='ctx'> BENCH_TRIG_KERNEL(fexit, "fexit");</div><div class='ctx'> BENCH_TRIG_KERNEL(fmodret, "fmodret");</div><div class='ctx'> BENCH_TRIG_KERNEL(tp, "tp");</div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh b/tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh<br/>index 91e3567962ff..83e05e837871 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/run_bench_ringbufs.sh</a></div><div class='hunk'>@@ -49,3 +49,7 @@ for b in 1 2 3 4 8 12 16 20 24 28 32 36 40 44 48 52; do</div><div class='ctx'> 	summarize "rb-libbpf nr_prod $b" "$($RUN_RB_BENCH -p$b --rb-batch-cnt 50 rb-libbpf)"</div><div class='ctx'> done</div><div class='ctx'> </div><div class='add'>+header "Ringbuf, multi-producer contention in overwrite mode, no consumer"</div><div class='add'>+for b in 1 2 3 4 8 12 16 20 24 28 32 36 40 44 48 52; do</div><div class='add'>+	summarize "rb-prod nr_prod $b" "$($RUN_BENCH -p$b --rb-batch-cnt 50 --rb-overwrite --rb-bench-producer rb-libbpf)"</div><div class='add'>+done</div><div class='head'>diff --git a/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh b/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh<br/>index a690f5a68b6b..f7573708a0c3 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/benchs/run_bench_trigger.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/benchs/run_bench_trigger.sh?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/benchs/run_bench_trigger.sh</a></div><div class='hunk'>@@ -6,8 +6,8 @@ def_tests=( \</div><div class='ctx'> 	usermode-count kernel-count syscall-count \</div><div class='ctx'> 	fentry fexit fmodret \</div><div class='ctx'> 	rawtp tp \</div><div class='del'>-	kprobe kprobe-multi \</div><div class='del'>-	kretprobe kretprobe-multi \</div><div class='add'>+	kprobe kprobe-multi kprobe-multi-all \</div><div class='add'>+	kretprobe kretprobe-multi kretprobe-multi-all \</div><div class='ctx'> )</div><div class='ctx'> </div><div class='ctx'> tests=("$@")</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bpf_arena_list.h b/tools/testing/selftests/bpf/bpf_arena_list.h<br/>index 85dbc3ea4da5..e16fa7d95fcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_arena_list.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bpf_arena_list.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_arena_list.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bpf_arena_list.h</a></div><div class='hunk'>@@ -64,14 +64,12 @@ static inline void list_add_head(arena_list_node_t *n, arena_list_head_t *h)</div><div class='ctx'> </div><div class='ctx'> static inline void __list_del(arena_list_node_t *n)</div><div class='ctx'> {</div><div class='del'>-	arena_list_node_t *next = n-&gt;next, *tmp;</div><div class='add'>+	arena_list_node_t *next = n-&gt;next;</div><div class='ctx'> 	arena_list_node_t * __arena *pprev = n-&gt;pprev;</div><div class='ctx'> </div><div class='ctx'> 	cast_user(next);</div><div class='ctx'> 	cast_kern(pprev);</div><div class='del'>-	tmp = *pprev;</div><div class='del'>-	cast_kern(tmp);</div><div class='del'>-	WRITE_ONCE(tmp, next);</div><div class='add'>+	WRITE_ONCE(*pprev, next);</div><div class='ctx'> 	if (next) {</div><div class='ctx'> 		cast_user(pprev);</div><div class='ctx'> 		cast_kern(next);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bpf_arena_strsearch.h b/tools/testing/selftests/bpf/bpf_arena_strsearch.h<br/>new file mode 100644<br/>index 000000000000..c1b6eaa905bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_arena_strsearch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bpf_arena_strsearch.h</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */</div><div class='add'>+/* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+#pragma once</div><div class='add'>+#include "bpf_arena_common.h"</div><div class='add'>+</div><div class='add'>+__noinline int bpf_arena_strlen(const char __arena *s __arg_arena)</div><div class='add'>+{</div><div class='add'>+	const char __arena *sc;</div><div class='add'>+</div><div class='add'>+	for (sc = s; *sc != '\0'; ++sc)</div><div class='add'>+		cond_break;</div><div class='add'>+	return sc - s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * glob_match - Shell-style pattern matching, like !fnmatch(pat, str, 0)</div><div class='add'>+ * @pat: Shell-style pattern to match, e.g. "*.[ch]".</div><div class='add'>+ * @str: String to match.  The pattern must match the entire string.</div><div class='add'>+ *</div><div class='add'>+ * Perform shell-style glob matching, returning true (1) if the match</div><div class='add'>+ * succeeds, or false (0) if it fails.  Equivalent to !fnmatch(@pat, @str, 0).</div><div class='add'>+ *</div><div class='add'>+ * Pattern metacharacters are ?, *, [ and \.</div><div class='add'>+ * (And, inside character classes, !, - and ].)</div><div class='add'>+ *</div><div class='add'>+ * This is small and simple implementation intended for device blacklists</div><div class='add'>+ * where a string is matched against a number of patterns.  Thus, it</div><div class='add'>+ * does not preprocess the patterns.  It is non-recursive, and run-time</div><div class='add'>+ * is at most quadratic: strlen(@str)*strlen(@pat).</div><div class='add'>+ *</div><div class='add'>+ * An example of the worst case is glob_match("*aaaaa", "aaaaaaaaaa");</div><div class='add'>+ * it takes 6 passes over the pattern before matching the string.</div><div class='add'>+ *</div><div class='add'>+ * Like !fnmatch(@pat, @str, 0) and unlike the shell, this does NOT</div><div class='add'>+ * treat / or leading . specially; it isn't actually used for pathnames.</div><div class='add'>+ *</div><div class='add'>+ * Note that according to glob(7) (and unlike bash), character classes</div><div class='add'>+ * are complemented by a leading !; this does not support the regex-style</div><div class='add'>+ * [^a-z] syntax.</div><div class='add'>+ *</div><div class='add'>+ * An opening bracket without a matching close is matched literally.</div><div class='add'>+ */</div><div class='add'>+__noinline bool glob_match(char const __arena *pat __arg_arena, char const __arena *str __arg_arena)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Backtrack to previous * on mismatch and retry starting one</div><div class='add'>+	 * character later in the string.  Because * matches all characters</div><div class='add'>+	 * (no exception for /), it can be easily proved that there's</div><div class='add'>+	 * never a need to backtrack multiple levels.</div><div class='add'>+	 */</div><div class='add'>+	char const __arena *back_pat = NULL, *back_str;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Loop over each token (character or class) in pat, matching</div><div class='add'>+	 * it against the remaining unmatched tail of str.  Return false</div><div class='add'>+	 * on mismatch, or true after matching the trailing nul bytes.</div><div class='add'>+	 */</div><div class='add'>+	for (;;) {</div><div class='add'>+		unsigned char c = *str++;</div><div class='add'>+		unsigned char d = *pat++;</div><div class='add'>+</div><div class='add'>+		switch (d) {</div><div class='add'>+		case '?':	/* Wildcard: anything but nul */</div><div class='add'>+			if (c == '\0')</div><div class='add'>+				return false;</div><div class='add'>+			break;</div><div class='add'>+		case '*':	/* Any-length wildcard */</div><div class='add'>+			if (*pat == '\0')	/* Optimize trailing * case */</div><div class='add'>+				return true;</div><div class='add'>+			back_pat = pat;</div><div class='add'>+			back_str = --str;	/* Allow zero-length match */</div><div class='add'>+			break;</div><div class='add'>+		case '[': {	/* Character class */</div><div class='add'>+			bool match = false, inverted = (*pat == '!');</div><div class='add'>+			char const __arena *class = pat + inverted;</div><div class='add'>+			unsigned char a = *class++;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Iterate over each span in the character class.</div><div class='add'>+			 * A span is either a single character a, or a</div><div class='add'>+			 * range a-b.  The first span may begin with ']'.</div><div class='add'>+			 */</div><div class='add'>+			do {</div><div class='add'>+				unsigned char b = a;</div><div class='add'>+</div><div class='add'>+				if (a == '\0')	/* Malformed */</div><div class='add'>+					goto literal;</div><div class='add'>+</div><div class='add'>+				if (class[0] == '-' &amp;&amp; class[1] != ']') {</div><div class='add'>+					b = class[1];</div><div class='add'>+</div><div class='add'>+					if (b == '\0')</div><div class='add'>+						goto literal;</div><div class='add'>+</div><div class='add'>+					class += 2;</div><div class='add'>+					/* Any special action if a &gt; b? */</div><div class='add'>+				}</div><div class='add'>+				match |= (a &lt;= c &amp;&amp; c &lt;= b);</div><div class='add'>+				cond_break;</div><div class='add'>+			} while ((a = *class++) != ']');</div><div class='add'>+</div><div class='add'>+			if (match == inverted)</div><div class='add'>+				goto backtrack;</div><div class='add'>+			pat = class;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case '\\':</div><div class='add'>+			d = *pat++;</div><div class='add'>+			__attribute__((__fallthrough__));</div><div class='add'>+		default:	/* Literal character */</div><div class='add'>+literal:</div><div class='add'>+			if (c == d) {</div><div class='add'>+				if (d == '\0')</div><div class='add'>+					return true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+backtrack:</div><div class='add'>+			if (c == '\0' || !back_pat)</div><div class='add'>+				return false;	/* No point continuing */</div><div class='add'>+			/* Try again from last *, one character later in str. */</div><div class='add'>+			pat = back_pat;</div><div class='add'>+			str = ++back_str;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		cond_break;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bpf_experimental.h b/tools/testing/selftests/bpf/bpf_experimental.h<br/>index da7e230f2781..2cd9165c7348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_experimental.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bpf_experimental.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_experimental.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bpf_experimental.h</a></div><div class='hunk'>@@ -219,7 +219,7 @@ extern void bpf_put_file(struct file *file) __ksym;</div><div class='ctx'>  *	including the NULL termination character, stored in the supplied</div><div class='ctx'>  *	buffer. On error, a negative integer is returned.</div><div class='ctx'>  */</div><div class='del'>-extern int bpf_path_d_path(struct path *path, char *buf, size_t buf__sz) __ksym;</div><div class='add'>+extern int bpf_path_d_path(const struct path *path, char *buf, size_t buf__sz) __ksym;</div><div class='ctx'> </div><div class='ctx'> /* This macro must be used to mark the exception callback corresponding to the</div><div class='ctx'>  * main program. For example:</div><div class='hunk'>@@ -599,4 +599,58 @@ extern void bpf_iter_dmabuf_destroy(struct bpf_iter_dmabuf *it) __weak __ksym;</div><div class='ctx'> extern int bpf_cgroup_read_xattr(struct cgroup *cgroup, const char *name__str,</div><div class='ctx'> 				 struct bpf_dynptr *value_p) __weak __ksym;</div><div class='ctx'> </div><div class='add'>+#define PREEMPT_BITS	8</div><div class='add'>+#define SOFTIRQ_BITS	8</div><div class='add'>+#define HARDIRQ_BITS	4</div><div class='add'>+#define NMI_BITS	4</div><div class='add'>+</div><div class='add'>+#define PREEMPT_SHIFT	0</div><div class='add'>+#define SOFTIRQ_SHIFT	(PREEMPT_SHIFT + PREEMPT_BITS)</div><div class='add'>+#define HARDIRQ_SHIFT	(SOFTIRQ_SHIFT + SOFTIRQ_BITS)</div><div class='add'>+#define NMI_SHIFT	(HARDIRQ_SHIFT + HARDIRQ_BITS)</div><div class='add'>+</div><div class='add'>+#define __IRQ_MASK(x)	((1UL &lt;&lt; (x))-1)</div><div class='add'>+</div><div class='add'>+#define SOFTIRQ_MASK	(__IRQ_MASK(SOFTIRQ_BITS) &lt;&lt; SOFTIRQ_SHIFT)</div><div class='add'>+#define HARDIRQ_MASK	(__IRQ_MASK(HARDIRQ_BITS) &lt;&lt; HARDIRQ_SHIFT)</div><div class='add'>+#define NMI_MASK	(__IRQ_MASK(NMI_BITS)     &lt;&lt; NMI_SHIFT)</div><div class='add'>+</div><div class='add'>+extern bool CONFIG_PREEMPT_RT __kconfig __weak;</div><div class='add'>+#ifdef bpf_target_x86</div><div class='add'>+extern const int __preempt_count __ksym;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct task_struct___preempt_rt {</div><div class='add'>+	int softirq_disable_cnt;</div><div class='add'>+} __attribute__((preserve_access_index));</div><div class='add'>+</div><div class='add'>+static inline int get_preempt_count(void)</div><div class='add'>+{</div><div class='add'>+#if defined(bpf_target_x86)</div><div class='add'>+	return *(int *) bpf_this_cpu_ptr(&amp;__preempt_count);</div><div class='add'>+#elif defined(bpf_target_arm64)</div><div class='add'>+	return bpf_get_current_task_btf()-&gt;thread_info.preempt.count;</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Description</div><div class='add'>+ *	Report whether it is in interrupt context. Only works on the following archs:</div><div class='add'>+ *	* x86</div><div class='add'>+ *	* arm64</div><div class='add'>+ */</div><div class='add'>+static inline int bpf_in_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	struct task_struct___preempt_rt *tsk;</div><div class='add'>+	int pcnt;</div><div class='add'>+</div><div class='add'>+	pcnt = get_preempt_count();</div><div class='add'>+	if (!CONFIG_PREEMPT_RT)</div><div class='add'>+		return pcnt &amp; (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_MASK);</div><div class='add'>+</div><div class='add'>+	tsk = (void *) bpf_get_current_task_btf();</div><div class='add'>+	return (pcnt &amp; (NMI_MASK | HARDIRQ_MASK)) |</div><div class='add'>+	       (tsk-&gt;softirq_disable_cnt &amp; SOFTIRQ_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bpf_kfuncs.h b/tools/testing/selftests/bpf/bpf_kfuncs.h<br/>index 9386dfe8b884..e0189254bb6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_kfuncs.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bpf_kfuncs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_kfuncs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bpf_kfuncs.h</a></div><div class='hunk'>@@ -19,14 +19,17 @@ extern int bpf_dynptr_from_skb(struct __sk_buff *skb, __u64 flags,</div><div class='ctx'> extern int bpf_dynptr_from_xdp(struct xdp_md *xdp, __u64 flags,</div><div class='ctx'> 			       struct bpf_dynptr *ptr__uninit) __ksym __weak;</div><div class='ctx'> </div><div class='add'>+extern int bpf_dynptr_from_skb_meta(struct __sk_buff *skb, __u64 flags,</div><div class='add'>+				    struct bpf_dynptr *ptr__uninit) __ksym __weak;</div><div class='add'>+</div><div class='ctx'> /* Description</div><div class='ctx'>  *  Obtain a read-only pointer to the dynptr's data</div><div class='ctx'>  * Returns</div><div class='ctx'>  *  Either a direct pointer to the dynptr data or a pointer to the user-provided</div><div class='ctx'>  *  buffer if unable to obtain a direct pointer</div><div class='ctx'>  */</div><div class='del'>-extern void *bpf_dynptr_slice(const struct bpf_dynptr *ptr, __u32 offset,</div><div class='del'>-			      void *buffer, __u32 buffer__szk) __ksym __weak;</div><div class='add'>+extern void *bpf_dynptr_slice(const struct bpf_dynptr *ptr, __u64 offset,</div><div class='add'>+			      void *buffer, __u64 buffer__szk) __ksym __weak;</div><div class='ctx'> </div><div class='ctx'> /* Description</div><div class='ctx'>  *  Obtain a read-write pointer to the dynptr's data</div><div class='hunk'>@@ -34,13 +37,13 @@ extern void *bpf_dynptr_slice(const struct bpf_dynptr *ptr, __u32 offset,</div><div class='ctx'>  *  Either a direct pointer to the dynptr data or a pointer to the user-provided</div><div class='ctx'>  *  buffer if unable to obtain a direct pointer</div><div class='ctx'>  */</div><div class='del'>-extern void *bpf_dynptr_slice_rdwr(const struct bpf_dynptr *ptr, __u32 offset,</div><div class='del'>-			      void *buffer, __u32 buffer__szk) __ksym __weak;</div><div class='add'>+extern void *bpf_dynptr_slice_rdwr(const struct bpf_dynptr *ptr, __u64 offset, void *buffer,</div><div class='add'>+				   __u64 buffer__szk) __ksym __weak;</div><div class='ctx'> </div><div class='del'>-extern int bpf_dynptr_adjust(const struct bpf_dynptr *ptr, __u32 start, __u32 end) __ksym __weak;</div><div class='add'>+extern int bpf_dynptr_adjust(const struct bpf_dynptr *ptr, __u64 start, __u64 end) __ksym __weak;</div><div class='ctx'> extern bool bpf_dynptr_is_null(const struct bpf_dynptr *ptr) __ksym __weak;</div><div class='ctx'> extern bool bpf_dynptr_is_rdonly(const struct bpf_dynptr *ptr) __ksym __weak;</div><div class='del'>-extern __u32 bpf_dynptr_size(const struct bpf_dynptr *ptr) __ksym __weak;</div><div class='add'>+extern __u64 bpf_dynptr_size(const struct bpf_dynptr *ptr) __ksym __weak;</div><div class='ctx'> extern int bpf_dynptr_clone(const struct bpf_dynptr *ptr, struct bpf_dynptr *clone__init) __ksym __weak;</div><div class='ctx'> </div><div class='ctx'> /* Description</div><div class='head'>diff --git a/tools/testing/selftests/bpf/bpf_util.h b/tools/testing/selftests/bpf/bpf_util.h<br/>index 5f6963a320d7..4bc2d25f33e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_util.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/bpf_util.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/bpf_util.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/bpf_util.h</a></div><div class='hunk'>@@ -67,6 +67,9 @@ static inline void bpf_strlcpy(char *dst, const char *src, size_t sz)</div><div class='ctx'> #define sys_gettid() syscall(SYS_gettid)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* and poison usage to ensure it does not creep back in. */</div><div class='add'>+#pragma GCC poison gettid</div><div class='add'>+</div><div class='ctx'> #ifndef ENOTSUPP</div><div class='ctx'> #define ENOTSUPP 524</div><div class='ctx'> #endif</div><div class='head'>diff --git a/tools/testing/selftests/bpf/cgroup_helpers.c b/tools/testing/selftests/bpf/cgroup_helpers.c<br/>index 15f626014872..20cede4db3ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/cgroup_helpers.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/cgroup_helpers.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/cgroup_helpers.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/cgroup_helpers.c</a></div><div class='hunk'>@@ -412,6 +412,26 @@ void remove_cgroup(const char *relative_path)</div><div class='ctx'> 		log_err("rmdiring cgroup %s .. %s", relative_path, cgroup_path);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * remove_cgroup_pid() - Remove a cgroup setup by process identified by PID</div><div class='add'>+ * @relative_path: The cgroup path, relative to the workdir, to remove</div><div class='add'>+ * @pid: PID to be used to find cgroup_path</div><div class='add'>+ *</div><div class='add'>+ * This function expects a cgroup to already be created, relative to the cgroup</div><div class='add'>+ * work dir. It also expects the cgroup doesn't have any children or live</div><div class='add'>+ * processes and it removes the cgroup.</div><div class='add'>+ *</div><div class='add'>+ * On failure, it will print an error to stderr.</div><div class='add'>+ */</div><div class='add'>+void remove_cgroup_pid(const char *relative_path, int pid)</div><div class='add'>+{</div><div class='add'>+	char cgroup_path[PATH_MAX + 1];</div><div class='add'>+</div><div class='add'>+	format_cgroup_path_pid(cgroup_path, relative_path, pid);</div><div class='add'>+	if (rmdir(cgroup_path))</div><div class='add'>+		log_err("rmdiring cgroup %s .. %s", relative_path, cgroup_path);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * create_and_get_cgroup() - Create a cgroup, relative to workdir, and get the FD</div><div class='ctx'>  * @relative_path: The cgroup path, relative to the workdir, to join</div><div class='head'>diff --git a/tools/testing/selftests/bpf/cgroup_helpers.h b/tools/testing/selftests/bpf/cgroup_helpers.h<br/>index 182e1ac36c95..3857304be874 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/cgroup_helpers.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/cgroup_helpers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/cgroup_helpers.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/cgroup_helpers.h</a></div><div class='hunk'>@@ -19,6 +19,7 @@ int cgroup_setup_and_join(const char *relative_path);</div><div class='ctx'> int get_root_cgroup(void);</div><div class='ctx'> int create_and_get_cgroup(const char *relative_path);</div><div class='ctx'> void remove_cgroup(const char *relative_path);</div><div class='add'>+void remove_cgroup_pid(const char *relative_path, int pid);</div><div class='ctx'> unsigned long long get_cgroup_id(const char *relative_path);</div><div class='ctx'> int get_cgroup1_hierarchy_id(const char *subsys_name);</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/config b/tools/testing/selftests/bpf/config<br/>index 8916ab814a3e..558839e3c185 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config</a></div><div class='hunk'>@@ -50,6 +50,7 @@ CONFIG_IPV6_SIT=y</div><div class='ctx'> CONFIG_IPV6_TUNNEL=y</div><div class='ctx'> CONFIG_KEYS=y</div><div class='ctx'> CONFIG_LIRC=y</div><div class='add'>+CONFIG_LIVEPATCH=y</div><div class='ctx'> CONFIG_LWTUNNEL=y</div><div class='ctx'> CONFIG_MODULE_SIG=y</div><div class='ctx'> CONFIG_MODULE_SRCVERSION_ALL=y</div><div class='hunk'>@@ -61,6 +62,7 @@ CONFIG_MPLS_IPTUNNEL=y</div><div class='ctx'> CONFIG_MPLS_ROUTING=y</div><div class='ctx'> CONFIG_MPTCP=y</div><div class='ctx'> CONFIG_NET_ACT_GACT=y</div><div class='add'>+CONFIG_NET_ACT_MIRRED=y</div><div class='ctx'> CONFIG_NET_ACT_SKBMOD=y</div><div class='ctx'> CONFIG_NET_CLS=y</div><div class='ctx'> CONFIG_NET_CLS_ACT=y</div><div class='hunk'>@@ -110,6 +112,8 @@ CONFIG_IP6_NF_FILTER=y</div><div class='ctx'> CONFIG_NF_NAT=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_RC_CORE=y</div><div class='add'>+CONFIG_SAMPLES=y</div><div class='add'>+CONFIG_SAMPLE_LIVEPATCH=m</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_SECURITYFS=y</div><div class='ctx'> CONFIG_SYN_COOKIES=y</div><div class='hunk'>@@ -122,3 +126,8 @@ CONFIG_XDP_SOCKETS=y</div><div class='ctx'> CONFIG_XFRM_INTERFACE=y</div><div class='ctx'> CONFIG_TCP_CONG_DCTCP=y</div><div class='ctx'> CONFIG_TCP_CONG_BBR=y</div><div class='add'>+CONFIG_INFINIBAND=y</div><div class='add'>+CONFIG_SMC=y</div><div class='add'>+CONFIG_SMC_HS_CTRL_BPF=y</div><div class='add'>+CONFIG_DIBS=y</div><div class='add'>+CONFIG_DIBS_LO=y
\ No newline at end of file</div><div class='head'>diff --git a/tools/testing/selftests/bpf/config.aarch64 b/tools/testing/selftests/bpf/config.aarch64<br/>index e1495a4bbc99..7efad36ceb26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.aarch64?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.aarch64</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.aarch64?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config.aarch64</a></div><div class='hunk'>@@ -31,10 +31,7 @@ CONFIG_COMPAT=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CRASH_DUMP=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=y</div><div class='del'>-CONFIG_CRYPTO_USER_API_SKCIPHER=y</div><div class='ctx'> CONFIG_DEBUG_ATOMIC_SLEEP=y</div><div class='del'>-CONFIG_DEBUG_INFO_BTF=y</div><div class='del'>-CONFIG_DEBUG_INFO_DWARF4=y</div><div class='ctx'> CONFIG_DEBUG_INFO_REDUCED=n</div><div class='ctx'> CONFIG_DEBUG_LIST=y</div><div class='ctx'> CONFIG_DEBUG_LOCKDEP=y</div><div class='hunk'>@@ -46,7 +43,6 @@ CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DRM=y</div><div class='del'>-CONFIG_DUMMY=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT4_FS_SECURITY=y</div><div class='hunk'>@@ -70,13 +66,11 @@ CONFIG_HZ_100=y</div><div class='ctx'> CONFIG_IDLE_PAGE_TRACKING=y</div><div class='ctx'> CONFIG_IKHEADERS=y</div><div class='ctx'> CONFIG_INET6_ESP=y</div><div class='del'>-CONFIG_INET_ESP=y</div><div class='ctx'> CONFIG_INET=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_IP_ADVANCED_ROUTER=y</div><div class='ctx'> CONFIG_IP_MULTICAST=y</div><div class='ctx'> CONFIG_IP_MULTIPLE_TABLES=y</div><div class='del'>-CONFIG_IP_NF_IPTABLES=y</div><div class='ctx'> CONFIG_IPV6_SEG6_LWTUNNEL=y</div><div class='ctx'> CONFIG_IPVLAN=y</div><div class='ctx'> CONFIG_JUMP_LABEL=y</div><div class='hunk'>@@ -97,22 +91,18 @@ CONFIG_MEMORY_HOTPLUG=y</div><div class='ctx'> CONFIG_MEMORY_HOTREMOVE=y</div><div class='ctx'> CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_NET_ACT_BPF=y</div><div class='del'>-CONFIG_NET_ACT_GACT=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_BPF=y</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_MARK=y</div><div class='ctx'> CONFIG_NET_KEY=y</div><div class='del'>-CONFIG_NET_SCH_FQ=y</div><div class='ctx'> CONFIG_NET_VRF=y</div><div class='ctx'> CONFIG_NET=y</div><div class='del'>-CONFIG_NF_TABLES=y</div><div class='ctx'> CONFIG_NLMON=y</div><div class='ctx'> CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='ctx'> CONFIG_NUMA=y</div><div class='ctx'> CONFIG_OVERLAY_FS=y</div><div class='ctx'> CONFIG_PACKET_DIAG=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PCI_HOST_GENERIC=y</div><div class='hunk'>@@ -149,7 +139,6 @@ CONFIG_TASK_XACCT=y</div><div class='ctx'> CONFIG_TCG_TIS=y</div><div class='ctx'> CONFIG_TCG_TPM=y</div><div class='ctx'> CONFIG_TCP_CONG_ADVANCED=y</div><div class='del'>-CONFIG_TCP_CONG_DCTCP=y</div><div class='ctx'> CONFIG_TLS=y</div><div class='ctx'> CONFIG_TMPFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='hunk'>@@ -161,6 +150,5 @@ CONFIG_UPROBES=y</div><div class='ctx'> CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_VETH=y</div><div class='ctx'> CONFIG_VLAN_8021Q=y</div><div class='del'>-CONFIG_VSOCKETS=y</div><div class='ctx'> CONFIG_VSOCKETS_LOOPBACK=y</div><div class='ctx'> CONFIG_XFRM_USER=y</div><div class='head'>diff --git a/tools/testing/selftests/bpf/config.ppc64el b/tools/testing/selftests/bpf/config.ppc64el<br/>index 9acf389dc4ce..b53afb5e0b71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.ppc64el?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.ppc64el</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.ppc64el?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config.ppc64el</a></div><div class='hunk'>@@ -54,7 +54,6 @@ CONFIG_NET=y</div><div class='ctx'> CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_NONPORTABLE=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='del'>-CONFIG_PACKET=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PCI_HOST_GENERIC=y</div><div class='head'>diff --git a/tools/testing/selftests/bpf/config.riscv64 b/tools/testing/selftests/bpf/config.riscv64<br/>index bb7043a80e1a..7bee24a79a71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.riscv64?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.riscv64</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.riscv64?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config.riscv64</a></div><div class='hunk'>@@ -48,7 +48,6 @@ CONFIG_NET_VRF=y</div><div class='ctx'> CONFIG_NONPORTABLE=y</div><div class='ctx'> CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='del'>-CONFIG_PACKET=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PCI=y</div><div class='head'>diff --git a/tools/testing/selftests/bpf/config.s390x b/tools/testing/selftests/bpf/config.s390x<br/>index 26c3bc2ce11d..db61878148e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.s390x?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.s390x</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.s390x?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config.s390x</a></div><div class='hunk'>@@ -22,10 +22,7 @@ CONFIG_CHECKPOINT_RESTORE=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CRASH_DUMP=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=y</div><div class='del'>-CONFIG_CRYPTO_USER_API_SKCIPHER=y</div><div class='ctx'> CONFIG_DEBUG_ATOMIC_SLEEP=y</div><div class='del'>-CONFIG_DEBUG_INFO_BTF=y</div><div class='del'>-CONFIG_DEBUG_INFO_DWARF4=y</div><div class='ctx'> CONFIG_DEBUG_LIST=y</div><div class='ctx'> CONFIG_DEBUG_LOCKDEP=y</div><div class='ctx'> CONFIG_DEBUG_NOTIFIERS=y</div><div class='hunk'>@@ -56,11 +53,9 @@ CONFIG_IDLE_PAGE_TRACKING=y</div><div class='ctx'> CONFIG_IKHEADERS=y</div><div class='ctx'> CONFIG_INET6_ESP=y</div><div class='ctx'> CONFIG_INET=y</div><div class='del'>-CONFIG_INET_ESP=y</div><div class='ctx'> CONFIG_IP_ADVANCED_ROUTER=y</div><div class='ctx'> CONFIG_IP_MULTICAST=y</div><div class='ctx'> CONFIG_IP_MULTIPLE_TABLES=y</div><div class='del'>-CONFIG_IP_NF_IPTABLES=y</div><div class='ctx'> CONFIG_IPV6_SEG6_LWTUNNEL=y</div><div class='ctx'> CONFIG_IPVLAN=y</div><div class='ctx'> CONFIG_JUMP_LABEL=y</div><div class='hunk'>@@ -83,18 +78,14 @@ CONFIG_MEMORY_HOTREMOVE=y</div><div class='ctx'> CONFIG_NAMESPACES=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_NET_ACT_BPF=y</div><div class='del'>-CONFIG_NET_ACT_GACT=y</div><div class='ctx'> CONFIG_NET_KEY=y</div><div class='del'>-CONFIG_NET_SCH_FQ=y</div><div class='ctx'> CONFIG_NET_VRF=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_NETFILTER_XT_MATCH_BPF=y</div><div class='ctx'> CONFIG_NETFILTER_XT_TARGET_MARK=y</div><div class='del'>-CONFIG_NF_TABLES=y</div><div class='ctx'> CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_NR_CPUS=256</div><div class='ctx'> CONFIG_NUMA=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PCI=y</div><div class='hunk'>@@ -119,7 +110,6 @@ CONFIG_TASK_IO_ACCOUNTING=y</div><div class='ctx'> CONFIG_TASK_XACCT=y</div><div class='ctx'> CONFIG_TASKSTATS=y</div><div class='ctx'> CONFIG_TCP_CONG_ADVANCED=y</div><div class='del'>-CONFIG_TCP_CONG_DCTCP=y</div><div class='ctx'> CONFIG_TLS=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_TMPFS_POSIX_ACL=y</div><div class='hunk'>@@ -131,6 +121,5 @@ CONFIG_UPROBES=y</div><div class='ctx'> CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_VETH=y</div><div class='ctx'> CONFIG_VLAN_8021Q=y</div><div class='del'>-CONFIG_VSOCKETS=y</div><div class='ctx'> CONFIG_VSOCKETS_LOOPBACK=y</div><div class='ctx'> CONFIG_XFRM_USER=y</div><div class='head'>diff --git a/tools/testing/selftests/bpf/config.x86_64 b/tools/testing/selftests/bpf/config.x86_64<br/>index 5e713ef7caa3..42ad817b00ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.x86_64?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/config.x86_64</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/config.x86_64?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/config.x86_64</a></div><div class='hunk'>@@ -44,7 +44,6 @@ CONFIG_CRYPTO_SEQIV=y</div><div class='ctx'> CONFIG_CRYPTO_XXHASH=y</div><div class='ctx'> CONFIG_DCB=y</div><div class='ctx'> CONFIG_DEBUG_ATOMIC_SLEEP=y</div><div class='del'>-CONFIG_DEBUG_INFO_BTF=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_DEFAULT_FQ_CODEL=y</div><div class='hunk'>@@ -104,12 +103,10 @@ CONFIG_HZ_1000=y</div><div class='ctx'> CONFIG_INET=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_INTEL_POWERCLAMP=y</div><div class='del'>-CONFIG_IP6_NF_IPTABLES=y</div><div class='ctx'> CONFIG_IP_ADVANCED_ROUTER=y</div><div class='ctx'> CONFIG_IP_MROUTE=y</div><div class='ctx'> CONFIG_IP_MULTICAST=y</div><div class='ctx'> CONFIG_IP_MULTIPLE_TABLES=y</div><div class='del'>-CONFIG_IP_NF_IPTABLES=y</div><div class='ctx'> CONFIG_IP_PIMSM_V1=y</div><div class='ctx'> CONFIG_IP_PIMSM_V2=y</div><div class='ctx'> CONFIG_IP_ROUTE_MULTIPATH=y</div><div class='hunk'>@@ -162,7 +159,6 @@ CONFIG_NUMA=y</div><div class='ctx'> CONFIG_NUMA_BALANCING=y</div><div class='ctx'> CONFIG_NVMEM=y</div><div class='ctx'> CONFIG_OSF_PARTITION=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PCI=y</div><div class='hunk'>@@ -220,7 +216,6 @@ CONFIG_VALIDATE_FS_PARSER=y</div><div class='ctx'> CONFIG_VETH=y</div><div class='ctx'> CONFIG_VIRT_DRIVERS=y</div><div class='ctx'> CONFIG_VLAN_8021Q=y</div><div class='del'>-CONFIG_VSOCKETS=y</div><div class='ctx'> CONFIG_VSOCKETS_LOOPBACK=y</div><div class='ctx'> CONFIG_X86_ACPI_CPUFREQ=y</div><div class='ctx'> CONFIG_X86_CPUID=y</div><div class='head'>diff --git a/tools/testing/selftests/bpf/network_helpers.c b/tools/testing/selftests/bpf/network_helpers.c<br/>index 72b5c174ab3b..0a6a5561bed3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/network_helpers.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/network_helpers.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/network_helpers.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/network_helpers.c</a></div><div class='hunk'>@@ -97,7 +97,7 @@ int settimeo(int fd, int timeout_ms)</div><div class='ctx'> int start_server_addr(int type, const struct sockaddr_storage *addr, socklen_t addrlen,</div><div class='ctx'> 		      const struct network_helper_opts *opts)</div><div class='ctx'> {</div><div class='del'>-	int fd;</div><div class='add'>+	int on = 1, fd;</div><div class='ctx'> </div><div class='ctx'> 	if (!opts)</div><div class='ctx'> 		opts = &amp;default_opts;</div><div class='hunk'>@@ -111,6 +111,12 @@ int start_server_addr(int type, const struct sockaddr_storage *addr, socklen_t a</div><div class='ctx'> 	if (settimeo(fd, opts-&gt;timeout_ms))</div><div class='ctx'> 		goto error_close;</div><div class='ctx'> </div><div class='add'>+	if (type == SOCK_STREAM &amp;&amp;</div><div class='add'>+	    setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &amp;on, sizeof(on))) {</div><div class='add'>+		log_err("Failed to enable SO_REUSEADDR");</div><div class='add'>+		goto error_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (opts-&gt;post_socket_cb &amp;&amp;</div><div class='ctx'> 	    opts-&gt;post_socket_cb(fd, opts-&gt;cb_opts)) {</div><div class='ctx'> 		log_err("Failed to call post_socket_cb");</div><div class='hunk'>@@ -457,7 +463,7 @@ int append_tid(char *str, size_t sz)</div><div class='ctx'> 	if (end + 8 &gt; sz)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	sprintf(&amp;str[end], "%07d", gettid());</div><div class='add'>+	sprintf(&amp;str[end], "%07ld", sys_gettid());</div><div class='ctx'> 	str[end + 7] = '\0';</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -766,6 +772,50 @@ int send_recv_data(int lfd, int fd, uint32_t total_bytes)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int tc_prog_attach(const char *dev, int ingress_fd, int egress_fd)</div><div class='add'>+{</div><div class='add'>+	int ifindex, ret;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_TRUE(ingress_fd &gt;= 0 || egress_fd &gt;= 0,</div><div class='add'>+			 "at least one program fd is valid"))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	ifindex = if_nametoindex(dev);</div><div class='add'>+	if (!ASSERT_NEQ(ifindex, 0, "get ifindex"))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_tc_hook, hook, .ifindex = ifindex,</div><div class='add'>+			    .attach_point = BPF_TC_INGRESS | BPF_TC_EGRESS);</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_tc_opts, opts1, .handle = 1,</div><div class='add'>+			    .priority = 1, .prog_fd = ingress_fd);</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_tc_opts, opts2, .handle = 1,</div><div class='add'>+			    .priority = 1, .prog_fd = egress_fd);</div><div class='add'>+</div><div class='add'>+	ret = bpf_tc_hook_create(&amp;hook);</div><div class='add'>+	if (!ASSERT_OK(ret, "create tc hook"))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ingress_fd &gt;= 0) {</div><div class='add'>+		hook.attach_point = BPF_TC_INGRESS;</div><div class='add'>+		ret = bpf_tc_attach(&amp;hook, &amp;opts1);</div><div class='add'>+		if (!ASSERT_OK(ret, "bpf_tc_attach")) {</div><div class='add'>+			bpf_tc_hook_destroy(&amp;hook);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (egress_fd &gt;= 0) {</div><div class='add'>+		hook.attach_point = BPF_TC_EGRESS;</div><div class='add'>+		ret = bpf_tc_attach(&amp;hook, &amp;opts2);</div><div class='add'>+		if (!ASSERT_OK(ret, "bpf_tc_attach")) {</div><div class='add'>+			bpf_tc_hook_destroy(&amp;hook);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef TRAFFIC_MONITOR</div><div class='ctx'> struct tmonitor_ctx {</div><div class='ctx'> 	pcap_t *pcap;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/network_helpers.h b/tools/testing/selftests/bpf/network_helpers.h<br/>index ef208eefd571..79a010c88e11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/network_helpers.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/network_helpers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/network_helpers.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/network_helpers.h</a></div><div class='hunk'>@@ -255,6 +255,22 @@ struct tmonitor_ctx;</div><div class='ctx'> </div><div class='ctx'> typedef int (*tm_print_fn_t)(const char *format, va_list args);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * tc_prog_attach - attach BPF program(s) to an interface</div><div class='add'>+ *</div><div class='add'>+ * Takes file descriptors pointing to at least one, at most two BPF</div><div class='add'>+ * programs, and attach those programs to an interface ingress, egress or</div><div class='add'>+ * both.</div><div class='add'>+ *</div><div class='add'>+ * @dev: string containing the interface name</div><div class='add'>+ * @ingress_fd: file descriptor of the program to attach to interface ingress</div><div class='add'>+ * @egress_fd: file descriptor of the program to attach to interface egress</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, -1 if no valid file descriptor has been found, if</div><div class='add'>+ * the interface name is invalid or if an error ocurred during attach.</div><div class='add'>+ */</div><div class='add'>+int tc_prog_attach(const char *dev, int ingress_fd, int egress_fd);</div><div class='add'>+</div><div class='ctx'> #ifdef TRAFFIC_MONITOR</div><div class='ctx'> struct tmonitor_ctx *traffic_monitor_start(const char *netns, const char *test_name,</div><div class='ctx'> 					   const char *subtest_name);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/align.c b/tools/testing/selftests/bpf/prog_tests/align.c<br/>index 1d53a8561ee2..24c509ce4e5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/align.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/align.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/align.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/align.c</a></div><div class='hunk'>@@ -42,11 +42,11 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			{0, "R1", "ctx()"},</div><div class='ctx'> 			{0, "R10", "fp0"},</div><div class='del'>-			{0, "R3_w", "2"},</div><div class='del'>-			{1, "R3_w", "4"},</div><div class='del'>-			{2, "R3_w", "8"},</div><div class='del'>-			{3, "R3_w", "16"},</div><div class='del'>-			{4, "R3_w", "32"},</div><div class='add'>+			{0, "R3", "2"},</div><div class='add'>+			{1, "R3", "4"},</div><div class='add'>+			{2, "R3", "8"},</div><div class='add'>+			{3, "R3", "16"},</div><div class='add'>+			{4, "R3", "32"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -70,17 +70,17 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			{0, "R1", "ctx()"},</div><div class='ctx'> 			{0, "R10", "fp0"},</div><div class='del'>-			{0, "R3_w", "1"},</div><div class='del'>-			{1, "R3_w", "2"},</div><div class='del'>-			{2, "R3_w", "4"},</div><div class='del'>-			{3, "R3_w", "8"},</div><div class='del'>-			{4, "R3_w", "16"},</div><div class='del'>-			{5, "R3_w", "1"},</div><div class='del'>-			{6, "R4_w", "32"},</div><div class='del'>-			{7, "R4_w", "16"},</div><div class='del'>-			{8, "R4_w", "8"},</div><div class='del'>-			{9, "R4_w", "4"},</div><div class='del'>-			{10, "R4_w", "2"},</div><div class='add'>+			{0, "R3", "1"},</div><div class='add'>+			{1, "R3", "2"},</div><div class='add'>+			{2, "R3", "4"},</div><div class='add'>+			{3, "R3", "8"},</div><div class='add'>+			{4, "R3", "16"},</div><div class='add'>+			{5, "R3", "1"},</div><div class='add'>+			{6, "R4", "32"},</div><div class='add'>+			{7, "R4", "16"},</div><div class='add'>+			{8, "R4", "8"},</div><div class='add'>+			{9, "R4", "4"},</div><div class='add'>+			{10, "R4", "2"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -99,12 +99,12 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			{0, "R1", "ctx()"},</div><div class='ctx'> 			{0, "R10", "fp0"},</div><div class='del'>-			{0, "R3_w", "4"},</div><div class='del'>-			{1, "R3_w", "8"},</div><div class='del'>-			{2, "R3_w", "10"},</div><div class='del'>-			{3, "R4_w", "8"},</div><div class='del'>-			{4, "R4_w", "12"},</div><div class='del'>-			{5, "R4_w", "14"},</div><div class='add'>+			{0, "R3", "4"},</div><div class='add'>+			{1, "R3", "8"},</div><div class='add'>+			{2, "R3", "10"},</div><div class='add'>+			{3, "R4", "8"},</div><div class='add'>+			{4, "R4", "12"},</div><div class='add'>+			{5, "R4", "14"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -121,10 +121,10 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			{0, "R1", "ctx()"},</div><div class='ctx'> 			{0, "R10", "fp0"},</div><div class='del'>-			{0, "R3_w", "7"},</div><div class='del'>-			{1, "R3_w", "7"},</div><div class='del'>-			{2, "R3_w", "14"},</div><div class='del'>-			{3, "R3_w", "56"},</div><div class='add'>+			{0, "R3", "7"},</div><div class='add'>+			{1, "R3", "7"},</div><div class='add'>+			{2, "R3", "14"},</div><div class='add'>+			{3, "R3", "56"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='hunk'>@@ -162,19 +162,19 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.prog_type = BPF_PROG_TYPE_SCHED_CLS,</div><div class='ctx'> 		.matches = {</div><div class='del'>-			{6, "R0_w", "pkt(off=8,r=8)"},</div><div class='del'>-			{6, "R3_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{7, "R3_w", "var_off=(0x0; 0x1fe)"},</div><div class='del'>-			{8, "R3_w", "var_off=(0x0; 0x3fc)"},</div><div class='del'>-			{9, "R3_w", "var_off=(0x0; 0x7f8)"},</div><div class='del'>-			{10, "R3_w", "var_off=(0x0; 0xff0)"},</div><div class='del'>-			{12, "R3_w", "pkt_end()"},</div><div class='del'>-			{17, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{18, "R4_w", "var_off=(0x0; 0x1fe0)"},</div><div class='del'>-			{19, "R4_w", "var_off=(0x0; 0xff0)"},</div><div class='del'>-			{20, "R4_w", "var_off=(0x0; 0x7f8)"},</div><div class='del'>-			{21, "R4_w", "var_off=(0x0; 0x3fc)"},</div><div class='del'>-			{22, "R4_w", "var_off=(0x0; 0x1fe)"},</div><div class='add'>+			{6, "R0", "pkt(off=8,r=8)"},</div><div class='add'>+			{6, "R3", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{7, "R3", "var_off=(0x0; 0x1fe)"},</div><div class='add'>+			{8, "R3", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{9, "R3", "var_off=(0x0; 0x7f8)"},</div><div class='add'>+			{10, "R3", "var_off=(0x0; 0xff0)"},</div><div class='add'>+			{12, "R3", "pkt_end()"},</div><div class='add'>+			{17, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{18, "R4", "var_off=(0x0; 0x1fe0)"},</div><div class='add'>+			{19, "R4", "var_off=(0x0; 0xff0)"},</div><div class='add'>+			{20, "R4", "var_off=(0x0; 0x7f8)"},</div><div class='add'>+			{21, "R4", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{22, "R4", "var_off=(0x0; 0x1fe)"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -195,16 +195,16 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.prog_type = BPF_PROG_TYPE_SCHED_CLS,</div><div class='ctx'> 		.matches = {</div><div class='del'>-			{6, "R3_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{7, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{8, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{9, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{10, "R4_w", "var_off=(0x0; 0x1fe)"},</div><div class='del'>-			{11, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{12, "R4_w", "var_off=(0x0; 0x3fc)"},</div><div class='del'>-			{13, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{14, "R4_w", "var_off=(0x0; 0x7f8)"},</div><div class='del'>-			{15, "R4_w", "var_off=(0x0; 0xff0)"},</div><div class='add'>+			{6, "R3", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{7, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{8, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{9, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{10, "R4", "var_off=(0x0; 0x1fe)"},</div><div class='add'>+			{11, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{12, "R4", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{13, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{14, "R4", "var_off=(0x0; 0x7f8)"},</div><div class='add'>+			{15, "R4", "var_off=(0x0; 0xff0)"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -235,14 +235,14 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.prog_type = BPF_PROG_TYPE_SCHED_CLS,</div><div class='ctx'> 		.matches = {</div><div class='del'>-			{2, "R5_w", "pkt(r=0)"},</div><div class='del'>-			{4, "R5_w", "pkt(off=14,r=0)"},</div><div class='del'>-			{5, "R4_w", "pkt(off=14,r=0)"},</div><div class='add'>+			{2, "R5", "pkt(r=0)"},</div><div class='add'>+			{4, "R5", "pkt(off=14,r=0)"},</div><div class='add'>+			{5, "R4", "pkt(off=14,r=0)"},</div><div class='ctx'> 			{9, "R2", "pkt(r=18)"},</div><div class='ctx'> 			{10, "R5", "pkt(off=14,r=18)"},</div><div class='del'>-			{10, "R4_w", "var_off=(0x0; 0xff)"},</div><div class='del'>-			{13, "R4_w", "var_off=(0x0; 0xffff)"},</div><div class='del'>-			{14, "R4_w", "var_off=(0x0; 0xffff)"},</div><div class='add'>+			{10, "R4", "var_off=(0x0; 0xff)"},</div><div class='add'>+			{13, "R4", "var_off=(0x0; 0xffff)"},</div><div class='add'>+			{14, "R4", "var_off=(0x0; 0xffff)"},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -299,12 +299,12 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Calculated offset in R6 has unknown value, but known</div><div class='ctx'> 			 * alignment of 4.</div><div class='ctx'> 			 */</div><div class='del'>-			{6, "R2_w", "pkt(r=8)"},</div><div class='del'>-			{7, "R6_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{6, "R2", "pkt(r=8)"},</div><div class='add'>+			{7, "R6", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Offset is added to packet pointer R5, resulting in</div><div class='ctx'> 			 * known fixed offset, and variable offset from R6.</div><div class='ctx'> 			 */</div><div class='del'>-			{11, "R5_w", "pkt(id=1,off=14,"},</div><div class='add'>+			{11, "R5", "pkt(id=1,off=14,"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * it's total offset is NET_IP_ALIGN + reg-&gt;off (0) +</div><div class='ctx'> 			 * reg-&gt;aux_off (14) which is 16.  Then the variable</div><div class='hunk'>@@ -320,12 +320,12 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			 * instruction to validate R5 state. We also check</div><div class='ctx'> 			 * that R4 is what it should be in such case.</div><div class='ctx'> 			 */</div><div class='del'>-			{18, "R4_w", "var_off=(0x0; 0x3fc)"},</div><div class='del'>-			{18, "R5_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{18, "R4", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{18, "R5", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Constant offset is added to R5, resulting in</div><div class='ctx'> 			 * reg-&gt;off of 14.</div><div class='ctx'> 			 */</div><div class='del'>-			{19, "R5_w", "pkt(id=2,off=14,"},</div><div class='add'>+			{19, "R5", "pkt(id=2,off=14,"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * its total fixed offset is NET_IP_ALIGN + reg-&gt;off</div><div class='ctx'> 			 * (14) which is 16.  Then the variable offset is 4-byte</div><div class='hunk'>@@ -337,21 +337,21 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Constant offset is added to R5 packet pointer,</div><div class='ctx'> 			 * resulting in reg-&gt;off value of 14.</div><div class='ctx'> 			 */</div><div class='del'>-			{26, "R5_w", "pkt(off=14,r=8)"},</div><div class='add'>+			{26, "R5", "pkt(off=14,r=8)"},</div><div class='ctx'> 			/* Variable offset is added to R5, resulting in a</div><div class='ctx'> 			 * variable offset of (4n). See comment for insn #18</div><div class='ctx'> 			 * for R4 = R5 trick.</div><div class='ctx'> 			 */</div><div class='del'>-			{28, "R4_w", "var_off=(0x0; 0x3fc)"},</div><div class='del'>-			{28, "R5_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{28, "R4", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{28, "R5", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Constant is added to R5 again, setting reg-&gt;off to 18. */</div><div class='del'>-			{29, "R5_w", "pkt(id=3,off=18,"},</div><div class='add'>+			{29, "R5", "pkt(id=3,off=18,"},</div><div class='ctx'> 			/* And once more we add a variable; resulting var_off</div><div class='ctx'> 			 * is still (4n), fixed offset is not changed.</div><div class='ctx'> 			 * Also, we create a new reg-&gt;id.</div><div class='ctx'> 			 */</div><div class='del'>-			{31, "R4_w", "var_off=(0x0; 0x7fc)"},</div><div class='del'>-			{31, "R5_w", "var_off=(0x0; 0x7fc)"},</div><div class='add'>+			{31, "R4", "var_off=(0x0; 0x7fc)"},</div><div class='add'>+			{31, "R5", "var_off=(0x0; 0x7fc)"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * its total fixed offset is NET_IP_ALIGN + reg-&gt;off (18)</div><div class='ctx'> 			 * which is 20.  Then the variable offset is (4n), so</div><div class='hunk'>@@ -397,12 +397,12 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Calculated offset in R6 has unknown value, but known</div><div class='ctx'> 			 * alignment of 4.</div><div class='ctx'> 			 */</div><div class='del'>-			{6, "R2_w", "pkt(r=8)"},</div><div class='del'>-			{7, "R6_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{6, "R2", "pkt(r=8)"},</div><div class='add'>+			{7, "R6", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Adding 14 makes R6 be (4n+2) */</div><div class='del'>-			{8, "R6_w", "var_off=(0x2; 0x7fc)"},</div><div class='add'>+			{8, "R6", "var_off=(0x2; 0x7fc)"},</div><div class='ctx'> 			/* Packet pointer has (4n+2) offset */</div><div class='del'>-			{11, "R5_w", "var_off=(0x2; 0x7fc)"},</div><div class='add'>+			{11, "R5", "var_off=(0x2; 0x7fc)"},</div><div class='ctx'> 			{12, "R4", "var_off=(0x2; 0x7fc)"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * its total fixed offset is NET_IP_ALIGN + reg-&gt;off (0)</div><div class='hunk'>@@ -414,11 +414,11 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Newly read value in R6 was shifted left by 2, so has</div><div class='ctx'> 			 * known alignment of 4.</div><div class='ctx'> 			 */</div><div class='del'>-			{17, "R6_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{17, "R6", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Added (4n) to packet pointer's (4n+2) var_off, giving</div><div class='ctx'> 			 * another (4n+2).</div><div class='ctx'> 			 */</div><div class='del'>-			{19, "R5_w", "var_off=(0x2; 0xffc)"},</div><div class='add'>+			{19, "R5", "var_off=(0x2; 0xffc)"},</div><div class='ctx'> 			{20, "R4", "var_off=(0x2; 0xffc)"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * its total fixed offset is NET_IP_ALIGN + reg-&gt;off (0)</div><div class='hunk'>@@ -459,18 +459,18 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 		.prog_type = BPF_PROG_TYPE_SCHED_CLS,</div><div class='ctx'> 		.result = REJECT,</div><div class='ctx'> 		.matches = {</div><div class='del'>-			{3, "R5_w", "pkt_end()"},</div><div class='add'>+			{3, "R5", "pkt_end()"},</div><div class='ctx'> 			/* (ptr - ptr) &lt;&lt; 2 == unknown, (4n) */</div><div class='del'>-			{5, "R5_w", "var_off=(0x0; 0xfffffffffffffffc)"},</div><div class='add'>+			{5, "R5", "var_off=(0x0; 0xfffffffffffffffc)"},</div><div class='ctx'> 			/* (4n) + 14 == (4n+2).  We blow our bounds, because</div><div class='ctx'> 			 * the add could overflow.</div><div class='ctx'> 			 */</div><div class='del'>-			{6, "R5_w", "var_off=(0x2; 0xfffffffffffffffc)"},</div><div class='add'>+			{6, "R5", "var_off=(0x2; 0xfffffffffffffffc)"},</div><div class='ctx'> 			/* Checked s&gt;=0 */</div><div class='ctx'> 			{9, "R5", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='ctx'> 			/* packet pointer + nonnegative (4n+2) */</div><div class='del'>-			{11, "R6_w", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='del'>-			{12, "R4_w", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='add'>+			{11, "R6", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='add'>+			{12, "R4", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='ctx'> 			/* NET_IP_ALIGN + (4n+2) == (4n), alignment is fine.</div><div class='ctx'> 			 * We checked the bounds, but it might have been able</div><div class='ctx'> 			 * to overflow if the packet pointer started in the</div><div class='hunk'>@@ -478,7 +478,7 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			 * So we did not get a 'range' on R6, and the access</div><div class='ctx'> 			 * attempt will fail.</div><div class='ctx'> 			 */</div><div class='del'>-			{15, "R6_w", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='add'>+			{15, "R6", "var_off=(0x2; 0x7ffffffffffffffc)"},</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -513,12 +513,12 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Calculated offset in R6 has unknown value, but known</div><div class='ctx'> 			 * alignment of 4.</div><div class='ctx'> 			 */</div><div class='del'>-			{6, "R2_w", "pkt(r=8)"},</div><div class='del'>-			{8, "R6_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{6, "R2", "pkt(r=8)"},</div><div class='add'>+			{8, "R6", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Adding 14 makes R6 be (4n+2) */</div><div class='del'>-			{9, "R6_w", "var_off=(0x2; 0x7fc)"},</div><div class='add'>+			{9, "R6", "var_off=(0x2; 0x7fc)"},</div><div class='ctx'> 			/* New unknown value in R7 is (4n) */</div><div class='del'>-			{10, "R7_w", "var_off=(0x0; 0x3fc)"},</div><div class='add'>+			{10, "R7", "var_off=(0x0; 0x3fc)"},</div><div class='ctx'> 			/* Subtracting it from R6 blows our unsigned bounds */</div><div class='ctx'> 			{11, "R6", "var_off=(0x2; 0xfffffffffffffffc)"},</div><div class='ctx'> 			/* Checked s&gt;= 0 */</div><div class='hunk'>@@ -566,16 +566,16 @@ static struct bpf_align_test tests[] = {</div><div class='ctx'> 			/* Calculated offset in R6 has unknown value, but known</div><div class='ctx'> 			 * alignment of 4.</div><div class='ctx'> 			 */</div><div class='del'>-			{6, "R2_w", "pkt(r=8)"},</div><div class='del'>-			{9, "R6_w", "var_off=(0x0; 0x3c)"},</div><div class='add'>+			{6, "R2", "pkt(r=8)"},</div><div class='add'>+			{9, "R6", "var_off=(0x0; 0x3c)"},</div><div class='ctx'> 			/* Adding 14 makes R6 be (4n+2) */</div><div class='del'>-			{10, "R6_w", "var_off=(0x2; 0x7c)"},</div><div class='add'>+			{10, "R6", "var_off=(0x2; 0x7c)"},</div><div class='ctx'> 			/* Subtracting from packet pointer overflows ubounds */</div><div class='del'>-			{13, "R5_w", "var_off=(0xffffffffffffff82; 0x7c)"},</div><div class='add'>+			{13, "R5", "var_off=(0xffffffffffffff82; 0x7c)"},</div><div class='ctx'> 			/* New unknown value in R7 is (4n), &gt;= 76 */</div><div class='del'>-			{14, "R7_w", "var_off=(0x0; 0x7fc)"},</div><div class='add'>+			{14, "R7", "var_off=(0x0; 0x7fc)"},</div><div class='ctx'> 			/* Adding it to packet pointer gives nice bounds again */</div><div class='del'>-			{16, "R5_w", "var_off=(0x2; 0x7fc)"},</div><div class='add'>+			{16, "R5", "var_off=(0x2; 0x7fc)"},</div><div class='ctx'> 			/* At the time the word size load is performed from R5,</div><div class='ctx'> 			 * its total fixed offset is NET_IP_ALIGN + reg-&gt;off (0)</div><div class='ctx'> 			 * which is 2.  Then the variable offset is (4n+2), so</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c b/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c<br/>index 0223fce4db2b..693fd86fbde6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c</a></div><div class='hunk'>@@ -40,8 +40,13 @@ static void *spin_lock_thread(void *arg)</div><div class='ctx'> </div><div class='ctx'> 	err = bpf_prog_test_run_opts(prog_fd, &amp;topts);</div><div class='ctx'> 	ASSERT_OK(err, "test_run err");</div><div class='add'>+</div><div class='add'>+	if (topts.retval == -EOPNOTSUPP)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='ctx'> 	ASSERT_EQ((int)topts.retval, 0, "test_run retval");</div><div class='ctx'> </div><div class='add'>+end:</div><div class='ctx'> 	pthread_exit(arg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -63,6 +68,7 @@ static void test_arena_spin_lock_size(int size)</div><div class='ctx'> 	skel = arena_spin_lock__open_and_load();</div><div class='ctx'> 	if (!ASSERT_OK_PTR(skel, "arena_spin_lock__open_and_load"))</div><div class='ctx'> 		return;</div><div class='add'>+</div><div class='ctx'> 	if (skel-&gt;data-&gt;test_skip == 2) {</div><div class='ctx'> 		test__skip();</div><div class='ctx'> 		goto end;</div><div class='hunk'>@@ -86,6 +92,13 @@ static void test_arena_spin_lock_size(int size)</div><div class='ctx'> 			goto end_barrier;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (skel-&gt;data-&gt;test_skip == 3) {</div><div class='add'>+		printf("%s:SKIP: CONFIG_NR_CPUS exceed the maximum supported by arena spinlock\n",</div><div class='add'>+		       __func__);</div><div class='add'>+		test__skip();</div><div class='add'>+		goto end_barrier;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ASSERT_EQ(skel-&gt;bss-&gt;counter, repeat * nthreads, "check counter value");</div><div class='ctx'> </div><div class='ctx'> end_barrier:</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/arena_strsearch.c b/tools/testing/selftests/bpf/prog_tests/arena_strsearch.c<br/>new file mode 100644<br/>index 000000000000..f81a0c066505<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/arena_strsearch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/arena_strsearch.c</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "arena_strsearch.skel.h"</div><div class='add'>+</div><div class='add'>+static void test_arena_str(void)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, opts);</div><div class='add'>+	struct arena_strsearch *skel;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skel = arena_strsearch__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "arena_strsearch__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = bpf_prog_test_run_opts(bpf_program__fd(skel-&gt;progs.arena_strsearch), &amp;opts);</div><div class='add'>+	ASSERT_OK(ret, "ret_add");</div><div class='add'>+	ASSERT_OK(opts.retval, "retval");</div><div class='add'>+	if (skel-&gt;bss-&gt;skip) {</div><div class='add'>+		printf("%s:SKIP:compiler doesn't support arena_cast\n", __func__);</div><div class='add'>+		test__skip();</div><div class='add'>+	}</div><div class='add'>+	arena_strsearch__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_arena_strsearch(void)</div><div class='add'>+{</div><div class='add'>+	if (test__start_subtest("arena_strsearch"))</div><div class='add'>+		test_arena_str();</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/arg_parsing.c b/tools/testing/selftests/bpf/prog_tests/arg_parsing.c<br/>index bb143de68875..e27d66b75fb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/arg_parsing.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/arg_parsing.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/arg_parsing.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/arg_parsing.c</a></div><div class='hunk'>@@ -144,11 +144,17 @@ static void test_parse_test_list_file(void)</div><div class='ctx'> 	if (!ASSERT_OK(ferror(fp), "prepare tmp"))</div><div class='ctx'> 		goto out_fclose;</div><div class='ctx'> </div><div class='add'>+	if (!ASSERT_OK(fsync(fileno(fp)), "fsync tmp"))</div><div class='add'>+		goto out_fclose;</div><div class='add'>+</div><div class='ctx'> 	init_test_filter_set(&amp;set);</div><div class='ctx'> </div><div class='del'>-	ASSERT_OK(parse_test_list_file(tmpfile, &amp;set, true), "parse file");</div><div class='add'>+	if (!ASSERT_OK(parse_test_list_file(tmpfile, &amp;set, true), "parse file"))</div><div class='add'>+		goto out_fclose;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(set.cnt, 4, "test  count"))</div><div class='add'>+		goto out_free_set;</div><div class='ctx'> </div><div class='del'>-	ASSERT_EQ(set.cnt, 4, "test  count");</div><div class='ctx'> 	ASSERT_OK(strcmp("test_with_spaces", set.tests[0].name), "test 0 name");</div><div class='ctx'> 	ASSERT_EQ(set.tests[0].subtest_cnt, 0, "test 0 subtest count");</div><div class='ctx'> 	ASSERT_OK(strcmp("testA", set.tests[1].name), "test 1 name");</div><div class='hunk'>@@ -158,8 +164,8 @@ static void test_parse_test_list_file(void)</div><div class='ctx'> 	ASSERT_OK(strcmp("testB", set.tests[2].name), "test 2 name");</div><div class='ctx'> 	ASSERT_OK(strcmp("testC_no_eof_newline", set.tests[3].name), "test 3 name");</div><div class='ctx'> </div><div class='add'>+out_free_set:</div><div class='ctx'> 	free_test_filter_set(&amp;set);</div><div class='del'>-</div><div class='ctx'> out_fclose:</div><div class='ctx'> 	fclose(fp);</div><div class='ctx'> out_remove:</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/atomics.c b/tools/testing/selftests/bpf/prog_tests/atomics.c<br/>index 13e101f370a1..92b5f378bfb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/atomics.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/atomics.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/atomics.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/atomics.c</a></div><div class='hunk'>@@ -165,11 +165,17 @@ static void test_xchg(struct atomics_lskel *skel)</div><div class='ctx'> void test_atomics(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct atomics_lskel *skel;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	skel = atomics_lskel__open_and_load();</div><div class='del'>-	if (!ASSERT_OK_PTR(skel, "atomics skeleton load"))</div><div class='add'>+	skel = atomics_lskel__open();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "atomics skeleton open"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	skel-&gt;keyring_id = KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+	err = atomics_lskel__load(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "atomics skeleton load"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='ctx'> 	if (skel-&gt;data-&gt;skip_tests) {</div><div class='ctx'> 		printf("%s:SKIP:no ENABLE_ATOMICS_TESTS (missing Clang BPF atomics support)",</div><div class='ctx'> 		       __func__);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/attach_probe.c b/tools/testing/selftests/bpf/prog_tests/attach_probe.c<br/>index cabc51c2ca6b..9e77e5da7097 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/attach_probe.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/attach_probe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/attach_probe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/attach_probe.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #include "test_attach_kprobe_sleepable.skel.h"</div><div class='ctx'> #include "test_attach_probe_manual.skel.h"</div><div class='ctx'> #include "test_attach_probe.skel.h"</div><div class='add'>+#include "kprobe_write_ctx.skel.h"</div><div class='ctx'> </div><div class='ctx'> /* this is how USDT semaphore is actually defined, except volatile modifier */</div><div class='ctx'> volatile unsigned short uprobe_ref_ctr __attribute__((unused)) __attribute((section(".probes")));</div><div class='hunk'>@@ -201,6 +202,31 @@ cleanup:</div><div class='ctx'> 	test_attach_probe_manual__destroy(skel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef __x86_64__</div><div class='add'>+/* attach kprobe/kretprobe long event name testings */</div><div class='add'>+static void test_attach_kprobe_write_ctx(void)</div><div class='add'>+{</div><div class='add'>+	struct kprobe_write_ctx *skel = NULL;</div><div class='add'>+	struct bpf_link *link = NULL;</div><div class='add'>+</div><div class='add'>+	skel = kprobe_write_ctx__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "kprobe_write_ctx__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	link = bpf_program__attach_kprobe_opts(skel-&gt;progs.kprobe_write_ctx,</div><div class='add'>+					     "bpf_fentry_test1", NULL);</div><div class='add'>+	if (!ASSERT_ERR_PTR(link, "bpf_program__attach_kprobe_opts"))</div><div class='add'>+		bpf_link__destroy(link);</div><div class='add'>+</div><div class='add'>+	kprobe_write_ctx__destroy(skel);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void test_attach_kprobe_write_ctx(void)</div><div class='add'>+{</div><div class='add'>+	test__skip();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void test_attach_probe_auto(struct test_attach_probe *skel)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_link *uprobe_err_link;</div><div class='hunk'>@@ -406,6 +432,8 @@ void test_attach_probe(void)</div><div class='ctx'> 		test_attach_uprobe_long_event_name();</div><div class='ctx'> 	if (test__start_subtest("kprobe-long_name"))</div><div class='ctx'> 		test_attach_kprobe_long_event_name();</div><div class='add'>+	if (test__start_subtest("kprobe-write-ctx"))</div><div class='add'>+		test_attach_kprobe_write_ctx();</div><div class='ctx'> </div><div class='ctx'> cleanup:</div><div class='ctx'> 	test_attach_probe__destroy(skel);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c b/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c<br/>index 4a0670c056ba..75f4dff7d042 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/bpf_cookie.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/bpf_cookie.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/bpf_cookie.c</a></div><div class='hunk'>@@ -450,8 +450,7 @@ static void pe_subtest(struct test_bpf_cookie *skel)</div><div class='ctx'> 	attr.size = sizeof(attr);</div><div class='ctx'> 	attr.type = PERF_TYPE_SOFTWARE;</div><div class='ctx'> 	attr.config = PERF_COUNT_SW_CPU_CLOCK;</div><div class='del'>-	attr.freq = 1;</div><div class='del'>-	attr.sample_freq = 10000;</div><div class='add'>+	attr.sample_period = 100000;</div><div class='ctx'> 	pfd = syscall(__NR_perf_event_open, &amp;attr, -1, 0, -1, PERF_FLAG_FD_CLOEXEC);</div><div class='ctx'> 	if (!ASSERT_GE(pfd, 0, "perf_fd"))</div><div class='ctx'> 		goto cleanup;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/bpf_gotox.c b/tools/testing/selftests/bpf/prog_tests/bpf_gotox.c<br/>new file mode 100644<br/>index 000000000000..d138cc7b1bda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/bpf_gotox.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/bpf_gotox.c</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;linux/in6.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;linux/tcp.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;sys/syscall.h&gt;</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bpf_gotox.skel.h"</div><div class='add'>+</div><div class='add'>+static void __test_run(struct bpf_program *prog, void *ctx_in, size_t ctx_size_in)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, topts,</div><div class='add'>+			    .ctx_in = ctx_in,</div><div class='add'>+			    .ctx_size_in = ctx_size_in,</div><div class='add'>+		   );</div><div class='add'>+	int err, prog_fd;</div><div class='add'>+</div><div class='add'>+	prog_fd = bpf_program__fd(prog);</div><div class='add'>+	err = bpf_prog_test_run_opts(prog_fd, &amp;topts);</div><div class='add'>+	ASSERT_OK(err, "test_run_opts err");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __subtest(struct bpf_gotox *skel, void (*check)(struct bpf_gotox *))</div><div class='add'>+{</div><div class='add'>+	if (skel-&gt;data-&gt;skip)</div><div class='add'>+		test__skip();</div><div class='add'>+	else</div><div class='add'>+		check(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_simple(struct bpf_gotox *skel,</div><div class='add'>+			 struct bpf_program *prog,</div><div class='add'>+			 __u64 ctx_in,</div><div class='add'>+			 __u64 expected)</div><div class='add'>+{</div><div class='add'>+	skel-&gt;bss-&gt;ret_user = 0;</div><div class='add'>+</div><div class='add'>+	__test_run(prog, &amp;ctx_in, sizeof(ctx_in));</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(skel-&gt;bss-&gt;ret_user, expected, "skel-&gt;bss-&gt;ret_user"))</div><div class='add'>+		return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_simple_fentry(struct bpf_gotox *skel,</div><div class='add'>+				struct bpf_program *prog,</div><div class='add'>+				__u64 ctx_in,</div><div class='add'>+				__u64 expected)</div><div class='add'>+{</div><div class='add'>+	skel-&gt;bss-&gt;in_user = ctx_in;</div><div class='add'>+	skel-&gt;bss-&gt;ret_user = 0;</div><div class='add'>+</div><div class='add'>+	/* trigger */</div><div class='add'>+	usleep(1);</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(skel-&gt;bss-&gt;ret_user, expected, "skel-&gt;bss-&gt;ret_user"))</div><div class='add'>+		return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* validate that for two loads of the same jump table libbpf generates only one map */</div><div class='add'>+static void check_one_map_two_jumps(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog_info prog_info;</div><div class='add'>+	struct bpf_map_info map_info;</div><div class='add'>+	__u32 len;</div><div class='add'>+	__u32 map_ids[16];</div><div class='add'>+	int prog_fd, map_fd;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+	bool seen = false;</div><div class='add'>+</div><div class='add'>+	memset(&amp;prog_info, 0, sizeof(prog_info));</div><div class='add'>+	prog_info.map_ids = (long)map_ids;</div><div class='add'>+	prog_info.nr_map_ids = ARRAY_SIZE(map_ids);</div><div class='add'>+	prog_fd = bpf_program__fd(skel-&gt;progs.one_map_two_jumps);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf_program__fd(one_map_two_jumps)"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len = sizeof(prog_info);</div><div class='add'>+	ret = bpf_obj_get_info_by_fd(prog_fd, &amp;prog_info, &amp;len);</div><div class='add'>+	if (!ASSERT_OK(ret, "bpf_obj_get_info_by_fd(prog_fd)"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; prog_info.nr_map_ids; i++) {</div><div class='add'>+		map_fd  = bpf_map_get_fd_by_id(map_ids[i]);</div><div class='add'>+		if (!ASSERT_GE(map_fd, 0, "bpf_map_get_fd_by_id"))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		len = sizeof(map_info);</div><div class='add'>+		memset(&amp;map_info, 0, len);</div><div class='add'>+		ret = bpf_obj_get_info_by_fd(map_fd, &amp;map_info, &amp;len);</div><div class='add'>+		if (!ASSERT_OK(ret, "bpf_obj_get_info_by_fd(map_fd)")) {</div><div class='add'>+			close(map_fd);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (map_info.type == BPF_MAP_TYPE_INSN_ARRAY) {</div><div class='add'>+			if (!ASSERT_EQ(seen, false, "more than one INSN_ARRAY map")) {</div><div class='add'>+				close(map_fd);</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+			seen = true;</div><div class='add'>+		}</div><div class='add'>+		close(map_fd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(seen, true, "no INSN_ARRAY map");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_one_switch(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.one_switch, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_one_switch_non_zero_sec_off(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.one_switch_non_zero_sec_off, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_two_switches(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[] = {103, 104, 107, 205, 115, 1019, 1019};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.two_switches, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_big_jump_table(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]  = {0, 11, 27, 31, 22, 45, 99};</div><div class='add'>+	__u64 out[] = {2,  3,  4,  5, 19, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.big_jump_table, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_one_jump_two_maps(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]  = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[] = {12, 15, 7 , 15, 12, 15, 15};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.one_jump_two_maps, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_static_global(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.use_static_global1, in[i], out[i]);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.use_static_global2, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_nonstatic_global(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.use_nonstatic_global1, in[i], out[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple(skel, skel-&gt;progs.use_nonstatic_global2, in[i], out[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_other_sec(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	struct bpf_link *link;</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	link = bpf_program__attach(skel-&gt;progs.simple_test_other_sec);</div><div class='add'>+	if (!ASSERT_OK_PTR(link, "link"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple_fentry(skel, skel-&gt;progs.simple_test_other_sec, in[i], out[i]);</div><div class='add'>+</div><div class='add'>+	bpf_link__destroy(link);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_static_global_other_sec(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	struct bpf_link *link;</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	link = bpf_program__attach(skel-&gt;progs.use_static_global_other_sec);</div><div class='add'>+	if (!ASSERT_OK_PTR(link, "link"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple_fentry(skel, skel-&gt;progs.use_static_global_other_sec, in[i], out[i]);</div><div class='add'>+</div><div class='add'>+	bpf_link__destroy(link);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_nonstatic_global_other_sec(struct bpf_gotox *skel)</div><div class='add'>+{</div><div class='add'>+	struct bpf_link *link;</div><div class='add'>+	__u64 in[]   = {0, 1, 2, 3, 4,  5, 77};</div><div class='add'>+	__u64 out[]  = {2, 3, 4, 5, 7, 19, 19};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	link = bpf_program__attach(skel-&gt;progs.use_nonstatic_global_other_sec);</div><div class='add'>+	if (!ASSERT_OK_PTR(link, "link"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(in); i++)</div><div class='add'>+		check_simple_fentry(skel, skel-&gt;progs.use_nonstatic_global_other_sec, in[i], out[i]);</div><div class='add'>+</div><div class='add'>+	bpf_link__destroy(link);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_bpf_gotox(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_gotox *skel;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skel = bpf_gotox__open();</div><div class='add'>+	if (!ASSERT_NEQ(skel, NULL, "bpf_gotox__open"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = bpf_gotox__load(skel);</div><div class='add'>+	if (!ASSERT_OK(ret, "bpf_gotox__load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;pid = getpid();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("one-switch"))</div><div class='add'>+		__subtest(skel, check_one_switch);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("one-switch-non-zero-sec-offset"))</div><div class='add'>+		__subtest(skel, check_one_switch_non_zero_sec_off);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("two-switches"))</div><div class='add'>+		__subtest(skel, check_two_switches);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("big-jump-table"))</div><div class='add'>+		__subtest(skel, check_big_jump_table);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("static-global"))</div><div class='add'>+		__subtest(skel, check_static_global);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("nonstatic-global"))</div><div class='add'>+		__subtest(skel, check_nonstatic_global);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("other-sec"))</div><div class='add'>+		__subtest(skel, check_other_sec);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("static-global-other-sec"))</div><div class='add'>+		__subtest(skel, check_static_global_other_sec);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("nonstatic-global-other-sec"))</div><div class='add'>+		__subtest(skel, check_nonstatic_global_other_sec);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("one-jump-two-maps"))</div><div class='add'>+		__subtest(skel, check_one_jump_two_maps);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("one-map-two-jumps"))</div><div class='add'>+		__subtest(skel, check_one_map_two_jumps);</div><div class='add'>+</div><div class='add'>+	bpf_gotox__destroy(skel);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c b/tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c<br/>new file mode 100644<br/>index 000000000000..269870bec941<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/bpf_insn_array.c</a></div><div class='hunk'>@@ -0,0 +1,504 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;bpf/bpf.h&gt;</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __x86_64__</div><div class='add'>+static int map_create(__u32 map_type, __u32 max_entries)</div><div class='add'>+{</div><div class='add'>+	const char *map_name = "insn_array";</div><div class='add'>+	__u32 key_size = 4;</div><div class='add'>+	__u32 value_size = sizeof(struct bpf_insn_array_value);</div><div class='add'>+</div><div class='add'>+	return bpf_map_create(map_type, map_name, key_size, value_size, max_entries, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prog_load(struct bpf_insn *insns, __u32 insn_cnt, int *fd_array, __u32 fd_array_cnt)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_prog_load_opts, opts);</div><div class='add'>+</div><div class='add'>+	opts.fd_array = fd_array;</div><div class='add'>+	opts.fd_array_cnt = fd_array_cnt;</div><div class='add'>+</div><div class='add'>+	return bpf_prog_load(BPF_PROG_TYPE_XDP, NULL, "GPL", insns, insn_cnt, &amp;opts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __check_success(struct bpf_insn *insns, __u32 insn_cnt, __u32 *map_in, __u32 *map_out)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int prog_fd = -1, map_fd, i;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, insn_cnt);</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; insn_cnt; i++) {</div><div class='add'>+		val.orig_off = map_in[i];</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;i, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, insn_cnt, &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf(BPF_PROG_LOAD)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; insn_cnt; i++) {</div><div class='add'>+		char buf[64];</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_lookup_elem(map_fd, &amp;i, &amp;val), 0, "bpf_map_lookup_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+</div><div class='add'>+		snprintf(buf, sizeof(buf), "val.xlated_off should be equal map_out[%d]", i);</div><div class='add'>+		ASSERT_EQ(val.xlated_off, map_out[i], buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(prog_fd);</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load a program, which will not be anyhow mangled by the verifier.  Add an</div><div class='add'>+ * insn_array map pointing to every instruction. Check that it hasn't changed</div><div class='add'>+ * after the program load.</div><div class='add'>+ */</div><div class='add'>+static void check_one_to_one_mapping(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 4),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 3),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	__u32 map_in[] = {0, 1, 2, 3, 4, 5};</div><div class='add'>+	__u32 map_out[] = {0, 1, 2, 3, 4, 5};</div><div class='add'>+</div><div class='add'>+	__check_success(insns, ARRAY_SIZE(insns), map_in, map_out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load a program with two patches (get jiffies, for simplicity). Add an</div><div class='add'>+ * insn_array map pointing to every instruction. Check how it was changed</div><div class='add'>+ * after the program load.</div><div class='add'>+ */</div><div class='add'>+static void check_simple(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_jiffies64),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_jiffies64),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	__u32 map_in[] = {0, 1, 2, 3, 4, 5};</div><div class='add'>+	__u32 map_out[] = {0, 1, 4, 5, 8, 9};</div><div class='add'>+</div><div class='add'>+	__check_success(insns, ARRAY_SIZE(insns), map_in, map_out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Verifier can delete code in two cases: nops &amp; dead code. From insn</div><div class='add'>+ * array's point of view, the two cases are the same, so test using</div><div class='add'>+ * the simplest method: by loading some nops</div><div class='add'>+ */</div><div class='add'>+static void check_deletions(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	__u32 map_in[] = {0, 1, 2, 3, 4, 5};</div><div class='add'>+	__u32 map_out[] = {0, -1, 1, -1, 2, 3};</div><div class='add'>+</div><div class='add'>+	__check_success(insns, ARRAY_SIZE(insns), map_in, map_out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Same test as check_deletions, but also add code which adds instructions</div><div class='add'>+ */</div><div class='add'>+static void check_deletions_with_functions(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_jiffies64),</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 1, 0, 2),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_jiffies64),</div><div class='add'>+		BPF_JMP_IMM(BPF_JA, 0, 0, 0), /* nop */</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	__u32 map_in[] =  { 0, 1,  2, 3, 4, 5, /* func */  6, 7,  8, 9, 10};</div><div class='add'>+	__u32 map_out[] = {-1, 0, -1, 3, 4, 5, /* func */ -1, 6, -1, 9, 10};</div><div class='add'>+</div><div class='add'>+	__check_success(insns, ARRAY_SIZE(insns), map_in, map_out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Try to load a program with a map which points to outside of the program</div><div class='add'>+ */</div><div class='add'>+static void check_out_of_bounds_index(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 4),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 3),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd, map_fd;</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int key;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, 1);</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	key = 0;</div><div class='add'>+	val.orig_off = ARRAY_SIZE(insns); /* too big */</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;key, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_EQ(prog_fd, -EINVAL, "program should have been rejected (prog_fd != -EINVAL)")) {</div><div class='add'>+		close(prog_fd);</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Try to load a program with a map which points to the middle of 16-bit insn</div><div class='add'>+ */</div><div class='add'>+static void check_mid_insn_index(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_LD_IMM64(BPF_REG_0, 0), /* 2 x 8 */</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd, map_fd;</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int key;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, 1);</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	key = 0;</div><div class='add'>+	val.orig_off = 1; /* middle of 16-byte instruction */</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;key, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_EQ(prog_fd, -EINVAL, "program should have been rejected (prog_fd != -EINVAL)")) {</div><div class='add'>+		close(prog_fd);</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_incorrect_index(void)</div><div class='add'>+{</div><div class='add'>+	check_out_of_bounds_index();</div><div class='add'>+	check_mid_insn_index();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_bpf_jit_harden(char *level)</div><div class='add'>+{</div><div class='add'>+	char old_level;</div><div class='add'>+	int err = -1;</div><div class='add'>+	int fd = -1;</div><div class='add'>+</div><div class='add'>+	fd = open("/proc/sys/net/core/bpf_jit_harden", O_RDWR | O_NONBLOCK);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		ASSERT_FAIL("open .../bpf_jit_harden returned %d (errno=%d)", fd, errno);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = read(fd, &amp;old_level, 1);</div><div class='add'>+	if (err != 1) {</div><div class='add'>+		ASSERT_FAIL("read from .../bpf_jit_harden returned %d (errno=%d)", err, errno);</div><div class='add'>+		err = -1;</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lseek(fd, 0, SEEK_SET);</div><div class='add'>+</div><div class='add'>+	err = write(fd, level, 1);</div><div class='add'>+	if (err != 1) {</div><div class='add'>+		ASSERT_FAIL("write to .../bpf_jit_harden returned %d (errno=%d)", err, errno);</div><div class='add'>+		err = -1;</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = 0;</div><div class='add'>+	*level = old_level;</div><div class='add'>+end:</div><div class='add'>+	if (fd &gt;= 0)</div><div class='add'>+		close(fd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_blindness(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 4),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 3),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 2),</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 1),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd = -1, map_fd;</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	char bpf_jit_harden = '@'; /* non-exizsting value */</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, ARRAY_SIZE(insns));</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		val.orig_off = i;</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;i, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	bpf_jit_harden = '2';</div><div class='add'>+	if (set_bpf_jit_harden(&amp;bpf_jit_harden)) {</div><div class='add'>+		bpf_jit_harden = '@'; /* open, read or write failed =&gt; no write was done */</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf(BPF_PROG_LOAD)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		char fmt[32];</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_lookup_elem(map_fd, &amp;i, &amp;val), 0, "bpf_map_lookup_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+</div><div class='add'>+		snprintf(fmt, sizeof(fmt), "val should be equal 3*%d", i);</div><div class='add'>+		ASSERT_EQ(val.xlated_off, i * 3, fmt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	/* restore the old one */</div><div class='add'>+	if (bpf_jit_harden != '@')</div><div class='add'>+		set_bpf_jit_harden(&amp;bpf_jit_harden);</div><div class='add'>+</div><div class='add'>+	close(prog_fd);</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Once map was initialized, it should be frozen */</div><div class='add'>+static void check_load_unfrozen_map(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd = -1, map_fd;</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, ARRAY_SIZE(insns));</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		val.orig_off = i;</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;i, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_EQ(prog_fd, -EINVAL, "program should have been rejected (prog_fd != -EINVAL)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* correctness: now freeze the map, the program should load fine */</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf(BPF_PROG_LOAD)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_lookup_elem(map_fd, &amp;i, &amp;val), 0, "bpf_map_lookup_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+</div><div class='add'>+		ASSERT_EQ(val.xlated_off, i, "val should be equal i");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(prog_fd);</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map can be used only by one BPF program */</div><div class='add'>+static void check_no_map_reuse(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_MOV64_IMM(BPF_REG_0, 0),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd = -1, map_fd, extra_fd = -1;</div><div class='add'>+	struct bpf_insn_array_value val = {};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, ARRAY_SIZE(insns));</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		val.orig_off = i;</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_update_elem(map_fd, &amp;i, &amp;val, 0), 0, "bpf_map_update_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf(BPF_PROG_LOAD)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(insns); i++) {</div><div class='add'>+		if (!ASSERT_EQ(bpf_map_lookup_elem(map_fd, &amp;i, &amp;val), 0, "bpf_map_lookup_elem"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+</div><div class='add'>+		ASSERT_EQ(val.xlated_off, i, "val should be equal i");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	extra_fd = prog_load(insns, ARRAY_SIZE(insns), &amp;map_fd, 1);</div><div class='add'>+	if (!ASSERT_EQ(extra_fd, -EBUSY, "program should have been rejected (extra_fd != -EBUSY)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* correctness: check that prog is still loadable without fd_array */</div><div class='add'>+	extra_fd = prog_load(insns, ARRAY_SIZE(insns), NULL, 0);</div><div class='add'>+	if (!ASSERT_GE(extra_fd, 0, "bpf(BPF_PROG_LOAD): expected no error"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(extra_fd);</div><div class='add'>+	close(prog_fd);</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_bpf_no_lookup(void)</div><div class='add'>+{</div><div class='add'>+	struct bpf_insn insns[] = {</div><div class='add'>+		BPF_LD_MAP_FD(BPF_REG_1, 0),</div><div class='add'>+		BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 0),</div><div class='add'>+		BPF_MOV64_REG(BPF_REG_2, BPF_REG_10),</div><div class='add'>+		BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),</div><div class='add'>+		BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_map_lookup_elem),</div><div class='add'>+		BPF_EXIT_INSN(),</div><div class='add'>+	};</div><div class='add'>+	int prog_fd = -1, map_fd;</div><div class='add'>+</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_INSN_ARRAY, 1);</div><div class='add'>+	if (!ASSERT_GE(map_fd, 0, "map_create"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	insns[0].imm = map_fd;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(bpf_map_freeze(map_fd), 0, "bpf_map_freeze"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), NULL, 0);</div><div class='add'>+	if (!ASSERT_EQ(prog_fd, -EINVAL, "program should have been rejected (prog_fd != -EINVAL)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* correctness: check that prog is still loadable with normal map */</div><div class='add'>+	close(map_fd);</div><div class='add'>+	map_fd = map_create(BPF_MAP_TYPE_ARRAY, 1);</div><div class='add'>+	insns[0].imm = map_fd;</div><div class='add'>+	prog_fd = prog_load(insns, ARRAY_SIZE(insns), NULL, 0);</div><div class='add'>+	if (!ASSERT_GE(prog_fd, 0, "bpf(BPF_PROG_LOAD)"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	close(prog_fd);</div><div class='add'>+	close(map_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_bpf_side(void)</div><div class='add'>+{</div><div class='add'>+	check_bpf_no_lookup();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __test_bpf_insn_array(void)</div><div class='add'>+{</div><div class='add'>+	/* Test if offsets are adjusted properly */</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("one2one"))</div><div class='add'>+		check_one_to_one_mapping();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("simple"))</div><div class='add'>+		check_simple();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("deletions"))</div><div class='add'>+		check_deletions();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("deletions-with-functions"))</div><div class='add'>+		check_deletions_with_functions();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("blindness"))</div><div class='add'>+		check_blindness();</div><div class='add'>+</div><div class='add'>+	/* Check all kinds of operations and related restrictions */</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("incorrect-index"))</div><div class='add'>+		check_incorrect_index();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("load-unfrozen-map"))</div><div class='add'>+		check_load_unfrozen_map();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("no-map-reuse"))</div><div class='add'>+		check_no_map_reuse();</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("bpf-side-ops"))</div><div class='add'>+		check_bpf_side();</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void __test_bpf_insn_array(void)</div><div class='add'>+{</div><div class='add'>+	test__skip();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void test_bpf_insn_array(void)</div><div class='add'>+{</div><div class='add'>+	__test_bpf_insn_array();</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/btf.c b/tools/testing/selftests/bpf/prog_tests/btf.c<br/>index 8a9ba4292109..054ecb6b1e9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/btf.c</a></div><div class='hunk'>@@ -7496,6 +7496,71 @@ static struct btf_dedup_test dedup_tests[] = {</div><div class='ctx'> 	},</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='add'>+	.descr = "dedup: recursive typedef",</div><div class='add'>+	/*</div><div class='add'>+	 * This test simulates a recursive typedef, which in GO is defined as such:</div><div class='add'>+	 *</div><div class='add'>+	 *   type Foo func() Foo</div><div class='add'>+	 *</div><div class='add'>+	 * In BTF terms, this is represented as a TYPEDEF referencing</div><div class='add'>+	 * a FUNC_PROTO that returns the same TYPEDEF.</div><div class='add'>+	 */</div><div class='add'>+	.input = {</div><div class='add'>+		.raw_types = {</div><div class='add'>+			/*</div><div class='add'>+			 * [1] typedef Foo -&gt; func() Foo</div><div class='add'>+			 * [2] func_proto() -&gt; Foo</div><div class='add'>+			 * [3] typedef Foo -&gt; func() Foo</div><div class='add'>+			 * [4] func_proto() -&gt; Foo</div><div class='add'>+			 */</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 2),	/* [1] */</div><div class='add'>+			BTF_FUNC_PROTO_ENC(1, 0),		/* [2] */</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 4),	/* [3] */</div><div class='add'>+			BTF_FUNC_PROTO_ENC(3, 0),		/* [4] */</div><div class='add'>+			BTF_END_RAW,</div><div class='add'>+		},</div><div class='add'>+		BTF_STR_SEC("\0Foo"),</div><div class='add'>+	},</div><div class='add'>+	.expect = {</div><div class='add'>+		.raw_types = {</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 2),	/* [1] */</div><div class='add'>+			BTF_FUNC_PROTO_ENC(1, 0),		/* [2] */</div><div class='add'>+			BTF_END_RAW,</div><div class='add'>+		},</div><div class='add'>+		BTF_STR_SEC("\0Foo"),</div><div class='add'>+	},</div><div class='add'>+},</div><div class='add'>+{</div><div class='add'>+	.descr = "dedup: typedef",</div><div class='add'>+    /*</div><div class='add'>+     * // CU 1:</div><div class='add'>+     * typedef int foo;</div><div class='add'>+     *</div><div class='add'>+     * // CU 2:</div><div class='add'>+     * typedef int foo;</div><div class='add'>+     */</div><div class='add'>+	.input = {</div><div class='add'>+		.raw_types = {</div><div class='add'>+			/* CU 1 */</div><div class='add'>+			BTF_TYPE_INT_ENC(0, BTF_INT_SIGNED, 0, 32, 4),	/* [1] */</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 1),		/* [2] */</div><div class='add'>+			/* CU 2 */</div><div class='add'>+			BTF_TYPE_INT_ENC(0, BTF_INT_SIGNED, 0, 32, 4),	/* [3] */</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 3),		/* [4] */</div><div class='add'>+			BTF_END_RAW,</div><div class='add'>+		},</div><div class='add'>+		BTF_STR_SEC("\0foo"),</div><div class='add'>+	},</div><div class='add'>+	.expect = {</div><div class='add'>+		.raw_types = {</div><div class='add'>+			BTF_TYPE_INT_ENC(0, BTF_INT_SIGNED, 0, 32, 4),	/* [1] */</div><div class='add'>+			BTF_TYPEDEF_ENC(NAME_NTH(1), 1),		/* [2] */</div><div class='add'>+			BTF_END_RAW,</div><div class='add'>+		},</div><div class='add'>+		BTF_STR_SEC("\0foo"),</div><div class='add'>+	},</div><div class='add'>+},</div><div class='add'>+{</div><div class='ctx'> 	.descr = "dedup: typedef tags",</div><div class='ctx'> 	.input = {</div><div class='ctx'> 		.raw_types = {</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/btf_dump.c b/tools/testing/selftests/bpf/prog_tests/btf_dump.c<br/>index 82903585c870..10cba526d3e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf_dump.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf_dump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf_dump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/btf_dump.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static int test_btf_dump_case(int n, struct btf_dump_test_case *t)</div><div class='ctx'> </div><div class='ctx'> 	/* tests with t-&gt;known_ptr_sz have no "long" or "unsigned long" type,</div><div class='ctx'> 	 * so it's impossible to determine correct pointer size; but if they</div><div class='del'>-	 * do, it should be 8 regardless of host architecture, becaues BPF</div><div class='add'>+	 * do, it should be 8 regardless of host architecture, because BPF</div><div class='ctx'> 	 * target is always 64-bit</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!t-&gt;known_ptr_sz) {</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/btf_split.c b/tools/testing/selftests/bpf/prog_tests/btf_split.c<br/>index 3696fb9a05ed..2d47cad50a51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf_split.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/btf_split.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/btf_split.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/btf_split.c</a></div><div class='hunk'>@@ -12,11 +12,45 @@ static void btf_dump_printf(void *ctx, const char *fmt, va_list args)</div><div class='ctx'> 	vfprintf(ctx, fmt, args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Write raw BTF to file, return number of bytes written or negative errno */</div><div class='add'>+static ssize_t btf_raw_write(struct btf *btf, char *file)</div><div class='add'>+{</div><div class='add'>+	ssize_t written = 0;</div><div class='add'>+	const void *data;</div><div class='add'>+	__u32 size = 0;</div><div class='add'>+	int fd, ret;</div><div class='add'>+</div><div class='add'>+	fd = mkstemp(file);</div><div class='add'>+	if (!ASSERT_GE(fd, 0, "create_file"))</div><div class='add'>+		return -errno;</div><div class='add'>+</div><div class='add'>+	data = btf__raw_data(btf, &amp;size);</div><div class='add'>+	if (!ASSERT_OK_PTR(data, "btf__raw_data")) {</div><div class='add'>+		close(fd);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	while (written &lt; size) {</div><div class='add'>+		ret = write(fd, data + written, size - written);</div><div class='add'>+		if (!ASSERT_GE(ret, 0, "write succeeded")) {</div><div class='add'>+			close(fd);</div><div class='add'>+			return -errno;</div><div class='add'>+		}</div><div class='add'>+		written += ret;</div><div class='add'>+	}</div><div class='add'>+	close(fd);</div><div class='add'>+	return written;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __test_btf_split(bool multi)</div><div class='ctx'> {</div><div class='add'>+	char multisplit_btf_file[] = "/tmp/test_btf_multisplit.XXXXXX";</div><div class='add'>+	char split_btf_file[] = "/tmp/test_btf_split.XXXXXX";</div><div class='add'>+	char base_btf_file[] = "/tmp/test_btf_base.XXXXXX";</div><div class='add'>+	ssize_t multisplit_btf_sz = 0, split_btf_sz = 0, base_btf_sz = 0;</div><div class='ctx'> 	struct btf_dump *d = NULL;</div><div class='del'>-	const struct btf_type *t;</div><div class='del'>-	struct btf *btf1, *btf2, *btf3 = NULL;</div><div class='add'>+	const struct btf_type *t, *ot;</div><div class='add'>+	struct btf *btf1 = NULL, *btf2 = NULL, *btf3 = NULL;</div><div class='add'>+	struct btf *btf4 = NULL, *btf5 = NULL, *btf6 = NULL;</div><div class='ctx'> 	int str_off, i, err;</div><div class='ctx'> </div><div class='ctx'> 	btf1 = btf__new_empty();</div><div class='hunk'>@@ -123,6 +157,45 @@ static void __test_btf_split(bool multi)</div><div class='ctx'> "	int uf2;\n"</div><div class='ctx'> "};\n\n", "c_dump");</div><div class='ctx'> </div><div class='add'>+	/* write base, split BTFs to files and ensure parsing succeeds */</div><div class='add'>+	base_btf_sz = btf_raw_write(btf1, base_btf_file);</div><div class='add'>+	if (base_btf_sz &lt; 0)</div><div class='add'>+		goto cleanup;</div><div class='add'>+	split_btf_sz = btf_raw_write(btf2, split_btf_file);</div><div class='add'>+	if (split_btf_sz &lt; 0)</div><div class='add'>+		goto cleanup;</div><div class='add'>+	btf4 = btf__parse(base_btf_file, NULL);</div><div class='add'>+	if (!ASSERT_OK_PTR(btf4, "parse_base"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+	btf5 = btf__parse_split(split_btf_file, btf4);</div><div class='add'>+	if (!ASSERT_OK_PTR(btf5, "parse_split"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+	if (multi) {</div><div class='add'>+		multisplit_btf_sz = btf_raw_write(btf3, multisplit_btf_file);</div><div class='add'>+		if (multisplit_btf_sz &lt; 0)</div><div class='add'>+			goto cleanup;</div><div class='add'>+		btf6 = btf__parse_split(multisplit_btf_file, btf5);</div><div class='add'>+		if (!ASSERT_OK_PTR(btf6, "parse_multisplit"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	} else {</div><div class='add'>+		btf6 = btf5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(btf__type_cnt(btf3), btf__type_cnt(btf6), "cmp_type_cnt"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* compare parsed to original BTF */</div><div class='add'>+	for (i = 1; i &lt; btf__type_cnt(btf6); i++) {</div><div class='add'>+		t = btf__type_by_id(btf6, i);</div><div class='add'>+		if (!ASSERT_OK_PTR(t, "type_in_parsed_btf"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+		ot = btf__type_by_id(btf3, i);</div><div class='add'>+		if (!ASSERT_OK_PTR(ot, "type_in_orig_btf"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+		if (!ASSERT_EQ(memcmp(t, ot, sizeof(*ot)), 0, "cmp_parsed_orig_btf"))</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> cleanup:</div><div class='ctx'> 	if (dump_buf_file)</div><div class='ctx'> 		fclose(dump_buf_file);</div><div class='hunk'>@@ -132,6 +205,16 @@ cleanup:</div><div class='ctx'> 	btf__free(btf2);</div><div class='ctx'> 	if (btf2 != btf3)</div><div class='ctx'> 		btf__free(btf3);</div><div class='add'>+	btf__free(btf4);</div><div class='add'>+	btf__free(btf5);</div><div class='add'>+	if (btf5 != btf6)</div><div class='add'>+		btf__free(btf6);</div><div class='add'>+	if (base_btf_sz &gt; 0)</div><div class='add'>+		unlink(base_btf_file);</div><div class='add'>+	if (split_btf_sz &gt; 0)</div><div class='add'>+		unlink(split_btf_file);</div><div class='add'>+	if (multisplit_btf_sz &gt; 0)</div><div class='add'>+		unlink(multisplit_btf_file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void test_btf_split(void)</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c b/tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c<br/>index e0dd966e4a3e..5ad904e9d15d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/cgroup_xattr.c</a></div><div class='hunk'>@@ -44,7 +44,7 @@ static void test_read_cgroup_xattr(void)</div><div class='ctx'> 	if (!ASSERT_OK_PTR(skel, "read_cgroupfs_xattr__open_and_load"))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	skel-&gt;bss-&gt;target_pid = gettid();</div><div class='add'>+	skel-&gt;bss-&gt;target_pid = sys_gettid();</div><div class='ctx'> </div><div class='ctx'> 	if (!ASSERT_OK(read_cgroupfs_xattr__attach(skel), "read_cgroupfs_xattr__attach"))</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c b/tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c<br/>index adda85f97058..4b42fbc96efc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/cgrp_kfunc.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #define _GNU_SOURCE</div><div class='ctx'> #include &lt;cgroup_helpers.h&gt;</div><div class='ctx'> #include &lt;test_progs.h&gt;</div><div class='add'>+#include &lt;sched.h&gt;</div><div class='add'>+#include &lt;sys/wait.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cgrp_kfunc_failure.skel.h"</div><div class='ctx'> #include "cgrp_kfunc_success.skel.h"</div><div class='hunk'>@@ -87,6 +89,72 @@ static const char * const success_tests[] = {</div><div class='ctx'> 	"test_cgrp_from_id",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void test_cgrp_from_id_ns(void)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, opts);</div><div class='add'>+	struct cgrp_kfunc_success *skel;</div><div class='add'>+	struct bpf_program *prog;</div><div class='add'>+	int pid, pipe_fd[2];</div><div class='add'>+</div><div class='add'>+	skel = open_load_cgrp_kfunc_skel();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "open_load_skel"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_OK(skel-&gt;bss-&gt;err, "pre_mkdir_err"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	prog = skel-&gt;progs.test_cgrp_from_id_ns;</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_OK(pipe(pipe_fd), "pipe"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	pid = fork();</div><div class='add'>+	if (!ASSERT_GE(pid, 0, "fork result")) {</div><div class='add'>+		close(pipe_fd[0]);</div><div class='add'>+		close(pipe_fd[1]);</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pid == 0) {</div><div class='add'>+		int ret = 0;</div><div class='add'>+</div><div class='add'>+		close(pipe_fd[0]);</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_GE(cgroup_setup_and_join("cgrp_from_id_ns"), 0, "join cgroup"))</div><div class='add'>+			exit(1);</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_OK(unshare(CLONE_NEWCGROUP), "unshare cgns"))</div><div class='add'>+			exit(1);</div><div class='add'>+</div><div class='add'>+		ret = bpf_prog_test_run_opts(bpf_program__fd(prog), &amp;opts);</div><div class='add'>+		if (!ASSERT_OK(ret, "test run ret"))</div><div class='add'>+			exit(1);</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_OK(opts.retval, "test run retval"))</div><div class='add'>+			exit(1);</div><div class='add'>+</div><div class='add'>+		if (!ASSERT_EQ(write(pipe_fd[1], &amp;ret, sizeof(ret)), sizeof(ret), "write pipe"))</div><div class='add'>+			exit(1);</div><div class='add'>+</div><div class='add'>+		exit(0);</div><div class='add'>+	} else {</div><div class='add'>+		int res;</div><div class='add'>+</div><div class='add'>+		close(pipe_fd[1]);</div><div class='add'>+</div><div class='add'>+		ASSERT_EQ(read(pipe_fd[0], &amp;res, sizeof(res)), sizeof(res), "read res");</div><div class='add'>+		ASSERT_EQ(waitpid(pid, NULL, 0), pid, "wait on child");</div><div class='add'>+</div><div class='add'>+		remove_cgroup_pid("cgrp_from_id_ns", pid);</div><div class='add'>+</div><div class='add'>+		ASSERT_OK(res, "result from run");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	close(pipe_fd[0]);</div><div class='add'>+cleanup:</div><div class='add'>+	cgrp_kfunc_success__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void test_cgrp_kfunc(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err;</div><div class='hunk'>@@ -102,6 +170,9 @@ void test_cgrp_kfunc(void)</div><div class='ctx'> 		run_success_test(success_tests[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (test__start_subtest("test_cgrp_from_id_ns"))</div><div class='add'>+		test_cgrp_from_id_ns();</div><div class='add'>+</div><div class='ctx'> 	RUN_TESTS(cgrp_kfunc_failure);</div><div class='ctx'> </div><div class='ctx'> cleanup:</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/check_mtu.c b/tools/testing/selftests/bpf/prog_tests/check_mtu.c<br/>index 2a9a30650350..65b4512967e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/check_mtu.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/check_mtu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/check_mtu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/check_mtu.c</a></div><div class='hunk'>@@ -153,6 +153,26 @@ static void test_check_mtu_run_tc(struct test_check_mtu *skel,</div><div class='ctx'> 	ASSERT_EQ(mtu_result, mtu_expect, "MTU-compare-user");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void test_chk_segs_flag(struct test_check_mtu *skel, __u32 mtu)</div><div class='add'>+{</div><div class='add'>+	int err, prog_fd = bpf_program__fd(skel-&gt;progs.tc_chk_segs_flag);</div><div class='add'>+	struct __sk_buff skb = {</div><div class='add'>+		.gso_size = 10,</div><div class='add'>+	};</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, topts,</div><div class='add'>+		    .data_in = &amp;pkt_v4,</div><div class='add'>+		    .data_size_in = sizeof(pkt_v4),</div><div class='add'>+		    .ctx_in = &amp;skb,</div><div class='add'>+		    .ctx_size_in = sizeof(skb),</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	/* Lower the mtu to test the BPF_MTU_CHK_SEGS */</div><div class='add'>+	SYS_NOFAIL("ip link set dev lo mtu 10");</div><div class='add'>+	err = bpf_prog_test_run_opts(prog_fd, &amp;topts);</div><div class='add'>+	SYS_NOFAIL("ip link set dev lo mtu %u", mtu);</div><div class='add'>+	ASSERT_OK(err, "test_run");</div><div class='add'>+	ASSERT_EQ(topts.retval, BPF_OK, "retval");</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void test_check_mtu_tc(__u32 mtu, __u32 ifindex)</div><div class='ctx'> {</div><div class='hunk'>@@ -177,11 +197,12 @@ static void test_check_mtu_tc(__u32 mtu, __u32 ifindex)</div><div class='ctx'> 	test_check_mtu_run_tc(skel, skel-&gt;progs.tc_minus_delta, mtu);</div><div class='ctx'> 	test_check_mtu_run_tc(skel, skel-&gt;progs.tc_input_len, mtu);</div><div class='ctx'> 	test_check_mtu_run_tc(skel, skel-&gt;progs.tc_input_len_exceed, mtu);</div><div class='add'>+	test_chk_segs_flag(skel, mtu);</div><div class='ctx'> cleanup:</div><div class='ctx'> 	test_check_mtu__destroy(skel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void serial_test_check_mtu(void)</div><div class='add'>+void test_ns_check_mtu(void)</div><div class='ctx'> {</div><div class='ctx'> 	int mtu_lo;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/cls_redirect.c b/tools/testing/selftests/bpf/prog_tests/cls_redirect.c<br/>index 34b59f6baca1..7488a7606e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cls_redirect.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/cls_redirect.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/cls_redirect.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/cls_redirect.c</a></div><div class='hunk'>@@ -22,79 +22,37 @@</div><div class='ctx'> </div><div class='ctx'> static int duration = 0;</div><div class='ctx'> </div><div class='del'>-struct addr_port {</div><div class='del'>-	in_port_t port;</div><div class='del'>-	union {</div><div class='del'>-		struct in_addr in_addr;</div><div class='del'>-		struct in6_addr in6_addr;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tuple {</div><div class='del'>-	int family;</div><div class='del'>-	struct addr_port src;</div><div class='del'>-	struct addr_port dst;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool fill_addr_port(const struct sockaddr *sa, struct addr_port *ap)</div><div class='del'>-{</div><div class='del'>-	const struct sockaddr_in6 *in6;</div><div class='del'>-	const struct sockaddr_in *in;</div><div class='del'>-</div><div class='del'>-	switch (sa-&gt;sa_family) {</div><div class='del'>-	case AF_INET:</div><div class='del'>-		in = (const struct sockaddr_in *)sa;</div><div class='del'>-		ap-&gt;in_addr = in-&gt;sin_addr;</div><div class='del'>-		ap-&gt;port = in-&gt;sin_port;</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	case AF_INET6:</div><div class='del'>-		in6 = (const struct sockaddr_in6 *)sa;</div><div class='del'>-		ap-&gt;in6_addr = in6-&gt;sin6_addr;</div><div class='del'>-		ap-&gt;port = in6-&gt;sin6_port;</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static bool set_up_conn(const struct sockaddr *addr, socklen_t len, int type,</div><div class='del'>-			int *server, int *conn, struct tuple *tuple)</div><div class='add'>+static bool set_up_conn(const struct sockaddr_storage *addr, socklen_t len, int type,</div><div class='add'>+			int *server, int *conn,</div><div class='add'>+			struct sockaddr_storage *src,</div><div class='add'>+			struct sockaddr_storage *dst)</div><div class='ctx'> {</div><div class='ctx'> 	struct sockaddr_storage ss;</div><div class='ctx'> 	socklen_t slen = sizeof(ss);</div><div class='del'>-	struct sockaddr *sa = (struct sockaddr *)&amp;ss;</div><div class='ctx'> </div><div class='del'>-	*server = start_server_addr(type, (struct sockaddr_storage *)addr, len, NULL);</div><div class='add'>+	*server = start_server_addr(type, addr, len, NULL);</div><div class='ctx'> 	if (*server &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (CHECK_FAIL(getsockname(*server, sa, &amp;slen)))</div><div class='add'>+	if (CHECK_FAIL(getsockname(*server, (struct sockaddr *)&amp;ss, &amp;slen)))</div><div class='ctx'> 		goto close_server;</div><div class='ctx'> </div><div class='del'>-	*conn = connect_to_addr(type, (struct sockaddr_storage *)sa, slen, NULL);</div><div class='add'>+	*conn = connect_to_addr(type, &amp;ss, slen, NULL);</div><div class='ctx'> 	if (*conn &lt; 0)</div><div class='ctx'> 		goto close_server;</div><div class='ctx'> </div><div class='ctx'> 	/* We want to simulate packets arriving at conn, so we have to</div><div class='ctx'> 	 * swap src and dst.</div><div class='ctx'> 	 */</div><div class='del'>-	slen = sizeof(ss);</div><div class='del'>-	if (CHECK_FAIL(getsockname(*conn, sa, &amp;slen)))</div><div class='del'>-		goto close_conn;</div><div class='del'>-</div><div class='del'>-	if (CHECK_FAIL(!fill_addr_port(sa, &amp;tuple-&gt;dst)))</div><div class='add'>+	slen = sizeof(*dst);</div><div class='add'>+	if (CHECK_FAIL(getsockname(*conn, (struct sockaddr *)dst, &amp;slen)))</div><div class='ctx'> 		goto close_conn;</div><div class='ctx'> </div><div class='del'>-	slen = sizeof(ss);</div><div class='del'>-	if (CHECK_FAIL(getpeername(*conn, sa, &amp;slen)))</div><div class='add'>+	slen = sizeof(*src);</div><div class='add'>+	if (CHECK_FAIL(getpeername(*conn, (struct sockaddr *)src, &amp;slen)))</div><div class='ctx'> 		goto close_conn;</div><div class='ctx'> </div><div class='del'>-	if (CHECK_FAIL(!fill_addr_port(sa, &amp;tuple-&gt;src)))</div><div class='del'>-		goto close_conn;</div><div class='del'>-</div><div class='del'>-	tuple-&gt;family = ss.ss_family;</div><div class='ctx'> 	return true;</div><div class='ctx'> </div><div class='ctx'> close_conn:</div><div class='hunk'>@@ -110,17 +68,16 @@ static socklen_t prepare_addr(struct sockaddr_storage *addr, int family)</div><div class='ctx'> {</div><div class='ctx'> 	struct sockaddr_in *addr4;</div><div class='ctx'> 	struct sockaddr_in6 *addr6;</div><div class='add'>+	memset(addr, 0, sizeof(*addr));</div><div class='ctx'> </div><div class='ctx'> 	switch (family) {</div><div class='ctx'> 	case AF_INET:</div><div class='ctx'> 		addr4 = (struct sockaddr_in *)addr;</div><div class='del'>-		memset(addr4, 0, sizeof(*addr4));</div><div class='ctx'> 		addr4-&gt;sin_family = family;</div><div class='ctx'> 		addr4-&gt;sin_addr.s_addr = htonl(INADDR_LOOPBACK);</div><div class='ctx'> 		return sizeof(*addr4);</div><div class='ctx'> 	case AF_INET6:</div><div class='ctx'> 		addr6 = (struct sockaddr_in6 *)addr;</div><div class='del'>-		memset(addr6, 0, sizeof(*addr6));</div><div class='ctx'> 		addr6-&gt;sin6_family = family;</div><div class='ctx'> 		addr6-&gt;sin6_addr = in6addr_loopback;</div><div class='ctx'> 		return sizeof(*addr6);</div><div class='hunk'>@@ -242,9 +199,15 @@ static void encap_init(encap_headers_t *encap, uint8_t hop_count, uint8_t proto)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static size_t build_input(const struct test_cfg *test, void *const buf,</div><div class='del'>-			  const struct tuple *tuple)</div><div class='add'>+			  const struct sockaddr_storage *src,</div><div class='add'>+			  const struct sockaddr_storage *dst)</div><div class='ctx'> {</div><div class='del'>-	in_port_t sport = tuple-&gt;src.port;</div><div class='add'>+	struct sockaddr_in6 *src_in6 = (struct sockaddr_in6 *)src;</div><div class='add'>+	struct sockaddr_in6 *dst_in6 = (struct sockaddr_in6 *)dst;</div><div class='add'>+	struct sockaddr_in *src_in = (struct sockaddr_in *)src;</div><div class='add'>+	struct sockaddr_in *dst_in = (struct sockaddr_in *)dst;</div><div class='add'>+	sa_family_t family = src-&gt;ss_family;</div><div class='add'>+	in_port_t sport, dport;</div><div class='ctx'> 	encap_headers_t encap;</div><div class='ctx'> 	struct iphdr ip;</div><div class='ctx'> 	struct ipv6hdr ipv6;</div><div class='hunk'>@@ -254,8 +217,11 @@ static size_t build_input(const struct test_cfg *test, void *const buf,</div><div class='ctx'> 	uint8_t *p = buf;</div><div class='ctx'> 	int proto;</div><div class='ctx'> </div><div class='add'>+	sport = (family == AF_INET) ? src_in-&gt;sin_port : src_in6-&gt;sin6_port;</div><div class='add'>+	dport = (family == AF_INET) ? dst_in-&gt;sin_port : dst_in6-&gt;sin6_port;</div><div class='add'>+</div><div class='ctx'> 	proto = IPPROTO_IPIP;</div><div class='del'>-	if (tuple-&gt;family == AF_INET6)</div><div class='add'>+	if (family == AF_INET6)</div><div class='ctx'> 		proto = IPPROTO_IPV6;</div><div class='ctx'> </div><div class='ctx'> 	encap_init(&amp;encap, test-&gt;hops == ONE_HOP ? 1 : 0, proto);</div><div class='hunk'>@@ -270,15 +236,15 @@ static size_t build_input(const struct test_cfg *test, void *const buf,</div><div class='ctx'> 	if (test-&gt;type == UDP)</div><div class='ctx'> 		proto = IPPROTO_UDP;</div><div class='ctx'> </div><div class='del'>-	switch (tuple-&gt;family) {</div><div class='add'>+	switch (family) {</div><div class='ctx'> 	case AF_INET:</div><div class='ctx'> 		ip = (struct iphdr){</div><div class='ctx'> 			.ihl = 5,</div><div class='ctx'> 			.version = 4,</div><div class='ctx'> 			.ttl = IPDEFTTL,</div><div class='ctx'> 			.protocol = proto,</div><div class='del'>-			.saddr = tuple-&gt;src.in_addr.s_addr,</div><div class='del'>-			.daddr = tuple-&gt;dst.in_addr.s_addr,</div><div class='add'>+			.saddr = src_in-&gt;sin_addr.s_addr,</div><div class='add'>+			.daddr = dst_in-&gt;sin_addr.s_addr,</div><div class='ctx'> 		};</div><div class='ctx'> 		p = mempcpy(p, &amp;ip, sizeof(ip));</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -287,8 +253,8 @@ static size_t build_input(const struct test_cfg *test, void *const buf,</div><div class='ctx'> 			.version = 6,</div><div class='ctx'> 			.hop_limit = IPDEFTTL,</div><div class='ctx'> 			.nexthdr = proto,</div><div class='del'>-			.saddr = tuple-&gt;src.in6_addr,</div><div class='del'>-			.daddr = tuple-&gt;dst.in6_addr,</div><div class='add'>+			.saddr = src_in6-&gt;sin6_addr,</div><div class='add'>+			.daddr = dst_in6-&gt;sin6_addr,</div><div class='ctx'> 		};</div><div class='ctx'> 		p = mempcpy(p, &amp;ipv6, sizeof(ipv6));</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -303,18 +269,16 @@ static size_t build_input(const struct test_cfg *test, void *const buf,</div><div class='ctx'> 	case TCP:</div><div class='ctx'> 		tcp = (struct tcphdr){</div><div class='ctx'> 			.source = sport,</div><div class='del'>-			.dest = tuple-&gt;dst.port,</div><div class='add'>+			.dest = dport,</div><div class='add'>+			.syn = (test-&gt;flags == SYN),</div><div class='add'>+			.ack = (test-&gt;flags == ACK),</div><div class='ctx'> 		};</div><div class='del'>-		if (test-&gt;flags == SYN)</div><div class='del'>-			tcp.syn = true;</div><div class='del'>-		if (test-&gt;flags == ACK)</div><div class='del'>-			tcp.ack = true;</div><div class='ctx'> 		p = mempcpy(p, &amp;tcp, sizeof(tcp));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP:</div><div class='ctx'> 		udp = (struct udphdr){</div><div class='ctx'> 			.source = sport,</div><div class='del'>-			.dest = tuple-&gt;dst.port,</div><div class='add'>+			.dest = dport,</div><div class='ctx'> 		};</div><div class='ctx'> 		p = mempcpy(p, &amp;udp, sizeof(udp));</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -339,27 +303,26 @@ static void test_cls_redirect_common(struct bpf_program *prog)</div><div class='ctx'> 	LIBBPF_OPTS(bpf_test_run_opts, tattr);</div><div class='ctx'> 	int families[] = { AF_INET, AF_INET6 };</div><div class='ctx'> 	struct sockaddr_storage ss;</div><div class='del'>-	struct sockaddr *addr;</div><div class='ctx'> 	socklen_t slen;</div><div class='ctx'> 	int i, j, err, prog_fd;</div><div class='ctx'> 	int servers[__NR_KIND][ARRAY_SIZE(families)] = {};</div><div class='ctx'> 	int conns[__NR_KIND][ARRAY_SIZE(families)] = {};</div><div class='del'>-	struct tuple tuples[__NR_KIND][ARRAY_SIZE(families)];</div><div class='add'>+	struct sockaddr_storage srcs[__NR_KIND][ARRAY_SIZE(families)];</div><div class='add'>+	struct sockaddr_storage dsts[__NR_KIND][ARRAY_SIZE(families)];</div><div class='ctx'> </div><div class='del'>-	addr = (struct sockaddr *)&amp;ss;</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(families); i++) {</div><div class='ctx'> 		slen = prepare_addr(&amp;ss, families[i]);</div><div class='ctx'> 		if (CHECK_FAIL(!slen))</div><div class='ctx'> 			goto cleanup;</div><div class='ctx'> </div><div class='del'>-		if (CHECK_FAIL(!set_up_conn(addr, slen, SOCK_DGRAM,</div><div class='add'>+		if (CHECK_FAIL(!set_up_conn(&amp;ss, slen, SOCK_DGRAM,</div><div class='ctx'> 					    &amp;servers[UDP][i], &amp;conns[UDP][i],</div><div class='del'>-					    &amp;tuples[UDP][i])))</div><div class='add'>+					    &amp;srcs[UDP][i], &amp;dsts[UDP][i])))</div><div class='ctx'> 			goto cleanup;</div><div class='ctx'> </div><div class='del'>-		if (CHECK_FAIL(!set_up_conn(addr, slen, SOCK_STREAM,</div><div class='add'>+		if (CHECK_FAIL(!set_up_conn(&amp;ss, slen, SOCK_STREAM,</div><div class='ctx'> 					    &amp;servers[TCP][i], &amp;conns[TCP][i],</div><div class='del'>-					    &amp;tuples[TCP][i])))</div><div class='add'>+					    &amp;srcs[TCP][i], &amp;dsts[TCP][i])))</div><div class='ctx'> 			goto cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -368,11 +331,12 @@ static void test_cls_redirect_common(struct bpf_program *prog)</div><div class='ctx'> 		struct test_cfg *test = &amp;tests[i];</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; ARRAY_SIZE(families); j++) {</div><div class='del'>-			struct tuple *tuple = &amp;tuples[test-&gt;type][j];</div><div class='add'>+			struct sockaddr_storage *src = &amp;srcs[test-&gt;type][j];</div><div class='add'>+			struct sockaddr_storage *dst = &amp;dsts[test-&gt;type][j];</div><div class='ctx'> 			char input[256];</div><div class='ctx'> 			char tmp[256];</div><div class='ctx'> </div><div class='del'>-			test_str(tmp, sizeof(tmp), test, tuple-&gt;family);</div><div class='add'>+			test_str(tmp, sizeof(tmp), test, families[j]);</div><div class='ctx'> 			if (!test__start_subtest(tmp))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='hunk'>@@ -380,7 +344,7 @@ static void test_cls_redirect_common(struct bpf_program *prog)</div><div class='ctx'> 			tattr.data_size_out = sizeof(tmp);</div><div class='ctx'> </div><div class='ctx'> 			tattr.data_in = input;</div><div class='del'>-			tattr.data_size_in = build_input(test, input, tuple);</div><div class='add'>+			tattr.data_size_in = build_input(test, input, src, dst);</div><div class='ctx'> 			if (CHECK_FAIL(!tattr.data_size_in))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/dynptr.c b/tools/testing/selftests/bpf/prog_tests/dynptr.c<br/>index 9b2d9ceda210..b9f86cb91e81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/dynptr.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/dynptr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/dynptr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/dynptr.c</a></div><div class='hunk'>@@ -32,6 +32,8 @@ static struct {</div><div class='ctx'> 	{"test_ringbuf", SETUP_SYSCALL_SLEEP},</div><div class='ctx'> 	{"test_skb_readonly", SETUP_SKB_PROG},</div><div class='ctx'> 	{"test_dynptr_skb_data", SETUP_SKB_PROG},</div><div class='add'>+	{"test_dynptr_skb_meta_data", SETUP_SKB_PROG},</div><div class='add'>+	{"test_dynptr_skb_meta_flags", SETUP_SKB_PROG},</div><div class='ctx'> 	{"test_adjust", SETUP_SYSCALL_SLEEP},</div><div class='ctx'> 	{"test_adjust_err", SETUP_SYSCALL_SLEEP},</div><div class='ctx'> 	{"test_zero_size_dynptr", SETUP_SYSCALL_SLEEP},</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/fd_array.c b/tools/testing/selftests/bpf/prog_tests/fd_array.c<br/>index 241b2c8c6e0f..c534b4d5f9da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fd_array.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fd_array.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fd_array.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/fd_array.c</a></div><div class='hunk'>@@ -293,7 +293,7 @@ static int get_btf_id_by_fd(int btf_fd, __u32 *id)</div><div class='ctx'>  *  1) Create a new btf, it's referenced only by a file descriptor, so refcnt=1</div><div class='ctx'>  *  2) Load a BPF prog with fd_array[0] = btf_fd; now btf's refcnt=2</div><div class='ctx'>  *  3) Close the btf_fd, now refcnt=1</div><div class='del'>- * Wait and check that BTF stil exists.</div><div class='add'>+ * Wait and check that BTF still exists.</div><div class='ctx'>  */</div><div class='ctx'> static void check_fd_array_cnt__referenced_btfs(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/fentry_fexit.c b/tools/testing/selftests/bpf/prog_tests/fentry_fexit.c<br/>index 130f5b82d2e6..5ef1804e44df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fentry_fexit.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fentry_fexit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fentry_fexit.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/fentry_fexit.c</a></div><div class='hunk'>@@ -12,13 +12,24 @@ void test_fentry_fexit(void)</div><div class='ctx'> 	int err, prog_fd, i;</div><div class='ctx'> 	LIBBPF_OPTS(bpf_test_run_opts, topts);</div><div class='ctx'> </div><div class='del'>-	fentry_skel = fentry_test_lskel__open_and_load();</div><div class='add'>+	fentry_skel = fentry_test_lskel__open();</div><div class='ctx'> 	if (!ASSERT_OK_PTR(fentry_skel, "fentry_skel_load"))</div><div class='ctx'> 		goto close_prog;</div><div class='del'>-	fexit_skel = fexit_test_lskel__open_and_load();</div><div class='add'>+</div><div class='add'>+	fentry_skel-&gt;keyring_id	= KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+	err = fentry_test_lskel__load(fentry_skel);</div><div class='add'>+	if (!ASSERT_OK(err, "fentry_skel_load"))</div><div class='add'>+		goto close_prog;</div><div class='add'>+</div><div class='add'>+	fexit_skel = fexit_test_lskel__open();</div><div class='ctx'> 	if (!ASSERT_OK_PTR(fexit_skel, "fexit_skel_load"))</div><div class='ctx'> 		goto close_prog;</div><div class='ctx'> </div><div class='add'>+	fexit_skel-&gt;keyring_id	= KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+	err = fexit_test_lskel__load(fexit_skel);</div><div class='add'>+	if (!ASSERT_OK(err, "fexit_skel_load"))</div><div class='add'>+		goto close_prog;</div><div class='add'>+</div><div class='ctx'> 	err = fentry_test_lskel__attach(fentry_skel);</div><div class='ctx'> 	if (!ASSERT_OK(err, "fentry_attach"))</div><div class='ctx'> 		goto close_prog;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/fentry_test.c b/tools/testing/selftests/bpf/prog_tests/fentry_test.c<br/>index aee1bc77a17f..ec882328eb59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fentry_test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fentry_test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fentry_test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/fentry_test.c</a></div><div class='hunk'>@@ -43,8 +43,13 @@ static void fentry_test(void)</div><div class='ctx'> 	struct fentry_test_lskel *fentry_skel = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	fentry_skel = fentry_test_lskel__open_and_load();</div><div class='del'>-	if (!ASSERT_OK_PTR(fentry_skel, "fentry_skel_load"))</div><div class='add'>+	fentry_skel = fentry_test_lskel__open();</div><div class='add'>+	if (!ASSERT_OK_PTR(fentry_skel, "fentry_skel_open"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	fentry_skel-&gt;keyring_id	= KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+	err = fentry_test_lskel__load(fentry_skel);</div><div class='add'>+	if (!ASSERT_OK(err, "fentry_skel_load"))</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> </div><div class='ctx'> 	err = fentry_test_common(fentry_skel);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/fexit_test.c b/tools/testing/selftests/bpf/prog_tests/fexit_test.c<br/>index 1c13007e37dd..94eed753560c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fexit_test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/fexit_test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/fexit_test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/fexit_test.c</a></div><div class='hunk'>@@ -43,8 +43,13 @@ static void fexit_test(void)</div><div class='ctx'> 	struct fexit_test_lskel *fexit_skel = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	fexit_skel = fexit_test_lskel__open_and_load();</div><div class='del'>-	if (!ASSERT_OK_PTR(fexit_skel, "fexit_skel_load"))</div><div class='add'>+	fexit_skel = fexit_test_lskel__open();</div><div class='add'>+	if (!ASSERT_OK_PTR(fexit_skel, "fexit_skel_open"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	fexit_skel-&gt;keyring_id	= KEY_SPEC_SESSION_KEYRING;</div><div class='add'>+	err = fexit_test_lskel__load(fexit_skel);</div><div class='add'>+	if (!ASSERT_OK(err, "fexit_skel_load"))</div><div class='ctx'> 		goto cleanup;</div><div class='ctx'> </div><div class='ctx'> 	err = fexit_test_common(fexit_skel);</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/file_reader.c b/tools/testing/selftests/bpf/prog_tests/file_reader.c<br/>new file mode 100644<br/>index 000000000000..5cde32b35da4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/file_reader.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/file_reader.c</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include &lt;network_helpers.h&gt;</div><div class='add'>+#include "file_reader.skel.h"</div><div class='add'>+#include "file_reader_fail.skel.h"</div><div class='add'>+#include &lt;dlfcn.h&gt;</div><div class='add'>+#include &lt;sys/mman.h&gt;</div><div class='add'>+</div><div class='add'>+const char *user_ptr = "hello world";</div><div class='add'>+char file_contents[256000];</div><div class='add'>+</div><div class='add'>+void *get_executable_base_addr(void)</div><div class='add'>+{</div><div class='add'>+	Dl_info info;</div><div class='add'>+</div><div class='add'>+	if (!dladdr((void *)&amp;get_executable_base_addr, &amp;info)) {</div><div class='add'>+		fprintf(stderr, "dladdr failed\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return info.dli_fbase;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int initialize_file_contents(void)</div><div class='add'>+{</div><div class='add'>+	int fd, page_sz = sysconf(_SC_PAGESIZE);</div><div class='add'>+	ssize_t n = 0, cur, off;</div><div class='add'>+	void *addr;</div><div class='add'>+</div><div class='add'>+	fd = open("/proc/self/exe", O_RDONLY);</div><div class='add'>+	if (!ASSERT_OK_FD(fd, "Open /proc/self/exe\n"))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		cur = read(fd, file_contents + n, sizeof(file_contents) - n);</div><div class='add'>+		if (!ASSERT_GT(cur, 0, "read success"))</div><div class='add'>+			break;</div><div class='add'>+		n += cur;</div><div class='add'>+	} while (n &lt; sizeof(file_contents));</div><div class='add'>+</div><div class='add'>+	close(fd);</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_EQ(n, sizeof(file_contents), "Read /proc/self/exe\n"))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	addr = get_executable_base_addr();</div><div class='add'>+	if (!ASSERT_NEQ(addr, NULL, "get executable address"))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/* page-align base file address */</div><div class='add'>+	addr = (void *)((unsigned long)addr &amp; ~(page_sz - 1));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Page out range 0..512K, use 0..256K for positive tests and</div><div class='add'>+	 * 256K..512K for negative tests expecting page faults</div><div class='add'>+	 */</div><div class='add'>+	for (off = 0; off &lt; sizeof(file_contents) * 2; off += page_sz) {</div><div class='add'>+		if (!ASSERT_OK(madvise(addr + off, page_sz, MADV_PAGEOUT),</div><div class='add'>+			       "madvise pageout"))</div><div class='add'>+			return errno;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void run_test(const char *prog_name)</div><div class='add'>+{</div><div class='add'>+	struct file_reader *skel;</div><div class='add'>+	struct bpf_program *prog;</div><div class='add'>+	int err, fd;</div><div class='add'>+</div><div class='add'>+	err = initialize_file_contents();</div><div class='add'>+	if (!ASSERT_OK(err, "initialize file contents"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel = file_reader__open();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "file_reader__open"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bpf_object__for_each_program(prog, skel-&gt;obj) {</div><div class='add'>+		bpf_program__set_autoload(prog, strcmp(bpf_program__name(prog), prog_name) == 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(skel-&gt;bss-&gt;user_buf, file_contents, sizeof(file_contents));</div><div class='add'>+	skel-&gt;bss-&gt;pid = getpid();</div><div class='add'>+</div><div class='add'>+	err = file_reader__load(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "file_reader__load"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	err = file_reader__attach(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "file_reader__attach"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	fd = open("/proc/self/exe", O_RDONLY);</div><div class='add'>+	if (fd &gt;= 0)</div><div class='add'>+		close(fd);</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;err, 0, "err");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;run_success, 1, "run_success");</div><div class='add'>+cleanup:</div><div class='add'>+	file_reader__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_file_reader(void)</div><div class='add'>+{</div><div class='add'>+	if (test__start_subtest("on_open_expect_fault"))</div><div class='add'>+		run_test("on_open_expect_fault");</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("on_open_validate_file_read"))</div><div class='add'>+		run_test("on_open_validate_file_read");</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("negative"))</div><div class='add'>+		RUN_TESTS(file_reader_fail);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/free_timer.c b/tools/testing/selftests/bpf/prog_tests/free_timer.c<br/>index b7b77a6b2979..0de8facca4c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/free_timer.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/free_timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/free_timer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/free_timer.c</a></div><div class='hunk'>@@ -124,6 +124,10 @@ void test_free_timer(void)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	skel = free_timer__open_and_load();</div><div class='add'>+	if (!skel &amp;&amp; errno == EOPNOTSUPP) {</div><div class='add'>+		test__skip();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	if (!ASSERT_OK_PTR(skel, "open_load"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/htab_update.c b/tools/testing/selftests/bpf/prog_tests/htab_update.c<br/>index 2bc85f4814f4..d0b405eb2966 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/htab_update.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/htab_update.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/htab_update.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/htab_update.c</a></div><div class='hunk'>@@ -15,17 +15,17 @@ struct htab_update_ctx {</div><div class='ctx'> static void test_reenter_update(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct htab_update *skel;</div><div class='del'>-	unsigned int key, value;</div><div class='add'>+	void *value = NULL;</div><div class='add'>+	unsigned int key, value_size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	skel = htab_update__open();</div><div class='ctx'> 	if (!ASSERT_OK_PTR(skel, "htab_update__open"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* lookup_elem_raw() may be inlined and find_kernel_btf_id() will return -ESRCH */</div><div class='del'>-	bpf_program__set_autoload(skel-&gt;progs.lookup_elem_raw, true);</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.bpf_obj_free_fields, true);</div><div class='ctx'> 	err = htab_update__load(skel);</div><div class='del'>-	if (!ASSERT_TRUE(!err || err == -ESRCH, "htab_update__load") || err)</div><div class='add'>+	if (!ASSERT_TRUE(!err, "htab_update__load") || err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	skel-&gt;bss-&gt;pid = getpid();</div><div class='hunk'>@@ -33,14 +33,33 @@ static void test_reenter_update(void)</div><div class='ctx'> 	if (!ASSERT_OK(err, "htab_update__attach"))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Will trigger the reentrancy of bpf_map_update_elem() */</div><div class='add'>+	value_size = bpf_map__value_size(skel-&gt;maps.htab);</div><div class='add'>+</div><div class='add'>+	value = calloc(1, value_size);</div><div class='add'>+	if (!ASSERT_OK_PTR(value, "calloc value"))</div><div class='add'>+		goto out;</div><div class='add'>+	/*</div><div class='add'>+	 * First update: plain insert. This should NOT trigger the re-entrancy</div><div class='add'>+	 * path, because there is no old element to free yet.</div><div class='add'>+	 */</div><div class='ctx'> 	key = 0;</div><div class='del'>-	value = 0;</div><div class='del'>-	err = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.htab), &amp;key, &amp;value, 0);</div><div class='del'>-	if (!ASSERT_OK(err, "add element"))</div><div class='add'>+	err = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.htab), &amp;key, value, BPF_ANY);</div><div class='add'>+	if (!ASSERT_OK(err, "first update (insert)"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Second update: replace existing element with same key and trigger</div><div class='add'>+	 * the reentrancy of bpf_map_update_elem().</div><div class='add'>+	 * check_and_free_fields() calls bpf_obj_free_fields() on the old</div><div class='add'>+	 * value, which is where fentry program runs and performs a nested</div><div class='add'>+	 * bpf_map_update_elem(), triggering -EDEADLK.</div><div class='add'>+	 */</div><div class='add'>+	memset(value, 0, value_size);</div><div class='add'>+	err = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.htab), &amp;key, value, BPF_ANY);</div><div class='add'>+	if (!ASSERT_OK(err, "second update (replace)"))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ASSERT_EQ(skel-&gt;bss-&gt;update_err, -EBUSY, "no reentrancy");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;update_err, -EDEADLK, "no reentrancy");</div><div class='ctx'> out:</div><div class='ctx'> 	htab_update__destroy(skel);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/kernel_flag.c b/tools/testing/selftests/bpf/prog_tests/kernel_flag.c<br/>index a133354ac9bc..97b00c7efe94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kernel_flag.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kernel_flag.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kernel_flag.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/kernel_flag.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@ void test_kernel_flag(void)</div><div class='ctx'> 	if (!ASSERT_OK_PTR(lsm_skel, "lsm_skel"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	lsm_skel-&gt;bss-&gt;monitored_tid = gettid();</div><div class='add'>+	lsm_skel-&gt;bss-&gt;monitored_tid = sys_gettid();</div><div class='ctx'> </div><div class='ctx'> 	ret = test_kernel_flag__attach(lsm_skel);</div><div class='ctx'> 	if (!ASSERT_OK(ret, "test_kernel_flag__attach"))</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c b/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c<br/>index 1de14b111931..6e35e13c2022 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c</a></div><div class='hunk'>@@ -57,7 +57,8 @@ static void subtest_kmem_cache_iter_check_slabinfo(struct kmem_cache_iter *skel)</div><div class='ctx'> 		if (!ASSERT_OK(ret, "kmem_cache_lookup"))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		ASSERT_STREQ(r.name, name, "kmem_cache_name");</div><div class='add'>+		ASSERT_STRNEQ(r.name, name, sizeof(r.name) - 1,</div><div class='add'>+			      "kmem_cache_name");</div><div class='ctx'> 		ASSERT_EQ(r.obj_size, objsize, "kmem_cache_objsize");</div><div class='ctx'> </div><div class='ctx'> 		seen++;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c b/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c<br/>index e19ef509ebf8..6cfaa978bc9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include "kprobe_multi_session.skel.h"</div><div class='ctx'> #include "kprobe_multi_session_cookie.skel.h"</div><div class='ctx'> #include "kprobe_multi_verifier.skel.h"</div><div class='add'>+#include "kprobe_write_ctx.skel.h"</div><div class='ctx'> #include "bpf/libbpf_internal.h"</div><div class='ctx'> #include "bpf/hashmap.h"</div><div class='ctx'> </div><div class='hunk'>@@ -422,220 +423,6 @@ static void test_unique_match(void)</div><div class='ctx'> 	kprobe_multi__destroy(skel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t symbol_hash(long key, void *ctx __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return str_hash((const char *) key);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool symbol_equal(long key1, long key2, void *ctx __maybe_unused)</div><div class='del'>-{</div><div class='del'>-	return strcmp((const char *) key1, (const char *) key2) == 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool is_invalid_entry(char *buf, bool kernel)</div><div class='del'>-{</div><div class='del'>-	if (kernel &amp;&amp; strchr(buf, '['))</div><div class='del'>-		return true;</div><div class='del'>-	if (!kernel &amp;&amp; !strchr(buf, '['))</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool skip_entry(char *name)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * We attach to almost all kernel functions and some of them</div><div class='del'>-	 * will cause 'suspicious RCU usage' when fprobe is attached</div><div class='del'>-	 * to them. Filter out the current culprits - arch_cpu_idle</div><div class='del'>-	 * default_idle and rcu_* functions.</div><div class='del'>-	 */</div><div class='del'>-	if (!strcmp(name, "arch_cpu_idle"))</div><div class='del'>-		return true;</div><div class='del'>-	if (!strcmp(name, "default_idle"))</div><div class='del'>-		return true;</div><div class='del'>-	if (!strncmp(name, "rcu_", 4))</div><div class='del'>-		return true;</div><div class='del'>-	if (!strcmp(name, "bpf_dispatcher_xdp_func"))</div><div class='del'>-		return true;</div><div class='del'>-	if (!strncmp(name, "__ftrace_invalid_address__",</div><div class='del'>-		     sizeof("__ftrace_invalid_address__") - 1))</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Do comparision by ignoring '.llvm.&lt;hash&gt;' suffixes. */</div><div class='del'>-static int compare_name(const char *name1, const char *name2)</div><div class='del'>-{</div><div class='del'>-	const char *res1, *res2;</div><div class='del'>-	int len1, len2;</div><div class='del'>-</div><div class='del'>-	res1 = strstr(name1, ".llvm.");</div><div class='del'>-	res2 = strstr(name2, ".llvm.");</div><div class='del'>-	len1 = res1 ? res1 - name1 : strlen(name1);</div><div class='del'>-	len2 = res2 ? res2 - name2 : strlen(name2);</div><div class='del'>-</div><div class='del'>-	if (len1 == len2)</div><div class='del'>-		return strncmp(name1, name2, len1);</div><div class='del'>-	if (len1 &lt; len2)</div><div class='del'>-		return strncmp(name1, name2, len1) &lt;= 0 ? -1 : 1;</div><div class='del'>-	return strncmp(name1, name2, len2) &gt;= 0 ? 1 : -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int load_kallsyms_compare(const void *p1, const void *p2)</div><div class='del'>-{</div><div class='del'>-	return compare_name(((const struct ksym *)p1)-&gt;name, ((const struct ksym *)p2)-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int search_kallsyms_compare(const void *p1, const struct ksym *p2)</div><div class='del'>-{</div><div class='del'>-	return compare_name(p1, p2-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_syms(char ***symsp, size_t *cntp, bool kernel)</div><div class='del'>-{</div><div class='del'>-	size_t cap = 0, cnt = 0;</div><div class='del'>-	char *name = NULL, *ksym_name, **syms = NULL;</div><div class='del'>-	struct hashmap *map;</div><div class='del'>-	struct ksyms *ksyms;</div><div class='del'>-	struct ksym *ks;</div><div class='del'>-	char buf[256];</div><div class='del'>-	FILE *f;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	ksyms = load_kallsyms_custom_local(load_kallsyms_compare);</div><div class='del'>-	if (!ASSERT_OK_PTR(ksyms, "load_kallsyms_custom_local"))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The available_filter_functions contains many duplicates,</div><div class='del'>-	 * but other than that all symbols are usable in kprobe multi</div><div class='del'>-	 * interface.</div><div class='del'>-	 * Filtering out duplicates by using hashmap__add, which won't</div><div class='del'>-	 * add existing entry.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (access("/sys/kernel/tracing/trace", F_OK) == 0)</div><div class='del'>-		f = fopen("/sys/kernel/tracing/available_filter_functions", "r");</div><div class='del'>-	else</div><div class='del'>-		f = fopen("/sys/kernel/debug/tracing/available_filter_functions", "r");</div><div class='del'>-</div><div class='del'>-	if (!f)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	map = hashmap__new(symbol_hash, symbol_equal, NULL);</div><div class='del'>-	if (IS_ERR(map)) {</div><div class='del'>-		err = libbpf_get_error(map);</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (fgets(buf, sizeof(buf), f)) {</div><div class='del'>-		if (is_invalid_entry(buf, kernel))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		free(name);</div><div class='del'>-		if (sscanf(buf, "%ms$*[^\n]\n", &amp;name) != 1)</div><div class='del'>-			continue;</div><div class='del'>-		if (skip_entry(name))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		ks = search_kallsyms_custom_local(ksyms, name, search_kallsyms_compare);</div><div class='del'>-		if (!ks) {</div><div class='del'>-			err = -EINVAL;</div><div class='del'>-			goto error;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ksym_name = ks-&gt;name;</div><div class='del'>-		err = hashmap__add(map, ksym_name, 0);</div><div class='del'>-		if (err == -EEXIST) {</div><div class='del'>-			err = 0;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		err = libbpf_ensure_mem((void **) &amp;syms, &amp;cap,</div><div class='del'>-					sizeof(*syms), cnt + 1);</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		syms[cnt++] = ksym_name;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*symsp = syms;</div><div class='del'>-	*cntp = cnt;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	free(name);</div><div class='del'>-	fclose(f);</div><div class='del'>-	hashmap__free(map);</div><div class='del'>-	if (err)</div><div class='del'>-		free(syms);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_addrs(unsigned long **addrsp, size_t *cntp, bool kernel)</div><div class='del'>-{</div><div class='del'>-	unsigned long *addr, *addrs, *tmp_addrs;</div><div class='del'>-	int err = 0, max_cnt, inc_cnt;</div><div class='del'>-	char *name = NULL;</div><div class='del'>-	size_t cnt = 0;</div><div class='del'>-	char buf[256];</div><div class='del'>-	FILE *f;</div><div class='del'>-</div><div class='del'>-	if (access("/sys/kernel/tracing/trace", F_OK) == 0)</div><div class='del'>-		f = fopen("/sys/kernel/tracing/available_filter_functions_addrs", "r");</div><div class='del'>-	else</div><div class='del'>-		f = fopen("/sys/kernel/debug/tracing/available_filter_functions_addrs", "r");</div><div class='del'>-</div><div class='del'>-	if (!f)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	/* In my local setup, the number of entries is 50k+ so Let us initially</div><div class='del'>-	 * allocate space to hold 64k entries. If 64k is not enough, incrementally</div><div class='del'>-	 * increase 1k each time.</div><div class='del'>-	 */</div><div class='del'>-	max_cnt = 65536;</div><div class='del'>-	inc_cnt = 1024;</div><div class='del'>-	addrs = malloc(max_cnt * sizeof(long));</div><div class='del'>-	if (addrs == NULL) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (fgets(buf, sizeof(buf), f)) {</div><div class='del'>-		if (is_invalid_entry(buf, kernel))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		free(name);</div><div class='del'>-		if (sscanf(buf, "%p %ms$*[^\n]\n", &amp;addr, &amp;name) != 2)</div><div class='del'>-			continue;</div><div class='del'>-		if (skip_entry(name))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (cnt == max_cnt) {</div><div class='del'>-			max_cnt += inc_cnt;</div><div class='del'>-			tmp_addrs = realloc(addrs, max_cnt);</div><div class='del'>-			if (!tmp_addrs) {</div><div class='del'>-				err = -ENOMEM;</div><div class='del'>-				goto error;</div><div class='del'>-			}</div><div class='del'>-			addrs = tmp_addrs;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		addrs[cnt++] = (unsigned long)addr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*addrsp = addrs;</div><div class='del'>-	*cntp = cnt;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	free(name);</div><div class='del'>-	fclose(f);</div><div class='del'>-	if (err)</div><div class='del'>-		free(addrs);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void do_bench_test(struct kprobe_multi_empty *skel, struct bpf_kprobe_multi_opts *opts)</div><div class='ctx'> {</div><div class='ctx'> 	long attach_start_ns, attach_end_ns;</div><div class='hunk'>@@ -670,7 +457,7 @@ static void test_kprobe_multi_bench_attach(bool kernel)</div><div class='ctx'> 	char **syms = NULL;</div><div class='ctx'> 	size_t cnt = 0;</div><div class='ctx'> </div><div class='del'>-	if (!ASSERT_OK(get_syms(&amp;syms, &amp;cnt, kernel), "get_syms"))</div><div class='add'>+	if (!ASSERT_OK(bpf_get_ksyms(&amp;syms, &amp;cnt, kernel), "bpf_get_ksyms"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	skel = kprobe_multi_empty__open_and_load();</div><div class='hunk'>@@ -696,13 +483,13 @@ static void test_kprobe_multi_bench_attach_addr(bool kernel)</div><div class='ctx'> 	size_t cnt = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = get_addrs(&amp;addrs, &amp;cnt, kernel);</div><div class='add'>+	err = bpf_get_addrs(&amp;addrs, &amp;cnt, kernel);</div><div class='ctx'> 	if (err == -ENOENT) {</div><div class='ctx'> 		test__skip();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!ASSERT_OK(err, "get_addrs"))</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_get_addrs"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	skel = kprobe_multi_empty__open_and_load();</div><div class='hunk'>@@ -753,6 +540,30 @@ cleanup:</div><div class='ctx'> 	kprobe_multi_override__destroy(skel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef __x86_64__</div><div class='add'>+static void test_attach_write_ctx(void)</div><div class='add'>+{</div><div class='add'>+	struct kprobe_write_ctx *skel = NULL;</div><div class='add'>+	struct bpf_link *link = NULL;</div><div class='add'>+</div><div class='add'>+	skel = kprobe_write_ctx__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "kprobe_write_ctx__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	link = bpf_program__attach_kprobe_opts(skel-&gt;progs.kprobe_multi_write_ctx,</div><div class='add'>+						     "bpf_fentry_test1", NULL);</div><div class='add'>+	if (!ASSERT_ERR_PTR(link, "bpf_program__attach_kprobe_opts"))</div><div class='add'>+		bpf_link__destroy(link);</div><div class='add'>+</div><div class='add'>+	kprobe_write_ctx__destroy(skel);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void test_attach_write_ctx(void)</div><div class='add'>+{</div><div class='add'>+	test__skip();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void serial_test_kprobe_multi_bench_attach(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (test__start_subtest("kernel"))</div><div class='hunk'>@@ -792,5 +603,7 @@ void test_kprobe_multi_test(void)</div><div class='ctx'> 		test_session_cookie_skel_api();</div><div class='ctx'> 	if (test__start_subtest("unique_match"))</div><div class='ctx'> 		test_unique_match();</div><div class='add'>+	if (test__start_subtest("attach_write_ctx"))</div><div class='add'>+		test_attach_write_ctx();</div><div class='ctx'> 	RUN_TESTS(kprobe_multi_verifier);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c b/tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c<br/>new file mode 100644<br/>index 000000000000..72aa5376c30e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/livepatch_trampoline.c</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "testing_helpers.h"</div><div class='add'>+#include "livepatch_trampoline.skel.h"</div><div class='add'>+</div><div class='add'>+static int load_livepatch(void)</div><div class='add'>+{</div><div class='add'>+	char path[4096];</div><div class='add'>+</div><div class='add'>+	/* CI will set KBUILD_OUTPUT */</div><div class='add'>+	snprintf(path, sizeof(path), "%s/samples/livepatch/livepatch-sample.ko",</div><div class='add'>+		 getenv("KBUILD_OUTPUT") ? : "../../../..");</div><div class='add'>+</div><div class='add'>+	return load_module(path, env_verbosity &gt; VERBOSE_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void unload_livepatch(void)</div><div class='add'>+{</div><div class='add'>+	/* Disable the livepatch before unloading the module */</div><div class='add'>+	system("echo 0 &gt; /sys/kernel/livepatch/livepatch_sample/enabled");</div><div class='add'>+</div><div class='add'>+	unload_module("livepatch_sample", env_verbosity &gt; VERBOSE_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void read_proc_cmdline(void)</div><div class='add'>+{</div><div class='add'>+	char buf[4096];</div><div class='add'>+	int fd, ret;</div><div class='add'>+</div><div class='add'>+	fd = open("/proc/cmdline", O_RDONLY);</div><div class='add'>+	if (!ASSERT_OK_FD(fd, "open /proc/cmdline"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = read(fd, buf, sizeof(buf));</div><div class='add'>+	if (!ASSERT_GT(ret, 0, "read /proc/cmdline"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ASSERT_OK(strncmp(buf, "this has been live patched", 26), "strncmp");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	close(fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __test_livepatch_trampoline(bool fexit_first)</div><div class='add'>+{</div><div class='add'>+	struct livepatch_trampoline *skel = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skel = livepatch_trampoline__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "skel_open_and_load"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;my_pid = getpid();</div><div class='add'>+</div><div class='add'>+	if (!fexit_first) {</div><div class='add'>+		/* fentry program is loaded first by default */</div><div class='add'>+		err = livepatch_trampoline__attach(skel);</div><div class='add'>+		if (!ASSERT_OK(err, "skel_attach"))</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		/* Manually load fexit program first. */</div><div class='add'>+		skel-&gt;links.fexit_cmdline = bpf_program__attach(skel-&gt;progs.fexit_cmdline);</div><div class='add'>+		if (!ASSERT_OK_PTR(skel-&gt;links.fexit_cmdline, "attach_fexit"))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		skel-&gt;links.fentry_cmdline = bpf_program__attach(skel-&gt;progs.fentry_cmdline);</div><div class='add'>+		if (!ASSERT_OK_PTR(skel-&gt;links.fentry_cmdline, "attach_fentry"))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_proc_cmdline();</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;fentry_hit, 1, "fentry_hit");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;fexit_hit, 1, "fexit_hit");</div><div class='add'>+out:</div><div class='add'>+	livepatch_trampoline__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_livepatch_trampoline(void)</div><div class='add'>+{</div><div class='add'>+	int retry_cnt = 0;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	if (load_livepatch()) {</div><div class='add'>+		if (retry_cnt) {</div><div class='add'>+			ASSERT_OK(1, "load_livepatch");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 * Something else (previous run of the same test?) loaded</div><div class='add'>+		 * the KLP module. Unload the KLP module and retry.</div><div class='add'>+		 */</div><div class='add'>+		unload_livepatch();</div><div class='add'>+		retry_cnt++;</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("fentry_first"))</div><div class='add'>+		__test_livepatch_trampoline(false);</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("fexit_first"))</div><div class='add'>+		__test_livepatch_trampoline(true);</div><div class='add'>+out:</div><div class='add'>+	unload_livepatch();</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/map_excl.c b/tools/testing/selftests/bpf/prog_tests/map_excl.c<br/>new file mode 100644<br/>index 000000000000..6bdc6d6de0da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/map_excl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/map_excl.c</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (C) 2025 Google LLC. */</div><div class='add'>+#define _GNU_SOURCE</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;sys/syscall.h&gt;</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include &lt;bpf/btf.h&gt;</div><div class='add'>+</div><div class='add'>+#include "map_excl.skel.h"</div><div class='add'>+</div><div class='add'>+static void test_map_excl_allowed(void)</div><div class='add'>+{</div><div class='add'>+	struct map_excl *skel = map_excl__open();</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = bpf_map__set_exclusive_program(skel-&gt;maps.excl_map, skel-&gt;progs.should_have_access);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_map__set_exclusive_program"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.should_have_access, true);</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.should_not_have_access, false);</div><div class='add'>+</div><div class='add'>+	err = map_excl__load(skel);</div><div class='add'>+	ASSERT_OK(err, "map_excl__load");</div><div class='add'>+out:</div><div class='add'>+	map_excl__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_map_excl_denied(void)</div><div class='add'>+{</div><div class='add'>+	struct map_excl *skel = map_excl__open();</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = bpf_map__set_exclusive_program(skel-&gt;maps.excl_map, skel-&gt;progs.should_have_access);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_map__make_exclusive"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.should_have_access, false);</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.should_not_have_access, true);</div><div class='add'>+</div><div class='add'>+	err = map_excl__load(skel);</div><div class='add'>+	ASSERT_EQ(err, -EACCES, "exclusive map access not denied\n");</div><div class='add'>+out:</div><div class='add'>+	map_excl__destroy(skel);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_map_excl(void)</div><div class='add'>+{</div><div class='add'>+	if (test__start_subtest("map_excl_allowed"))</div><div class='add'>+		test_map_excl_allowed();</div><div class='add'>+	if (test__start_subtest("map_excl_denied"))</div><div class='add'>+		test_map_excl_denied();</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/module_attach.c b/tools/testing/selftests/bpf/prog_tests/module_attach.c<br/>index 6d391d95f96e..70fa7ae93173 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/module_attach.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/module_attach.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/module_attach.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/module_attach.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ void test_module_attach(void)</div><div class='ctx'> </div><div class='ctx'> 	test_module_attach__detach(skel);</div><div class='ctx'> </div><div class='del'>-	/* attach fentry/fexit and make sure it get's module reference */</div><div class='add'>+	/* attach fentry/fexit and make sure it gets module reference */</div><div class='ctx'> 	link = bpf_program__attach(skel-&gt;progs.handle_fentry);</div><div class='ctx'> 	if (!ASSERT_OK_PTR(link, "attach_fentry"))</div><div class='ctx'> 		goto cleanup;</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/mptcp.c b/tools/testing/selftests/bpf/prog_tests/mptcp.c<br/>index f8eb7f9d4fd2..8fade8bdc451 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/mptcp.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/mptcp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/mptcp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/mptcp.c</a></div><div class='hunk'>@@ -6,11 +6,13 @@</div><div class='ctx'> #include &lt;netinet/in.h&gt;</div><div class='ctx'> #include &lt;test_progs.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;errno.h&gt;</div><div class='ctx'> #include "cgroup_helpers.h"</div><div class='ctx'> #include "network_helpers.h"</div><div class='ctx'> #include "mptcp_sock.skel.h"</div><div class='ctx'> #include "mptcpify.skel.h"</div><div class='ctx'> #include "mptcp_subflow.skel.h"</div><div class='add'>+#include "mptcp_sockmap.skel.h"</div><div class='ctx'> </div><div class='ctx'> #define NS_TEST "mptcp_ns"</div><div class='ctx'> #define ADDR_1	"10.0.1.1"</div><div class='hunk'>@@ -436,6 +438,142 @@ close_cgroup:</div><div class='ctx'> 	close(cgroup_fd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Test sockmap on MPTCP server handling non-mp-capable clients. */</div><div class='add'>+static void test_sockmap_with_mptcp_fallback(struct mptcp_sockmap *skel)</div><div class='add'>+{</div><div class='add'>+	int listen_fd = -1, client_fd1 = -1, client_fd2 = -1;</div><div class='add'>+	int server_fd1 = -1, server_fd2 = -1, sent, recvd;</div><div class='add'>+	char snd[9] = "123456789";</div><div class='add'>+	char rcv[10];</div><div class='add'>+</div><div class='add'>+	/* start server with MPTCP enabled */</div><div class='add'>+	listen_fd = start_mptcp_server(AF_INET, NULL, 0, 0);</div><div class='add'>+	if (!ASSERT_OK_FD(listen_fd, "sockmap-fb:start_mptcp_server"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;trace_port = ntohs(get_socket_local_port(listen_fd));</div><div class='add'>+	skel-&gt;bss-&gt;sk_index = 0;</div><div class='add'>+	/* create client without MPTCP enabled */</div><div class='add'>+	client_fd1 = connect_to_fd_opts(listen_fd, NULL);</div><div class='add'>+	if (!ASSERT_OK_FD(client_fd1, "sockmap-fb:connect_to_fd"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	server_fd1 = accept(listen_fd, NULL, 0);</div><div class='add'>+	skel-&gt;bss-&gt;sk_index = 1;</div><div class='add'>+	client_fd2 = connect_to_fd_opts(listen_fd, NULL);</div><div class='add'>+	if (!ASSERT_OK_FD(client_fd2, "sockmap-fb:connect_to_fd"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	server_fd2 = accept(listen_fd, NULL, 0);</div><div class='add'>+	/* test normal redirect behavior: data sent by client_fd1 can be</div><div class='add'>+	 * received by client_fd2</div><div class='add'>+	 */</div><div class='add'>+	skel-&gt;bss-&gt;redirect_idx = 1;</div><div class='add'>+	sent = send(client_fd1, snd, sizeof(snd), 0);</div><div class='add'>+	if (!ASSERT_EQ(sent, sizeof(snd), "sockmap-fb:send(client_fd1)"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	/* try to recv more bytes to avoid truncation check */</div><div class='add'>+	recvd = recv(client_fd2, rcv, sizeof(rcv), 0);</div><div class='add'>+	if (!ASSERT_EQ(recvd, sizeof(snd), "sockmap-fb:recv(client_fd2)"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	if (client_fd1 &gt;= 0)</div><div class='add'>+		close(client_fd1);</div><div class='add'>+	if (client_fd2 &gt;= 0)</div><div class='add'>+		close(client_fd2);</div><div class='add'>+	if (server_fd1 &gt;= 0)</div><div class='add'>+		close(server_fd1);</div><div class='add'>+	if (server_fd2 &gt;= 0)</div><div class='add'>+		close(server_fd2);</div><div class='add'>+	close(listen_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Test sockmap rejection of MPTCP sockets - both server and client sides. */</div><div class='add'>+static void test_sockmap_reject_mptcp(struct mptcp_sockmap *skel)</div><div class='add'>+{</div><div class='add'>+	int listen_fd = -1, server_fd = -1, client_fd1 = -1;</div><div class='add'>+	int err, zero = 0;</div><div class='add'>+</div><div class='add'>+	/* start server with MPTCP enabled */</div><div class='add'>+	listen_fd = start_mptcp_server(AF_INET, NULL, 0, 0);</div><div class='add'>+	if (!ASSERT_OK_FD(listen_fd, "start_mptcp_server"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;trace_port = ntohs(get_socket_local_port(listen_fd));</div><div class='add'>+	skel-&gt;bss-&gt;sk_index = 0;</div><div class='add'>+	/* create client with MPTCP enabled */</div><div class='add'>+	client_fd1 = connect_to_fd(listen_fd, 0);</div><div class='add'>+	if (!ASSERT_OK_FD(client_fd1, "connect_to_fd client_fd1"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	/* bpf_sock_map_update() called from sockops should reject MPTCP sk */</div><div class='add'>+	if (!ASSERT_EQ(skel-&gt;bss-&gt;helper_ret, -EOPNOTSUPP, "should reject"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	server_fd = accept(listen_fd, NULL, 0);</div><div class='add'>+	err = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.sock_map),</div><div class='add'>+				  &amp;zero, &amp;server_fd, BPF_NOEXIST);</div><div class='add'>+	if (!ASSERT_EQ(err, -EOPNOTSUPP, "server should be disallowed"))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	/* MPTCP client should also be disallowed */</div><div class='add'>+	err = bpf_map_update_elem(bpf_map__fd(skel-&gt;maps.sock_map),</div><div class='add'>+				  &amp;zero, &amp;client_fd1, BPF_NOEXIST);</div><div class='add'>+	if (!ASSERT_EQ(err, -EOPNOTSUPP, "client should be disallowed"))</div><div class='add'>+		goto end;</div><div class='add'>+end:</div><div class='add'>+	if (client_fd1 &gt;= 0)</div><div class='add'>+		close(client_fd1);</div><div class='add'>+	if (server_fd &gt;= 0)</div><div class='add'>+		close(server_fd);</div><div class='add'>+	close(listen_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_mptcp_sockmap(void)</div><div class='add'>+{</div><div class='add'>+	struct mptcp_sockmap *skel;</div><div class='add'>+	struct netns_obj *netns;</div><div class='add'>+	int cgroup_fd, err;</div><div class='add'>+</div><div class='add'>+	cgroup_fd = test__join_cgroup("/mptcp_sockmap");</div><div class='add'>+	if (!ASSERT_OK_FD(cgroup_fd, "join_cgroup: mptcp_sockmap"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel = mptcp_sockmap__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "skel_open_load: mptcp_sockmap"))</div><div class='add'>+		goto close_cgroup;</div><div class='add'>+</div><div class='add'>+	skel-&gt;links.mptcp_sockmap_inject =</div><div class='add'>+		bpf_program__attach_cgroup(skel-&gt;progs.mptcp_sockmap_inject, cgroup_fd);</div><div class='add'>+	if (!ASSERT_OK_PTR(skel-&gt;links.mptcp_sockmap_inject, "attach sockmap"))</div><div class='add'>+		goto skel_destroy;</div><div class='add'>+</div><div class='add'>+	err = bpf_prog_attach(bpf_program__fd(skel-&gt;progs.mptcp_sockmap_redirect),</div><div class='add'>+			      bpf_map__fd(skel-&gt;maps.sock_map),</div><div class='add'>+			      BPF_SK_SKB_STREAM_VERDICT, 0);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_prog_attach stream verdict"))</div><div class='add'>+		goto skel_destroy;</div><div class='add'>+</div><div class='add'>+	netns = netns_new(NS_TEST, true);</div><div class='add'>+	if (!ASSERT_OK_PTR(netns, "netns_new: mptcp_sockmap"))</div><div class='add'>+		goto skel_destroy;</div><div class='add'>+</div><div class='add'>+	if (endpoint_init("subflow") &lt; 0)</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	test_sockmap_with_mptcp_fallback(skel);</div><div class='add'>+	test_sockmap_reject_mptcp(skel);</div><div class='add'>+</div><div class='add'>+close_netns:</div><div class='add'>+	netns_free(netns);</div><div class='add'>+skel_destroy:</div><div class='add'>+	mptcp_sockmap__destroy(skel);</div><div class='add'>+close_cgroup:</div><div class='add'>+	close(cgroup_fd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void test_mptcp(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (test__start_subtest("base"))</div><div class='hunk'>@@ -444,4 +582,6 @@ void test_mptcp(void)</div><div class='ctx'> 		test_mptcpify();</div><div class='ctx'> 	if (test__start_subtest("subflow"))</div><div class='ctx'> 		test_subflow();</div><div class='add'>+	if (test__start_subtest("sockmap"))</div><div class='add'>+		test_mptcp_sockmap();</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/perf_branches.c b/tools/testing/selftests/bpf/prog_tests/perf_branches.c<br/>index bc24f83339d6..0a7ef770c487 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/perf_branches.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/perf_branches.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/perf_branches.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/perf_branches.c</a></div><div class='hunk'>@@ -15,6 +15,10 @@ static void check_good_sample(struct test_perf_branches *skel)</div><div class='ctx'> 	int pbe_size = sizeof(struct perf_branch_entry);</div><div class='ctx'> 	int duration = 0;</div><div class='ctx'> </div><div class='add'>+	if (CHECK(!skel-&gt;bss-&gt;run_cnt, "invalid run_cnt",</div><div class='add'>+		  "checked sample validity before prog run"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (CHECK(!skel-&gt;bss-&gt;valid, "output not valid",</div><div class='ctx'> 		 "no valid sample from prog"))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -45,6 +49,10 @@ static void check_bad_sample(struct test_perf_branches *skel)</div><div class='ctx'> 	int written_stack = skel-&gt;bss-&gt;written_stack_out;</div><div class='ctx'> 	int duration = 0;</div><div class='ctx'> </div><div class='add'>+	if (CHECK(!skel-&gt;bss-&gt;run_cnt, "invalid run_cnt",</div><div class='add'>+		  "checked sample validity before prog run"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (CHECK(!skel-&gt;bss-&gt;valid, "output not valid",</div><div class='ctx'> 		 "no valid sample from prog"))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -83,8 +91,12 @@ static void test_perf_branches_common(int perf_fd,</div><div class='ctx'> 	err = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set), &amp;cpu_set);</div><div class='ctx'> 	if (CHECK(err, "set_affinity", "cpu #0, err %d\n", err))</div><div class='ctx'> 		goto out_destroy;</div><div class='del'>-	/* spin the loop for a while (random high number) */</div><div class='del'>-	for (i = 0; i &lt; 1000000; ++i)</div><div class='add'>+</div><div class='add'>+	/* Spin the loop for a while by using a high iteration count, and by</div><div class='add'>+	 * checking whether the specific run count marker has been explicitly</div><div class='add'>+	 * incremented at least once by the backing perf_event BPF program.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 100000000 &amp;&amp; !*(volatile int *)&amp;skel-&gt;bss-&gt;run_cnt; ++i)</div><div class='ctx'> 		++j;</div><div class='ctx'> </div><div class='ctx'> 	test_perf_branches__detach(skel);</div><div class='hunk'>@@ -116,11 +128,11 @@ static void test_perf_branches_hw(void)</div><div class='ctx'> 	pfd = syscall(__NR_perf_event_open, &amp;attr, -1, 0, -1, PERF_FLAG_FD_CLOEXEC);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Some setups don't support branch records (virtual machines, !x86),</div><div class='del'>-	 * so skip test in this case.</div><div class='add'>+	 * Some setups don't support LBR (virtual machines, !x86, AMD Milan Zen</div><div class='add'>+	 * 3 which only supports BRS), so skip test in this case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pfd &lt; 0) {</div><div class='del'>-		if (errno == ENOENT || errno == EOPNOTSUPP) {</div><div class='add'>+		if (errno == ENOENT || errno == EOPNOTSUPP || errno == EINVAL) {</div><div class='ctx'> 			printf("%s:SKIP:no PERF_SAMPLE_BRANCH_STACK\n",</div><div class='ctx'> 			       __func__);</div><div class='ctx'> 			test__skip();</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c b/tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c<br/>new file mode 100644<br/>index 000000000000..9ae49b587f3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/pinning_devmap_reuse.c</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;sys/types.h&gt;</div><div class='add'>+#include &lt;sys/stat.h&gt;</div><div class='add'>+#include &lt;unistd.h&gt;</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#include "test_pinning_devmap.skel.h"</div><div class='add'>+</div><div class='add'>+void test_pinning_devmap_reuse(void)</div><div class='add'>+{</div><div class='add'>+	const char *pinpath1 = "/sys/fs/bpf/pinmap1";</div><div class='add'>+	const char *pinpath2 = "/sys/fs/bpf/pinmap2";</div><div class='add'>+	struct test_pinning_devmap *skel1 = NULL, *skel2 = NULL;</div><div class='add'>+	int err;</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_object_open_opts, opts);</div><div class='add'>+</div><div class='add'>+	/* load the object a first time */</div><div class='add'>+	skel1 = test_pinning_devmap__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel1, "skel_load1"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* load the object a second time, re-using the pinned map */</div><div class='add'>+	skel2 = test_pinning_devmap__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel2, "skel_load2"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* we can close the reference safely without</div><div class='add'>+	 * the map's refcount falling to 0</div><div class='add'>+	 */</div><div class='add'>+	test_pinning_devmap__destroy(skel1);</div><div class='add'>+	skel1 = NULL;</div><div class='add'>+</div><div class='add'>+	/* now, swap the pins */</div><div class='add'>+	err = renameat2(0, pinpath1, 0, pinpath2, RENAME_EXCHANGE);</div><div class='add'>+	if (!ASSERT_OK(err, "swap pins"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* load the object again, this time the re-use should fail */</div><div class='add'>+	skel1 = test_pinning_devmap__open_and_load();</div><div class='add'>+	if (!ASSERT_ERR_PTR(skel1, "skel_load3"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	unlink(pinpath1);</div><div class='add'>+	unlink(pinpath2);</div><div class='add'>+	test_pinning_devmap__destroy(skel1);</div><div class='add'>+	test_pinning_devmap__destroy(skel2);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/pinning_htab.c b/tools/testing/selftests/bpf/prog_tests/pinning_htab.c<br/>new file mode 100644<br/>index 000000000000..16bd74be3dbe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/pinning_htab.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/pinning_htab.c</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "test_pinning_htab.skel.h"</div><div class='add'>+</div><div class='add'>+static void unpin_map(const char *map_name, const char *pin_path)</div><div class='add'>+{</div><div class='add'>+	struct test_pinning_htab *skel;</div><div class='add'>+	struct bpf_map *map;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skel = test_pinning_htab__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "skel open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	map = bpf_object__find_map_by_name(skel-&gt;obj, map_name);</div><div class='add'>+	if (!ASSERT_OK_PTR(map, "bpf_object__find_map_by_name"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = bpf_map__pin(map, pin_path);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_map__pin"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = bpf_map__unpin(map, pin_path);</div><div class='add'>+	ASSERT_OK(err, "bpf_map__unpin");</div><div class='add'>+out:</div><div class='add'>+	test_pinning_htab__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_pinning_htab(void)</div><div class='add'>+{</div><div class='add'>+	if (test__start_subtest("timer_prealloc"))</div><div class='add'>+		unpin_map("timer_prealloc", "/sys/fs/bpf/timer_prealloc");</div><div class='add'>+	if (test__start_subtest("timer_no_prealloc"))</div><div class='add'>+		unpin_map("timer_no_prealloc", "/sys/fs/bpf/timer_no_prealloc");</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c b/tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c<br/>index 14f2796076e0..7607cfc2408c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/prog_tests_framework.c</a></div><div class='hunk'>@@ -54,3 +54,128 @@ void test_prog_tests_framework(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	clear_test_state(state);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void dummy_emit(const char *buf, bool force) {}</div><div class='add'>+</div><div class='add'>+void test_prog_tests_framework_expected_msgs(void)</div><div class='add'>+{</div><div class='add'>+	struct expected_msgs msgs;</div><div class='add'>+	int i, j, error_cnt;</div><div class='add'>+	const struct {</div><div class='add'>+		const char *name;</div><div class='add'>+		const char *log;</div><div class='add'>+		const char *expected;</div><div class='add'>+		struct expect_msg *pats;</div><div class='add'>+	} cases[] = {</div><div class='add'>+		{</div><div class='add'>+			.name = "simple-ok",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "simple-fail",</div><div class='add'>+			.log = "aaabbbddd",</div><div class='add'>+			.expected = "MATCHED    SUBSTR: 'aaa'\n"</div><div class='add'>+				    "EXPECTED   SUBSTR: 'ccc'\n",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-ok-mid",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "foo", .negative = true },</div><div class='add'>+				{ .substr = "bar", .negative = true },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-ok-tail",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "foo", .negative = true },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-ok-head",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "foo", .negative = true },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-fail-head",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.expected = "UNEXPECTED SUBSTR: 'aaa'\n",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa", .negative = true },</div><div class='add'>+				{ .substr = "bbb" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-fail-tail",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.expected = "UNEXPECTED SUBSTR: 'ccc'\n",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "bbb" },</div><div class='add'>+				{ .substr = "ccc", .negative = true },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-fail-mid-1",</div><div class='add'>+			.log = "aaabbbccc",</div><div class='add'>+			.expected = "UNEXPECTED SUBSTR: 'bbb'\n",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "bbb", .negative = true },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name = "negative-fail-mid-2",</div><div class='add'>+			.log = "aaabbb222ccc",</div><div class='add'>+			.expected = "UNEXPECTED SUBSTR: '222'\n",</div><div class='add'>+			.pats = (struct expect_msg[]) {</div><div class='add'>+				{ .substr = "aaa" },</div><div class='add'>+				{ .substr = "222", .negative = true },</div><div class='add'>+				{ .substr = "bbb", .negative = true },</div><div class='add'>+				{ .substr = "ccc" },</div><div class='add'>+				{}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cases); i++) {</div><div class='add'>+		if (test__start_subtest(cases[i].name)) {</div><div class='add'>+			error_cnt = env.subtest_state-&gt;error_cnt;</div><div class='add'>+			msgs.patterns = cases[i].pats;</div><div class='add'>+			msgs.cnt = 0;</div><div class='add'>+			for (j = 0; cases[i].pats[j].substr; j++)</div><div class='add'>+				msgs.cnt++;</div><div class='add'>+			validate_msgs(cases[i].log, &amp;msgs, dummy_emit);</div><div class='add'>+			fflush(stderr);</div><div class='add'>+			env.subtest_state-&gt;error_cnt = error_cnt;</div><div class='add'>+			if (cases[i].expected)</div><div class='add'>+				ASSERT_HAS_SUBSTR(env.subtest_state-&gt;log_buf, cases[i].expected, "expected output");</div><div class='add'>+			else</div><div class='add'>+				ASSERT_STREQ(env.subtest_state-&gt;log_buf, "", "expected no output");</div><div class='add'>+			test__end_subtest();</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c b/tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c<br/>index c9f855e5da24..246eb259c08a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/rcu_read_lock.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@ static void test_success(void)</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.two_regions, true);</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.non_sleepable_1, true);</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.non_sleepable_2, true);</div><div class='add'>+	bpf_program__set_autoload(skel-&gt;progs.nested_rcu_region, true);</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.task_trusted_non_rcuptr, true);</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.rcu_read_lock_subprog, true);</div><div class='ctx'> 	bpf_program__set_autoload(skel-&gt;progs.rcu_read_lock_global_subprog, true);</div><div class='hunk'>@@ -78,7 +79,8 @@ static const char * const inproper_region_tests[] = {</div><div class='ctx'> 	"non_sleepable_rcu_mismatch",</div><div class='ctx'> 	"inproper_sleepable_helper",</div><div class='ctx'> 	"inproper_sleepable_kfunc",</div><div class='del'>-	"nested_rcu_region",</div><div class='add'>+	"nested_rcu_region_unbalanced_1",</div><div class='add'>+	"nested_rcu_region_unbalanced_2",</div><div class='ctx'> 	"rcu_read_lock_global_subprog_lock",</div><div class='ctx'> 	"rcu_read_lock_global_subprog_unlock",</div><div class='ctx'> 	"rcu_read_lock_sleepable_helper_global_subprog",</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c b/tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c<br/>index d6bd5e16e637..d2c0542716a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/refcounted_kptr.c</a></div><div class='hunk'>@@ -44,3 +44,59 @@ void test_refcounted_kptr_wrong_owner(void)</div><div class='ctx'> 	ASSERT_OK(opts.retval, "rbtree_wrong_owner_remove_fail_a2 retval");</div><div class='ctx'> 	refcounted_kptr__destroy(skel);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void test_percpu_hash_refcounted_kptr_refcount_leak(void)</div><div class='add'>+{</div><div class='add'>+	struct refcounted_kptr *skel;</div><div class='add'>+	int cpu_nr, fd, err, key = 0;</div><div class='add'>+	struct bpf_map *map;</div><div class='add'>+	size_t values_sz;</div><div class='add'>+	u64 *values;</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, opts,</div><div class='add'>+		    .data_in = &amp;pkt_v4,</div><div class='add'>+		    .data_size_in = sizeof(pkt_v4),</div><div class='add'>+		    .repeat = 1,</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	cpu_nr = libbpf_num_possible_cpus();</div><div class='add'>+	if (!ASSERT_GT(cpu_nr, 0, "libbpf_num_possible_cpus"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	values = calloc(cpu_nr, sizeof(u64));</div><div class='add'>+	if (!ASSERT_OK_PTR(values, "calloc values"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel = refcounted_kptr__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "refcounted_kptr__open_and_load")) {</div><div class='add'>+		free(values);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	values_sz = cpu_nr * sizeof(u64);</div><div class='add'>+	memset(values, 0, values_sz);</div><div class='add'>+</div><div class='add'>+	map = skel-&gt;maps.percpu_hash;</div><div class='add'>+	err = bpf_map__update_elem(map, &amp;key, sizeof(key), values, values_sz, 0);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_map__update_elem"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	fd = bpf_program__fd(skel-&gt;progs.percpu_hash_refcount_leak);</div><div class='add'>+	err = bpf_prog_test_run_opts(fd, &amp;opts);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_prog_test_run_opts"))</div><div class='add'>+		goto out;</div><div class='add'>+	if (!ASSERT_EQ(opts.retval, 2, "opts.retval"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = bpf_map__update_elem(map, &amp;key, sizeof(key), values, values_sz, 0);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_map__update_elem"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	fd = bpf_program__fd(skel-&gt;progs.check_percpu_hash_refcount);</div><div class='add'>+	err = bpf_prog_test_run_opts(fd, &amp;opts);</div><div class='add'>+	ASSERT_OK(err, "bpf_prog_test_run_opts");</div><div class='add'>+	ASSERT_EQ(opts.retval, 1, "opts.retval");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	refcounted_kptr__destroy(skel);</div><div class='add'>+	free(values);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/reg_bounds.c b/tools/testing/selftests/bpf/prog_tests/reg_bounds.c<br/>index e261b0e872db..d93a0c7b1786 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/reg_bounds.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/reg_bounds.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/reg_bounds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/reg_bounds.c</a></div><div class='hunk'>@@ -623,7 +623,7 @@ static void range_cond(enum num_t t, struct range x, struct range y,</div><div class='ctx'> 			*newx = range(t, x.a, x.b);</div><div class='ctx'> 			*newy = range(t, y.a + 1, y.b);</div><div class='ctx'> 		} else if (x.a == x.b &amp;&amp; x.b == y.b) {</div><div class='del'>-			/* X is a constant matching rigth side of Y */</div><div class='add'>+			/* X is a constant matching right side of Y */</div><div class='ctx'> 			*newx = range(t, x.a, x.b);</div><div class='ctx'> 			*newy = range(t, y.a, y.b - 1);</div><div class='ctx'> 		} else if (y.a == y.b &amp;&amp; x.a == y.a) {</div><div class='hunk'>@@ -631,7 +631,7 @@ static void range_cond(enum num_t t, struct range x, struct range y,</div><div class='ctx'> 			*newx = range(t, x.a + 1, x.b);</div><div class='ctx'> 			*newy = range(t, y.a, y.b);</div><div class='ctx'> 		} else if (y.a == y.b &amp;&amp; x.b == y.b) {</div><div class='del'>-			/* Y is a constant matching rigth side of X */</div><div class='add'>+			/* Y is a constant matching right side of X */</div><div class='ctx'> 			*newx = range(t, x.a, x.b - 1);</div><div class='ctx'> 			*newy = range(t, y.a, y.b);</div><div class='ctx'> 		} else {</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c b/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c<br/>index 0703e987df89..f0a8c828f8f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/res_spin_lock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/res_spin_lock.c</a></div><div class='hunk'>@@ -99,3 +99,19 @@ end:</div><div class='ctx'> 	res_spin_lock__destroy(skel);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void serial_test_res_spin_lock_stress(void)</div><div class='add'>+{</div><div class='add'>+	if (libbpf_num_possible_cpus() &lt; 3) {</div><div class='add'>+		test__skip();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ASSERT_OK(load_module("bpf_test_rqspinlock.ko", false), "load module AA");</div><div class='add'>+	sleep(5);</div><div class='add'>+	unload_module("bpf_test_rqspinlock", false);</div><div class='add'>+	/*</div><div class='add'>+	 * Insert bpf_test_rqspinlock.ko manually with test_mode=[1|2] to test</div><div class='add'>+	 * other cases (ABBA, ABBCCA).</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/ringbuf.c b/tools/testing/selftests/bpf/prog_tests/ringbuf.c<br/>index d1e4cb28a72c..64520684d2cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/ringbuf.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/ringbuf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/ringbuf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/ringbuf.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include "test_ringbuf_n.lskel.h"</div><div class='ctx'> #include "test_ringbuf_map_key.lskel.h"</div><div class='ctx'> #include "test_ringbuf_write.lskel.h"</div><div class='add'>+#include "test_ringbuf_overwrite.lskel.h"</div><div class='ctx'> </div><div class='ctx'> #define EDONE 7777</div><div class='ctx'> </div><div class='hunk'>@@ -497,6 +498,68 @@ cleanup:</div><div class='ctx'> 	test_ringbuf_map_key_lskel__destroy(skel_map_key);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ringbuf_overwrite_mode_subtest(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long size, len1, len2, len3, len4, len5;</div><div class='add'>+	unsigned long expect_avail_data, expect_prod_pos, expect_over_pos;</div><div class='add'>+	struct test_ringbuf_overwrite_lskel *skel;</div><div class='add'>+	int page_size = getpagesize();</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skel = test_ringbuf_overwrite_lskel__open();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "skel_open"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	size = page_size;</div><div class='add'>+	len1 = page_size / 2;</div><div class='add'>+	len2 = page_size / 4;</div><div class='add'>+	len3 = size - len1 - len2 - BPF_RINGBUF_HDR_SZ * 3;</div><div class='add'>+	len4 = len3 - 8;</div><div class='add'>+	len5 = len3; /* retry with len3 */</div><div class='add'>+</div><div class='add'>+	skel-&gt;maps.ringbuf.max_entries = size;</div><div class='add'>+	skel-&gt;rodata-&gt;LEN1 = len1;</div><div class='add'>+	skel-&gt;rodata-&gt;LEN2 = len2;</div><div class='add'>+	skel-&gt;rodata-&gt;LEN3 = len3;</div><div class='add'>+	skel-&gt;rodata-&gt;LEN4 = len4;</div><div class='add'>+	skel-&gt;rodata-&gt;LEN5 = len5;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;pid = getpid();</div><div class='add'>+</div><div class='add'>+	err = test_ringbuf_overwrite_lskel__load(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "skel_load"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	err = test_ringbuf_overwrite_lskel__attach(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "skel_attach"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	syscall(__NR_getpgid);</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;reserve1_fail, 0, "reserve 1");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;reserve2_fail, 0, "reserve 2");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;reserve3_fail, 1, "reserve 3");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;reserve4_fail, 0, "reserve 4");</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;reserve5_fail, 0, "reserve 5");</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;ring_size, size, "check_ring_size");</div><div class='add'>+</div><div class='add'>+	expect_avail_data = len2 + len4 + len5 + 3 * BPF_RINGBUF_HDR_SZ;</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;avail_data, expect_avail_data, "check_avail_size");</div><div class='add'>+</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;cons_pos, 0, "check_cons_pos");</div><div class='add'>+</div><div class='add'>+	expect_prod_pos = len1 + len2 + len4 + len5 + 4 * BPF_RINGBUF_HDR_SZ;</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;prod_pos, expect_prod_pos, "check_prod_pos");</div><div class='add'>+</div><div class='add'>+	expect_over_pos = len1 + BPF_RINGBUF_HDR_SZ;</div><div class='add'>+	ASSERT_EQ(skel-&gt;bss-&gt;over_pos, expect_over_pos, "check_over_pos");</div><div class='add'>+</div><div class='add'>+	test_ringbuf_overwrite_lskel__detach(skel);</div><div class='add'>+cleanup:</div><div class='add'>+	test_ringbuf_overwrite_lskel__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void test_ringbuf(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (test__start_subtest("ringbuf"))</div><div class='hunk'>@@ -507,4 +570,6 @@ void test_ringbuf(void)</div><div class='ctx'> 		ringbuf_map_key_subtest();</div><div class='ctx'> 	if (test__start_subtest("ringbuf_write"))</div><div class='ctx'> 		ringbuf_write_subtest();</div><div class='add'>+	if (test__start_subtest("ringbuf_overwrite_mode"))</div><div class='add'>+		ringbuf_overwrite_mode_subtest();</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/select_reuseport.c b/tools/testing/selftests/bpf/prog_tests/select_reuseport.c<br/>index 036d4760d2c1..3dbcc091f16c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/select_reuseport.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/select_reuseport.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/select_reuseport.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/select_reuseport.c</a></div><div class='hunk'>@@ -41,11 +41,7 @@ static struct bpf_object *obj;</div><div class='ctx'> static __u32 index_zero;</div><div class='ctx'> static int epfd;</div><div class='ctx'> </div><div class='del'>-static union sa46 {</div><div class='del'>-	struct sockaddr_in6 v6;</div><div class='del'>-	struct sockaddr_in v4;</div><div class='del'>-	sa_family_t family;</div><div class='del'>-} srv_sa;</div><div class='add'>+static struct sockaddr_storage srv_sa;</div><div class='ctx'> </div><div class='ctx'> #define RET_IF(condition, tag, format...) ({				\</div><div class='ctx'> 	if (CHECK_FAIL(condition)) {					\</div><div class='hunk'>@@ -135,24 +131,24 @@ static int prepare_bpf_obj(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sa46_init_loopback(union sa46 *sa, sa_family_t family)</div><div class='add'>+static void ss_init_loopback(struct sockaddr_storage *sa, sa_family_t family)</div><div class='ctx'> {</div><div class='ctx'> 	memset(sa, 0, sizeof(*sa));</div><div class='del'>-	sa-&gt;family = family;</div><div class='del'>-	if (sa-&gt;family == AF_INET6)</div><div class='del'>-		sa-&gt;v6.sin6_addr = in6addr_loopback;</div><div class='add'>+	sa-&gt;ss_family = family;</div><div class='add'>+	if (sa-&gt;ss_family == AF_INET6)</div><div class='add'>+		((struct sockaddr_in6 *)sa)-&gt;sin6_addr = in6addr_loopback;</div><div class='ctx'> 	else</div><div class='del'>-		sa-&gt;v4.sin_addr.s_addr = htonl(INADDR_LOOPBACK);</div><div class='add'>+		((struct sockaddr_in *)sa)-&gt;sin_addr.s_addr = htonl(INADDR_LOOPBACK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sa46_init_inany(union sa46 *sa, sa_family_t family)</div><div class='add'>+static void ss_init_inany(struct sockaddr_storage *sa, sa_family_t family)</div><div class='ctx'> {</div><div class='ctx'> 	memset(sa, 0, sizeof(*sa));</div><div class='del'>-	sa-&gt;family = family;</div><div class='del'>-	if (sa-&gt;family == AF_INET6)</div><div class='del'>-		sa-&gt;v6.sin6_addr = in6addr_any;</div><div class='add'>+	sa-&gt;ss_family = family;</div><div class='add'>+	if (sa-&gt;ss_family == AF_INET6)</div><div class='add'>+		((struct sockaddr_in6 *)sa)-&gt;sin6_addr = in6addr_any;</div><div class='ctx'> 	else</div><div class='del'>-		sa-&gt;v4.sin_addr.s_addr = INADDR_ANY;</div><div class='add'>+		((struct sockaddr_in *)sa)-&gt;sin_addr.s_addr = INADDR_ANY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int read_int_sysctl(const char *sysctl)</div><div class='hunk'>@@ -228,7 +224,7 @@ static void check_data(int type, sa_family_t family, const struct cmd *cmd,</div><div class='ctx'> 		       int cli_fd)</div><div class='ctx'> {</div><div class='ctx'> 	struct data_check expected = {}, result;</div><div class='del'>-	union sa46 cli_sa;</div><div class='add'>+	struct sockaddr_storage cli_sa;</div><div class='ctx'> 	socklen_t addrlen;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -251,26 +247,32 @@ static void check_data(int type, sa_family_t family, const struct cmd *cmd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (family == AF_INET6) {</div><div class='add'>+		struct sockaddr_in6 *srv_v6 = (struct sockaddr_in6 *)&amp;srv_sa;</div><div class='add'>+		struct sockaddr_in6 *cli_v6 = (struct sockaddr_in6 *)&amp;cli_sa;</div><div class='add'>+</div><div class='ctx'> 		expected.eth_protocol = htons(ETH_P_IPV6);</div><div class='del'>-		expected.bind_inany = !srv_sa.v6.sin6_addr.s6_addr32[3] &amp;&amp;</div><div class='del'>-			!srv_sa.v6.sin6_addr.s6_addr32[2] &amp;&amp;</div><div class='del'>-			!srv_sa.v6.sin6_addr.s6_addr32[1] &amp;&amp;</div><div class='del'>-			!srv_sa.v6.sin6_addr.s6_addr32[0];</div><div class='add'>+		expected.bind_inany = !srv_v6-&gt;sin6_addr.s6_addr32[3] &amp;&amp;</div><div class='add'>+			!srv_v6-&gt;sin6_addr.s6_addr32[2] &amp;&amp;</div><div class='add'>+			!srv_v6-&gt;sin6_addr.s6_addr32[1] &amp;&amp;</div><div class='add'>+			!srv_v6-&gt;sin6_addr.s6_addr32[0];</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;expected.skb_addrs[0], cli_sa.v6.sin6_addr.s6_addr32,</div><div class='del'>-		       sizeof(cli_sa.v6.sin6_addr));</div><div class='add'>+		memcpy(&amp;expected.skb_addrs[0], cli_v6-&gt;sin6_addr.s6_addr32,</div><div class='add'>+		       sizeof(cli_v6-&gt;sin6_addr));</div><div class='ctx'> 		memcpy(&amp;expected.skb_addrs[4], &amp;in6addr_loopback,</div><div class='ctx'> 		       sizeof(in6addr_loopback));</div><div class='del'>-		expected.skb_ports[0] = cli_sa.v6.sin6_port;</div><div class='del'>-		expected.skb_ports[1] = srv_sa.v6.sin6_port;</div><div class='add'>+		expected.skb_ports[0] = cli_v6-&gt;sin6_port;</div><div class='add'>+		expected.skb_ports[1] = srv_v6-&gt;sin6_port;</div><div class='ctx'> 	} else {</div><div class='add'>+		struct sockaddr_in *srv_v4 = (struct sockaddr_in *)&amp;srv_sa;</div><div class='add'>+		struct sockaddr_in *cli_v4 = (struct sockaddr_in *)&amp;cli_sa;</div><div class='add'>+</div><div class='ctx'> 		expected.eth_protocol = htons(ETH_P_IP);</div><div class='del'>-		expected.bind_inany = !srv_sa.v4.sin_addr.s_addr;</div><div class='add'>+		expected.bind_inany = !srv_v4-&gt;sin_addr.s_addr;</div><div class='ctx'> </div><div class='del'>-		expected.skb_addrs[0] = cli_sa.v4.sin_addr.s_addr;</div><div class='add'>+		expected.skb_addrs[0] = cli_v4-&gt;sin_addr.s_addr;</div><div class='ctx'> 		expected.skb_addrs[1] = htonl(INADDR_LOOPBACK);</div><div class='del'>-		expected.skb_ports[0] = cli_sa.v4.sin_port;</div><div class='del'>-		expected.skb_ports[1] = srv_sa.v4.sin_port;</div><div class='add'>+		expected.skb_ports[0] = cli_v4-&gt;sin_port;</div><div class='add'>+		expected.skb_ports[1] = srv_v4-&gt;sin_port;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (memcmp(&amp;result, &amp;expected, offsetof(struct data_check,</div><div class='hunk'>@@ -364,16 +366,15 @@ static void check_results(void)</div><div class='ctx'> static int send_data(int type, sa_family_t family, void *data, size_t len,</div><div class='ctx'> 		     enum result expected)</div><div class='ctx'> {</div><div class='del'>-	union sa46 cli_sa;</div><div class='add'>+	struct sockaddr_storage cli_sa;</div><div class='ctx'> 	int fd, err;</div><div class='ctx'> </div><div class='ctx'> 	fd = socket(family, type, 0);</div><div class='ctx'> 	RET_ERR(fd == -1, "socket()", "fd:%d errno:%d\n", fd, errno);</div><div class='ctx'> </div><div class='del'>-	sa46_init_loopback(&amp;cli_sa, family);</div><div class='add'>+	ss_init_loopback(&amp;cli_sa, family);</div><div class='ctx'> 	err = bind(fd, (struct sockaddr *)&amp;cli_sa, sizeof(cli_sa));</div><div class='ctx'> 	RET_ERR(fd == -1, "bind(cli_sa)", "err:%d errno:%d\n", err, errno);</div><div class='del'>-</div><div class='ctx'> 	err = sendto(fd, data, len, MSG_FASTOPEN, (struct sockaddr *)&amp;srv_sa,</div><div class='ctx'> 		     sizeof(srv_sa));</div><div class='ctx'> 	RET_ERR(err != len &amp;&amp; expected &gt;= PASS,</div><div class='hunk'>@@ -589,9 +590,9 @@ static void prepare_sk_fds(int type, sa_family_t family, bool inany)</div><div class='ctx'> 	socklen_t addrlen;</div><div class='ctx'> </div><div class='ctx'> 	if (inany)</div><div class='del'>-		sa46_init_inany(&amp;srv_sa, family);</div><div class='add'>+		ss_init_inany(&amp;srv_sa, family);</div><div class='ctx'> 	else</div><div class='del'>-		sa46_init_loopback(&amp;srv_sa, family);</div><div class='add'>+		ss_init_loopback(&amp;srv_sa, family);</div><div class='ctx'> 	addrlen = sizeof(srv_sa);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/send_signal.c b/tools/testing/selftests/bpf/prog_tests/send_signal.c<br/>index 1702aa592c2c..7ac4d5a488aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/send_signal.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/send_signal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/send_signal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/send_signal.c</a></div><div class='hunk'>@@ -206,6 +206,11 @@ destroy_skel:</div><div class='ctx'> skel_open_load_failure:</div><div class='ctx'> 	close(pipe_c2p[0]);</div><div class='ctx'> 	close(pipe_p2c[1]);</div><div class='add'>+	/*</div><div class='add'>+	 * Child is either about to exit cleanly or stuck in case of errors.</div><div class='add'>+	 * Nudge it to exit.</div><div class='add'>+	 */</div><div class='add'>+	kill(pid, SIGKILL);</div><div class='ctx'> 	wait(NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/sha256.c b/tools/testing/selftests/bpf/prog_tests/sha256.c<br/>new file mode 100644<br/>index 000000000000..604a0b1423d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/sha256.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright 2025 Google LLC */</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "bpf/libbpf_internal.h"</div><div class='add'>+</div><div class='add'>+#define MAX_LEN 4096</div><div class='add'>+</div><div class='add'>+/* Test libbpf_sha256() for all lengths from 0 to MAX_LEN inclusively. */</div><div class='add'>+void test_sha256(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The correctness of this value was verified by running this test with</div><div class='add'>+	 * libbpf_sha256() replaced by OpenSSL's SHA256().</div><div class='add'>+	 */</div><div class='add'>+	static const __u8 expected_digest_of_digests[SHA256_DIGEST_LENGTH] = {</div><div class='add'>+		0x62, 0x30, 0x0e, 0x1d, 0xea, 0x7f, 0xc4, 0x74,</div><div class='add'>+		0xfd, 0x8e, 0x64, 0x0b, 0xd8, 0x5f, 0xea, 0x04,</div><div class='add'>+		0xf3, 0xef, 0x77, 0x42, 0xc2, 0x01, 0xb8, 0x90,</div><div class='add'>+		0x6e, 0x19, 0x91, 0x1b, 0xca, 0xb3, 0x28, 0x42,</div><div class='add'>+	};</div><div class='add'>+	__u64 seed = 0;</div><div class='add'>+	__u8 *data = NULL, *digests = NULL;</div><div class='add'>+	__u8 digest_of_digests[SHA256_DIGEST_LENGTH];</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	data = malloc(MAX_LEN);</div><div class='add'>+	if (!ASSERT_OK_PTR(data, "malloc"))</div><div class='add'>+		goto out;</div><div class='add'>+	digests = malloc((MAX_LEN + 1) * SHA256_DIGEST_LENGTH);</div><div class='add'>+	if (!ASSERT_OK_PTR(digests, "malloc"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Generate MAX_LEN bytes of "random" data deterministically. */</div><div class='add'>+	for (i = 0; i &lt; MAX_LEN; i++) {</div><div class='add'>+		seed = (seed * 25214903917 + 11) &amp; ((1ULL &lt;&lt; 48) - 1);</div><div class='add'>+		data[i] = (__u8)(seed &gt;&gt; 16);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate a digest for each length 0 through MAX_LEN inclusively. */</div><div class='add'>+	for (i = 0; i &lt;= MAX_LEN; i++)</div><div class='add'>+		libbpf_sha256(data, i, &amp;digests[i * SHA256_DIGEST_LENGTH]);</div><div class='add'>+</div><div class='add'>+	/* Calculate and verify the digest of all the digests. */</div><div class='add'>+	libbpf_sha256(digests, (MAX_LEN + 1) * SHA256_DIGEST_LENGTH,</div><div class='add'>+		      digest_of_digests);</div><div class='add'>+	ASSERT_MEMEQ(digest_of_digests, expected_digest_of_digests,</div><div class='add'>+		     SHA256_DIGEST_LENGTH, "digest_of_digests");</div><div class='add'>+out:</div><div class='add'>+	free(data);</div><div class='add'>+	free(digests);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c b/tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c<br/>new file mode 100644<br/>index 000000000000..e4940583924b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/sk_bypass_prot_mem.c</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright 2025 Google LLC */</div><div class='add'>+</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "sk_bypass_prot_mem.skel.h"</div><div class='add'>+#include "network_helpers.h"</div><div class='add'>+</div><div class='add'>+#define NR_PAGES	32</div><div class='add'>+#define NR_SOCKETS	2</div><div class='add'>+#define BUF_TOTAL	(NR_PAGES * 4096 / NR_SOCKETS)</div><div class='add'>+#define BUF_SINGLE	1024</div><div class='add'>+#define NR_SEND		(BUF_TOTAL / BUF_SINGLE)</div><div class='add'>+</div><div class='add'>+struct test_case {</div><div class='add'>+	char name[8];</div><div class='add'>+	int family;</div><div class='add'>+	int type;</div><div class='add'>+	int (*create_sockets)(struct test_case *test_case, int sk[], int len);</div><div class='add'>+	long (*get_memory_allocated)(struct test_case *test_case, struct sk_bypass_prot_mem *skel);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcp_create_sockets(struct test_case *test_case, int sk[], int len)</div><div class='add'>+{</div><div class='add'>+	int server, i, err = 0;</div><div class='add'>+</div><div class='add'>+	server = start_server(test_case-&gt;family, test_case-&gt;type, NULL, 0, 0);</div><div class='add'>+	if (!ASSERT_GE(server, 0, "start_server_str"))</div><div class='add'>+		return server;</div><div class='add'>+</div><div class='add'>+	/* Keep for-loop so we can change NR_SOCKETS easily. */</div><div class='add'>+	for (i = 0; i &lt; len; i += 2) {</div><div class='add'>+		sk[i] = connect_to_fd(server, 0);</div><div class='add'>+		if (sk[i] &lt; 0) {</div><div class='add'>+			ASSERT_GE(sk[i], 0, "connect_to_fd");</div><div class='add'>+			err = sk[i];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sk[i + 1] = accept(server, NULL, NULL);</div><div class='add'>+		if (sk[i + 1] &lt; 0) {</div><div class='add'>+			ASSERT_GE(sk[i + 1], 0, "accept");</div><div class='add'>+			err = sk[i + 1];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	close(server);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int udp_create_sockets(struct test_case *test_case, int sk[], int len)</div><div class='add'>+{</div><div class='add'>+	int i, j, err, rcvbuf = BUF_TOTAL;</div><div class='add'>+</div><div class='add'>+	/* Keep for-loop so we can change NR_SOCKETS easily. */</div><div class='add'>+	for (i = 0; i &lt; len; i += 2) {</div><div class='add'>+		sk[i] = start_server(test_case-&gt;family, test_case-&gt;type, NULL, 0, 0);</div><div class='add'>+		if (sk[i] &lt; 0) {</div><div class='add'>+			ASSERT_GE(sk[i], 0, "start_server");</div><div class='add'>+			return sk[i];</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sk[i + 1] = connect_to_fd(sk[i], 0);</div><div class='add'>+		if (sk[i + 1] &lt; 0) {</div><div class='add'>+			ASSERT_GE(sk[i + 1], 0, "connect_to_fd");</div><div class='add'>+			return sk[i + 1];</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = connect_fd_to_fd(sk[i], sk[i + 1], 0);</div><div class='add'>+		if (err) {</div><div class='add'>+			ASSERT_EQ(err, 0, "connect_fd_to_fd");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 2; j++) {</div><div class='add'>+			err = setsockopt(sk[i + j], SOL_SOCKET, SO_RCVBUF, &amp;rcvbuf, sizeof(int));</div><div class='add'>+			if (err) {</div><div class='add'>+				ASSERT_EQ(err, 0, "setsockopt(SO_RCVBUF)");</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long get_memory_allocated(struct test_case *test_case,</div><div class='add'>+				 bool *activated, long *memory_allocated)</div><div class='add'>+{</div><div class='add'>+	int sk;</div><div class='add'>+</div><div class='add'>+	*activated = true;</div><div class='add'>+</div><div class='add'>+	/* AF_INET and AF_INET6 share the same memory_allocated.</div><div class='add'>+	 * tcp_init_sock() is called by AF_INET and AF_INET6,</div><div class='add'>+	 * but udp_lib_init_sock() is inline.</div><div class='add'>+	 */</div><div class='add'>+	sk = socket(AF_INET, test_case-&gt;type, 0);</div><div class='add'>+	if (!ASSERT_GE(sk, 0, "get_memory_allocated"))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	close(sk);</div><div class='add'>+</div><div class='add'>+	return *memory_allocated;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long tcp_get_memory_allocated(struct test_case *test_case, struct sk_bypass_prot_mem *skel)</div><div class='add'>+{</div><div class='add'>+	return get_memory_allocated(test_case,</div><div class='add'>+				    &amp;skel-&gt;bss-&gt;tcp_activated,</div><div class='add'>+				    &amp;skel-&gt;bss-&gt;tcp_memory_allocated);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long udp_get_memory_allocated(struct test_case *test_case, struct sk_bypass_prot_mem *skel)</div><div class='add'>+{</div><div class='add'>+	return get_memory_allocated(test_case,</div><div class='add'>+				    &amp;skel-&gt;bss-&gt;udp_activated,</div><div class='add'>+				    &amp;skel-&gt;bss-&gt;udp_memory_allocated);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int check_bypass(struct test_case *test_case,</div><div class='add'>+			struct sk_bypass_prot_mem *skel, bool bypass)</div><div class='add'>+{</div><div class='add'>+	char buf[BUF_SINGLE] = {};</div><div class='add'>+	long memory_allocated[2];</div><div class='add'>+	int sk[NR_SOCKETS];</div><div class='add'>+	int err, i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sk); i++)</div><div class='add'>+		sk[i] = -1;</div><div class='add'>+</div><div class='add'>+	err = test_case-&gt;create_sockets(test_case, sk, ARRAY_SIZE(sk));</div><div class='add'>+	if (err)</div><div class='add'>+		goto close;</div><div class='add'>+</div><div class='add'>+	memory_allocated[0] = test_case-&gt;get_memory_allocated(test_case, skel);</div><div class='add'>+</div><div class='add'>+	/* allocate pages &gt;= NR_PAGES */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sk); i++) {</div><div class='add'>+		for (j = 0; j &lt; NR_SEND; j++) {</div><div class='add'>+			int bytes = send(sk[i], buf, sizeof(buf), 0);</div><div class='add'>+</div><div class='add'>+			/* Avoid too noisy logs when something failed. */</div><div class='add'>+			if (bytes != sizeof(buf)) {</div><div class='add'>+				ASSERT_EQ(bytes, sizeof(buf), "send");</div><div class='add'>+				if (bytes &lt; 0) {</div><div class='add'>+					err = bytes;</div><div class='add'>+					goto drain;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memory_allocated[1] = test_case-&gt;get_memory_allocated(test_case, skel);</div><div class='add'>+</div><div class='add'>+	if (bypass)</div><div class='add'>+		ASSERT_LE(memory_allocated[1], memory_allocated[0] + 10, "bypass");</div><div class='add'>+	else</div><div class='add'>+		ASSERT_GT(memory_allocated[1], memory_allocated[0] + NR_PAGES, "no bypass");</div><div class='add'>+</div><div class='add'>+drain:</div><div class='add'>+	if (test_case-&gt;type == SOCK_DGRAM) {</div><div class='add'>+		/* UDP starts purging sk-&gt;sk_receive_queue after one RCU</div><div class='add'>+		 * grace period, then udp_memory_allocated goes down,</div><div class='add'>+		 * so drain the queue before close().</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(sk); i++) {</div><div class='add'>+			for (j = 0; j &lt; NR_SEND; j++) {</div><div class='add'>+				int bytes = recv(sk[i], buf, 1, MSG_DONTWAIT | MSG_TRUNC);</div><div class='add'>+</div><div class='add'>+				if (bytes == sizeof(buf))</div><div class='add'>+					continue;</div><div class='add'>+				if (bytes != -1 || errno != EAGAIN)</div><div class='add'>+					PRINT_FAIL("bytes: %d, errno: %s\n", bytes, strerror(errno));</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+close:</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sk); i++) {</div><div class='add'>+		if (sk[i] &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		close(sk[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void run_test(struct test_case *test_case)</div><div class='add'>+{</div><div class='add'>+	struct sk_bypass_prot_mem *skel;</div><div class='add'>+	struct nstoken *nstoken;</div><div class='add'>+	int cgroup, err;</div><div class='add'>+</div><div class='add'>+	skel = sk_bypass_prot_mem__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skel-&gt;bss-&gt;nr_cpus = libbpf_num_possible_cpus();</div><div class='add'>+</div><div class='add'>+	err = sk_bypass_prot_mem__attach(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "attach"))</div><div class='add'>+		goto destroy_skel;</div><div class='add'>+</div><div class='add'>+	cgroup = test__join_cgroup("/sk_bypass_prot_mem");</div><div class='add'>+	if (!ASSERT_GE(cgroup, 0, "join_cgroup"))</div><div class='add'>+		goto destroy_skel;</div><div class='add'>+</div><div class='add'>+	err = make_netns("sk_bypass_prot_mem");</div><div class='add'>+	if (!ASSERT_EQ(err, 0, "make_netns"))</div><div class='add'>+		goto close_cgroup;</div><div class='add'>+</div><div class='add'>+	nstoken = open_netns("sk_bypass_prot_mem");</div><div class='add'>+	if (!ASSERT_OK_PTR(nstoken, "open_netns"))</div><div class='add'>+		goto remove_netns;</div><div class='add'>+</div><div class='add'>+	err = check_bypass(test_case, skel, false);</div><div class='add'>+	if (!ASSERT_EQ(err, 0, "test_bypass(false)"))</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	err = write_sysctl("/proc/sys/net/core/bypass_prot_mem", "1");</div><div class='add'>+	if (!ASSERT_EQ(err, 0, "write_sysctl(1)"))</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	err = check_bypass(test_case, skel, true);</div><div class='add'>+	if (!ASSERT_EQ(err, 0, "test_bypass(true by sysctl)"))</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	err = write_sysctl("/proc/sys/net/core/bypass_prot_mem", "0");</div><div class='add'>+	if (!ASSERT_EQ(err, 0, "write_sysctl(0)"))</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	skel-&gt;links.sock_create = bpf_program__attach_cgroup(skel-&gt;progs.sock_create, cgroup);</div><div class='add'>+	if (!ASSERT_OK_PTR(skel-&gt;links.sock_create, "attach_cgroup(sock_create)"))</div><div class='add'>+		goto close_netns;</div><div class='add'>+</div><div class='add'>+	err = check_bypass(test_case, skel, true);</div><div class='add'>+	ASSERT_EQ(err, 0, "test_bypass(true by bpf)");</div><div class='add'>+</div><div class='add'>+close_netns:</div><div class='add'>+	close_netns(nstoken);</div><div class='add'>+remove_netns:</div><div class='add'>+	remove_netns("sk_bypass_prot_mem");</div><div class='add'>+close_cgroup:</div><div class='add'>+	close(cgroup);</div><div class='add'>+destroy_skel:</div><div class='add'>+	sk_bypass_prot_mem__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct test_case test_cases[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "TCP  ",</div><div class='add'>+		.family = AF_INET,</div><div class='add'>+		.type = SOCK_STREAM,</div><div class='add'>+		.create_sockets = tcp_create_sockets,</div><div class='add'>+		.get_memory_allocated = tcp_get_memory_allocated,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "UDP  ",</div><div class='add'>+		.family = AF_INET,</div><div class='add'>+		.type = SOCK_DGRAM,</div><div class='add'>+		.create_sockets = udp_create_sockets,</div><div class='add'>+		.get_memory_allocated = udp_get_memory_allocated,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "TCPv6",</div><div class='add'>+		.family = AF_INET6,</div><div class='add'>+		.type = SOCK_STREAM,</div><div class='add'>+		.create_sockets = tcp_create_sockets,</div><div class='add'>+		.get_memory_allocated = tcp_get_memory_allocated,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "UDPv6",</div><div class='add'>+		.family = AF_INET6,</div><div class='add'>+		.type = SOCK_DGRAM,</div><div class='add'>+		.create_sockets = udp_create_sockets,</div><div class='add'>+		.get_memory_allocated = udp_get_memory_allocated,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void serial_test_sk_bypass_prot_mem(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(test_cases); i++) {</div><div class='add'>+		if (test__start_subtest(test_cases[i].name))</div><div class='add'>+			run_test(&amp;test_cases[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/socket_helpers.h b/tools/testing/selftests/bpf/prog_tests/socket_helpers.h<br/>index e02cabcc814e..0d59503a0c73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/socket_helpers.h?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/socket_helpers.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/socket_helpers.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/socket_helpers.h</a></div><div class='hunk'>@@ -17,11 +17,16 @@</div><div class='ctx'> #define VMADDR_CID_LOCAL 1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* include/linux/compiler_types.h */</div><div class='add'>+#if __STDC_VERSION__ &lt; 202311L &amp;&amp; !defined(auto)</div><div class='add'>+# define auto __auto_type</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* include/linux/cleanup.h */</div><div class='ctx'> #define __get_and_null(p, nullvalue)                                           \</div><div class='ctx'> 	({                                                                     \</div><div class='del'>-		__auto_type __ptr = &amp;(p);                                      \</div><div class='del'>-		__auto_type __val = *__ptr;                                    \</div><div class='add'>+		auto __ptr = &amp;(p);					       \</div><div class='add'>+		auto __val = *__ptr;                                           \</div><div class='ctx'> 		*__ptr = nullvalue;                                            \</div><div class='ctx'> 		__val;                                                         \</div><div class='ctx'> 	})</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/spin_lock.c b/tools/testing/selftests/bpf/prog_tests/spin_lock.c<br/>index e3ea5dc2f697..254fbfeab06a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/spin_lock.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/spin_lock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/spin_lock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/spin_lock.c</a></div><div class='hunk'>@@ -13,22 +13,22 @@ static struct {</div><div class='ctx'> 	const char *err_msg;</div><div class='ctx'> } spin_lock_fail_tests[] = {</div><div class='ctx'> 	{ "lock_id_kptr_preserve",</div><div class='del'>-	  "5: (bf) r1 = r0                       ; R0_w=ptr_foo(id=2,ref_obj_id=2) "</div><div class='del'>-	  "R1_w=ptr_foo(id=2,ref_obj_id=2) refs=2\n6: (85) call bpf_this_cpu_ptr#154\n"</div><div class='add'>+	  "5: (bf) r1 = r0                       ; R0=ptr_foo(id=2,ref_obj_id=2) "</div><div class='add'>+	  "R1=ptr_foo(id=2,ref_obj_id=2) refs=2\n6: (85) call bpf_this_cpu_ptr#154\n"</div><div class='ctx'> 	  "R1 type=ptr_ expected=percpu_ptr_" },</div><div class='ctx'> 	{ "lock_id_global_zero",</div><div class='del'>-	  "; R1_w=map_value(map=.data.A,ks=4,vs=4)\n2: (85) call bpf_this_cpu_ptr#154\n"</div><div class='add'>+	  "; R1=map_value(map=.data.A,ks=4,vs=4)\n2: (85) call bpf_this_cpu_ptr#154\n"</div><div class='ctx'> 	  "R1 type=map_value expected=percpu_ptr_" },</div><div class='ctx'> 	{ "lock_id_mapval_preserve",</div><div class='ctx'> 	  "[0-9]\\+: (bf) r1 = r0                       ;"</div><div class='del'>-	  " R0_w=map_value(id=1,map=array_map,ks=4,vs=8)"</div><div class='del'>-	  " R1_w=map_value(id=1,map=array_map,ks=4,vs=8)\n"</div><div class='add'>+	  " R0=map_value(id=1,map=array_map,ks=4,vs=8)"</div><div class='add'>+	  " R1=map_value(id=1,map=array_map,ks=4,vs=8)\n"</div><div class='ctx'> 	  "[0-9]\\+: (85) call bpf_this_cpu_ptr#154\n"</div><div class='ctx'> 	  "R1 type=map_value expected=percpu_ptr_" },</div><div class='ctx'> 	{ "lock_id_innermapval_preserve",</div><div class='ctx'> 	  "[0-9]\\+: (bf) r1 = r0                      ;"</div><div class='ctx'> 	  " R0=map_value(id=2,ks=4,vs=8)"</div><div class='del'>-	  " R1_w=map_value(id=2,ks=4,vs=8)\n"</div><div class='add'>+	  " R1=map_value(id=2,ks=4,vs=8)\n"</div><div class='ctx'> 	  "[0-9]\\+: (85) call bpf_this_cpu_ptr#154\n"</div><div class='ctx'> 	  "R1 type=map_value expected=percpu_ptr_" },</div><div class='ctx'> 	{ "lock_id_mismatch_kptr_kptr", "bpf_spin_unlock of different lock" },</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c<br/>index b7ba5cd47d96..271b5cc9fc01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@ retry:</div><div class='ctx'> 	bpf_map_update_elem(control_map_fd, &amp;key, &amp;val, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* for every element in stackid_hmap, we can find a corresponding one</div><div class='del'>-	 * in stackmap, and vise versa.</div><div class='add'>+	 * in stackmap, and vice versa.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = compare_map_keys(stackid_hmap_fd, stackmap_fd);</div><div class='ctx'> 	if (CHECK(err, "compare_map_keys stackid_hmap vs. stackmap",</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c<br/>index 0832fd787457..b277dddd5af7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_build_id_nmi.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ retry:</div><div class='ctx'> 	bpf_map_update_elem(control_map_fd, &amp;key, &amp;val, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* for every element in stackid_hmap, we can find a corresponding one</div><div class='del'>-	 * in stackmap, and vise versa.</div><div class='add'>+	 * in stackmap, and vice versa.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = compare_map_keys(stackid_hmap_fd, stackmap_fd);</div><div class='ctx'> 	if (CHECK(err, "compare_map_keys stackid_hmap vs. stackmap",</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c<br/>new file mode 100644<br/>index 000000000000..c9efdd2a5b18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_ips.c</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;test_progs.h&gt;</div><div class='add'>+#include "stacktrace_ips.skel.h"</div><div class='add'>+</div><div class='add'>+#ifdef __x86_64__</div><div class='add'>+static int check_stacktrace_ips(int fd, __u32 key, int cnt, ...)</div><div class='add'>+{</div><div class='add'>+	__u64 ips[PERF_MAX_STACK_DEPTH];</div><div class='add'>+	struct ksyms *ksyms = NULL;</div><div class='add'>+	int i, err = 0;</div><div class='add'>+	va_list args;</div><div class='add'>+</div><div class='add'>+	/* sorted by addr */</div><div class='add'>+	ksyms = load_kallsyms_local();</div><div class='add'>+	if (!ASSERT_OK_PTR(ksyms, "load_kallsyms_local"))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* unlikely, but... */</div><div class='add'>+	if (!ASSERT_LT(cnt, PERF_MAX_STACK_DEPTH, "check_max"))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	err = bpf_map_lookup_elem(fd, &amp;key, ips);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Compare all symbols provided via arguments with stacktrace ips,</div><div class='add'>+	 * and their related symbol addresses.t</div><div class='add'>+	 */</div><div class='add'>+	va_start(args, cnt);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cnt; i++) {</div><div class='add'>+		unsigned long val;</div><div class='add'>+		struct ksym *ksym;</div><div class='add'>+</div><div class='add'>+		val = va_arg(args, unsigned long);</div><div class='add'>+		ksym = ksym_search_local(ksyms, ips[i]);</div><div class='add'>+		if (!ASSERT_OK_PTR(ksym, "ksym_search_local"))</div><div class='add'>+			break;</div><div class='add'>+		ASSERT_EQ(ksym-&gt;addr, val, "stack_cmp");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	va_end(args);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	free_kallsyms_local(ksyms);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_stacktrace_ips_kprobe_multi(bool retprobe)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_kprobe_multi_opts, opts,</div><div class='add'>+		.retprobe = retprobe</div><div class='add'>+	);</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, topts);</div><div class='add'>+	struct stacktrace_ips *skel;</div><div class='add'>+</div><div class='add'>+	skel = stacktrace_ips__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "stacktrace_ips__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!skel-&gt;kconfig-&gt;CONFIG_UNWINDER_ORC) {</div><div class='add'>+		test__skip();</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skel-&gt;links.kprobe_multi_test = bpf_program__attach_kprobe_multi_opts(</div><div class='add'>+							skel-&gt;progs.kprobe_multi_test,</div><div class='add'>+							"bpf_testmod_stacktrace_test", &amp;opts);</div><div class='add'>+	if (!ASSERT_OK_PTR(skel-&gt;links.kprobe_multi_test, "bpf_program__attach_kprobe_multi_opts"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	trigger_module_test_read(1);</div><div class='add'>+</div><div class='add'>+	load_kallsyms();</div><div class='add'>+</div><div class='add'>+	check_stacktrace_ips(bpf_map__fd(skel-&gt;maps.stackmap), skel-&gt;bss-&gt;stack_key, 4,</div><div class='add'>+			     ksym_get_addr("bpf_testmod_stacktrace_test_3"),</div><div class='add'>+			     ksym_get_addr("bpf_testmod_stacktrace_test_2"),</div><div class='add'>+			     ksym_get_addr("bpf_testmod_stacktrace_test_1"),</div><div class='add'>+			     ksym_get_addr("bpf_testmod_test_read"));</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	stacktrace_ips__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void test_stacktrace_ips_raw_tp(void)</div><div class='add'>+{</div><div class='add'>+	__u32 info_len = sizeof(struct bpf_prog_info);</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, topts);</div><div class='add'>+	struct bpf_prog_info info = {};</div><div class='add'>+	struct stacktrace_ips *skel;</div><div class='add'>+	__u64 bpf_prog_ksym = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skel = stacktrace_ips__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "stacktrace_ips__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!skel-&gt;kconfig-&gt;CONFIG_UNWINDER_ORC) {</div><div class='add'>+		test__skip();</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skel-&gt;links.rawtp_test = bpf_program__attach_raw_tracepoint(</div><div class='add'>+							skel-&gt;progs.rawtp_test,</div><div class='add'>+							"bpf_testmod_test_read");</div><div class='add'>+	if (!ASSERT_OK_PTR(skel-&gt;links.rawtp_test, "bpf_program__attach_raw_tracepoint"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	/* get bpf program address */</div><div class='add'>+	info.jited_ksyms = ptr_to_u64(&amp;bpf_prog_ksym);</div><div class='add'>+	info.nr_jited_ksyms = 1;</div><div class='add'>+	err = bpf_prog_get_info_by_fd(bpf_program__fd(skel-&gt;progs.rawtp_test),</div><div class='add'>+				      &amp;info, &amp;info_len);</div><div class='add'>+	if (!ASSERT_OK(err, "bpf_prog_get_info_by_fd"))</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	trigger_module_test_read(1);</div><div class='add'>+</div><div class='add'>+	load_kallsyms();</div><div class='add'>+</div><div class='add'>+	check_stacktrace_ips(bpf_map__fd(skel-&gt;maps.stackmap), skel-&gt;bss-&gt;stack_key, 2,</div><div class='add'>+			     bpf_prog_ksym,</div><div class='add'>+			     ksym_get_addr("bpf_trace_run2"));</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	stacktrace_ips__destroy(skel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __test_stacktrace_ips(void)</div><div class='add'>+{</div><div class='add'>+	if (test__start_subtest("kprobe_multi"))</div><div class='add'>+		test_stacktrace_ips_kprobe_multi(false);</div><div class='add'>+	if (test__start_subtest("kretprobe_multi"))</div><div class='add'>+		test_stacktrace_ips_kprobe_multi(true);</div><div class='add'>+	if (test__start_subtest("raw_tp"))</div><div class='add'>+		test_stacktrace_ips_raw_tp();</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void __test_stacktrace_ips(void)</div><div class='add'>+{</div><div class='add'>+	test__skip();</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void test_stacktrace_ips(void)</div><div class='add'>+{</div><div class='add'>+	__test_stacktrace_ips();</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_map.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_map.c<br/>index df59e4ae2951..c23b97414813 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_map.c</a></div><div class='hunk'>@@ -1,46 +1,27 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;test_progs.h&gt;</div><div class='add'>+#include "stacktrace_map.skel.h"</div><div class='ctx'> </div><div class='ctx'> void test_stacktrace_map(void)</div><div class='ctx'> {</div><div class='add'>+	struct stacktrace_map *skel;</div><div class='ctx'> 	int control_map_fd, stackid_hmap_fd, stackmap_fd, stack_amap_fd;</div><div class='del'>-	const char *prog_name = "oncpu";</div><div class='del'>-	int err, prog_fd, stack_trace_len;</div><div class='del'>-	const char *file = "./test_stacktrace_map.bpf.o";</div><div class='del'>-	__u32 key, val, duration = 0;</div><div class='del'>-	struct bpf_program *prog;</div><div class='del'>-	struct bpf_object *obj;</div><div class='del'>-	struct bpf_link *link;</div><div class='add'>+	int err, stack_trace_len;</div><div class='add'>+	__u32 key, val, stack_id, duration = 0;</div><div class='add'>+	__u64 stack[PERF_MAX_STACK_DEPTH];</div><div class='ctx'> </div><div class='del'>-	err = bpf_prog_test_load(file, BPF_PROG_TYPE_TRACEPOINT, &amp;obj, &amp;prog_fd);</div><div class='del'>-	if (CHECK(err, "prog_load", "err %d errno %d\n", err, errno))</div><div class='add'>+	skel = stacktrace_map__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "skel_open_and_load"))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	prog = bpf_object__find_program_by_name(obj, prog_name);</div><div class='del'>-	if (CHECK(!prog, "find_prog", "prog '%s' not found\n", prog_name))</div><div class='del'>-		goto close_prog;</div><div class='del'>-</div><div class='del'>-	link = bpf_program__attach_tracepoint(prog, "sched", "sched_switch");</div><div class='del'>-	if (!ASSERT_OK_PTR(link, "attach_tp"))</div><div class='del'>-		goto close_prog;</div><div class='del'>-</div><div class='del'>-	/* find map fds */</div><div class='del'>-	control_map_fd = bpf_find_map(__func__, obj, "control_map");</div><div class='del'>-	if (CHECK_FAIL(control_map_fd &lt; 0))</div><div class='del'>-		goto disable_pmu;</div><div class='del'>-</div><div class='del'>-	stackid_hmap_fd = bpf_find_map(__func__, obj, "stackid_hmap");</div><div class='del'>-	if (CHECK_FAIL(stackid_hmap_fd &lt; 0))</div><div class='del'>-		goto disable_pmu;</div><div class='del'>-</div><div class='del'>-	stackmap_fd = bpf_find_map(__func__, obj, "stackmap");</div><div class='del'>-	if (CHECK_FAIL(stackmap_fd &lt; 0))</div><div class='del'>-		goto disable_pmu;</div><div class='del'>-</div><div class='del'>-	stack_amap_fd = bpf_find_map(__func__, obj, "stack_amap");</div><div class='del'>-	if (CHECK_FAIL(stack_amap_fd &lt; 0))</div><div class='del'>-		goto disable_pmu;</div><div class='add'>+	control_map_fd = bpf_map__fd(skel-&gt;maps.control_map);</div><div class='add'>+	stackid_hmap_fd = bpf_map__fd(skel-&gt;maps.stackid_hmap);</div><div class='add'>+	stackmap_fd = bpf_map__fd(skel-&gt;maps.stackmap);</div><div class='add'>+	stack_amap_fd = bpf_map__fd(skel-&gt;maps.stack_amap);</div><div class='ctx'> </div><div class='add'>+	err = stacktrace_map__attach(skel);</div><div class='add'>+	if (!ASSERT_OK(err, "skel_attach"))</div><div class='add'>+		goto out;</div><div class='ctx'> 	/* give some time for bpf program run */</div><div class='ctx'> 	sleep(1);</div><div class='ctx'> </div><div class='hunk'>@@ -50,26 +31,32 @@ void test_stacktrace_map(void)</div><div class='ctx'> 	bpf_map_update_elem(control_map_fd, &amp;key, &amp;val, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* for every element in stackid_hmap, we can find a corresponding one</div><div class='del'>-	 * in stackmap, and vise versa.</div><div class='add'>+	 * in stackmap, and vice versa.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = compare_map_keys(stackid_hmap_fd, stackmap_fd);</div><div class='ctx'> 	if (CHECK(err, "compare_map_keys stackid_hmap vs. stackmap",</div><div class='ctx'> 		  "err %d errno %d\n", err, errno))</div><div class='del'>-		goto disable_pmu;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	err = compare_map_keys(stackmap_fd, stackid_hmap_fd);</div><div class='ctx'> 	if (CHECK(err, "compare_map_keys stackmap vs. stackid_hmap",</div><div class='ctx'> 		  "err %d errno %d\n", err, errno))</div><div class='del'>-		goto disable_pmu;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	stack_trace_len = PERF_MAX_STACK_DEPTH * sizeof(__u64);</div><div class='ctx'> 	err = compare_stack_ips(stackmap_fd, stack_amap_fd, stack_trace_len);</div><div class='ctx'> 	if (CHECK(err, "compare_stack_ips stackmap vs. stack_amap",</div><div class='ctx'> 		  "err %d errno %d\n", err, errno))</div><div class='del'>-		goto disable_pmu;</div><div class='del'>-</div><div class='del'>-disable_pmu:</div><div class='del'>-	bpf_link__destroy(link);</div><div class='del'>-close_prog:</div><div class='del'>-	bpf_object__close(obj);</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	stack_id = skel-&gt;bss-&gt;stack_id;</div><div class='add'>+	err = bpf_map_lookup_and_delete_elem(stackmap_fd, &amp;stack_id,  stack);</div><div class='add'>+	if (!ASSERT_OK(err, "lookup and delete target stack_id"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = bpf_map_lookup_elem(stackmap_fd, &amp;stack_id, stack);</div><div class='add'>+	if (!ASSERT_EQ(err, -ENOENT, "lookup deleted stack_id"))</div><div class='add'>+		goto out;</div><div class='add'>+out:</div><div class='add'>+	stacktrace_map__destroy(skel);</div><div class='ctx'> }</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c<br/>index c6ef06f55cdb..e985d51d3d47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_raw_tp.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@ void test_stacktrace_map_raw_tp(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *prog_name = "oncpu";</div><div class='ctx'> 	int control_map_fd, stackid_hmap_fd, stackmap_fd;</div><div class='del'>-	const char *file = "./test_stacktrace_map.bpf.o";</div><div class='add'>+	const char *file = "./stacktrace_map.bpf.o";</div><div class='ctx'> 	__u32 key, val, duration = 0;</div><div class='ctx'> 	int err, prog_fd;</div><div class='ctx'> 	struct bpf_program *prog;</div><div class='hunk'>@@ -46,7 +46,7 @@ void test_stacktrace_map_raw_tp(void)</div><div class='ctx'> 	bpf_map_update_elem(control_map_fd, &amp;key, &amp;val, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* for every element in stackid_hmap, we can find a corresponding one</div><div class='del'>-	 * in stackmap, and vise versa.</div><div class='add'>+	 * in stackmap, and vice versa.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = compare_map_keys(stackid_hmap_fd, stackmap_fd);</div><div class='ctx'> 	if (CHECK(err, "compare_map_keys stackid_hmap vs. stackmap",</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c b/tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c<br/>index 1932b1e0685c..dc2ccf6a14d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stacktrace_map_skip.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ void test_stacktrace_map_skip(void)</div><div class='ctx'> 	skel-&gt;bss-&gt;control = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* for every element in stackid_hmap, we can find a corresponding one</div><div class='del'>-	 * in stackmap, and vise versa.</div><div class='add'>+	 * in stackmap, and vice versa.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = compare_map_keys(stackid_hmap_fd, stackmap_fd);</div><div class='ctx'> 	if (!ASSERT_OK(err, "compare_map_keys stackid_hmap vs. stackmap"))</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/stream.c b/tools/testing/selftests/bpf/prog_tests/stream.c<br/>index d9f0185dca61..c3cce5c292bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stream.c?id=86a9b1250602d877a393dcbab5f42472f77ac0f7'>tools/testing/selftests/bpf/prog_tests/stream.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/tools/testing/selftests/bpf/prog_tests/stream.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>tools/testing/selftests/bpf/prog_tests/stream.c</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> /* Copyright (c) 2025 Meta Platforms, Inc. and affiliates. */</div><div class='ctx'> #include &lt;test_progs.h&gt;</div><div class='ctx'> #include &lt;sys/mman.h&gt;</div><div class='del'>-#include &lt;regex.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "stream.skel.h"</div><div class='ctx'> #include "stream_fail.skel.h"</div><div class='hunk'>@@ -18,87 +17,6 @@ void test_stream_success(void)</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct {</div><div class='del'>-	int prog_off;</div><div class='del'>-	const char *errstr;</div><div class='del'>-} stream_error_arr[] = {</div><div class='del'>-	{</div><div class='del'>-		offsetof(struct stream, progs.stream_cond_break),</div><div class='del'>-		"ERROR: Timeout detected for may_goto instruction\n"</div><div class='del'>-		"CPU: [0-9]+ UID: 0 PID: [0-9]+ Comm: .*\n"</div><div class='del'>-		"Call trace:\n"</div><div class='del'>-		"([a-zA-Z_][a-zA-Z0-9_]*\\+0x[0-9a-fA-F]+/0x[0-9a-fA-F]+\n"</div><div class='del'>-		"|[ \t]+[^\n]+\n)*",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		offsetof(struct stream, progs.stream_deadlock),</div><div class='del'>-		"ERROR: AA or ABBA deadlock detected for bpf_res_spin_lock\n"</div><div class='del'>-		"Attempted lock   = (0x[0-9a-fA-F]+)\n"</div><div class='del'>-		"Total held locks = 1\n"</div><div class='del'>-		"Held lock\\[ 0\\] = \\1\n"  // Lock address must match</div><div class='del'>-		"CPU: [0-9]+ UID: 0 PID: [0-9]+ Comm: .*\n"</div><div class='del'>-		"Call trace:\n"</div><div class='del'>-		"([a-zA-Z_][a-zA-Z0-9_]*\\+0x[0-9a-fA-F]+/0x[0-9a-fA-F]+\n"</div><div class='del'>-		"|[ \t]+[^\n]+\n)*",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int match_regex(const char *pattern, const char *string)</div><div class='del'>-{</div><div class='del'>-	int err, rc;</div><div class='del'>-	regex_t re;</div><div class='del'>-</div><div class='del'>-	err = regcomp(&amp;re, pattern, REG_EXTENDED | REG_NEWLINE);</div><div class='del'>-	if (err)</div><div class='del'>-		return -1;</div><div class='del'>-	rc = regexec(&amp;re, string, 0, NULL, 0);</div><div class='del'>-	regfree(&amp;re);</div><div class='del'>-	return rc == 0 ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void test_stream_errors(void)</div><div class='del'>-{</div><div class='del'>-	LIBBPF_OPTS(bpf_test_run_opts, opts);</div><div class='del'>-	LIBBPF_OPTS(bpf_prog_stream_read_opts, ropts);</div><div class='del'>-	struct stream *skel;</div><div class='del'>-	int ret, prog_fd;</div><div class='del'>-	char buf[1024];</div><div class='del'>-</div><div class='del'>-	skel = stream__open_and_load();</div><div class='del'>-	if (!ASSERT_OK_PTR(skel, "stream__open_and_load"))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; ARRAY_SIZE(stream_error_arr); i++) {</div><div class='del'>-		struct bpf_program **prog;</div><div class='del'>-</div><div class='del'>-		prog = (struct bpf_program **)(((char *)skel) + stream_error_arr[i].prog_off);</div><div class='del'>-		prog_fd = bpf_program__fd(*prog);</div><div class='del'>-		ret = bpf_prog_test_run_opts(prog_fd, &amp;opts);</div><div class='del'>-		ASSERT_OK(ret, "ret");</div><div class='del'>-		ASSERT_OK(opts.retval, "retval");</div><div class='del'>-</div><div class='del'>-#if !defined(__x86_64__)</div><div class='del'>-		ASSERT_TRUE(1, "Timed may_goto unsupported, skip.");</div><div class='del'>-		if (i == 0) {</div><div class='del'>-			ret = bpf_prog_stream_read(prog_fd, 2, buf, sizeof(buf), &amp;ropts);</div><div class='del'>-			ASSERT_EQ(ret, 0, "stream read");</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		ret = bpf_prog_stream_read(prog_fd, BPF_STREAM_STDERR, buf, sizeof(buf), &amp;ropts);</div><div class='del'>-		ASSERT_GT(ret, 0, "stream read");</div><div class='del'>-		ASSERT_LE(ret, 1023, "len for buf");</div><div class='del'>-		buf[ret] = '\0';</div><div class='del'>-</div><div class='del'>-		ret = match_regex(stream_error_arr[i].errstr, buf);</div><div class='del'>-		if (!ASSERT_TRUE(ret == 1, "regex match"))</div><div class='del'>-			fprintf(stderr, "Output from stream:\n%s\n", buf);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stream__destroy(skel);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void test_stream_syscall(void)</div><div class='ctx'> {</div><div class='ctx'> 	LIBBPF_OPTS(bpf_test_run_opts, opts);</div><div class='hunk'>@@ -139,3 +57,52 @@ void test_stream_syscall(void)</div><div class='ctx'> </div><div class='ctx'> 	stream__destroy(skel);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void test_address(struct bpf_program *prog, unsigned long *fault_addr_p)</div><div class='add'>+{</div><div class='add'>+	LIBBPF_OPTS(bpf_test_run_opts, opts);</div><div class='add'>+	LIBBPF_OPTS(bpf_prog_stream_read_opts, ropts);</div><div class='add'>+	int ret, prog_fd;</div><div class='add'>+	char fault_addr[64];</div><div class='add'>+	char buf[1024];</div><div class='add'>+</div><div class='add'>+	prog_fd = bpf_program__fd(prog);</div><div class='add'>+</div><div class='add'>+	ret = bpf_prog_test_run_opts(prog_fd, &amp;opts);</div><div class='add'>+	ASSERT_OK(ret, "ret");</div><div class='add'>+	ASSERT_OK(opts.retval, "retval");</div><div class='add'>+</div><div class='add'>+	sprintf(fault_addr, "0x%lx", *fault_addr_p);</div><div class='add'>+</div><div class='add'>+	ret = bpf_prog_stream_read(prog_fd, BPF_STREAM_STDERR, buf, sizeof(buf), &amp;ropts);</div><div class='add'>+	ASSERT_GT(ret, 0, "stream read");</div><div class='add'>+	ASSERT_LE(ret, 1023, "len for buf");</div><div class='add'>+	buf[ret] = '\0';</div><div class='add'>+</div><div class='add'>+	if (!ASSERT_HAS_SUBSTR(buf, fault_addr, "fault_addr")) {</div><div class='add'>+		fprintf(stderr, "Output from stream:\n%s\n", buf);</div><div class='add'>+		fprintf(stderr, "Fault Addr: %s\n", fault_addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void test_stream_arena_fault_address(void)</div><div class='add'>+{</div><div class='add'>+	struct stream *skel;</div><div class='add'>+</div><div class='add'>+#if !defined(__x86_64__) &amp;&amp; !defined(__aarch64__)</div><div class='add'>+	printf("%s:SKIP: arena fault reporting not supported\n", __func__);</div><div class='add'>+	test__skip();</div><div class='add'>+	return;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	skel = stream__open_and_load();</div><div class='add'>+	if (!ASSERT_OK_PTR(skel, "stream__open_and_load"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test__start_subtest("read_fault"))</div><div class='add'>+		test_address(skel-&gt;progs.stream_arena_read_fault, &amp;skel-&gt;bss-&gt;fault_addr);</div><div class='add'>+	if (test__start_subtest("write_fault"))</div><div class='add'>+		test_address(skel-&gt;progs.stream_arena_write_fault, &amp;skel-&gt;bss-&gt;fault_addr);</div><div class='add'>+</div><div class='add'>+	stream__destroy(skel);</div><div class='add'>+}</div><div class='head'>diff --git a/tools/testing/selftests/bpf/prog_tests/string_kfuncs.c b/tools/testing/selftests/bpf/prog_tests/string_kfuncs.c