diff options
author | Peng Fan <peng.fan@nxp.com> | 2020-01-10 07:20:31 +0000 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-02-13 11:25:25 +0800 |
commit | 53458f86683bee0551c87db4022e6ccc3ab8c868 (patch) | |
tree | 407c85411122c9eb7613ca2d289e088fd433c298 | |
parent | 815364d0424e72cde1d16f2ef3a75cd8e48411bf (diff) |
arm64: dts: imx8mn: Init rates and parents configs for clocks
Add the initial configuration for clocks that need default parent and rate
setting.
NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs
to run at 400MHz for better performance.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index d23347aaedda..c98a37666347 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -380,6 +380,16 @@ <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; + assigned-clocks = <&clk IMX8MN_CLK_NOC>, + <&clk IMX8MN_CLK_AUDIO_AHB>, + <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>, + <&clk IMX8MN_SYS_PLL3>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL3_OUT>, + <&clk IMX8MN_SYS_PLL1_800M>; + assigned-clock-rates = <0>, + <400000000>, + <400000000>, + <600000000>; }; src: reset-controller@30390000 { |