diff options
| author | Dave Gerlach <d-gerlach@ti.com> | 2019-12-12 22:17:25 -0600 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-02-27 09:33:33 -0800 |
| commit | 89a7b191fcd17e3f1dba963eb2cba8262b45a4d2 (patch) | |
| tree | 30dc518a6b187c3899572033b046749a7dc59dc6 | |
| parent | c3e6fccafd6ecc6f59f63aedcc6dac0f01012c3a (diff) | |
ARM: dts: am4372: Add idle_states for cpuidle
Add idle_states table for CPU on am437x. Currently just add C1 state
which gates the MPU clock domain.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index faa14dc0faff..0001d4fa4d5d 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -45,6 +45,7 @@ #size-cells = <0>; cpu: cpu@0 { compatible = "arm,cortex-a9"; + enable-method = "ti,am4372"; device_type = "cpu"; reg = <0>; @@ -54,6 +55,17 @@ operating-points-v2 = <&cpu0_opp_table>; clock-latency = <300000>; /* From omap-cpufreq driver */ + cpu-idle-states = <&mpu_gate>; + }; + + idle-states { + mpu_gate: mpu_gate { + compatible = "arm,idle-state"; + entry-latency-us = <40>; + exit-latency-us = <100>; + min-residency-us = <300>; + local-timer-stop; + }; }; }; |