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| author | Alexandre Courbot <acourbot@nvidia.com> | 2017-02-23 18:14:30 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2017-03-07 17:05:13 +1000 |
| commit | 9706d8f9d1ebc499192f8974abba03acdcf1094a (patch) | |
| tree | 868710697d9de761dfdc25c593b6a779816b78e1 | |
| parent | 6ac2cc209e0096dabc8e902a8620d45f41b9fc0b (diff) | |
drm/nouveau/falcon/msgqueue: add SEC2 support
Add support for running a msgqueue on the SEC2 falcon.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c index 8583fe1c2183..59ed1c45bd65 100644 --- a/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c +++ b/drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c @@ -396,6 +396,9 @@ msgqueue_handle_init_msg(struct nvkm_msgqueue *priv, case NVKM_SUBDEV_PMU: tail_reg = 0x4cc; break; + case NVKM_ENGINE_SEC2: + tail_reg = 0xa34; + break; default: nvkm_error(subdev, "falcon %s unsupported for msgqueue!\n", nvkm_subdev_name[falcon->owner->index]); |