diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-08-13 11:04:18 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2020-03-30 12:57:59 +0100 |
| commit | c784bc7c8b7ef11560958cf9d7ce0ffcda74e3b2 (patch) | |
| tree | f0055fd7b8668d84edc3219c441715a8e809c1a5 | |
| parent | 119ff2d27076970a8d4e6b35b55c1182750eaea6 (diff) | |
PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors
There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| -rw-r--r-- | drivers/pci/controller/mobiveil/pcie-mobiveil.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 26496680fcf0..dbf3dfa28211 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -182,10 +182,32 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off) return mobiveil_csr_read(pcie, off, 0x4); } +static inline u32 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off) +{ + return mobiveil_csr_read(pcie, off, 0x2); +} + +static inline u32 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off) +{ + return mobiveil_csr_read(pcie, off, 0x1); +} + static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) { mobiveil_csr_write(pcie, val, off, 0x4); } +static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u32 val, + u32 off) +{ + mobiveil_csr_write(pcie, val, off, 0x2); +} + +static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u32 val, + u32 off) +{ + mobiveil_csr_write(pcie, val, off, 0x1); +} + #endif /* _PCIE_MOBIVEIL_H */ |