diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2016-11-29 10:13:48 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2021-02-15 13:59:24 +0000 |
| commit | 7439b0dac0c4802d6dc39bf5a30173716ea723ac (patch) | |
| tree | ab340827bb1e38700576eabaffe0bfe40386a613 | |
| parent | bbc1c864b0e8ecf89cb9dacd5fc6c4f8dd84050f (diff) | |
implement slot capabilities (SSPL)
| -rw-r--r-- | drivers/pci/controller/pci-mvebu.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 2dc9f457bc76..f3d2745f62b0 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -66,6 +66,12 @@ #define PCIE_STAT_BUS 0xff00 #define PCIE_STAT_DEV 0x1f0000 #define PCIE_STAT_LINK_DOWN BIT(0) +#define PCIE_SSPL 0x1a0c +#define PCIE_SSPL_MSGEN BIT(14) +#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8) +#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3) +#define PCIE_SSPL_SPLV(x) ((x) & 0xff) +#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff) #define PCIE_RC_RTSTA 0x1a14 #define PCIE_DEBUG_CTRL 0x1a60 #define PCIE_DEBUG_SOFT_RESET BIT(20) @@ -515,6 +521,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); break; + case PCI_EXP_SLTCAP: + { + u32 tmp = mvebu_readl(port, PCIE_SSPL); + *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 | + PCIE_SSPL_SPLV_VAL(tmp) << 7; + break; + } + case PCI_EXP_SLTCTL: *value = PCI_EXP_SLTSTA_PDS << 16; break; @@ -643,6 +657,15 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); break; + case PCI_EXP_SLTCAP: + { + u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) | + PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) | + PCIE_SSPL_MSGEN; + mvebu_writel(port, sspl, PCIE_SSPL); + break; + } + case PCI_EXP_RTSTA: mvebu_writel(port, new, PCIE_RC_RTSTA); break; |