diff options
author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2023-05-27 21:09:07 +0100 |
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committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2024-05-30 11:16:40 +0100 |
commit | 74ac100c81b6ca5e973b40b6fa32f26583b890a0 (patch) | |
tree | 3c17bcabf782c16fc8a1583edafbe6a4308a8ba9 | |
parent | 3f5e191bc221785ca6b7a2fbe6a170ad00a62576 (diff) |
arm64: dts: add SolidRun CN9130 SOM dtsi
Add the dts include file for the SolidRun CN9130 SOM (which is designed
to be attached to another board to make a functional system.) This SOM
is designed to be inter-changeable with the Armada 388 SOM used on
SolidRun's Clearfog Base and Pro platforms.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
-rw-r--r-- | arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi new file mode 100644 index 000000000000..7ef34f83ce86 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi @@ -0,0 +1,117 @@ +/* + * SolidRun CN9130 SOM + */ +#include "cn9130.dtsi" + +/ { + model = "SolidRun CN9130 SOM"; + compatible = "marvell,cn9130", "marvell,armada-ap807-quad", + "marvell,armada-ap807"; + + aliases { + i2c0 = &cp0_i2c0; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + v_1_8: regulator-1-8 { + compatible = "regulator-fixed"; + regulator-name = "v_1_8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* EMMC */ +&ap_sdhci0 { + status = "okay"; + bus-width = <8>; + vqmmc-supply = <&v_1_8>; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* For Assy=PHY_ETH */ +&cp0_eth2 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_eth2_pins>; + status = "okay"; + phy-mode = "rgmii-id"; + phy = <&cp0_eth2_phy>; +}; + +&cp0_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + clock-frequency = <100000>; + + /* M24C02-WMN6TP / ST24C02WP */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + pagesize = <8>; + }; +}; + +&cp0_mdio { + status = "okay"; + pinctrl-0 = <&cp0_mdio_pins>; + + /* For Assy=PHY_ETH */ + cp0_eth2_phy: ethernet-phy@0 { + marvell,reg-init = <3 16 0 0x0064>; + reg = <0>; + }; +}; + +&cp0_spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi1_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + + cp0_spi1_pins: cp0-spi-pins-1 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + + cp0_i2c0_pins: cp0-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + + cp0_mdio_pins: ge-mdio-pins { + marvell,pins = "mpp40", "mpp41"; + marvell,function = "ge"; + }; + + cp0_eth2_pins: cp0-ge-rgmii-pins-0 { + marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", + "mpp48", "mpp49", "mpp50", "mpp51", + "mpp52", "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + }; +}; |