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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-17 00:42:43 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-11-05 16:39:47 +0900
commit6c0dceaae604cff7b54c9a90409b28990645c103 (patch)
tree0c82df36c04cc7ea04d22ea814cf7814561c9e5d
parenta909d3e636995ba7c349e2ca5dbb528154d4ac30 (diff)
ARM: dts: uniphier: increase register region size of sysctrl node
The System Control node has 0x10000 byte of registers. The current reg size must be expanded to use the cpufreq driver because the registers controlling CPU frequency are located at offset 0x8000. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r--arch/arm/boot/dts/uniphier-common32.dtsi2
-rw-r--r--arch/arm/boot/dts/uniphier-sld3.dtsi2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
index 8c8a85176b64..d067f38fa21d 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -183,7 +183,7 @@
sysctrl@61840000 {
compatible = "socionext,uniphier-sysctrl",
"simple-mfd", "syscon";
- reg = <0x61840000 0x4000>;
+ reg = <0x61840000 0x10000>;
sys_clk: clock {
#clock-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi
index 5fa96c939b5c..35c18197d94f 100644
--- a/arch/arm/boot/dts/uniphier-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld3.dtsi
@@ -271,7 +271,7 @@
sysctrl@f1840000 {
compatible = "socionext,uniphier-sysctrl",
"simple-mfd", "syscon";
- reg = <0xf1840000 0x4000>;
+ reg = <0xf1840000 0x10000>;
sys_clk: clock {
compatible = "socionext,uniphier-sld3-clock";