diff options
author | Arnd Bergmann <arnd@arndb.de> | 2016-05-10 15:44:27 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2016-05-10 15:44:27 +0200 |
commit | 7430bc1942f1f340a149abfbe007900ece743903 (patch) | |
tree | 3d9859caa54d1a7636a4b8a1c339c411b995a522 | |
parent | e8f72bf9d45cfaaf550a85f177c7407ceae72645 (diff) | |
parent | 610175b7972afc78f0e4a622a17a32b1fccad4bf (diff) |
Merge tag 'v4.6-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Merge "ARM: mediatek: dts updates for v4.7" from Matthias Brugger:
- add pinctrl node for mt2701
- add mt2701 pmic wrapper binding
- add auxadc binding document
* tag 'v4.6-next-dts' of https://github.com/mbgg/linux-mediatek:
dt-bindings: MediaTek: Add binding document for the AUXADC
dt-bindings: ARM: Mediatek: add MT2701/7623 string to the PMIC wrapper doc
arm: dts: Add pinctrl/GPIO/EINT node for mt2701
-rw-r--r-- | Documentation/devicetree/bindings/soc/mediatek/auxadc.txt | 21 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt2701.dtsi | 19 |
3 files changed, 41 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt b/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt new file mode 100644 index 000000000000..bdb782918a72 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/auxadc.txt @@ -0,0 +1,21 @@ +MediaTek AUXADC +=============== + +The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found +in some Mediatek SoCs which among other things measures the temperatures +in the SoC. It can be used directly with register accesses, but it is also +used by thermal controller which reads the temperatures from the AUXADC +directly via its own bus interface. See +Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +for the Thermal Controller which holds a phandle to the AUXADC. + +Required properties: +- compatible: Must be "mediatek,mt8173-auxadc" +- reg: Address range of the AUXADC unit + +Example: + +auxadc: auxadc@11001000 { + compatible = "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; +}; diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index ddeb5b6a53c1..107700d00df4 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -18,6 +18,7 @@ IP Pairing Required properties in pwrap device node. - compatible: + "mediatek,mt2701-pwrap" for MT2701/7623 SoCs "mediatek,mt8135-pwrap" for MT8135 SoCs "mediatek,mt8173-pwrap" for MT8173 SoCs - interrupts: IRQ for pwrap in SOC diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 83437683aa60..18596a2c58a1 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton64.dtsi" +#include "mt2701-pinfunc.h" / { compatible = "mediatek,mt2701"; @@ -85,6 +86,24 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + pio: pinctrl@10005000 { + compatible = "mediatek,mt2701-pinctrl"; + reg = <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap = <&syscfg_pctl_a>; + pins-are-numbered; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + }; + + syscfg_pctl_a: syscfg@10005000 { + compatible = "mediatek,mt2701-pctl-a-syscfg", "syscon"; + reg = <0 0x10005000 0 0x1000>; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt2701-wdt", "mediatek,mt6589-wdt"; |