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authorLinus Walleij <linus.walleij@linaro.org>2013-10-18 09:45:07 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-10-18 13:25:21 +0200
commit84873cb77344b9af7c57586c9c144573ebcf0fd1 (patch)
treeeda9d043db61ae7a1ffd621d2af85cfbf6c3e0f0
parent741a6c4c59cfa1266bc75aca9f66bdc6e421b0d5 (diff)
ARM: ux500: fix clock for GPIO block 8
The clock assignment in the device tree for GPIO block 8 was incorrect, indicating this was managed by bit 1 on PRCC 6 while it was in fact bit 1 on PRCC 5. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2ef30c1c1997..55abf1292ddd 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -227,7 +227,7 @@
#gpio-cells = <2>;
gpio-bank = <8>;
- clocks = <&prcc_pclk 6 1>;
+ clocks = <&prcc_pclk 5 1>;
};
pinctrl {