diff options
author | Russell King <rmk+kernel@armlinux.org.uk> | 2016-11-29 10:07:57 +0000 |
---|---|---|
committer | Russell King <rmk+kernel@armlinux.org.uk> | 2017-02-20 10:56:00 +0000 |
commit | aaf588334d81b81327961ebdc99eeaeccfc9ed83 (patch) | |
tree | f53176e7b8d1c7ec5da3855132aac3de4708aebb | |
parent | aad107f9597c59519bfe149455c318c4981f1451 (diff) |
ARM: dts: armada388-clearfog: move sdhci pinctrl node to microsom
Move the SDHCI pinctrl node to the microsom file - the microsom can have
optional eMMC support which uses these same pinctrl settings, so it is
sensible to have these here.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-rw-r--r-- | arch/arm/boot/dts/armada-388-clearfog.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 7 |
2 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts index 3980d05f5ece..9bf399dd1786 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts @@ -257,12 +257,6 @@ marvell,pins = "mpp20"; marvell,function = "gpio"; }; - clearfog_sdhci_pins: clearfog-sdhci-pins { - marvell,pins = "mpp21", "mpp28", - "mpp37", "mpp38", - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; clearfog_spi1_cs_pins: spi1-cs-pins { marvell,pins = "mpp55"; marvell,function = "spi1"; @@ -300,7 +294,7 @@ bus-width = <4>; cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; no-1-8-v; - pinctrl-0 = <&clearfog_sdhci_pins + pinctrl-0 = <µsom_sdhci_pins &clearfog_sdhci_cd_pins>; pinctrl-names = "default"; status = "okay"; diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi index 8a84fe3e9c28..6608657b9994 100644 --- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi +++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi @@ -99,6 +99,13 @@ marvell,pins = "mpp45"; marvell,function = "ref"; }; + /* Optional eMMC */ + microsom_sdhci_pins: microsom-sdhci-pins { + marvell,pins = "mpp21", "mpp28", + "mpp37", "mpp38", + "mpp39", "mpp40"; + marvell,function = "sd0"; + }; }; rtc@a3800 { |