diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2016-11-29 10:13:48 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2017-01-05 22:57:32 +0000 |
| commit | 6b21d5f220f5aa56daa568f07d11ca29e9eb95ee (patch) | |
| tree | 3a9a58891e36f42c2abeb3945711e1cd81d2f598 | |
| parent | f6dd2956931629043da120c666a36dff209c1c96 (diff) | |
implement slot capabilities (SSPL)
| -rw-r--r-- | drivers/pci/host/pci-mvebu.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 215c4899d81e..a539e8c85b47 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -67,6 +67,12 @@ #define PCIE_STAT_BUS 0xff00 #define PCIE_STAT_DEV 0x1f0000 #define PCIE_STAT_LINK_DOWN BIT(0) +#define PCIE_SSPL 0x1a0c +#define PCIE_SSPL_MSGEN BIT(14) +#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8) +#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3) +#define PCIE_SSPL_SPLV(x) ((x) & 0xff) +#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff) #define PCIE_RC_RTSTA 0x1a14 #define PCIE_DEBUG_CTRL 0x1a60 #define PCIE_DEBUG_SOFT_RESET BIT(20) @@ -121,7 +127,6 @@ struct mvebu_sw_pci_bridge { u16 bridgectrl; /* PCI express capability */ - u32 pcie_sltcap; u16 pcie_devctl; u16 pcie_rtctl; }; @@ -642,8 +647,12 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port, break; case PCISWCAP_EXP_SLTCAP: - *value = bridge->pcie_sltcap; + { + u32 tmp = mvebu_readl(port, PCIE_SSPL); + *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 | + PCIE_SSPL_SPLV_VAL(tmp) << 7; break; + } case PCISWCAP_EXP_SLTCTL: *value = PCI_EXP_SLTSTA_PDS << 16; @@ -826,6 +835,15 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port, mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); break; + case PCISWCAP_EXP_SLTCAP: + { + u32 sspl = PCIE_SSPL_SPLV((value & PCI_EXP_SLTCAP_SPLV) >> 7) | + PCIE_SSPL_SPLS((value & PCI_EXP_SLTCAP_SPLS) >> 15) | + PCIE_SSPL_MSGEN; + mvebu_writel(port, sspl, PCIE_SSPL); + break; + } + case PCISWCAP_EXP_RTCTL: old = bridge->pcie_rtctl; bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE | |