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authorWill Deacon <will.deacon@arm.com>2011-03-04 12:38:54 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-09 21:40:18 +0000
commit5dab26af1bacad9a7189d904fbc8b4fe8e95dd81 (patch)
tree246c70038035ee4a0505f2b043ecb3c73018b01b
parentfcbdc5fe6ebe07d502c9b652cb63376bcc4227ac (diff)
ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9
On revisions of the Cortex-A9 prior to r2p0, the Store Buffer does not have any automatic draining mechanism and therefore a livelock may occur if an external agent continuously polls a memory location waiting to observe an update. This workaround defines cpu_relax() as smp_mb(), preventing correctly written polling loops from denying visibility of updates to memory. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/include/asm/processor.h2
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ec0f6589af05..d3f2de37a4b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1213,6 +1213,17 @@ config ARM_ERRATA_754322
the new ASID. This workaround places two dsb instructions in the mm
switching code so that no page table walks can cross the ASID switch.
+config ARM_ERRATA_754327
+ bool "ARM errata: no automatic Store Buffer drain"
+ depends on CPU_V7 && SMP
+ help
+ This option enables the workaround for the 754327 Cortex-A9 (prior to
+ r2p0) erratum. The Store Buffer does not have any automatic draining
+ mechanism and therefore a livelock may occur if an external agent
+ continuously polls a memory location waiting to observe an update.
+ This workaround defines cpu_relax() as smp_mb(), preventing correctly
+ written polling loops from denying visibility of updates to memory.
+
endmenu
source "arch/arm/common/Kconfig"
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 67357baaeeeb..7a1f03c10f1b 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -95,7 +95,7 @@ extern void release_thread(struct task_struct *);
unsigned long get_wchan(struct task_struct *p);
-#if __LINUX_ARM_ARCH__ == 6
+#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
#define cpu_relax() smp_mb()
#else
#define cpu_relax() barrier()