summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLaxman Dewangan <ldewangan@nvidia.com>2016-05-02 22:53:24 +0530
committerLinus Walleij <linus.walleij@linaro.org>2016-05-11 11:22:57 +0200
commitb22ef2a0979f2b91cfeeabb086e4d665183a93a1 (patch)
treedeae85375917f711d818c23bc9bc2cb6893ec38b
parent468c234f9ed759b059d7fe11a6cc4b903a594722 (diff)
pinctrl: tegra: Correctly check the supported configuration
The pincontrol registers of Tegra chips has multiple filed per registers. There is two type of registers mux and drive. All configurations belongs to one of these registers. If any configurations are supported then <config>_bit is set to bit position of these registers otherwise -1 to not support it. The member is defined as s32 <config>_bit:6; So if config is not supported ifor given SoC then it is set to -1 in soc pinmmux table. In common driver code, to find out that given config is supported or not, it is checked as: s8 bit = <config>_bit; if (bit > 31) { /* Not supported config */ } But in this case, bit is s8 and hence for non supporting it is -1. Correct the check as: if (bit < 0) { /* Not supported config */ } Fixes: e4c02dced975cb ("pinctrl: tegra: use signed bitfields for optional fields") Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 861baf29ef70..6e82b290cb4f 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -417,7 +417,7 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
return -ENOTSUPP;
}
- if (*reg < 0 || *bit > 31) {
+ if (*reg < 0 || *bit < 0) {
if (report_err) {
const char *prop = "unknown";
int i;