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authorRussell King <rmk+kernel@armlinux.org.uk>2019-11-08 15:28:22 +0000
committerRussell King <rmk+kernel@armlinux.org.uk>2020-01-27 10:33:07 +0000
commit1b02f84d5a80f6938f0227e8fe1b7b6513b9c893 (patch)
treec38565591f3eda5d82b83c8a1e00feaa9d2dc161
parent0a6fdb5d0f28af38314b97d1407e6ad062785210 (diff)
net: phylink: support Clause 45 PHYs on SFP+ modules
Some SFP+ modules have Clause 45 PHYs embedded on them, which need a little more handling in order to ensure that they are correctly setup, as they switch the PHY link mode according to the negotiated speed. With Clause 22 PHYs, we assumed that they would operate in SGMII mode, but this assumption is now false. Adapt phylink to support Clause 45 PHYs on SFP+ modules. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-rw-r--r--drivers/net/phy/phylink.c21
1 files changed, 16 insertions, 5 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 6dbc4c333eeb..c4daefad1e00 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -713,7 +713,8 @@ static void phylink_phy_change(struct phy_device *phydev, bool up,
phy_duplex_to_str(phydev->duplex));
}
-static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy)
+static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
+ phy_interface_t interface)
{
struct phylink_link_state config;
__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
@@ -731,7 +732,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy)
memset(&config, 0, sizeof(config));
linkmode_copy(supported, phy->supported);
linkmode_copy(config.advertising, phy->advertising);
- config.interface = pl->link_config.interface;
+ config.interface = interface;
ret = phylink_validate(pl, supported, &config);
if (ret)
@@ -747,6 +748,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy)
mutex_lock(&phy->lock);
mutex_lock(&pl->state_mutex);
pl->phydev = phy;
+ pl->phy_state.interface = interface;
linkmode_copy(pl->supported, supported);
linkmode_copy(pl->link_config.advertising, config.advertising);
@@ -809,7 +811,7 @@ int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
if (ret < 0)
return ret;
- ret = phylink_bringup_phy(pl, phy);
+ ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
if (ret)
phy_detach(phy);
@@ -862,7 +864,7 @@ int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
if (!phy_dev)
return -ENODEV;
- ret = phylink_bringup_phy(pl, phy_dev);
+ ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
if (ret)
phy_detach(phy_dev);
@@ -1811,13 +1813,22 @@ static void phylink_sfp_link_up(void *upstream)
static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
{
struct phylink *pl = upstream;
+ phy_interface_t interface = pl->link_config.interface;
int ret;
ret = phylink_attach_phy(pl, phy, pl->link_config.interface);
if (ret < 0)
return ret;
- ret = phylink_bringup_phy(pl, phy);
+ /* Clause 45 PHYs switch their Serdes lane between several different
+ * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
+ * speeds. We really need to know which interface modes the PHY and
+ * MAC supports to properly work out which linkmodes can be supported.
+ */
+ if (phy->is_c45)
+ interface = PHY_INTERFACE_MODE_NA;
+
+ ret = phylink_bringup_phy(pl, phy, interface);
if (ret)
phy_detach(phy);