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authorRussell King <rmk+kernel@armlinux.org.uk>2016-12-03 00:46:30 +0000
committerRussell King <rmk+kernel@armlinux.org.uk>2019-07-09 16:42:22 +0100
commitb7a63058138f16f97ec039ab73d5ffa600c7c14a (patch)
treef55435b900a816b8e4dd475904eb7172e8b02452
parente6751738fb669d2f8db8ba4f90a2a74f71fd3dc2 (diff)
arm64: hacks and debugging from initial mcbin bringup
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
-rw-r--r--arch/arm64/kernel/head.S127
1 files changed, 127 insertions, 0 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 2cdacd1c141b..28846ae9e302 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -44,6 +44,26 @@
#error TEXT_OFFSET must be less than 2MB
#endif
+ .macro putc_base_pa, base:req
+ mov \base, #0xf0000000
+ add \base, \base, #0x00512000
+ .endm
+ .macro putc_base_va, base:req
+ mov \base, #0xffffff8000000000
+ orr \base, \base, #0x30000000
+ add \base, \base, #0x00512000
+ .endm
+ .macro wait, base:req, val:req
+1: ldrb \val, [\base, #5 * 4]
+ tbz \val, #6, 1b
+ .endm
+ .macro putc, base:req, val:req, ch
+ .ifnb \ch
+ mov \val, \ch
+ .endif
+ strb \val, [\base, #0]
+ .endm
+
/*
* Kernel startup entry point.
* ---------------------------
@@ -104,6 +124,105 @@ pe_header:
* x19/x20 __primary_switch() callee preserved temp registers
*/
ENTRY(stext)
+#if 0
+ putc_base_pa x21
+ putc x21, w23, #'x'
+ wait x21, w23
+ putc x21, w23, #'0'
+ wait x21, w23
+ putc x21, w23, #':'
+ mov x19, x0
+ mov x20, #16
+1: wait x21, w23
+ lsr x23, x19, #60
+ and w23, w23, #15
+ cmp w23, #10
+ bcc 2f
+ add w23, w23, #7
+2: add w23, w23, #'0'
+ putc x21, w23
+ lsl x19, x19, #4
+ subs x20, x20, #1
+ bcs 1b
+ wait x21, w23
+ putc x21, w23, #'\r'
+ wait x21, w23
+ putc x21, w23, #'\n'
+ wait x21, w23
+
+ putc x21, w23, #'x'
+ wait x21, w23
+ putc x21, w23, #'1'
+ wait x21, w23
+ putc x21, w23, #':'
+ mov x19, x1
+ mov x20, #16
+1: wait x21, w23
+ lsr x23, x19, #60
+ and w23, w23, #15
+ cmp w23, #10
+ bcc 2f
+ add w23, w23, #7
+2: add w23, w23, #'0'
+ putc x21, w23
+ lsl x19, x19, #4
+ subs x20, x20, #1
+ bcs 1b
+ wait x21, w23
+ putc x21, w23, #'\r'
+ wait x21, w23
+ putc x21, w23, #'\n'
+ wait x21, w23
+
+ putc x21, w23, #'x'
+ wait x21, w23
+ putc x21, w23, #'2'
+ wait x21, w23
+ putc x21, w23, #':'
+ mov x19, x2
+ mov x20, #16
+1: wait x21, w23
+ lsr x23, x19, #60
+ and w23, w23, #15
+ cmp w23, #10
+ bcc 2f
+ add w23, w23, #7
+2: add w23, w23, #'0'
+ putc x21, w23
+ lsl x19, x19, #4
+ subs x20, x20, #1
+ bcs 1b
+ wait x21, w23
+ putc x21, w23, #'\r'
+ wait x21, w23
+ putc x21, w23, #'\n'
+ wait x21, w23
+
+ putc x21, w23, #'x'
+ wait x21, w23
+ putc x21, w23, #'3'
+ wait x21, w23
+ putc x21, w23, #':'
+ mov x19, x3
+ mov x20, #16
+1: wait x21, w23
+ lsr x23, x19, #60
+ and w23, w23, #15
+ cmp w23, #10
+ bcc 2f
+ add w23, w23, #7
+2: add w23, w23, #'0'
+ putc x21, w23
+ lsl x19, x19, #4
+ subs x20, x20, #1
+ bcs 1b
+ wait x21, w23
+ putc x21, w23, #'\r'
+ wait x21, w23
+ putc x21, w23, #'\n'
+ wait x21, w23
+#endif
+
bl preserve_boot_args
bl el2_setup // Drop to EL1, w0=cpu_boot_mode
adrp x23, __PHYS_OFFSET
@@ -389,6 +508,14 @@ __create_page_tables:
map_memory x0, x1, x5, x6, x7, x3, x4, x10, x11, x12, x13, x14
+#if 0
+ mov x7, (PMD_ATTRINDX(MT_DEVICE_nGnRnE) | SWAPPER_PMD_FLAGS)
+ mov x3, #0xf0000000
+ mov x4, #0x30000000
+ mov x6, #0x31000000
+ create_block_map x0, x7, x3, x4, x6
+#endif
+
/*
* Since the page tables have been populated with non-cacheable
* accesses (MMU disabled), invalidate the idmap and swapper page