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authorFelipe Balbi <balbi@ti.com>2014-09-15 16:15:07 -0500
committerTony Lindgren <tony@atomide.com>2014-09-16 14:45:00 -0700
commitb30791498a140d9460dfb9cb8edcb6fd1065363c (patch)
tree04e8f867d7e51679b2a9c1df91652668c248cf22
parent9836ee9f87dc669c8ce2b24ba986600a6977ca8b (diff)
irqchip: omap-intc: enable TURBO idle mode
When TURBO bit is set in the INTC_IDLE register, the input synchronizer clock will be autogated based on activity on the INTC. Because this idle mode increases the interrupt latency by 2 clock cycles, we're only enabling it during suspend. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--drivers/irqchip/irq-omap-intc.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index 7681b1329976..dfa2d9de5361 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -51,6 +51,9 @@
#define INTCPS_NR_ILR_REGS 128
#define INTCPS_NR_MIR_REGS 3
+#define INTC_IDLE_FUNCIDLE (1 << 0)
+#define INTC_IDLE_TURBO (1 << 1)
+
#define INTC_PROTECTION_ENABLE (1 << 0)
/*
@@ -134,12 +137,14 @@ void omap3_intc_prepare_idle(void)
* cf. errata ID i540 for 3430 (all revisions up to 3.1.x)
*/
intc_writel(INTC_SYSCONFIG, 0);
+ intc_writel(INTC_IDLE, INTC_IDLE_TURBO);
}
void omap3_intc_resume_idle(void)
{
/* Re-enable autoidle */
intc_writel(INTC_SYSCONFIG, 1);
+ intc_writel(INTC_IDLE, 0);
}
/* XXX: FIQ and additional INTC support (only MPU at the moment) */