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authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2021-11-22 13:03:32 +0000
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2022-06-18 12:12:05 +0100
commitc249e4418e6200917969ca6c77433fa2f4641a6d (patch)
tree1f9f0f110e3f7b4f08166f38c79e4c7e02df9092
parent73115492ca745f8c14d72f08312c371b30c3364f (diff)
net: dsa: mv88e6xxx: add infrastructure for phylink_pcs
Add infrastructure for phylink_pcs to the mv88e6xxx driver. This involves adding a mac_select_pcs() hook so we can pass the PCS to phylink at the appropriate time, and a PCS initialisation function. As the various chip implementations are converted to use phylink_pcs, they are no longer reliant on the legacy phylink behaviour. We detect this by the use of this infrastructure, or the lack of any serdes. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
-rw-r--r--drivers/net/dsa/mv88e6xxx/chip.c46
-rw-r--r--drivers/net/dsa/mv88e6xxx/chip.h6
2 files changed, 52 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 7447be21bdf1..5b342896c2c7 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -832,6 +832,37 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
if (mv88e6xxx_phy_is_internal(ds, port))
__set_bit(PHY_INTERFACE_MODE_GMII,
config->supported_interfaces);
+
+ /* If we have a .pcs_init, or don't have a .serdes_pcs_get_state,
+ * serdes_pcs_config, serdes_pcs_an_restart, or serdes_pcs_link_up,
+ * we are not legacy.
+ */
+ if (chip->info->ops->pcs_init ||
+ (!chip->info->ops->serdes_pcs_get_state &&
+ !chip->info->ops->serdes_pcs_config &&
+ !chip->info->ops->serdes_pcs_an_restart &&
+ !chip->info->ops->serdes_pcs_link_up))
+ config->legacy_pre_march2020 = false;
+}
+
+static struct phylink_pcs *__maybe_unused
+mv88e6xxx_pcs_select(struct mv88e6xxx_chip *chip, int port,
+ phy_interface_t interface)
+{
+ return chip->ports[port].pcs_private;
+}
+
+static struct phylink_pcs *mv88e6xxx_mac_select_pcs(struct dsa_switch *ds,
+ int port,
+ phy_interface_t interface)
+{
+ struct mv88e6xxx_chip *chip = ds->priv;
+ struct phylink_pcs *pcs = ERR_PTR(-EOPNOTSUPP);
+
+ if (chip->info->ops->pcs_select)
+ pcs = chip->info->ops->pcs_select(chip, port, interface);
+
+ return pcs;
}
static int mv88e6xxx_mac_prepare(struct dsa_switch *ds, int port,
@@ -3832,12 +3863,26 @@ out_resources:
static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port)
{
+ struct mv88e6xxx_chip *chip = ds->priv;
+ int err;
+
+ if (chip->info->ops->pcs_init) {
+ err = chip->info->ops->pcs_init(chip, port);
+ if (err)
+ return err;
+ }
+
return mv88e6xxx_setup_devlink_regions_port(ds, port);
}
static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port)
{
+ struct mv88e6xxx_chip *chip = ds->priv;
+
mv88e6xxx_teardown_devlink_regions_port(ds, port);
+
+ if (chip->info->ops->pcs_teardown)
+ chip->info->ops->pcs_teardown(chip, port);
}
/* prod_id for switch families which do not have a PHY model number */
@@ -6819,6 +6864,7 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
.port_setup = mv88e6xxx_port_setup,
.port_teardown = mv88e6xxx_port_teardown,
.phylink_get_caps = mv88e6xxx_get_caps,
+ .phylink_mac_select_pcs = mv88e6xxx_mac_select_pcs,
.phylink_mac_link_state = mv88e6xxx_serdes_pcs_get_state,
.phylink_mac_prepare = mv88e6xxx_mac_prepare,
.phylink_mac_config = mv88e6xxx_mac_config,
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index 5e03cfe50156..55e1baa614af 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -280,6 +280,7 @@ struct mv88e6xxx_port {
unsigned int serdes_irq;
char serdes_irq_name[64];
struct devlink_region *region;
+ void *pcs_private;
};
enum mv88e6xxx_region_id {
@@ -579,6 +580,11 @@ struct mv88e6xxx_ops {
/* SERDES lane mapping */
int (*serdes_get_lane)(struct mv88e6xxx_chip *chip, int port);
+ int (*pcs_init)(struct mv88e6xxx_chip *chip, int port);
+ void (*pcs_teardown)(struct mv88e6xxx_chip *chip, int port);
+ struct phylink_pcs *(*pcs_select)(struct mv88e6xxx_chip *chip, int port,
+ phy_interface_t mode);
+
int (*serdes_pcs_get_state)(struct mv88e6xxx_chip *chip, int port,
int lane, struct phylink_link_state *state);
int (*serdes_pcs_config)(struct mv88e6xxx_chip *chip, int port,