diff options
| author | Patil, Rachna <rachna@ti.com> | 2013-07-20 17:27:35 +0100 |
|---|---|---|
| committer | Samuel Ortiz <sameo@linux.intel.com> | 2013-07-31 02:04:34 +0200 |
| commit | efe3126afce32e3100af3029a80701d47e1b6999 (patch) | |
| tree | 7c3d2528a2bdb158fd6720637239c7c7716702cf | |
| parent | ebe38f80b290fe6d86404d0b21eae479d4aeb21f (diff) | |
MFD: ti_tscadc: ADC Clock check not required
ADC is ideally expected to work at a frequency of 3MHz.
The present code had a check, which returned error if the frequency
went below the threshold value. But since AM335x supports various
working frequencies, this check is not required.
Now the code just uses the internal ADC clock divider to set the ADC
frequency w.r.t the sys clock.
Signed-off-by: Patil, Rachna <rachna@ti.com>
Signed-off-by: Zubair Lutfullah <zubair.lutfullah@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| -rw-r--r-- | drivers/mfd/ti_am335x_tscadc.c | 6 | ||||
| -rw-r--r-- | include/linux/mfd/ti_am335x_tscadc.h | 1 |
2 files changed, 1 insertions, 6 deletions
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index b003a16ba227..e0852ecbc767 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -197,11 +197,7 @@ static int ti_tscadc_probe(struct platform_device *pdev) clock_rate = clk_get_rate(clk); clk_put(clk); clk_value = clock_rate / ADC_CLK; - if (clk_value < MAX_CLK_DIV) { - dev_err(&pdev->dev, "clock input less than min clock requirement\n"); - err = -EINVAL; - goto err_disable_clk; - } + /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ clk_value = clk_value - 1; tscadc_writel(tscadc, REG_CLKDIV, clk_value); diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 8d73fe29796a..71bb41c32a64 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -114,7 +114,6 @@ #define CNTRLREG_TSCENB BIT(7) #define ADC_CLK 3000000 -#define MAX_CLK_DIV 7 #define TOTAL_STEPS 16 #define TOTAL_CHANNELS 8 |