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authorArnd Bergmann <arnd@arndb.de>2013-04-09 23:08:19 +0200
committerArnd Bergmann <arnd@arndb.de>2013-04-09 23:08:19 +0200
commita93216c9212cb9ec36bb71776b706e7ed2d9d67c (patch)
tree08f0647c0da73604678ae60a09bd81469730d3bd
parent518fbd02a5482dbcc5ddbaec4124b53a5df75de8 (diff)
parent329afd264592f8d0e40fa063c089b35fba0014cc (diff)
Merge tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim <kgene.kim@samsung.com>: including various development for samsung for v3.10 * tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: replace cpumask by the corresponding macro ARM: EXYNOS: handle properly the return values ARM: EXYNOS: factor out the idle states ARM: SAMSUNG: check processor type before cache restoration in resume ARM: S3C64XX: Slow down mic detection rate for wm5102 ARM: S3C64XX: Clear DMA flags on channel request ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0 ARM: EXYNOS: Add support for rtc wakeup ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-exynos/cpuidle.c58
-rw-r--r--arch/arm/mach-exynos/include/mach/pm-core.h9
-rw-r--r--arch/arm/mach-s3c64xx/dma.c1
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c1
-rw-r--r--arch/arm/plat-samsung/s5p-sleep.S9
-rw-r--r--arch/arm/plat-samsung/setup-mipiphy.c3
7 files changed, 44 insertions, 39 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d63d399c7bae..789d4e66c950 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -463,6 +463,8 @@ void __init exynos4_init_irq(void)
* uses GIC instead of VIC.
*/
s5p_init_irq(NULL, 0);
+
+ gic_arch_extn.irq_set_wake = s3c_irq_wake;
}
void __init exynos5_init_irq(void)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index fcfe0251aa3e..e2689d1133b9 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -41,24 +41,25 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index);
-static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
- [0] = ARM_CPUIDLE_WFI_STATE,
- [1] = {
- .enter = exynos4_enter_lowpower,
- .exit_latency = 300,
- .target_residency = 100000,
- .flags = CPUIDLE_FLAG_TIME_VALID,
- .name = "C1",
- .desc = "ARM power down",
- },
-};
-
static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
static struct cpuidle_driver exynos4_idle_driver = {
.name = "exynos4_idle",
.owner = THIS_MODULE,
.en_core_tk_irqen = 1,
+ .states = {
+ [0] = ARM_CPUIDLE_WFI_STATE,
+ [1] = {
+ .enter = exynos4_enter_lowpower,
+ .exit_latency = 300,
+ .target_residency = 100000,
+ .flags = CPUIDLE_FLAG_TIME_VALID,
+ .name = "C1",
+ .desc = "ARM power down",
+ },
+ },
+ .state_count = 2,
+ .safe_state_index = 0,
};
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
@@ -193,37 +194,30 @@ static void __init exynos5_core_down_clk(void)
static int __init exynos4_init_cpuidle(void)
{
- int i, max_cpuidle_state, cpu_id;
+ int cpu_id, ret;
struct cpuidle_device *device;
- struct cpuidle_driver *drv = &exynos4_idle_driver;
if (soc_is_exynos5250())
exynos5_core_down_clk();
- /* Setup cpuidle driver */
- drv->state_count = (sizeof(exynos4_cpuidle_set) /
- sizeof(struct cpuidle_state));
- max_cpuidle_state = drv->state_count;
- for (i = 0; i < max_cpuidle_state; i++) {
- memcpy(&drv->states[i], &exynos4_cpuidle_set[i],
- sizeof(struct cpuidle_state));
+ ret = cpuidle_register_driver(&exynos4_idle_driver);
+ if (ret) {
+ printk(KERN_ERR "CPUidle failed to register driver\n");
+ return ret;
}
- drv->safe_state_index = 0;
- cpuidle_register_driver(&exynos4_idle_driver);
- for_each_cpu(cpu_id, cpu_online_mask) {
+ for_each_online_cpu(cpu_id) {
device = &per_cpu(exynos4_cpuidle_device, cpu_id);
device->cpu = cpu_id;
- if (cpu_id == 0)
- device->state_count = (sizeof(exynos4_cpuidle_set) /
- sizeof(struct cpuidle_state));
- else
- device->state_count = 1; /* Support IDLE only */
+ /* Support IDLE only */
+ if (cpu_id != 0)
+ device->state_count = 1;
- if (cpuidle_register_device(device)) {
- printk(KERN_ERR "CPUidle register device failed\n,");
- return -EIO;
+ ret = cpuidle_register_device(device);
+ if (ret) {
+ printk(KERN_ERR "CPUidle register device failed\n");
+ return ret;
}
}
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h
index a67ecfaf1216..7dbbfec13ea5 100644
--- a/arch/arm/mach-exynos/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos/include/mach/pm-core.h
@@ -27,13 +27,8 @@ static inline void s3c_pm_debug_init_uart(void)
static inline void s3c_pm_arch_prepare_irqs(void)
{
- unsigned int tmp;
- tmp = __raw_readl(S5P_WAKEUP_MASK);
- tmp &= ~(1 << 31);
- __raw_writel(tmp, S5P_WAKEUP_MASK);
-
- __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);
- __raw_writel(s3c_irqwake_eintmask & 0xFFFFFFFE, S5P_EINT_WAKEUP_MASK);
+ __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);
+ __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
}
static inline void s3c_pm_arch_stop_clocks(void)
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 6af1aa1ef213..759846c28d12 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -509,6 +509,7 @@ int s3c2410_dma_request(enum dma_ch channel,
chan->client = client;
chan->in_use = 1;
chan->peripheral = channel;
+ chan->flags = 0;
local_irq_restore(flags);
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index bf3d1c09b085..a946b759fabd 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -210,6 +210,7 @@ static struct arizona_pdata wm5102_reva_pdata = {
.gpio_base = CODEC_GPIO_BASE,
.irq_active_high = true,
.micd_pol_gpio = CODEC_GPIO_BASE + 4,
+ .micd_rate = 6,
.gpio_defaults = {
[2] = 0x10000, /* AIF3TXLRCLK */
[3] = 0x4, /* OPCLK */
diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S
index bdf6dadf8790..a030e7301da8 100644
--- a/arch/arm/plat-samsung/s5p-sleep.S
+++ b/arch/arm/plat-samsung/s5p-sleep.S
@@ -25,6 +25,9 @@
#include <asm/asm-offsets.h>
#include <asm/hardware/cache-l2x0.h>
+#define CPU_MASK 0xff0ffff0
+#define CPU_CORTEX_A9 0x410fc090
+
/*
* The following code is located into the .data section. This is to
* allow l2x0_regs_phys to be accessed with a relative load while we
@@ -51,6 +54,12 @@
ENTRY(s3c_cpu_resume)
#ifdef CONFIG_CACHE_L2X0
+ mrc p15, 0, r0, c0, c0, 0
+ ldr r1, =CPU_MASK
+ and r0, r0, r1
+ ldr r1, =CPU_CORTEX_A9
+ cmp r0, r1
+ bne resume_l2on
adr r0, l2x0_regs_phys
ldr r0, [r0]
ldr r1, [r0, #L2X0_R_PHY_BASE]
diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c
index 147459327601..66df315990a7 100644
--- a/arch/arm/plat-samsung/setup-mipiphy.c
+++ b/arch/arm/plat-samsung/setup-mipiphy.c
@@ -8,6 +8,7 @@
* published by the Free Software Foundation.
*/
+#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
@@ -50,8 +51,10 @@ int s5p_csis_phy_enable(int id, bool on)
{
return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
}
+EXPORT_SYMBOL(s5p_csis_phy_enable);
int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
{
return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
}
+EXPORT_SYMBOL(s5p_dsim_phy_enable);