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| author | Stephen Boyd <sboyd@kernel.org> | 2024-02-28 13:56:30 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-02-28 13:56:30 -0800 |
| commit | 3e76237ee7cfb6f74e9a82d45a85a90e7ee64ae5 (patch) | |
| tree | 44b8c8eab092260d7de219cfef62d17d82d2a545 /CREDITS | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| parent | 1361d75503fccc0e6b3ecbcd5bb53bbdfdc52f0a (diff) | |
Merge tag 'v6.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
- New pll-rate for rk3568
- i2s rate improvements for rk3399
- rk3588 syscon clock fixes and removal of overall clock-number from
the rk3588 binding header
- a prerequisite for later improvements to the rk3588 linked clocks
* tag 'v6.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent
clk: rockchip: rk3588: use linked clock ID for GATE_LINK
clk: rockchip: rk3588: fix indent
clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
clk: rockchip: rk3588: fix CLK_NR_CLKS usage
clk: rockchip: rk3568: Add PLL rate for 128MHz
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions