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| author | Joerg Roedel <jroedel@suse.de> | 2020-07-22 15:30:36 +0200 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-07-22 15:30:36 +0200 |
| commit | ee79e5fbc19c3b3910f80d80adb19fa49f908a3b (patch) | |
| tree | e496fdc6d7d3fdadd6ba30bd7cff5b4258725e44 /Documentation/arm64/silicon-errata.rst | |
| parent | 9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68 (diff) | |
| parent | aa7ec73297df57a86308fee78d2bf86e22ea0bae (diff) | |
Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
Arm SMMU updates for 5.9
- Support for SMMU-500 implementation in Marvell Armada-AP806 SoC
- Support for SMMU-500 implementation in NVIDIA Tegra194 SoC
- DT compatible string updates
- Remove unused IOMMU_SYS_CACHE_ONLY flag
Diffstat (limited to 'Documentation/arm64/silicon-errata.rst')
| -rw-r--r-- | Documentation/arm64/silicon-errata.rst | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index 936cf2a59ca4..157214d3abe1 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -125,6 +125,9 @@ stable kernels. | Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 | +----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ +| Marvell | ARM-MMU-500 | #582743 | N/A | ++----------------+-----------------+-----------------+-----------------------------+ ++----------------+-----------------+-----------------+-----------------------------+ | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | +----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ |