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authorMark Brown <broonie@kernel.org>2022-10-17 16:25:19 +0100
committerWill Deacon <will@kernel.org>2022-11-09 17:54:53 +0000
commitd12aada8dfb030f7df8ec0bb0ce4bb01a2ab3944 (patch)
treefff23b11b546fb5e262e5144a8cfd0ae51e2b053 /Documentation/arm64
parent989d37fc3d976f6bfa3f1da484f8f22c57c21c0c (diff)
arm64/hwcap: Add support for SVE 2.1
FEAT_SVE2p1 introduces a number of new SVE instructions. Since there is no new architectural state added kernel support is simply a new hwcap which lets userspace know that the feature is supported. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20221017152520.1039165-6-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/arm64')
-rw-r--r--Documentation/arm64/elf_hwcaps.rst3
-rw-r--r--Documentation/arm64/sve.rst1
2 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst
index a82b2cdff680..6fed84f935df 100644
--- a/Documentation/arm64/elf_hwcaps.rst
+++ b/Documentation/arm64/elf_hwcaps.rst
@@ -281,6 +281,9 @@ HWCAP2_CSSC
HWCAP2_RPRFM
Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.
+HWCAP2_SVE2P1
+ Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.
+
4. Unused AT_HWCAP bits
-----------------------
diff --git a/Documentation/arm64/sve.rst b/Documentation/arm64/sve.rst
index f338ee2df46d..c7a356bf4e8f 100644
--- a/Documentation/arm64/sve.rst
+++ b/Documentation/arm64/sve.rst
@@ -52,6 +52,7 @@ model features for SVE is included in Appendix A.
HWCAP2_SVEBITPERM
HWCAP2_SVESHA3
HWCAP2_SVESM4
+ HWCAP2_SVE2P1
This list may be extended over time as the SVE architecture evolves.