Merge branch 'clk-mediatek' into clk-next

* clk-mediatek:
  clk: mediatek: add clock support for MT7622 SoC
  clk: mediatek: add clocks dt-bindings required header for MT7622 SoC
  clk: mediatek: add the option for determining PLL source clock
  dt-bindings: clock: mediatek: document clk bindings for MediaTek MT7622 SoC
  clk: mediatek: mark mtk_infrasys_init_early __init
  clk: mediatek: Add MT2712 clock support
  clk: mediatek: Add dt-bindings for MT2712 clocks
  dt-bindings: ARM: Mediatek: Document bindings for MT2712

1 files changed, 22 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ssusbsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ssusbsys.txt
new file mode 100644
index 000000000000..00760019da00
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ssusbsys.txt
@@ -0,0 +1,22 @@
+MediaTek SSUSBSYS controller
+============================
+
+The MediaTek SSUSBSYS controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+	- "mediatek,mt7622-ssusbsys", "syscon"
+- #clock-cells: Must be 1
+
+The SSUSBSYS controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+ssusbsys: ssusbsys@1a000000 {
+	compatible = "mediatek,mt7622-ssusbsys", "syscon";
+	reg = <0 0x1a000000 0 0x1000>;
+	#clock-cells = <1>;
+};