diff options
author | Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> | 2019-10-19 17:07:12 +0530 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2019-10-20 19:15:23 -0700 |
commit | d49f341e15af95a2a19850ee74d245270fa0cf38 (patch) | |
tree | 950e073a0df90483fe52dc1db540f5b56312cbc8 /Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt | |
parent | 669f78802b015f4f038a33f653f4fd1474539764 (diff) |
dt-bindings: msm: Convert LLCC bindings to YAML
Convert LLCC bindings to DT schema format using json-schema.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt deleted file mode 100644 index eaee06b2d8f2..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt +++ /dev/null @@ -1,41 +0,0 @@ -== Introduction== - -LLCC (Last Level Cache Controller) provides last level of cache memory in SOC, -that can be shared by multiple clients. Clients here are different cores in the -SOC, the idea is to minimize the local caches at the clients and migrate to -common pool of memory. Cache memory is divided into partitions called slices -which are assigned to clients. Clients can query the slice details, activate -and deactivate them. - -Properties: -- compatible: - Usage: required - Value type: <string> - Definition: must be "qcom,sdm845-llcc" - -- reg: - Usage: required - Value Type: <prop-encoded-array> - Definition: The first element specifies the llcc base start address and - the size of the register region. The second element specifies - the llcc broadcast base address and size of the register region. - -- reg-names: - Usage: required - Value Type: <stringlist> - Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base". - -- interrupts: - Usage: required - Definition: The interrupt is associated with the llcc edac device. - It's used for llcc cache single and double bit error detection - and reporting. - -Example: - - cache-controller@1100000 { - compatible = "qcom,sdm845-llcc"; - reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; - reg-names = "llcc_base", "llcc_broadcast_base"; - interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; - }; |