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| author | Rob Herring <robh@kernel.org> | 2020-05-12 15:45:43 -0500 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2020-05-14 14:43:27 -0500 |
| commit | fba5618451d2b3af5e55f8af5ce9c5d3677ad9c4 (patch) | |
| tree | eb7b2e3f31c660bb1a332028319639a80a4e062b /Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml | |
| parent | 1195b303a661f1dcfc5f97b6504d7d22a46289bc (diff) | |
dt-bindings: Fix incorrect 'reg' property sizes
The examples template is a 'simple-bus' with a size of 1 cell for
had between 2 and 4 cells which really only errors on I2C or SPI type
devices with a single cell.
The easiest fix in most cases is to change the 'reg' property to for 1 cell
address and size. In some cases with child devices having 2 cells, that
doesn't make sense so a bus node is needed.
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml index f17bb353f65e..81534d04094b 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml @@ -323,7 +323,7 @@ examples: tegra_pmc: pmc@7000e400 { compatible = "nvidia,tegra210-pmc"; - reg = <0x0 0x7000e400 0x0 0x400>; + reg = <0x7000e400 0x400>; clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; #clock-cells = <1>; |