diff options
| author | Padmavathi Venna <padma.v@samsung.com> | 2015-01-13 16:57:41 +0530 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-01-15 15:11:40 +0100 |
| commit | ee74b56ab2f72c088fc5a8ba3797ef6a452d692a (patch) | |
| tree | 684418362c9eb12c633ec4eeb645ed452e67482b /Documentation/devicetree/bindings/clock/exynos7-clock.txt | |
| parent | 9cc2a0c95ff3f815deeba1ccd0d11b1d3bc46551 (diff) | |
clk: samsung: exynos7: add clocks for SPI block
Add clock support for 5 SPI channels.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/exynos7-clock.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/exynos7-clock.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt b/Documentation/devicetree/bindings/clock/exynos7-clock.txt index d0e048c08817..9282f71830b4 100644 --- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt @@ -77,6 +77,11 @@ Input clocks for peric1 clock controller: - sclk_uart1 - sclk_uart2 - sclk_uart3 + - sclk_spi0 + - sclk_spi1 + - sclk_spi2 + - sclk_spi3 + - sclk_spi4 Input clocks for peris clock controller: - fin_pll |