diff options
| author | Rob Herring <robh@kernel.org> | 2020-04-15 19:55:48 -0500 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2020-04-16 16:59:22 -0500 |
| commit | 9f60a65bc5e6cd882120d8477cc7bec065887e3d (patch) | |
| tree | 02f24f2e2f50b43c9601b4c9c633e447378c10b4 /Documentation/devicetree/bindings/clock/fsl,plldig.yaml | |
| parent | fbfb9a60d5d0d6744c324c2b0640144c329a1d18 (diff) | |
dt-bindings: Clean-up schema indentation formatting
Fix various inconsistencies in schema indentation. Most of these are
list indentation which should be 2 spaces more than the start of the
enclosing keyword. This doesn't matter functionally, but affects running
scripts which do transforms on the schema files.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/fsl,plldig.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/fsl,plldig.yaml | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.yaml b/Documentation/devicetree/bindings/clock/fsl,plldig.yaml index a203d5d498db..8141f22410dd 100644 --- a/Documentation/devicetree/bindings/clock/fsl,plldig.yaml +++ b/Documentation/devicetree/bindings/clock/fsl,plldig.yaml @@ -28,15 +28,14 @@ properties: const: 0 fsl,vco-hz: - description: Optional for VCO frequency of the PLL in Hertz. - The VCO frequency of this PLL cannot be changed during runtime - only at startup. Therefore, the output frequencies are very - limited and might not even closely match the requested frequency. - To work around this restriction the user may specify its own - desired VCO frequency for the PLL. - minimum: 650000000 - maximum: 1300000000 - default: 1188000000 + description: Optional for VCO frequency of the PLL in Hertz. The VCO frequency + of this PLL cannot be changed during runtime only at startup. Therefore, + the output frequencies are very limited and might not even closely match + the requested frequency. To work around this restriction the user may specify + its own desired VCO frequency for the PLL. + minimum: 650000000 + maximum: 1300000000 + default: 1188000000 required: - compatible |