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authorRobert Marko <robimarko@gmail.com>2023-10-13 18:39:33 +0200
committerBjorn Andersson <andersson@kernel.org>2023-12-02 17:28:02 -0800
commitafc4f14be33c50f066392f1e9671473419ba7ded (patch)
treeccd1f0c6162e4d11ea4f2130448f2878dd101d2b /Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
parentbe69109e93c78cb3b9c191a21fc2b54291a711da (diff)
dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks
QMP PCI PHY PIPE clocks are inputs for the GCC clock controller. In order to describe this in DTS, allow passing them as the inputs to GCC. This has a benefit that it avoids doing a global matching by name. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231013164025.3541606-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml')
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
index 52e7831a8d6d..2d44ddc45aab 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
@@ -27,11 +27,15 @@ properties:
items:
- description: board XO clock
- description: sleep clock
+ - description: Gen3 QMP PCIe PHY PIPE clock
+ - description: Gen2 QMP PCIe PHY PIPE clock
clock-names:
items:
- const: xo
- const: sleep_clk
+ - const: pcie0_pipe
+ - const: pcie1_pipe
required:
- compatible