diff options
author | Bjorn Andersson <andersson@kernel.org> | 2024-11-05 16:33:17 -0800 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2024-11-05 16:33:17 -0800 |
commit | 153986098c6639b3b07b3e49fc33af3109d18594 (patch) | |
tree | 2d1d8f79a65ce134c4050dc666fd8b05e399e2b1 /Documentation/devicetree/bindings/clock | |
parent | 30eb0e76d7b4b7dd1e6e8ace010ac24391dd9263 (diff) | |
parent | 03e525c66de2535dc1afd26be004621c7c5a253e (diff) |
Merge branch '20241028060506.246606-3-quic_srichara@quicinc.com' into clk-for-6.13
Merge IPQ5424 global clock controller binding through topic branch to
make the constants available for both clock and DeviceTree branches.
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 41 |
1 files changed, 34 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml index 9193de681de2..1230183fc0a9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml @@ -4,31 +4,35 @@ $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Global Clock & Reset Controller on IPQ5332 +title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424 maintainers: - Bjorn Andersson <andersson@kernel.org> description: | Qualcomm global clock control module provides the clocks, resets and power - domains on IPQ5332. + domains on IPQ5332 and IPQ5424. - See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h - -allOf: - - $ref: qcom,gcc.yaml# + See also: + include/dt-bindings/clock/qcom,gcc-ipq5332.h + include/dt-bindings/clock/qcom,gcc-ipq5424.h properties: compatible: - const: qcom,ipq5332-gcc + enum: + - qcom,ipq5332-gcc + - qcom,ipq5424-gcc clocks: + minItems: 5 items: - description: Board XO clock source - description: Sleep clock source - description: PCIE 2lane PHY pipe clock source - description: PCIE 2lane x1 PHY pipe clock source (For second lane) - description: USB PCIE wrapper pipe clock source + - description: PCIE 2-lane PHY2 pipe clock source + - description: PCIE 2-lane PHY3 pipe clock source '#power-domain-cells': false '#interconnect-cells': @@ -38,6 +42,29 @@ required: - compatible - clocks +allOf: + - $ref: qcom,gcc.yaml# + - if: + properties: + compatible: + contains: + const: qcom,ipq5332-gcc + then: + properties: + clocks: + maxItems: 5 + + - if: + properties: + compatible: + contains: + const: qcom,ipq5424-gcc + then: + properties: + clocks: + minItems: 7 + maxItems: 7 + unevaluatedProperties: false examples: |