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authorStephen Boyd <sboyd@codeaurora.org>2016-11-14 14:25:11 -0800
committerStephen Boyd <sboyd@codeaurora.org>2016-11-14 14:25:11 -0800
commitc60df0a42b3a85c98b67193f2078d2d7e738671a (patch)
tree1eb7971d89a989ae7507c0ad0d5f9d9bfc965313 /Documentation/devicetree/bindings/clock
parent81ab3279c5e1db8e61536646f1150cf66d8d5bad (diff)
parentc80dfd9bf54e178207b7bd124b0dd5e2453b87fe (diff)
Merge branch 'clk-hisi' into clk-next
* clk-hisi: clk: hisilicon: add CRG driver for Hi3516CV300 SoC clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/hisi-crg.txt (renamed from Documentation/devicetree/bindings/clock/hi3519-crg.txt)12
1 files changed, 8 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/clock/hi3519-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt
index acd1f235d548..cc60b3d423f3 100644
--- a/Documentation/devicetree/bindings/clock/hi3519-crg.txt
+++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt
@@ -1,7 +1,7 @@
-* Hisilicon Hi3519 Clock and Reset Generator(CRG)
+* HiSilicon Clock and Reset Generator(CRG)
-The Hi3519 CRG module provides clock and reset signals to various
-controllers within the SoC.
+The CRG module provides clock and reset signals to various
+modules within the SoC.
This binding uses the following bindings:
Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -10,7 +10,11 @@ This binding uses the following bindings:
Required Properties:
- compatible: should be one of the following.
- - "hisilicon,hi3519-crg" - controller compatible with Hi3519 SoC.
+ - "hisilicon,hi3516cv300-crg"
+ - "hisilicon,hi3516cv300-sysctrl"
+ - "hisilicon,hi3519-crg"
+ - "hisilicon,hi3798cv200-crg"
+ - "hisilicon,hi3798cv200-sysctrl"
- reg: physical base address of the controller and length of memory mapped
region.