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authorM'boumba Cedric Madianga <cedric.madianga@gmail.com>2016-12-13 14:40:45 +0100
committerVinod Koul <vinod.koul@intel.com>2017-01-03 09:23:17 +0530
commit16545502d70641af0fc4d2cc0b2789cf27d9ca9d (patch)
treec352695b5c6115c988ac0d39fb11435b67e1ec53 /Documentation/devicetree/bindings/dma
parentddf9bd4089b549ff7be3f4d0dbf19d4b9267d679 (diff)
dt-bindings: stm32-dma: Fix typo regarding DMA client binding
Only four cells are required for dma client binding not five. Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Reviewed-by: Ludovic BARRE <ludovic.barre@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
-rw-r--r--Documentation/devicetree/bindings/dma/stm32-dma.txt5
1 files changed, 2 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/dma/stm32-dma.txt b/Documentation/devicetree/bindings/dma/stm32-dma.txt
index 70cd13f1588a..4408af693d0c 100644
--- a/Documentation/devicetree/bindings/dma/stm32-dma.txt
+++ b/Documentation/devicetree/bindings/dma/stm32-dma.txt
@@ -40,8 +40,7 @@ Example:
DMA clients connected to the STM32 DMA controller must use the format
described in the dma.txt file, using a five-cell specifier for each
-channel: a phandle plus four integer cells.
-The four cells in order are:
+channel: a phandle to the DMA controller plus the following four integer cells:
1. The channel id
2. The request line number
@@ -61,7 +60,7 @@ The four cells in order are:
0x1: medium
0x2: high
0x3: very high
-5. A 32bit mask specifying the DMA FIFO threshold configuration which are device
+4. A 32bit mask specifying the DMA FIFO threshold configuration which are device
dependent:
-bit 0-1: Fifo threshold
0x0: 1/4 full FIFO