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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-07-03 11:53:38 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2019-07-05 20:59:11 +0200 |
| commit | 0038617132dea5c0516b6208a6d005ec9293ab94 (patch) | |
| tree | a271bc7994a18774ba9c2871f9f4694205ab6337 /Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml | |
| parent | 166f28c3eed269190d310ec611476b78101c309b (diff) | |
dt-bindings: i2c: sun6i-p2wi: Fix the binding example
Even though the binding claims that the frequency can go up to 6MHz, the
common i2c binding sets a limit at 3MHz, which then triggers a warning.
Since the only SoC that uses that bus uses a frequency of 100kHz, and that
this bus hasn't been found in an SoC for something like 5 years, let's just
fix the example to have a frequency within the acceptable range for i2c.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml index 1804abe24f14..f9d526b7da01 100644 --- a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml +++ b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml @@ -51,7 +51,7 @@ examples: reg = <0x01f03400 0x400>; interrupts = <0 39 4>; clocks = <&apb0_gates 3>; - clock-frequency = <6000000>; + clock-frequency = <100000>; resets = <&apb0_rst 3>; #address-cells = <1>; #size-cells = <0>; |