summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/mfd/stmpe.txt
diff options
context:
space:
mode:
authorPatrice Chotard <patrice.chotard@st.com>2016-08-10 09:39:12 +0200
committerLee Jones <lee.jones@linaro.org>2016-08-10 09:24:49 +0100
commit43db289d00c66a2d21da50001510725f598bb6e7 (patch)
tree0c0397cfe223617091f867e2a2f1dc778fc70671 /Documentation/devicetree/bindings/mfd/stmpe.txt
parent897ac6674c64ca94df5b70ea5c6815a296e1d32a (diff)
gpio: stmpe: Rework registers access
This update allows to use registers map as following : regs[reg_index + offset] instead of regs[reg_index] + offset This makes code clearer and will facilitate the addition of STMPE1600 on which LSB and MSB registers are respectively located at addr and addr + 1. Despite for all others STMPE variant, LSB and MSB registers are respectively located in reverse order at addr + 1 and addr. For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH) register addresses (STMPE1801/STMPE24xx). For variant which have 2 registers's bank, we use LSB and CSB indexes only. In this case the CSB index contains the MSB regs address (STMPE 1601). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mfd/stmpe.txt')
0 files changed, 0 insertions, 0 deletions