diff options
author | Rob Herring <robh@kernel.org> | 2021-05-26 13:48:34 -0500 |
---|---|---|
committer | Rob Herring <robh@kernel.org> | 2021-06-01 18:20:05 -0500 |
commit | 9f3849be6f2f4ae368e61321f135c2734ab6dd8a (patch) | |
tree | b88e41c69f057d0d31cadba2522fa0e0b14dcc4a /Documentation/devicetree/bindings/mfd | |
parent | 70c1fc34f3c67ee8abc363a25803f47bfcec889f (diff) |
dt-bindings: mfd: ti,j721e-system-controller: Fix mux node errors
The ti,j721e-system-controller binding does not follow the standard mux
controller node name 'mux-controller' and the example is incomplete. Fix
these to avoid schema errors before the mux controller binding is
converted to schema.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210526184839.2937899-2-robh@kernel.org
Diffstat (limited to 'Documentation/devicetree/bindings/mfd')
-rw-r--r-- | Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index 19fcf59fd2fe..272832e9f8f2 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -43,12 +43,10 @@ properties: patternProperties: # Optional children - "^serdes-ln-ctrl@[0-9a-f]+$": + "^mux-controller@[0-9a-f]+$": type: object - description: | - This is the SERDES lane control mux. It should follow the bindings - specified in - Documentation/devicetree/bindings/mux/reg-mux.txt + description: + This is the SERDES lane control mux. required: - compatible @@ -68,9 +66,18 @@ examples: #size-cells = <1>; ranges; - serdes_ln_ctrl: serdes-ln-ctrl@4080 { + serdes_ln_ctrl: mux-controller@4080 { compatible = "mmio-mux"; reg = <0x00004080 0x50>; + + #mux-control-cells = <1>; + mux-reg-masks = + <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ + <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ + <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>; + /* SERDES4 lane0/1/2/3 select */ }; }; ... |