diff options
| author | Andy Chiu <andy.chiu@sifive.com> | 2022-04-05 17:19:28 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-04-06 13:54:51 +0100 |
| commit | dc48f04fd6562de6019e9fc7ed9ed539d632babb (patch) | |
| tree | dea8cfe08cb3227353a019b591f24ab4009f00e0 /Documentation/devicetree/bindings/net/ethernet-controller.yaml | |
| parent | ab3a5d4c6081dbcfd90d19cc9849af89c6985d0f (diff) | |
dt-bindings: net: add pcs-handle attribute
Document the new pcs-handle attribute to support connecting to an
external PHY. For Xilinx's AXI Ethernet, this is used when the core
operates in SGMII or 1000Base-X modes and links through the internal
PCS/PMA PHY.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/net/ethernet-controller.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/net/ethernet-controller.yaml | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 817794e56227..4f15463611f8 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -106,6 +106,12 @@ properties: phy-mode: $ref: "#/properties/phy-connection-type" + pcs-handle: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Specifies a reference to a node representing a PCS PHY device on a MDIO + bus to link with an external PHY (phy-handle) if exists. + phy-handle: $ref: /schemas/types.yaml#/definitions/phandle description: |