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authorAlexander Aring <alex.aring@gmail.com>2015-02-27 09:58:26 +0100
committerMarcel Holtmann <marcel@holtmann.org>2015-02-27 18:42:44 +0100
commitccdaeb2b176f7db491a6f8e8b1c51f9393525f7d (patch)
tree5c7b8e5af1c70b0008fe37257acdee8e3122db81 /Documentation/devicetree/bindings/net/ieee802154
parentaaa1c4d226e4cd730075d3dac99a6d599a0190c7 (diff)
at86rf230: add support for external xtal trim
This patch adds support for setting the xtal trim register. Some at86rf2xx transceiver boards needs fine tuning the xtal capacitor. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Diffstat (limited to 'Documentation/devicetree/bindings/net/ieee802154')
-rw-r--r--Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt b/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt
index d3bbdded4cbe..1ae5100fea14 100644
--- a/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt
+++ b/Documentation/devicetree/bindings/net/ieee802154/at86rf230.txt
@@ -11,6 +11,8 @@ Required properties:
Optional properties:
- reset-gpio: GPIO spec for the rstn pin
- sleep-gpio: GPIO spec for the slp_tr pin
+ - xtal-trim: u8 value for fine tuning the internal capacitance
+ arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF
Example:
@@ -20,4 +22,5 @@ Example:
reg = <0>;
interrupts = <19 1>;
interrupt-parent = <&gpio3>;
+ xtal-trim = /bits/ 8 <0x06>;
};