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authorAnsuel Smith <ansuelsmth@gmail.com>2021-10-14 00:39:09 +0200
committerDavid S. Miller <davem@davemloft.net>2021-10-15 11:06:37 +0100
commit731d613338ec6de482053ffa3f71be2325b0f8eb (patch)
treeef7aa3948293511baaf304a5a1aac3feca150ca1 /Documentation/devicetree/bindings/net
parent6c43809bf1bee76c434e365a26546a92a5fbec14 (diff)
dt-bindings: net: dsa: qca8k: Document support for CPU port 6
The switch now support CPU port to be set 6 instead of be hardcoded to 0. Document support for it and describe logic selection. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/net')
-rw-r--r--Documentation/devicetree/bindings/net/dsa/qca8k.txt6
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
index cc214e655442..aeb206556f54 100644
--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
@@ -29,7 +29,11 @@ the mdio MASTER is used as communication.
Don't use mixed external and internal mdio-bus configurations, as this is
not supported by the hardware.
-The CPU port of this switch is always port 0.
+This switch support 2 CPU port. Normally and advised configuration is with
+CPU port set to port 0. It is also possible to set the CPU port to port 6
+if the device requires it. The driver will configure the switch to the defined
+port. With both CPU port declared the first CPU port is selected as primary
+and the secondary CPU ignored.
A CPU port node has the following optional node: