diff options
| author | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2021-07-18 13:40:50 +0200 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2021-07-19 15:55:34 -0600 |
| commit | 320e10986ef7eda166891493d1f6ff1564dd6275 (patch) | |
| tree | dd5f5908fc2c090b188af2f5f4941c86a5b7920c /Documentation/devicetree/bindings/pci/layerscape-pci.txt | |
| parent | 0f8b97d8f6021c525bc5fa7e4927401a39086c9f (diff) | |
dt-bindings: PCI: update references to Designware schema
Now that its contents were converted to a DT schema, replace
the references for the old file on existing properties.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/dfff4d94631546c53450d1baeddc694dd26b5c36.1626608375.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/layerscape-pci.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 6d898dd4a8e2..f36efa73a470 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -1,7 +1,7 @@ Freescale Layerscape PCIe controller This PCIe host controller is based on the Synopsys DesignWare PCIe IP -and thus inherits all the common properties defined in designware-pcie.txt. +and thus inherits all the common properties defined in snps,dw-pcie.yaml. This controller derives its clocks from the Reset Configuration Word (RCW) which is used to describe the PLL settings at the time of chip-reset. |