Merge tag 'phy-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "New hw support:
   - Rcar usb2 support for RZ/G3S SoC
   - Nuvoton MA35 SoC USB 2.0 PHY driver

  Removed:
   - obsolete qcom,usb-8x16-phy bindings

  Updates:
   - 4 lane PCIe support for Qualcomm X1E80100
   - Constify structure in subsystem update
   - Subsystem simplification with scoped for each OF child loop update
   - Yaml conversion for Qualcomm sata phy, Hiilicon hi3798cv200-combphy
     bindings"

* tag 'phy-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (40 commits)
  phy: renesas: rcar-gen3-usb2: Add support for the RZ/G3S SoC
  dt-bindings: phy: renesas,usb2-phy: Document RZ/G3S phy bindings
  phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
  phy: ti: j721e-wiz: Simplify with scoped for each OF child loop
  phy: ti: j721e-wiz: Drop OF node reference earlier for simpler code
  phy: ti: gmii-sel: Simplify with dev_err_probe()
  phy: ti: am654-serdes: Use scoped device node handling to simplify error paths
  phy: qcom: qmp-pcie-msm8996: Simplify with scoped for each OF child loop
  phy: mediatek: xsphy: Simplify with scoped for each OF child loop
  phy: mediatek: tphy: Simplify with scoped for each OF child loop
  phy: hisilicon: usb2: Simplify with scoped for each OF child loop
  phy: cadence: sierra: Simplify with scoped for each OF child loop
  phy: broadcom: brcm-sata: Simplify with scoped for each OF child loop
  phy: broadcom: bcm-cygnus-pcie: Simplify with scoped for each OF child loop
  phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY
  dt-bindings: phy: nuvoton,ma35-usb2-phy: add new bindings
  phy: qcom: qmp-pcie: Configure all tables on port B PHY
  phy: airoha: adjust initialization delay in airoha_pcie_phy_init()
  dt-bindings: phy: socionext,uniphier: add top-level constraints
  phy: qcom: qmp-pcie: Add Gen4 4-lanes mode for X1E80100
  ...

1 files changed, 55 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/phy/qcom,sata-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sata-phy.yaml
new file mode 100644
index 000000000000..0bf18d32c133
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,sata-phy.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,sata-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SATA PHY Controller
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+  - Konrad Dybcio <konrad.dybcio@linaro.org>
+
+description:
+  The Qualcomm SATA PHY describes on-chip SATA Physical layer controllers.
+
+properties:
+  compatible:
+    enum:
+      - qcom,ipq806x-sata-phy
+      - qcom,apq8064-sata-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: cfg
+
+  '#phy-cells':
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+    sata_phy: sata-phy@1b400000 {
+        compatible = "qcom,ipq806x-sata-phy";
+        reg = <0x1b400000 0x200>;
+
+        clocks = <&gcc SATA_PHY_CFG_CLK>;
+        clock-names = "cfg";
+
+        #phy-cells = <0>;
+    };
+