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authorYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>2017-01-17 11:14:27 -0500
committerKishon Vijay Abraham I <kishon@ti.com>2017-01-27 13:06:53 +0530
commitc8ca631f9480cb4c6df78dd3d2eeeb5ac99ba4f3 (patch)
tree26d670021932613be288ab3d1d99d6faf62f9a72 /Documentation/devicetree/bindings/phy
parent42020c70656f9966e9ed83f9fe67369b0abf75e8 (diff)
dt-bindings: phy: Add documentation for NSP USB3 PHY
Add documentation for USB3 PHY available in Northstar plus SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt39
1 files changed, 39 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
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index 000000000000..e68ae5dec9c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt
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+Broadcom USB3 phy binding for northstar plus SoC
+The USB3 phy is internal to the SoC and is accessed using mdio interface.
+
+Required mdio bus properties:
+- reg: Should be 0x0 for SoC internal USB3 phy
+- #address-cells: must be 1
+- #size-cells: must be 0
+
+Required USB3 PHY properties:
+- compatible: should be "brcm,nsp-usb3-phy"
+- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
+- usb3-ctrl-syscon: handler of syscon node defining physical address
+ of usb3 control register.
+- #phy-cells: must be 0
+
+Required usb3 control properties:
+- compatible: should be "brcm,nsp-usb3-ctrl"
+- reg: offset and length of the control registers
+
+Example:
+
+ mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb3_phy: usb-phy@10 {
+ compatible = "brcm,nsp-usb3-phy";
+ reg = <0x10>;
+ usb3-ctrl-syscon = <&usb3_ctrl>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ usb3_ctrl: syscon@104408 {
+ compatible = "brcm,nsp-usb3-ctrl", "syscon";
+ reg = <0x104408 0x3fc>;
+ };