diff options
author | Maxime Ripard <maxime@cerno.tech> | 2019-12-19 10:07:12 +0100 |
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committer | Rob Herring <robh@kernel.org> | 2019-12-24 14:17:53 -0700 |
commit | 93adc6aef57f169c010071d732940b0f9f1fb5a7 (patch) | |
tree | 1792a15c635dfa1256d3a6b698c3cc36a1c83255 /Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml | |
parent | af287ed02ffd3bb356f3f63ab9eacc60a65247fb (diff) |
dt-bindings: resets: Convert Allwinner legacy resets to schemas
The Allwinner SoCs have a legacy set of bindings (and a framework to
support it in Linux) for their reset controllers.
Now that we have the DT validation in place, let's split into separate file
and convert the device tree bindings for those resets to schemas, and mark
them all as deprecated.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml b/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml new file mode 100644 index 000000000000..001c0d2a8c1f --- /dev/null +++ b/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A31 Peripheral Reset Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <mripard@kernel.org> + +deprecated: true + +select: + properties: + compatible: + contains: + enum: + - allwinner,sun6i-a31-ahb1-reset + - allwinner,sun6i-a31-clock-reset + + # The PRCM on the A31 and A23 will have the reg property missing, + # since it's set at the upper level node, and will be validated by + # PRCM's schema. Make sure we only validate standalone nodes. + required: + - compatible + - reg + +properties: + "#reset-cells": + const: 1 + description: > + This additional argument passed to that reset controller is the + offset of the bit controlling this particular reset line in the + register. + + compatible: + enum: + - allwinner,sun6i-a31-ahb1-reset + - allwinner,sun6i-a31-clock-reset + + reg: + maxItems: 1 + +required: + - "#reset-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + ahb1_rst: reset@1c202c0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-ahb1-reset"; + reg = <0x01c202c0 0xc>; + }; + + - | + apbs_rst: reset@80014b0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x080014b0 0x4>; + }; + +... |