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authorThomas Zimmermann <tzimmermann@suse.de>2023-03-13 09:27:50 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2023-03-13 09:27:50 +0100
commita1eccc574f977bd21a4ec8ac54bd73a2756bd281 (patch)
tree4bf81d9f35b36aebb150128e865193bf8984bf8c /Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml
parent3e853b9f89e4bcc8aa342fa350d83ff0df67d7e9 (diff)
parentfe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff)
Merge drm/drm-next into drm-misc-next
Backmerging to get v6.3-rc1 and sync with the other DRM trees. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml')
-rw-r--r--Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml28
1 files changed, 14 insertions, 14 deletions
diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml
index ac3b2ec300ac..8e769ccda97f 100644
--- a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml
+++ b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml
@@ -2,8 +2,8 @@
# Copyright 2019 BayLibre, SAS
%YAML 1.2
---
-$id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+$id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson SPI Flash Controller
@@ -11,7 +11,7 @@ maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
allOf:
- - $ref: "spi-controller.yaml#"
+ - $ref: spi-controller.yaml#
description: |
The Meson SPIFC is a controller optimized for communication with SPI
@@ -40,15 +40,15 @@ unevaluatedProperties: false
examples:
- |
spi@c1108c80 {
- compatible = "amlogic,meson6-spifc";
- reg = <0xc1108c80 0x80>;
- clocks = <&clk81>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- flash: flash@0 {
- compatible = "spansion,m25p80", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <40000000>;
- };
+ compatible = "amlogic,meson6-spifc";
+ reg = <0xc1108c80 0x80>;
+ clocks = <&clk81>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash: flash@0 {
+ compatible = "spansion,m25p80", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ };
};