diff options
author | Olof Johansson <olof@lixom.net> | 2019-12-05 13:16:58 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2019-12-05 13:18:54 -0800 |
commit | 942e6f8a8314e5550e254519dfba4ccd5170421d (patch) | |
tree | 75ec655b440fbc1c454247af38b5596dd8c78de9 /Documentation/memory-barriers.txt | |
parent | 336bab731be76a90291697e51d2aed0ad67d7cb5 (diff) | |
parent | b08baef02b26cf7c2123e4a24a2fa1fb7a593ffb (diff) |
Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r-- | Documentation/memory-barriers.txt | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 1adbb8a371c7..ec3b5865c1be 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -63,7 +63,6 @@ CONTENTS - Compiler barrier. - CPU memory barriers. - - MMIO write barrier. (*) Implicit kernel memory barriers. @@ -75,7 +74,6 @@ CONTENTS (*) Inter-CPU acquiring barrier effects. - Acquires vs memory accesses. - - Acquires vs I/O accesses. (*) Where are memory barriers needed? @@ -492,10 +490,9 @@ And a couple of implicit varieties: happen before it completes. The use of ACQUIRE and RELEASE operations generally precludes the need - for other sorts of memory barrier (but note the exceptions mentioned in - the subsection "MMIO write barrier"). In addition, a RELEASE+ACQUIRE - pair is -not- guaranteed to act as a full memory barrier. However, after - an ACQUIRE on a given variable, all memory accesses preceding any prior + for other sorts of memory barrier. In addition, a RELEASE+ACQUIRE pair is + -not- guaranteed to act as a full memory barrier. However, after an + ACQUIRE on a given variable, all memory accesses preceding any prior RELEASE on that same variable are guaranteed to be visible. In other words, within a given variable's critical section, all accesses of all previous critical sections for that variable are guaranteed to have @@ -1512,8 +1509,6 @@ levels: (*) CPU memory barriers. - (*) MMIO write barrier. - COMPILER BARRIER ---------------- |