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authorAlexandre Bounine <alexandre.bounine@idt.com>2016-08-02 14:06:40 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-08-02 19:35:34 -0400
commitcb782cdd2ffffbf7fd17e4aefb20f4db5c67caeb (patch)
treee5e2096ca162c5b433850aaab8731f9281a475cb /Documentation/rapidio
parent4498c31adff99d243b34b0bf39363a35ea070928 (diff)
rapidio/tsi721: add PCIe MRRS override parameter
Add PCIe Maximum Read Request Size (MRRS) adjustment parameter to allow users to override configuration register value set during PCIe bus initialization. Performance of Tsi721 device as PCIe bus master can be improved if MRRS is set to its maximum value (4096 bytes). Some platforms have limitations for supported MRRS and therefore the default value should be preserved, unless it is known that given platform supports full set of MRRS values defined by PCI Express specification. Link: http://lkml.kernel.org/r/1469125134-16523-6-git-send-email-alexandre.bounine@idt.com Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Andre van Herk <andre.van.herk@prodrive-technologies.com> Cc: Barry Wood <barry.wood@idt.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation/rapidio')
-rw-r--r--Documentation/rapidio/tsi721.txt7
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/rapidio/tsi721.txt b/Documentation/rapidio/tsi721.txt
index 0e0e90bef882..9c6ee3853793 100644
--- a/Documentation/rapidio/tsi721.txt
+++ b/Documentation/rapidio/tsi721.txt
@@ -39,6 +39,13 @@ fully compatible with RIONET driver (Ethernet over RapidIO messaging services).
DMA channels not selected by this mask will not be used by this device
driver. Default value is 0x7f (use all channels).
+- 'pcie_mrrs' - override value for PCIe Maximum Read Request Size (MRRS).
+ This parameter gives an ability to override MRRS value set during PCIe
+ configuration process. Tsi721 supports read request sizes up to 4096B.
+ Value for this parameter must be set as defined by PCIe specification:
+ 0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B.
+ Default value is '-1' (= keep platform setting).
+
II. Known problems
None.