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authorLubomir Rintel <lkundrak@v3.sk>2018-10-10 19:09:26 +0200
committerMark Brown <broonie@kernel.org>2018-10-11 15:37:21 +0100
commit44221ebae2da9daad053e383240d8aeacacaa43e (patch)
treea6832ef7a1e9fcc05057adba010c75d9a24822d2 /Documentation
parent87ae1d2d70772d661162de03e56c8d1cc5f12650 (diff)
spi/spi-pxa2xx: add PXA2xx SSP SPI Controller
This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-pxa2xx.txt24
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt
new file mode 100644
index 000000000000..0335a9bd2e8a
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt
@@ -0,0 +1,24 @@
+PXA2xx SSP SPI Controller
+
+Required properties:
+- compatible: Must be "marvell,mmp2-ssp".
+- reg: Offset and length of the device's register set.
+- interrupts: Should be the interrupt number.
+- clocks: Should contain a single entry describing the clock input.
+- #address-cells: Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+ Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Child nodes represent devices on the SPI bus
+ See ../spi/spi-bus.txt
+
+Example:
+ ssp1: spi@d4035000 {
+ compatible = "marvell,mmp2-ssp";
+ reg = <0xd4035000 0x1000>;
+ clocks = <&soc_clocks MMP2_CLK_SSP0>;
+ interrupts = <0>;
+ };