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authorStephen Boyd <sboyd@kernel.org>2021-06-22 13:01:30 -0700
committerStephen Boyd <sboyd@kernel.org>2021-06-22 13:01:30 -0700
commit686f225039be2846845349669edbfc5771ba647a (patch)
treefdc82fb7f94616ba7d330bbec2028159cbb62e0d /Documentation
parent6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff)
parent8271813e404cd0620f99fbccffd2746f85a17259 (diff)
Merge tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson into clk-amlogic
Pull Amlogic clk driver updates from Jerome Brunet: - Use determine_rate() for the pll ops instead of round_rate() - Restrict gp0/1 and audio plls range on g12a/sm1 - Improve axg-audio controller error on deferral - Add NNA clocks on g12a * tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson: clk: meson: g12a: Add missing NNA source clocks for g12b clk: meson: axg-audio: improve deferral handling clk: meson: g12a: fix gp0 and hifi ranges clk: meson: pll: switch to determine_rate for the PLL ops
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