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authorLinus Walleij <linus.walleij@linaro.org>2019-02-01 19:12:58 +0100
committerLinus Walleij <linus.walleij@linaro.org>2019-04-23 16:02:14 +0200
commit7c23b0e1d4d32f1d1a96730ff1abb8b6cc681cfc (patch)
tree007801c409b63bd893cf92346593e048ce09e0f3 /Documentation
parentf1497f3d06ad305aa3a8b3ff6b161b5eace89d0e (diff)
clocksource/drivers/ixp4xx: Add DT bindings
This adds device tree bindings for the Intel IXP4xx timers. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml42
1 files changed, 42 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
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+++ b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2018 Linaro Ltd.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/timer/intel-ixp4xx-timer.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel IXP4xx XScale Networking Processors Timers
+
+maintainers:
+ - Linus Walleij <linus.walleij@linaro.org>
+
+description: This timer is found in the Intel IXP4xx processors.
+
+properties:
+ compatible:
+ items:
+ - const: intel,ixp4xx-timer
+
+ reg:
+ description: Should contain registers location and length
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: Timer 1 interrupt
+ - description: Timer 2 interrupt
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ timer@c8005000 {
+ compatible = "intel,ixp4xx-timer";
+ reg = <0xc8005000 0x100>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+ };