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authorJames Hogan <james.hogan@imgtec.com>2017-03-14 17:00:08 +0000
committerJames Hogan <james.hogan@imgtec.com>2017-03-28 16:31:37 +0100
commitdc44abd6aad22411f7f9890e39fd4753dabf0d03 (patch)
tree59b781f47746712e02890d0b3917b9581e0320a3 /Documentation
parent0ae3abcda2dc5fe0130e3261da8a89489fff3e0e (diff)
KVM: MIPS/Emulate: Properly implement TLBR for T&E
Properly implement emulation of the TLBR instruction for Trap & Emulate. This instruction reads the TLB entry pointed at by the CP0_Index register into the other TLB registers, which may have the side effect of changing the current ASID. Therefore abstract the CP0_EntryHi and ASID changing code into a common function in the process. A comment indicated that Linux doesn't use TLBR, which is true during normal use, however dumping of the TLB does use it (for example with the relatively recent 'x' magic sysrq key), as does a wired TLB entries test case in my KVM tests. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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