diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-29 11:03:54 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-29 11:03:54 -0500 |
| commit | fa8805ad67fa484f8f15ee74309aedef0f4b4982 (patch) | |
| tree | c656d9bdda6f1975eacbd59ee842810d4cc47e9e /Documentation | |
| parent | 26d74926186200e0d900cf379327deafed92f9e9 (diff) | |
| parent | 15d63a897f79f465d71fb55cc11c6b7e20c19391 (diff) | |
Merge branch 'pci/controller/qcom'
- Configure controller so MHI bus master clock will be switched off while
in ASPM L1.x states (Manivannan Sadhasivam)
- Add sa8775p DT binding and driver support (Mrinmay Sarkar)
- Fix broken DT SDX65 "compatible" property (Krzysztof Kozlowski)
* pci/controller/qcom:
dt-bindings: PCI: qcom: Fix SDX65 compatible
PCI: qcom: Add support for sa8775p SoC
dt-bindings: PCI: qcom: Add sa8775p compatible
PCI: qcom-ep: Switch MHI bus master clock off during L1SS
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 12 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 28 |
2 files changed, 35 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 811112255d7d..c94b49498f69 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -11,10 +11,13 @@ maintainers: properties: compatible: - enum: - - qcom,sdx55-pcie-ep - - qcom,sdx65-pcie-ep - - qcom,sm8450-pcie-ep + oneOf: + - enum: + - qcom,sdx55-pcie-ep + - qcom,sm8450-pcie-ep + - items: + - const: qcom,sdx65-pcie-ep + - const: qcom,sdx55-pcie-ep reg: items: @@ -110,7 +113,6 @@ allOf: contains: enum: - qcom,sdx55-pcie-ep - - qcom,sdx65-pcie-ep then: properties: clocks: diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 81971be4e554..eadba38171e1 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -29,6 +29,7 @@ properties: - qcom,pcie-msm8996 - qcom,pcie-qcs404 - qcom,pcie-sa8540p + - qcom,pcie-sa8775p - qcom,pcie-sc7280 - qcom,pcie-sc8180x - qcom,pcie-sc8280xp @@ -211,6 +212,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-sa8775p - qcom,pcie-sc7280 - qcom,pcie-sc8180x - qcom,pcie-sc8280xp @@ -748,7 +750,32 @@ allOf: compatible: contains: enum: + - qcom,pcie-sa8775p + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + clock-names: + items: + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + + - if: + properties: + compatible: + contains: + enum: - qcom,pcie-sa8540p + - qcom,pcie-sa8775p - qcom,pcie-sc8280xp then: required: @@ -790,6 +817,7 @@ allOf: contains: enum: - qcom,pcie-msm8996 + - qcom,pcie-sa8775p - qcom,pcie-sc7280 - qcom,pcie-sc8180x - qcom,pcie-sdm845 |